opcodes/ChangeLog

   1 2011-08-01  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         PR ld/13048
   4         * i386-dis.c (print_insn): Optimize info->mach check.
   5
   6 2011-08-01  H.J. Lu  <hongjiu.lu@intel.com>
   7
   8         PR gas/13046
   9         * i386-opc.tbl: Add Disp32S to 64bit call.
  10         * i386-tbl.h: Regenerated.
  11
  12 2011-07-24  Chao-ying Fu  <fu@mips.com>
  13             Maciej W. Rozycki  <macro@codesourcery.com>
  14
  15         * micromips-opc.c: New file.
  16         * mips-dis.c (micromips_to_32_reg_b_map): New array.
  17         (micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise.
  18         (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise.
  19         (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise.
  20         (micromips_to_32_reg_q_map): Likewise.
  21         (micromips_imm_b_map, micromips_imm_c_map): Likewise.
  22         (micromips_ase): New variable.
  23         (is_micromips): New function.
  24         (set_default_mips_dis_options): Handle microMIPS ASE.
  25         (print_insn_micromips): New function.
  26         (is_compressed_mode_p): Likewise.
  27         (_print_insn_mips): Handle microMIPS instructions.
  28         * Makefile.am (CFILES): Add micromips-opc.c.
  29         * configure.in (bfd_mips_arch): Add micromips-opc.lo.
  30         * Makefile.in: Regenerate.
  31         * configure: Regenerate.
  32
  33         * mips-dis.c (micromips_to_32_reg_h_map): New variable.
  34         (micromips_to_32_reg_i_map): Likewise.
  35         (micromips_to_32_reg_m_map): Likewise.
  36         (micromips_to_32_reg_n_map): New macro.
  37
  38 2011-07-24  Maciej W. Rozycki  <macro@codesourcery.com>
  39
  40         * mips-opc.c (NODS): New macro.
  41         (TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
  42         (DSP_VOLA): Likewise.
  43         (mips_builtin_opcodes): Add NODS annotation to "deret" and
  44         "eret". Replace INSN_SYNC with NODS throughout.  Use NODS in
  45         place of TRAP for "wait", "waiti" and "yield".
  46         * mips16-opc.c (NODS): New macro.
  47         (TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT.
  48         (mips16_opcodes):  Use NODS in place of TRAP for "jalrc", "jrc",
  49         "restore" and "save".
  50
  51 2011-07-22  H.J. Lu  <hongjiu.lu@intel.com>
  52
  53         * configure.in: Handle bfd_k1om_arch.
  54         * configure: Regenerated.
  55
  56         * disassemble.c (disassembler): Handle bfd_k1om_arch.
  57
  58         * i386-dis.c (print_insn): Handle bfd_mach_k1om and
  59         bfd_mach_k1om_intel_syntax.
  60
  61         * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to
  62         ~(CpuL1OM|CpuK1OM).  Add CPU_K1OM_FLAGS.
  63         (cpu_flags): Add CpuK1OM.
  64
  65         * i386-opc.h (CpuK1OM): New.
  66         (i386_cpu_flags): Add cpuk1om.
  67
  68         * i386-init.h: Regenerated.
  69         * i386-tbl.h: Likewise.
  70
  71 2011-07-12  Nick Clifton  <nickc@redhat.com>
  72
  73         * arm-dis.c (print_insn_arm): Revert previous, undocumented,
  74         accidental change.
  75
  76 2011-07-01  Nick Clifton  <nickc@redhat.com>
  77
  78         PR binutils/12329
  79         * avr-dis.c (avr_operand): Fix disassembly of ELPM, LPM and SPM
  80         insns using post-increment addressing.
  81
  82 2011-06-30  H.J. Lu  <hongjiu.lu@intel.com>
  83
  84         * i386-dis.c (vex_len_table): Update rorxS.
  85
  86 2011-06-30  H.J. Lu  <hongjiu.lu@intel.com>
  87
  88         AVX Programming Reference (June, 2011)
  89         * i386-dis.c (vex_len_table): Correct rorxS.
  90
  91         * i386-opc.tbl: Correct rorx.
  92         * i386-tbl.h: Regenerated.
  93
  94 2011-06-29  H.J. Lu  <hongjiu.lu@intel.com>
  95
  96         * tilegx-opc.c (find_opcode): Replace "index" with "i".
  97         * tilepro-opc.c (find_opcode): Likewise.
  98
  99 2011-06-29  Richard Sandiford  <rdsandiford@googlemail.com>
 100
 101         * mips16-opc.c (jalrc, jrc): Move earlier in file.
 102
 103 2011-06-21  H.J. Lu  <hongjiu.lu@intel.com>
 104
 105         * i386-dis.c (prefix_table): Re-indent PREFIX_VEX_0F388C and
 106         PREFIX_VEX_0F388E.
 107
 108 2011-06-17  Andreas Schwab  <schwab@redhat.com>
 109
 110         * Makefile.am (MAINTAINERCLEANFILES): Move s390-opc.tab ...
 111         (MOSTLYCLEANFILES): ... here.
 112         * Makefile.in: Regenerate.
 113
 114 2011-06-14  Alan Modra  <amodra@gmail.com>
 115
 116         * Makefile.in: Regenerate.
 117
 118 2011-06-13  Walter Lee  <walt@tilera.com>
 119
 120         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
 121         tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
 122         * Makefile.in: Regenerate.
 123         * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
 124         * configure: Regenerate.
 125         * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
 126         * po/POTFILES.in: Regenerate.
 127         * tilegx-dis.c: New file.
 128         * tilegx-opc.c: New file.
 129         * tilepro-dis.c: New file.
 130         * tilepro-opc.c: New file.
 131
 132 2011-06-10  H.J. Lu  <hongjiu.lu@intel.com>
 133
 134         AVX Programming Reference (June, 2011)
 135         * i386-dis.c (XMGatherQ): New.
 136         * i386-dis.c (EXxmm_mb): New.
 137         (EXxmm_mb): Likewise.
 138         (EXxmm_mw): Likewise.
 139         (EXxmm_md): Likewise.
 140         (EXxmm_mq): Likewise.
 141         (EXxmmdw): Likewise.
 142         (EXxmmqd): Likewise.
 143         (VexGatherQ): Likewise.
 144         (MVexVSIBDWpX): Likewise.
 145         (MVexVSIBQWpX): Likewise.
 146         (xmm_mb_mode): Likewise.
 147         (xmm_mw_mode): Likewise.
 148         (xmm_md_mode): Likewise.
 149         (xmm_mq_mode): Likewise.
 150         (xmmdw_mode): Likewise.
 151         (xmmqd_mode): Likewise.
 152         (ymmxmm_mode): Likewise.
 153         (vex_vsib_d_w_dq_mode): Likewise.
 154         (vex_vsib_q_w_dq_mode): Likewise.
 155         (MOD_VEX_0F385A_PREFIX_2): Likewise.
 156         (MOD_VEX_0F388C_PREFIX_2): Likewise.
 157         (MOD_VEX_0F388E_PREFIX_2): Likewise.
 158         (PREFIX_0F3882): Likewise.
 159         (PREFIX_VEX_0F3816): Likewise.
 160         (PREFIX_VEX_0F3836): Likewise.
 161         (PREFIX_VEX_0F3845): Likewise.
 162         (PREFIX_VEX_0F3846): Likewise.
 163         (PREFIX_VEX_0F3847): Likewise.
 164         (PREFIX_VEX_0F3858): Likewise.
 165         (PREFIX_VEX_0F3859): Likewise.
 166         (PREFIX_VEX_0F385A): Likewise.
 167         (PREFIX_VEX_0F3878): Likewise.
 168         (PREFIX_VEX_0F3879): Likewise.
 169         (PREFIX_VEX_0F388C): Likewise.
 170         (PREFIX_VEX_0F388E): Likewise.
 171         (PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise.
 172         (PREFIX_VEX_0F38F5): Likewise.
 173         (PREFIX_VEX_0F38F6): Likewise.
 174         (PREFIX_VEX_0F3A00): Likewise.
 175         (PREFIX_VEX_0F3A01): Likewise.
 176         (PREFIX_VEX_0F3A02): Likewise.
 177         (PREFIX_VEX_0F3A38): Likewise.
 178         (PREFIX_VEX_0F3A39): Likewise.
 179         (PREFIX_VEX_0F3A46): Likewise.
 180         (PREFIX_VEX_0F3AF0): Likewise.
 181         (VEX_LEN_0F3816_P_2): Likewise.
 182         (VEX_LEN_0F3819_P_2): Likewise.
 183         (VEX_LEN_0F3836_P_2): Likewise.
 184         (VEX_LEN_0F385A_P_2_M_0): Likewise.
 185         (VEX_LEN_0F38F5_P_0): Likewise.
 186         (VEX_LEN_0F38F5_P_1): Likewise.
 187         (VEX_LEN_0F38F5_P_3): Likewise.
 188         (VEX_LEN_0F38F6_P_3): Likewise.
 189         (VEX_LEN_0F38F7_P_1): Likewise.
 190         (VEX_LEN_0F38F7_P_2): Likewise.
 191         (VEX_LEN_0F38F7_P_3): Likewise.
 192         (VEX_LEN_0F3A00_P_2): Likewise.
 193         (VEX_LEN_0F3A01_P_2): Likewise.
 194         (VEX_LEN_0F3A38_P_2): Likewise.
 195         (VEX_LEN_0F3A39_P_2): Likewise.
 196         (VEX_LEN_0F3A46_P_2): Likewise.
 197         (VEX_LEN_0F3AF0_P_3): Likewise.
 198         (VEX_W_0F3816_P_2): Likewise.
 199         (VEX_W_0F3818_P_2): Likewise.
 200         (VEX_W_0F3819_P_2): Likewise.
 201         (VEX_W_0F3836_P_2): Likewise.
 202         (VEX_W_0F3846_P_2): Likewise.
 203         (VEX_W_0F3858_P_2): Likewise.
 204         (VEX_W_0F3859_P_2): Likewise.
 205         (VEX_W_0F385A_P_2_M_0): Likewise.
 206         (VEX_W_0F3878_P_2): Likewise.
 207         (VEX_W_0F3879_P_2): Likewise.
 208         (VEX_W_0F3A00_P_2): Likewise.
 209         (VEX_W_0F3A01_P_2): Likewise.
 210         (VEX_W_0F3A02_P_2): Likewise.
 211         (VEX_W_0F3A38_P_2): Likewise.
 212         (VEX_W_0F3A39_P_2): Likewise.
 213         (VEX_W_0F3A46_P_2): Likewise.
 214         (MOD_VEX_0F3818_PREFIX_2): Removed.
 215         (MOD_VEX_0F3819_PREFIX_2): Likewise.
 216         (VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise.
 217         (VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise.
 218         (VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise.
 219         (VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise.
 220         (VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise.
 221         (VEX_LEN_0F3A0E_P_2): Likewise.
 222         (VEX_LEN_0F3A0F_P_2): Likewise.
 223         (VEX_LEN_0F3A42_P_2): Likewise.
 224         (VEX_LEN_0F3A4C_P_2): Likewise.
 225         (VEX_W_0F3818_P_2_M_0): Likewise.
 226         (VEX_W_0F3819_P_2_M_0): Likewise.
 227         (prefix_table): Updated.
 228         (three_byte_table): Likewise.
 229         (vex_table): Likewise.
 230         (vex_len_table): Likewise.
 231         (vex_w_table): Likewise.
 232         (mod_table): Likewise.
 233         (putop): Handle "LW".
 234         (intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode,
 235         xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode,
 236         vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode.
 237         (OP_EX): Likewise.
 238         (OP_E_memory): Handle vex_vsib_d_w_dq_mode and
 239         vex_vsib_q_w_dq_mode.
 240         (OP_XMM): Handle vex_vsib_q_w_dq_mode.
 241         (OP_VEX): Likewise.
 242
 243         * i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS
 244         and CPU_ANY_AVX_FLAGS.  Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS,
 245         CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS.
 246         (cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID.
 247         (opcode_modifiers): Add VecSIB.
 248
 249         * i386-opc.h (CpuAVX2): New.
 250         (CpuBMI2): Likewise.
 251         (CpuLZCNT): Likewise.
 252         (CpuINVPCID): Likewise.
 253         (VecSIB128): Likewise.
 254         (VecSIB256): Likewise.
 255         (VecSIB): Likewise.
 256         (i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid.
 257         (i386_opcode_modifier): Add vecsib.
 258
 259         * i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions.
 260         * i386-init.h: Regenerated.
 261         * i386-tbl.h: Likewise.
 262
 263 2011-06-03  Quentin Neill  <quentin.neill@amd.com>
 264
 265         * i386-gen.c (cpu_flag_init): Add CpuF16C to CPU_BDVER2_FLAGS.
 266         * i386-init.h: Regenerated.
 267
 268 2011-06-03  Nick Clifton  <nickc@redhat.com>
 269
 270         PR binutils/12752
 271         * arm-dis.c (print_insn_coprocessor): Use bfd_vma type for
 272         computing address offsets.
 273         (print_arm_address): Likewise.
 274         (print_insn_arm): Likewise.
 275         (print_insn_thumb16): Likewise.
 276         (print_insn_thumb32): Likewise.
 277
 278 2011-06-02  Jie Zhang <jie@codesourcery.com>
 279             Nathan Sidwell <nathan@codesourcery.com>
 280             Maciej Rozycki <macro@codesourcery.com>
 281
 282         * arm-dis.c (print_insn_coprocessor): Explicitly print #-0
 283         as address offset.
 284         (print_arm_address): Likewise. Elide positive #0 appropriately.
 285         (print_insn_arm): Likewise.
 286
 287 2011-06-02  Nick Clifton  <nickc@redhat.com>
 288
 289         PR gas/12752
 290         * arm-dis.c (print_insn_thumb32): Do not sign extend  addresses
 291         passed to print_address_func.
 292
 293 2011-06-02  Nick Clifton  <nickc@redhat.com>
 294
 295         * arm-dis.c: Fix spelling mistakes.
 296         * op/opcodes.pot: Regenerate.
 297
 298 2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 299
 300         * s390-opc.c: Replace S390_OPERAND_REG_EVEN with
 301         S390_OPERAND_REG_PAIR.  Fix INSTR_RRF_0UFEF instruction type.
 302         * s390-opc.txt: Fix cxr instruction type.
 303
 304 2011-05-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 305
 306         * s390-opc.c: Add new instruction types marking register pair
 307         operands.
 308         * s390-opc.txt: Match instructions having register pair operands
 309         to the new instruction types.
 310
 311 2011-05-19  Nick Clifton  <nickc@redhat.com>
 312
 313         * v850-opc.c (cmpf.[sd]): Reverse the order of the reg1 and reg2
 314         operands.
 315
 316 2011-05-10  Quentin Neill  <quentin.neill@amd.com>
 317
 318         * i386-gen.c (cpu_flag_init): Add new CPU_BDVER2_FLAGS.
 319         * i386-init.h: Regenerated.
 320
 321 2011-04-27  Nick Clifton  <nickc@redhat.com>
 322
 323         * po/da.po: Updated Danish translation.
 324
 325 2011-04-26  Anton Blanchard  <anton@samba.org>
 326
 327         * ppc-opc.c: (powerpc_opcodes): Enable icswx for POWER7.
 328
 329 2011-04-21  DJ Delorie  <dj@redhat.com>
 330
 331         * rx-decode.opc (rx_decode_opcode): Set the syntax for multi-byte NOPs.
 332         * rx-decode.c: Regenerate.
 333
 334 2011-04-20  H.J. Lu  <hongjiu.lu@intel.com>
 335
 336         * i386-init.h: Regenerated.
 337
 338 2011-04-19  Quentin Neill  <quentin.neill@amd.com>
 339
 340         * i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits
 341         from bdver1 flags.
 342
 343 2011-04-13  Nick Clifton  <nickc@redhat.com>
 344
 345         * v850-dis.c (disassemble): Always print a closing square brace if
 346         an opening square brace was printed.
 347
 348 2011-04-12  Nick Clifton  <nickc@redhat.com>
 349
 350         PR binutils/12534
 351         * arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn
 352         patterns.
 353         (print_insn_thumb32): Handle %L.
 354
 355 2011-04-11  Julian Brown  <julian@codesourcery.com>
 356
 357         * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
 358         (print_insn_thumb32): Add APSR bitmask support.
 359
 360 2011-04-07  Paul Carroll<pcarroll@codesourcery.com>
 361
 362         * arm-dis.c (print_insn): init vars moved into private_data structure.
 363
 364 2011-03-24  Mike Frysinger  <vapier@gentoo.org>
 365
 366         * bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
 367
 368 2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>
 369
 370         * avr-dis.c (avr_operand): Add opcode_str parameter. Check for
 371         post-increment to support LPM Z+ instruction. Add support for 'E'
 372         constraint for DES instruction.
 373         (print_insn_avr): Adjust calls to avr_operand. Rename variable.
 374
 375 2011-03-14  Richard Sandiford  <richard.sandiford@linaro.org>
 376
 377         * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code.
 378
 379 2011-03-14  Richard Sandiford  <richard.sandiford@linaro.org>
 380
 381         * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC.
 382         Use branch types instead.
 383         (print_insn): Likewise.
 384
 385 2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
 386
 387         * mips-opc.c (mips_builtin_opcodes): Correct register use
 388         annotation of "alnv.ps".
 389
 390 2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
 391
 392         * mips-opc.c (mips_builtin_opcodes): Add "pref" macro.
 393
 394 2011-02-22  Mike Frysinger  <vapier@gentoo.org>
 395
 396         * bfin-dis.c (OUTS): Remove p NULL check and txt NUL check.
 397
 398 2011-02-22  Mike Frysinger  <vapier@gentoo.org>
 399
 400         * bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS.
 401
 402 2011-02-19  Mike Frysinger  <vapier@gentoo.org>
 403
 404         * bfin-dis.c (saved_state): Mark static.  Change a[01]x to ax[] and
 405         a[01]w to aw[].  Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1,
 406         av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts,
 407         exception, end_of_registers, msize, memory, bfd_mach.
 408         (CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG,
 409         LB0REG, LC1REG, LT1REG, LB1REG): Delete
 410         (AXREG, AWREG, LCREG, LTREG, LBREG): Define.
 411         (get_allreg): Change to new defines.  Fallback to abort().
 412
 413 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 414
 415         * bfin-dis.c: Add whitespace/parenthesis where needed.
 416
 417 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 418
 419         * bfin-dis.c (decode_LoopSetup_0): Return when reg is greater
 420         than 7.
 421
 422 2011-02-13  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 423
 424         * configure: Regenerate.
 425
 426 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
 427
 428         * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg.
 429
 430 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
 431
 432         * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1.  Output
 433         dregs only when P is set, and dregs_lo otherwise.
 434
 435 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
 436
 437         * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code.
 438
 439 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
 440
 441         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT.
 442
 443 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
 444
 445         * bfin-dis.c (machine_registers): Delete REG_GP.
 446         (reg_names): Delete "GP".
 447         (decode_allregs): Change REG_GP to REG_LASTREG.
 448
 449 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
 450
 451         * bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2,
 452         M_IH, M_IU): Delete.
 453
 454 2011-02-11  Mike Frysinger  <vapier@gentoo.org>
 455
 456         * bfin-dis.c (reg_names): Add const.
 457         (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte,
 458         decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs,
 459         decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits,
 460         decode_counters, decode_allregs): Likewise.
 461
 462 2011-02-09  Michael Snyder  <msnyder@vmware.com>
 463
 464         * i386-dis.c (OP_J): Parenthesize expression to prevent
 465         truncated addresses.
 466         (print_insn): Fix indentation off-by-one.
 467
 468 2011-02-01  Nick Clifton  <nickc@redhat.com>
 469
 470         * po/da.po: Updated Danish translation.
 471
 472 2011-01-21  Dave Murphy  <davem@devkitpro.org>
 473
 474         * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.
 475
 476 2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>
 477
 478         * i386-dis.c (sIbT): New.
 479         (b_T_mode): Likewise.
 480         (dis386): Replace sIb with sIbT on "pushT".
 481         (x86_64_table): Replace sIb with Ib on "aam" and "aad".
 482         (OP_sI): Handle b_T_mode.  Properly sign-extend byte.
 483
 484 2011-01-18  Jan Kratochvil  <jan.kratochvil@redhat.com>
 485
 486         * i386-init.h: Regenerated.
 487         * i386-tbl.h: Regenerated
 488
 489 2011-01-17  Quentin Neill  <quentin.neill@amd.com>
 490
 491         * i386-dis.c (REG_XOP_TBM_01): New.
 492         (REG_XOP_TBM_02): New.
 493         (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
 494         (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
 495         entries, and add bextr instruction.
 496
 497         * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
 498         (cpu_flags): Add CpuTBM.
 499
 500         * i386-opc.h (CpuTBM) New.
 501         (i386_cpu_flags): Add bit cputbm.
 502
 503         * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
 504         blcs, blsfill, blsic, t1mskc, and tzmsk.
 505
 506 2011-01-12  DJ Delorie  <dj@redhat.com>
 507
 508         * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
 509
 510 2011-01-11  Mingjie Xing  <mingjie.xing@gmail.com>
 511
 512         * mips-dis.c (print_insn_args): Adjust the value to print the real
 513         offset for "+c" argument.
 514
 515 2011-01-10  Nick Clifton  <nickc@redhat.com>
 516
 517         * po/da.po: Updated Danish translation.
 518
 519 2011-01-05  Nathan Sidwell  <nathan@codesourcery.com>
 520
 521         * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
 522
 523 2011-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 524
 525         * i386-dis.c (REG_VEX_38F3): New.
 526         (PREFIX_0FBC): Likewise.
 527         (PREFIX_VEX_38F2): Likewise.
 528         (PREFIX_VEX_38F3_REG_1): Likewise.
 529         (PREFIX_VEX_38F3_REG_2): Likewise.
 530         (PREFIX_VEX_38F3_REG_3): Likewise.
 531         (PREFIX_VEX_38F7): Likewise.
 532         (VEX_LEN_38F2_P_0): Likewise.
 533         (VEX_LEN_38F3_R_1_P_0): Likewise.
 534         (VEX_LEN_38F3_R_2_P_0): Likewise.
 535         (VEX_LEN_38F3_R_3_P_0): Likewise.
 536         (VEX_LEN_38F7_P_0): Likewise.
 537         (dis386_twobyte): Use PREFIX_0FBC.
 538         (reg_table): Add REG_VEX_38F3.
 539         (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
 540         PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
 541         PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
 542         (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
 543         PREFIX_VEX_38F7.
 544         (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
 545         VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
 546         VEX_LEN_38F7_P_0.
 547
 548         * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
 549         (cpu_flags): Add CpuBMI.
 550
 551         * i386-opc.h (CpuBMI): New.
 552         (i386_cpu_flags): Add cpubmi.
 553
 554         * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
 555         * i386-init.h: Regenerated.
 556         * i386-tbl.h: Likewise.
 557
 558 2011-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 559
 560         * i386-dis.c (VexGdq): New.
 561         (OP_VEX): Handle dq_mode.
 562
 563 2011-01-01  H.J. Lu  <hongjiu.lu@intel.com>
 564
 565         * i386-gen.c (process_copyright): Update copyright to 2011.
 566
 567 For older changes see ChangeLog-2010
 568 \f
 569 Local Variables:
 570 mode: change-log
 571 left-margin: 8
 572 fill-column: 74
 573 version-control: never
 574 End: