opcodes/ChangeLog

   1 2005-09-06  Chao-ying Fu  <fu@mips.com>
   2
   3         * mips-opc.c (MT32): New define.
   4         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
   5         bottom to avoid opcode collision with "mftr" and "mttr".
   6         Add MT instructions.
   7         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
   8         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
   9         formats.
  10
  11 2005-09-02  Paul Brook  <paul@codesourcery.com>
  12
  13         * arm-dis.c (coprocessor_opcodes): Add null terminator.
  14
  15 2005-09-02  Paul Brook  <paul@codesourcery.com>
  16
  17         * arm-dis.c (coprocessor_opcodes): New.
  18         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
  19         (print_insn_coprocessor): New function.
  20         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
  21         format characters.
  22         (print_insn_thumb32): Use print_insn_coprocessor.
  23
  24 2005-08-30  Paul Brook  <paul@codesourcery.com>
  25
  26         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
  27
  28 2005-08-26  Jan Beulich  <jbeulich@novell.com>
  29
  30         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
  31         re-use.
  32         (OP_E): Call intel_operand_size, move call site out of mode
  33         dependent code.
  34         (OP_OFF): Call intel_operand_size if suffix_always. Remove
  35         ATTRIBUTE_UNUSED from parameters.
  36         (OP_OFF64): Likewise.
  37         (OP_ESreg): Call intel_operand_size.
  38         (OP_DSreg): Likewise.
  39         (OP_DIR): Use colon rather than semicolon as separator of far
  40         jump/call operands.
  41
  42 2005-08-25  Chao-ying Fu  <fu@mips.com>
  43
  44         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
  45         (mips_builtin_opcodes): Add DSP instructions.
  46         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
  47         mips64, mips64r2.
  48         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
  49         operand formats.
  50
  51 2005-08-23  David Ung  <davidu@mips.com>
  52
  53         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
  54         instructions to the table.
  55
  56 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
  57
  58         * a29k-dis.c: Delete.
  59         * Makefile.am: Remove a29k support.
  60         * configure.in: Likewise.
  61         * disassemble.c: Likewise.
  62         * Makefile.in: Regenerate.
  63         * configure: Regenerate.
  64         * po/POTFILES.in: Regenerate.
  65
  66 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
  67
  68         * ppc-dis.c (powerpc_dialect): Handle e300.
  69         (print_ppc_disassembler_options): Likewise.
  70         * ppc-opc.c (PPCE300): Define.
  71         (powerpc_opcodes): Mark icbt as available for the e300.
  72
  73 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
  74
  75         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
  76         Use "rp" instead of "%r2" in "b,l" insns.
  77
  78 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
  79
  80         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
  81         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
  82         (main): Likewise.
  83         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
  84         and 4 bit optional masks.
  85         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
  86         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
  87         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
  88         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
  89         (s390_opformats): Likewise.
  90         * s390-opc.txt: Add new instructions for cpu type z9-109.
  91
  92 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
  93
  94         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
  95
  96 2005-07-29  Paul Brook  <paul@codesourcery.com>
  97
  98         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
  99
 100 2005-07-29  Paul Brook  <paul@codesourcery.com>
 101
 102         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 103         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 104
 105 2005-07-25  DJ Delorie  <dj@redhat.com>
 106
 107         * m32c-asm.c Regenerate.
 108         * m32c-dis.c Regenerate.
 109
 110 2005-07-20  DJ Delorie  <dj@redhat.com>
 111
 112         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 113         enums, so convert them to bit masks, which attributes are.
 114
 115 2005-07-18  Nick Clifton  <nickc@redhat.com>
 116
 117         * configure.in: Restore alpha ordering to list of arches.
 118         * configure: Regenerate.
 119         * disassemble.c: Restore alpha ordering to list of arches.
 120
 121 2005-07-18  Nick Clifton  <nickc@redhat.com>
 122
 123         * m32c-asm.c: Regenerate.
 124         * m32c-desc.c: Regenerate.
 125         * m32c-desc.h: Regenerate.
 126         * m32c-dis.c: Regenerate.
 127         * m32c-ibld.h: Regenerate.
 128         * m32c-opc.c: Regenerate.
 129         * m32c-opc.h: Regenerate.
 130
 131 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 132
 133         * i386-dis.c (PNI_Fixup): Update comment.
 134         (VMX_Fixup): Properly handle the suffix check.
 135
 136 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 137
 138         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 139         mfctl disassembly.
 140
 141 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 142
 143         * Makefile.am: Run "make dep-am".
 144         (stamp-m32c): Fix cpu dependencies.
 145         * Makefile.in: Regenerate.
 146         * ip2k-dis.c: Regenerate.
 147
 148 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 149
 150         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 151         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 152         (Em): New.
 153         (Gm): New.
 154         (VM): New.
 155         (dis386_twobyte): Updated entries 0x78 and 0x79.
 156         (twobyte_has_modrm): Likewise.
 157         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 158         (OP_G): Handle m_mode.
 159
 160 2005-07-14  Jim Blandy  <jimb@redhat.com>
 161
 162         Add support for the Renesas M32C and M16C.
 163         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 164         * m32c-desc.h, m32c-opc.h: New.
 165         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 166         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 167         m32c-opc.c.
 168         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 169         m32c-ibld.lo, m32c-opc.lo.
 170         (CLEANFILES): List stamp-m32c.
 171         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 172         (CGEN_CPUS): Add m32c.
 173         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 174         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 175         (m32c_opc_h): New variable.
 176         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 177         (m32c-opc.lo): New rules.
 178         * Makefile.in: Regenerated.
 179         * configure.in: Add case for bfd_m32c_arch.
 180         * configure: Regenerated.
 181         * disassemble.c (ARCH_m32c): New.
 182         [ARCH_m32c]: #include "m32c-desc.h".
 183         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 184         (disassemble_init_for_target) [ARCH_m32c]: Same.
 185
 186         * cgen-ops.h, cgen-types.h: New files.
 187         * Makefile.am (HFILES): List them.
 188         * Makefile.in: Regenerated.
 189
 190 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 191
 192         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 193         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 194         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 195         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 196         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 197         v850-dis.c: Fix format bugs.
 198         * ia64-gen.c (fail, warn): Add format attribute.
 199         * or32-opc.c (debug): Likewise.
 200
 201 2005-07-07  Khem Raj  <kraj@mvista.com>
 202
 203         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 204         disassembly pattern.
 205
 206 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 207
 208         * Makefile.am (stamp-m32r): Fix path to cpu files.
 209         (stamp-m32r, stamp-iq2000): Likewise.
 210         * Makefile.in: Regenerate.
 211         * m32r-asm.c: Regenerate.
 212         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 213         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 214
 215 2005-07-05  Nick Clifton  <nickc@redhat.com>
 216
 217         * iq2000-asm.c: Regenerate.
 218         * ms1-asm.c: Regenerate.
 219
 220 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 221
 222         * i386-dis.c (SVME_Fixup): New.
 223         (grps): Use it for the lidt entry.
 224         (PNI_Fixup): Call OP_M rather than OP_E.
 225         (INVLPG_Fixup): Likewise.
 226
 227 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 228
 229         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 230
 231 2005-07-01  Nick Clifton  <nickc@redhat.com>
 232
 233         * a29k-dis.c: Update to ISO C90 style function declarations and
 234         fix formatting.
 235         * alpha-opc.c: Likewise.
 236         * arc-dis.c: Likewise.
 237         * arc-opc.c: Likewise.
 238         * avr-dis.c: Likewise.
 239         * cgen-asm.in: Likewise.
 240         * cgen-dis.in: Likewise.
 241         * cgen-ibld.in: Likewise.
 242         * cgen-opc.c: Likewise.
 243         * cris-dis.c: Likewise.
 244         * d10v-dis.c: Likewise.
 245         * d30v-dis.c: Likewise.
 246         * d30v-opc.c: Likewise.
 247         * dis-buf.c: Likewise.
 248         * dlx-dis.c: Likewise.
 249         * h8300-dis.c: Likewise.
 250         * h8500-dis.c: Likewise.
 251         * hppa-dis.c: Likewise.
 252         * i370-dis.c: Likewise.
 253         * i370-opc.c: Likewise.
 254         * m10200-dis.c: Likewise.
 255         * m10300-dis.c: Likewise.
 256         * m68k-dis.c: Likewise.
 257         * m88k-dis.c: Likewise.
 258         * mips-dis.c: Likewise.
 259         * mmix-dis.c: Likewise.
 260         * msp430-dis.c: Likewise.
 261         * ns32k-dis.c: Likewise.
 262         * or32-dis.c: Likewise.
 263         * or32-opc.c: Likewise.
 264         * pdp11-dis.c: Likewise.
 265         * pj-dis.c: Likewise.
 266         * s390-dis.c: Likewise.
 267         * sh-dis.c: Likewise.
 268         * sh64-dis.c: Likewise.
 269         * sparc-dis.c: Likewise.
 270         * sparc-opc.c: Likewise.
 271         * sysdep.h: Likewise.
 272         * tic30-dis.c: Likewise.
 273         * tic4x-dis.c: Likewise.
 274         * tic80-dis.c: Likewise.
 275         * v850-dis.c: Likewise.
 276         * v850-opc.c: Likewise.
 277         * vax-dis.c: Likewise.
 278         * w65-dis.c: Likewise.
 279         * z8kgen.c: Likewise.
 280
 281         * fr30-*: Regenerate.
 282         * frv-*: Regenerate.
 283         * ip2k-*: Regenerate.
 284         * iq2000-*: Regenerate.
 285         * m32r-*: Regenerate.
 286         * ms1-*: Regenerate.
 287         * openrisc-*: Regenerate.
 288         * xstormy16-*: Regenerate.
 289
 290 2005-06-23  Ben Elliston  <bje@gnu.org>
 291
 292         * m68k-dis.c: Use ISC C90.
 293         * m68k-opc.c: Formatting fixes.
 294
 295 2005-06-16  David Ung  <davidu@mips.com>
 296
 297         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 298         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 299
 300 2005-06-15  Dave Brolley  <brolley@redhat.com>
 301
 302         Contribute Morpho ms1 on behalf of Red Hat
 303         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 304         ms1-opc.h: New files, Morpho ms1 target.
 305
 306         2004-05-14  Stan Cox  <scox@redhat.com>
 307
 308         * disassemble.c (ARCH_ms1): Define.
 309         (disassembler): Handle bfd_arch_ms1
 310
 311         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 312
 313         * Makefile.am, Makefile.in: Add ms1 target.
 314         * configure.in: Ditto.
 315
 316 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 317
 318         * arm-opc.h: Delete; fold contents into ...
 319         * arm-dis.c: ... here.  Move includes of internal COFF headers
 320         next to includes of internal ELF headers.
 321         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 322         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 323         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 324         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 325         (iwmmxt_wwnames, iwmmxt_wwssnames):
 326         Make const.
 327         (regnames): Remove iWMMXt coprocessor register sets.
 328         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 329         (get_arm_regnames): Adjust fourth argument to match above changes.
 330         (set_iwmmxt_regnames): Delete.
 331         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 332         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 333         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 334         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 335         ISO syntax for function pointer calls.
 336
 337 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 338
 339         * arm-dis.c: Split up the comments describing the format codes, so
 340         that the ARM and 16-bit Thumb opcode tables each have comments
 341         preceding them that describe all the codes, and only the codes,
 342         valid in those tables.  (32-bit Thumb table is already like this.)
 343         Reorder the lists in all three comments to match the order in
 344         which the codes are implemented.
 345         Remove all forward declarations of static functions.  Convert all
 346         function definitions to ISO C format.
 347         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 348         Return nothing.
 349         (print_insn_thumb16): Remove unused case 'I'.
 350         (print_insn): Update for changed calling convention of subroutines.
 351
 352 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 353
 354         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 355         hex (but retain it being displayed as signed). Remove redundant
 356         checks. Add handling of displacements for 16-bit addressing in Intel
 357         mode.
 358
 359 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 360
 361         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 362         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 363         masking of 'rm' in 16-bit memory address handling.
 364
 365 2005-05-19  Anton Blanchard  <anton@samba.org>
 366
 367         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 368         (print_ppc_disassembler_options): Document it.
 369         * ppc-opc.c (SVC_LEV): Define.
 370         (LEV): Allow optional operand.
 371         (POWER5): Define.
 372         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 373         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 374
 375 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 376
 377         * Makefile.in:  Regenerate.
 378
 379 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 380
 381         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 382         instructions.  Adjust disassembly of some opcodes to match
 383         unified syntax.
 384         (thumb32_opcodes): New table.
 385         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 386         two-halfword branches here.
 387         (print_insn_thumb32): New function.
 388         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 389         and print_insn_thumb32.  Be consistent about order of
 390         halfwords when printing 32-bit instructions.
 391
 392 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 393
 394         PR 843
 395         * i386-dis.c (branch_v_mode): New.
 396         (indirEv): Use branch_v_mode instead of v_mode.
 397         (OP_E): Handle branch_v_mode.
 398
 399 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 400
 401         * d10v-dis.c (dis_2_short): Support 64bit host.
 402
 403 2005-05-07  Nick Clifton  <nickc@redhat.com>
 404
 405         * po/nl.po: Updated translation.
 406
 407 2005-05-07  Nick Clifton  <nickc@redhat.com>
 408
 409         * Update the address and phone number of the FSF organization in
 410         the GPL notices in the following files:
 411         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 412         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 413         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 414         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 415         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 416         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 417         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 418         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 419         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 420         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 421         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 422         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 423         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 424         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 425         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 426         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 427         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 428         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 429         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 430         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 431         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 432         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 433         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 434         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 435         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 436         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 437         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 438         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 439         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 440         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 441         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 442         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 443         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 444
 445 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 446
 447         * ia64-opc.c: Include sysdep.h before libiberty.h.
 448
 449 2005-05-05  Nick Clifton  <nickc@redhat.com>
 450
 451         * configure.in (ALL_LINGUAS): Add vi.
 452         * configure: Regenerate.
 453         * po/vi.po: New.
 454
 455 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 456
 457         * configure.in: Fix the check for basename declaration.
 458         * configure: Regenerate.
 459
 460 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 461
 462         * ppc-opc.c (RTO): Define.
 463         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 464         entries to suit PPC440.
 465
 466 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 467
 468         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 469         Add xcrypt-ctr.
 470
 471 2005-04-14  Nick Clifton  <nickc@redhat.com>
 472
 473         * po/fi.po: New translation: Finnish.
 474         * configure.in (ALL_LINGUAS): Add fi.
 475         * configure: Regenerate.
 476
 477 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 478
 479         * Makefile.am (NO_WERROR): Define.
 480         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 481         * Makefile.in: Regenerate.
 482         * aclocal.m4: Regenerate.
 483         * configure: Regenerate.
 484
 485 2005-04-04  Nick Clifton  <nickc@redhat.com>
 486
 487         * fr30-asm.c: Regenerate.
 488         * frv-asm.c: Regenerate.
 489         * iq2000-asm.c: Regenerate.
 490         * m32r-asm.c: Regenerate.
 491         * openrisc-asm.c: Regenerate.
 492
 493 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 494
 495         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 496         visible operands in Intel mode. The first operand of monitor is
 497         %rax in 64-bit mode.
 498
 499 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 500
 501         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 502         easier future additions.
 503
 504 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 505
 506         * configure.in: Check for basename.
 507         * configure: Regenerate.
 508         * config.in: Ditto.
 509
 510 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 511
 512         * i386-dis.c (SEG_Fixup): New.
 513         (Sv): New.
 514         (dis386): Use "Sv" for 0x8c and 0x8e.
 515
 516 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 517             Nick Clifton  <nickc@redhat.com>
 518
 519         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 520         function entry mask addresses.
 521         (entry_addr_occupied_slots): New variable: The number of occupied
 522         elements in entry_addr.
 523         (entry_addr_total_slots): New variable: The total number of
 524         elements in entry_addr.
 525         (parse_disassembler_options): New function.  Fills in the entry_addr
 526         array.
 527         (free_entry_array): New function.  Release the memory used by the
 528         entry addr array.  Suppressed because there is no way to call it.
 529         (is_function_entry): Check if a given address is a function's
 530         start address by looking at supplied entry mask addresses and
 531         symbol information, if available.
 532         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 533
 534 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 535
 536         * cris-dis.c (print_with_operands): Use ~31L for long instead
 537         of ~31.
 538
 539 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 540
 541         * mmix-opc.c (O): Revert the last change.
 542         (Z): Likewise.
 543
 544 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 545
 546         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 547         (Z): Likewise.
 548
 549 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 550
 551         * mmix-opc.c (O, Z): Force expression as unsigned long.
 552
 553 2005-03-18  Nick Clifton  <nickc@redhat.com>
 554
 555         * ip2k-asm.c: Regenerate.
 556         * op/opcodes.pot: Regenerate.
 557
 558 2005-03-16  Nick Clifton  <nickc@redhat.com>
 559             Ben Elliston  <bje@au.ibm.com>
 560
 561         * configure.in (werror): New switch: Add -Werror to the
 562         compiler command line.  Enabled by default.  Disable via
 563         --disable-werror.
 564         * configure: Regenerate.
 565
 566 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 567
 568         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 569         BOOKE.
 570
 571 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 572
 573         * po/es.po: Commit new Spanish translation.
 574
 575         * po/fr.po: Commit new French translation.
 576
 577 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 578
 579         * vax-dis.c: Fix spelling error
 580         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 581         of just "Entry mask: < r1 ... >"
 582
 583 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 584
 585         * arm-dis.c (arm_opcodes): Document %E and %V.
 586         Add entries for v6T2 ARM instructions:
 587         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 588         (print_insn_arm): Add support for %E and %V.
 589         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 590
 591 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 592             Alan Modra  <amodra@bigpond.net.au>
 593
 594         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 595         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 596         (SPRG_MASK): Delete.
 597         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 598         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 599         mfsprg4..7 after msprg and consolidate.
 600
 601 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 602
 603         * vax-dis.c (entry_mask_bit): New array.
 604         (print_insn_vax): Decode function entry mask.
 605
 606 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 607
 608         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 609
 610 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 611
 612         * po/opcodes.pot: Regenerate.
 613
 614 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 615
 616         * arc-dis.c (a4_decoding_class): New enum.
 617         (dsmOneArcInst): Use the enum values for the decoding class.
 618         Remove redundant case in the switch for decodingClass value 11.
 619
 620 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 621
 622         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 623         accesses.
 624         (OP_C): Consider lock prefix in non-64-bit modes.
 625
 626 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 627
 628         * cris-dis.c (format_hex): Remove ineffective warning fix.
 629         * crx-dis.c (make_instruction): Warning fix.
 630         * frv-asm.c: Regenerate.
 631
 632 2005-02-23  Nick Clifton  <nickc@redhat.com>
 633
 634         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 635         read_memory.
 636
 637         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 638
 639         * crx-dis.c (make_instruction): Move argument structure into inner
 640         scope and ensure that all of its fields are initialised before
 641         they are used.
 642
 643         * fr30-asm.c: Regenerate.
 644         * fr30-dis.c: Regenerate.
 645         * frv-asm.c: Regenerate.
 646         * frv-dis.c: Regenerate.
 647         * ip2k-asm.c: Regenerate.
 648         * ip2k-dis.c: Regenerate.
 649         * iq2000-asm.c: Regenerate.
 650         * iq2000-dis.c: Regenerate.
 651         * m32r-asm.c: Regenerate.
 652         * m32r-dis.c: Regenerate.
 653         * openrisc-asm.c: Regenerate.
 654         * openrisc-dis.c: Regenerate.
 655         * xstormy16-asm.c: Regenerate.
 656         * xstormy16-dis.c: Regenerate.
 657
 658 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 659
 660         * arc-ext.c: Warning fixes.
 661         * arc-ext.h: Likewise.
 662         * cgen-opc.c: Likewise.
 663         * ia64-gen.c: Likewise.
 664         * maxq-dis.c: Likewise.
 665         * ns32k-dis.c: Likewise.
 666         * w65-dis.c: Likewise.
 667         * ia64-asmtab.c: Regenerate.
 668
 669 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 670
 671         * fr30-desc.c: Regenerate.
 672         * fr30-desc.h: Regenerate.
 673         * fr30-opc.c: Regenerate.
 674         * fr30-opc.h: Regenerate.
 675         * frv-desc.c: Regenerate.
 676         * frv-desc.h: Regenerate.
 677         * frv-opc.c: Regenerate.
 678         * frv-opc.h: Regenerate.
 679         * ip2k-desc.c: Regenerate.
 680         * ip2k-desc.h: Regenerate.
 681         * ip2k-opc.c: Regenerate.
 682         * ip2k-opc.h: Regenerate.
 683         * iq2000-desc.c: Regenerate.
 684         * iq2000-desc.h: Regenerate.
 685         * iq2000-opc.c: Regenerate.
 686         * iq2000-opc.h: Regenerate.
 687         * m32r-desc.c: Regenerate.
 688         * m32r-desc.h: Regenerate.
 689         * m32r-opc.c: Regenerate.
 690         * m32r-opc.h: Regenerate.
 691         * m32r-opinst.c: Regenerate.
 692         * openrisc-desc.c: Regenerate.
 693         * openrisc-desc.h: Regenerate.
 694         * openrisc-opc.c: Regenerate.
 695         * openrisc-opc.h: Regenerate.
 696         * xstormy16-desc.c: Regenerate.
 697         * xstormy16-desc.h: Regenerate.
 698         * xstormy16-opc.c: Regenerate.
 699         * xstormy16-opc.h: Regenerate.
 700
 701 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 702
 703         * Makefile.am: Run "make dep-am"
 704         * Makefile.in: Regenerate.
 705
 706 2005-02-15  Nick Clifton  <nickc@redhat.com>
 707
 708         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 709         compile time warnings.
 710         (print_keyword): Likewise.
 711         (default_print_insn): Likewise.
 712
 713         * fr30-desc.c: Regenerated.
 714         * fr30-desc.h: Regenerated.
 715         * fr30-dis.c: Regenerated.
 716         * fr30-opc.c: Regenerated.
 717         * fr30-opc.h: Regenerated.
 718         * frv-desc.c: Regenerated.
 719         * frv-dis.c: Regenerated.
 720         * frv-opc.c: Regenerated.
 721         * ip2k-asm.c: Regenerated.
 722         * ip2k-desc.c: Regenerated.
 723         * ip2k-desc.h: Regenerated.
 724         * ip2k-dis.c: Regenerated.
 725         * ip2k-opc.c: Regenerated.
 726         * ip2k-opc.h: Regenerated.
 727         * iq2000-desc.c: Regenerated.
 728         * iq2000-dis.c: Regenerated.
 729         * iq2000-opc.c: Regenerated.
 730         * m32r-asm.c: Regenerated.
 731         * m32r-desc.c: Regenerated.
 732         * m32r-desc.h: Regenerated.
 733         * m32r-dis.c: Regenerated.
 734         * m32r-opc.c: Regenerated.
 735         * m32r-opc.h: Regenerated.
 736         * m32r-opinst.c: Regenerated.
 737         * openrisc-desc.c: Regenerated.
 738         * openrisc-desc.h: Regenerated.
 739         * openrisc-dis.c: Regenerated.
 740         * openrisc-opc.c: Regenerated.
 741         * openrisc-opc.h: Regenerated.
 742         * xstormy16-desc.c: Regenerated.
 743         * xstormy16-desc.h: Regenerated.
 744         * xstormy16-dis.c: Regenerated.
 745         * xstormy16-opc.c: Regenerated.
 746         * xstormy16-opc.h: Regenerated.
 747
 748 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 749
 750         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 751         address.
 752
 753 2005-02-11  Nick Clifton  <nickc@redhat.com>
 754
 755         * iq2000-asm.c: Regenerate.
 756
 757         * frv-dis.c: Regenerate.
 758
 759 2005-02-07  Jim Blandy  <jimb@redhat.com>
 760
 761         * Makefile.am (CGEN): Load guile.scm before calling the main
 762         application script.
 763         * Makefile.in: Regenerated.
 764         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 765         Simply pass the cgen-opc.scm path to ${cgen} as its first
 766         argument; ${cgen} itself now contains the '-s', or whatever is
 767         appropriate for the Scheme being used.
 768
 769 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 770
 771         * configure: Regenerate to track ../gettext.m4.
 772
 773 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 774
 775         * ia64-gen.c (NELEMS): Define.
 776         (shrink): Generate alias with missing second predicate register when
 777         opcode has two outputs and these are both predicates.
 778         * ia64-opc-i.c (FULL17): Define.
 779         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 780         here to generate output template.
 781         (TBITCM, TNATCM): Undefine after use.
 782         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 783         first input. Add ld16 aliases without ar.csd as second output. Add
 784         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 785         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 786         ar.ccv as third/fourth inputs. Consolidate through...
 787         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 788         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 789         * ia64-asmtab.c: Regenerate.
 790
 791 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 792
 793         * configure: Regenerate to track ../gettext.m4 change.
 794
 795 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 796
 797         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 798         * frv-asm.c: Rebuilt.
 799         * frv-desc.c: Rebuilt.
 800         * frv-desc.h: Rebuilt.
 801         * frv-dis.c: Rebuilt.
 802         * frv-ibld.c: Rebuilt.
 803         * frv-opc.c: Rebuilt.
 804         * frv-opc.h: Rebuilt.
 805
 806 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 807
 808         * configure: Regenerate, ../gettext.m4 was updated.
 809
 810 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 811
 812         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 813         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 814         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 815         * mips-dis.c: Ditto.
 816
 817 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 818
 819         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 820
 821 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 822
 823         * mips-dis.c (no_aliases): New disassembly option flag.
 824         (set_default_mips_dis_options): Init no_aliases to zero.
 825         (parse_mips_dis_option): Handle no-aliases option.
 826         (print_insn_mips): Ignore table entries that are aliases
 827         if no_aliases is set.
 828         (print_insn_mips16): Ditto.
 829         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 830         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 831         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 832         * mips16-opc.c (mips16_opcodes): Ditto.
 833
 834 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 835
 836         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 837         (inheritance diagram): Add missing edge.
 838         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 839         easier for the testsuite.
 840         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 841         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 842         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 843         arch_sh2a_or_sh4_up child.
 844         (sh_table): Do renaming as above.
 845         Correct comment for ldc.l for gas testsuite to read.
 846         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 847         Correct comments for movy.w and movy.l for gas testsuite to read.
 848         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 849
 850 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 851
 852         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 853
 854 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 855
 856         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 857
 858 2005-01-10  Andreas Schwab  <schwab@suse.de>
 859
 860         * disassemble.c (disassemble_init_for_target) <case
 861         bfd_arch_ia64>: Set skip_zeroes to 16.
 862         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 863
 864 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 865
 866         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 867
 868 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 869
 870         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 871         memory references. Convert avr_operand() to C90 formatting.
 872
 873 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 874
 875         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 876
 877 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 878
 879         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 880         (no_op_insn): Initialize array with instructions that have no
 881         operands.
 882         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 883
 884 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 885
 886         * arm-dis.c: Correct top-level comment.
 887
 888 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 889
 890         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 891         architecuture defining the insn.
 892         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 893         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 894         field.
 895         Also include opcode/arm.h.
 896         * Makefile.am (arm-dis.lo): Update dependency list.
 897         * Makefile.in: Regenerate.
 898
 899 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 900
 901         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 902         reflect the change to the short immediate syntax.
 903
 904 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 905
 906         * or32-opc.c (debug): Warning fix.
 907         * po/POTFILES.in: Regenerate.
 908
 909         * maxq-dis.c: Formatting.
 910         (print_insn): Warning fix.
 911
 912 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 913
 914         * arm-dis.c (WORD_ADDRESS): Define.
 915         (print_insn): Use it.  Correct big-endian end-of-section handling.
 916
 917 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 918             Vineet Sharma      <vineets@noida.hcltech.com>
 919
 920         * maxq-dis.c: New file.
 921         * disassemble.c (ARCH_maxq): Define.
 922         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 923         instructions..
 924         * configure.in: Add case for bfd_maxq_arch.
 925         * configure: Regenerate.
 926         * Makefile.am: Add support for maxq-dis.c
 927         * Makefile.in: Regenerate.
 928         * aclocal.m4: Regenerate.
 929
 930 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 931
 932         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 933         mode.
 934         * crx-dis.c: Likewise.
 935
 936 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 937
 938         Generally, handle CRISv32.
 939         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 940         (struct cris_disasm_data): New type.
 941         (format_reg, format_hex, cris_constraint, print_flags)
 942         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 943         callers changed.
 944         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 945         (print_insn_crisv32_without_register_prefix)
 946         (print_insn_crisv10_v32_with_register_prefix)
 947         (print_insn_crisv10_v32_without_register_prefix)
 948         (cris_parse_disassembler_options): New functions.
 949         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 950         parameter.  All callers changed.
 951         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 952         failure.
 953         (cris_constraint) <case 'Y', 'U'>: New cases.
 954         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 955         for constraint 'n'.
 956         (print_with_operands) <case 'Y'>: New case.
 957         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 958         <case 'N', 'Y', 'Q'>: New cases.
 959         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 960         (print_insn_cris_with_register_prefix)
 961         (print_insn_cris_without_register_prefix): Call
 962         cris_parse_disassembler_options.
 963         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 964         for CRISv32 and the size of immediate operands.  New v32-only
 965         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 966         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 967         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 968         Change brp to be v3..v10.
 969         (cris_support_regs): New vector.
 970         (cris_opcodes): Update head comment.  New format characters '[',
 971         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 972         Add new opcodes for v32 and adjust existing opcodes to accommodate
 973         differences to earlier variants.
 974         (cris_cond15s): New vector.
 975
 976 2004-11-04 Jan Beulich <jbeulich@novell.com>
 977
 978         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 979         (indirEb): Remove.
 980         (Mp): Use f_mode rather than none at all.
 981         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 982         replaces what previously was x_mode; x_mode now means 128-bit SSE
 983         operands.
 984         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 985         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 986         pinsrw's second operand is Edqw.
 987         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 988         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 989         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 990         mode when an operand size override is present or always suffixing.
 991         More instructions will need to be added to this group.
 992         (putop): Handle new macro chars 'C' (short/long suffix selector),
 993         'I' (Intel mode override for following macro char), and 'J' (for
 994         adding the 'l' prefix to far branches in AT&T mode). When an
 995         alternative was specified in the template, honor macro character when
 996         specified for Intel mode.
 997         (OP_E): Handle new *_mode values. Correct pointer specifications for
 998         memory operands. Consolidate output of index register.
 999         (OP_G): Handle new *_mode values.
1000         (OP_I): Handle const_1_mode.
1001         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1002         respective opcode prefix bits have been consumed.
1003         (OP_EM, OP_EX): Provide some default handling for generating pointer
1004         specifications.
1005
1006 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1007
1008         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1009         COP_INST macro.
1010
1011 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1012
1013         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1014         (getregliststring): Support HI/LO and user registers.
1015         * crx-opc.c (crx_instruction): Update data structure according to the
1016         rearrangement done in CRX opcode header file.
1017         (crx_regtab):  Likewise.
1018         (crx_optab):  Likewise.
1019         (crx_instruction): Reorder load/stor instructions, remove unsupported
1020         formats.
1021         support new Co-Processor instruction 'cpi'.
1022
1023 2004-10-27  Nick Clifton  <nickc@redhat.com>
1024
1025         * opcodes/iq2000-asm.c: Regenerate.
1026         * opcodes/iq2000-desc.c: Regenerate.
1027         * opcodes/iq2000-desc.h: Regenerate.
1028         * opcodes/iq2000-dis.c: Regenerate.
1029         * opcodes/iq2000-ibld.c: Regenerate.
1030         * opcodes/iq2000-opc.c: Regenerate.
1031         * opcodes/iq2000-opc.h: Regenerate.
1032
1033 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1034
1035         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1036         us4, us5 (respectively).
1037         Remove unsupported 'popa' instruction.
1038         Reverse operands order in store co-processor instructions.
1039
1040 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1041
1042         * Makefile.am: Run "make dep-am"
1043         * Makefile.in: Regenerate.
1044
1045 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1046
1047         * xtensa-dis.c: Use ISO C90 formatting.
1048
1049 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1050
1051         * ppc-opc.c: Revert 2004-09-09 change.
1052
1053 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1054
1055         * xtensa-dis.c (state_names): Delete.
1056         (fetch_data): Use xtensa_isa_maxlength.
1057         (print_xtensa_operand): Replace operand parameter with opcode/operand
1058         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1059         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1060         instruction bundles.  Use xmalloc instead of malloc.
1061
1062 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1063
1064         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1065         initializers.
1066
1067 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1068
1069         * crx-opc.c (crx_instruction): Support Co-processor insns.
1070         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1071         (getregliststring): Change function to use the above enum.
1072         (print_arg): Handle CO-Processor insns.
1073         (crx_cinvs): Add 'b' option to invalidate the branch-target
1074         cache.
1075
1076 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1077
1078         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1079         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1080         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1081         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1082         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1083
1084 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1085
1086         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1087         rather than add it.
1088
1089 2004-09-30  Paul Brook  <paul@codesourcery.com>
1090
1091         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1092         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1093
1094 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1095
1096         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1097         (CONFIG_STATUS_DEPENDENCIES): New.
1098         (Makefile): Removed.
1099         (config.status): Likewise.
1100         * Makefile.in: Regenerated.
1101
1102 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1103
1104         * Makefile.am: Run "make dep-am".
1105         * Makefile.in: Regenerate.
1106         * aclocal.m4: Regenerate.
1107         * configure: Regenerate.
1108         * po/POTFILES.in: Regenerate.
1109         * po/opcodes.pot: Regenerate.
1110
1111 2004-09-11  Andreas Schwab  <schwab@suse.de>
1112
1113         * configure: Rebuild.
1114
1115 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1116
1117         * ppc-opc.c (L): Make this field not optional.
1118
1119 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1120
1121         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1122         Fix parameter to 'm[t|f]csr' insns.
1123
1124 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1125
1126         * configure.in: Autoupdate to autoconf 2.59.
1127         * aclocal.m4: Rebuild with aclocal 1.4p6.
1128         * configure: Rebuild with autoconf 2.59.
1129         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1130         bfd changes for autoconf 2.59 on the way).
1131         * config.in: Rebuild with autoheader 2.59.
1132
1133 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1134
1135         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1136
1137 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1138
1139         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1140         (GRPPADLCK2): New define.
1141         (twobyte_has_modrm): True for 0xA6.
1142         (grps): GRPPADLCK2 for opcode 0xA6.
1143
1144 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1145
1146         Introduce SH2a support.
1147         * sh-opc.h (arch_sh2a_base): Renumber.
1148         (arch_sh2a_nofpu_base): Remove.
1149         (arch_sh_base_mask): Adjust.
1150         (arch_opann_mask): New.
1151         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1152         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1153         (sh_table): Adjust whitespace.
1154         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1155         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1156         instruction list throughout.
1157         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1158         of arch_sh2a in instruction list throughout.
1159         (arch_sh2e_up): Accomodate above changes.
1160         (arch_sh2_up): Ditto.
1161         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1162         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1163         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1164         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1165         * sh-opc.h (arch_sh2a_nofpu): New.
1166         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1167         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1168         instruction.
1169         2004-01-20  DJ Delorie  <dj@redhat.com>
1170         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1171         2003-12-29  DJ Delorie  <dj@redhat.com>
1172         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1173         sh_opcode_info, sh_table): Add sh2a support.
1174         (arch_op32): New, to tag 32-bit opcodes.
1175         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1176         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1177         * sh-opc.h (arch_sh2a): Add.
1178         * sh-dis.c (arch_sh2a): Handle.
1179         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1180
1181 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1182
1183         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1184
1185 2004-07-22  Nick Clifton  <nickc@redhat.com>
1186
1187         PR/280
1188         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1189         insns - this is done by objdump itself.
1190         * h8500-dis.c (print_insn_h8500): Likewise.
1191
1192 2004-07-21  Jan Beulich <jbeulich@novell.com>
1193
1194         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1195         regardless of address size prefix in effect.
1196         (ptr_reg): Size or address registers does not depend on rex64, but
1197         on the presence of an address size override.
1198         (OP_MMX): Use rex.x only for xmm registers.
1199         (OP_EM): Use rex.z only for xmm registers.
1200
1201 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1202
1203         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1204         move/branch operations to the bottom so that VR5400 multimedia
1205         instructions take precedence in disassembly.
1206
1207 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1208
1209         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1210         ISA-specific "break" encoding.
1211
1212 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1213
1214         * arm-opc.h: Fix typo in comment.
1215
1216 2004-07-11  Andreas Schwab  <schwab@suse.de>
1217
1218         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1219
1220 2004-07-09  Andreas Schwab  <schwab@suse.de>
1221
1222         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1223
1224 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1225
1226         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1227         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1228         (crx-dis.lo): New target.
1229         (crx-opc.lo): Likewise.
1230         * Makefile.in: Regenerate.
1231         * configure.in: Handle bfd_crx_arch.
1232         * configure: Regenerate.
1233         * crx-dis.c: New file.
1234         * crx-opc.c: New file.
1235         * disassemble.c (ARCH_crx): Define.
1236         (disassembler): Handle ARCH_crx.
1237
1238 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1239
1240         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1241         * ia64-asmtab.c: Regnerate.
1242
1243 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1244
1245         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1246         (extract_fxm): Don't test dialect.
1247         (XFXFXM_MASK): Include the power4 bit.
1248         (XFXM): Add p4 param.
1249         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1250
1251 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1252
1253         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1254         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1255
1256 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1257
1258         * ppc-opc.c (BH, XLBH_MASK): Define.
1259         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1260
1261 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1262
1263         * i386-dis.c (x_mode): Comment.
1264         (two_source_ops): File scope.
1265         (float_mem): Correct fisttpll and fistpll.
1266         (float_mem_mode): New table.
1267         (dofloat): Use it.
1268         (OP_E): Correct intel mode PTR output.
1269         (ptr_reg): Use open_char and close_char.
1270         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1271         operands.  Set two_source_ops.
1272
1273 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1274
1275         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1276         instead of _raw_size.
1277
1278 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1279
1280         * ia64-gen.c (in_iclass): Handle more postinc st
1281         and ld variants.
1282         * ia64-asmtab.c: Rebuilt.
1283
1284 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1285
1286         * s390-opc.txt: Correct architecture mask for some opcodes.
1287         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1288         in the esa mode as well.
1289
1290 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1291
1292         * sh-dis.c (target_arch): Make unsigned.
1293         (print_insn_sh): Replace (most of) switch with a call to
1294         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1295         * sh-opc.h: Redefine architecture flags values.
1296         Add sh3-nommu architecture.
1297         Reorganise <arch>_up macros so they make more visual sense.
1298         (SH_MERGE_ARCH_SET): Define new macro.
1299         (SH_VALID_BASE_ARCH_SET): Likewise.
1300         (SH_VALID_MMU_ARCH_SET): Likewise.
1301         (SH_VALID_CO_ARCH_SET): Likewise.
1302         (SH_VALID_ARCH_SET): Likewise.
1303         (SH_MERGE_ARCH_SET_VALID): Likewise.
1304         (SH_ARCH_SET_HAS_FPU): Likewise.
1305         (SH_ARCH_SET_HAS_DSP): Likewise.
1306         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1307         (sh_get_arch_from_bfd_mach): Add prototype.
1308         (sh_get_arch_up_from_bfd_mach): Likewise.
1309         (sh_get_bfd_mach_from_arch_set): Likewise.
1310         (sh_merge_bfd_arc): Likewise.
1311
1312 2004-05-24  Peter Barada  <peter@the-baradas.com>
1313
1314         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1315         into new match_insn_m68k function.  Loop over canidate
1316         matches and select first that completely matches.
1317         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1318         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1319         to verify addressing for MAC/EMAC.
1320         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1321         reigster halves since 'fpu' and 'spl' look misleading.
1322         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1323         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1324         first, tighten up match masks.
1325         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1326         'size' from special case code in print_insn_m68k to
1327         determine decode size of insns.
1328
1329 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1330
1331         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1332         well as when -mpower4.
1333
1334 2004-05-13  Nick Clifton  <nickc@redhat.com>
1335
1336         * po/fr.po: Updated French translation.
1337
1338 2004-05-05  Peter Barada  <peter@the-baradas.com>
1339
1340         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1341         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1342         * m68k-op.c: Switch from ColdFire chips to core variants.
1343
1344 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1345
1346         PR 147.
1347         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1348
1349 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1350
1351         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1352         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1353
1354 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1355
1356         * sh-dis.c (print_insn_sh): Print the value in constant pool
1357         as a symbol if it looks like a symbol.
1358
1359 2004-04-22  Peter Barada <peter@the-baradas.com>
1360
1361         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1362         appropriate ColdFire architectures.
1363         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1364         mask addressing.
1365         Add EMAC instructions, fix MAC instructions. Remove
1366         macmw/macml/msacmw/msacml instructions since mask addressing now
1367         supported.
1368
1369 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1370
1371         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1372         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1373         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1374         macro.  Adjust all users.
1375
1376 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1377
1378         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1379         separately.
1380
1381 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1382
1383         * m32r-asm.c: Regenerate.
1384
1385 2004-03-29  Stan Shebs  <shebs@apple.com>
1386
1387         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1388         used.
1389
1390 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1391
1392         * aclocal.m4: Regenerate.
1393         * config.in: Regenerate.
1394         * configure: Regenerate.
1395         * po/POTFILES.in: Regenerate.
1396         * po/opcodes.pot: Regenerate.
1397
1398 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1399
1400         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1401         PPC_OPERANDS_GPR_0.
1402         * ppc-opc.c (RA0): Define.
1403         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1404         (RAOPT): Rename from RAO.  Update all uses.
1405         (powerpc_opcodes): Use RA0 as appropriate.
1406
1407 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1408
1409         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1410
1411 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1412
1413         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1414
1415 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1416
1417         * i386-dis.c (GRPPLOCK): Delete.
1418         (grps): Delete GRPPLOCK entry.
1419
1420 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1421
1422         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1423         (M, Mp): Use OP_M.
1424         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1425         (GRPPADLCK): Define.
1426         (dis386): Use NOP_Fixup on "nop".
1427         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1428         (twobyte_has_modrm): Set for 0xa7.
1429         (padlock_table): Delete.  Move to..
1430         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1431         and clflush.
1432         (print_insn): Revert PADLOCK_SPECIAL code.
1433         (OP_E): Delete sfence, lfence, mfence checks.
1434
1435 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1436
1437         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1438         (INVLPG_Fixup): New function.
1439         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1440
1441 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1442
1443         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1444         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1445         (padlock_table): New struct with PadLock instructions.
1446         (print_insn): Handle PADLOCK_SPECIAL.
1447
1448 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1449
1450         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1451         (OP_E): Twiddle clflush to sfence here.
1452
1453 2004-03-08  Nick Clifton  <nickc@redhat.com>
1454
1455         * po/de.po: Updated German translation.
1456
1457 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1458
1459         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1460         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1461         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1462         accordingly.
1463
1464 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1465
1466         * frv-asm.c: Regenerate.
1467         * frv-desc.c: Regenerate.
1468         * frv-desc.h: Regenerate.
1469         * frv-dis.c: Regenerate.
1470         * frv-ibld.c: Regenerate.
1471         * frv-opc.c: Regenerate.
1472         * frv-opc.h: Regenerate.
1473
1474 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1475
1476         * frv-desc.c, frv-opc.c: Regenerate.
1477
1478 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1479
1480         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1481
1482 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1483
1484         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1485         Also correct mistake in the comment.
1486
1487 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1488
1489         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1490         ensure that double registers have even numbers.
1491         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1492         that reserved instruction 0xfffd does not decode the same
1493         as 0xfdfd (ftrv).
1494         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1495         REG_N refers to a double register.
1496         Add REG_N_B01 nibble type and use it instead of REG_NM
1497         in ftrv.
1498         Adjust the bit patterns in a few comments.
1499
1500 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1501
1502         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1503
1504 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1505
1506         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1507
1508 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1509
1510         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1511
1512 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1513
1514         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1515         mtivor32, mtivor33, mtivor34.
1516
1517 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1518
1519         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1520
1521 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1522
1523         * arm-opc.h Maverick accumulator register opcode fixes.
1524
1525 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1526
1527         * m32r-dis.c: Regenerate.
1528
1529 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1530
1531         * sh-opc.h (sh_table): "fsrra", not "fssra".
1532
1533 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1534
1535         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1536         contraints.
1537
1538 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1539
1540         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1541
1542 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1543
1544         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1545         1.  Don't print scale factor on AT&T mode when index missing.
1546
1547 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1548
1549         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1550         when loaded into XR registers.
1551
1552 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1553
1554         * frv-desc.h: Regenerate.
1555         * frv-desc.c: Regenerate.
1556         * frv-opc.c: Regenerate.
1557
1558 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1559
1560         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1561
1562 2004-01-09  Paul Brook  <paul@codesourcery.com>
1563
1564         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1565         specific opcodes.
1566
1567 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1568
1569         * Makefile.am (libopcodes_la_DEPENDENCIES)
1570         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1571         comment about the problem.
1572         * Makefile.in: Regenerate.
1573
1574 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1575
1576         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1577         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1578         cut&paste errors in shifting/truncating numerical operands.
1579         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1580         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1581         (parse_uslo16): Likewise.
1582         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1583         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1584         (parse_s12): Likewise.
1585         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1586         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1587         (parse_uslo16): Likewise.
1588         (parse_uhi16): Parse gothi and gotfuncdeschi.
1589         (parse_d12): Parse got12 and gotfuncdesc12.
1590         (parse_s12): Likewise.
1591
1592 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1593
1594         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1595         instruction which looks similar to an 'rla' instruction.
1596
1597 For older changes see ChangeLog-0203
1598 \f
1599 Local Variables:
1600 mode: change-log
1601 left-margin: 8
1602 fill-column: 74
1603 version-control: never
1604 End: