opcodes/ChangeLog

   1 2012-11-09  Nick Clifton  <nickc@redhat.com>
   2
   3         * configure.in: Add bfd_v850_rh850_arch.
   4         * configure: Regenerate.
   5         * disassemble.c (disassembler): Likewise.
   6
   7 2012-11-09  H.J. Lu  <hongjiu.lu@intel.com>
   8
   9         * aarch64-opc.h (gen_mask): Remove trailing redundant `;'.
  10         * ia64-gen.c (fetch_insn_class): Likewise.
  11
  12 2012-11-08  Alan Modra  <amodra@gmail.com>
  13
  14         * po/POTFILES.in: Regenerate.
  15
  16 2012-11-05  Alan Modra  <amodra@gmail.com>
  17
  18         * configure.in: Apply 2012-09-10 change to config.in here.
  19
  20 2012-10-26  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  21
  22         * s390-mkopc.c: Accept empty lines in s390-opc.txt.
  23         * s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2
  24         and RRF_RMRR.
  25         * s390-opc.txt: Add new instructions.  New instruction type for lptea.
  26
  27 2012-10-26  Christian Groessler  <chris@groessler.org>
  28
  29         * z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
  30         trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb).  Remove
  31         non-existing opcode trtrb.
  32         * z8k-opc.h: Regenerate.
  33
  34 2012-10-26  Alan Modra  <amodra@gmail.com>
  35
  36         * ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset.
  37
  38 2012-10-24  Roland McGrath  <mcgrathr@google.com>
  39
  40         * i386-dis.c (ckprefix): When bailing out for fwait with prefixes,
  41         set rex_used to rex.
  42
  43 2012-10-22  Peter Bergner  <bergner@vnet.ibm.com>
  44
  45         * ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling.
  46
  47 2012-10-18  Tom Tromey  <tromey@redhat.com>
  48
  49         * tic54x-dis.c (print_instruction): Don't use K&R style.
  50         (print_parallel_instruction, sprint_dual_address)
  51         (sprint_indirect_address, sprint_direct_address, sprint_mmr)
  52         (sprint_cc2, sprint_condition): Likewise.
  53
  54 2012-10-18  Kai Tietz  <ktietz@redhat.com>
  55
  56         * aarch64-asm.c (aarch64_ins_ldst_reglist): Initialize
  57         value with a default.
  58         (do_special_encoding): Likewise.
  59         (aarch64_ins_ldst_elemlist): Pre-initialize QSsize, and opcodeh2
  60         variables with default.
  61         * arc-dis.c (write_comments_): Don't use strncat due
  62         size of state->commentBuffer pointer isn't predictable.
  63
  64 2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
  65
  66         * aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
  67         rmr_el3; remove daifset and daifclr.
  68
  69 2012-10-15  Yufeng Zhang  <yufeng.zhang@arm.com>
  70
  71         * aarch64-opc.c (operand_general_constraint_met_p): Change to check
  72         the alignment of addr.offset.imm instead of that of shifter.amount for
  73         operand type AARCH64_OPND_ADDR_UIMM12.
  74
  75 2012-10-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  76
  77         * arm-dis.c: Use preferred form of vrint instruction variants
  78         for disassembly.
  79
  80 2012-10-09  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
  81
  82         * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
  83         * i386-init.h: Regenerated.
  84
  85 2012-10-05  Peter Bergner  <bergner@vnet.ibm.com>
  86
  87         * ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2;
  88         * ppc-opc.c (VBA): New define.
  89         (powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot,
  90         mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics.
  91
  92 2012-10-04  Nick Clifton  <nickc@redhat.com>
  93
  94         * v850-dis.c (disassemble): Place square parentheses around second
  95         register operand of clr1, not1, set1 and tst1 instructions.
  96
  97 2012-10-04  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  98
  99         * s390-mkopc.c: Support new option zEC12.
 100         * s390-opc.c: Add new instruction formats.
 101         * s390-opc.txt: Add new instructions for zEC12.
 102
 103 2012-09-27  Anthony Green  <green@moxielogic.com>
 104
 105         * moxie-dis.c (print_insn_moxie): Print 'bad' instructions.
 106         * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD.
 107
 108 2012-09-25  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 109
 110         * i386-gen.c (cpu_flag_init): Add missing Cpu flags in
 111         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS
 112         and CPU_BTVER2_FLAGS.
 113         * i386-init.h: Regenerated.
 114
 115 2012-09-20  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 116
 117         * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
 118         CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
 119         CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
 120         CPU_BTVER2_FLAGS.  Add CPU_CX16_FLAGS.
 121         (cpu_flags): Add CpuCX16.
 122         * i386-opc.h (CpuCX16): New.
 123         (i386_cpu_flags): Add cpucx16.
 124         * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
 125         * i386-tbl.h: Regenerate.
 126         * i386-init.h: Likewise.
 127
 128 2012-09-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 129
 130         * arm-dis.c: Changed ldra and strl-form mnemonics
 131         to lda and stl-form.
 132
 133 2012-09-18  Chao-ying Fu  <fu@mips.com>
 134
 135         * micromips-opc.c (micromips_opcodes): Correct the encoding of
 136         the "swxc1" instruction.
 137
 138 2012-09-17  Yufeng Zhang  <yufeng.zhang@arm.com>
 139
 140         * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from
 141         the parameter 'inst'.
 142         (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'.
 143         (convert_mov_to_movewide): Change to assert (0) when
 144         aarch64_wide_constant_p returns FALSE.
 145
 146 2012-09-14  David Edelsohn  <dje.gcc@gmail.com>
 147
 148         * configure: Regenerate.
 149
 150 2012-09-14  Anthony Green  <green@moxielogic.com>
 151
 152         * moxie-dis.c (print_insn_moxie): Branch targets are relative to
 153         the address after the branch instruction.
 154
 155 2012-09-13  Anthony Green  <green@moxielogic.com>
 156
 157         * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings.
 158
 159 2012-09-10  Matthias Klose  <doko@ubuntu.com>
 160
 161         * config.in: Disable sanity check for kfreebsd.
 162
 163 2012-09-10  H.J. Lu  <hongjiu.lu@intel.com>
 164
 165         * configure: Regenerated.
 166
 167 2012-09-04  Sergey A. Guriev <sergey.a.guriev@intel.com>
 168
 169         * ia64-asmtab.h (completer_index): Extend bitfield to full uint.
 170         * ia64-gen.c: Promote completer index type to longlong.
 171         (irf_operand): Add new register recognition.
 172         (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
 173         (lookup_specifier): Add new resource recognition.
 174         (insert_bit_table_ent): Relax abort condition according to the
 175         changed completer index type.
 176         (print_dis_table): Fix printf format for completer index.
 177         * ia64-ic.tbl: Add a new instruction class.
 178         * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
 179         * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
 180         * ia64-opc.h: Define short names for new operand types.
 181         * ia64-raw.tbl: Add new RAW resource for DAHR register.
 182         * ia64-waw.tbl: Add new WAW resource for DAHR register.
 183         * ia64-asmtab.c: Regenerate.
 184
 185 2012-08-29  Peter Bergner  <bergner@vnet.ibm.com>
 186
 187         * ppc-opc.c (VXASHB_MASK): New define.
 188         (powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
 189
 190 2012-08-28  Peter Bergner  <bergner@vnet.ibm.com>
 191
 192         * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,
 193         VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines.
 194         (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip,
 195         vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb,
 196         vupklsh>: Use VXVA_MASK.
 197         <vspltisb, vspltish, vspltisw>: Use VXVB_MASK.
 198         <mfvscr>: Use VXVAVB_MASK.
 199         <mtvscr>: Use VXVDVA_MASK.
 200         <vspltb>: Use VXUIMM4_MASK.
 201         <vsplth>: Use VXUIMM3_MASK.
 202         <vspltw>: Use VXUIMM2_MASK.
 203
 204 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 205
 206         * arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
 207
 208 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 209
 210         * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
 211
 212 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 213
 214         * arm-dis.c (neon_opcodes): Handle VMULL.P64.
 215
 216 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 217
 218         * arm-dis.c (neon_opcodes): Add support for AES instructions.
 219
 220 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 221
 222         * arm-dis.c (coprocessor_opcodes): Add support for HP/DP
 223         conversions.
 224
 225 2012-08-24  Matthew  Gretton-Dann  <matthew.gretton-dann@arm.com>
 226
 227         * arm-dis.c (coprocessor_opcodes): Add VRINT.
 228         (neon_opcodes): Likewise.
 229
 230 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 231
 232         * arm-dis.c (coprocessor_opcodes): Add support for new VCVT
 233         variants.
 234         (neon_opcodes): Likewise.
 235
 236 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 237
 238         * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
 239         (neon_opcodes): Likewise.
 240
 241 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 242
 243         * arm-dis.c (coprocessor_opcodes): Add VSEL.
 244         (print_insn_coprocessor): Add new %<>c bitfield format
 245         specifier.
 246
 247 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 248
 249         * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
 250         (thumb32_opcodes): Likewise.
 251         (print_arm_insn): Add support for %<>T formatter.
 252
 253 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 254
 255         * arm-dis.c (arm_opcodes): Add HLT.
 256         (thumb_opcodes): Likewise.
 257
 258 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 259
 260         * arm-dis.c (thumb32_opcodes): Add DCPS instruction.
 261
 262 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 263
 264         * arm-dis.c (arm_opcodes): Add SEVL.
 265         (thumb_opcodes): Likewise.
 266         (thumb32_opcodes): Likewise.
 267
 268 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 269
 270         * arm-dis.c (data_barrier_option): New function.
 271         (print_insn_arm): Use data_barrier_option.
 272         (print_insn_thumb32): Use data_barrier_option.
 273
 274 2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
 275
 276         * arm-dis.c (COND_UNCOND): New constant.
 277         (print_insn_coprocessor): Add support for %u format specifier.
 278         (print_insn_neon): Likewise.
 279
 280 2012-08-21  David S. Miller  <davem@davemloft.net>
 281
 282         * sparc-opc.c (4-argument crypto instructions): Fix encoding using
 283         F3F4 macro.
 284
 285 2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
 286
 287         * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
 288         vabsduh, vabsduw, mviwsplt.
 289
 290 2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
 291
 292         * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
 293         CPU_BTVER2_FLAGS.
 294
 295         * i386-opc.h: Update CpuPRFCHW comment.
 296
 297         * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
 298         * i386-init.h: Regenerated.
 299         * i386-tbl.h: Likewise.
 300
 301 2012-08-17  Nick Clifton  <nickc@redhat.com>
 302
 303         * po/uk.po: New Ukranian translation.
 304         * configure.in (ALL_LINGUAS): Add uk.
 305         * configure: Regenerate.
 306
 307 2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
 308
 309         * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
 310         RBX for the third operand.
 311         <"lswi">: Use RAX for second and NBI for the third operand.
 312
 313 2012-08-15  DJ Delorie  <dj@redhat.com>
 314
 315         * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
 316         operands, so that data addresses can be corrected when not
 317         ES-overridden.
 318         * rl78-decode.c: Regenerate.
 319         * rl78-dis.c (print_insn_rl78): Make order of modifiers
 320         irrelevent.  When the 'e' specifier is used on an operand and no
 321         ES prefix is provided, adjust address to make it absolute.
 322
 323 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 324
 325         * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
 326
 327 2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
 328
 329         * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
 330
 331 2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
 332
 333         * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
 334         macros, use local variables for info struct member accesses,
 335         update the type of the variable used to hold the instruction
 336         word.
 337         (print_insn_mips, print_mips16_insn_arg): Likewise.
 338         (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
 339         local variables for info struct member accesses.
 340         (print_insn_micromips): Add GET_OP_S local macro.
 341         (_print_insn_mips): Update the type of the variable used to hold
 342         the instruction word.
 343
 344 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
 345             Laurent Desnogues  <laurent.desnogues@arm.com>
 346             Jim MacArthur  <jim.macarthur@arm.com>
 347             Marcus Shawcroft  <marcus.shawcroft@arm.com>
 348             Nigel Stephens  <nigel.stephens@arm.com>
 349             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
 350             Richard Earnshaw  <rearnsha@arm.com>
 351             Sofiane Naci  <sofiane.naci@arm.com>
 352             Tejas Belagod  <tejas.belagod@arm.com>
 353             Yufeng Zhang  <yufeng.zhang@arm.com>
 354
 355         * Makefile.am: Add AArch64.
 356         * Makefile.in: Regenerate.
 357         * aarch64-asm.c: New file.
 358         * aarch64-asm.h: New file.
 359         * aarch64-dis.c: New file.
 360         * aarch64-dis.h: New file.
 361         * aarch64-gen.c: New file.
 362         * aarch64-opc.c: New file.
 363         * aarch64-opc.h: New file.
 364         * aarch64-tbl.h: New file.
 365         * configure.in: Add AArch64.
 366         * configure: Regenerate.
 367         * disassemble.c: Add AArch64.
 368         * aarch64-asm-2.c: New file (automatically generated).
 369         * aarch64-dis-2.c: New file (automatically generated).
 370         * aarch64-opc-2.c: New file (automatically generated).
 371         * po/POTFILES.in: Regenerate.
 372
 373 2012-08-13  Maciej W. Rozycki  <macro@codesourcery.com>
 374
 375         * micromips-opc.c (micromips_opcodes): Update comment.
 376         * mips-opc.c (mips_builtin_opcodes): Likewise.  Mark coprocessor
 377         instructions for IOCT as appropriate.
 378         * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
 379         opcode_is_member.
 380         * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
 381         the result of a check for the -Wno-missing-field-initializers
 382         GCC option.
 383         * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
 384         (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
 385         compilation.
 386         (mips16-opc.lo): Likewise.
 387         (micromips-opc.lo): Likewise.
 388         * aclocal.m4: Regenerate.
 389         * configure: Regenerate.
 390         * Makefile.in: Regenerate.
 391
 392 2012-08-11  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 393
 394         PR gas/14423
 395         * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
 396         * i386-init.h: Regenerated.
 397
 398 2012-08-09  Nick Clifton  <nickc@redhat.com>
 399
 400         * po/vi.po: Updated Vietnamese translation.
 401
 402 2012-08-07  Roland McGrath  <mcgrathr@google.com>
 403
 404         * i386-dis.c (reg_table): Fill out REG_0F0D table with
 405         AMD-reserved cases as "prefetch".
 406         (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
 407         (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
 408         (reg_table): Use those under REG_0F18.
 409         (mod_table): Add those cases as "nop/reserved".
 410
 411 2012-08-07  Jan Beulich <jbeulich@suse.com>
 412
 413         * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
 414
 415 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 416
 417         * i386-dis.c (print_insn): Print spaces between multiple excess
 418         prefixes.  Return actual number of excess prefixes consumed,
 419         not always one.
 420
 421         * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
 422
 423 2012-08-06  Roland McGrath  <mcgrathr@google.com>
 424             Victor Khimenko  <khim@google.com>
 425             H.J. Lu  <hongjiu.lu@intel.com>
 426
 427         * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
 428         (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
 429         (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
 430         (OP_E_register): Likewise.
 431         (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
 432
 433 2012-08-02  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 434
 435         * configure.in: Formatting.
 436         * configure: Regenerate.
 437
 438 2012-08-01  Alan Modra  <amodra@gmail.com>
 439
 440         * h8300-dis.c: Fix printf arg warnings.
 441         * i960-dis.c: Likewise.
 442         * mips-dis.c: Likewise.
 443         * pdp11-dis.c: Likewise.
 444         * sh-dis.c: Likewise.
 445         * v850-dis.c: Likewise.
 446         * configure.in: Formatting.
 447         * configure: Regenerate.
 448         * rl78-decode.c: Regenerate.
 449         * po/POTFILES.in: Regenerate.
 450
 451 2012-07-31  Chao-Ying Fu  <fu@mips.com>
 452             Catherine Moore  <clm@codesourcery.com>
 453             Maciej W. Rozycki  <macro@codesourcery.com>
 454
 455         * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 456         (DSP_VOLA): Likewise.
 457         (D32, D33): Likewise.
 458         (micromips_opcodes): Add DSP ASE instructions.
 459         * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
 460         <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
 461
 462 2012-07-31  Jan Beulich <jbeulich@suse.com>
 463
 464         * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
 465         instruction group. Mark as requiring AVX2.
 466         * i386-tbl.h: Re-generate.
 467
 468 2012-07-30  Nick Clifton  <nickc@redhat.com>
 469
 470         * po/opcodes.pot: Updated template.
 471         * po/es.po: Updated Spanish translation.
 472         * po/fi.po: Updated Finnish translation.
 473
 474 2012-07-27  Mike Frysinger  <vapier@gentoo.org>
 475
 476         * configure.in (BFD_VERSION): Run bfd/configure --version and
 477         parse the output of that.
 478         * configure: Regenerate.
 479
 480 2012-07-25  James Lemke  <jwlemke@codesourcery.com>
 481
 482         * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
 483
 484 2012-07-24  Stephan McCamant  <smcc@cs.berkeley.edu>
 485             Dr David Alan Gilbert  <dave@treblig.org>
 486
 487         PR binutils/13135
 488         * arm-dis.c: Add necessary casts for printing integer values.
 489         Use %s when printing string values.
 490         * hppa-dis.c: Likewise.
 491         * m68k-dis.c: Likewise.
 492         * microblaze-dis.c: Likewise.
 493         * mips-dis.c: Likewise.
 494         * sparc-dis.c: Likewise.
 495
 496 2012-07-19  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 497
 498         PR binutils/14355
 499         * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
 500         (VEX_LEN_0FXOP_08_CD): Likewise.
 501         (VEX_LEN_0FXOP_08_CE): Likewise.
 502         (VEX_LEN_0FXOP_08_CF): Likewise.
 503         (VEX_LEN_0FXOP_08_EC): Likewise.
 504         (VEX_LEN_0FXOP_08_ED): Likewise.
 505         (VEX_LEN_0FXOP_08_EE): Likewise.
 506         (VEX_LEN_0FXOP_08_EF): Likewise.
 507         (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
 508         vpcomub, vpcomuw, vpcomud, vpcomuq.
 509         (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
 510         VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
 511         VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
 512         VEX_LEN_0FXOP_08_EF.
 513
 514 2012-07-16  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 515
 516         * i386-dis.c (PREFIX_0F38F6): New.
 517         (prefix_table): Add adcx, adox instructions.
 518         (three_byte_table): Use PREFIX_0F38F6.
 519         (mod_table): Add rdseed instruction.
 520         * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
 521         (cpu_flags): Likewise.
 522         * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
 523         (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
 524         * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
 525         prefetchw.
 526         * i386-tbl.h: Regenerate.
 527         * i386-init.h: Likewise.
 528
 529 2012-07-05  Thomas Schwinge  <thomas@codesourcery.com>
 530
 531         * mips-dis.c: Remove gratuitous newline.
 532
 533 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 534
 535         * xgate-dis.c: Removed an IF statement that will
 536         always be false due to overlapping operand masks.
 537         * xgate-opc.c: Corrected 'com' opcode entry and
 538         fixed spacing.
 539
 540 2012-07-02  Roland McGrath  <mcgrathr@google.com>
 541
 542         * i386-opc.tbl: Add RepPrefixOk to nop.
 543         * i386-tbl.h: Regenerate.
 544
 545 2012-06-28  Nick Clifton  <nickc@redhat.com>
 546
 547         * po/vi.po: Updated Vietnamese translation.
 548
 549 2012-06-22  Roland McGrath  <mcgrathr@google.com>
 550
 551         * i386-opc.tbl: Add RepPrefixOk to ret.
 552         * i386-tbl.h: Regenerate.
 553
 554         * i386-opc.h (RepPrefixOk): New enum constant.
 555         (i386_opcode_modifier): New bitfield 'repprefixok'.
 556         * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
 557         * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
 558         instructions that have IsString.
 559         * i386-tbl.h: Regenerate.
 560
 561 2012-06-11  Andreas Schwab  <schwab@linux-m68k.org>
 562
 563         * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
 564         (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
 565         (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
 566         (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
 567         (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
 568         (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
 569         (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
 570         (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
 571         (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
 572
 573 2012-05-19  Alan Modra  <amodra@gmail.com>
 574
 575         * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
 576         (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
 577
 578 2012-05-18  Alan Modra  <amodra@gmail.com>
 579
 580         * ia64-opc.c: Remove #include "ansidecl.h".
 581         * z8kgen.c: Include sysdep.h first.
 582
 583         * arc-dis.c: Include sysdep.h first, remove some redundant includes.
 584         * bfin-dis.c: Likewise.
 585         * i860-dis.c: Likewise.
 586         * ia64-dis.c: Likewise.
 587         * ia64-gen.c: Likewise.
 588         * m68hc11-dis.c: Likewise.
 589         * mmix-dis.c: Likewise.
 590         * msp430-dis.c: Likewise.
 591         * or32-dis.c: Likewise.
 592         * rl78-dis.c: Likewise.
 593         * rx-dis.c: Likewise.
 594         * tic4x-dis.c: Likewise.
 595         * tilegx-opc.c: Likewise.
 596         * tilepro-opc.c: Likewise.
 597         * rx-decode.c: Regenerate.
 598
 599 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 600
 601         * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
 602
 603 2012-05-17  James Lemke  <jwlemke@codesourcery.com>
 604
 605         * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
 606
 607 2012-05-17  Daniel Richard G.  <skunk@iskunk.org>
 608             Nick Clifton  <nickc@redhat.com>
 609
 610         PR 14072
 611         * configure.in: Add check that sysdep.h has been included before
 612         any system header files.
 613         * configure: Regenerate.
 614         * config.in: Regenerate.
 615         * sysdep.h: Generate an error if included before config.h.
 616         * alpha-opc.c: Include sysdep.h before any other header file.
 617         * alpha-dis.c: Likewise.
 618         * avr-dis.c: Likewise.
 619         * cgen-opc.c: Likewise.
 620         * cr16-dis.c: Likewise.
 621         * cris-dis.c: Likewise.
 622         * crx-dis.c: Likewise.
 623         * d10v-dis.c: Likewise.
 624         * d10v-opc.c: Likewise.
 625         * d30v-dis.c: Likewise.
 626         * d30v-opc.c: Likewise.
 627         * h8500-dis.c: Likewise.
 628         * i370-dis.c: Likewise.
 629         * i370-opc.c: Likewise.
 630         * m10200-dis.c: Likewise.
 631         * m10300-dis.c: Likewise.
 632         * micromips-opc.c: Likewise.
 633         * mips-opc.c: Likewise.
 634         * mips61-opc.c: Likewise.
 635         * moxie-dis.c: Likewise.
 636         * or32-opc.c: Likewise.
 637         * pj-dis.c: Likewise.
 638         * ppc-dis.c: Likewise.
 639         * ppc-opc.c: Likewise.
 640         * s390-dis.c: Likewise.
 641         * sh-dis.c: Likewise.
 642         * sh64-dis.c: Likewise.
 643         * sparc-dis.c: Likewise.
 644         * sparc-opc.c: Likewise.
 645         * spu-dis.c: Likewise.
 646         * tic30-dis.c: Likewise.
 647         * tic54x-dis.c: Likewise.
 648         * tic80-dis.c: Likewise.
 649         * tic80-opc.c: Likewise.
 650         * tilegx-dis.c: Likewise.
 651         * tilepro-dis.c: Likewise.
 652         * v850-dis.c: Likewise.
 653         * v850-opc.c: Likewise.
 654         * vax-dis.c: Likewise.
 655         * w65-dis.c: Likewise.
 656         * xgate-dis.c: Likewise.
 657         * xtensa-dis.c: Likewise.
 658         * rl78-decode.opc: Likewise.
 659         * rl78-decode.c: Regenerate.
 660         * rx-decode.opc: Likewise.
 661         * rx-decode.c: Regenerate.
 662
 663 2012-05-17  Alan Modra  <amodra@gmail.com>
 664
 665         * ppc_dis.c: Don't include elf/ppc.h.
 666
 667 2012-05-16  Meador Inge  <meadori@codesourcery.com>
 668
 669         * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
 670         to PUSH/POP {reg}.
 671
 672 2012-05-15  James Murray <jsm@jsm-net.demon.co.uk>
 673             Stephane Carrez <stcarrez@nerim.fr>
 674
 675         * configure.in: Add S12X and XGATE co-processor support to m68hc11
 676         target.
 677         * disassemble.c: Likewise.
 678         * configure: Regenerate.
 679         * m68hc11-dis.c: Make objdump output more consistent, use hex
 680         instead of decimal and use 0x prefix for hex.
 681         * m68hc11-opc.c: Add S12X and XGATE opcodes.
 682
 683 2012-05-14  James Lemke  <jwlemke@codesourcery.com>
 684
 685         * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
 686         (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
 687         (vle_opcd_indices): New array.
 688         (lookup_vle): New function.
 689         (disassemble_init_powerpc): Revise for second (VLE) opcode table.
 690         (print_insn_powerpc): Likewise.
 691         * ppc-opc.c: Likewise.
 692
 693 2012-05-14  Catherine Moore  <clm@codesourcery.com>
 694             Maciej W. Rozycki  <macro@codesourcery.com>
 695             Rhonda Wittels  <rhonda@codesourcery.com>
 696             Nathan Froyd <froydnj@codesourcery.com>
 697
 698         * ppc-opc.c (insert_arx, extract_arx): New functions.
 699         (insert_ary, extract_ary): New functions.
 700         (insert_li20, extract_li20): New functions.
 701         (insert_rx, extract_rx): New functions.
 702         (insert_ry, extract_ry): New functions.
 703         (insert_sci8, extract_sci8): New functions.
 704         (insert_sci8n, extract_sci8n): New functions.
 705         (insert_sd4h, extract_sd4h): New functions.
 706         (insert_sd4w, extract_sd4w): New functions.
 707         (insert_vlesi, extract_vlesi): New functions.
 708         (insert_vlensi, extract_vlensi): New functions.
 709         (insert_vleui, extract_vleui): New functions.
 710         (insert_vleil, extract_vleil): New functions.
 711         (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 712         (BI16, BI32, BO32, B8): New.
 713         (B15, B24, CRD32, CRS): New.
 714         (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
 715         (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
 716         (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
 717         (SH6_MASK): Use PPC_OPSHIFT_INV.
 718         (SI8, UI5, OIMM5, UI7, BO16): New.
 719         (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
 720         (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
 721         (ALLOW8_SPRG): New.
 722         (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
 723         (OPVUP, OPVUP_MASK OPVUP): New
 724         (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
 725         (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
 726         (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
 727         (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 728         (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
 729         (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
 730         (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
 731         (SE_IM5, SE_IM5_MASK): New.
 732         (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
 733         (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
 734         (BO32DNZ, BO32DZ): New.
 735         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
 736         (PPCVLE): New.
 737         (powerpc_opcodes): Add new VLE instructions.  Update existing
 738         instruction to include PPCVLE if supported.
 739         * ppc-dis.c (ppc_opts): Add vle entry.
 740         (get_powerpc_dialect): New function.
 741         (powerpc_init_dialect): VLE support.
 742         (print_insn_big_powerpc): Call get_powerpc_dialect.
 743         (print_insn_little_powerpc): Likewise.
 744         (operand_value_powerpc): Handle negative shift counts.
 745         (print_insn_powerpc): Handle 2-byte instruction lengths.
 746
 747 2012-05-11  Daniel Richard G.  <skunk@iskunk.org>
 748
 749         PR binutils/14028
 750         * configure.in: Invoke ACX_HEADER_STRING.
 751         * configure: Regenerate.
 752         * config.in: Regenerate.
 753         * sysdep.h: If STRINGS_WITH_STRING is defined then include both
 754         string.h and strings.h.
 755
 756 2012-05-11  Nick Clifton  <nickc@redhat.com>
 757
 758         PR binutils/14006
 759         * arm-dis.c (print_insn): Fix detection of instruction mode in
 760         files containing multiple executable sections.
 761
 762 2012-05-03  Sean Keys  <skeys@ipdatasys.com>
 763
 764         * Makefile.in, configure: regenerate
 765         * disassemble.c (disassembler): Recognize ARCH_XGATE.
 766         * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
 767         New functions.
 768         * configure.in: Recognize xgate.
 769         * xgate-dis.c, xgate-opc.c: New files for support of xgate
 770         * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
 771         and opcode generation for xgate.
 772
 773 2012-04-30  DJ Delorie  <dj@redhat.com>
 774
 775         * rx-decode.opc (MOV): Do not sign-extend immediates which are
 776         already the maximum bit size.
 777         * rx-decode.c: Regenerate.
 778
 779 2012-04-27  David S. Miller  <davem@davemloft.net>
 780
 781         * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
 782         * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
 783
 784         * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
 785         * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
 786
 787         * sparc-opc.c (CBCOND): New define.
 788         (CBCOND_XCC): Likewise.
 789         (cbcond): New helper macro.
 790         (sparc_opcodes): Add compare-and-branch instructions.
 791
 792         * sparc-dis.c (print_insn_sparc): Handle ')'.
 793         * sparc-opc.c (sparc_opcodes): Add crypto instructions.
 794
 795         * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
 796         into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
 797
 798 2012-04-12  David S. Miller  <davem@davemloft.net>
 799
 800         * sparc-dis.c (X_DISP10): Define.
 801         (print_insn_sparc): Handle '='.
 802
 803 2012-04-01  Mike Frysinger  <vapier@gentoo.org>
 804
 805         * bfin-dis.c (fmtconst): Replace decimal handling with a single
 806         sprintf call and the '*' field width.
 807
 808 2012-03-23  Maxim Kuvyrkov  <maxim@codesourcery.com>
 809
 810         * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 811
 812 2012-03-16  Alan Modra  <amodra@gmail.com>
 813
 814         * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
 815         (powerpc_opcd_indices): Bump array size.
 816         (disassemble_init_powerpc): Set powerpc_opcd_indices entries
 817         corresponding to unused opcodes to following entry.
 818         (lookup_powerpc): New function, extracted and optimised from..
 819         (print_insn_powerpc): ..here.
 820
 821 2012-03-15  Alan Modra  <amodra@gmail.com>
 822             James Lemke  <jwlemke@codesourcery.com>
 823
 824         * disassemble.c (disassemble_init_for_target): Handle ppc init.
 825         * ppc-dis.c (private): New var.
 826         (powerpc_init_dialect): Don't return calloc failure, instead use
 827         private.
 828         (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
 829         (powerpc_opcd_indices): New array.
 830         (disassemble_init_powerpc): New function.
 831         (print_insn_big_powerpc): Don't init dialect here.
 832         (print_insn_little_powerpc): Likewise.
 833         (print_insn_powerpc): Start search using powerpc_opcd_indices.
 834
 835 2012-03-10  Edmar Wienskoski  <edmar@freescale.com>
 836
 837         * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
 838         * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
 839         (PPCVEC2, PPCTMR, E6500): New short names.
 840         (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
 841         mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
 842         lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
 843         lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
 844         lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
 845         optional operands on sync instruction for E6500 target.
 846
 847 2012-03-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 848
 849         * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
 850
 851 2012-02-27  Alan Modra  <amodra@gmail.com>
 852
 853         * mt-dis.c: Regenerate.
 854
 855 2012-02-27  Alan Modra  <amodra@gmail.com>
 856
 857         * v850-opc.c (extract_v8): Rearrange to make it obvious this
 858         is the inverse of corresponding insert function.
 859         (extract_d22, extract_u9, extract_r4): Likewise.
 860         (extract_d9): Correct sign extension.
 861         (extract_d16_15): Don't assume "long" is 32 bits, and don't
 862         rely on implementation defined behaviour for shift right of
 863         signed types.
 864         (extract_d16_16, extract_d17_16, extract_i9): Likewise.
 865         (extract_d23): Likewise, and correct mask.
 866
 867 2012-02-27  Alan Modra  <amodra@gmail.com>
 868
 869         * crx-dis.c (print_arg): Mask constant to 32 bits.
 870         * crx-opc.c (cst4_map): Use int array.
 871
 872 2012-02-27  Alan Modra  <amodra@gmail.com>
 873
 874         * arc-dis.c (BITS): Don't use shifts to mask off bits.
 875         (FIELDD): Sign extend with xor,sub.
 876
 877 2012-02-25  Walter Lee  <walt@tilera.com>
 878
 879         * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
 880         * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
 881         TILEPRO_OPC_LW_TLS_SN.
 882
 883 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 884
 885         * i386-opc.h (HLEPrefixNone): New.
 886         (HLEPrefixLock): Likewise.
 887         (HLEPrefixAny): Likewise.
 888         (HLEPrefixRelease): Likewise.
 889
 890 2012-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 891
 892         * i386-dis.c (HLE_Fixup1): New.
 893         (HLE_Fixup2): Likewise.
 894         (HLE_Fixup3): Likewise.
 895         (Ebh1): Likewise.
 896         (Evh1): Likewise.
 897         (Ebh2): Likewise.
 898         (Evh2): Likewise.
 899         (Ebh3): Likewise.
 900         (Evh3): Likewise.
 901         (MOD_C6_REG_7): Likewise.
 902         (MOD_C7_REG_7): Likewise.
 903         (RM_C6_REG_7): Likewise.
 904         (RM_C7_REG_7): Likewise.
 905         (XACQUIRE_PREFIX): Likewise.
 906         (XRELEASE_PREFIX): Likewise.
 907         (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
 908         cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
 909         Ebh2/Evh2 on xchg.  Use Ebh3/Evh3 on mov.
 910         (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
 911         not, or, sbb, sub and xor.  Use Ebh3/Evh3 on mov.  Use
 912         MOD_C6_REG_7 and MOD_C7_REG_7.
 913         (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
 914         (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7.  Add xend and
 915         xtest.
 916         (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
 917         (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
 918
 919         * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
 920         CPU_RTM_FLAGS.
 921         (cpu_flags): Add CpuHLE and CpuRTM.
 922         (opcode_modifiers): Add HLEPrefixOk.
 923
 924         * i386-opc.h (CpuHLE): New.
 925         (CpuRTM): Likewise.
 926         (HLEPrefixOk): Likewise.
 927         (i386_cpu_flags): Add cpuhle and cpurtm.
 928         (i386_opcode_modifier): Add hleprefixok.
 929
 930         * i386-opc.tbl: Add HLEPrefixOk=3 to mov.  Add HLEPrefixOk to
 931         add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
 932         sbb, sub, xor and xadd.  Add HLEPrefixOk=2 to xchg with memory
 933         operand.  Add xacquire, xrelease, xabort, xbegin, xend and
 934         xtest.
 935         * i386-init.h: Regenerated.
 936         * i386-tbl.h: Likewise.
 937
 938 2012-01-24  DJ Delorie  <dj@redhat.com>
 939
 940         * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
 941         * rl78-decode.c: Regenerate.
 942
 943 2012-01-17  James Murray  <jsm@jsm-net.demon.co.uk>
 944
 945         PR binutils/10173
 946         * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
 947
 948 2012-01-17  Andreas Schwab  <schwab@linux-m68k.org>
 949
 950         * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
 951         register and move them after pmove with PSR/PCSR register.
 952
 953 2012-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 954
 955         * i386-dis.c (mod_table): Add vmfunc.
 956
 957         * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
 958         (cpu_flags): CpuVMFUNC.
 959
 960         * i386-opc.h (CpuVMFUNC): New.
 961         (i386_cpu_flags): Add cpuvmfunc.
 962
 963         * i386-opc.tbl: Add vmfunc.
 964         * i386-init.h: Regenerated.
 965         * i386-tbl.h: Likewise.
 966
 967 For older changes see ChangeLog-2011
 968 \f
 969 Local Variables:
 970 mode: change-log
 971 left-margin: 8
 972 fill-column: 74
 973 version-control: never
 974 End: