Remove h8500 support
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2018-04-16 Alan Modra <amodra@gmail.com>
2
3 * Makefile.am: Remove h8500 support.
4 * configure.ac: Likewise.
5 * disassemble.c: Likewise.
6 * disassemble.h: Likewise.
7 * h8500-dis.c: Delete.
8 * h8500-opc.h: Delete.
9 * Makefile.in: Regenerate.
10 * configure: Regenerate.
11 * po/POTFILES.in: Regenerate.
12
13 2018-04-16 Alan Modra <amodra@gmail.com>
14
15 * configure.ac: Remove tahoe support.
16 * configure: Regenerate.
17
18 2018-04-15 H.J. Lu <hongjiu.lu@intel.com>
19
20 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
21 umwait.
22 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
23 64-bit mode.
24 * i386-tbl.h: Regenerated.
25
26 2018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
27
28 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
29 PREFIX_MOD_1_0FAE_REG_6.
30 (va_mode): New.
31 (OP_E_register): Use va_mode.
32 * i386-dis-evex.h (prefix_table):
33 New instructions (see prefixes above).
34 * i386-gen.c (cpu_flag_init): Add WAITPKG.
35 (cpu_flags): Likewise.
36 * i386-opc.h (enum): Likewise.
37 (i386_cpu_flags): Likewise.
38 * i386-opc.tbl: Add umonitor, umwait, tpause.
39 * i386-init.h: Regenerate.
40 * i386-tbl.h: Likewise.
41
42 2018-04-11 Alan Modra <amodra@gmail.com>
43
44 * opcodes/i860-dis.c: Delete.
45 * opcodes/i960-dis.c: Delete.
46 * Makefile.am: Remove i860 and i960 support.
47 * configure.ac: Likewise.
48 * disassemble.c: Likewise.
49 * disassemble.h: Likewise.
50 * Makefile.in: Regenerate.
51 * configure: Regenerate.
52 * po/POTFILES.in: Regenerate.
53
54 2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
55
56 PR binutils/23025
57 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
58 to 0.
59 (print_insn): Clear vex instead of vex.evex.
60
61 2018-04-04 Nick Clifton <nickc@redhat.com>
62
63 * po/es.po: Updated Spanish translation.
64
65 2018-03-28 Jan Beulich <jbeulich@suse.com>
66
67 * i386-gen.c (opcode_modifiers): Delete VecESize.
68 * i386-opc.h (VecESize): Delete.
69 (struct i386_opcode_modifier): Delete vecesize.
70 * i386-opc.tbl: Drop VecESize.
71 * i386-tlb.h: Re-generate.
72
73 2018-03-28 Jan Beulich <jbeulich@suse.com>
74
75 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
76 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
77 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
78 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
79 * i386-tlb.h: Re-generate.
80
81 2018-03-28 Jan Beulich <jbeulich@suse.com>
82
83 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
84 Fold AVX512 forms
85 * i386-tlb.h: Re-generate.
86
87 2018-03-28 Jan Beulich <jbeulich@suse.com>
88
89 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
90 (vex_len_table): Drop Y for vcvt*2si.
91 (putop): Replace plain 'Y' handling by abort().
92
93 2018-03-28 Nick Clifton <nickc@redhat.com>
94
95 PR 22988
96 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
97 instructions with only a base address register.
98 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
99 handle AARHC64_OPND_SVE_ADDR_R.
100 (aarch64_print_operand): Likewise.
101 * aarch64-asm-2.c: Regenerate.
102 * aarch64_dis-2.c: Regenerate.
103 * aarch64-opc-2.c: Regenerate.
104
105 2018-03-22 Jan Beulich <jbeulich@suse.com>
106
107 * i386-opc.tbl: Drop VecESize from register only insn forms and
108 memory forms not allowing broadcast.
109 * i386-tlb.h: Re-generate.
110
111 2018-03-22 Jan Beulich <jbeulich@suse.com>
112
113 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
114 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
115 sha256*): Drop Disp<N>.
116
117 2018-03-22 Jan Beulich <jbeulich@suse.com>
118
119 * i386-dis.c (EbndS, bnd_swap_mode): New.
120 (prefix_table): Use EbndS.
121 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
122 * i386-opc.tbl (bndmov): Move misplaced Load.
123 * i386-tlb.h: Re-generate.
124
125 2018-03-22 Jan Beulich <jbeulich@suse.com>
126
127 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
128 templates allowing memory operands and folded ones for register
129 only flavors.
130 * i386-tlb.h: Re-generate.
131
132 2018-03-22 Jan Beulich <jbeulich@suse.com>
133
134 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
135 256-bit templates. Drop redundant leftover Disp<N>.
136 * i386-tlb.h: Re-generate.
137
138 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
139
140 * riscv-opc.c (riscv_insn_types): New.
141
142 2018-03-13 Nick Clifton <nickc@redhat.com>
143
144 * po/pt_BR.po: Updated Brazilian Portuguese translation.
145
146 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
147
148 * i386-opc.tbl: Add Optimize to clr.
149 * i386-tbl.h: Regenerated.
150
151 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
152
153 * i386-gen.c (opcode_modifiers): Remove OldGcc.
154 * i386-opc.h (OldGcc): Removed.
155 (i386_opcode_modifier): Remove oldgcc.
156 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
157 instructions for old (<= 2.8.1) versions of gcc.
158 * i386-tbl.h: Regenerated.
159
160 2018-03-08 Jan Beulich <jbeulich@suse.com>
161
162 * i386-opc.h (EVEXDYN): New.
163 * i386-opc.tbl: Fold various AVX512VL templates.
164 * i386-tlb.h: Re-generate.
165
166 2018-03-08 Jan Beulich <jbeulich@suse.com>
167
168 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
169 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
170 vpexpandd, vpexpandq): Fold AFX512VF templates.
171 * i386-tlb.h: Re-generate.
172
173 2018-03-08 Jan Beulich <jbeulich@suse.com>
174
175 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
176 Fold 128- and 256-bit VEX-encoded templates.
177 * i386-tlb.h: Re-generate.
178
179 2018-03-08 Jan Beulich <jbeulich@suse.com>
180
181 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
182 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
183 vpexpandd, vpexpandq): Fold AVX512F templates.
184 * i386-tlb.h: Re-generate.
185
186 2018-03-08 Jan Beulich <jbeulich@suse.com>
187
188 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
189 64-bit templates. Drop Disp<N>.
190 * i386-tlb.h: Re-generate.
191
192 2018-03-08 Jan Beulich <jbeulich@suse.com>
193
194 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
195 and 256-bit templates.
196 * i386-tlb.h: Re-generate.
197
198 2018-03-08 Jan Beulich <jbeulich@suse.com>
199
200 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
201 * i386-tlb.h: Re-generate.
202
203 2018-03-08 Jan Beulich <jbeulich@suse.com>
204
205 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
206 Drop NoAVX.
207 * i386-tlb.h: Re-generate.
208
209 2018-03-08 Jan Beulich <jbeulich@suse.com>
210
211 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
212 * i386-tlb.h: Re-generate.
213
214 2018-03-08 Jan Beulich <jbeulich@suse.com>
215
216 * i386-gen.c (opcode_modifiers): Delete FloatD.
217 * i386-opc.h (FloatD): Delete.
218 (struct i386_opcode_modifier): Delete floatd.
219 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
220 FloatD by D.
221 * i386-tlb.h: Re-generate.
222
223 2018-03-08 Jan Beulich <jbeulich@suse.com>
224
225 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
226
227 2018-03-08 Jan Beulich <jbeulich@suse.com>
228
229 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
230 * i386-tlb.h: Re-generate.
231
232 2018-03-08 Jan Beulich <jbeulich@suse.com>
233
234 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
235 forms.
236 * i386-tlb.h: Re-generate.
237
238 2018-03-07 Alan Modra <amodra@gmail.com>
239
240 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
241 bfd_arch_rs6000.
242 * disassemble.h (print_insn_rs6000): Delete.
243 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
244 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
245 (print_insn_rs6000): Delete.
246
247 2018-03-03 Alan Modra <amodra@gmail.com>
248
249 * sysdep.h (opcodes_error_handler): Define.
250 (_bfd_error_handler): Declare.
251 * Makefile.am: Remove stray #.
252 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
253 EDIT" comment.
254 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
255 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
256 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
257 opcodes_error_handler to print errors. Standardize error messages.
258 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
259 and include opintl.h.
260 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
261 * i386-gen.c: Standardize error messages.
262 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
263 * Makefile.in: Regenerate.
264 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
265 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
266 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
267 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
268 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
269 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
270 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
271 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
272 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
273 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
274 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
275 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
276 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
277
278 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
279
280 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
281 vpsub[bwdq] instructions.
282 * i386-tbl.h: Regenerated.
283
284 2018-03-01 Alan Modra <amodra@gmail.com>
285
286 * configure.ac (ALL_LINGUAS): Sort.
287 * configure: Regenerate.
288
289 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
290
291 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
292 macro by assignements.
293
294 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
295
296 PR gas/22871
297 * i386-gen.c (opcode_modifiers): Add Optimize.
298 * i386-opc.h (Optimize): New enum.
299 (i386_opcode_modifier): Add optimize.
300 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
301 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
302 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
303 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
304 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
305 vpxord and vpxorq.
306 * i386-tbl.h: Regenerated.
307
308 2018-02-26 Alan Modra <amodra@gmail.com>
309
310 * crx-dis.c (getregliststring): Allocate a large enough buffer
311 to silence false positive gcc8 warning.
312
313 2018-02-22 Shea Levy <shea@shealevy.com>
314
315 * disassemble.c (ARCH_riscv): Define if ARCH_all.
316
317 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
318
319 * i386-opc.tbl: Add {rex},
320 * i386-tbl.h: Regenerated.
321
322 2018-02-20 Maciej W. Rozycki <macro@mips.com>
323
324 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
325 (mips16_opcodes): Replace `M' with `m' for "restore".
326
327 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
328
329 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
330
331 2018-02-13 Maciej W. Rozycki <macro@mips.com>
332
333 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
334 variable to `function_index'.
335
336 2018-02-13 Nick Clifton <nickc@redhat.com>
337
338 PR 22823
339 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
340 about truncation of printing.
341
342 2018-02-12 Henry Wong <henry@stuffedcow.net>
343
344 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
345
346 2018-02-05 Nick Clifton <nickc@redhat.com>
347
348 * po/pt_BR.po: Updated Brazilian Portuguese translation.
349
350 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
351
352 * i386-dis.c (enum): Add pconfig.
353 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
354 (cpu_flags): Add CpuPCONFIG.
355 * i386-opc.h (enum): Add CpuPCONFIG.
356 (i386_cpu_flags): Add cpupconfig.
357 * i386-opc.tbl: Add PCONFIG instruction.
358 * i386-init.h: Regenerate.
359 * i386-tbl.h: Likewise.
360
361 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
362
363 * i386-dis.c (enum): Add PREFIX_0F09.
364 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
365 (cpu_flags): Add CpuWBNOINVD.
366 * i386-opc.h (enum): Add CpuWBNOINVD.
367 (i386_cpu_flags): Add cpuwbnoinvd.
368 * i386-opc.tbl: Add WBNOINVD instruction.
369 * i386-init.h: Regenerate.
370 * i386-tbl.h: Likewise.
371
372 2018-01-17 Jim Wilson <jimw@sifive.com>
373
374 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
375
376 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
377
378 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
379 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
380 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
381 (cpu_flags): Add CpuIBT, CpuSHSTK.
382 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
383 (i386_cpu_flags): Add cpuibt, cpushstk.
384 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
385 * i386-init.h: Regenerate.
386 * i386-tbl.h: Likewise.
387
388 2018-01-16 Nick Clifton <nickc@redhat.com>
389
390 * po/pt_BR.po: Updated Brazilian Portugese translation.
391 * po/de.po: Updated German translation.
392
393 2018-01-15 Jim Wilson <jimw@sifive.com>
394
395 * riscv-opc.c (match_c_nop): New.
396 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
397
398 2018-01-15 Nick Clifton <nickc@redhat.com>
399
400 * po/uk.po: Updated Ukranian translation.
401
402 2018-01-13 Nick Clifton <nickc@redhat.com>
403
404 * po/opcodes.pot: Regenerated.
405
406 2018-01-13 Nick Clifton <nickc@redhat.com>
407
408 * configure: Regenerate.
409
410 2018-01-13 Nick Clifton <nickc@redhat.com>
411
412 2.30 branch created.
413
414 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
415
416 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
417 * i386-tbl.h: Regenerate.
418
419 2018-01-10 Jan Beulich <jbeulich@suse.com>
420
421 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
422 * i386-tbl.h: Re-generate.
423
424 2018-01-10 Jan Beulich <jbeulich@suse.com>
425
426 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
427 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
428 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
429 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
430 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
431 Disp8MemShift of AVX512VL forms.
432 * i386-tbl.h: Re-generate.
433
434 2018-01-09 Jim Wilson <jimw@sifive.com>
435
436 * riscv-dis.c (maybe_print_address): If base_reg is zero,
437 then the hi_addr value is zero.
438
439 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
440
441 * arm-dis.c (arm_opcodes): Add csdb.
442 (thumb32_opcodes): Add csdb.
443
444 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
445
446 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
447 * aarch64-asm-2.c: Regenerate.
448 * aarch64-dis-2.c: Regenerate.
449 * aarch64-opc-2.c: Regenerate.
450
451 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
452
453 PR gas/22681
454 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
455 Remove AVX512 vmovd with 64-bit operands.
456 * i386-tbl.h: Regenerated.
457
458 2018-01-05 Jim Wilson <jimw@sifive.com>
459
460 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
461 jalr.
462
463 2018-01-03 Alan Modra <amodra@gmail.com>
464
465 Update year range in copyright notice of all files.
466
467 2018-01-02 Jan Beulich <jbeulich@suse.com>
468
469 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
470 and OPERAND_TYPE_REGZMM entries.
471
472 For older changes see ChangeLog-2017
473 \f
474 Copyright (C) 2018 Free Software Foundation, Inc.
475
476 Copying and distribution of this file, with or without modification,
477 are permitted in any medium without royalty provided the copyright
478 notice and this notice are preserved.
479
480 Local Variables:
481 mode: change-log
482 left-margin: 8
483 fill-column: 74
484 version-control: never
485 End:
This page took 0.040312 seconds and 5 git commands to generate.