opcodes/ChangeLog

   1 2014-09-03  Jiong Wang  <jiong.wang@arm.com>
   2
   3         * aarch64-tbl.h (QL_R4NIL): New qualifiers.
   4         (aarch64_feature_lse): New feature added.
   5         (LSE): New Added.
   6         (aarch64_opcode_table): New LSE instructions added.  Improve
   7         descriptions for ldarb/ldarh/ldar.
   8         (aarch64_opcode_table): Describe PAIRREG.
   9         * aarch64-opc.h (aarch64_field_kind): Add FLD_lse_sz.
  10         * aarch64-opc.c (fields): Add entry for F_LSE_SZ.
  11         (aarch64_print_operand): Recognize PAIRREG.
  12         (operand_general_constraint_met_p): Check reg pair constraints for CASP
  13         instructions.
  14         * aarch64-dis.c (aarch64_ext_regno_pair): New extractor for paired reg.
  15         (do_special_decoding): Recognize F_LSE_SZ.
  16         * aarch64-asm.c (do_special_encoding): Recognize F_LSE_SZ.
  17
  18 2014-08-26  Maciej W. Rozycki  <macro@codesourcery.com>
  19
  20         * micromips-opc.c (decode_micromips_operand): Rename `B' to `+J'.
  21         (micromips_opcodes): Use "+J" in place of "B" for "hypcall",
  22         "sdbbp", "syscall" and "wait".
  23
  24 2014-08-21  Nathan Sidwell  <nathan@codesourcery.com>
  25             Maciej W. Rozycki  <macro@codesourcery.com>
  26
  27         * arm-dis.c (print_arm_address): Negate the GPR-relative offset
  28         returned if the U bit is set.
  29
  30 2014-08-21  Maciej W. Rozycki  <macro@codesourcery.com>
  31
  32         * micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out
  33         48-bit "li" encoding.
  34
  35 2014-08-19  Andreas Arnez  <arnez@linux.vnet.ibm.com>
  36
  37         * s390-dis.c (s390_insn_length, s390_insn_matches_opcode)
  38         (s390_print_insn_with_opcode, opcode_mask_more_specific): New
  39         static functions, code was moved from...
  40         (print_insn_s390): ...here.
  41         (s390_extract_operand): Adjust comment.  Change type of first
  42         parameter from 'unsigned char *' to 'const bfd_byte *'.
  43         (union operand_value): New.
  44         (s390_extract_operand): Change return type to union operand_value.
  45         Also avoid integer overflow in sign-extension.
  46         (s390_print_insn_with_opcode): Adjust to changed return value from
  47         s390_extract_operand().  Change "%i" printf format to "%u" for
  48         unsigned values.
  49         (init_disasm): Simplify initialization of opc_index[].  This also
  50         fixes an access after the last element of s390_opcodes[].
  51         (print_insn_s390): Simplify the opcode search loop.
  52         Check architecture mask against all searched opcodes, not just the
  53         first matching one.
  54         (s390_print_insn_with_opcode): Drop function pointer dereferences
  55         without effect.
  56         (print_insn_s390): Likewise.
  57         (s390_insn_length): Simplify formula for return value.
  58         (s390_print_insn_with_opcode): Avoid special handling for the
  59         separator before the first operand.  Use new local variable
  60         'flags' in place of 'operand->flags'.
  61
  62 2014-08-14  Mike Frysinger  <vapier@gentoo.org>
  63
  64         * bfin-dis.c (struct private): Change int's to bfd_boolean's.
  65         (decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
  66         decode_dagMODik_0, decode_LDIMMhalf_0, decode_linkage_0):
  67         Change assignment of 1 to priv->comment to TRUE.
  68         (print_insn_bfin): Change legal to a bfd_boolean.  Change
  69         assignment of 0/1 with priv comment and parallel and legal
  70         to FALSE/TRUE.
  71
  72 2014-08-14  Mike Frysinger  <vapier@gentoo.org>
  73
  74         * bfin-dis.c (OUT): Define.
  75         (decode_CC2stat_0): Declare new op_names array.
  76         Replace multiple if statements with a single one.
  77
  78 2014-08-14  Mike Frysinger  <vapier@gentoo.org>
  79
  80         * bfin-dis.c (struct private): Add iw0.
  81         (_print_insn_bfin): Assign iw0 to priv.iw0.
  82         (print_insn_bfin): Drop ifetch and use priv.iw0.
  83
  84 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
  85
  86         * bfin-dis.c (comment, parallel): Move from global scope ...
  87         (struct private): ... to this new struct.
  88         (decode_ProgCtrl_0, decode_CaCTRL_0, decode_PushPopReg_0,
  89         decode_PushPopMultiple_0, decode_ccMV_0, decode_CCflag_0,
  90         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
  91         decode_LOGI2op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
  92         decode_dagMODik_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
  93         decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
  94         decode_pseudoOChar_0, decode_pseudodbg_assert_0, _print_insn_bfin,
  95         print_insn_bfin): Declare private struct.  Use priv's comment and
  96         parallel members.
  97
  98 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
  99
 100         * bfin-dis.c (ifetch): Do not align pc to 2 bytes.
 101         (_print_insn_bfin): Add check for unaligned pc.
 102
 103 2014-08-13  Mike Frysinger  <vapier@gentoo.org>
 104
 105         * bfin-dis.c (ifetch): New function.
 106         (_print_insn_bfin, print_insn_bfin): Call new ifetch and return
 107         -1 when it errors.
 108
 109 2014-07-29  Matthew Fortune  <matthew.fortune@imgtec.com>
 110
 111         * micromips-opc.c (COD): Rename throughout to...
 112         (CM): New define, update to use INSN_COPROC_MOVE.
 113         (LCD): Rename throughout to...
 114         (LC): New define, update to use INSN_LOAD_COPROC.
 115         * mips-opc.c: Likewise.
 116
 117 2014-07-29  Matthew Fortune  <matthew.fortune@imgtec.com>
 118
 119         * micromips-opc.c (COD, LCD) New macros.
 120         (cfc1, ctc1): Remove FP_S attribute.
 121         (dmfc1, mfc1, mfhc1): Add LCD attribute.
 122         (dmtc1, mtc1, mthc1): Add COD attribute.
 123         * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute.
 124
 125 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 126             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 127             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 128             Sergey Lega  <sergey.s.lega@intel.com>
 129             Anna Tikhonova  <anna.tikhonova@intel.com>
 130             Ilya Tocar  <ilya.tocar@intel.com>
 131             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 132             Ilya Verbin  <ilya.verbin@intel.com>
 133             Kirill Yukhin  <kirill.yukhin@intel.com>
 134             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 135
 136         * i386-dis-evex.h: Updated.
 137         * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
 138         PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
 139         PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
 140         PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
 141         PREFIX_EVEX_0F3A67.
 142         (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
 143         VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
 144         (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
 145         EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
 146         EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
 147         EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
 148         EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
 149         EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
 150         EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
 151         (prefix_table): Add entries for new instructions.
 152         (vex_len_table): Ditto.
 153         (vex_w_table): Ditto.
 154         (OP_E_memory): Update xmmq_mode handling.
 155         * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
 156         (cpu_flags): Add CpuAVX512DQ.
 157         * i386-init.h: Regenerared.
 158         * i386-opc.h (CpuAVX512DQ): New.
 159         (i386_cpu_flags): Add cpuavx512dq.
 160         * i386-opc.tbl: Add AVX512DQ instructions.
 161         * i386-tbl.h: Regenerate.
 162
 163 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 164             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 165             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 166             Sergey Lega  <sergey.s.lega@intel.com>
 167             Anna Tikhonova  <anna.tikhonova@intel.com>
 168             Ilya Tocar  <ilya.tocar@intel.com>
 169             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 170             Ilya Verbin  <ilya.verbin@intel.com>
 171             Kirill Yukhin  <kirill.yukhin@intel.com>
 172             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 173
 174         * i386-dis-evex.h: Add new instructions (prefixes bellow).
 175         * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
 176         (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
 177         (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
 178         PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
 179         PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
 180         PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
 181         PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
 182         PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
 183         PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
 184         PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
 185         PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
 186         PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
 187         PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
 188         PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
 189         PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
 190         PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
 191         PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
 192         PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
 193         PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
 194         PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
 195         PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
 196         PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
 197         (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
 198         VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
 199         VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
 200         VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
 201         VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
 202         VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
 203         VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
 204         VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
 205         VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
 206         VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
 207         VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
 208         (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
 209         EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
 210         EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
 211         EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
 212         EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
 213         EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
 214         EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
 215         (prefix_table): Add entries for new instructions.
 216         (vex_table) : Ditto.
 217         (vex_len_table): Ditto.
 218         (vex_w_table): Ditto.
 219         (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
 220         mask_bd_mode handling.
 221         (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
 222         handling.
 223         (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
 224         handling.
 225         (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
 226         (OP_EX): Add dqw_swap_mode handling.
 227         (OP_VEX): Add mask_bd_mode handling.
 228         (OP_Mask): Add mask_bd_mode handling.
 229         * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
 230         (cpu_flags): Add CpuAVX512BW.
 231         * i386-init.h: Regenerated.
 232         * i386-opc.h (CpuAVX512BW): New.
 233         (i386_cpu_flags): Add cpuavx512bw.
 234         * i386-opc.tbl: Add AVX512BW instructions.
 235         * i386-tbl.h: Regenerate.
 236
 237 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 238             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 239             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 240             Sergey Lega  <sergey.s.lega@intel.com>
 241             Anna Tikhonova  <anna.tikhonova@intel.com>
 242             Ilya Tocar  <ilya.tocar@intel.com>
 243             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 244             Ilya Verbin  <ilya.verbin@intel.com>
 245             Kirill Yukhin  <kirill.yukhin@intel.com>
 246             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 247
 248         * i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
 249         * i386-tbl.h: Regenerate.
 250
 251 2014-07-22  Sergey Guriev  <sergey.s.guriev@intel.com>
 252             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 253             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 254             Sergey Lega  <sergey.s.lega@intel.com>
 255             Anna Tikhonova  <anna.tikhonova@intel.com>
 256             Ilya Tocar  <ilya.tocar@intel.com>
 257             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 258             Ilya Verbin  <ilya.verbin@intel.com>
 259             Kirill Yukhin  <kirill.yukhin@intel.com>
 260             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 261
 262         * i386-dis.c (intel_operand_size): Support 128/256 length in
 263         vex_vsib_q_w_dq_mode.
 264         (OP_E_memory): Add ymmq_mode handling, handle new broadcast.
 265         * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
 266         (cpu_flags): Add CpuAVX512VL.
 267         * i386-init.h: Regenerated.
 268         * i386-opc.h (CpuAVX512VL): New.
 269         (i386_cpu_flags): Add cpuavx512vl.
 270         (BROADCAST_1TO4, BROADCAST_1TO2): Define.
 271         * i386-opc.tbl: Add AVX512VL instructions.
 272         * i386-tbl.h: Regenerate.
 273
 274 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 275
 276         * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
 277         * or1k-opinst.c: Regenerate.
 278
 279 2014-07-08  Ilya Tocar  <ilya.tocar@intel.com>
 280
 281         * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
 282         (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
 283
 284 2014-07-04  Alan Modra  <amodra@gmail.com>
 285
 286         * configure.ac: Rename from configure.in.
 287         * Makefile.in: Regenerate.
 288         * config.in: Regenerate.
 289
 290 2014-07-04  Alan Modra  <amodra@gmail.com>
 291
 292         * configure.in: Include bfd/version.m4.
 293         (AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
 294         (BFD_VERSION): Delete.
 295         * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
 296         * configure: Regenerate.
 297         * Makefile.in: Regenerate.
 298
 299 2014-07-01  Barney Stratford   <barney_stratford@fastmail.fm>
 300             Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
 301             Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
 302             Soundararajan  <Sounderarajan.D@atmel.com>
 303
 304         * avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
 305         (print_insn_avr): Do not select opcode if insn ISA is avrtiny and
 306         machine is not avrtiny.
 307
 308 2014-06-26  Philippe De Muyter <phdm@macqel.be>
 309
 310         * or1k-desc.h (spr_field_masks): Add U suffix to the end of long
 311         constants.
 312
 313 2014-06-12  Alan Modra  <amodra@gmail.com>
 314
 315         * or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
 316         * or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
 317
 318 2014-06-10  H.J. Lu  <hongjiu.lu@intel.com>
 319
 320         * i386-dis.c (fwait_prefix): New.
 321         (ckprefix): Set fwait_prefix.
 322         (print_insn): Properly print prefixes before fwait.
 323
 324 2014-06-07  Alan Modra  <amodra@gmail.com>
 325
 326         * ppc-opc.c (UISIGNOPT): Define and use with cmpli.
 327
 328 2014-06-05  Joel Brobecker  <brobecker@adacore.com>
 329
 330         * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
 331         bfd's development.sh.
 332         * Makefile.in, configure: Regenerate.
 333
 334 2014-06-03  Nick Clifton  <nickc@redhat.com>
 335
 336         * msp430-dis.c (msp430_doubleoperand): Use extension_word to
 337         decide when extended addressing is being used.
 338
 339 2014-06-02  Eric Botcazou  <ebotcazou@adacore.com>
 340
 341         * sparc-opc.c (cas): Disable for LEON.
 342         (casl): Likewise.
 343
 344 2014-05-20  Alan Modra  <amodra@gmail.com>
 345
 346         * m68k-dis.c: Don't include setjmp.h.
 347
 348 2014-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 349
 350         * i386-dis.c (ADDR16_PREFIX): Removed.
 351         (ADDR32_PREFIX): Likewise.
 352         (DATA16_PREFIX): Likewise.
 353         (DATA32_PREFIX): Likewise.
 354         (prefix_name): Updated.
 355         (print_insn): Simplify data and address size prefixes processing.
 356
 357 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 358
 359         * or1k-desc.c: Regenerated.
 360         * or1k-desc.h: Likewise.
 361         * or1k-opc.c: Likewise.
 362         * or1k-opc.h: Likewise.
 363         * or1k-opinst.c: Likewise.
 364
 365 2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>
 366
 367         * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
 368         (I34): New define.
 369         (I36): New define.
 370         (I66): New define.
 371         (I68): New define.
 372         * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
 373         mips64r5.
 374         (parse_mips_dis_option): Update MSA and virtualization support to
 375         allow mips64r3 and mips64r5.
 376
 377 2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>
 378
 379         * mips-opc.c (G3): Remove I4.
 380
 381 2014-05-05  H.J. Lu  <hongjiu.lu@intel.com>
 382
 383         PR binutils/16893
 384         * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
 385         (end_codep): Likewise.
 386         (mandatory_prefix): Likewise.
 387         (active_seg_prefix): Likewise.
 388         (ckprefix): Set active_seg_prefix to the active segment register
 389         prefix.
 390         (seg_prefix): Removed.
 391         (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
 392         for prefix index.  Ignore the index if it is invalid and the
 393         mandatory prefix isn't required.
 394         (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
 395         mandatory.  Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
 396         in used_prefixes here.  Don't print unused prefixes.  Check
 397         active_seg_prefix for the active segment register prefix.
 398         Restore the DFLAG bit in sizeflag if the data size prefix is
 399         unused.  Check the unused mandatory PREFIX_XXX prefixes
 400         (append_seg): Only print the segment register which gets used.
 401         (OP_E_memory): Check active_seg_prefix for the segment register
 402         prefix.
 403         (OP_OFF): Likewise.
 404         (OP_OFF64): Likewise.
 405         (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
 406
 407 2014-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 408
 409         PR binutils/16886
 410         * config.in: Regenerated.
 411         * configure: Likewise.
 412         * configure.in: Check if sigsetjmp is available.
 413         * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 414         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 415         (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
 416         * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 417         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 418         (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
 419         * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 420         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 421         (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
 422         * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
 423         (OPCODES_SIGSETJMP): Likewise.
 424         (OPCODES_SIGLONGJMP): Likewise.
 425         * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 426         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 427         (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
 428         * xtensa-dis.c (dis_private): Replace jmp_buf with
 429         OPCODES_SIGJMP_BUF.
 430         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 431         (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
 432         * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
 433         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
 434         (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
 435
 436 2014-05-01  H.J. Lu  <hongjiu.lu@intel.com>
 437
 438         PR binutils/16891
 439         * i386-dis.c (print_insn): Handle prefixes before fwait.
 440
 441 2014-04-26  Alan Modra  <amodra@gmail.com>
 442
 443         * po/POTFILES.in: Regenerate.
 444
 445 2014-04-23  Andrew Bennett  <andrew.bennett@imgtec.com>
 446
 447         * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
 448         to allow the MIPS XPA ASE.
 449         (parse_mips_dis_option): Process the -Mxpa option.
 450         * mips-opc.c (XPA): New define.
 451         (mips_builtin_opcodes): Add MIPS XPA instructions and move the
 452         locations of the ctc0 and cfc0 instructions.
 453
 454 2014-04-22  Christian Svensson  <blue@cmd.nu>
 455
 456         * Makefile.am: Remove openrisc and or32 support.  Add support for or1k.
 457         * configure.in: Likewise.
 458         * disassemble.c: Likewise.
 459         * or1k-asm.c: New file.
 460         * or1k-desc.c: New file.
 461         * or1k-desc.h: New file.
 462         * or1k-dis.c: New file.
 463         * or1k-ibld.c: New file.
 464         * or1k-opc.c: New file.
 465         * or1k-opc.h: New file.
 466         * or1k-opinst.c: New file.
 467         * Makefile.in: Regenerate.
 468         * configure: Regenerate.
 469         * openrisc-asm.c: Delete.
 470         * openrisc-desc.c: Delete.
 471         * openrisc-desc.h: Delete.
 472         * openrisc-dis.c: Delete.
 473         * openrisc-ibld.c: Delete.
 474         * openrisc-opc.c: Delete.
 475         * openrisc-opc.h: Delete.
 476         * or32-dis.c: Delete.
 477         * or32-opc.c: Delete.
 478
 479 2014-04-04  Ilya Tocar  <ilya.tocar@intel.com>
 480
 481         * i386-dis.c (rm_table): Add encls, enclu.
 482         * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
 483         (cpu_flags): Add CpuSE1.
 484         * i386-opc.h (enum): Add CpuSE1.
 485         (i386_cpu_flags): Add cpuse1.
 486         * i386-opc.tbl: Add encls, enclu.
 487         * i386-init.h: Regenerated.
 488         * i386-tbl.h: Likewise.
 489
 490 2014-04-02  Anthony Green  <green@moxielogic.com>
 491
 492         * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
 493         instructions, sex.b and sex.s.
 494
 495 2014-03-26  Jiong Wang  <jiong.wang@arm.com>
 496
 497         * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
 498         instructions.
 499
 500 2014-03-20  Ilya Tocar  <ilya.tocar@intel.com>
 501
 502         * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
 503         vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
 504         vscatterqps.
 505         * i386-tbl.h: Regenerate.
 506
 507 2014-03-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 508
 509         * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
 510         %hstick_enable added.
 511
 512 2014-03-19  Nick Clifton  <nickc@redhat.com>
 513
 514         * rx-decode.opc (bwl): Allow for bogus instructions with a size
 515         field of 3.
 516         (sbwl, ubwl, SCALE): Likewise.
 517         * rx-decode.c: Regenerate.
 518
 519 2014-03-12  Alan Modra  <amodra@gmail.com>
 520
 521         * Makefile.in: Regenerate.
 522
 523 2014-03-05  Alan Modra  <amodra@gmail.com>
 524
 525         Update copyright years.
 526
 527 2014-03-04  Heiher  <r@hev.cc>
 528
 529         * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
 530
 531 2014-03-04  Richard Sandiford  <rdsandiford@googlemail.com>
 532
 533         * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
 534         so that they come after the Loongson extensions.
 535
 536 2014-03-03  Alan Modra  <amodra@gmail.com>
 537
 538         * i386-gen.c (process_copyright): Emit copyright notice on one line.
 539
 540 2014-02-28  Alan Modra  <amodra@gmail.com>
 541
 542         * msp430-decode.c: Regenerate.
 543
 544 2014-02-27  Jiong Wang  <jiong.wang@arm.com>
 545
 546         * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
 547         FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
 548
 549 2014-02-27  Yufeng Zhang  <yufeng.zhang@arm.com>
 550
 551         * aarch64-opc.c (print_register_offset_address): Call
 552         get_int_reg_name to prepare the register name.
 553
 554 2014-02-25  Ilya Tocar  <ilya.tocar@intel.com>
 555
 556         * i386-opc.tbl: Remove wrong variant of vcvtps2ph
 557         * i386-tbl.h: Regenerate.
 558
 559 2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>
 560
 561         * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
 562         (cpu_flags): Add CpuPREFETCHWT1.
 563         * i386-init.h: Regenerate.
 564         * i386-opc.h (CpuPREFETCHWT1): New.
 565         (i386_cpu_flags): Add cpuprefetchwt1.
 566         * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
 567         * i386-tbl.h: Regenerate.
 568
 569 2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>
 570
 571         * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
 572         to CpuAVX512F.
 573         * i386-tbl.h: Regenerate.
 574
 575 2014-02-19  H.J. Lu  <hongjiu.lu@intel.com>
 576
 577         * i386-gen.c (output_cpu_flags): Don't output trailing space.
 578         (output_opcode_modifier): Likewise.
 579         (output_operand_type): Likewise.
 580         * i386-init.h: Regenerated.
 581         * i386-tbl.h: Likewise.
 582
 583 2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>
 584
 585         * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
 586         MOD_0FC7_REG_5.
 587         (PREFIX enum): Add PREFIX_0FAE_REG_7.
 588         (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
 589         (prefix_table): Add clflusopt.
 590         (mod_table): Add xrstors, xsavec, xsaves.
 591         * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
 592         CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
 593         (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
 594         * i386-init.h: Regenerate.
 595         * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
 596         xsaves64, xsavec, xsavec64.
 597         * i386-tbl.h: Regenerate.
 598
 599 2014-02-10  Alan Modra  <amodra@gmail.com>
 600
 601         * po/POTFILES.in: Regenerate.
 602         * po/opcodes.pot: Regenerate.
 603
 604 2014-01-30  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>
 605             Jan Beulich  <jbeulich@suse.com>
 606
 607         PR binutils/16490
 608         * i386-dis.c (OP_E_memory): Fix shift computation for
 609         vex_vsib_q_w_dq_mode.
 610
 611 2014-01-09  Bradley Nelson  <bradnelson@google.com>
 612             Roland McGrath  <mcgrathr@google.com>
 613
 614         * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
 615         last_rex_prefix is -1.
 616
 617 2014-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 618
 619         * i386-gen.c (process_copyright): Update copyright year to 2014.
 620
 621 2014-01-03  Maciej W. Rozycki  <macro@codesourcery.com>
 622
 623         * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
 624
 625 For older changes see ChangeLog-2013
 626 \f
 627 Copyright (C) 2014 Free Software Foundation, Inc.
 628
 629 Copying and distribution of this file, with or without modification,
 630 are permitted in any medium without royalty provided the copyright
 631 notice and this notice are preserved.
 632
 633 Local Variables:
 634 mode: change-log
 635 left-margin: 8
 636 fill-column: 74
 637 version-control: never
 638 End: