opcodes/ChangeLog

   1 2005-10-26  Paul Brook  <paul@codesourcery.com>
   2
   3         * arm-dis.c (arm_opcodes): Correct "sel" entry.
   4
   5 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
   6
   7         * m32r-asm.c: Regenerate.
   8
   9 2005-10-25  DJ Delorie  <dj@redhat.com>
  10
  11         * m32c-asm.c: Regenerate.
  12         * m32c-desc.c: Regenerate.
  13         * m32c-desc.h: Regenerate.
  14         * m32c-dis.c: Regenerate.
  15         * m32c-ibld.c: Regenerate.
  16         * m32c-opc.c: Regenerate.
  17         * m32c-opc.h: Regenerate.
  18
  19 2005-10-25  Arnold Metselaar  <arnold.metselaar@planet.nl>
  20
  21         * configure.in: Add target architecture bfd_arch_z80.
  22         * configure: Regenerated.
  23         * disassemble.c (disassembler)<ARCH_z80>: Add case
  24         bfd_arch_z80.
  25         * z80-dis.c: New file.
  26
  27 2005-10-25  Alan Modra  <amodra@bigpond.net.au>
  28
  29         * po/POTFILES.in: Regenerate.
  30         * po/opcodes.pot: Regenerate.
  31
  32 2005-10-24  Jan Beulich  <jbeulich@novell.com>
  33
  34         * ia64-asmtab.c: Regenerate.
  35
  36 2005-10-21  DJ Delorie  <dj@redhat.com>
  37
  38         * m32c-asm.c: Regenerate.
  39         * m32c-desc.c: Regenerate.
  40         * m32c-desc.h: Regenerate.
  41         * m32c-dis.c: Regenerate.
  42         * m32c-ibld.c: Regenerate.
  43         * m32c-opc.c: Regenerate.
  44         * m32c-opc.h: Regenerate.
  45
  46 2005-10-21  Nick Clifton  <nickc@redhat.com>
  47
  48         * bfin-dis.c: Tidy up code, removing redundant constructs.
  49
  50 2005-10-19  Martin Schwidefsky  <schwidefsky@de.ibm.com>
  51
  52         * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
  53         instructions.
  54
  55 2005-10-18  Nick Clifton  <nickc@redhat.com>
  56
  57         * m32r-asm.c: Regenerate after updating m32r.opc.
  58
  59 2005-10-18  Jie Zhang  <jie.zhang@analog.com>
  60
  61         * bfin-dis.c (print_insn_bfin): Do proper endian transform when
  62         reading instruction from memory.
  63
  64 2005-10-18  Nick Clifton  <nickc@redhat.com>
  65
  66         * m32r-asm.c: Regenerate after updating m32r.opc.
  67
  68 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
  69
  70         * m32r-asm.c: Regenerate after updating m32r.opc.
  71
  72 2005-10-08  James Lemke  <jim@wasabisystems.com>
  73
  74         * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
  75         operations.
  76
  77 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
  78
  79         * ppc-dis.c (struct dis_private): Remove.
  80         (powerpc_dialect): Avoid aliasing warnings.
  81         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
  82
  83 2005-09-30  Nick Clifton  <nickc@redhat.com>
  84
  85         * po/ga.po: New Irish translation.
  86         * configure.in (ALL_LINGUAS): Add "ga".
  87         * configure: Regenerate.
  88
  89 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
  90
  91         * Makefile.am: Run "make dep-am".
  92         * Makefile.in: Regenerated.
  93         * aclocal.m4: Likewise.
  94         * configure: Likewise.
  95
  96 2005-09-30  Catherine Moore  <clm@cm00re.com>
  97
  98         * Makefile.am: Bfin support.
  99         * Makefile.in: Regenerated.
 100         * aclocal.m4: Regenerated.
 101         * bfin-dis.c: New file.
 102         * configure.in: Bfin support.
 103         * configure: Regenerated.
 104         * disassemble.c (ARCH_bfin): Define.
 105         (disassembler): Add case for bfd_arch_bfin.
 106
 107 2005-09-28  Jan Beulich  <jbeulich@novell.com>
 108
 109         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
 110         (indirEv): Use it.
 111         (stackEv): New.
 112         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
 113         (dis386): Document and use new 'V' meta character. Use it for
 114         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
 115         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
 116         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
 117         data prefix as used whenever DFLAG was examined. Handle 'V'.
 118         (intel_operand_size): Use stack_v_mode.
 119         (OP_E): Use stack_v_mode, but handle only the special case of
 120         64-bit mode without operand size override here; fall through to
 121         v_mode case otherwise.
 122         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
 123         and no operand size override is present.
 124         (OP_J): Use get32s for obtaining the displacement also when rex64
 125         is present.
 126
 127 2005-09-08  Paul Brook  <paul@codesourcery.com>
 128
 129         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
 130
 131 2005-09-06  Chao-ying Fu  <fu@mips.com>
 132
 133         * mips-opc.c (MT32): New define.
 134         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
 135         bottom to avoid opcode collision with "mftr" and "mttr".
 136         Add MT instructions.
 137         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
 138         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
 139         formats.
 140
 141 2005-09-02  Paul Brook  <paul@codesourcery.com>
 142
 143         * arm-dis.c (coprocessor_opcodes): Add null terminator.
 144
 145 2005-09-02  Paul Brook  <paul@codesourcery.com>
 146
 147         * arm-dis.c (coprocessor_opcodes): New.
 148         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
 149         (print_insn_coprocessor): New function.
 150         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
 151         format characters.
 152         (print_insn_thumb32): Use print_insn_coprocessor.
 153
 154 2005-08-30  Paul Brook  <paul@codesourcery.com>
 155
 156         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
 157
 158 2005-08-26  Jan Beulich  <jbeulich@novell.com>
 159
 160         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
 161         re-use.
 162         (OP_E): Call intel_operand_size, move call site out of mode
 163         dependent code.
 164         (OP_OFF): Call intel_operand_size if suffix_always. Remove
 165         ATTRIBUTE_UNUSED from parameters.
 166         (OP_OFF64): Likewise.
 167         (OP_ESreg): Call intel_operand_size.
 168         (OP_DSreg): Likewise.
 169         (OP_DIR): Use colon rather than semicolon as separator of far
 170         jump/call operands.
 171
 172 2005-08-25  Chao-ying Fu  <fu@mips.com>
 173
 174         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
 175         (mips_builtin_opcodes): Add DSP instructions.
 176         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 177         mips64, mips64r2.
 178         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 179         operand formats.
 180
 181 2005-08-23  David Ung  <davidu@mips.com>
 182
 183         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 184         instructions to the table.
 185
 186 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 187
 188         * a29k-dis.c: Delete.
 189         * Makefile.am: Remove a29k support.
 190         * configure.in: Likewise.
 191         * disassemble.c: Likewise.
 192         * Makefile.in: Regenerate.
 193         * configure: Regenerate.
 194         * po/POTFILES.in: Regenerate.
 195
 196 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 197
 198         * ppc-dis.c (powerpc_dialect): Handle e300.
 199         (print_ppc_disassembler_options): Likewise.
 200         * ppc-opc.c (PPCE300): Define.
 201         (powerpc_opcodes): Mark icbt as available for the e300.
 202
 203 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 204
 205         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 206         Use "rp" instead of "%r2" in "b,l" insns.
 207
 208 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 209
 210         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 211         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 212         (main): Likewise.
 213         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 214         and 4 bit optional masks.
 215         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 216         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 217         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 218         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 219         (s390_opformats): Likewise.
 220         * s390-opc.txt: Add new instructions for cpu type z9-109.
 221
 222 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 223
 224         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 225
 226 2005-07-29  Paul Brook  <paul@codesourcery.com>
 227
 228         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 229
 230 2005-07-29  Paul Brook  <paul@codesourcery.com>
 231
 232         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 233         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 234
 235 2005-07-25  DJ Delorie  <dj@redhat.com>
 236
 237         * m32c-asm.c Regenerate.
 238         * m32c-dis.c Regenerate.
 239
 240 2005-07-20  DJ Delorie  <dj@redhat.com>
 241
 242         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 243         enums, so convert them to bit masks, which attributes are.
 244
 245 2005-07-18  Nick Clifton  <nickc@redhat.com>
 246
 247         * configure.in: Restore alpha ordering to list of arches.
 248         * configure: Regenerate.
 249         * disassemble.c: Restore alpha ordering to list of arches.
 250
 251 2005-07-18  Nick Clifton  <nickc@redhat.com>
 252
 253         * m32c-asm.c: Regenerate.
 254         * m32c-desc.c: Regenerate.
 255         * m32c-desc.h: Regenerate.
 256         * m32c-dis.c: Regenerate.
 257         * m32c-ibld.h: Regenerate.
 258         * m32c-opc.c: Regenerate.
 259         * m32c-opc.h: Regenerate.
 260
 261 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 262
 263         * i386-dis.c (PNI_Fixup): Update comment.
 264         (VMX_Fixup): Properly handle the suffix check.
 265
 266 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 267
 268         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 269         mfctl disassembly.
 270
 271 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 272
 273         * Makefile.am: Run "make dep-am".
 274         (stamp-m32c): Fix cpu dependencies.
 275         * Makefile.in: Regenerate.
 276         * ip2k-dis.c: Regenerate.
 277
 278 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 279
 280         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 281         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 282         (Em): New.
 283         (Gm): New.
 284         (VM): New.
 285         (dis386_twobyte): Updated entries 0x78 and 0x79.
 286         (twobyte_has_modrm): Likewise.
 287         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 288         (OP_G): Handle m_mode.
 289
 290 2005-07-14  Jim Blandy  <jimb@redhat.com>
 291
 292         Add support for the Renesas M32C and M16C.
 293         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 294         * m32c-desc.h, m32c-opc.h: New.
 295         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 296         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 297         m32c-opc.c.
 298         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 299         m32c-ibld.lo, m32c-opc.lo.
 300         (CLEANFILES): List stamp-m32c.
 301         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 302         (CGEN_CPUS): Add m32c.
 303         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 304         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 305         (m32c_opc_h): New variable.
 306         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 307         (m32c-opc.lo): New rules.
 308         * Makefile.in: Regenerated.
 309         * configure.in: Add case for bfd_m32c_arch.
 310         * configure: Regenerated.
 311         * disassemble.c (ARCH_m32c): New.
 312         [ARCH_m32c]: #include "m32c-desc.h".
 313         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 314         (disassemble_init_for_target) [ARCH_m32c]: Same.
 315
 316         * cgen-ops.h, cgen-types.h: New files.
 317         * Makefile.am (HFILES): List them.
 318         * Makefile.in: Regenerated.
 319
 320 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 321
 322         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 323         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 324         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 325         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 326         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 327         v850-dis.c: Fix format bugs.
 328         * ia64-gen.c (fail, warn): Add format attribute.
 329         * or32-opc.c (debug): Likewise.
 330
 331 2005-07-07  Khem Raj  <kraj@mvista.com>
 332
 333         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 334         disassembly pattern.
 335
 336 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 337
 338         * Makefile.am (stamp-m32r): Fix path to cpu files.
 339         (stamp-m32r, stamp-iq2000): Likewise.
 340         * Makefile.in: Regenerate.
 341         * m32r-asm.c: Regenerate.
 342         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 343         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 344
 345 2005-07-05  Nick Clifton  <nickc@redhat.com>
 346
 347         * iq2000-asm.c: Regenerate.
 348         * ms1-asm.c: Regenerate.
 349
 350 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 351
 352         * i386-dis.c (SVME_Fixup): New.
 353         (grps): Use it for the lidt entry.
 354         (PNI_Fixup): Call OP_M rather than OP_E.
 355         (INVLPG_Fixup): Likewise.
 356
 357 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 358
 359         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 360
 361 2005-07-01  Nick Clifton  <nickc@redhat.com>
 362
 363         * a29k-dis.c: Update to ISO C90 style function declarations and
 364         fix formatting.
 365         * alpha-opc.c: Likewise.
 366         * arc-dis.c: Likewise.
 367         * arc-opc.c: Likewise.
 368         * avr-dis.c: Likewise.
 369         * cgen-asm.in: Likewise.
 370         * cgen-dis.in: Likewise.
 371         * cgen-ibld.in: Likewise.
 372         * cgen-opc.c: Likewise.
 373         * cris-dis.c: Likewise.
 374         * d10v-dis.c: Likewise.
 375         * d30v-dis.c: Likewise.
 376         * d30v-opc.c: Likewise.
 377         * dis-buf.c: Likewise.
 378         * dlx-dis.c: Likewise.
 379         * h8300-dis.c: Likewise.
 380         * h8500-dis.c: Likewise.
 381         * hppa-dis.c: Likewise.
 382         * i370-dis.c: Likewise.
 383         * i370-opc.c: Likewise.
 384         * m10200-dis.c: Likewise.
 385         * m10300-dis.c: Likewise.
 386         * m68k-dis.c: Likewise.
 387         * m88k-dis.c: Likewise.
 388         * mips-dis.c: Likewise.
 389         * mmix-dis.c: Likewise.
 390         * msp430-dis.c: Likewise.
 391         * ns32k-dis.c: Likewise.
 392         * or32-dis.c: Likewise.
 393         * or32-opc.c: Likewise.
 394         * pdp11-dis.c: Likewise.
 395         * pj-dis.c: Likewise.
 396         * s390-dis.c: Likewise.
 397         * sh-dis.c: Likewise.
 398         * sh64-dis.c: Likewise.
 399         * sparc-dis.c: Likewise.
 400         * sparc-opc.c: Likewise.
 401         * sysdep.h: Likewise.
 402         * tic30-dis.c: Likewise.
 403         * tic4x-dis.c: Likewise.
 404         * tic80-dis.c: Likewise.
 405         * v850-dis.c: Likewise.
 406         * v850-opc.c: Likewise.
 407         * vax-dis.c: Likewise.
 408         * w65-dis.c: Likewise.
 409         * z8kgen.c: Likewise.
 410
 411         * fr30-*: Regenerate.
 412         * frv-*: Regenerate.
 413         * ip2k-*: Regenerate.
 414         * iq2000-*: Regenerate.
 415         * m32r-*: Regenerate.
 416         * ms1-*: Regenerate.
 417         * openrisc-*: Regenerate.
 418         * xstormy16-*: Regenerate.
 419
 420 2005-06-23  Ben Elliston  <bje@gnu.org>
 421
 422         * m68k-dis.c: Use ISC C90.
 423         * m68k-opc.c: Formatting fixes.
 424
 425 2005-06-16  David Ung  <davidu@mips.com>
 426
 427         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 428         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 429
 430 2005-06-15  Dave Brolley  <brolley@redhat.com>
 431
 432         Contribute Morpho ms1 on behalf of Red Hat
 433         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 434         ms1-opc.h: New files, Morpho ms1 target.
 435
 436         2004-05-14  Stan Cox  <scox@redhat.com>
 437
 438         * disassemble.c (ARCH_ms1): Define.
 439         (disassembler): Handle bfd_arch_ms1
 440
 441         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 442
 443         * Makefile.am, Makefile.in: Add ms1 target.
 444         * configure.in: Ditto.
 445
 446 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 447
 448         * arm-opc.h: Delete; fold contents into ...
 449         * arm-dis.c: ... here.  Move includes of internal COFF headers
 450         next to includes of internal ELF headers.
 451         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 452         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 453         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 454         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 455         (iwmmxt_wwnames, iwmmxt_wwssnames):
 456         Make const.
 457         (regnames): Remove iWMMXt coprocessor register sets.
 458         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 459         (get_arm_regnames): Adjust fourth argument to match above changes.
 460         (set_iwmmxt_regnames): Delete.
 461         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 462         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 463         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 464         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 465         ISO syntax for function pointer calls.
 466
 467 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 468
 469         * arm-dis.c: Split up the comments describing the format codes, so
 470         that the ARM and 16-bit Thumb opcode tables each have comments
 471         preceding them that describe all the codes, and only the codes,
 472         valid in those tables.  (32-bit Thumb table is already like this.)
 473         Reorder the lists in all three comments to match the order in
 474         which the codes are implemented.
 475         Remove all forward declarations of static functions.  Convert all
 476         function definitions to ISO C format.
 477         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 478         Return nothing.
 479         (print_insn_thumb16): Remove unused case 'I'.
 480         (print_insn): Update for changed calling convention of subroutines.
 481
 482 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 483
 484         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 485         hex (but retain it being displayed as signed). Remove redundant
 486         checks. Add handling of displacements for 16-bit addressing in Intel
 487         mode.
 488
 489 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 490
 491         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 492         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 493         masking of 'rm' in 16-bit memory address handling.
 494
 495 2005-05-19  Anton Blanchard  <anton@samba.org>
 496
 497         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 498         (print_ppc_disassembler_options): Document it.
 499         * ppc-opc.c (SVC_LEV): Define.
 500         (LEV): Allow optional operand.
 501         (POWER5): Define.
 502         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 503         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 504
 505 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 506
 507         * Makefile.in:  Regenerate.
 508
 509 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 510
 511         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 512         instructions.  Adjust disassembly of some opcodes to match
 513         unified syntax.
 514         (thumb32_opcodes): New table.
 515         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 516         two-halfword branches here.
 517         (print_insn_thumb32): New function.
 518         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 519         and print_insn_thumb32.  Be consistent about order of
 520         halfwords when printing 32-bit instructions.
 521
 522 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 523
 524         PR 843
 525         * i386-dis.c (branch_v_mode): New.
 526         (indirEv): Use branch_v_mode instead of v_mode.
 527         (OP_E): Handle branch_v_mode.
 528
 529 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 530
 531         * d10v-dis.c (dis_2_short): Support 64bit host.
 532
 533 2005-05-07  Nick Clifton  <nickc@redhat.com>
 534
 535         * po/nl.po: Updated translation.
 536
 537 2005-05-07  Nick Clifton  <nickc@redhat.com>
 538
 539         * Update the address and phone number of the FSF organization in
 540         the GPL notices in the following files:
 541         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 542         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 543         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 544         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 545         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 546         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 547         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 548         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 549         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 550         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 551         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 552         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 553         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 554         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 555         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 556         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 557         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 558         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 559         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 560         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 561         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 562         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 563         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 564         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 565         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 566         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 567         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 568         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 569         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 570         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 571         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 572         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 573         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 574
 575 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 576
 577         * ia64-opc.c: Include sysdep.h before libiberty.h.
 578
 579 2005-05-05  Nick Clifton  <nickc@redhat.com>
 580
 581         * configure.in (ALL_LINGUAS): Add vi.
 582         * configure: Regenerate.
 583         * po/vi.po: New.
 584
 585 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 586
 587         * configure.in: Fix the check for basename declaration.
 588         * configure: Regenerate.
 589
 590 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 591
 592         * ppc-opc.c (RTO): Define.
 593         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 594         entries to suit PPC440.
 595
 596 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 597
 598         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 599         Add xcrypt-ctr.
 600
 601 2005-04-14  Nick Clifton  <nickc@redhat.com>
 602
 603         * po/fi.po: New translation: Finnish.
 604         * configure.in (ALL_LINGUAS): Add fi.
 605         * configure: Regenerate.
 606
 607 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 608
 609         * Makefile.am (NO_WERROR): Define.
 610         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 611         * Makefile.in: Regenerate.
 612         * aclocal.m4: Regenerate.
 613         * configure: Regenerate.
 614
 615 2005-04-04  Nick Clifton  <nickc@redhat.com>
 616
 617         * fr30-asm.c: Regenerate.
 618         * frv-asm.c: Regenerate.
 619         * iq2000-asm.c: Regenerate.
 620         * m32r-asm.c: Regenerate.
 621         * openrisc-asm.c: Regenerate.
 622
 623 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 624
 625         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 626         visible operands in Intel mode. The first operand of monitor is
 627         %rax in 64-bit mode.
 628
 629 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 630
 631         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 632         easier future additions.
 633
 634 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 635
 636         * configure.in: Check for basename.
 637         * configure: Regenerate.
 638         * config.in: Ditto.
 639
 640 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 641
 642         * i386-dis.c (SEG_Fixup): New.
 643         (Sv): New.
 644         (dis386): Use "Sv" for 0x8c and 0x8e.
 645
 646 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 647             Nick Clifton  <nickc@redhat.com>
 648
 649         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 650         function entry mask addresses.
 651         (entry_addr_occupied_slots): New variable: The number of occupied
 652         elements in entry_addr.
 653         (entry_addr_total_slots): New variable: The total number of
 654         elements in entry_addr.
 655         (parse_disassembler_options): New function.  Fills in the entry_addr
 656         array.
 657         (free_entry_array): New function.  Release the memory used by the
 658         entry addr array.  Suppressed because there is no way to call it.
 659         (is_function_entry): Check if a given address is a function's
 660         start address by looking at supplied entry mask addresses and
 661         symbol information, if available.
 662         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 663
 664 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 665
 666         * cris-dis.c (print_with_operands): Use ~31L for long instead
 667         of ~31.
 668
 669 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 670
 671         * mmix-opc.c (O): Revert the last change.
 672         (Z): Likewise.
 673
 674 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 675
 676         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 677         (Z): Likewise.
 678
 679 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 680
 681         * mmix-opc.c (O, Z): Force expression as unsigned long.
 682
 683 2005-03-18  Nick Clifton  <nickc@redhat.com>
 684
 685         * ip2k-asm.c: Regenerate.
 686         * op/opcodes.pot: Regenerate.
 687
 688 2005-03-16  Nick Clifton  <nickc@redhat.com>
 689             Ben Elliston  <bje@au.ibm.com>
 690
 691         * configure.in (werror): New switch: Add -Werror to the
 692         compiler command line.  Enabled by default.  Disable via
 693         --disable-werror.
 694         * configure: Regenerate.
 695
 696 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 697
 698         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 699         BOOKE.
 700
 701 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 702
 703         * po/es.po: Commit new Spanish translation.
 704
 705         * po/fr.po: Commit new French translation.
 706
 707 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 708
 709         * vax-dis.c: Fix spelling error
 710         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 711         of just "Entry mask: < r1 ... >"
 712
 713 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 714
 715         * arm-dis.c (arm_opcodes): Document %E and %V.
 716         Add entries for v6T2 ARM instructions:
 717         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 718         (print_insn_arm): Add support for %E and %V.
 719         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 720
 721 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 722             Alan Modra  <amodra@bigpond.net.au>
 723
 724         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 725         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 726         (SPRG_MASK): Delete.
 727         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 728         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 729         mfsprg4..7 after msprg and consolidate.
 730
 731 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 732
 733         * vax-dis.c (entry_mask_bit): New array.
 734         (print_insn_vax): Decode function entry mask.
 735
 736 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 737
 738         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 739
 740 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 741
 742         * po/opcodes.pot: Regenerate.
 743
 744 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 745
 746         * arc-dis.c (a4_decoding_class): New enum.
 747         (dsmOneArcInst): Use the enum values for the decoding class.
 748         Remove redundant case in the switch for decodingClass value 11.
 749
 750 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 751
 752         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 753         accesses.
 754         (OP_C): Consider lock prefix in non-64-bit modes.
 755
 756 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 757
 758         * cris-dis.c (format_hex): Remove ineffective warning fix.
 759         * crx-dis.c (make_instruction): Warning fix.
 760         * frv-asm.c: Regenerate.
 761
 762 2005-02-23  Nick Clifton  <nickc@redhat.com>
 763
 764         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 765         read_memory.
 766
 767         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 768
 769         * crx-dis.c (make_instruction): Move argument structure into inner
 770         scope and ensure that all of its fields are initialised before
 771         they are used.
 772
 773         * fr30-asm.c: Regenerate.
 774         * fr30-dis.c: Regenerate.
 775         * frv-asm.c: Regenerate.
 776         * frv-dis.c: Regenerate.
 777         * ip2k-asm.c: Regenerate.
 778         * ip2k-dis.c: Regenerate.
 779         * iq2000-asm.c: Regenerate.
 780         * iq2000-dis.c: Regenerate.
 781         * m32r-asm.c: Regenerate.
 782         * m32r-dis.c: Regenerate.
 783         * openrisc-asm.c: Regenerate.
 784         * openrisc-dis.c: Regenerate.
 785         * xstormy16-asm.c: Regenerate.
 786         * xstormy16-dis.c: Regenerate.
 787
 788 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 789
 790         * arc-ext.c: Warning fixes.
 791         * arc-ext.h: Likewise.
 792         * cgen-opc.c: Likewise.
 793         * ia64-gen.c: Likewise.
 794         * maxq-dis.c: Likewise.
 795         * ns32k-dis.c: Likewise.
 796         * w65-dis.c: Likewise.
 797         * ia64-asmtab.c: Regenerate.
 798
 799 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 800
 801         * fr30-desc.c: Regenerate.
 802         * fr30-desc.h: Regenerate.
 803         * fr30-opc.c: Regenerate.
 804         * fr30-opc.h: Regenerate.
 805         * frv-desc.c: Regenerate.
 806         * frv-desc.h: Regenerate.
 807         * frv-opc.c: Regenerate.
 808         * frv-opc.h: Regenerate.
 809         * ip2k-desc.c: Regenerate.
 810         * ip2k-desc.h: Regenerate.
 811         * ip2k-opc.c: Regenerate.
 812         * ip2k-opc.h: Regenerate.
 813         * iq2000-desc.c: Regenerate.
 814         * iq2000-desc.h: Regenerate.
 815         * iq2000-opc.c: Regenerate.
 816         * iq2000-opc.h: Regenerate.
 817         * m32r-desc.c: Regenerate.
 818         * m32r-desc.h: Regenerate.
 819         * m32r-opc.c: Regenerate.
 820         * m32r-opc.h: Regenerate.
 821         * m32r-opinst.c: Regenerate.
 822         * openrisc-desc.c: Regenerate.
 823         * openrisc-desc.h: Regenerate.
 824         * openrisc-opc.c: Regenerate.
 825         * openrisc-opc.h: Regenerate.
 826         * xstormy16-desc.c: Regenerate.
 827         * xstormy16-desc.h: Regenerate.
 828         * xstormy16-opc.c: Regenerate.
 829         * xstormy16-opc.h: Regenerate.
 830
 831 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 832
 833         * Makefile.am: Run "make dep-am"
 834         * Makefile.in: Regenerate.
 835
 836 2005-02-15  Nick Clifton  <nickc@redhat.com>
 837
 838         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 839         compile time warnings.
 840         (print_keyword): Likewise.
 841         (default_print_insn): Likewise.
 842
 843         * fr30-desc.c: Regenerated.
 844         * fr30-desc.h: Regenerated.
 845         * fr30-dis.c: Regenerated.
 846         * fr30-opc.c: Regenerated.
 847         * fr30-opc.h: Regenerated.
 848         * frv-desc.c: Regenerated.
 849         * frv-dis.c: Regenerated.
 850         * frv-opc.c: Regenerated.
 851         * ip2k-asm.c: Regenerated.
 852         * ip2k-desc.c: Regenerated.
 853         * ip2k-desc.h: Regenerated.
 854         * ip2k-dis.c: Regenerated.
 855         * ip2k-opc.c: Regenerated.
 856         * ip2k-opc.h: Regenerated.
 857         * iq2000-desc.c: Regenerated.
 858         * iq2000-dis.c: Regenerated.
 859         * iq2000-opc.c: Regenerated.
 860         * m32r-asm.c: Regenerated.
 861         * m32r-desc.c: Regenerated.
 862         * m32r-desc.h: Regenerated.
 863         * m32r-dis.c: Regenerated.
 864         * m32r-opc.c: Regenerated.
 865         * m32r-opc.h: Regenerated.
 866         * m32r-opinst.c: Regenerated.
 867         * openrisc-desc.c: Regenerated.
 868         * openrisc-desc.h: Regenerated.
 869         * openrisc-dis.c: Regenerated.
 870         * openrisc-opc.c: Regenerated.
 871         * openrisc-opc.h: Regenerated.
 872         * xstormy16-desc.c: Regenerated.
 873         * xstormy16-desc.h: Regenerated.
 874         * xstormy16-dis.c: Regenerated.
 875         * xstormy16-opc.c: Regenerated.
 876         * xstormy16-opc.h: Regenerated.
 877
 878 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 879
 880         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 881         address.
 882
 883 2005-02-11  Nick Clifton  <nickc@redhat.com>
 884
 885         * iq2000-asm.c: Regenerate.
 886
 887         * frv-dis.c: Regenerate.
 888
 889 2005-02-07  Jim Blandy  <jimb@redhat.com>
 890
 891         * Makefile.am (CGEN): Load guile.scm before calling the main
 892         application script.
 893         * Makefile.in: Regenerated.
 894         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 895         Simply pass the cgen-opc.scm path to ${cgen} as its first
 896         argument; ${cgen} itself now contains the '-s', or whatever is
 897         appropriate for the Scheme being used.
 898
 899 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 900
 901         * configure: Regenerate to track ../gettext.m4.
 902
 903 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 904
 905         * ia64-gen.c (NELEMS): Define.
 906         (shrink): Generate alias with missing second predicate register when
 907         opcode has two outputs and these are both predicates.
 908         * ia64-opc-i.c (FULL17): Define.
 909         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 910         here to generate output template.
 911         (TBITCM, TNATCM): Undefine after use.
 912         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 913         first input. Add ld16 aliases without ar.csd as second output. Add
 914         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 915         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 916         ar.ccv as third/fourth inputs. Consolidate through...
 917         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 918         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 919         * ia64-asmtab.c: Regenerate.
 920
 921 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 922
 923         * configure: Regenerate to track ../gettext.m4 change.
 924
 925 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 926
 927         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 928         * frv-asm.c: Rebuilt.
 929         * frv-desc.c: Rebuilt.
 930         * frv-desc.h: Rebuilt.
 931         * frv-dis.c: Rebuilt.
 932         * frv-ibld.c: Rebuilt.
 933         * frv-opc.c: Rebuilt.
 934         * frv-opc.h: Rebuilt.
 935
 936 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 937
 938         * configure: Regenerate, ../gettext.m4 was updated.
 939
 940 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 941
 942         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 943         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 944         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 945         * mips-dis.c: Ditto.
 946
 947 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 948
 949         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 950
 951 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 952
 953         * mips-dis.c (no_aliases): New disassembly option flag.
 954         (set_default_mips_dis_options): Init no_aliases to zero.
 955         (parse_mips_dis_option): Handle no-aliases option.
 956         (print_insn_mips): Ignore table entries that are aliases
 957         if no_aliases is set.
 958         (print_insn_mips16): Ditto.
 959         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 960         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 961         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 962         * mips16-opc.c (mips16_opcodes): Ditto.
 963
 964 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 965
 966         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 967         (inheritance diagram): Add missing edge.
 968         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 969         easier for the testsuite.
 970         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 971         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 972         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 973         arch_sh2a_or_sh4_up child.
 974         (sh_table): Do renaming as above.
 975         Correct comment for ldc.l for gas testsuite to read.
 976         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 977         Correct comments for movy.w and movy.l for gas testsuite to read.
 978         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 979
 980 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 981
 982         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 983
 984 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 985
 986         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 987
 988 2005-01-10  Andreas Schwab  <schwab@suse.de>
 989
 990         * disassemble.c (disassemble_init_for_target) <case
 991         bfd_arch_ia64>: Set skip_zeroes to 16.
 992         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 993
 994 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 995
 996         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 997
 998 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 999
1000         * avr-dis.c: Prettyprint. Added printing of symbol names in all
1001         memory references. Convert avr_operand() to C90 formatting.
1002
1003 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
1004
1005         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1006
1007 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
1008
1009         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1010         (no_op_insn): Initialize array with instructions that have no
1011         operands.
1012         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1013
1014 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
1015
1016         * arm-dis.c: Correct top-level comment.
1017
1018 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
1019
1020         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1021         architecuture defining the insn.
1022         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
1023         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
1024         field.
1025         Also include opcode/arm.h.
1026         * Makefile.am (arm-dis.lo): Update dependency list.
1027         * Makefile.in: Regenerate.
1028
1029 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
1030
1031         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1032         reflect the change to the short immediate syntax.
1033
1034 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
1035
1036         * or32-opc.c (debug): Warning fix.
1037         * po/POTFILES.in: Regenerate.
1038
1039         * maxq-dis.c: Formatting.
1040         (print_insn): Warning fix.
1041
1042 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
1043
1044         * arm-dis.c (WORD_ADDRESS): Define.
1045         (print_insn): Use it.  Correct big-endian end-of-section handling.
1046
1047 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
1048             Vineet Sharma      <vineets@noida.hcltech.com>
1049
1050         * maxq-dis.c: New file.
1051         * disassemble.c (ARCH_maxq): Define.
1052         (disassembler): Add 'print_insn_maxq_little' for handling maxq
1053         instructions..
1054         * configure.in: Add case for bfd_maxq_arch.
1055         * configure: Regenerate.
1056         * Makefile.am: Add support for maxq-dis.c
1057         * Makefile.in: Regenerate.
1058         * aclocal.m4: Regenerate.
1059
1060 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
1061
1062         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1063         mode.
1064         * crx-dis.c: Likewise.
1065
1066 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
1067
1068         Generally, handle CRISv32.
1069         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1070         (struct cris_disasm_data): New type.
1071         (format_reg, format_hex, cris_constraint, print_flags)
1072         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
1073         callers changed.
1074         (format_sup_reg, print_insn_crisv32_with_register_prefix)
1075         (print_insn_crisv32_without_register_prefix)
1076         (print_insn_crisv10_v32_with_register_prefix)
1077         (print_insn_crisv10_v32_without_register_prefix)
1078         (cris_parse_disassembler_options): New functions.
1079         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1080         parameter.  All callers changed.
1081         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1082         failure.
1083         (cris_constraint) <case 'Y', 'U'>: New cases.
1084         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1085         for constraint 'n'.
1086         (print_with_operands) <case 'Y'>: New case.
1087         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1088         <case 'N', 'Y', 'Q'>: New cases.
1089         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1090         (print_insn_cris_with_register_prefix)
1091         (print_insn_cris_without_register_prefix): Call
1092         cris_parse_disassembler_options.
1093         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1094         for CRISv32 and the size of immediate operands.  New v32-only
1095         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1096         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1097         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1098         Change brp to be v3..v10.
1099         (cris_support_regs): New vector.
1100         (cris_opcodes): Update head comment.  New format characters '[',
1101         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1102         Add new opcodes for v32 and adjust existing opcodes to accommodate
1103         differences to earlier variants.
1104         (cris_cond15s): New vector.
1105
1106 2004-11-04 Jan Beulich <jbeulich@novell.com>
1107
1108         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1109         (indirEb): Remove.
1110         (Mp): Use f_mode rather than none at all.
1111         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1112         replaces what previously was x_mode; x_mode now means 128-bit SSE
1113         operands.
1114         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1115         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1116         pinsrw's second operand is Edqw.
1117         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1118         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1119         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1120         mode when an operand size override is present or always suffixing.
1121         More instructions will need to be added to this group.
1122         (putop): Handle new macro chars 'C' (short/long suffix selector),
1123         'I' (Intel mode override for following macro char), and 'J' (for
1124         adding the 'l' prefix to far branches in AT&T mode). When an
1125         alternative was specified in the template, honor macro character when
1126         specified for Intel mode.
1127         (OP_E): Handle new *_mode values. Correct pointer specifications for
1128         memory operands. Consolidate output of index register.
1129         (OP_G): Handle new *_mode values.
1130         (OP_I): Handle const_1_mode.
1131         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1132         respective opcode prefix bits have been consumed.
1133         (OP_EM, OP_EX): Provide some default handling for generating pointer
1134         specifications.
1135
1136 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1137
1138         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1139         COP_INST macro.
1140
1141 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1142
1143         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1144         (getregliststring): Support HI/LO and user registers.
1145         * crx-opc.c (crx_instruction): Update data structure according to the
1146         rearrangement done in CRX opcode header file.
1147         (crx_regtab):  Likewise.
1148         (crx_optab):  Likewise.
1149         (crx_instruction): Reorder load/stor instructions, remove unsupported
1150         formats.
1151         support new Co-Processor instruction 'cpi'.
1152
1153 2004-10-27  Nick Clifton  <nickc@redhat.com>
1154
1155         * opcodes/iq2000-asm.c: Regenerate.
1156         * opcodes/iq2000-desc.c: Regenerate.
1157         * opcodes/iq2000-desc.h: Regenerate.
1158         * opcodes/iq2000-dis.c: Regenerate.
1159         * opcodes/iq2000-ibld.c: Regenerate.
1160         * opcodes/iq2000-opc.c: Regenerate.
1161         * opcodes/iq2000-opc.h: Regenerate.
1162
1163 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1164
1165         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1166         us4, us5 (respectively).
1167         Remove unsupported 'popa' instruction.
1168         Reverse operands order in store co-processor instructions.
1169
1170 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1171
1172         * Makefile.am: Run "make dep-am"
1173         * Makefile.in: Regenerate.
1174
1175 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1176
1177         * xtensa-dis.c: Use ISO C90 formatting.
1178
1179 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1180
1181         * ppc-opc.c: Revert 2004-09-09 change.
1182
1183 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1184
1185         * xtensa-dis.c (state_names): Delete.
1186         (fetch_data): Use xtensa_isa_maxlength.
1187         (print_xtensa_operand): Replace operand parameter with opcode/operand
1188         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1189         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1190         instruction bundles.  Use xmalloc instead of malloc.
1191
1192 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1193
1194         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1195         initializers.
1196
1197 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1198
1199         * crx-opc.c (crx_instruction): Support Co-processor insns.
1200         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1201         (getregliststring): Change function to use the above enum.
1202         (print_arg): Handle CO-Processor insns.
1203         (crx_cinvs): Add 'b' option to invalidate the branch-target
1204         cache.
1205
1206 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1207
1208         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1209         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1210         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1211         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1212         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1213
1214 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1215
1216         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1217         rather than add it.
1218
1219 2004-09-30  Paul Brook  <paul@codesourcery.com>
1220
1221         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1222         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1223
1224 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1225
1226         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1227         (CONFIG_STATUS_DEPENDENCIES): New.
1228         (Makefile): Removed.
1229         (config.status): Likewise.
1230         * Makefile.in: Regenerated.
1231
1232 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1233
1234         * Makefile.am: Run "make dep-am".
1235         * Makefile.in: Regenerate.
1236         * aclocal.m4: Regenerate.
1237         * configure: Regenerate.
1238         * po/POTFILES.in: Regenerate.
1239         * po/opcodes.pot: Regenerate.
1240
1241 2004-09-11  Andreas Schwab  <schwab@suse.de>
1242
1243         * configure: Rebuild.
1244
1245 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1246
1247         * ppc-opc.c (L): Make this field not optional.
1248
1249 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1250
1251         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1252         Fix parameter to 'm[t|f]csr' insns.
1253
1254 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1255
1256         * configure.in: Autoupdate to autoconf 2.59.
1257         * aclocal.m4: Rebuild with aclocal 1.4p6.
1258         * configure: Rebuild with autoconf 2.59.
1259         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1260         bfd changes for autoconf 2.59 on the way).
1261         * config.in: Rebuild with autoheader 2.59.
1262
1263 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1264
1265         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1266
1267 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1268
1269         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1270         (GRPPADLCK2): New define.
1271         (twobyte_has_modrm): True for 0xA6.
1272         (grps): GRPPADLCK2 for opcode 0xA6.
1273
1274 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1275
1276         Introduce SH2a support.
1277         * sh-opc.h (arch_sh2a_base): Renumber.
1278         (arch_sh2a_nofpu_base): Remove.
1279         (arch_sh_base_mask): Adjust.
1280         (arch_opann_mask): New.
1281         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1282         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1283         (sh_table): Adjust whitespace.
1284         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1285         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1286         instruction list throughout.
1287         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1288         of arch_sh2a in instruction list throughout.
1289         (arch_sh2e_up): Accomodate above changes.
1290         (arch_sh2_up): Ditto.
1291         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1292         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1293         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1294         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1295         * sh-opc.h (arch_sh2a_nofpu): New.
1296         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1297         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1298         instruction.
1299         2004-01-20  DJ Delorie  <dj@redhat.com>
1300         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1301         2003-12-29  DJ Delorie  <dj@redhat.com>
1302         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1303         sh_opcode_info, sh_table): Add sh2a support.
1304         (arch_op32): New, to tag 32-bit opcodes.
1305         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1306         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1307         * sh-opc.h (arch_sh2a): Add.
1308         * sh-dis.c (arch_sh2a): Handle.
1309         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1310
1311 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1312
1313         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1314
1315 2004-07-22  Nick Clifton  <nickc@redhat.com>
1316
1317         PR/280
1318         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1319         insns - this is done by objdump itself.
1320         * h8500-dis.c (print_insn_h8500): Likewise.
1321
1322 2004-07-21  Jan Beulich <jbeulich@novell.com>
1323
1324         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1325         regardless of address size prefix in effect.
1326         (ptr_reg): Size or address registers does not depend on rex64, but
1327         on the presence of an address size override.
1328         (OP_MMX): Use rex.x only for xmm registers.
1329         (OP_EM): Use rex.z only for xmm registers.
1330
1331 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1332
1333         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1334         move/branch operations to the bottom so that VR5400 multimedia
1335         instructions take precedence in disassembly.
1336
1337 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1338
1339         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1340         ISA-specific "break" encoding.
1341
1342 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1343
1344         * arm-opc.h: Fix typo in comment.
1345
1346 2004-07-11  Andreas Schwab  <schwab@suse.de>
1347
1348         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1349
1350 2004-07-09  Andreas Schwab  <schwab@suse.de>
1351
1352         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1353
1354 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1355
1356         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1357         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1358         (crx-dis.lo): New target.
1359         (crx-opc.lo): Likewise.
1360         * Makefile.in: Regenerate.
1361         * configure.in: Handle bfd_crx_arch.
1362         * configure: Regenerate.
1363         * crx-dis.c: New file.
1364         * crx-opc.c: New file.
1365         * disassemble.c (ARCH_crx): Define.
1366         (disassembler): Handle ARCH_crx.
1367
1368 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1369
1370         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1371         * ia64-asmtab.c: Regnerate.
1372
1373 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1374
1375         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1376         (extract_fxm): Don't test dialect.
1377         (XFXFXM_MASK): Include the power4 bit.
1378         (XFXM): Add p4 param.
1379         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1380
1381 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1382
1383         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1384         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1385
1386 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1387
1388         * ppc-opc.c (BH, XLBH_MASK): Define.
1389         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1390
1391 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1392
1393         * i386-dis.c (x_mode): Comment.
1394         (two_source_ops): File scope.
1395         (float_mem): Correct fisttpll and fistpll.
1396         (float_mem_mode): New table.
1397         (dofloat): Use it.
1398         (OP_E): Correct intel mode PTR output.
1399         (ptr_reg): Use open_char and close_char.
1400         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1401         operands.  Set two_source_ops.
1402
1403 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1404
1405         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1406         instead of _raw_size.
1407
1408 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1409
1410         * ia64-gen.c (in_iclass): Handle more postinc st
1411         and ld variants.
1412         * ia64-asmtab.c: Rebuilt.
1413
1414 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1415
1416         * s390-opc.txt: Correct architecture mask for some opcodes.
1417         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1418         in the esa mode as well.
1419
1420 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1421
1422         * sh-dis.c (target_arch): Make unsigned.
1423         (print_insn_sh): Replace (most of) switch with a call to
1424         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1425         * sh-opc.h: Redefine architecture flags values.
1426         Add sh3-nommu architecture.
1427         Reorganise <arch>_up macros so they make more visual sense.
1428         (SH_MERGE_ARCH_SET): Define new macro.
1429         (SH_VALID_BASE_ARCH_SET): Likewise.
1430         (SH_VALID_MMU_ARCH_SET): Likewise.
1431         (SH_VALID_CO_ARCH_SET): Likewise.
1432         (SH_VALID_ARCH_SET): Likewise.
1433         (SH_MERGE_ARCH_SET_VALID): Likewise.
1434         (SH_ARCH_SET_HAS_FPU): Likewise.
1435         (SH_ARCH_SET_HAS_DSP): Likewise.
1436         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1437         (sh_get_arch_from_bfd_mach): Add prototype.
1438         (sh_get_arch_up_from_bfd_mach): Likewise.
1439         (sh_get_bfd_mach_from_arch_set): Likewise.
1440         (sh_merge_bfd_arc): Likewise.
1441
1442 2004-05-24  Peter Barada  <peter@the-baradas.com>
1443
1444         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1445         into new match_insn_m68k function.  Loop over canidate
1446         matches and select first that completely matches.
1447         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1448         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1449         to verify addressing for MAC/EMAC.
1450         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1451         reigster halves since 'fpu' and 'spl' look misleading.
1452         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1453         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1454         first, tighten up match masks.
1455         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1456         'size' from special case code in print_insn_m68k to
1457         determine decode size of insns.
1458
1459 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1460
1461         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1462         well as when -mpower4.
1463
1464 2004-05-13  Nick Clifton  <nickc@redhat.com>
1465
1466         * po/fr.po: Updated French translation.
1467
1468 2004-05-05  Peter Barada  <peter@the-baradas.com>
1469
1470         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1471         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1472         * m68k-op.c: Switch from ColdFire chips to core variants.
1473
1474 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1475
1476         PR 147.
1477         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1478
1479 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1480
1481         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1482         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1483
1484 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1485
1486         * sh-dis.c (print_insn_sh): Print the value in constant pool
1487         as a symbol if it looks like a symbol.
1488
1489 2004-04-22  Peter Barada <peter@the-baradas.com>
1490
1491         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1492         appropriate ColdFire architectures.
1493         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1494         mask addressing.
1495         Add EMAC instructions, fix MAC instructions. Remove
1496         macmw/macml/msacmw/msacml instructions since mask addressing now
1497         supported.
1498
1499 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1500
1501         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1502         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1503         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1504         macro.  Adjust all users.
1505
1506 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1507
1508         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1509         separately.
1510
1511 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1512
1513         * m32r-asm.c: Regenerate.
1514
1515 2004-03-29  Stan Shebs  <shebs@apple.com>
1516
1517         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1518         used.
1519
1520 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1521
1522         * aclocal.m4: Regenerate.
1523         * config.in: Regenerate.
1524         * configure: Regenerate.
1525         * po/POTFILES.in: Regenerate.
1526         * po/opcodes.pot: Regenerate.
1527
1528 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1529
1530         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1531         PPC_OPERANDS_GPR_0.
1532         * ppc-opc.c (RA0): Define.
1533         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1534         (RAOPT): Rename from RAO.  Update all uses.
1535         (powerpc_opcodes): Use RA0 as appropriate.
1536
1537 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1538
1539         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1540
1541 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1542
1543         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1544
1545 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1546
1547         * i386-dis.c (GRPPLOCK): Delete.
1548         (grps): Delete GRPPLOCK entry.
1549
1550 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1551
1552         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1553         (M, Mp): Use OP_M.
1554         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1555         (GRPPADLCK): Define.
1556         (dis386): Use NOP_Fixup on "nop".
1557         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1558         (twobyte_has_modrm): Set for 0xa7.
1559         (padlock_table): Delete.  Move to..
1560         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1561         and clflush.
1562         (print_insn): Revert PADLOCK_SPECIAL code.
1563         (OP_E): Delete sfence, lfence, mfence checks.
1564
1565 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1566
1567         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1568         (INVLPG_Fixup): New function.
1569         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1570
1571 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1572
1573         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1574         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1575         (padlock_table): New struct with PadLock instructions.
1576         (print_insn): Handle PADLOCK_SPECIAL.
1577
1578 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1579
1580         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1581         (OP_E): Twiddle clflush to sfence here.
1582
1583 2004-03-08  Nick Clifton  <nickc@redhat.com>
1584
1585         * po/de.po: Updated German translation.
1586
1587 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1588
1589         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1590         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1591         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1592         accordingly.
1593
1594 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1595
1596         * frv-asm.c: Regenerate.
1597         * frv-desc.c: Regenerate.
1598         * frv-desc.h: Regenerate.
1599         * frv-dis.c: Regenerate.
1600         * frv-ibld.c: Regenerate.
1601         * frv-opc.c: Regenerate.
1602         * frv-opc.h: Regenerate.
1603
1604 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1605
1606         * frv-desc.c, frv-opc.c: Regenerate.
1607
1608 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1609
1610         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1611
1612 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1613
1614         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1615         Also correct mistake in the comment.
1616
1617 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1618
1619         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1620         ensure that double registers have even numbers.
1621         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1622         that reserved instruction 0xfffd does not decode the same
1623         as 0xfdfd (ftrv).
1624         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1625         REG_N refers to a double register.
1626         Add REG_N_B01 nibble type and use it instead of REG_NM
1627         in ftrv.
1628         Adjust the bit patterns in a few comments.
1629
1630 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1631
1632         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1633
1634 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1635
1636         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1637
1638 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1639
1640         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1641
1642 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1643
1644         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1645         mtivor32, mtivor33, mtivor34.
1646
1647 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1648
1649         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1650
1651 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1652
1653         * arm-opc.h Maverick accumulator register opcode fixes.
1654
1655 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1656
1657         * m32r-dis.c: Regenerate.
1658
1659 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1660
1661         * sh-opc.h (sh_table): "fsrra", not "fssra".
1662
1663 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1664
1665         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1666         contraints.
1667
1668 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1669
1670         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1671
1672 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1673
1674         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1675         1.  Don't print scale factor on AT&T mode when index missing.
1676
1677 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1678
1679         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1680         when loaded into XR registers.
1681
1682 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1683
1684         * frv-desc.h: Regenerate.
1685         * frv-desc.c: Regenerate.
1686         * frv-opc.c: Regenerate.
1687
1688 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1689
1690         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1691
1692 2004-01-09  Paul Brook  <paul@codesourcery.com>
1693
1694         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1695         specific opcodes.
1696
1697 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1698
1699         * Makefile.am (libopcodes_la_DEPENDENCIES)
1700         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1701         comment about the problem.
1702         * Makefile.in: Regenerate.
1703
1704 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1705
1706         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1707         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1708         cut&paste errors in shifting/truncating numerical operands.
1709         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1710         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1711         (parse_uslo16): Likewise.
1712         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1713         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1714         (parse_s12): Likewise.
1715         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1716         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1717         (parse_uslo16): Likewise.
1718         (parse_uhi16): Parse gothi and gotfuncdeschi.
1719         (parse_d12): Parse got12 and gotfuncdesc12.
1720         (parse_s12): Likewise.
1721
1722 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1723
1724         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1725         instruction which looks similar to an 'rla' instruction.
1726
1727 For older changes see ChangeLog-0203
1728 \f
1729 Local Variables:
1730 mode: change-log
1731 left-margin: 8
1732 fill-column: 74
1733 version-control: never
1734 End: