1 2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
4 * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
5 CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
6 * i386-init.h: Regenerated.
8 2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
10 * i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
11 CPU_ANY_X87_FLAGS. Add CPU_ANY_MMX_FLAGS.
12 * i386-init.h: Regenerated.
14 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
16 * arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
18 (print_insn_arc): Set insn_type information.
19 * arc-opc.c (C_CC): Add F_CLASS_COND.
20 * arc-tbl.h (bbit0, bbit1): Update subclass to COND.
21 (beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
22 (ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
23 (breq, breq_s, brge, brhs, brlo, brlt): Likewise.
24 (brne, brne_s, jeq_s, jne_s): Likewise.
26 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
28 * arc-tbl.h (neg): New instruction variant.
30 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
32 * arc-dis.c (find_format, find_format, get_auxreg)
33 (print_insn_arc): Changed.
34 * arc-ext.h (INSERT_XOP): Likewise.
36 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
38 * tic54x-dis.c (sprint_mmr): Adjust.
39 * tic54x-opc.c: Likewise.
41 2016-05-19 Alan Modra <amodra@gmail.com>
43 * ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
45 2016-05-19 Alan Modra <amodra@gmail.com>
47 * ppc-opc.c: Formatting.
49 (powerpc_opcodes <subis>): Use NSISIGNOPT.
51 2016-05-18 Maciej W. Rozycki <macro@imgtec.com>
53 * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
54 replacing references to `micromips_ase' throughout.
55 (_print_insn_mips): Don't use file-level microMIPS annotation to
56 determine the disassembly mode with the symbol table.
58 2016-05-13 Peter Bergner <bergner@vnet.ibm.com>
60 * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
62 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
64 * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
66 * mips-opc.c (D34): New macro.
67 (mips_builtin_opcodes): Define bposge32c for DSPr3.
69 2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
71 * i386-dis.c (prefix_table): Add RDPID instruction.
72 * i386-gen.c (cpu_flag_init): Add RDPID flag.
73 (cpu_flags): Add RDPID bitfield.
74 * i386-opc.h (enum): Add RDPID element.
75 (i386_cpu_flags): Add RDPID field.
76 * i386-opc.tbl: Add RDPID instruction.
77 * i386-init.h: Regenerate.
78 * i386-tbl.h: Regenerate.
80 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
82 * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
83 branch type of a symbol.
84 (print_insn): Likewise.
86 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
88 * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
89 Mainline Security Extensions instructions.
90 (thumb_opcodes): Add entries for narrow ARMv8-M Security
91 Extensions instructions.
92 (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
94 (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
97 2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
99 * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
101 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
103 * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
104 (arcExtMap_genOpcode): Likewise.
105 * arc-opc.c (arg_32bit_rc): Define new variable.
106 (arg_32bit_u6): Likewise.
107 (arg_32bit_limm): Likewise.
109 2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
111 * aarch64-gen.c (VERIFIER): Define.
112 * aarch64-opc.c (VERIFIER): Define.
113 (verify_ldpsw): Use static linkage.
114 * aarch64-opc.h (verify_ldpsw): Remove.
115 * aarch64-tbl.h: Use VERIFIER for verifiers.
117 2016-04-28 Nick Clifton <nickc@redhat.com>
120 * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
121 * aarch64-opc.c (verify_ldpsw): New function.
122 * aarch64-opc.h (verify_ldpsw): New prototype.
123 * aarch64-tbl.h: Add initialiser for verifier field.
124 (LDPSW): Set verifier to verify_ldpsw.
126 2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
130 * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
131 smaller than address size.
133 2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
135 * alpha-dis.c: Regenerate.
136 * crx-dis.c: Likewise.
137 * disassemble.c: Likewise.
138 * epiphany-opc.c: Likewise.
139 * fr30-opc.c: Likewise.
140 * frv-opc.c: Likewise.
141 * ip2k-opc.c: Likewise.
142 * iq2000-opc.c: Likewise.
143 * lm32-opc.c: Likewise.
144 * lm32-opinst.c: Likewise.
145 * m32c-opc.c: Likewise.
146 * m32r-opc.c: Likewise.
147 * m32r-opinst.c: Likewise.
148 * mep-opc.c: Likewise.
149 * mt-opc.c: Likewise.
150 * or1k-opc.c: Likewise.
151 * or1k-opinst.c: Likewise.
152 * tic80-opc.c: Likewise.
153 * xc16x-opc.c: Likewise.
154 * xstormy16-opc.c: Likewise.
156 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
158 * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
159 fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
160 calcsd, and calcxd instructions.
161 * arc-opc.c (insert_nps_bitop_size): Delete.
162 (extract_nps_bitop_size): Delete.
163 (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
164 (extract_nps_qcmp_m3): Define.
165 (extract_nps_qcmp_m2): Define.
166 (extract_nps_qcmp_m1): Define.
167 (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
168 (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
169 (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
170 NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
171 NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
174 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
176 * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
178 2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
180 * Makefile.in: Regenerated with automake 1.11.6.
181 * aclocal.m4: Likewise.
183 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
185 * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
187 * arc-opc.c (insert_nps_cmem_uimm16): New function.
188 (extract_nps_cmem_uimm16): New function.
189 (arc_operands): Add NPS_XLDST_UIMM16 operand.
191 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
193 * arc-dis.c (arc_insn_length): New function.
194 (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
195 (find_format): Change insnLen parameter to unsigned.
197 2016-04-13 Nick Clifton <nickc@redhat.com>
200 * v850-opc.c (v850_opcodes): Correct masks for long versions of
201 the LD.B and LD.BU instructions.
203 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
205 * arc-dis.c (find_format): Check for extension flags.
206 (print_flags): New function.
207 (print_insn_arc): Update for .extCondCode, .extCoreRegister and
209 * arc-ext.c (arcExtMap_coreRegName): Use
210 LAST_EXTENSION_CORE_REGISTER.
211 (arcExtMap_coreReadWrite): Likewise.
212 (dump_ARC_extmap): Update printing.
213 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
214 (arc_aux_regs): Add cpu field.
215 * arc-regs.h: Add cpu field, lower case name aux registers.
217 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
219 * arc-tbl.h: Add rtsc, sleep with no arguments.
221 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
223 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
225 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
226 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
227 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
228 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
229 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
230 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
231 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
232 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
233 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
234 (arc_opcode arc_opcodes): Null terminate the array.
235 (arc_num_opcodes): Remove.
236 * arc-ext.h (INSERT_XOP): Define.
237 (extInstruction_t): Likewise.
238 (arcExtMap_instName): Delete.
239 (arcExtMap_insn): New function.
240 (arcExtMap_genOpcode): Likewise.
241 * arc-ext.c (ExtInstruction): Remove.
242 (create_map): Zero initialize instruction fields.
243 (arcExtMap_instName): Remove.
244 (arcExtMap_insn): New function.
245 (dump_ARC_extmap): More info while debuging.
246 (arcExtMap_genOpcode): New function.
247 * arc-dis.c (find_format): New function.
248 (print_insn_arc): Use find_format.
249 (arc_get_disassembler): Enable dump_ARC_extmap only when
252 2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
254 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
255 instruction bits out.
257 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
259 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
260 * arc-opc.c (arc_flag_operands): Add new flags.
261 (arc_flag_classes): Add new classes.
263 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
265 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
267 2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
269 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
270 encode1, rflt, crc16, and crc32 instructions.
271 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
272 (arc_flag_classes): Add C_NPS_R.
273 (insert_nps_bitop_size_2b): New function.
274 (extract_nps_bitop_size_2b): Likewise.
275 (insert_nps_bitop_uimm8): Likewise.
276 (extract_nps_bitop_uimm8): Likewise.
277 (arc_operands): Add new operand entries.
279 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
281 * arc-regs.h: Add a new subclass field. Add double assist
282 accumulator register values.
283 * arc-tbl.h: Use DPA subclass to mark the double assist
284 instructions. Use DPX/SPX subclas to mark the FPX instructions.
285 * arc-opc.c (RSP): Define instead of SP.
286 (arc_aux_regs): Add the subclass field.
288 2016-04-05 Jiong Wang <jiong.wang@arm.com>
290 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
292 2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
294 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
297 2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
299 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
300 issues. No functional changes.
302 2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
304 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
305 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
306 (RTT): Remove duplicate.
307 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
308 (PCT_CONFIG*): Remove.
309 (D1L, D1H, D2H, D2L): Define.
311 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
313 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
315 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
317 * arc-tbl.h (invld07): Remove.
318 * arc-ext-tbl.h: New file.
319 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
320 * arc-opc.c (arc_opcodes): Add ext-tbl include.
322 2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
324 Fix -Wstack-usage warnings.
325 * aarch64-dis.c (print_operands): Substitute size.
326 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
328 2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
330 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
331 to get a proper diagnostic when an invalid ASR register is used.
333 2016-03-22 Nick Clifton <nickc@redhat.com>
335 * configure: Regenerate.
337 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
339 * arc-nps400-tbl.h: New file.
340 * arc-opc.c: Add top level comment.
341 (insert_nps_3bit_dst): New function.
342 (extract_nps_3bit_dst): New function.
343 (insert_nps_3bit_src2): New function.
344 (extract_nps_3bit_src2): New function.
345 (insert_nps_bitop_size): New function.
346 (extract_nps_bitop_size): New function.
347 (arc_flag_operands): Add nps400 entries.
348 (arc_flag_classes): Add nps400 entries.
349 (arc_operands): Add nps400 entries.
350 (arc_opcodes): Add nps400 include.
352 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
354 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
355 the new class enum values.
357 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
359 * arc-dis.c (print_insn_arc): Handle nps400.
361 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
363 * arc-opc.c (BASE): Delete.
365 2016-03-18 Nick Clifton <nickc@redhat.com>
368 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
369 of MOV insn that aliases an ORR insn.
371 2016-03-16 Jiong Wang <jiong.wang@arm.com>
373 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
375 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
377 * mcore-opc.h: Add const qualifiers.
378 * microblaze-opc.h (struct op_code_struct): Likewise.
379 * sh-opc.h: Likewise.
380 * tic4x-dis.c (tic4x_print_indirect): Likewise.
381 (tic4x_print_op): Likewise.
383 2016-03-02 Alan Modra <amodra@gmail.com>
385 * or1k-desc.h: Regenerate.
386 * fr30-ibld.c: Regenerate.
387 * rl78-decode.c: Regenerate.
389 2016-03-01 Nick Clifton <nickc@redhat.com>
392 * rl78-dis.c (print_insn_rl78_common): Fix typo.
394 2016-02-24 Renlin Li <renlin.li@arm.com>
396 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
397 (print_insn_coprocessor): Support fp16 instructions.
399 2016-02-24 Renlin Li <renlin.li@arm.com>
401 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
404 2016-02-24 Renlin Li <renlin.li@arm.com>
406 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
407 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
409 2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
411 * i386-dis.c (print_insn): Parenthesize expression to prevent
415 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
416 Janek van Oirschot <jvanoirs@synopsys.com>
418 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
421 2016-02-04 Nick Clifton <nickc@redhat.com>
424 * msp430-dis.c (print_insn_msp430): Add a special case for
425 decoding an RRC instruction with the ZC bit set in the extension
428 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
430 * cgen-ibld.in (insert_normal): Rework calculation of shift.
431 * epiphany-ibld.c: Regenerate.
432 * fr30-ibld.c: Regenerate.
433 * frv-ibld.c: Regenerate.
434 * ip2k-ibld.c: Regenerate.
435 * iq2000-ibld.c: Regenerate.
436 * lm32-ibld.c: Regenerate.
437 * m32c-ibld.c: Regenerate.
438 * m32r-ibld.c: Regenerate.
439 * mep-ibld.c: Regenerate.
440 * mt-ibld.c: Regenerate.
441 * or1k-ibld.c: Regenerate.
442 * xc16x-ibld.c: Regenerate.
443 * xstormy16-ibld.c: Regenerate.
445 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
447 * epiphany-dis.c: Regenerated from latest cpu files.
449 2016-02-01 Michael McConville <mmcco@mykolab.com>
451 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
454 2016-01-25 Renlin Li <renlin.li@arm.com>
456 * arm-dis.c (mapping_symbol_for_insn): New function.
457 (find_ifthen_state): Call mapping_symbol_for_insn().
459 2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
461 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
462 of MSR UAO immediate operand.
464 2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
466 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
469 2016-01-17 Alan Modra <amodra@gmail.com>
471 * configure: Regenerate.
473 2016-01-14 Nick Clifton <nickc@redhat.com>
475 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
476 instructions that can support stack pointer operations.
477 * rl78-decode.c: Regenerate.
478 * rl78-dis.c: Fix display of stack pointer in MOVW based
481 2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
483 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
484 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
485 erxtatus_el1 and erxaddr_el1.
487 2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
489 * arm-dis.c (arm_opcodes): Add "esb".
490 (thumb_opcodes): Likewise.
492 2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
494 * ppc-opc.c <xscmpnedp>: Delete.
495 <xvcmpnedp>: Likewise.
496 <xvcmpnedp.>: Likewise.
497 <xvcmpnesp>: Likewise.
498 <xvcmpnesp.>: Likewise.
500 2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
503 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
506 2016-01-01 Alan Modra <amodra@gmail.com>
508 Update year range in copyright notice of all files.
510 For older changes see ChangeLog-2015
512 Copyright (C) 2016 Free Software Foundation, Inc.
514 Copying and distribution of this file, with or without modification,
515 are permitted in any medium without royalty provided the copyright
516 notice and this notice are preserved.
522 version-control: never