Correct powerpc spe opcode lookup
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2018-05-08 Alan Modra <amodra@gmail.com>
2
3 * ppc-dis.c (PPC_OPCD_SEGS): Define using PPC_OP.
4 (VLE_OPCD_SEGS, SPE2_OPCD_SEGS): Similarly, using macros used to
5 partition opcode space for index lookup.
6
7 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
8
9 * ppc-dis.c (print_insn_powerpc) <insn_is_short>: Replace this...
10 <insn_length>: ...with this. Update usage.
11 Remove duplicate call to *info->memory_error_func.
12
13 2018-05-07 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
14 H.J. Lu <hongjiu.lu@intel.com>
15
16 * i386-dis.c (Gva): New.
17 (enum): Add PREFIX_0F38F8, PREFIX_0F38F9,
18 MOD_0F38F8_PREFIX_2, MOD_0F38F9_PREFIX_0.
19 (prefix_table): New instructions (see prefix above).
20 (mod_table): New instructions (see prefix above).
21 (OP_G): Handle va_mode.
22 * i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
23 CPU_MOVDIR64B_FLAGS.
24 (cpu_flags): Add CpuMOVDIRI and CpuMOVDIR64B.
25 * i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
26 (i386_cpu_flags): Add cpumovdiri and cpumovdir64b.
27 * i386-opc.tbl: Add movidir{i,64b}.
28 * i386-init.h: Regenerated.
29 * i386-tbl.h: Likewise.
30
31 2018-05-07 H.J. Lu <hongjiu.lu@intel.com>
32
33 * i386-gen.c (opcode_modifiers): Replace AddrPrefixOp0 with
34 AddrPrefixOpReg.
35 * i386-opc.h (AddrPrefixOp0): Renamed to ...
36 (AddrPrefixOpReg): This.
37 (i386_opcode_modifier): Rename addrprefixop0 to addrprefixopreg.
38 * i386-opc.tbl: Replace AddrPrefixOp0 with AddrPrefixOpReg.
39
40 2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
41
42 * ppc-opc.c (powerpc_num_opcodes): Change type to unsigned.
43 (vle_num_opcodes): Likewise.
44 (spe2_num_opcodes): Likewise.
45 * ppc-dis.c (disassemble_init_powerpc) <powerpc_opcd_indices>: Rewrite
46 initialization loop.
47 (disassemble_init_powerpc) <vle_opcd_indices>: Likewise.
48 (disassemble_init_powerpc) <spe2_opcd_indices>: Likewise. Initialize
49 only once.
50
51 2018-05-01 Tamar Christina <tamar.christina@arm.com>
52
53 * aarch64-dis.c (aarch64_opcode_decode): Moved memory clear code.
54
55 2018-04-30 Francois H. Theron <francois.theron@netronome.com>
56
57 Makefile.am: Added nfp-dis.c.
58 configure.ac: Added bfd_nfp_arch.
59 disassemble.h: Added print_insn_nfp prototype.
60 disassemble.c: Added ARCH_nfp and call to print_insn_nfp
61 nfp-dis.c: New, for NFP support.
62 po/POTFILES.in: Added nfp-dis.c to the list.
63 Makefile.in: Regenerate.
64 configure: Regenerate.
65
66 2018-04-26 Jan Beulich <jbeulich@suse.com>
67
68 * i386-opc.tbl: Fold various non-memory operand AVX512VL
69 templates into their base ones.
70 * i386-tlb.h: Re-generate.
71
72 2018-04-26 Jan Beulich <jbeulich@suse.com>
73
74 * i386-gen.c (cpu_flag_init): Use CPU_XOP_FLAGS for
75 CPU_BDVER1_FLAGS. Use CPU_AVX2_FLAGS for CPU_ZNVER1_FLAGS. Use
76 CPU_AVX_FLAGS for CPU_BTVER1_FLAGS. Add CPU_XSAVE_FLAGS to
77 CPU_LWP_FLAGS, CPU_AVX_FLAGS, CPU_MPX_FLAGS, and CPU_OSPKE_FLAGS.
78 * i386-init.h: Re-generate.
79
80 2018-04-26 Jan Beulich <jbeulich@suse.com>
81
82 * i386-gen.c (cpu_flag_init): Drop all uses of CpuRegMMX,
83 CpuRegXMM, CpuRegYMM, CpuRegZMM, and CpuRegMask. Use
84 CPU_AVX2_FLAGS for CPU_AVX512F_FLAGS and drop bogus comment.
85 Don't use CPU_AVX2_FLAGS for CPU_AVX512VL_FLAGS and drop bogus
86 comment.
87 (cpu_flags): Drop CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
88 and CpuRegMask.
89 * i386-opc.h: CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM,
90 CpuRegMask: Delete.
91 (union i386_cpu_flags): Remove cpuregmmx, cpuregxmm, cpuregymm,
92 cpuregzmm, and cpuregmask.
93 * i386-init.h: Re-generate.
94 * i386-tbl.h: Re-generate.
95
96 2018-04-26 Jan Beulich <jbeulich@suse.com>
97
98 * i386-gen.c (cpu_flag_init): CPU_I586_FLAGS inherits Cpu387 only.
99 CPU_287_FLAGS is Cpu287 only. CPU_387_FLAGS is Cpu387 only.
100 * i386-init.h: Re-generate.
101
102 2018-04-26 Jan Beulich <jbeulich@suse.com>
103
104 * i386-gen.c (VexImmExt): Delete.
105 * i386-opc.h (VexImmExt, veximmext): Delete.
106 * i386-opc.tbl: Drop all VexImmExt uses.
107 * i386-tlb.h: Re-generate.
108
109 2018-04-25 Jan Beulich <jbeulich@suse.com>
110
111 * i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
112 register-only forms.
113 * i386-tlb.h: Re-generate.
114
115 2018-04-25 Tamar Christina <tamar.christina@arm.com>
116
117 * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
118
119 2018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
120
121 * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
122 PREFIX_0F1C.
123 * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
124 (cpu_flags): Add CpuCLDEMOTE.
125 * i386-init.h: Regenerate.
126 * i386-opc.h (enum): Add CpuCLDEMOTE,
127 (i386_cpu_flags): Add cpucldemote.
128 * i386-opc.tbl: Add cldemote.
129 * i386-tbl.h: Regenerate.
130
131 2018-04-16 Alan Modra <amodra@gmail.com>
132
133 * Makefile.am: Remove sh5 and sh64 support.
134 * configure.ac: Likewise.
135 * disassemble.c: Likewise.
136 * disassemble.h: Likewise.
137 * sh-dis.c: Likewise.
138 * sh64-dis.c: Delete.
139 * sh64-opc.c: Delete.
140 * sh64-opc.h: Delete.
141 * Makefile.in: Regenerate.
142 * configure: Regenerate.
143 * po/POTFILES.in: Regenerate.
144
145 2018-04-16 Alan Modra <amodra@gmail.com>
146
147 * Makefile.am: Remove w65 support.
148 * configure.ac: Likewise.
149 * disassemble.c: Likewise.
150 * disassemble.h: Likewise.
151 * w65-dis.c: Delete.
152 * w65-opc.h: Delete.
153 * Makefile.in: Regenerate.
154 * configure: Regenerate.
155 * po/POTFILES.in: Regenerate.
156
157 2018-04-16 Alan Modra <amodra@gmail.com>
158
159 * configure.ac: Remove we32k support.
160 * configure: Regenerate.
161
162 2018-04-16 Alan Modra <amodra@gmail.com>
163
164 * Makefile.am: Remove m88k support.
165 * configure.ac: Likewise.
166 * disassemble.c: Likewise.
167 * disassemble.h: Likewise.
168 * m88k-dis.c: Delete.
169 * Makefile.in: Regenerate.
170 * configure: Regenerate.
171 * po/POTFILES.in: Regenerate.
172
173 2018-04-16 Alan Modra <amodra@gmail.com>
174
175 * Makefile.am: Remove i370 support.
176 * configure.ac: Likewise.
177 * disassemble.c: Likewise.
178 * disassemble.h: Likewise.
179 * i370-dis.c: Delete.
180 * i370-opc.c: Delete.
181 * Makefile.in: Regenerate.
182 * configure: Regenerate.
183 * po/POTFILES.in: Regenerate.
184
185 2018-04-16 Alan Modra <amodra@gmail.com>
186
187 * Makefile.am: Remove h8500 support.
188 * configure.ac: Likewise.
189 * disassemble.c: Likewise.
190 * disassemble.h: Likewise.
191 * h8500-dis.c: Delete.
192 * h8500-opc.h: Delete.
193 * Makefile.in: Regenerate.
194 * configure: Regenerate.
195 * po/POTFILES.in: Regenerate.
196
197 2018-04-16 Alan Modra <amodra@gmail.com>
198
199 * configure.ac: Remove tahoe support.
200 * configure: Regenerate.
201
202 2018-04-15 H.J. Lu <hongjiu.lu@intel.com>
203
204 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
205 umwait.
206 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
207 64-bit mode.
208 * i386-tbl.h: Regenerated.
209
210 2018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
211
212 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
213 PREFIX_MOD_1_0FAE_REG_6.
214 (va_mode): New.
215 (OP_E_register): Use va_mode.
216 * i386-dis-evex.h (prefix_table):
217 New instructions (see prefixes above).
218 * i386-gen.c (cpu_flag_init): Add WAITPKG.
219 (cpu_flags): Likewise.
220 * i386-opc.h (enum): Likewise.
221 (i386_cpu_flags): Likewise.
222 * i386-opc.tbl: Add umonitor, umwait, tpause.
223 * i386-init.h: Regenerate.
224 * i386-tbl.h: Likewise.
225
226 2018-04-11 Alan Modra <amodra@gmail.com>
227
228 * opcodes/i860-dis.c: Delete.
229 * opcodes/i960-dis.c: Delete.
230 * Makefile.am: Remove i860 and i960 support.
231 * configure.ac: Likewise.
232 * disassemble.c: Likewise.
233 * disassemble.h: Likewise.
234 * Makefile.in: Regenerate.
235 * configure: Regenerate.
236 * po/POTFILES.in: Regenerate.
237
238 2018-04-04 H.J. Lu <hongjiu.lu@intel.com>
239
240 PR binutils/23025
241 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
242 to 0.
243 (print_insn): Clear vex instead of vex.evex.
244
245 2018-04-04 Nick Clifton <nickc@redhat.com>
246
247 * po/es.po: Updated Spanish translation.
248
249 2018-03-28 Jan Beulich <jbeulich@suse.com>
250
251 * i386-gen.c (opcode_modifiers): Delete VecESize.
252 * i386-opc.h (VecESize): Delete.
253 (struct i386_opcode_modifier): Delete vecesize.
254 * i386-opc.tbl: Drop VecESize.
255 * i386-tlb.h: Re-generate.
256
257 2018-03-28 Jan Beulich <jbeulich@suse.com>
258
259 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
260 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
261 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
262 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
263 * i386-tlb.h: Re-generate.
264
265 2018-03-28 Jan Beulich <jbeulich@suse.com>
266
267 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
268 Fold AVX512 forms
269 * i386-tlb.h: Re-generate.
270
271 2018-03-28 Jan Beulich <jbeulich@suse.com>
272
273 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
274 (vex_len_table): Drop Y for vcvt*2si.
275 (putop): Replace plain 'Y' handling by abort().
276
277 2018-03-28 Nick Clifton <nickc@redhat.com>
278
279 PR 22988
280 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
281 instructions with only a base address register.
282 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
283 handle AARHC64_OPND_SVE_ADDR_R.
284 (aarch64_print_operand): Likewise.
285 * aarch64-asm-2.c: Regenerate.
286 * aarch64_dis-2.c: Regenerate.
287 * aarch64-opc-2.c: Regenerate.
288
289 2018-03-22 Jan Beulich <jbeulich@suse.com>
290
291 * i386-opc.tbl: Drop VecESize from register only insn forms and
292 memory forms not allowing broadcast.
293 * i386-tlb.h: Re-generate.
294
295 2018-03-22 Jan Beulich <jbeulich@suse.com>
296
297 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
298 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
299 sha256*): Drop Disp<N>.
300
301 2018-03-22 Jan Beulich <jbeulich@suse.com>
302
303 * i386-dis.c (EbndS, bnd_swap_mode): New.
304 (prefix_table): Use EbndS.
305 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
306 * i386-opc.tbl (bndmov): Move misplaced Load.
307 * i386-tlb.h: Re-generate.
308
309 2018-03-22 Jan Beulich <jbeulich@suse.com>
310
311 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
312 templates allowing memory operands and folded ones for register
313 only flavors.
314 * i386-tlb.h: Re-generate.
315
316 2018-03-22 Jan Beulich <jbeulich@suse.com>
317
318 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
319 256-bit templates. Drop redundant leftover Disp<N>.
320 * i386-tlb.h: Re-generate.
321
322 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
323
324 * riscv-opc.c (riscv_insn_types): New.
325
326 2018-03-13 Nick Clifton <nickc@redhat.com>
327
328 * po/pt_BR.po: Updated Brazilian Portuguese translation.
329
330 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
331
332 * i386-opc.tbl: Add Optimize to clr.
333 * i386-tbl.h: Regenerated.
334
335 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
336
337 * i386-gen.c (opcode_modifiers): Remove OldGcc.
338 * i386-opc.h (OldGcc): Removed.
339 (i386_opcode_modifier): Remove oldgcc.
340 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
341 instructions for old (<= 2.8.1) versions of gcc.
342 * i386-tbl.h: Regenerated.
343
344 2018-03-08 Jan Beulich <jbeulich@suse.com>
345
346 * i386-opc.h (EVEXDYN): New.
347 * i386-opc.tbl: Fold various AVX512VL templates.
348 * i386-tlb.h: Re-generate.
349
350 2018-03-08 Jan Beulich <jbeulich@suse.com>
351
352 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
353 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
354 vpexpandd, vpexpandq): Fold AFX512VF templates.
355 * i386-tlb.h: Re-generate.
356
357 2018-03-08 Jan Beulich <jbeulich@suse.com>
358
359 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
360 Fold 128- and 256-bit VEX-encoded templates.
361 * i386-tlb.h: Re-generate.
362
363 2018-03-08 Jan Beulich <jbeulich@suse.com>
364
365 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
366 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
367 vpexpandd, vpexpandq): Fold AVX512F templates.
368 * i386-tlb.h: Re-generate.
369
370 2018-03-08 Jan Beulich <jbeulich@suse.com>
371
372 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
373 64-bit templates. Drop Disp<N>.
374 * i386-tlb.h: Re-generate.
375
376 2018-03-08 Jan Beulich <jbeulich@suse.com>
377
378 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
379 and 256-bit templates.
380 * i386-tlb.h: Re-generate.
381
382 2018-03-08 Jan Beulich <jbeulich@suse.com>
383
384 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
385 * i386-tlb.h: Re-generate.
386
387 2018-03-08 Jan Beulich <jbeulich@suse.com>
388
389 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
390 Drop NoAVX.
391 * i386-tlb.h: Re-generate.
392
393 2018-03-08 Jan Beulich <jbeulich@suse.com>
394
395 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
396 * i386-tlb.h: Re-generate.
397
398 2018-03-08 Jan Beulich <jbeulich@suse.com>
399
400 * i386-gen.c (opcode_modifiers): Delete FloatD.
401 * i386-opc.h (FloatD): Delete.
402 (struct i386_opcode_modifier): Delete floatd.
403 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
404 FloatD by D.
405 * i386-tlb.h: Re-generate.
406
407 2018-03-08 Jan Beulich <jbeulich@suse.com>
408
409 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
410
411 2018-03-08 Jan Beulich <jbeulich@suse.com>
412
413 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
414 * i386-tlb.h: Re-generate.
415
416 2018-03-08 Jan Beulich <jbeulich@suse.com>
417
418 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
419 forms.
420 * i386-tlb.h: Re-generate.
421
422 2018-03-07 Alan Modra <amodra@gmail.com>
423
424 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
425 bfd_arch_rs6000.
426 * disassemble.h (print_insn_rs6000): Delete.
427 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
428 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
429 (print_insn_rs6000): Delete.
430
431 2018-03-03 Alan Modra <amodra@gmail.com>
432
433 * sysdep.h (opcodes_error_handler): Define.
434 (_bfd_error_handler): Declare.
435 * Makefile.am: Remove stray #.
436 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
437 EDIT" comment.
438 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
439 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
440 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
441 opcodes_error_handler to print errors. Standardize error messages.
442 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
443 and include opintl.h.
444 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
445 * i386-gen.c: Standardize error messages.
446 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
447 * Makefile.in: Regenerate.
448 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
449 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
450 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
451 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
452 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
453 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
454 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
455 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
456 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
457 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
458 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
459 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
460 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
461
462 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
463
464 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
465 vpsub[bwdq] instructions.
466 * i386-tbl.h: Regenerated.
467
468 2018-03-01 Alan Modra <amodra@gmail.com>
469
470 * configure.ac (ALL_LINGUAS): Sort.
471 * configure: Regenerate.
472
473 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
474
475 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
476 macro by assignements.
477
478 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
479
480 PR gas/22871
481 * i386-gen.c (opcode_modifiers): Add Optimize.
482 * i386-opc.h (Optimize): New enum.
483 (i386_opcode_modifier): Add optimize.
484 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
485 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
486 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
487 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
488 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
489 vpxord and vpxorq.
490 * i386-tbl.h: Regenerated.
491
492 2018-02-26 Alan Modra <amodra@gmail.com>
493
494 * crx-dis.c (getregliststring): Allocate a large enough buffer
495 to silence false positive gcc8 warning.
496
497 2018-02-22 Shea Levy <shea@shealevy.com>
498
499 * disassemble.c (ARCH_riscv): Define if ARCH_all.
500
501 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
502
503 * i386-opc.tbl: Add {rex},
504 * i386-tbl.h: Regenerated.
505
506 2018-02-20 Maciej W. Rozycki <macro@mips.com>
507
508 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
509 (mips16_opcodes): Replace `M' with `m' for "restore".
510
511 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
512
513 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
514
515 2018-02-13 Maciej W. Rozycki <macro@mips.com>
516
517 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
518 variable to `function_index'.
519
520 2018-02-13 Nick Clifton <nickc@redhat.com>
521
522 PR 22823
523 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
524 about truncation of printing.
525
526 2018-02-12 Henry Wong <henry@stuffedcow.net>
527
528 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
529
530 2018-02-05 Nick Clifton <nickc@redhat.com>
531
532 * po/pt_BR.po: Updated Brazilian Portuguese translation.
533
534 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
535
536 * i386-dis.c (enum): Add pconfig.
537 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
538 (cpu_flags): Add CpuPCONFIG.
539 * i386-opc.h (enum): Add CpuPCONFIG.
540 (i386_cpu_flags): Add cpupconfig.
541 * i386-opc.tbl: Add PCONFIG instruction.
542 * i386-init.h: Regenerate.
543 * i386-tbl.h: Likewise.
544
545 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
546
547 * i386-dis.c (enum): Add PREFIX_0F09.
548 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
549 (cpu_flags): Add CpuWBNOINVD.
550 * i386-opc.h (enum): Add CpuWBNOINVD.
551 (i386_cpu_flags): Add cpuwbnoinvd.
552 * i386-opc.tbl: Add WBNOINVD instruction.
553 * i386-init.h: Regenerate.
554 * i386-tbl.h: Likewise.
555
556 2018-01-17 Jim Wilson <jimw@sifive.com>
557
558 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
559
560 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
561
562 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
563 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
564 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
565 (cpu_flags): Add CpuIBT, CpuSHSTK.
566 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
567 (i386_cpu_flags): Add cpuibt, cpushstk.
568 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
569 * i386-init.h: Regenerate.
570 * i386-tbl.h: Likewise.
571
572 2018-01-16 Nick Clifton <nickc@redhat.com>
573
574 * po/pt_BR.po: Updated Brazilian Portugese translation.
575 * po/de.po: Updated German translation.
576
577 2018-01-15 Jim Wilson <jimw@sifive.com>
578
579 * riscv-opc.c (match_c_nop): New.
580 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
581
582 2018-01-15 Nick Clifton <nickc@redhat.com>
583
584 * po/uk.po: Updated Ukranian translation.
585
586 2018-01-13 Nick Clifton <nickc@redhat.com>
587
588 * po/opcodes.pot: Regenerated.
589
590 2018-01-13 Nick Clifton <nickc@redhat.com>
591
592 * configure: Regenerate.
593
594 2018-01-13 Nick Clifton <nickc@redhat.com>
595
596 2.30 branch created.
597
598 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
599
600 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
601 * i386-tbl.h: Regenerate.
602
603 2018-01-10 Jan Beulich <jbeulich@suse.com>
604
605 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
606 * i386-tbl.h: Re-generate.
607
608 2018-01-10 Jan Beulich <jbeulich@suse.com>
609
610 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
611 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
612 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
613 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
614 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
615 Disp8MemShift of AVX512VL forms.
616 * i386-tbl.h: Re-generate.
617
618 2018-01-09 Jim Wilson <jimw@sifive.com>
619
620 * riscv-dis.c (maybe_print_address): If base_reg is zero,
621 then the hi_addr value is zero.
622
623 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
624
625 * arm-dis.c (arm_opcodes): Add csdb.
626 (thumb32_opcodes): Add csdb.
627
628 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
629
630 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
631 * aarch64-asm-2.c: Regenerate.
632 * aarch64-dis-2.c: Regenerate.
633 * aarch64-opc-2.c: Regenerate.
634
635 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
636
637 PR gas/22681
638 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
639 Remove AVX512 vmovd with 64-bit operands.
640 * i386-tbl.h: Regenerated.
641
642 2018-01-05 Jim Wilson <jimw@sifive.com>
643
644 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
645 jalr.
646
647 2018-01-03 Alan Modra <amodra@gmail.com>
648
649 Update year range in copyright notice of all files.
650
651 2018-01-02 Jan Beulich <jbeulich@suse.com>
652
653 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
654 and OPERAND_TYPE_REGZMM entries.
655
656 For older changes see ChangeLog-2017
657 \f
658 Copyright (C) 2018 Free Software Foundation, Inc.
659
660 Copying and distribution of this file, with or without modification,
661 are permitted in any medium without royalty provided the copyright
662 notice and this notice are preserved.
663
664 Local Variables:
665 mode: change-log
666 left-margin: 8
667 fill-column: 74
668 version-control: never
669 End:
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