x86: fold a few XOP templates
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2018-03-22 Jan Beulich <jbeulich@suse.com>
2
3 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
4 256-bit templates. Drop redundant leftover Disp<N>.
5 * i386-tlb.h: Re-generate.
6
7 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
8
9 * riscv-opc.c (riscv_insn_types): New.
10
11 2018-03-13 Nick Clifton <nickc@redhat.com>
12
13 * po/pt_BR.po: Updated Brazilian Portuguese translation.
14
15 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
16
17 * i386-opc.tbl: Add Optimize to clr.
18 * i386-tbl.h: Regenerated.
19
20 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
21
22 * i386-gen.c (opcode_modifiers): Remove OldGcc.
23 * i386-opc.h (OldGcc): Removed.
24 (i386_opcode_modifier): Remove oldgcc.
25 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
26 instructions for old (<= 2.8.1) versions of gcc.
27 * i386-tbl.h: Regenerated.
28
29 2018-03-08 Jan Beulich <jbeulich@suse.com>
30
31 * i386-opc.h (EVEXDYN): New.
32 * i386-opc.tbl: Fold various AVX512VL templates.
33 * i386-tlb.h: Re-generate.
34
35 2018-03-08 Jan Beulich <jbeulich@suse.com>
36
37 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
38 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
39 vpexpandd, vpexpandq): Fold AFX512VF templates.
40 * i386-tlb.h: Re-generate.
41
42 2018-03-08 Jan Beulich <jbeulich@suse.com>
43
44 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
45 Fold 128- and 256-bit VEX-encoded templates.
46 * i386-tlb.h: Re-generate.
47
48 2018-03-08 Jan Beulich <jbeulich@suse.com>
49
50 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
51 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
52 vpexpandd, vpexpandq): Fold AVX512F templates.
53 * i386-tlb.h: Re-generate.
54
55 2018-03-08 Jan Beulich <jbeulich@suse.com>
56
57 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
58 64-bit templates. Drop Disp<N>.
59 * i386-tlb.h: Re-generate.
60
61 2018-03-08 Jan Beulich <jbeulich@suse.com>
62
63 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
64 and 256-bit templates.
65 * i386-tlb.h: Re-generate.
66
67 2018-03-08 Jan Beulich <jbeulich@suse.com>
68
69 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
70 * i386-tlb.h: Re-generate.
71
72 2018-03-08 Jan Beulich <jbeulich@suse.com>
73
74 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
75 Drop NoAVX.
76 * i386-tlb.h: Re-generate.
77
78 2018-03-08 Jan Beulich <jbeulich@suse.com>
79
80 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
81 * i386-tlb.h: Re-generate.
82
83 2018-03-08 Jan Beulich <jbeulich@suse.com>
84
85 * i386-gen.c (opcode_modifiers): Delete FloatD.
86 * i386-opc.h (FloatD): Delete.
87 (struct i386_opcode_modifier): Delete floatd.
88 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
89 FloatD by D.
90 * i386-tlb.h: Re-generate.
91
92 2018-03-08 Jan Beulich <jbeulich@suse.com>
93
94 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
95
96 2018-03-08 Jan Beulich <jbeulich@suse.com>
97
98 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
99 * i386-tlb.h: Re-generate.
100
101 2018-03-08 Jan Beulich <jbeulich@suse.com>
102
103 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
104 forms.
105 * i386-tlb.h: Re-generate.
106
107 2018-03-07 Alan Modra <amodra@gmail.com>
108
109 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
110 bfd_arch_rs6000.
111 * disassemble.h (print_insn_rs6000): Delete.
112 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
113 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
114 (print_insn_rs6000): Delete.
115
116 2018-03-03 Alan Modra <amodra@gmail.com>
117
118 * sysdep.h (opcodes_error_handler): Define.
119 (_bfd_error_handler): Declare.
120 * Makefile.am: Remove stray #.
121 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
122 EDIT" comment.
123 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
124 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
125 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
126 opcodes_error_handler to print errors. Standardize error messages.
127 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
128 and include opintl.h.
129 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
130 * i386-gen.c: Standardize error messages.
131 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
132 * Makefile.in: Regenerate.
133 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
134 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
135 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
136 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
137 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
138 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
139 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
140 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
141 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
142 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
143 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
144 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
145 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
146
147 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
148
149 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
150 vpsub[bwdq] instructions.
151 * i386-tbl.h: Regenerated.
152
153 2018-03-01 Alan Modra <amodra@gmail.com>
154
155 * configure.ac (ALL_LINGUAS): Sort.
156 * configure: Regenerate.
157
158 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
159
160 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
161 macro by assignements.
162
163 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
164
165 PR gas/22871
166 * i386-gen.c (opcode_modifiers): Add Optimize.
167 * i386-opc.h (Optimize): New enum.
168 (i386_opcode_modifier): Add optimize.
169 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
170 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
171 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
172 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
173 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
174 vpxord and vpxorq.
175 * i386-tbl.h: Regenerated.
176
177 2018-02-26 Alan Modra <amodra@gmail.com>
178
179 * crx-dis.c (getregliststring): Allocate a large enough buffer
180 to silence false positive gcc8 warning.
181
182 2018-02-22 Shea Levy <shea@shealevy.com>
183
184 * disassemble.c (ARCH_riscv): Define if ARCH_all.
185
186 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
187
188 * i386-opc.tbl: Add {rex},
189 * i386-tbl.h: Regenerated.
190
191 2018-02-20 Maciej W. Rozycki <macro@mips.com>
192
193 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
194 (mips16_opcodes): Replace `M' with `m' for "restore".
195
196 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
197
198 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
199
200 2018-02-13 Maciej W. Rozycki <macro@mips.com>
201
202 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
203 variable to `function_index'.
204
205 2018-02-13 Nick Clifton <nickc@redhat.com>
206
207 PR 22823
208 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
209 about truncation of printing.
210
211 2018-02-12 Henry Wong <henry@stuffedcow.net>
212
213 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
214
215 2018-02-05 Nick Clifton <nickc@redhat.com>
216
217 * po/pt_BR.po: Updated Brazilian Portuguese translation.
218
219 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
220
221 * i386-dis.c (enum): Add pconfig.
222 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
223 (cpu_flags): Add CpuPCONFIG.
224 * i386-opc.h (enum): Add CpuPCONFIG.
225 (i386_cpu_flags): Add cpupconfig.
226 * i386-opc.tbl: Add PCONFIG instruction.
227 * i386-init.h: Regenerate.
228 * i386-tbl.h: Likewise.
229
230 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
231
232 * i386-dis.c (enum): Add PREFIX_0F09.
233 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
234 (cpu_flags): Add CpuWBNOINVD.
235 * i386-opc.h (enum): Add CpuWBNOINVD.
236 (i386_cpu_flags): Add cpuwbnoinvd.
237 * i386-opc.tbl: Add WBNOINVD instruction.
238 * i386-init.h: Regenerate.
239 * i386-tbl.h: Likewise.
240
241 2018-01-17 Jim Wilson <jimw@sifive.com>
242
243 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
244
245 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
246
247 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
248 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
249 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
250 (cpu_flags): Add CpuIBT, CpuSHSTK.
251 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
252 (i386_cpu_flags): Add cpuibt, cpushstk.
253 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
254 * i386-init.h: Regenerate.
255 * i386-tbl.h: Likewise.
256
257 2018-01-16 Nick Clifton <nickc@redhat.com>
258
259 * po/pt_BR.po: Updated Brazilian Portugese translation.
260 * po/de.po: Updated German translation.
261
262 2018-01-15 Jim Wilson <jimw@sifive.com>
263
264 * riscv-opc.c (match_c_nop): New.
265 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
266
267 2018-01-15 Nick Clifton <nickc@redhat.com>
268
269 * po/uk.po: Updated Ukranian translation.
270
271 2018-01-13 Nick Clifton <nickc@redhat.com>
272
273 * po/opcodes.pot: Regenerated.
274
275 2018-01-13 Nick Clifton <nickc@redhat.com>
276
277 * configure: Regenerate.
278
279 2018-01-13 Nick Clifton <nickc@redhat.com>
280
281 2.30 branch created.
282
283 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
284
285 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
286 * i386-tbl.h: Regenerate.
287
288 2018-01-10 Jan Beulich <jbeulich@suse.com>
289
290 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
291 * i386-tbl.h: Re-generate.
292
293 2018-01-10 Jan Beulich <jbeulich@suse.com>
294
295 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
296 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
297 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
298 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
299 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
300 Disp8MemShift of AVX512VL forms.
301 * i386-tbl.h: Re-generate.
302
303 2018-01-09 Jim Wilson <jimw@sifive.com>
304
305 * riscv-dis.c (maybe_print_address): If base_reg is zero,
306 then the hi_addr value is zero.
307
308 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
309
310 * arm-dis.c (arm_opcodes): Add csdb.
311 (thumb32_opcodes): Add csdb.
312
313 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
314
315 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
316 * aarch64-asm-2.c: Regenerate.
317 * aarch64-dis-2.c: Regenerate.
318 * aarch64-opc-2.c: Regenerate.
319
320 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
321
322 PR gas/22681
323 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
324 Remove AVX512 vmovd with 64-bit operands.
325 * i386-tbl.h: Regenerated.
326
327 2018-01-05 Jim Wilson <jimw@sifive.com>
328
329 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
330 jalr.
331
332 2018-01-03 Alan Modra <amodra@gmail.com>
333
334 Update year range in copyright notice of all files.
335
336 2018-01-02 Jan Beulich <jbeulich@suse.com>
337
338 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
339 and OPERAND_TYPE_REGZMM entries.
340
341 For older changes see ChangeLog-2017
342 \f
343 Copyright (C) 2018 Free Software Foundation, Inc.
344
345 Copying and distribution of this file, with or without modification,
346 are permitted in any medium without royalty provided the copyright
347 notice and this notice are preserved.
348
349 Local Variables:
350 mode: change-log
351 left-margin: 8
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353 version-control: never
354 End:
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