* mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2012-08-14 Maciej W. Rozycki <macro@codesourcery.com>
2
3 * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
4 macros, use local variables for info struct member accesses,
5 update the type of the variable used to hold the instruction
6 word.
7 (print_insn_mips, print_mips16_insn_arg): Likewise.
8 (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
9 local variables for info struct member accesses.
10 (print_insn_micromips): Add GET_OP_S local macro.
11 (_print_insn_mips): Update the type of the variable used to hold
12 the instruction word.
13
14 2012-08-13 Ian Bolton <ian.bolton@arm.com>
15 Laurent Desnogues <laurent.desnogues@arm.com>
16 Jim MacArthur <jim.macarthur@arm.com>
17 Marcus Shawcroft <marcus.shawcroft@arm.com>
18 Nigel Stephens <nigel.stephens@arm.com>
19 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
20 Richard Earnshaw <rearnsha@arm.com>
21 Sofiane Naci <sofiane.naci@arm.com>
22 Tejas Belagod <tejas.belagod@arm.com>
23 Yufeng Zhang <yufeng.zhang@arm.com>
24
25 * Makefile.am: Add AArch64.
26 * Makefile.in: Regenerate.
27 * aarch64-asm.c: New file.
28 * aarch64-asm.h: New file.
29 * aarch64-dis.c: New file.
30 * aarch64-dis.h: New file.
31 * aarch64-gen.c: New file.
32 * aarch64-opc.c: New file.
33 * aarch64-opc.h: New file.
34 * aarch64-tbl.h: New file.
35 * configure.in: Add AArch64.
36 * configure: Regenerate.
37 * disassemble.c: Add AArch64.
38 * aarch64-asm-2.c: New file (automatically generated).
39 * aarch64-dis-2.c: New file (automatically generated).
40 * aarch64-opc-2.c: New file (automatically generated).
41 * po/POTFILES.in: Regenerate.
42
43 2012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
44
45 * micromips-opc.c (micromips_opcodes): Update comment.
46 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
47 instructions for IOCT as appropriate.
48 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
49 opcode_is_member.
50 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
51 the result of a check for the -Wno-missing-field-initializers
52 GCC option.
53 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
54 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
55 compilation.
56 (mips16-opc.lo): Likewise.
57 (micromips-opc.lo): Likewise.
58 * aclocal.m4: Regenerate.
59 * configure: Regenerate.
60 * Makefile.in: Regenerate.
61
62 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
63
64 PR gas/14423
65 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
66 * i386-init.h: Regenerated.
67
68 2012-08-09 Nick Clifton <nickc@redhat.com>
69
70 * po/vi.po: Updated Vietnamese translation.
71
72 2012-08-07 Roland McGrath <mcgrathr@google.com>
73
74 * i386-dis.c (reg_table): Fill out REG_0F0D table with
75 AMD-reserved cases as "prefetch".
76 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
77 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
78 (reg_table): Use those under REG_0F18.
79 (mod_table): Add those cases as "nop/reserved".
80
81 2012-08-07 Jan Beulich <jbeulich@suse.com>
82
83 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
84
85 2012-08-06 Roland McGrath <mcgrathr@google.com>
86
87 * i386-dis.c (print_insn): Print spaces between multiple excess
88 prefixes. Return actual number of excess prefixes consumed,
89 not always one.
90
91 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
92
93 2012-08-06 Roland McGrath <mcgrathr@google.com>
94 Victor Khimenko <khim@google.com>
95 H.J. Lu <hongjiu.lu@intel.com>
96
97 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
98 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
99 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
100 (OP_E_register): Likewise.
101 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
102
103 2012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
104
105 * configure.in: Formatting.
106 * configure: Regenerate.
107
108 2012-08-01 Alan Modra <amodra@gmail.com>
109
110 * h8300-dis.c: Fix printf arg warnings.
111 * i960-dis.c: Likewise.
112 * mips-dis.c: Likewise.
113 * pdp11-dis.c: Likewise.
114 * sh-dis.c: Likewise.
115 * v850-dis.c: Likewise.
116 * configure.in: Formatting.
117 * configure: Regenerate.
118 * rl78-decode.c: Regenerate.
119 * po/POTFILES.in: Regenerate.
120
121 2012-07-31 Chao-Ying Fu <fu@mips.com>
122 Catherine Moore <clm@codesourcery.com>
123 Maciej W. Rozycki <macro@codesourcery.com>
124
125 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
126 (DSP_VOLA): Likewise.
127 (D32, D33): Likewise.
128 (micromips_opcodes): Add DSP ASE instructions.
129 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
130 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
131
132 2012-07-31 Jan Beulich <jbeulich@suse.com>
133
134 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
135 instruction group. Mark as requiring AVX2.
136 * i386-tbl.h: Re-generate.
137
138 2012-07-30 Nick Clifton <nickc@redhat.com>
139
140 * po/opcodes.pot: Updated template.
141 * po/es.po: Updated Spanish translation.
142 * po/fi.po: Updated Finnish translation.
143
144 2012-07-27 Mike Frysinger <vapier@gentoo.org>
145
146 * configure.in (BFD_VERSION): Run bfd/configure --version and
147 parse the output of that.
148 * configure: Regenerate.
149
150 2012-07-25 James Lemke <jwlemke@codesourcery.com>
151
152 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
153
154 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
155 Dr David Alan Gilbert <dave@treblig.org>
156
157 PR binutils/13135
158 * arm-dis.c: Add necessary casts for printing integer values.
159 Use %s when printing string values.
160 * hppa-dis.c: Likewise.
161 * m68k-dis.c: Likewise.
162 * microblaze-dis.c: Likewise.
163 * mips-dis.c: Likewise.
164 * sparc-dis.c: Likewise.
165
166 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
167
168 PR binutils/14355
169 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
170 (VEX_LEN_0FXOP_08_CD): Likewise.
171 (VEX_LEN_0FXOP_08_CE): Likewise.
172 (VEX_LEN_0FXOP_08_CF): Likewise.
173 (VEX_LEN_0FXOP_08_EC): Likewise.
174 (VEX_LEN_0FXOP_08_ED): Likewise.
175 (VEX_LEN_0FXOP_08_EE): Likewise.
176 (VEX_LEN_0FXOP_08_EF): Likewise.
177 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
178 vpcomub, vpcomuw, vpcomud, vpcomuq.
179 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
180 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
181 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
182 VEX_LEN_0FXOP_08_EF.
183
184 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
185
186 * i386-dis.c (PREFIX_0F38F6): New.
187 (prefix_table): Add adcx, adox instructions.
188 (three_byte_table): Use PREFIX_0F38F6.
189 (mod_table): Add rdseed instruction.
190 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
191 (cpu_flags): Likewise.
192 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
193 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
194 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
195 prefetchw.
196 * i386-tbl.h: Regenerate.
197 * i386-init.h: Likewise.
198
199 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
200
201 * mips-dis.c: Remove gratuitous newline.
202
203 2012-07-05 Sean Keys <skeys@ipdatasys.com>
204
205 * xgate-dis.c: Removed an IF statement that will
206 always be false due to overlapping operand masks.
207 * xgate-opc.c: Corrected 'com' opcode entry and
208 fixed spacing.
209
210 2012-07-02 Roland McGrath <mcgrathr@google.com>
211
212 * i386-opc.tbl: Add RepPrefixOk to nop.
213 * i386-tbl.h: Regenerate.
214
215 2012-06-28 Nick Clifton <nickc@redhat.com>
216
217 * po/vi.po: Updated Vietnamese translation.
218
219 2012-06-22 Roland McGrath <mcgrathr@google.com>
220
221 * i386-opc.tbl: Add RepPrefixOk to ret.
222 * i386-tbl.h: Regenerate.
223
224 * i386-opc.h (RepPrefixOk): New enum constant.
225 (i386_opcode_modifier): New bitfield 'repprefixok'.
226 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
227 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
228 instructions that have IsString.
229 * i386-tbl.h: Regenerate.
230
231 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
232
233 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
234 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
235 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
236 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
237 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
238 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
239 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
240 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
241 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
242
243 2012-05-19 Alan Modra <amodra@gmail.com>
244
245 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
246 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
247
248 2012-05-18 Alan Modra <amodra@gmail.com>
249
250 * ia64-opc.c: Remove #include "ansidecl.h".
251 * z8kgen.c: Include sysdep.h first.
252
253 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
254 * bfin-dis.c: Likewise.
255 * i860-dis.c: Likewise.
256 * ia64-dis.c: Likewise.
257 * ia64-gen.c: Likewise.
258 * m68hc11-dis.c: Likewise.
259 * mmix-dis.c: Likewise.
260 * msp430-dis.c: Likewise.
261 * or32-dis.c: Likewise.
262 * rl78-dis.c: Likewise.
263 * rx-dis.c: Likewise.
264 * tic4x-dis.c: Likewise.
265 * tilegx-opc.c: Likewise.
266 * tilepro-opc.c: Likewise.
267 * rx-decode.c: Regenerate.
268
269 2012-05-17 James Lemke <jwlemke@codesourcery.com>
270
271 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
272
273 2012-05-17 James Lemke <jwlemke@codesourcery.com>
274
275 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
276
277 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
278 Nick Clifton <nickc@redhat.com>
279
280 PR 14072
281 * configure.in: Add check that sysdep.h has been included before
282 any system header files.
283 * configure: Regenerate.
284 * config.in: Regenerate.
285 * sysdep.h: Generate an error if included before config.h.
286 * alpha-opc.c: Include sysdep.h before any other header file.
287 * alpha-dis.c: Likewise.
288 * avr-dis.c: Likewise.
289 * cgen-opc.c: Likewise.
290 * cr16-dis.c: Likewise.
291 * cris-dis.c: Likewise.
292 * crx-dis.c: Likewise.
293 * d10v-dis.c: Likewise.
294 * d10v-opc.c: Likewise.
295 * d30v-dis.c: Likewise.
296 * d30v-opc.c: Likewise.
297 * h8500-dis.c: Likewise.
298 * i370-dis.c: Likewise.
299 * i370-opc.c: Likewise.
300 * m10200-dis.c: Likewise.
301 * m10300-dis.c: Likewise.
302 * micromips-opc.c: Likewise.
303 * mips-opc.c: Likewise.
304 * mips61-opc.c: Likewise.
305 * moxie-dis.c: Likewise.
306 * or32-opc.c: Likewise.
307 * pj-dis.c: Likewise.
308 * ppc-dis.c: Likewise.
309 * ppc-opc.c: Likewise.
310 * s390-dis.c: Likewise.
311 * sh-dis.c: Likewise.
312 * sh64-dis.c: Likewise.
313 * sparc-dis.c: Likewise.
314 * sparc-opc.c: Likewise.
315 * spu-dis.c: Likewise.
316 * tic30-dis.c: Likewise.
317 * tic54x-dis.c: Likewise.
318 * tic80-dis.c: Likewise.
319 * tic80-opc.c: Likewise.
320 * tilegx-dis.c: Likewise.
321 * tilepro-dis.c: Likewise.
322 * v850-dis.c: Likewise.
323 * v850-opc.c: Likewise.
324 * vax-dis.c: Likewise.
325 * w65-dis.c: Likewise.
326 * xgate-dis.c: Likewise.
327 * xtensa-dis.c: Likewise.
328 * rl78-decode.opc: Likewise.
329 * rl78-decode.c: Regenerate.
330 * rx-decode.opc: Likewise.
331 * rx-decode.c: Regenerate.
332
333 2012-05-17 Alan Modra <amodra@gmail.com>
334
335 * ppc_dis.c: Don't include elf/ppc.h.
336
337 2012-05-16 Meador Inge <meadori@codesourcery.com>
338
339 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
340 to PUSH/POP {reg}.
341
342 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
343 Stephane Carrez <stcarrez@nerim.fr>
344
345 * configure.in: Add S12X and XGATE co-processor support to m68hc11
346 target.
347 * disassemble.c: Likewise.
348 * configure: Regenerate.
349 * m68hc11-dis.c: Make objdump output more consistent, use hex
350 instead of decimal and use 0x prefix for hex.
351 * m68hc11-opc.c: Add S12X and XGATE opcodes.
352
353 2012-05-14 James Lemke <jwlemke@codesourcery.com>
354
355 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
356 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
357 (vle_opcd_indices): New array.
358 (lookup_vle): New function.
359 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
360 (print_insn_powerpc): Likewise.
361 * ppc-opc.c: Likewise.
362
363 2012-05-14 Catherine Moore <clm@codesourcery.com>
364 Maciej W. Rozycki <macro@codesourcery.com>
365 Rhonda Wittels <rhonda@codesourcery.com>
366 Nathan Froyd <froydnj@codesourcery.com>
367
368 * ppc-opc.c (insert_arx, extract_arx): New functions.
369 (insert_ary, extract_ary): New functions.
370 (insert_li20, extract_li20): New functions.
371 (insert_rx, extract_rx): New functions.
372 (insert_ry, extract_ry): New functions.
373 (insert_sci8, extract_sci8): New functions.
374 (insert_sci8n, extract_sci8n): New functions.
375 (insert_sd4h, extract_sd4h): New functions.
376 (insert_sd4w, extract_sd4w): New functions.
377 (insert_vlesi, extract_vlesi): New functions.
378 (insert_vlensi, extract_vlensi): New functions.
379 (insert_vleui, extract_vleui): New functions.
380 (insert_vleil, extract_vleil): New functions.
381 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
382 (BI16, BI32, BO32, B8): New.
383 (B15, B24, CRD32, CRS): New.
384 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
385 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
386 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
387 (SH6_MASK): Use PPC_OPSHIFT_INV.
388 (SI8, UI5, OIMM5, UI7, BO16): New.
389 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
390 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
391 (ALLOW8_SPRG): New.
392 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
393 (OPVUP, OPVUP_MASK OPVUP): New
394 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
395 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
396 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
397 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
398 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
399 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
400 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
401 (SE_IM5, SE_IM5_MASK): New.
402 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
403 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
404 (BO32DNZ, BO32DZ): New.
405 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
406 (PPCVLE): New.
407 (powerpc_opcodes): Add new VLE instructions. Update existing
408 instruction to include PPCVLE if supported.
409 * ppc-dis.c (ppc_opts): Add vle entry.
410 (get_powerpc_dialect): New function.
411 (powerpc_init_dialect): VLE support.
412 (print_insn_big_powerpc): Call get_powerpc_dialect.
413 (print_insn_little_powerpc): Likewise.
414 (operand_value_powerpc): Handle negative shift counts.
415 (print_insn_powerpc): Handle 2-byte instruction lengths.
416
417 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
418
419 PR binutils/14028
420 * configure.in: Invoke ACX_HEADER_STRING.
421 * configure: Regenerate.
422 * config.in: Regenerate.
423 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
424 string.h and strings.h.
425
426 2012-05-11 Nick Clifton <nickc@redhat.com>
427
428 PR binutils/14006
429 * arm-dis.c (print_insn): Fix detection of instruction mode in
430 files containing multiple executable sections.
431
432 2012-05-03 Sean Keys <skeys@ipdatasys.com>
433
434 * Makefile.in, configure: regenerate
435 * disassemble.c (disassembler): Recognize ARCH_XGATE.
436 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
437 New functions.
438 * configure.in: Recognize xgate.
439 * xgate-dis.c, xgate-opc.c: New files for support of xgate
440 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
441 and opcode generation for xgate.
442
443 2012-04-30 DJ Delorie <dj@redhat.com>
444
445 * rx-decode.opc (MOV): Do not sign-extend immediates which are
446 already the maximum bit size.
447 * rx-decode.c: Regenerate.
448
449 2012-04-27 David S. Miller <davem@davemloft.net>
450
451 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
452 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
453
454 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
455 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
456
457 * sparc-opc.c (CBCOND): New define.
458 (CBCOND_XCC): Likewise.
459 (cbcond): New helper macro.
460 (sparc_opcodes): Add compare-and-branch instructions.
461
462 * sparc-dis.c (print_insn_sparc): Handle ')'.
463 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
464
465 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
466 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
467
468 2012-04-12 David S. Miller <davem@davemloft.net>
469
470 * sparc-dis.c (X_DISP10): Define.
471 (print_insn_sparc): Handle '='.
472
473 2012-04-01 Mike Frysinger <vapier@gentoo.org>
474
475 * bfin-dis.c (fmtconst): Replace decimal handling with a single
476 sprintf call and the '*' field width.
477
478 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
479
480 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
481
482 2012-03-16 Alan Modra <amodra@gmail.com>
483
484 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
485 (powerpc_opcd_indices): Bump array size.
486 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
487 corresponding to unused opcodes to following entry.
488 (lookup_powerpc): New function, extracted and optimised from..
489 (print_insn_powerpc): ..here.
490
491 2012-03-15 Alan Modra <amodra@gmail.com>
492 James Lemke <jwlemke@codesourcery.com>
493
494 * disassemble.c (disassemble_init_for_target): Handle ppc init.
495 * ppc-dis.c (private): New var.
496 (powerpc_init_dialect): Don't return calloc failure, instead use
497 private.
498 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
499 (powerpc_opcd_indices): New array.
500 (disassemble_init_powerpc): New function.
501 (print_insn_big_powerpc): Don't init dialect here.
502 (print_insn_little_powerpc): Likewise.
503 (print_insn_powerpc): Start search using powerpc_opcd_indices.
504
505 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
506
507 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
508 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
509 (PPCVEC2, PPCTMR, E6500): New short names.
510 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
511 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
512 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
513 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
514 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
515 optional operands on sync instruction for E6500 target.
516
517 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
518
519 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
520
521 2012-02-27 Alan Modra <amodra@gmail.com>
522
523 * mt-dis.c: Regenerate.
524
525 2012-02-27 Alan Modra <amodra@gmail.com>
526
527 * v850-opc.c (extract_v8): Rearrange to make it obvious this
528 is the inverse of corresponding insert function.
529 (extract_d22, extract_u9, extract_r4): Likewise.
530 (extract_d9): Correct sign extension.
531 (extract_d16_15): Don't assume "long" is 32 bits, and don't
532 rely on implementation defined behaviour for shift right of
533 signed types.
534 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
535 (extract_d23): Likewise, and correct mask.
536
537 2012-02-27 Alan Modra <amodra@gmail.com>
538
539 * crx-dis.c (print_arg): Mask constant to 32 bits.
540 * crx-opc.c (cst4_map): Use int array.
541
542 2012-02-27 Alan Modra <amodra@gmail.com>
543
544 * arc-dis.c (BITS): Don't use shifts to mask off bits.
545 (FIELDD): Sign extend with xor,sub.
546
547 2012-02-25 Walter Lee <walt@tilera.com>
548
549 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
550 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
551 TILEPRO_OPC_LW_TLS_SN.
552
553 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
554
555 * i386-opc.h (HLEPrefixNone): New.
556 (HLEPrefixLock): Likewise.
557 (HLEPrefixAny): Likewise.
558 (HLEPrefixRelease): Likewise.
559
560 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
561
562 * i386-dis.c (HLE_Fixup1): New.
563 (HLE_Fixup2): Likewise.
564 (HLE_Fixup3): Likewise.
565 (Ebh1): Likewise.
566 (Evh1): Likewise.
567 (Ebh2): Likewise.
568 (Evh2): Likewise.
569 (Ebh3): Likewise.
570 (Evh3): Likewise.
571 (MOD_C6_REG_7): Likewise.
572 (MOD_C7_REG_7): Likewise.
573 (RM_C6_REG_7): Likewise.
574 (RM_C7_REG_7): Likewise.
575 (XACQUIRE_PREFIX): Likewise.
576 (XRELEASE_PREFIX): Likewise.
577 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
578 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
579 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
580 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
581 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
582 MOD_C6_REG_7 and MOD_C7_REG_7.
583 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
584 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
585 xtest.
586 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
587 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
588
589 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
590 CPU_RTM_FLAGS.
591 (cpu_flags): Add CpuHLE and CpuRTM.
592 (opcode_modifiers): Add HLEPrefixOk.
593
594 * i386-opc.h (CpuHLE): New.
595 (CpuRTM): Likewise.
596 (HLEPrefixOk): Likewise.
597 (i386_cpu_flags): Add cpuhle and cpurtm.
598 (i386_opcode_modifier): Add hleprefixok.
599
600 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
601 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
602 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
603 operand. Add xacquire, xrelease, xabort, xbegin, xend and
604 xtest.
605 * i386-init.h: Regenerated.
606 * i386-tbl.h: Likewise.
607
608 2012-01-24 DJ Delorie <dj@redhat.com>
609
610 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
611 * rl78-decode.c: Regenerate.
612
613 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
614
615 PR binutils/10173
616 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
617
618 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
619
620 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
621 register and move them after pmove with PSR/PCSR register.
622
623 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
624
625 * i386-dis.c (mod_table): Add vmfunc.
626
627 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
628 (cpu_flags): CpuVMFUNC.
629
630 * i386-opc.h (CpuVMFUNC): New.
631 (i386_cpu_flags): Add cpuvmfunc.
632
633 * i386-opc.tbl: Add vmfunc.
634 * i386-init.h: Regenerated.
635 * i386-tbl.h: Likewise.
636
637 For older changes see ChangeLog-2011
638 \f
639 Local Variables:
640 mode: change-log
641 left-margin: 8
642 fill-column: 74
643 version-control: never
644 End:
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