1 /* This file is automatically generated by aarch64-gen. Do not edit! */
2 /* Copyright 2012, 2013 Free Software Foundation, Inc.
3 Contributed by ARM Ltd.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; see the file COPYING3. If not,
19 see <http://www.gnu.org/licenses/>. */
22 #include "aarch64-asm.h"
25 const aarch64_opcode
*
26 aarch64_find_real_opcode (const aarch64_opcode
*opcode
)
28 /* Use the index as the key to locate the real opcode. */
29 int key
= opcode
- aarch64_opcode_table
;
34 value
= 2; /* --> sbc. */
37 value
= 4; /* --> sbcs. */
40 value
= 7; /* --> adds. */
43 value
= 10; /* --> subs. */
46 value
= 12; /* --> add. */
49 value
= 14; /* --> adds. */
52 value
= 17; /* --> subs. */
55 value
= 20; /* --> adds. */
58 value
= 22; /* --> sub. */
62 value
= 24; /* --> subs. */
65 value
= 138; /* --> umov. */
68 value
= 140; /* --> ins. */
71 value
= 142; /* --> ins. */
74 value
= 203; /* --> not. */
77 value
= 258; /* --> orr. */
80 value
= 313; /* --> sshll. */
83 value
= 315; /* --> sshll2. */
86 value
= 335; /* --> ushll. */
89 value
= 337; /* --> ushll2. */
92 value
= 430; /* --> dup. */
100 value
= 493; /* --> sbfm. */
102 case 502: /* bfxil */
104 value
= 500; /* --> bfm. */
111 case 504: /* ubfiz */
112 value
= 503; /* --> ubfm. */
116 value
= 525; /* --> csinc. */
118 case 530: /* csetm */
120 value
= 528; /* --> csinv. */
123 value
= 531; /* --> csneg. */
126 value
= 556; /* --> lslv. */
129 value
= 558; /* --> lsrv. */
132 value
= 560; /* --> asrv. */
135 value
= 562; /* --> rorv. */
138 value
= 564; /* --> madd. */
141 value
= 566; /* --> msub. */
143 case 569: /* smull */
144 value
= 568; /* --> smaddl. */
146 case 571: /* smnegl */
147 value
= 570; /* --> smsubl. */
149 case 574: /* umull */
150 value
= 573; /* --> umaddl. */
152 case 576: /* umnegl */
153 value
= 575; /* --> umsubl. */
156 value
= 586; /* --> extr. */
159 value
= 685; /* --> sturb. */
162 value
= 686; /* --> ldurb. */
164 case 690: /* ldrsb */
165 value
= 689; /* --> ldursb. */
168 value
= 691; /* --> stur. */
171 value
= 692; /* --> ldur. */
174 value
= 695; /* --> sturh. */
177 value
= 696; /* --> ldurh. */
179 case 700: /* ldrsh */
180 value
= 699; /* --> ldursh. */
183 value
= 701; /* --> stur. */
186 value
= 702; /* --> ldur. */
188 case 706: /* ldrsw */
189 value
= 705; /* --> ldursw. */
192 value
= 707; /* --> prfum. */
195 value
= 749; /* --> and. */
198 value
= 751; /* --> orr. */
201 value
= 754; /* --> ands. */
205 value
= 758; /* --> orr. */
208 value
= 761; /* --> orn. */
211 value
= 765; /* --> ands. */
214 value
= 768; /* --> movn. */
217 value
= 770; /* --> movz. */
223 case 778: /* yield */
225 value
= 776; /* --> hint. */
231 value
= 787; /* --> sys. */
233 default: return NULL
;
236 return aarch64_opcode_table
+ value
;
240 aarch64_insert_operand (const aarch64_operand
*self
,
241 const aarch64_opnd_info
*info
,
242 aarch64_insn
*code
, const aarch64_inst
*inst
)
244 /* Use the index as the key. */
245 int key
= self
- aarch64_operands
;
273 return aarch64_ins_regno (self
, info
, code
, inst
);
275 return aarch64_ins_reg_extended (self
, info
, code
, inst
);
277 return aarch64_ins_reg_shifted (self
, info
, code
, inst
);
279 return aarch64_ins_ft (self
, info
, code
, inst
);
283 return aarch64_ins_reglane (self
, info
, code
, inst
);
285 return aarch64_ins_reglist (self
, info
, code
, inst
);
287 return aarch64_ins_ldst_reglist (self
, info
, code
, inst
);
289 return aarch64_ins_ldst_reglist_r (self
, info
, code
, inst
);
291 return aarch64_ins_ldst_elemlist (self
, info
, code
, inst
);
310 return aarch64_ins_imm (self
, info
, code
, inst
);
313 return aarch64_ins_advsimd_imm_shift (self
, info
, code
, inst
);
317 return aarch64_ins_advsimd_imm_modified (self
, info
, code
, inst
);
319 return aarch64_ins_limm (self
, info
, code
, inst
);
321 return aarch64_ins_aimm (self
, info
, code
, inst
);
323 return aarch64_ins_imm_half (self
, info
, code
, inst
);
325 return aarch64_ins_fbits (self
, info
, code
, inst
);
327 return aarch64_ins_cond (self
, info
, code
, inst
);
330 return aarch64_ins_addr_simple (self
, info
, code
, inst
);
332 return aarch64_ins_addr_regoff (self
, info
, code
, inst
);
336 return aarch64_ins_addr_simm (self
, info
, code
, inst
);
338 return aarch64_ins_addr_uimm12 (self
, info
, code
, inst
);
340 return aarch64_ins_simd_addr_post (self
, info
, code
, inst
);
342 return aarch64_ins_sysreg (self
, info
, code
, inst
);
344 return aarch64_ins_pstatefield (self
, info
, code
, inst
);
349 return aarch64_ins_sysins_op (self
, info
, code
, inst
);
352 return aarch64_ins_barrier (self
, info
, code
, inst
);
354 return aarch64_ins_prfop (self
, info
, code
, inst
);
355 default: assert (0); abort ();
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