1 /* aarch64-tbl.h -- AArch64 opcode description table and instruction
2 operand description table.
3 Copyright (C) 2012-2016 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the
19 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
22 #include "aarch64-opc.h"
25 #error VERIFIER must be defined.
30 #define OPND(x) AARCH64_OPND_##x
32 #define OP1(a) {OPND(a)}
33 #define OP2(a,b) {OPND(a), OPND(b)}
34 #define OP3(a,b,c) {OPND(a), OPND(b), OPND(c)}
35 #define OP4(a,b,c,d) {OPND(a), OPND(b), OPND(c), OPND(d)}
36 #define OP5(a,b,c,d,e) {OPND(a), OPND(b), OPND(c), OPND(d), OPND(e)}
38 #define QLF(x) AARCH64_OPND_QLF_##x
39 #define QLF1(a) {QLF(a)}
40 #define QLF2(a,b) {QLF(a), QLF(b)}
41 #define QLF3(a,b,c) {QLF(a), QLF(b), QLF(c)}
42 #define QLF4(a,b,c,d) {QLF(a), QLF(b), QLF(c), QLF(d)}
43 #define QLF5(a,b,c,d,e) {QLF(a), QLF(b), QLF(c), QLF(d), QLF(e)}
45 /* Qualifiers list. */
47 /* e.g. MSR <systemreg>, <Xt>. */
53 /* e.g. MRS <Xt>, <systemreg>. */
59 /* e.g. SYS #<op1>, <Cn>, <Cm>, #<op2>{, <Xt>}. */
62 QLF5(NIL,NIL,NIL,NIL,X), \
65 /* e.g. SYSL <Xt>, #<op1>, <Cn>, <Cm>, #<op2>. */
68 QLF5(X,NIL,NIL,NIL,NIL), \
71 /* e.g. ADRP <Xd>, <label>. */
77 /* e.g. B.<cond> <label>. */
78 #define QL_PCREL_NIL \
83 /* e.g. TBZ <Xt>, #<imm>, <label>. */
86 QLF3(X,imm_0_63,NIL), \
89 /* e.g. BL <label>. */
95 /* e.g. LDRSW <Xt>, <label>. */
101 /* e.g. LDR <Wt>, <label>. */
108 /* e.g. LDR <Dt>, <label>. */
109 #define QL_FP_PCREL \
116 /* e.g. PRFM <prfop>, <label>. */
117 #define QL_PRFM_PCREL \
128 /* e.g. RBIT <Wd>, <Wn>. */
135 /* e.g. CMN <Wn|WSP>, <Wm>{, <extend> {#<amount>}}. */
143 /* e.g. MOV <Wd|WSP>, <Wn|WSP>, at least one SP. */
152 /* e.g. REV <Wd>, <Wn>. */
158 /* e.g. REV32 <Xd>, <Xn>. */
170 /* e.g. CRC32B <Wd>, <Wn>, <Wm>. */
176 /* e.g. SMULH <Xd>, <Xn>, <Xm>. */
182 /* e.g. CRC32X <Wd>, <Wn>, <Xm>. */
188 /* e.g. UDIV <Xd>, <Xn>, <Xm>. */
195 /* e.g. ADDS <Xd>, <Xn|SP>, <R><m>{, <extend> {#<amount>}}. */
203 /* e.g. MADD <Xd>, <Xn>, <Xm>, <Xa>. */
210 /* e.g. SMADDL <Xd>, <Wn>, <Wm>, <Xa>. */
216 /* e.g. SMADDL <Xd>, <Wn>, <Wm>, <Xa>. */
222 /* e.g. CSINC <Xd>, <Xn>, <Xm>, <cond>. */
225 QLF4(W, W, W, NIL), \
226 QLF4(X, X, X, NIL), \
229 /* e.g. CSET <Wd>, <cond>. */
236 /* e.g. BFM <Wd>, <Wn>, #<immr>, #<imms>. */
239 QLF4(W,W,imm_0_31,imm_0_31), \
240 QLF4(X,X,imm_0_63,imm_0_63), \
243 /* e.g. BFC <Wd>, #<immr>, #<imms>. */
246 QLF3 (W, imm_0_31, imm_1_32), \
247 QLF3 (X, imm_0_63, imm_1_64), \
250 /* e.g. UBFIZ <Wd>, <Wn>, #<lsb>, #<width>. */
253 QLF4(W,W,imm_0_31,imm_1_32), \
254 QLF4(X,X,imm_0_63,imm_1_64), \
257 /* e.g. SCVTF <Sd>, <Xn>, #<fbits>. */
260 QLF3(S_D,W,imm_1_32), \
261 QLF3(S_S,W,imm_1_32), \
262 QLF3(S_D,X,imm_1_64), \
263 QLF3(S_S,X,imm_1_64), \
266 /* e.g. SCVTF <Hd>, <Xn>, #<fbits>. */
267 #define QL_FIX2FP_H \
269 QLF3 (S_H, W, imm_1_32), \
270 QLF3 (S_H, X, imm_1_64), \
273 /* e.g. FCVTZS <Wd>, <Dn>, #<fbits>. */
276 QLF3(W,S_D,imm_1_32), \
277 QLF3(W,S_S,imm_1_32), \
278 QLF3(X,S_D,imm_1_64), \
279 QLF3(X,S_S,imm_1_64), \
282 /* e.g. FCVTZS <Wd>, <Hn>, #<fbits>. */
283 #define QL_FP2FIX_H \
285 QLF3 (W, S_H, imm_1_32), \
286 QLF3 (X, S_H, imm_1_64), \
289 /* e.g. SCVTF <Dd>, <Wn>. */
298 /* e.g. SCVTF <Hd>, <Wn>. */
299 #define QL_INT2FP_H \
305 /* e.g. FCVTNS <Xd>, <Dn>. */
314 /* e.g. FCVTNS <Hd>, <Wn>. */
315 #define QL_FP2INT_H \
321 /* e.g. FMOV <Xd>, <Vn>.D[1]. */
327 /* e.g. FMOV <Vd>.D[1], <Xn>. */
333 /* e.g. EXTR <Xd>, <Xn>, <Xm>, #<lsb>. */
336 QLF4(W,W,W,imm_0_31), \
337 QLF4(X,X,X,imm_0_63), \
340 /* e.g. LSL <Wd>, <Wn>, #<uimm>. */
343 QLF3(W,W,imm_0_31), \
344 QLF3(X,X,imm_0_63), \
347 /* e.g. UXTH <Xd>, <Wn>. */
354 /* e.g. UXTW <Xd>, <Wn>. */
360 /* e.g. SQSHL <V><d>, <V><n>, #<shift>. */
363 QLF3(S_B , S_B , S_B ), \
364 QLF3(S_H , S_H , S_H ), \
365 QLF3(S_S , S_S , S_S ), \
366 QLF3(S_D , S_D , S_D ) \
369 /* e.g. SSHR <V><d>, <V><n>, #<shift>. */
370 #define QL_SSHIFT_D \
372 QLF3(S_D , S_D , S_D ) \
375 /* e.g. UCVTF <Vd>.<T>, <Vn>.<T>, #<fbits>. */
376 #define QL_SSHIFT_SD \
378 QLF3(S_S , S_S , S_S ), \
379 QLF3(S_D , S_D , S_D ) \
382 /* e.g. UCVTF <Vd>.<T>, <Vn>.<T>, #<fbits>. */
383 #define QL_SSHIFT_H \
385 QLF3 (S_H, S_H, S_H) \
388 /* e.g. SQSHRUN <Vb><d>, <Va><n>, #<shift>. */
391 QLF3(S_B , S_H , S_B ), \
392 QLF3(S_H , S_S , S_H ), \
393 QLF3(S_S , S_D , S_S ), \
396 /* e.g. SSHR <Vd>.<T>, <Vn>.<T>, #<shift>.
397 The register operand variant qualifiers are deliberately used for the
398 immediate operand to ease the operand encoding/decoding and qualifier
399 sequence matching. */
402 QLF3(V_8B , V_8B , V_8B ), \
403 QLF3(V_16B, V_16B, V_16B), \
404 QLF3(V_4H , V_4H , V_4H ), \
405 QLF3(V_8H , V_8H , V_8H ), \
406 QLF3(V_2S , V_2S , V_2S ), \
407 QLF3(V_4S , V_4S , V_4S ), \
408 QLF3(V_2D , V_2D , V_2D ) \
411 /* e.g. SCVTF <Vd>.<T>, <Vn>.<T>, #<fbits>. */
412 #define QL_VSHIFT_SD \
414 QLF3(V_2S , V_2S , V_2S ), \
415 QLF3(V_4S , V_4S , V_4S ), \
416 QLF3(V_2D , V_2D , V_2D ) \
419 /* e.g. SCVTF <Vd>.<T>, <Vn>.<T>, #<fbits>. */
420 #define QL_VSHIFT_H \
422 QLF3 (V_4H, V_4H, V_4H), \
423 QLF3 (V_8H, V_8H, V_8H) \
426 /* e.g. SHRN<Q> <Vd>.<Tb>, <Vn>.<Ta>, #<shift>. */
429 QLF3(V_8B , V_8H , V_8B ), \
430 QLF3(V_4H , V_4S , V_4H ), \
431 QLF3(V_2S , V_2D , V_2S ), \
434 /* e.g. SHRN<Q> <Vd>.<Tb>, <Vn>.<Ta>, #<shift>. */
435 #define QL_VSHIFTN2 \
437 QLF3(V_16B, V_8H, V_16B), \
438 QLF3(V_8H , V_4S , V_8H ), \
439 QLF3(V_4S , V_2D , V_4S ), \
442 /* e.g. SSHLL<Q> <Vd>.<Ta>, <Vn>.<Tb>, #<shift>.
443 the 3rd qualifier is used to help the encoding. */
446 QLF3(V_8H , V_8B , V_8B ), \
447 QLF3(V_4S , V_4H , V_4H ), \
448 QLF3(V_2D , V_2S , V_2S ), \
451 /* e.g. SSHLL<Q> <Vd>.<Ta>, <Vn>.<Tb>, #<shift>. */
452 #define QL_VSHIFTL2 \
454 QLF3(V_8H , V_16B, V_16B), \
455 QLF3(V_4S , V_8H , V_8H ), \
456 QLF3(V_2D , V_4S , V_4S ), \
462 QLF3(V_8B , V_16B, V_8B ), \
463 QLF3(V_16B, V_16B, V_16B), \
472 /* e.g. ABS <V><d>, <V><n>. */
478 /* e.g. CMGT <V><d>, <V><n>, #0. */
479 #define QL_SISD_CMP_0 \
481 QLF3(S_D, S_D, NIL), \
484 /* e.g. FCMEQ <V><d>, <V><n>, #0. */
485 #define QL_SISD_FCMP_0 \
487 QLF3(S_S, S_S, NIL), \
488 QLF3(S_D, S_D, NIL), \
491 /* e.g. FCMEQ <V><d>, <V><n>, #0. */
492 #define QL_SISD_FCMP_H_0 \
494 QLF3 (S_H, S_H, NIL), \
497 /* e.g. FMAXNMP <V><d>, <Vn>.<T>. */
498 #define QL_SISD_PAIR \
504 /* e.g. FMAXNMP <V><d>, <Vn>.<T>. */
505 #define QL_SISD_PAIR_H \
510 /* e.g. ADDP <V><d>, <Vn>.<T>. */
511 #define QL_SISD_PAIR_D \
516 /* e.g. DUP <V><d>, <Vn>.<T>[<index>]. */
525 /* e.g. FCVTNS <V><d>, <V><n>. */
526 #define QL_S_2SAMESD \
532 /* e.g. FCVTNS <V><d>, <V><n>. */
533 #define QL_S_2SAMEH \
538 /* e.g. SQXTN <Vb><d>, <Va><n>. */
539 #define QL_SISD_NARROW \
546 /* e.g. FCVTXN <Vb><d>, <Va><n>. */
547 #define QL_SISD_NARROW_S \
563 /* FMOV <Dd>, <Dn>. */
570 /* FMOV <Hd>, <Hn>. */
576 /* e.g. SQADD <V><d>, <V><n>, <V><m>. */
579 QLF3(S_B, S_B, S_B), \
580 QLF3(S_H, S_H, S_H), \
581 QLF3(S_S, S_S, S_S), \
582 QLF3(S_D, S_D, S_D), \
585 /* e.g. CMGE <V><d>, <V><n>, <V><m>. */
586 #define QL_S_3SAMED \
588 QLF3(S_D, S_D, S_D), \
591 /* e.g. SQDMULH <V><d>, <V><n>, <V><m>. */
594 QLF3(S_H, S_H, S_H), \
595 QLF3(S_S, S_S, S_S), \
598 /* e.g. SQDMLAL <Va><d>, <Vb><n>, <Vb><m>. */
599 #define QL_SISDL_HS \
601 QLF3(S_S, S_H, S_H), \
602 QLF3(S_D, S_S, S_S), \
605 /* FMUL <Sd>, <Sn>, <Sm>. */
608 QLF3(S_S, S_S, S_S), \
609 QLF3(S_D, S_D, S_D), \
612 /* FMUL <Hd>, <Hn>, <Hm>. */
615 QLF3 (S_H, S_H, S_H), \
618 /* FMADD <Dd>, <Dn>, <Dm>, <Da>. */
621 QLF4(S_S, S_S, S_S, S_S), \
622 QLF4(S_D, S_D, S_D, S_D), \
625 /* FMADD <Hd>, <Hn>, <Hm>, <Ha>. */
628 QLF4 (S_H, S_H, S_H, S_H), \
631 /* e.g. FCMP <Dn>, #0.0. */
638 /* e.g. FCMP <Hn>, #0.0. */
644 /* FCSEL <Sd>, <Sn>, <Sm>, <cond>. */
647 QLF4(S_S, S_S, S_S, NIL), \
648 QLF4(S_D, S_D, S_D, NIL), \
651 /* FCSEL <Hd>, <Hn>, <Hm>, <cond>. */
652 #define QL_FP_COND_H \
654 QLF4 (S_H, S_H, S_H, NIL), \
657 /* e.g. CCMN <Xn>, <Xm>, #<nzcv>, <cond>. */
660 QLF4(W, W, NIL, NIL), \
661 QLF4(X, X, NIL, NIL), \
664 /* e.g. CCMN <Xn>, #<imm>, #<nzcv>, <cond>, */
665 #define QL_CCMP_IMM \
667 QLF4(W, NIL, NIL, NIL), \
668 QLF4(X, NIL, NIL, NIL), \
671 /* e.g. FCCMP <Sn>, <Sm>, #<nzcv>, <cond>. */
674 QLF4(S_S, S_S, NIL, NIL), \
675 QLF4(S_D, S_D, NIL, NIL), \
678 /* e.g. FCCMP <Sn>, <Sm>, #<nzcv>, <cond>. */
681 QLF4 (S_H, S_H, NIL, NIL), \
684 /* e.g. DUP <Vd>.<T>, <Vn>.<Ts>[<index>]. */
696 /* e.g. DUP <Vd>.<T>, <Wn>. */
708 /* e.g. INS <Vd>.<Ts>[<index>], <Wn>. */
717 /* e.g. SMOV <Wd>, <Vn>.<Ts>[<index>]. */
727 /* e.g. UMOV <Wd>, <Vn>.<Ts>[<index>]. */
736 /* e.g. MOV <Wd>, <Vn>.<Ts>[<index>]. */
743 /* e.g. SUQADD <Vd>.<T>, <Vn>.<T>. */
746 QLF2(V_8B , V_8B ), \
747 QLF2(V_16B, V_16B), \
748 QLF2(V_4H , V_4H ), \
749 QLF2(V_8H , V_8H ), \
750 QLF2(V_2S , V_2S ), \
751 QLF2(V_4S , V_4S ), \
752 QLF2(V_2D , V_2D ), \
755 /* e.g. URSQRTE <Vd>.<T>, <Vn>.<T>. */
758 QLF2(V_2S , V_2S ), \
759 QLF2(V_4S , V_4S ), \
762 /* e.g. REV32 <Vd>.<T>, <Vn>.<T>. */
763 #define QL_V2SAMEBH \
765 QLF2(V_8B , V_8B ), \
766 QLF2(V_16B, V_16B), \
767 QLF2(V_4H , V_4H ), \
768 QLF2(V_8H , V_8H ), \
771 /* e.g. FRINTN <Vd>.<T>, <Vn>.<T>. */
772 #define QL_V2SAMESD \
774 QLF2(V_2S , V_2S ), \
775 QLF2(V_4S , V_4S ), \
776 QLF2(V_2D , V_2D ), \
779 /* e.g. REV64 <Vd>.<T>, <Vn>.<T>. */
780 #define QL_V2SAMEBHS \
782 QLF2(V_8B , V_8B ), \
783 QLF2(V_16B, V_16B), \
784 QLF2(V_4H , V_4H ), \
785 QLF2(V_8H , V_8H ), \
786 QLF2(V_2S , V_2S ), \
787 QLF2(V_4S , V_4S ), \
790 /* e.g. FCMGT <Vd>.<T>, <Vd>.<T>>, #0.0. */
797 /* e.g. REV16 <Vd>.<T>, <Vn>.<T>. */
800 QLF2(V_8B , V_8B ), \
801 QLF2(V_16B, V_16B), \
804 /* e.g. SADDLP <Vd>.<Ta>, <Vn>.<Tb>. */
805 #define QL_V2PAIRWISELONGBHS \
807 QLF2(V_4H , V_8B ), \
808 QLF2(V_8H , V_16B), \
809 QLF2(V_2S , V_4H ), \
810 QLF2(V_4S , V_8H ), \
811 QLF2(V_1D , V_2S ), \
812 QLF2(V_2D , V_4S ), \
815 /* e.g. SHLL<Q> <Vd>.<Ta>, <Vn>.<Tb>, #<shift>. */
816 #define QL_V2LONGBHS \
818 QLF2(V_8H , V_8B ), \
819 QLF2(V_4S , V_4H ), \
820 QLF2(V_2D , V_2S ), \
823 /* e.g. SHLL<Q> <Vd>.<Ta>, <Vn>.<Tb>, #<shift>. */
824 #define QL_V2LONGBHS2 \
826 QLF2(V_8H , V_16B), \
827 QLF2(V_4S , V_8H ), \
828 QLF2(V_2D , V_4S ), \
834 QLF3(V_8B , V_8B , V_8B ), \
835 QLF3(V_16B, V_16B, V_16B), \
836 QLF3(V_4H , V_4H , V_4H ), \
837 QLF3(V_8H , V_8H , V_8H ), \
838 QLF3(V_2S , V_2S , V_2S ), \
839 QLF3(V_4S , V_4S , V_4S ), \
840 QLF3(V_2D , V_2D , V_2D ) \
844 #define QL_V3SAMEBHS \
846 QLF3(V_8B , V_8B , V_8B ), \
847 QLF3(V_16B, V_16B, V_16B), \
848 QLF3(V_4H , V_4H , V_4H ), \
849 QLF3(V_8H , V_8H , V_8H ), \
850 QLF3(V_2S , V_2S , V_2S ), \
851 QLF3(V_4S , V_4S , V_4S ), \
854 /* e.g. FCVTXN<Q> <Vd>.<Tb>, <Vn>.<Ta>. */
857 QLF2(V_2S , V_2D ), \
860 /* e.g. FCVTXN<Q> <Vd>.<Tb>, <Vn>.<Ta>. */
861 #define QL_V2NARRS2 \
863 QLF2(V_4S , V_2D ), \
866 /* e.g. FCVTN<Q> <Vd>.<Tb>, <Vn>.<Ta>. */
867 #define QL_V2NARRHS \
869 QLF2(V_4H , V_4S ), \
870 QLF2(V_2S , V_2D ), \
873 /* e.g. FCVTN<Q> <Vd>.<Tb>, <Vn>.<Ta>. */
874 #define QL_V2NARRHS2 \
876 QLF2(V_8H , V_4S ), \
877 QLF2(V_4S , V_2D ), \
880 /* e.g. FCVTL<Q> <Vd>.<Ta>, <Vn>.<Tb>. */
881 #define QL_V2LONGHS \
883 QLF2(V_4S , V_4H ), \
884 QLF2(V_2D , V_2S ), \
887 /* e.g. FCVTL<Q> <Vd>.<Ta>, <Vn>.<Tb>. */
888 #define QL_V2LONGHS2 \
890 QLF2(V_4S , V_8H ), \
891 QLF2(V_2D , V_4S ), \
894 /* e.g. XTN<Q> <Vd>.<Tb>, <Vn>.<Ta>. */
895 #define QL_V2NARRBHS \
897 QLF2(V_8B , V_8H ), \
898 QLF2(V_4H , V_4S ), \
899 QLF2(V_2S , V_2D ), \
902 /* e.g. XTN<Q> <Vd>.<Tb>, <Vn>.<Ta>. */
903 #define QL_V2NARRBHS2 \
905 QLF2(V_16B, V_8H ), \
906 QLF2(V_8H , V_4S ), \
907 QLF2(V_4S , V_2D ), \
913 QLF2(V_8B , V_8B ), \
914 QLF2(V_16B, V_16B), \
918 #define QL_V2SAME16B \
920 QLF2(V_16B, V_16B), \
924 #define QL_V2SAME4S \
930 #define QL_V3SAME4S \
932 QLF3(V_4S, V_4S, V_4S), \
938 QLF3(V_8B , V_8B , V_8B ), \
939 QLF3(V_16B, V_16B, V_16B), \
942 /* e.g. EXT <Vd>.<T>, <Vn>.<T>, <Vm>.<T>, #<index>. */
945 QLF4(V_8B , V_8B , V_8B , imm_0_7), \
946 QLF4(V_16B, V_16B, V_16B, imm_0_15), \
950 #define QL_V3SAMEHS \
952 QLF3(V_4H , V_4H , V_4H ), \
953 QLF3(V_8H , V_8H , V_8H ), \
954 QLF3(V_2S , V_2S , V_2S ), \
955 QLF3(V_4S , V_4S , V_4S ), \
959 #define QL_V3SAMESD \
961 QLF3(V_2S , V_2S , V_2S ), \
962 QLF3(V_4S , V_4S , V_4S ), \
963 QLF3(V_2D , V_2D , V_2D ) \
966 /* e.g. FMAXNM <Vd>.<T>, <Vn>.<T>, <Vm>.<T>. */
969 QLF3 (V_4H , V_4H , V_4H ), \
970 QLF3 (V_8H , V_8H , V_8H ), \
973 /* e.g. SQDMLAL<Q> <Vd>.<Ta>, <Vn>.<Tb>, <Vm>.<Tb>. */
974 #define QL_V3LONGHS \
976 QLF3(V_4S , V_4H , V_4H ), \
977 QLF3(V_2D , V_2S , V_2S ), \
980 /* e.g. SQDMLAL<Q> <Vd>.<Ta>, <Vn>.<Tb>, <Vm>.<Tb>. */
981 #define QL_V3LONGHS2 \
983 QLF3(V_4S , V_8H , V_8H ), \
984 QLF3(V_2D , V_4S , V_4S ), \
987 /* e.g. SADDL<Q> <Vd>.<Ta>, <Vn>.<Tb>, <Vm>.<Tb>. */
988 #define QL_V3LONGBHS \
990 QLF3(V_8H , V_8B , V_8B ), \
991 QLF3(V_4S , V_4H , V_4H ), \
992 QLF3(V_2D , V_2S , V_2S ), \
995 /* e.g. SADDL<Q> <Vd>.<Ta>, <Vn>.<Tb>, <Vm>.<Tb>. */
996 #define QL_V3LONGBHS2 \
998 QLF3(V_8H , V_16B , V_16B ), \
999 QLF3(V_4S , V_8H , V_8H ), \
1000 QLF3(V_2D , V_4S , V_4S ), \
1003 /* e.g. SADDW<Q> <Vd>.<Ta>, <Vn>.<Ta>, <Vm>.<Tb>. */
1004 #define QL_V3WIDEBHS \
1006 QLF3(V_8H , V_8H , V_8B ), \
1007 QLF3(V_4S , V_4S , V_4H ), \
1008 QLF3(V_2D , V_2D , V_2S ), \
1011 /* e.g. SADDW<Q> <Vd>.<Ta>, <Vn>.<Ta>, <Vm>.<Tb>. */
1012 #define QL_V3WIDEBHS2 \
1014 QLF3(V_8H , V_8H , V_16B ), \
1015 QLF3(V_4S , V_4S , V_8H ), \
1016 QLF3(V_2D , V_2D , V_4S ), \
1019 /* e.g. ADDHN<Q> <Vd>.<Tb>, <Vn>.<Ta>, <Vm>.<Ta>. */
1020 #define QL_V3NARRBHS \
1022 QLF3(V_8B , V_8H , V_8H ), \
1023 QLF3(V_4H , V_4S , V_4S ), \
1024 QLF3(V_2S , V_2D , V_2D ), \
1027 /* e.g. ADDHN<Q> <Vd>.<Tb>, <Vn>.<Ta>, <Vm>.<Ta>. */
1028 #define QL_V3NARRBHS2 \
1030 QLF3(V_16B , V_8H , V_8H ), \
1031 QLF3(V_8H , V_4S , V_4S ), \
1032 QLF3(V_4S , V_2D , V_2D ), \
1036 #define QL_V3LONGB \
1038 QLF3(V_8H , V_8B , V_8B ), \
1041 /* e.g. PMULL crypto. */
1042 #define QL_V3LONGD \
1044 QLF3(V_1Q , V_1D , V_1D ), \
1048 #define QL_V3LONGB2 \
1050 QLF3(V_8H , V_16B, V_16B), \
1053 /* e.g. PMULL2 crypto. */
1054 #define QL_V3LONGD2 \
1056 QLF3(V_1Q , V_2D , V_2D ), \
1062 QLF3(S_Q, S_S, V_4S), \
1065 /* e.g. SHA256H2. */
1066 #define QL_SHA256UPT \
1068 QLF3(S_Q, S_Q, V_4S), \
1071 /* e.g. LDXRB <Wt>, [<Xn|SP>{,#0}]. */
1072 #define QL_W1_LDST_EXC \
1077 /* e.g. LDXR <Xt>, [<Xn|SP>{,#0}]. */
1084 /* e.g. STXRB <Ws>, <Wt>, [<Xn|SP>{,#0}]. */
1085 #define QL_W2_LDST_EXC \
1090 /* e.g. STXR <Ws>, <Xt>, [<Xn|SP>{,#0}]. */
1091 #define QL_R2_LDST_EXC \
1097 /* e.g. LDXP <Xt1>, <Xt2>, [<Xn|SP>{,#0}]. */
1104 /* e.g. CASP <Xt1>, <Xt1+1>, <Xt2>, <Xt2+1>, [<Xn|SP>{,#0}]. */
1107 QLF5(W, W, W, W, NIL), \
1108 QLF5(X, X, X, X, NIL), \
1111 /* e.g. STXP <Ws>, <Xt1>, <Xt2>, [<Xn|SP>{,#0}]. */
1112 #define QL_R3_LDST_EXC \
1114 QLF4(W, W, W, NIL), \
1115 QLF4(W, X, X, NIL), \
1118 /* e.g. STR <Qt>, [<Xn|SP>, <R><m>{, <extend> {<amount>}}]. */
1119 #define QL_LDST_FP \
1128 /* e.g. STR <Xt>, [<Xn|SP>, <R><m>{, <extend> {<amount>}}]. */
1135 /* e.g. STRB <Wt>, [<Xn|SP>, <R><m>{, <extend> {<amount>}}]. */
1136 #define QL_LDST_W8 \
1141 /* e.g. LDRSB <Wt>, [<Xn|SP>, <R><m>{, <extend> {<amount>}}]. */
1142 #define QL_LDST_R8 \
1148 /* e.g. STRH <Wt>, [<Xn|SP>, <R><m>{, <extend> {<amount>}}]. */
1149 #define QL_LDST_W16 \
1154 /* e.g. LDRSW <Xt>, [<Xn|SP>, <R><m>{, <extend> {<amount>}}]. */
1155 #define QL_LDST_X32 \
1160 /* e.g. LDRSH <Wt>, [<Xn|SP>, <R><m>{, <extend> {<amount>}}]. */
1161 #define QL_LDST_R16 \
1167 /* e.g. PRFM <prfop>, [<Xn|SP>, <R><m>{, <extend> {<amount>}}]. */
1168 #define QL_LDST_PRFM \
1173 /* e.g. LDPSW <Xt1>, <Xt2>, [<Xn|SP>{, #<imm>}]. */
1174 #define QL_LDST_PAIR_X32 \
1179 /* e.g. STP <Wt1>, <Wt2>, [<Xn|SP>, #<imm>]!. */
1180 #define QL_LDST_PAIR_R \
1186 /* e.g. STNP <Qt1>, <Qt2>, [<Xn|SP>{, #<imm>}]. */
1187 #define QL_LDST_PAIR_FP \
1189 QLF3(S_S, S_S, S_S), \
1190 QLF3(S_D, S_D, S_D), \
1191 QLF3(S_Q, S_Q, S_Q), \
1194 /* e.g. LD3 {<Vt>.<T>, <Vt2>.<T>, <Vt3>.<T>}, [<Xn|SP>]. */
1195 #define QL_SIMD_LDST \
1206 /* e.g. LD1 {<Vt>.<T>, <Vt2>.<T>, <Vt3>.<T>}, [<Xn|SP>]. */
1207 #define QL_SIMD_LDST_ANY \
1219 /* e.g. LD4 {<Vt>.<T>, <Vt2a>.<T>, <Vt3a>.<T>, <Vt4a>.<T>}[<index>], [<Xn|SP>]. */
1220 #define QL_SIMD_LDSTONE \
1228 /* e.g. ADDV <V><d>, <Vn>.<T>. */
1238 /* e.g. FMINV <V><d>, <Vn>.<T>. */
1239 #define QL_XLANES_FP \
1244 /* e.g. FMINV <V><d>, <Vn>.<T>. */
1245 #define QL_XLANES_FP_H \
1251 /* e.g. SADDLV <V><d>, <Vn>.<T>. */
1252 #define QL_XLANES_L \
1261 /* e.g. MUL <Vd>.<T>, <Vn>.<T>, <Vm>.<Ts>[<index>]. */
1262 #define QL_ELEMENT \
1264 QLF3(V_4H, V_4H, S_H), \
1265 QLF3(V_8H, V_8H, S_H), \
1266 QLF3(V_2S, V_2S, S_S), \
1267 QLF3(V_4S, V_4S, S_S), \
1270 /* e.g. SMLAL <Vd>.<Ta>, <Vn>.<Tb>, <Vm>.<Ts>[<index>]. */
1271 #define QL_ELEMENT_L \
1273 QLF3(V_4S, V_4H, S_H), \
1274 QLF3(V_2D, V_2S, S_S), \
1277 /* e.g. SMLAL2 <Vd>.<Ta>, <Vn>.<Tb>, <Vm>.<Ts>[<index>]. */
1278 #define QL_ELEMENT_L2 \
1280 QLF3(V_4S, V_8H, S_H), \
1281 QLF3(V_2D, V_4S, S_S), \
1284 /* e.g. FMLA <V><d>, <V><n>, <Vm>.<Ts>[<index>]. */
1285 #define QL_ELEMENT_FP \
1287 QLF3(V_2S, V_2S, S_S), \
1288 QLF3(V_4S, V_4S, S_S), \
1289 QLF3(V_2D, V_2D, S_D), \
1292 /* e.g. FMLA <V><d>, <V><n>, <Vm>.<Ts>[<index>]. */
1293 #define QL_ELEMENT_FP_H \
1295 QLF3 (V_4H, V_4H, S_H), \
1296 QLF3 (V_8H, V_8H, S_H), \
1299 /* e.g. MOVI <Vd>.4S, #<imm8> {, LSL #<amount>}. */
1300 #define QL_SIMD_IMM_S0W \
1306 /* e.g. MOVI <Vd>.4S, #<imm8>, MSL #<amount>. */
1307 #define QL_SIMD_IMM_S1W \
1313 /* e.g. MOVI <Vd>.4H, #<imm8> {, LSL #<amount>}. */
1314 #define QL_SIMD_IMM_S0H \
1320 /* e.g. FMOV <Vd>.<T>, #<imm>. */
1321 #define QL_SIMD_IMM_S \
1327 /* e.g. MOVI <Vd>.8B, #<imm8> {, LSL #<amount>}. */
1328 #define QL_SIMD_IMM_B \
1333 /* e.g. MOVI <Dd>, #<imm>. */
1334 #define QL_SIMD_IMM_D \
1339 /* e.g. FMOV <Vd>.<T>, #<imm>. */
1340 #define QL_SIMD_IMM_H \
1346 /* e.g. MOVI <Vd>.2D, #<imm>. */
1347 #define QL_SIMD_IMM_V2D \
1352 /* The naming convention for SVE macros is:
1354 OP_SVE_<operands>[_<sizes>]*
1356 <operands> contains one character per operand, using the following scheme:
1358 - U: the operand is unqualified (NIL).
1360 - [BHSD]: the operand has a S_[BHSD] qualifier and the choice of
1361 qualifier is the same for all variants. This is used for both
1362 .[BHSD] suffixes on an SVE predicate or vector register and
1363 scalar FPRs of the form [BHSD]<number>.
1365 - [WX]: the operand has a [WX] qualifier and the choice of qualifier
1366 is the same for all variants.
1368 - [ZM]: the operand has a /[ZM] suffix and the choice of suffix
1369 is the same for all variants.
1371 - V: the operand has a S_[BHSD] qualifier and the choice of qualifier
1372 is not the same for all variants.
1374 - R: the operand has a [WX] qualifier and the choice of qualifier is
1375 not the same for all variants.
1377 - P: the operand has a /[ZM] suffix and the choice of suffix is not
1378 the same for all variants.
1380 The _<sizes>, if present, give the subset of [BHSD] that are accepted
1381 by the V entries in <operands>. */
1390 #define OP_SVE_BBBU \
1392 QLF4(S_B,S_B,S_B,NIL), \
1394 #define OP_SVE_BMB \
1396 QLF3(S_B,P_M,S_B), \
1398 #define OP_SVE_BPB \
1400 QLF3(S_B,P_Z,S_B), \
1401 QLF3(S_B,P_M,S_B), \
1403 #define OP_SVE_BUB \
1405 QLF3(S_B,NIL,S_B), \
1407 #define OP_SVE_BUBB \
1409 QLF4(S_B,NIL,S_B,S_B), \
1411 #define OP_SVE_BUU \
1413 QLF3(S_B,NIL,NIL), \
1419 #define OP_SVE_BZB \
1421 QLF3(S_B,P_Z,S_B), \
1423 #define OP_SVE_BZBB \
1425 QLF4(S_B,P_Z,S_B,S_B), \
1427 #define OP_SVE_BZU \
1429 QLF3(S_B,P_Z,NIL), \
1435 #define OP_SVE_DDD \
1437 QLF3(S_D,S_D,S_D), \
1439 #define OP_SVE_DMD \
1441 QLF3(S_D,P_M,S_D), \
1443 #define OP_SVE_DMH \
1445 QLF3(S_D,P_M,S_H), \
1447 #define OP_SVE_DMS \
1449 QLF3(S_D,P_M,S_S), \
1455 #define OP_SVE_DUD \
1457 QLF3(S_D,NIL,S_D), \
1459 #define OP_SVE_DUU \
1461 QLF3(S_D,NIL,NIL), \
1463 #define OP_SVE_DUV_BHS \
1465 QLF3(S_D,NIL,S_B), \
1466 QLF3(S_D,NIL,S_H), \
1467 QLF3(S_D,NIL,S_S), \
1469 #define OP_SVE_DUV_BHSD \
1471 QLF3(S_D,NIL,S_B), \
1472 QLF3(S_D,NIL,S_H), \
1473 QLF3(S_D,NIL,S_S), \
1474 QLF3(S_D,NIL,S_D), \
1476 #define OP_SVE_DZD \
1478 QLF3(S_D,P_Z,S_D), \
1480 #define OP_SVE_DZU \
1482 QLF3(S_D,P_Z,NIL), \
1488 #define OP_SVE_HMD \
1490 QLF3(S_H,P_M,S_D), \
1492 #define OP_SVE_HMS \
1494 QLF3(S_H,P_M,S_S), \
1500 #define OP_SVE_HUU \
1502 QLF3(S_H,NIL,NIL), \
1504 #define OP_SVE_HZU \
1506 QLF3(S_H,P_Z,NIL), \
1513 #define OP_SVE_RURV_BHSD \
1515 QLF4(W,NIL,W,S_B), \
1516 QLF4(W,NIL,W,S_H), \
1517 QLF4(W,NIL,W,S_S), \
1518 QLF4(X,NIL,X,S_D), \
1520 #define OP_SVE_RUV_BHSD \
1527 #define OP_SVE_SMD \
1529 QLF3(S_S,P_M,S_D), \
1531 #define OP_SVE_SMH \
1533 QLF3(S_S,P_M,S_H), \
1535 #define OP_SVE_SMS \
1537 QLF3(S_S,P_M,S_S), \
1543 #define OP_SVE_SUS \
1545 QLF3(S_S,NIL,S_S), \
1547 #define OP_SVE_SUU \
1549 QLF3(S_S,NIL,NIL), \
1551 #define OP_SVE_SZS \
1553 QLF3(S_S,P_Z,S_S), \
1555 #define OP_SVE_SZU \
1557 QLF3(S_S,P_Z,NIL), \
1563 #define OP_SVE_UUD \
1565 QLF3(NIL,NIL,S_D), \
1567 #define OP_SVE_UUS \
1569 QLF3(NIL,NIL,S_S), \
1571 #define OP_SVE_VMR_BHSD \
1578 #define OP_SVE_VMU_SD \
1580 QLF3(S_S,P_M,NIL), \
1581 QLF3(S_D,P_M,NIL), \
1583 #define OP_SVE_VMVD_BHS \
1585 QLF4(S_B,P_M,S_B,S_D), \
1586 QLF4(S_H,P_M,S_H,S_D), \
1587 QLF4(S_S,P_M,S_S,S_D), \
1589 #define OP_SVE_VMVU_BHSD \
1591 QLF4(S_B,P_M,S_B,NIL), \
1592 QLF4(S_H,P_M,S_H,NIL), \
1593 QLF4(S_S,P_M,S_S,NIL), \
1594 QLF4(S_D,P_M,S_D,NIL), \
1596 #define OP_SVE_VMVU_SD \
1598 QLF4(S_S,P_M,S_S,NIL), \
1599 QLF4(S_D,P_M,S_D,NIL), \
1601 #define OP_SVE_VMVV_BHSD \
1603 QLF4(S_B,P_M,S_B,S_B), \
1604 QLF4(S_H,P_M,S_H,S_H), \
1605 QLF4(S_S,P_M,S_S,S_S), \
1606 QLF4(S_D,P_M,S_D,S_D), \
1608 #define OP_SVE_VMVV_SD \
1610 QLF4(S_S,P_M,S_S,S_S), \
1611 QLF4(S_D,P_M,S_D,S_D), \
1613 #define OP_SVE_VMV_BHSD \
1615 QLF3(S_B,P_M,S_B), \
1616 QLF3(S_H,P_M,S_H), \
1617 QLF3(S_S,P_M,S_S), \
1618 QLF3(S_D,P_M,S_D), \
1620 #define OP_SVE_VMV_HSD \
1622 QLF3(S_H,P_M,S_H), \
1623 QLF3(S_S,P_M,S_S), \
1624 QLF3(S_D,P_M,S_D), \
1626 #define OP_SVE_VMV_SD \
1628 QLF3(S_S,P_M,S_S), \
1629 QLF3(S_D,P_M,S_D), \
1631 #define OP_SVE_VM_SD \
1636 #define OP_SVE_VPU_BHSD \
1638 QLF3(S_B,P_Z,NIL), \
1639 QLF3(S_B,P_M,NIL), \
1640 QLF3(S_H,P_Z,NIL), \
1641 QLF3(S_H,P_M,NIL), \
1642 QLF3(S_S,P_Z,NIL), \
1643 QLF3(S_S,P_M,NIL), \
1644 QLF3(S_D,P_Z,NIL), \
1645 QLF3(S_D,P_M,NIL), \
1647 #define OP_SVE_VPV_BHSD \
1649 QLF3(S_B,P_Z,S_B), \
1650 QLF3(S_B,P_M,S_B), \
1651 QLF3(S_H,P_Z,S_H), \
1652 QLF3(S_H,P_M,S_H), \
1653 QLF3(S_S,P_Z,S_S), \
1654 QLF3(S_S,P_M,S_S), \
1655 QLF3(S_D,P_Z,S_D), \
1656 QLF3(S_D,P_M,S_D), \
1658 #define OP_SVE_VRR_BHSD \
1665 #define OP_SVE_VRU_BHSD \
1672 #define OP_SVE_VR_BHSD \
1679 #define OP_SVE_VUR_BHSD \
1686 #define OP_SVE_VUU_BHSD \
1688 QLF3(S_B,NIL,NIL), \
1689 QLF3(S_H,NIL,NIL), \
1690 QLF3(S_S,NIL,NIL), \
1691 QLF3(S_D,NIL,NIL), \
1693 #define OP_SVE_VUVV_BHSD \
1695 QLF4(S_B,NIL,S_B,S_B), \
1696 QLF4(S_H,NIL,S_H,S_H), \
1697 QLF4(S_S,NIL,S_S,S_S), \
1698 QLF4(S_D,NIL,S_D,S_D), \
1700 #define OP_SVE_VUVV_SD \
1702 QLF4(S_S,NIL,S_S,S_S), \
1703 QLF4(S_D,NIL,S_D,S_D), \
1705 #define OP_SVE_VUV_BHSD \
1707 QLF3(S_B,NIL,S_B), \
1708 QLF3(S_H,NIL,S_H), \
1709 QLF3(S_S,NIL,S_S), \
1710 QLF3(S_D,NIL,S_D), \
1712 #define OP_SVE_VUV_SD \
1714 QLF3(S_S,NIL,S_S), \
1715 QLF3(S_D,NIL,S_D), \
1717 #define OP_SVE_VU_BHSD \
1724 #define OP_SVE_VU_HSD \
1730 #define OP_SVE_VU_SD \
1735 #define OP_SVE_VVD_BHS \
1737 QLF3(S_B,S_B,S_D), \
1738 QLF3(S_H,S_H,S_D), \
1739 QLF3(S_S,S_S,S_D), \
1741 #define OP_SVE_VVU_BHSD \
1743 QLF3(S_B,S_B,NIL), \
1744 QLF3(S_H,S_H,NIL), \
1745 QLF3(S_S,S_S,NIL), \
1746 QLF3(S_D,S_D,NIL), \
1748 #define OP_SVE_VVVU_SD \
1750 QLF4(S_S,S_S,S_S,NIL), \
1751 QLF4(S_D,S_D,S_D,NIL), \
1753 #define OP_SVE_VVV_BHSD \
1755 QLF3(S_B,S_B,S_B), \
1756 QLF3(S_H,S_H,S_H), \
1757 QLF3(S_S,S_S,S_S), \
1758 QLF3(S_D,S_D,S_D), \
1760 #define OP_SVE_VVV_SD \
1762 QLF3(S_S,S_S,S_S), \
1763 QLF3(S_D,S_D,S_D), \
1765 #define OP_SVE_VV_BHSD \
1772 #define OP_SVE_VV_HSD_BHS \
1778 #define OP_SVE_VV_SD \
1783 #define OP_SVE_VWW_BHSD \
1790 #define OP_SVE_VXX_BHSD \
1797 #define OP_SVE_VZVD_BHS \
1799 QLF4(S_B,P_Z,S_B,S_D), \
1800 QLF4(S_H,P_Z,S_H,S_D), \
1801 QLF4(S_S,P_Z,S_S,S_D), \
1803 #define OP_SVE_VZVU_BHSD \
1805 QLF4(S_B,P_Z,S_B,NIL), \
1806 QLF4(S_H,P_Z,S_H,NIL), \
1807 QLF4(S_S,P_Z,S_S,NIL), \
1808 QLF4(S_D,P_Z,S_D,NIL), \
1810 #define OP_SVE_VZVV_BHSD \
1812 QLF4(S_B,P_Z,S_B,S_B), \
1813 QLF4(S_H,P_Z,S_H,S_H), \
1814 QLF4(S_S,P_Z,S_S,S_S), \
1815 QLF4(S_D,P_Z,S_D,S_D), \
1817 #define OP_SVE_VZVV_SD \
1819 QLF4(S_S,P_Z,S_S,S_S), \
1820 QLF4(S_D,P_Z,S_D,S_D), \
1822 #define OP_SVE_VZV_SD \
1824 QLF3(S_S,P_Z,S_S), \
1825 QLF3(S_D,P_Z,S_D), \
1827 #define OP_SVE_V_SD \
1836 #define OP_SVE_WV_BHSD \
1847 #define OP_SVE_XUV_BHSD \
1854 #define OP_SVE_XVW_BHSD \
1861 #define OP_SVE_XV_BHSD \
1868 #define OP_SVE_XWU \
1872 #define OP_SVE_XXU \
1879 static const aarch64_feature_set aarch64_feature_v8
=
1880 AARCH64_FEATURE (AARCH64_FEATURE_V8
, 0);
1881 static const aarch64_feature_set aarch64_feature_fp
=
1882 AARCH64_FEATURE (AARCH64_FEATURE_FP
, 0);
1883 static const aarch64_feature_set aarch64_feature_simd
=
1884 AARCH64_FEATURE (AARCH64_FEATURE_SIMD
, 0);
1885 static const aarch64_feature_set aarch64_feature_crypto
=
1886 AARCH64_FEATURE (AARCH64_FEATURE_CRYPTO
, 0);
1887 static const aarch64_feature_set aarch64_feature_crc
=
1888 AARCH64_FEATURE (AARCH64_FEATURE_CRC
, 0);
1889 static const aarch64_feature_set aarch64_feature_lse
=
1890 AARCH64_FEATURE (AARCH64_FEATURE_LSE
, 0);
1891 static const aarch64_feature_set aarch64_feature_lor
=
1892 AARCH64_FEATURE (AARCH64_FEATURE_LOR
, 0);
1893 static const aarch64_feature_set aarch64_feature_rdma
=
1894 AARCH64_FEATURE (AARCH64_FEATURE_RDMA
, 0);
1895 static const aarch64_feature_set aarch64_feature_ras
=
1896 AARCH64_FEATURE (AARCH64_FEATURE_RAS
, 0);
1897 static const aarch64_feature_set aarch64_feature_v8_2
=
1898 AARCH64_FEATURE (AARCH64_FEATURE_V8_2
, 0);
1899 static const aarch64_feature_set aarch64_feature_fp_f16
=
1900 AARCH64_FEATURE (AARCH64_FEATURE_F16
| AARCH64_FEATURE_FP
, 0);
1901 static const aarch64_feature_set aarch64_feature_simd_f16
=
1902 AARCH64_FEATURE (AARCH64_FEATURE_F16
| AARCH64_FEATURE_SIMD
, 0);
1903 static const aarch64_feature_set aarch64_feature_stat_profile
=
1904 AARCH64_FEATURE (AARCH64_FEATURE_PROFILE
, 0);
1905 static const aarch64_feature_set aarch64_feature_sve
=
1906 AARCH64_FEATURE (AARCH64_FEATURE_SVE
, 0);
1908 #define CORE &aarch64_feature_v8
1909 #define FP &aarch64_feature_fp
1910 #define SIMD &aarch64_feature_simd
1911 #define CRYPTO &aarch64_feature_crypto
1912 #define CRC &aarch64_feature_crc
1913 #define LSE &aarch64_feature_lse
1914 #define LOR &aarch64_feature_lor
1915 #define RDMA &aarch64_feature_rdma
1916 #define FP_F16 &aarch64_feature_fp_f16
1917 #define SIMD_F16 &aarch64_feature_simd_f16
1918 #define RAS &aarch64_feature_ras
1919 #define STAT_PROFILE &aarch64_feature_stat_profile
1920 #define ARMV8_2 &aarch64_feature_v8_2
1921 #define SVE &aarch64_feature_sve
1923 #define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \
1924 { NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, NULL }
1925 #define __FP_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \
1926 { NAME, OPCODE, MASK, CLASS, OP, FP, OPS, QUALS, FLAGS, 0, NULL }
1927 #define SIMD_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \
1928 { NAME, OPCODE, MASK, CLASS, OP, SIMD, OPS, QUALS, FLAGS, 0, NULL }
1929 #define CRYP_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
1930 { NAME, OPCODE, MASK, CLASS, 0, CRYPTO, OPS, QUALS, FLAGS, 0, NULL }
1931 #define _CRC_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
1932 { NAME, OPCODE, MASK, CLASS, 0, CRC, OPS, QUALS, FLAGS, 0, NULL }
1933 #define _LSE_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
1934 { NAME, OPCODE, MASK, CLASS, 0, LSE, OPS, QUALS, FLAGS, 0, NULL }
1935 #define _LOR_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
1936 { NAME, OPCODE, MASK, CLASS, 0, LOR, OPS, QUALS, FLAGS, 0, NULL }
1937 #define RDMA_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
1938 { NAME, OPCODE, MASK, CLASS, 0, RDMA, OPS, QUALS, FLAGS, 0, NULL }
1939 #define FF16_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
1940 { NAME, OPCODE, MASK, CLASS, 0, FP_F16, OPS, QUALS, FLAGS, 0, NULL }
1941 #define SF16_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
1942 { NAME, OPCODE, MASK, CLASS, 0, SIMD_F16, OPS, QUALS, FLAGS, 0, NULL }
1943 #define V8_2_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \
1944 { NAME, OPCODE, MASK, CLASS, OP, ARMV8_2, OPS, QUALS, FLAGS, 0, NULL }
1945 #define _SVE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
1946 { NAME, OPCODE, MASK, CLASS, OP, SVE, OPS, QUALS, \
1947 FLAGS | F_STRICT, TIED, NULL }
1949 struct aarch64_opcode aarch64_opcode_table
[] =
1951 /* Add/subtract (with carry). */
1952 CORE_INSN ("adc", 0x1a000000, 0x7fe0fc00, addsub_carry
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_SF
),
1953 CORE_INSN ("adcs", 0x3a000000, 0x7fe0fc00, addsub_carry
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_SF
),
1954 CORE_INSN ("sbc", 0x5a000000, 0x7fe0fc00, addsub_carry
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_HAS_ALIAS
| F_SF
),
1955 CORE_INSN ("ngc", 0x5a0003e0, 0x7fe0ffe0, addsub_carry
, 0, OP2 (Rd
, Rm
), QL_I2SAME
, F_ALIAS
| F_SF
),
1956 CORE_INSN ("sbcs", 0x7a000000, 0x7fe0fc00, addsub_carry
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_HAS_ALIAS
| F_SF
),
1957 CORE_INSN ("ngcs", 0x7a0003e0, 0x7fe0ffe0, addsub_carry
, 0, OP2 (Rd
, Rm
), QL_I2SAME
, F_ALIAS
| F_SF
),
1958 /* Add/subtract (extended register). */
1959 CORE_INSN ("add", 0x0b200000, 0x7fe00000, addsub_ext
, 0, OP3 (Rd_SP
, Rn_SP
, Rm_EXT
), QL_I3_EXT
, F_SF
),
1960 CORE_INSN ("adds", 0x2b200000, 0x7fe00000, addsub_ext
, 0, OP3 (Rd
, Rn_SP
, Rm_EXT
), QL_I3_EXT
, F_HAS_ALIAS
| F_SF
),
1961 CORE_INSN ("cmn", 0x2b20001f, 0x7fe0001f, addsub_ext
, 0, OP2 (Rn_SP
, Rm_EXT
), QL_I2_EXT
, F_ALIAS
| F_SF
),
1962 CORE_INSN ("sub", 0x4b200000, 0x7fe00000, addsub_ext
, 0, OP3 (Rd_SP
, Rn_SP
, Rm_EXT
), QL_I3_EXT
, F_SF
),
1963 CORE_INSN ("subs", 0x6b200000, 0x7fe00000, addsub_ext
, 0, OP3 (Rd
, Rn_SP
, Rm_EXT
), QL_I3_EXT
, F_HAS_ALIAS
| F_SF
),
1964 CORE_INSN ("cmp", 0x6b20001f, 0x7fe0001f, addsub_ext
, 0, OP2 (Rn_SP
, Rm_EXT
), QL_I2_EXT
, F_ALIAS
| F_SF
),
1965 /* Add/subtract (immediate). */
1966 CORE_INSN ("add", 0x11000000, 0x7f000000, addsub_imm
, OP_ADD
, OP3 (Rd_SP
, Rn_SP
, AIMM
), QL_R2NIL
, F_HAS_ALIAS
| F_SF
),
1967 CORE_INSN ("mov", 0x11000000, 0x7ffffc00, addsub_imm
, 0, OP2 (Rd_SP
, Rn_SP
), QL_I2SP
, F_ALIAS
| F_SF
),
1968 CORE_INSN ("adds", 0x31000000, 0x7f000000, addsub_imm
, 0, OP3 (Rd
, Rn_SP
, AIMM
), QL_R2NIL
, F_HAS_ALIAS
| F_SF
),
1969 CORE_INSN ("cmn", 0x3100001f, 0x7f00001f, addsub_imm
, 0, OP2 (Rn_SP
, AIMM
), QL_R1NIL
, F_ALIAS
| F_SF
),
1970 CORE_INSN ("sub", 0x51000000, 0x7f000000, addsub_imm
, 0, OP3 (Rd_SP
, Rn_SP
, AIMM
), QL_R2NIL
, F_SF
),
1971 CORE_INSN ("subs", 0x71000000, 0x7f000000, addsub_imm
, 0, OP3 (Rd
, Rn_SP
, AIMM
), QL_R2NIL
, F_HAS_ALIAS
| F_SF
),
1972 CORE_INSN ("cmp", 0x7100001f, 0x7f00001f, addsub_imm
, 0, OP2 (Rn_SP
, AIMM
), QL_R1NIL
, F_ALIAS
| F_SF
),
1973 /* Add/subtract (shifted register). */
1974 CORE_INSN ("add", 0x0b000000, 0x7f200000, addsub_shift
, 0, OP3 (Rd
, Rn
, Rm_SFT
), QL_I3SAMER
, F_SF
),
1975 CORE_INSN ("adds", 0x2b000000, 0x7f200000, addsub_shift
, 0, OP3 (Rd
, Rn
, Rm_SFT
), QL_I3SAMER
, F_HAS_ALIAS
| F_SF
),
1976 CORE_INSN ("cmn", 0x2b00001f, 0x7f20001f, addsub_shift
, 0, OP2 (Rn
, Rm_SFT
), QL_I2SAME
, F_ALIAS
| F_SF
),
1977 CORE_INSN ("sub", 0x4b000000, 0x7f200000, addsub_shift
, 0, OP3 (Rd
, Rn
, Rm_SFT
), QL_I3SAMER
, F_HAS_ALIAS
| F_SF
),
1978 CORE_INSN ("neg", 0x4b0003e0, 0x7f2003e0, addsub_shift
, 0, OP2 (Rd
, Rm_SFT
), QL_I2SAME
, F_ALIAS
| F_SF
),
1979 CORE_INSN ("subs", 0x6b000000, 0x7f200000, addsub_shift
, 0, OP3 (Rd
, Rn
, Rm_SFT
), QL_I3SAMER
, F_HAS_ALIAS
| F_SF
),
1980 CORE_INSN ("cmp", 0x6b00001f, 0x7f20001f, addsub_shift
, 0, OP2 (Rn
, Rm_SFT
), QL_I2SAME
, F_ALIAS
| F_SF
),
1981 CORE_INSN ("negs", 0x6b0003e0, 0x7f2003e0, addsub_shift
, 0, OP2 (Rd
, Rm_SFT
), QL_I2SAME
, F_ALIAS
| F_SF
),
1982 /* AdvSIMD across lanes. */
1983 SIMD_INSN ("saddlv", 0x0e303800, 0xbf3ffc00, asimdall
, 0, OP2 (Fd
, Vn
), QL_XLANES_L
, F_SIZEQ
),
1984 SIMD_INSN ("smaxv", 0x0e30a800, 0xbf3ffc00, asimdall
, 0, OP2 (Fd
, Vn
), QL_XLANES
, F_SIZEQ
),
1985 SIMD_INSN ("sminv", 0x0e31a800, 0xbf3ffc00, asimdall
, 0, OP2 (Fd
, Vn
), QL_XLANES
, F_SIZEQ
),
1986 SIMD_INSN ("addv", 0x0e31b800, 0xbf3ffc00, asimdall
, 0, OP2 (Fd
, Vn
), QL_XLANES
, F_SIZEQ
),
1987 SIMD_INSN ("uaddlv", 0x2e303800, 0xbf3ffc00, asimdall
, 0, OP2 (Fd
, Vn
), QL_XLANES_L
, F_SIZEQ
),
1988 SIMD_INSN ("umaxv", 0x2e30a800, 0xbf3ffc00, asimdall
, 0, OP2 (Fd
, Vn
), QL_XLANES
, F_SIZEQ
),
1989 SIMD_INSN ("uminv", 0x2e31a800, 0xbf3ffc00, asimdall
, 0, OP2 (Fd
, Vn
), QL_XLANES
, F_SIZEQ
),
1990 SIMD_INSN ("fmaxnmv",0x2e30c800, 0xbfbffc00, asimdall
, 0, OP2 (Fd
, Vn
), QL_XLANES_FP
, F_SIZEQ
),
1991 SF16_INSN ("fmaxnmv",0x0e30c800, 0xbffffc00, asimdall
, OP2 (Fd
, Vn
), QL_XLANES_FP_H
, F_SIZEQ
),
1992 SIMD_INSN ("fmaxv", 0x2e30f800, 0xbfbffc00, asimdall
, 0, OP2 (Fd
, Vn
), QL_XLANES_FP
, F_SIZEQ
),
1993 SF16_INSN ("fmaxv", 0x0e30f800, 0xbffffc00, asimdall
, OP2 (Fd
, Vn
), QL_XLANES_FP_H
, F_SIZEQ
),
1994 SIMD_INSN ("fminnmv",0x2eb0c800, 0xbfbffc00, asimdall
, 0, OP2 (Fd
, Vn
), QL_XLANES_FP
, F_SIZEQ
),
1995 SF16_INSN ("fminnmv",0x0eb0c800, 0xbffffc00, asimdall
, OP2 (Fd
, Vn
), QL_XLANES_FP_H
, F_SIZEQ
),
1996 SIMD_INSN ("fminv", 0x2eb0f800, 0xbfbffc00, asimdall
, 0, OP2 (Fd
, Vn
), QL_XLANES_FP
, F_SIZEQ
),
1997 SF16_INSN ("fminv", 0x0eb0f800, 0xbffffc00, asimdall
, OP2 (Fd
, Vn
), QL_XLANES_FP_H
, F_SIZEQ
),
1998 /* AdvSIMD three different. */
1999 SIMD_INSN ("saddl", 0x0e200000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS
, F_SIZEQ
),
2000 SIMD_INSN ("saddl2", 0x4e200000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS2
, F_SIZEQ
),
2001 SIMD_INSN ("saddw", 0x0e201000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3WIDEBHS
, F_SIZEQ
),
2002 SIMD_INSN ("saddw2", 0x4e201000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3WIDEBHS2
, F_SIZEQ
),
2003 SIMD_INSN ("ssubl", 0x0e202000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS
, F_SIZEQ
),
2004 SIMD_INSN ("ssubl2", 0x4e202000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS2
, F_SIZEQ
),
2005 SIMD_INSN ("ssubw", 0x0e203000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3WIDEBHS
, F_SIZEQ
),
2006 SIMD_INSN ("ssubw2", 0x4e203000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3WIDEBHS2
, F_SIZEQ
),
2007 SIMD_INSN ("addhn", 0x0e204000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3NARRBHS
, F_SIZEQ
),
2008 SIMD_INSN ("addhn2", 0x4e204000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3NARRBHS2
, F_SIZEQ
),
2009 SIMD_INSN ("sabal", 0x0e205000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS
, F_SIZEQ
),
2010 SIMD_INSN ("sabal2", 0x4e205000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS2
, F_SIZEQ
),
2011 SIMD_INSN ("subhn", 0x0e206000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3NARRBHS
, F_SIZEQ
),
2012 SIMD_INSN ("subhn2", 0x4e206000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3NARRBHS2
, F_SIZEQ
),
2013 SIMD_INSN ("sabdl", 0x0e207000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS
, F_SIZEQ
),
2014 SIMD_INSN ("sabdl2", 0x4e207000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS2
, F_SIZEQ
),
2015 SIMD_INSN ("smlal", 0x0e208000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS
, F_SIZEQ
),
2016 SIMD_INSN ("smlal2", 0x4e208000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS2
, F_SIZEQ
),
2017 SIMD_INSN ("sqdmlal", 0x0e209000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGHS
, F_SIZEQ
),
2018 SIMD_INSN ("sqdmlal2",0x4e209000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGHS2
, F_SIZEQ
),
2019 SIMD_INSN ("smlsl", 0x0e20a000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS
, F_SIZEQ
),
2020 SIMD_INSN ("smlsl2", 0x4e20a000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS2
, F_SIZEQ
),
2021 SIMD_INSN ("sqdmlsl", 0x0e20b000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGHS
, F_SIZEQ
),
2022 SIMD_INSN ("sqdmlsl2",0x4e20b000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGHS2
, F_SIZEQ
),
2023 SIMD_INSN ("smull", 0x0e20c000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS
, F_SIZEQ
),
2024 SIMD_INSN ("smull2", 0x4e20c000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS2
, F_SIZEQ
),
2025 SIMD_INSN ("sqdmull", 0x0e20d000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGHS
, F_SIZEQ
),
2026 SIMD_INSN ("sqdmull2",0x4e20d000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGHS2
, F_SIZEQ
),
2027 SIMD_INSN ("pmull", 0x0e20e000, 0xffe0fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGB
, 0),
2028 CRYP_INSN ("pmull", 0x0ee0e000, 0xffe0fc00, asimddiff
, OP3 (Vd
, Vn
, Vm
), QL_V3LONGD
, 0),
2029 SIMD_INSN ("pmull2", 0x4e20e000, 0xffe0fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGB2
, 0),
2030 CRYP_INSN ("pmull2", 0x4ee0e000, 0xffe0fc00, asimddiff
, OP3 (Vd
, Vn
, Vm
), QL_V3LONGD2
, 0),
2031 SIMD_INSN ("uaddl", 0x2e200000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS
, F_SIZEQ
),
2032 SIMD_INSN ("uaddl2", 0x6e200000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS2
, F_SIZEQ
),
2033 SIMD_INSN ("uaddw", 0x2e201000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3WIDEBHS
, F_SIZEQ
),
2034 SIMD_INSN ("uaddw2", 0x6e201000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3WIDEBHS2
, F_SIZEQ
),
2035 SIMD_INSN ("usubl", 0x2e202000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS
, F_SIZEQ
),
2036 SIMD_INSN ("usubl2", 0x6e202000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS2
, F_SIZEQ
),
2037 SIMD_INSN ("usubw", 0x2e203000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3WIDEBHS
, F_SIZEQ
),
2038 SIMD_INSN ("usubw2", 0x6e203000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3WIDEBHS2
, F_SIZEQ
),
2039 SIMD_INSN ("raddhn", 0x2e204000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3NARRBHS
, F_SIZEQ
),
2040 SIMD_INSN ("raddhn2", 0x6e204000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3NARRBHS2
, F_SIZEQ
),
2041 SIMD_INSN ("uabal", 0x2e205000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS
, F_SIZEQ
),
2042 SIMD_INSN ("uabal2", 0x6e205000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS2
, F_SIZEQ
),
2043 SIMD_INSN ("rsubhn", 0x2e206000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3NARRBHS
, F_SIZEQ
),
2044 SIMD_INSN ("rsubhn2", 0x6e206000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3NARRBHS2
, F_SIZEQ
),
2045 SIMD_INSN ("uabdl", 0x2e207000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS
, F_SIZEQ
),
2046 SIMD_INSN ("uabdl2", 0x6e207000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS2
, F_SIZEQ
),
2047 SIMD_INSN ("umlal", 0x2e208000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS
, F_SIZEQ
),
2048 SIMD_INSN ("umlal2", 0x6e208000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS2
, F_SIZEQ
),
2049 SIMD_INSN ("umlsl", 0x2e20a000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS
, F_SIZEQ
),
2050 SIMD_INSN ("umlsl2", 0x6e20a000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS2
, F_SIZEQ
),
2051 SIMD_INSN ("umull", 0x2e20c000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS
, F_SIZEQ
),
2052 SIMD_INSN ("umull2", 0x6e20c000, 0xff20fc00, asimddiff
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3LONGBHS2
, F_SIZEQ
),
2053 /* AdvSIMD vector x indexed element. */
2054 SIMD_INSN ("smlal", 0x0f002000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L
, F_SIZEQ
),
2055 SIMD_INSN ("smlal2", 0x4f002000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L2
, F_SIZEQ
),
2056 SIMD_INSN ("sqdmlal", 0x0f003000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L
, F_SIZEQ
),
2057 SIMD_INSN ("sqdmlal2",0x4f003000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L2
, F_SIZEQ
),
2058 SIMD_INSN ("smlsl", 0x0f006000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L
, F_SIZEQ
),
2059 SIMD_INSN ("smlsl2", 0x4f006000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L2
, F_SIZEQ
),
2060 SIMD_INSN ("sqdmlsl", 0x0f007000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L
, F_SIZEQ
),
2061 SIMD_INSN ("sqdmlsl2",0x4f007000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L2
, F_SIZEQ
),
2062 SIMD_INSN ("mul", 0x0f008000, 0xbf00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT
, F_SIZEQ
),
2063 SIMD_INSN ("smull", 0x0f00a000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L
, F_SIZEQ
),
2064 SIMD_INSN ("smull2", 0x4f00a000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L2
, F_SIZEQ
),
2065 SIMD_INSN ("sqdmull", 0x0f00b000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L
, F_SIZEQ
),
2066 SIMD_INSN ("sqdmull2",0x4f00b000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L2
, F_SIZEQ
),
2067 SIMD_INSN ("sqdmulh", 0x0f00c000, 0xbf00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT
, F_SIZEQ
),
2068 SIMD_INSN ("sqrdmulh",0x0f00d000, 0xbf00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT
, F_SIZEQ
),
2069 SIMD_INSN ("fmla", 0x0f801000, 0xbf80f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_FP
, F_SIZEQ
),
2070 SF16_INSN ("fmla", 0x0f001000, 0xbfc0f400, asimdelem
, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_FP_H
, F_SIZEQ
),
2071 SIMD_INSN ("fmls", 0x0f805000, 0xbf80f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_FP
, F_SIZEQ
),
2072 SF16_INSN ("fmls", 0x0f005000, 0xbfc0f400, asimdelem
, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_FP_H
, F_SIZEQ
),
2073 SIMD_INSN ("fmul", 0x0f809000, 0xbf80f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_FP
, F_SIZEQ
),
2074 SF16_INSN ("fmul", 0x0f009000, 0xbfc0f400, asimdelem
, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_FP_H
, F_SIZEQ
),
2075 SIMD_INSN ("mla", 0x2f000000, 0xbf00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT
, F_SIZEQ
),
2076 SIMD_INSN ("umlal", 0x2f002000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L
, F_SIZEQ
),
2077 SIMD_INSN ("umlal2", 0x6f002000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L2
, F_SIZEQ
),
2078 SIMD_INSN ("mls", 0x2f004000, 0xbf00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT
, F_SIZEQ
),
2079 SIMD_INSN ("umlsl", 0x2f006000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L
, F_SIZEQ
),
2080 SIMD_INSN ("umlsl2", 0x6f006000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L2
, F_SIZEQ
),
2081 SIMD_INSN ("umull", 0x2f00a000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L
, F_SIZEQ
),
2082 SIMD_INSN ("umull2", 0x6f00a000, 0xff00f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_L2
, F_SIZEQ
),
2083 SIMD_INSN ("fmulx", 0x2f809000, 0xbf80f400, asimdelem
, 0, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_FP
, F_SIZEQ
),
2084 SF16_INSN ("fmulx", 0x2f009000, 0xbfc0f400, asimdelem
, OP3 (Vd
, Vn
, Em
), QL_ELEMENT_FP_H
, F_SIZEQ
),
2085 RDMA_INSN ("sqrdmlah",0x2f00d000, 0xbf00f400, asimdelem
, OP3 (Vd
, Vn
, Em
), QL_ELEMENT
, F_SIZEQ
),
2086 RDMA_INSN ("sqrdmlsh",0x2f00f000, 0xbf00f400, asimdelem
, OP3 (Vd
, Vn
, Em
), QL_ELEMENT
, F_SIZEQ
),
2088 SIMD_INSN ("ext", 0x2e000000, 0xbfe08400, asimdext
, 0, OP4 (Vd
, Vn
, Vm
, IDX
), QL_VEXT
, F_SIZEQ
),
2089 /* AdvSIMD modified immediate. */
2090 SIMD_INSN ("movi", 0x0f000400, 0xbff89c00, asimdimm
, 0, OP2 (Vd
, SIMD_IMM_SFT
), QL_SIMD_IMM_S0W
, F_SIZEQ
),
2091 SIMD_INSN ("orr", 0x0f001400, 0xbff89c00, asimdimm
, 0, OP2 (Vd
, SIMD_IMM_SFT
), QL_SIMD_IMM_S0W
, F_SIZEQ
),
2092 SIMD_INSN ("movi", 0x0f008400, 0xbff8dc00, asimdimm
, 0, OP2 (Vd
, SIMD_IMM_SFT
), QL_SIMD_IMM_S0H
, F_SIZEQ
),
2093 SIMD_INSN ("orr", 0x0f009400, 0xbff8dc00, asimdimm
, 0, OP2 (Vd
, SIMD_IMM_SFT
), QL_SIMD_IMM_S0H
, F_SIZEQ
),
2094 SIMD_INSN ("movi", 0x0f00c400, 0xbff8ec00, asimdimm
, 0, OP2 (Vd
, SIMD_IMM_SFT
), QL_SIMD_IMM_S1W
, F_SIZEQ
),
2095 SIMD_INSN ("movi", 0x0f00e400, 0xbff8fc00, asimdimm
, 0, OP2 (Vd
, SIMD_IMM_SFT
), QL_SIMD_IMM_B
, F_SIZEQ
),
2096 SIMD_INSN ("fmov", 0x0f00f400, 0xbff8fc00, asimdimm
, 0, OP2 (Vd
, SIMD_FPIMM
), QL_SIMD_IMM_S
, F_SIZEQ
),
2097 SF16_INSN ("fmov", 0x0f00fc00, 0xbff8fc00, asimdimm
, OP2 (Vd
, SIMD_FPIMM
), QL_SIMD_IMM_H
, F_SIZEQ
),
2098 SIMD_INSN ("mvni", 0x2f000400, 0xbff89c00, asimdimm
, 0, OP2 (Vd
, SIMD_IMM_SFT
), QL_SIMD_IMM_S0W
, F_SIZEQ
),
2099 SIMD_INSN ("bic", 0x2f001400, 0xbff89c00, asimdimm
, 0, OP2 (Vd
, SIMD_IMM_SFT
), QL_SIMD_IMM_S0W
, F_SIZEQ
),
2100 SIMD_INSN ("mvni", 0x2f008400, 0xbff8dc00, asimdimm
, 0, OP2 (Vd
, SIMD_IMM_SFT
), QL_SIMD_IMM_S0H
, F_SIZEQ
),
2101 SIMD_INSN ("bic", 0x2f009400, 0xbff8dc00, asimdimm
, 0, OP2 (Vd
, SIMD_IMM_SFT
), QL_SIMD_IMM_S0H
, F_SIZEQ
),
2102 SIMD_INSN ("mvni", 0x2f00c400, 0xbff8ec00, asimdimm
, 0, OP2 (Vd
, SIMD_IMM_SFT
), QL_SIMD_IMM_S1W
, F_SIZEQ
),
2103 SIMD_INSN ("movi", 0x2f00e400, 0xfff8fc00, asimdimm
, 0, OP2 (Sd
, SIMD_IMM
), QL_SIMD_IMM_D
, F_SIZEQ
),
2104 SIMD_INSN ("movi", 0x6f00e400, 0xfff8fc00, asimdimm
, 0, OP2 (Vd
, SIMD_IMM
), QL_SIMD_IMM_V2D
, F_SIZEQ
),
2105 SIMD_INSN ("fmov", 0x6f00f400, 0xfff8fc00, asimdimm
, 0, OP2 (Vd
, SIMD_FPIMM
), QL_SIMD_IMM_V2D
, F_SIZEQ
),
2107 SIMD_INSN ("dup", 0x0e000400, 0xbfe0fc00, asimdins
, 0, OP2 (Vd
, En
), QL_DUP_VX
, F_T
),
2108 SIMD_INSN ("dup", 0x0e000c00, 0xbfe0fc00, asimdins
, 0, OP2 (Vd
, Rn
), QL_DUP_VR
, F_T
),
2109 SIMD_INSN ("smov",0x0e002c00, 0xbfe0fc00, asimdins
, 0, OP2 (Rd
, En
), QL_SMOV
, F_GPRSIZE_IN_Q
),
2110 SIMD_INSN ("umov",0x0e003c00, 0xbfe0fc00, asimdins
, 0, OP2 (Rd
, En
), QL_UMOV
, F_HAS_ALIAS
| F_GPRSIZE_IN_Q
),
2111 SIMD_INSN ("mov", 0x0e003c00, 0xbfe0fc00, asimdins
, 0, OP2 (Rd
, En
), QL_MOV
, F_ALIAS
| F_GPRSIZE_IN_Q
),
2112 SIMD_INSN ("ins", 0x4e001c00, 0xffe0fc00, asimdins
, 0, OP2 (Ed
, Rn
), QL_INS_XR
, F_HAS_ALIAS
),
2113 SIMD_INSN ("mov", 0x4e001c00, 0xffe0fc00, asimdins
, 0, OP2 (Ed
, Rn
), QL_INS_XR
, F_ALIAS
),
2114 SIMD_INSN ("ins", 0x6e000400, 0xffe08400, asimdins
, 0, OP2 (Ed
, En
), QL_S_2SAME
, F_HAS_ALIAS
),
2115 SIMD_INSN ("mov", 0x6e000400, 0xffe08400, asimdins
, 0, OP2 (Ed
, En
), QL_S_2SAME
, F_ALIAS
),
2116 /* AdvSIMD two-reg misc. */
2117 SIMD_INSN ("rev64", 0x0e200800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMEBHS
, F_SIZEQ
),
2118 SIMD_INSN ("rev16", 0x0e201800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMEB
, F_SIZEQ
),
2119 SIMD_INSN ("saddlp",0x0e202800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2PAIRWISELONGBHS
, F_SIZEQ
),
2120 SIMD_INSN ("suqadd",0x0e203800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAME
, F_SIZEQ
),
2121 SIMD_INSN ("cls", 0x0e204800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMEBHS
, F_SIZEQ
),
2122 SIMD_INSN ("cnt", 0x0e205800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMEB
, F_SIZEQ
),
2123 SIMD_INSN ("sadalp",0x0e206800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2PAIRWISELONGBHS
, F_SIZEQ
),
2124 SIMD_INSN ("sqabs", 0x0e207800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAME
, F_SIZEQ
),
2125 SIMD_INSN ("cmgt", 0x0e208800, 0xbf3ffc00, asimdmisc
, 0, OP3 (Vd
, Vn
, IMM0
), QL_V2SAME
, F_SIZEQ
),
2126 SIMD_INSN ("cmeq", 0x0e209800, 0xbf3ffc00, asimdmisc
, 0, OP3 (Vd
, Vn
, IMM0
), QL_V2SAME
, F_SIZEQ
),
2127 SIMD_INSN ("cmlt", 0x0e20a800, 0xbf3ffc00, asimdmisc
, 0, OP3 (Vd
, Vn
, IMM0
), QL_V2SAME
, F_SIZEQ
),
2128 SIMD_INSN ("abs", 0x0e20b800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAME
, F_SIZEQ
),
2129 SIMD_INSN ("xtn", 0x0e212800, 0xff3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2NARRBHS
, F_SIZEQ
),
2130 SIMD_INSN ("xtn2", 0x4e212800, 0xff3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2NARRBHS2
, F_SIZEQ
),
2131 SIMD_INSN ("sqxtn", 0xe214800, 0xff3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2NARRBHS
, F_SIZEQ
),
2132 SIMD_INSN ("sqxtn2",0x4e214800, 0xff3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2NARRBHS2
, F_SIZEQ
),
2133 SIMD_INSN ("fcvtn", 0x0e216800, 0xffbffc00, asimdmisc
, OP_FCVTN
, OP2 (Vd
, Vn
), QL_V2NARRHS
, F_MISC
),
2134 SIMD_INSN ("fcvtn2", 0x4e216800, 0xffbffc00, asimdmisc
, OP_FCVTN2
, OP2 (Vd
, Vn
), QL_V2NARRHS2
, F_MISC
),
2135 SIMD_INSN ("fcvtl", 0x0e217800, 0xffbffc00, asimdmisc
, OP_FCVTL
, OP2 (Vd
, Vn
), QL_V2LONGHS
, F_MISC
),
2136 SIMD_INSN ("fcvtl2", 0x4e217800, 0xffbffc00, asimdmisc
, OP_FCVTL2
, OP2 (Vd
, Vn
), QL_V2LONGHS2
, F_MISC
),
2137 SIMD_INSN ("frintn", 0x0e218800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2138 SF16_INSN ("frintn", 0x0e798800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2139 SIMD_INSN ("frintm", 0x0e219800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2140 SF16_INSN ("frintm", 0x0e799800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2141 SIMD_INSN ("fcvtns", 0x0e21a800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2142 SF16_INSN ("fcvtns", 0x0e79a800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2143 SIMD_INSN ("fcvtms", 0x0e21b800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2144 SF16_INSN ("fcvtms", 0x0e79b800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2145 SIMD_INSN ("fcvtas", 0x0e21c800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2146 SF16_INSN ("fcvtas", 0x0e79c800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2147 SIMD_INSN ("scvtf", 0x0e21d800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2148 SF16_INSN ("scvtf", 0x0e79d800, 0xbfbffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2149 SIMD_INSN ("fcmgt", 0x0ea0c800, 0xbfbffc00, asimdmisc
, 0, OP3 (Vd
, Vn
, FPIMM0
), QL_V2SAMESD
, F_SIZEQ
),
2150 SF16_INSN ("fcmgt", 0x0ef8c800, 0xbffffc00, asimdmisc
, OP3 (Vd
, Vn
, FPIMM0
), QL_V2SAMEH
, F_SIZEQ
),
2151 SIMD_INSN ("fcmeq", 0x0ea0d800, 0xbfbffc00, asimdmisc
, 0, OP3 (Vd
, Vn
, FPIMM0
), QL_V2SAMESD
, F_SIZEQ
),
2152 SF16_INSN ("fcmeq", 0x0ef8d800, 0xbffffc00, asimdmisc
, OP3 (Vd
, Vn
, FPIMM0
), QL_V2SAMEH
, F_SIZEQ
),
2153 SIMD_INSN ("fcmlt", 0x0ea0e800, 0xbfbffc00, asimdmisc
, 0, OP3 (Vd
, Vn
, FPIMM0
), QL_V2SAMESD
, F_SIZEQ
),
2154 SF16_INSN ("fcmlt", 0x0ef8e800, 0xbffffc00, asimdmisc
, OP3 (Vd
, Vn
, FPIMM0
), QL_V2SAMEH
, F_SIZEQ
),
2155 SIMD_INSN ("fabs", 0x0ea0f800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2156 SF16_INSN ("fabs", 0x0ef8f800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2157 SIMD_INSN ("frintp", 0x0ea18800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2158 SF16_INSN ("frintp", 0x0ef98800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2159 SIMD_INSN ("frintz", 0x0ea19800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2160 SF16_INSN ("frintz", 0x0ef99800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2161 SIMD_INSN ("fcvtps", 0x0ea1a800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2162 SF16_INSN ("fcvtps", 0x0ef9a800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2163 SIMD_INSN ("fcvtzs", 0x0ea1b800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2164 SF16_INSN ("fcvtzs", 0x0ef9b800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2165 SIMD_INSN ("urecpe", 0x0ea1c800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMES
, F_SIZEQ
),
2166 SIMD_INSN ("frecpe", 0x0ea1d800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2167 SF16_INSN ("frecpe", 0x0ef9d800, 0xbfbffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2168 SIMD_INSN ("rev32", 0x2e200800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMEBH
, F_SIZEQ
),
2169 SIMD_INSN ("uaddlp", 0x2e202800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2PAIRWISELONGBHS
, F_SIZEQ
),
2170 SIMD_INSN ("usqadd", 0x2e203800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAME
, F_SIZEQ
),
2171 SIMD_INSN ("clz", 0x2e204800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMEBHS
, F_SIZEQ
),
2172 SIMD_INSN ("uadalp", 0x2e206800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2PAIRWISELONGBHS
, F_SIZEQ
),
2173 SIMD_INSN ("sqneg", 0x2e207800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAME
, F_SIZEQ
),
2174 SIMD_INSN ("cmge", 0x2e208800, 0xbf3ffc00, asimdmisc
, 0, OP3 (Vd
, Vn
, IMM0
), QL_V2SAME
, F_SIZEQ
),
2175 SIMD_INSN ("cmle", 0x2e209800, 0xbf3ffc00, asimdmisc
, 0, OP3 (Vd
, Vn
, IMM0
), QL_V2SAME
, F_SIZEQ
),
2176 SIMD_INSN ("neg", 0x2e20b800, 0xbf3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAME
, F_SIZEQ
),
2177 SIMD_INSN ("sqxtun", 0x2e212800, 0xff3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2NARRBHS
, F_SIZEQ
),
2178 SIMD_INSN ("sqxtun2",0x6e212800, 0xff3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2NARRBHS2
, F_SIZEQ
),
2179 SIMD_INSN ("shll", 0x2e213800, 0xff3ffc00, asimdmisc
, 0, OP3 (Vd
, Vn
, SHLL_IMM
), QL_V2LONGBHS
, F_SIZEQ
),
2180 SIMD_INSN ("shll2", 0x6e213800, 0xff3ffc00, asimdmisc
, 0, OP3 (Vd
, Vn
, SHLL_IMM
), QL_V2LONGBHS2
, F_SIZEQ
),
2181 SIMD_INSN ("uqxtn", 0x2e214800, 0xff3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2NARRBHS
, F_SIZEQ
),
2182 SIMD_INSN ("uqxtn2", 0x6e214800, 0xff3ffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2NARRBHS2
, F_SIZEQ
),
2183 SIMD_INSN ("fcvtxn", 0x2e616800, 0xfffffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2NARRS
, 0),
2184 SIMD_INSN ("fcvtxn2",0x6e616800, 0xfffffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2NARRS2
, 0),
2185 SIMD_INSN ("frinta", 0x2e218800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2186 SF16_INSN ("frinta", 0x2e798800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2187 SIMD_INSN ("frintx", 0x2e219800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2188 SF16_INSN ("frintx", 0x2e799800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2189 SIMD_INSN ("fcvtnu", 0x2e21a800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2190 SF16_INSN ("fcvtnu", 0x2e79a800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2191 SIMD_INSN ("fcvtmu", 0x2e21b800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2192 SF16_INSN ("fcvtmu", 0x2e79b800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2193 SIMD_INSN ("fcvtau", 0x2e21c800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2194 SF16_INSN ("fcvtau", 0x2e79c800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2195 SIMD_INSN ("ucvtf", 0x2e21d800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2196 SF16_INSN ("ucvtf", 0x2e79d800, 0xbfbffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2197 SIMD_INSN ("not", 0x2e205800, 0xbffffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMEB
, F_SIZEQ
| F_HAS_ALIAS
),
2198 SIMD_INSN ("mvn", 0x2e205800, 0xbffffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMEB
, F_SIZEQ
| F_ALIAS
),
2199 SIMD_INSN ("rbit", 0x2e605800, 0xbffffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMEB
, F_SIZEQ
),
2200 SIMD_INSN ("fcmge", 0x2ea0c800, 0xbfbffc00, asimdmisc
, 0, OP3 (Vd
, Vn
, FPIMM0
), QL_V2SAMESD
, F_SIZEQ
),
2201 SF16_INSN ("fcmge", 0x2ef8c800, 0xbffffc00, asimdmisc
, OP3 (Vd
, Vn
, FPIMM0
), QL_V2SAMEH
, F_SIZEQ
),
2202 SIMD_INSN ("fcmle", 0x2ea0d800, 0xbfbffc00, asimdmisc
, 0, OP3 (Vd
, Vn
, FPIMM0
), QL_V2SAMESD
, F_SIZEQ
),
2203 SF16_INSN ("fcmle", 0x2ef8d800, 0xbffffc00, asimdmisc
, OP3 (Vd
, Vn
, FPIMM0
), QL_V2SAMEH
, F_SIZEQ
),
2204 SIMD_INSN ("fneg", 0x2ea0f800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2205 SF16_INSN ("fneg", 0x2ef8f800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2206 SIMD_INSN ("frinti", 0x2ea19800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2207 SF16_INSN ("frinti", 0x2ef99800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2208 SIMD_INSN ("fcvtpu", 0x2ea1a800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2209 SF16_INSN ("fcvtpu", 0x2ef9a800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2210 SIMD_INSN ("fcvtzu", 0x2ea1b800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2211 SF16_INSN ("fcvtzu", 0x2ef9b800, 0xbffffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2212 SIMD_INSN ("ursqrte",0x2ea1c800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMES
, F_SIZEQ
),
2213 SIMD_INSN ("frsqrte",0x2ea1d800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2214 SF16_INSN ("frsqrte",0x2ef9d800, 0xbfbffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2215 SIMD_INSN ("fsqrt", 0x2ea1f800, 0xbfbffc00, asimdmisc
, 0, OP2 (Vd
, Vn
), QL_V2SAMESD
, F_SIZEQ
),
2216 SF16_INSN ("fsqrt", 0x2ef9f800, 0xbfbffc00, asimdmisc
, OP2 (Vd
, Vn
), QL_V2SAMEH
, F_SIZEQ
),
2217 /* AdvSIMD ZIP/UZP/TRN. */
2218 SIMD_INSN ("uzp1", 0xe001800, 0xbf20fc00, asimdperm
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2219 SIMD_INSN ("trn1", 0xe002800, 0xbf20fc00, asimdperm
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2220 SIMD_INSN ("zip1", 0xe003800, 0xbf20fc00, asimdperm
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2221 SIMD_INSN ("uzp2", 0xe005800, 0xbf20fc00, asimdperm
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2222 SIMD_INSN ("trn2", 0xe006800, 0xbf20fc00, asimdperm
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2223 SIMD_INSN ("zip2", 0xe007800, 0xbf20fc00, asimdperm
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2224 /* AdvSIMD three same. */
2225 SIMD_INSN ("shadd", 0xe200400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2226 SIMD_INSN ("sqadd", 0xe200c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2227 SIMD_INSN ("srhadd", 0xe201400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2228 SIMD_INSN ("shsub", 0xe202400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2229 SIMD_INSN ("sqsub", 0xe202c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2230 SIMD_INSN ("cmgt", 0xe203400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2231 SIMD_INSN ("cmge", 0xe203c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2232 SIMD_INSN ("sshl", 0xe204400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2233 SIMD_INSN ("sqshl", 0xe204c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2234 SIMD_INSN ("srshl", 0xe205400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2235 SIMD_INSN ("sqrshl", 0xe205c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2236 SIMD_INSN ("smax", 0xe206400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2237 SIMD_INSN ("smin", 0xe206c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2238 SIMD_INSN ("sabd", 0xe207400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2239 SIMD_INSN ("saba", 0xe207c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2240 SIMD_INSN ("add", 0xe208400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2241 SIMD_INSN ("cmtst", 0xe208c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2242 SIMD_INSN ("mla", 0xe209400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2243 SIMD_INSN ("mul", 0xe209c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2244 SIMD_INSN ("smaxp", 0xe20a400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2245 SIMD_INSN ("sminp", 0xe20ac00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2246 SIMD_INSN ("sqdmulh", 0xe20b400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEHS
, F_SIZEQ
),
2247 SIMD_INSN ("addp", 0xe20bc00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2248 SIMD_INSN ("fmaxnm", 0xe20c400, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2249 SF16_INSN ("fmaxnm", 0xe400400, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2250 SIMD_INSN ("fmla", 0xe20cc00, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2251 SF16_INSN ("fmla", 0xe400c00, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2252 SIMD_INSN ("fadd", 0xe20d400, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2253 SF16_INSN ("fadd", 0xe401400, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2254 SIMD_INSN ("fmulx", 0xe20dc00, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2255 SF16_INSN ("fmulx", 0xe401c00, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2256 SIMD_INSN ("fcmeq", 0xe20e400, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2257 SF16_INSN ("fcmeq", 0xe402400, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2258 SIMD_INSN ("fmax", 0xe20f400, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2259 SF16_INSN ("fmax", 0xe403400, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2260 SIMD_INSN ("frecps", 0xe20fc00, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2261 SF16_INSN ("frecps", 0xe403c00, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2262 SIMD_INSN ("and", 0xe201c00, 0xbfe0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEB
, F_SIZEQ
),
2263 SIMD_INSN ("bic", 0xe601c00, 0xbfe0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEB
, F_SIZEQ
),
2264 SIMD_INSN ("fminnm", 0xea0c400, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2265 SF16_INSN ("fminnm", 0xec00400, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2266 SIMD_INSN ("fmls", 0xea0cc00, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2267 SF16_INSN ("fmls", 0xec00c00, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2268 SIMD_INSN ("fsub", 0xea0d400, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2269 SF16_INSN ("fsub", 0xec01400, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2270 SIMD_INSN ("fmin", 0xea0f400, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2271 SF16_INSN ("fmin", 0xec03400, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2272 SIMD_INSN ("frsqrts", 0xea0fc00, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2273 SF16_INSN ("frsqrts", 0xec03c00, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2274 SIMD_INSN ("orr", 0xea01c00, 0xbfe0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEB
, F_HAS_ALIAS
| F_SIZEQ
),
2275 SIMD_INSN ("mov", 0xea01c00, 0xbfe0fc00, asimdsame
, OP_MOV_V
, OP2 (Vd
, Vn
), QL_V2SAMEB
, F_ALIAS
| F_CONV
),
2276 SIMD_INSN ("orn", 0xee01c00, 0xbfe0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEB
, F_SIZEQ
),
2277 SIMD_INSN ("uhadd", 0x2e200400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2278 SIMD_INSN ("uqadd", 0x2e200c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2279 SIMD_INSN ("urhadd", 0x2e201400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2280 SIMD_INSN ("uhsub", 0x2e202400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2281 SIMD_INSN ("uqsub", 0x2e202c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2282 SIMD_INSN ("cmhi", 0x2e203400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2283 SIMD_INSN ("cmhs", 0x2e203c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2284 SIMD_INSN ("ushl", 0x2e204400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2285 SIMD_INSN ("uqshl", 0x2e204c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2286 SIMD_INSN ("urshl", 0x2e205400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2287 SIMD_INSN ("uqrshl", 0x2e205c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2288 SIMD_INSN ("umax", 0x2e206400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2289 SIMD_INSN ("umin", 0x2e206c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2290 SIMD_INSN ("uabd", 0x2e207400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2291 SIMD_INSN ("uaba", 0x2e207c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2292 SIMD_INSN ("sub", 0x2e208400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2293 SIMD_INSN ("cmeq", 0x2e208c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAME
, F_SIZEQ
),
2294 SIMD_INSN ("mls", 0x2e209400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2295 SIMD_INSN ("pmul", 0x2e209c00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEB
, F_SIZEQ
),
2296 SIMD_INSN ("umaxp", 0x2e20a400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2297 SIMD_INSN ("uminp", 0x2e20ac00, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEBHS
, F_SIZEQ
),
2298 SIMD_INSN ("sqrdmulh", 0x2e20b400, 0xbf20fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEHS
, F_SIZEQ
),
2299 SIMD_INSN ("fmaxnmp", 0x2e20c400, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2300 SF16_INSN ("fmaxnmp", 0x2e400400, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2301 SIMD_INSN ("faddp", 0x2e20d400, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2302 SF16_INSN ("faddp", 0x2e401400, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2303 SIMD_INSN ("fmul", 0x2e20dc00, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2304 SF16_INSN ("fmul", 0x2e401c00, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2305 SIMD_INSN ("fcmge", 0x2e20e400, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2306 SF16_INSN ("fcmge", 0x2e402400, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2307 SIMD_INSN ("facge", 0x2e20ec00, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2308 SF16_INSN ("facge", 0x2e402c00, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2309 SIMD_INSN ("fmaxp", 0x2e20f400, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2310 SF16_INSN ("fmaxp", 0x2e403400, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2311 SIMD_INSN ("fdiv", 0x2e20fc00, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2312 SF16_INSN ("fdiv", 0x2e403c00, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2313 SIMD_INSN ("eor", 0x2e201c00, 0xbfe0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEB
, F_SIZEQ
),
2314 SIMD_INSN ("bsl", 0x2e601c00, 0xbfe0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEB
, F_SIZEQ
),
2315 SIMD_INSN ("fminnmp", 0x2ea0c400, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2316 SF16_INSN ("fminnmp", 0x2ec00400, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2317 SIMD_INSN ("fabd", 0x2ea0d400, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2318 SF16_INSN ("fabd", 0x2ec01400, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2319 SIMD_INSN ("fcmgt", 0x2ea0e400, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2320 SF16_INSN ("fcmgt", 0x2ec02400, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2321 SIMD_INSN ("facgt", 0x2ea0ec00, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2322 SF16_INSN ("facgt", 0x2ec02c00, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2323 SIMD_INSN ("fminp", 0x2ea0f400, 0xbfa0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMESD
, F_SIZEQ
),
2324 SF16_INSN ("fminp", 0x2ec03400, 0xbfe0fc00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEH
, F_SIZEQ
),
2325 SIMD_INSN ("bit", 0x2ea01c00, 0xbfe0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEB
, F_SIZEQ
),
2326 SIMD_INSN ("bif", 0x2ee01c00, 0xbfe0fc00, asimdsame
, 0, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEB
, F_SIZEQ
),
2327 /* AdvSIMD three same extension. */
2328 RDMA_INSN ("sqrdmlah",0x2e008400, 0xbf20fe00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEHS
, F_SIZEQ
),
2329 RDMA_INSN ("sqrdmlsh",0x2e008c00, 0xbf20fe00, asimdsame
, OP3 (Vd
, Vn
, Vm
), QL_V3SAMEHS
, F_SIZEQ
),
2330 /* AdvSIMD shift by immediate. */
2331 SIMD_INSN ("sshr", 0xf000400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT
, 0),
2332 SIMD_INSN ("ssra", 0xf001400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT
, 0),
2333 SIMD_INSN ("srshr", 0xf002400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT
, 0),
2334 SIMD_INSN ("srsra", 0xf003400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT
, 0),
2335 SIMD_INSN ("shl", 0xf005400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSL
), QL_VSHIFT
, 0),
2336 SIMD_INSN ("sqshl", 0xf007400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSL
), QL_VSHIFT
, 0),
2337 SIMD_INSN ("shrn", 0xf008400, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN
, 0),
2338 SIMD_INSN ("shrn2", 0x4f008400, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN2
, 0),
2339 SIMD_INSN ("rshrn", 0xf008c00, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN
, 0),
2340 SIMD_INSN ("rshrn2", 0x4f008c00, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN2
, 0),
2341 SIMD_INSN ("sqshrn", 0xf009400, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN
, 0),
2342 SIMD_INSN ("sqshrn2", 0x4f009400, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN2
, 0),
2343 SIMD_INSN ("sqrshrn", 0xf009c00, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN
, 0),
2344 SIMD_INSN ("sqrshrn2", 0x4f009c00, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN2
, 0),
2345 SIMD_INSN ("sshll", 0xf00a400, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSL
), QL_VSHIFTL
, F_HAS_ALIAS
),
2346 SIMD_INSN ("sxtl", 0xf00a400, 0xff87fc00, asimdshf
, OP_SXTL
, OP2 (Vd
, Vn
), QL_V2LONGBHS
, F_ALIAS
| F_CONV
),
2347 SIMD_INSN ("sshll2", 0x4f00a400, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSL
), QL_VSHIFTL2
, F_HAS_ALIAS
),
2348 SIMD_INSN ("sxtl2", 0x4f00a400, 0xff87fc00, asimdshf
, OP_SXTL2
, OP2 (Vd
, Vn
), QL_V2LONGBHS2
, F_ALIAS
| F_CONV
),
2349 SIMD_INSN ("scvtf", 0xf00e400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT_SD
, 0),
2350 SF16_INSN ("scvtf", 0xf10e400, 0xbf80fc00, asimdshf
, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT_H
, 0),
2351 SIMD_INSN ("fcvtzs", 0xf00fc00, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT_SD
, 0),
2352 SF16_INSN ("fcvtzs", 0xf10fc00, 0xbf80fc00, asimdshf
, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT_H
, 0),
2353 SIMD_INSN ("ushr", 0x2f000400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT
, 0),
2354 SIMD_INSN ("usra", 0x2f001400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT
, 0),
2355 SIMD_INSN ("urshr", 0x2f002400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT
, 0),
2356 SIMD_INSN ("ursra", 0x2f003400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT
, 0),
2357 SIMD_INSN ("sri", 0x2f004400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT
, 0),
2358 SIMD_INSN ("sli", 0x2f005400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSL
), QL_VSHIFT
, 0),
2359 SIMD_INSN ("sqshlu", 0x2f006400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSL
), QL_VSHIFT
, 0),
2360 SIMD_INSN ("uqshl", 0x2f007400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSL
), QL_VSHIFT
, 0),
2361 SIMD_INSN ("sqshrun", 0x2f008400, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN
, 0),
2362 SIMD_INSN ("sqshrun2", 0x6f008400, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN2
, 0),
2363 SIMD_INSN ("sqrshrun", 0x2f008c00, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN
, 0),
2364 SIMD_INSN ("sqrshrun2", 0x6f008c00, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN2
, 0),
2365 SIMD_INSN ("uqshrn", 0x2f009400, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN
, 0),
2366 SIMD_INSN ("uqshrn2", 0x6f009400, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN2
, 0),
2367 SIMD_INSN ("uqrshrn", 0x2f009c00, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN
, 0),
2368 SIMD_INSN ("uqrshrn2", 0x6f009c00, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFTN2
, 0),
2369 SIMD_INSN ("ushll", 0x2f00a400, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSL
), QL_VSHIFTL
, F_HAS_ALIAS
),
2370 SIMD_INSN ("uxtl", 0x2f00a400, 0xff87fc00, asimdshf
, OP_UXTL
, OP2 (Vd
, Vn
), QL_V2LONGBHS
, F_ALIAS
| F_CONV
),
2371 SIMD_INSN ("ushll2", 0x6f00a400, 0xff80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSL
), QL_VSHIFTL2
, F_HAS_ALIAS
),
2372 SIMD_INSN ("uxtl2", 0x6f00a400, 0xff87fc00, asimdshf
, OP_UXTL2
, OP2 (Vd
, Vn
), QL_V2LONGBHS2
, F_ALIAS
| F_CONV
),
2373 SIMD_INSN ("ucvtf", 0x2f00e400, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT_SD
, 0),
2374 SF16_INSN ("ucvtf", 0x2f10e400, 0xbf80fc00, asimdshf
, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT_H
, 0),
2375 SIMD_INSN ("fcvtzu", 0x2f00fc00, 0xbf80fc00, asimdshf
, 0, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT_SD
, 0),
2376 SF16_INSN ("fcvtzu", 0x2f10fc00, 0xbf80fc00, asimdshf
, OP3 (Vd
, Vn
, IMM_VLSR
), QL_VSHIFT_H
, 0),
2377 /* AdvSIMD TBL/TBX. */
2378 SIMD_INSN ("tbl", 0xe000000, 0xbfe09c00, asimdtbl
, 0, OP3 (Vd
, LVn
, Vm
), QL_TABLE
, F_SIZEQ
),
2379 SIMD_INSN ("tbx", 0xe001000, 0xbfe09c00, asimdtbl
, 0, OP3 (Vd
, LVn
, Vm
), QL_TABLE
, F_SIZEQ
),
2380 /* AdvSIMD scalar three different. */
2381 SIMD_INSN ("sqdmlal", 0x5e209000, 0xff20fc00, asisddiff
, 0, OP3 (Sd
, Sn
, Sm
), QL_SISDL_HS
, F_SSIZE
),
2382 SIMD_INSN ("sqdmlsl", 0x5e20b000, 0xff20fc00, asisddiff
, 0, OP3 (Sd
, Sn
, Sm
), QL_SISDL_HS
, F_SSIZE
),
2383 SIMD_INSN ("sqdmull", 0x5e20d000, 0xff20fc00, asisddiff
, 0, OP3 (Sd
, Sn
, Sm
), QL_SISDL_HS
, F_SSIZE
),
2384 /* AdvSIMD scalar x indexed element. */
2385 SIMD_INSN ("sqdmlal", 0x5f003000, 0xff00f400, asisdelem
, 0, OP3 (Sd
, Sn
, Em
), QL_SISDL_HS
, F_SSIZE
),
2386 SIMD_INSN ("sqdmlsl", 0x5f007000, 0xff00f400, asisdelem
, 0, OP3 (Sd
, Sn
, Em
), QL_SISDL_HS
, F_SSIZE
),
2387 SIMD_INSN ("sqdmull", 0x5f00b000, 0xff00f400, asisdelem
, 0, OP3 (Sd
, Sn
, Em
), QL_SISDL_HS
, F_SSIZE
),
2388 SIMD_INSN ("sqdmulh", 0x5f00c000, 0xff00f400, asisdelem
, 0, OP3 (Sd
, Sn
, Em
), QL_SISD_HS
, F_SSIZE
),
2389 SIMD_INSN ("sqrdmulh", 0x5f00d000, 0xff00f400, asisdelem
, 0, OP3 (Sd
, Sn
, Em
), QL_SISD_HS
, F_SSIZE
),
2390 SIMD_INSN ("fmla", 0x5f801000, 0xff80f400, asisdelem
, 0, OP3 (Sd
, Sn
, Em
), QL_FP3
, F_SSIZE
),
2391 SF16_INSN ("fmla", 0x5f001000, 0xffc0f400, asisdelem
, OP3 (Sd
, Sn
, Em
), QL_FP3_H
, F_SSIZE
),
2392 SIMD_INSN ("fmls", 0x5f805000, 0xff80f400, asisdelem
, 0, OP3 (Sd
, Sn
, Em
), QL_FP3
, F_SSIZE
),
2393 SF16_INSN ("fmls", 0x5f005000, 0xffc0f400, asisdelem
, OP3 (Sd
, Sn
, Em
), QL_FP3_H
, F_SSIZE
),
2394 SIMD_INSN ("fmul", 0x5f809000, 0xff80f400, asisdelem
, 0, OP3 (Sd
, Sn
, Em
), QL_FP3
, F_SSIZE
),
2395 SF16_INSN ("fmul", 0x5f009000, 0xffc0f400, asisdelem
, OP3 (Sd
, Sn
, Em
), QL_FP3_H
, F_SSIZE
),
2396 SIMD_INSN ("fmulx", 0x7f809000, 0xff80f400, asisdelem
, 0, OP3 (Sd
, Sn
, Em
), QL_FP3
, F_SSIZE
),
2397 SF16_INSN ("fmulx", 0x7f009000, 0xffc0f400, asisdelem
, OP3 (Sd
, Sn
, Em
), QL_FP3_H
, F_SSIZE
),
2398 RDMA_INSN ("sqrdmlah", 0x7f00d000, 0xff00f400, asisdelem
, OP3 (Sd
, Sn
, Em
), QL_SISD_HS
, F_SSIZE
),
2399 RDMA_INSN ("sqrdmlsh", 0x7f00f000, 0xff00f400, asisdelem
, OP3 (Sd
, Sn
, Em
), QL_SISD_HS
, F_SSIZE
),
2400 /* AdvSIMD load/store multiple structures. */
2401 SIMD_INSN ("st4", 0xc000000, 0xbfff0000, asisdlse
, 0, OP2 (LVt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDST
, F_SIZEQ
| F_OD(4)),
2402 SIMD_INSN ("st1", 0xc000000, 0xbfff0000, asisdlse
, 0, OP2 (LVt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDST_ANY
, F_SIZEQ
| F_OD(1)),
2403 SIMD_INSN ("st2", 0xc000000, 0xbfff0000, asisdlse
, 0, OP2 (LVt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDST
, F_SIZEQ
| F_OD(2)),
2404 SIMD_INSN ("st3", 0xc000000, 0xbfff0000, asisdlse
, 0, OP2 (LVt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDST
, F_SIZEQ
| F_OD(3)),
2405 SIMD_INSN ("ld4", 0xc400000, 0xbfff0000, asisdlse
, 0, OP2 (LVt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDST
, F_SIZEQ
| F_OD(4)),
2406 SIMD_INSN ("ld1", 0xc400000, 0xbfff0000, asisdlse
, 0, OP2 (LVt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDST_ANY
, F_SIZEQ
| F_OD(1)),
2407 SIMD_INSN ("ld2", 0xc400000, 0xbfff0000, asisdlse
, 0, OP2 (LVt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDST
, F_SIZEQ
| F_OD(2)),
2408 SIMD_INSN ("ld3", 0xc400000, 0xbfff0000, asisdlse
, 0, OP2 (LVt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDST
, F_SIZEQ
| F_OD(3)),
2409 /* AdvSIMD load/store multiple structures (post-indexed). */
2410 SIMD_INSN ("st4", 0xc800000, 0xbfe00000, asisdlsep
, 0, OP2 (LVt
, SIMD_ADDR_POST
), QL_SIMD_LDST
, F_SIZEQ
| F_OD(4)),
2411 SIMD_INSN ("st1", 0xc800000, 0xbfe00000, asisdlsep
, 0, OP2 (LVt
, SIMD_ADDR_POST
), QL_SIMD_LDST_ANY
, F_SIZEQ
| F_OD(1)),
2412 SIMD_INSN ("st2", 0xc800000, 0xbfe00000, asisdlsep
, 0, OP2 (LVt
, SIMD_ADDR_POST
), QL_SIMD_LDST
, F_SIZEQ
| F_OD(2)),
2413 SIMD_INSN ("st3", 0xc800000, 0xbfe00000, asisdlsep
, 0, OP2 (LVt
, SIMD_ADDR_POST
), QL_SIMD_LDST
, F_SIZEQ
| F_OD(3)),
2414 SIMD_INSN ("ld4", 0xcc00000, 0xbfe00000, asisdlsep
, 0, OP2 (LVt
, SIMD_ADDR_POST
), QL_SIMD_LDST
, F_SIZEQ
| F_OD(4)),
2415 SIMD_INSN ("ld1", 0xcc00000, 0xbfe00000, asisdlsep
, 0, OP2 (LVt
, SIMD_ADDR_POST
), QL_SIMD_LDST_ANY
, F_SIZEQ
| F_OD(1)),
2416 SIMD_INSN ("ld2", 0xcc00000, 0xbfe00000, asisdlsep
, 0, OP2 (LVt
, SIMD_ADDR_POST
), QL_SIMD_LDST
, F_SIZEQ
| F_OD(2)),
2417 SIMD_INSN ("ld3", 0xcc00000, 0xbfe00000, asisdlsep
, 0, OP2 (LVt
, SIMD_ADDR_POST
), QL_SIMD_LDST
, F_SIZEQ
| F_OD(3)),
2418 /* AdvSIMD load/store single structure. */
2419 SIMD_INSN ("st1", 0xd000000, 0xbfff2000, asisdlso
, 0, OP2 (LEt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDSTONE
, F_OD(1)),
2420 SIMD_INSN ("st3", 0xd002000, 0xbfff2000, asisdlso
, 0, OP2 (LEt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDSTONE
, F_OD(3)),
2421 SIMD_INSN ("st2", 0xd200000, 0xbfff2000, asisdlso
, 0, OP2 (LEt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDSTONE
, F_OD(2)),
2422 SIMD_INSN ("st4", 0xd202000, 0xbfff2000, asisdlso
, 0, OP2 (LEt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDSTONE
, F_OD(4)),
2423 SIMD_INSN ("ld1", 0xd400000, 0xbfff2000, asisdlso
, 0, OP2 (LEt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDSTONE
, F_OD(1)),
2424 SIMD_INSN ("ld3", 0xd402000, 0xbfff2000, asisdlso
, 0, OP2 (LEt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDSTONE
, F_OD(3)),
2425 SIMD_INSN ("ld1r", 0xd40c000, 0xbfffe000, asisdlso
, 0, OP2 (LVt_AL
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDST_ANY
, F_SIZEQ
| F_OD(1)),
2426 SIMD_INSN ("ld3r", 0xd40e000, 0xbfffe000, asisdlso
, 0, OP2 (LVt_AL
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDST_ANY
, F_SIZEQ
| F_OD(3)),
2427 SIMD_INSN ("ld2", 0xd600000, 0xbfff2000, asisdlso
, 0, OP2 (LEt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDSTONE
, F_OD(2)),
2428 SIMD_INSN ("ld4", 0xd602000, 0xbfff2000, asisdlso
, 0, OP2 (LEt
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDSTONE
, F_OD(4)),
2429 SIMD_INSN ("ld2r", 0xd60c000, 0xbfffe000, asisdlso
, 0, OP2 (LVt_AL
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDST_ANY
, F_SIZEQ
| F_OD(2)),
2430 SIMD_INSN ("ld4r", 0xd60e000, 0xbfffe000, asisdlso
, 0, OP2 (LVt_AL
, SIMD_ADDR_SIMPLE
), QL_SIMD_LDST_ANY
, F_SIZEQ
| F_OD(4)),
2431 /* AdvSIMD load/store single structure (post-indexed). */
2432 SIMD_INSN ("st1", 0xd800000, 0xbfe02000, asisdlsop
, 0, OP2 (LEt
, SIMD_ADDR_POST
), QL_SIMD_LDSTONE
, F_OD(1)),
2433 SIMD_INSN ("st3", 0xd802000, 0xbfe02000, asisdlsop
, 0, OP2 (LEt
, SIMD_ADDR_POST
), QL_SIMD_LDSTONE
, F_OD(3)),
2434 SIMD_INSN ("st2", 0xda00000, 0xbfe02000, asisdlsop
, 0, OP2 (LEt
, SIMD_ADDR_POST
), QL_SIMD_LDSTONE
, F_OD(2)),
2435 SIMD_INSN ("st4", 0xda02000, 0xbfe02000, asisdlsop
, 0, OP2 (LEt
, SIMD_ADDR_POST
), QL_SIMD_LDSTONE
, F_OD(4)),
2436 SIMD_INSN ("ld1", 0xdc00000, 0xbfe02000, asisdlsop
, 0, OP2 (LEt
, SIMD_ADDR_POST
), QL_SIMD_LDSTONE
, F_OD(1)),
2437 SIMD_INSN ("ld3", 0xdc02000, 0xbfe02000, asisdlsop
, 0, OP2 (LEt
, SIMD_ADDR_POST
), QL_SIMD_LDSTONE
, F_OD(3)),
2438 SIMD_INSN ("ld1r", 0xdc0c000, 0xbfe0e000, asisdlsop
, 0, OP2 (LVt_AL
, SIMD_ADDR_POST
), QL_SIMD_LDST_ANY
, F_SIZEQ
| F_OD(1)),
2439 SIMD_INSN ("ld3r", 0xdc0e000, 0xbfe0e000, asisdlsop
, 0, OP2 (LVt_AL
, SIMD_ADDR_POST
), QL_SIMD_LDST_ANY
, F_SIZEQ
| F_OD(3)),
2440 SIMD_INSN ("ld2", 0xde00000, 0xbfe02000, asisdlsop
, 0, OP2 (LEt
, SIMD_ADDR_POST
), QL_SIMD_LDSTONE
, F_OD(2)),
2441 SIMD_INSN ("ld4", 0xde02000, 0xbfe02000, asisdlsop
, 0, OP2 (LEt
, SIMD_ADDR_POST
), QL_SIMD_LDSTONE
, F_OD(4)),
2442 SIMD_INSN ("ld2r", 0xde0c000, 0xbfe0e000, asisdlsop
, 0, OP2 (LVt_AL
, SIMD_ADDR_POST
), QL_SIMD_LDST_ANY
, F_SIZEQ
| F_OD(2)),
2443 SIMD_INSN ("ld4r", 0xde0e000, 0xbfe0e000, asisdlsop
, 0, OP2 (LVt_AL
, SIMD_ADDR_POST
), QL_SIMD_LDST_ANY
, F_SIZEQ
| F_OD(4)),
2444 /* AdvSIMD scalar two-reg misc. */
2445 SIMD_INSN ("suqadd", 0x5e203800, 0xff3ffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAME
, F_SSIZE
),
2446 SIMD_INSN ("sqabs", 0x5e207800, 0xff3ffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAME
, F_SSIZE
),
2447 SIMD_INSN ("cmgt", 0x5e208800, 0xff3ffc00, asisdmisc
, 0, OP3 (Sd
, Sn
, IMM0
), QL_SISD_CMP_0
, F_SSIZE
),
2448 SIMD_INSN ("cmeq", 0x5e209800, 0xff3ffc00, asisdmisc
, 0, OP3 (Sd
, Sn
, IMM0
), QL_SISD_CMP_0
, F_SSIZE
),
2449 SIMD_INSN ("cmlt", 0x5e20a800, 0xff3ffc00, asisdmisc
, 0, OP3 (Sd
, Sn
, IMM0
), QL_SISD_CMP_0
, F_SSIZE
),
2450 SIMD_INSN ("abs", 0x5e20b800, 0xff3ffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_2SAMED
, F_SSIZE
),
2451 SIMD_INSN ("sqxtn", 0x5e214800, 0xff3ffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_SISD_NARROW
, F_SSIZE
),
2452 SIMD_INSN ("fcvtns", 0x5e21a800, 0xffbffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAMESD
, F_SSIZE
),
2453 SF16_INSN ("fcvtns", 0x5e79a800, 0xfffffc00, asisdmisc
, OP2 (Sd
, Sn
), QL_S_2SAMEH
, F_SSIZE
),
2454 SIMD_INSN ("fcvtms", 0x5e21b800, 0xffbffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAMESD
, F_SSIZE
),
2455 SF16_INSN ("fcvtms", 0x5e79b800, 0xfffffc00, asisdmisc
, OP2 (Sd
, Sn
), QL_S_2SAMEH
, F_SSIZE
),
2456 SIMD_INSN ("fcvtas", 0x5e21c800, 0xffbffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAMESD
, F_SSIZE
),
2457 SF16_INSN ("fcvtas", 0x5e79c800, 0xfffffc00, asisdmisc
, OP2 (Sd
, Sn
), QL_S_2SAMEH
, F_SSIZE
),
2458 SIMD_INSN ("scvtf", 0x5e21d800, 0xffbffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAMESD
, F_SSIZE
),
2459 SF16_INSN ("scvtf", 0x5e79d800, 0xfffffc00, asisdmisc
, OP2 (Sd
, Sn
), QL_S_2SAMEH
, F_SSIZE
),
2460 SIMD_INSN ("fcmgt", 0x5ea0c800, 0xffbffc00, asisdmisc
, 0, OP3 (Sd
, Sn
, FPIMM0
), QL_SISD_FCMP_0
, F_SSIZE
),
2461 SF16_INSN ("fcmgt", 0x5ef8c800, 0xfffffc00, asisdmisc
, OP3 (Sd
, Sn
, FPIMM0
), QL_SISD_FCMP_H_0
, F_SSIZE
),
2462 SIMD_INSN ("fcmeq", 0x5ea0d800, 0xffbffc00, asisdmisc
, 0, OP3 (Sd
, Sn
, FPIMM0
), QL_SISD_FCMP_0
, F_SSIZE
),
2463 SF16_INSN ("fcmeq", 0x5ef8d800, 0xfffffc00, asisdmisc
, OP3 (Sd
, Sn
, FPIMM0
), QL_SISD_FCMP_H_0
, F_SSIZE
),
2464 SIMD_INSN ("fcmlt", 0x5ea0e800, 0xffbffc00, asisdmisc
, 0, OP3 (Sd
, Sn
, FPIMM0
), QL_SISD_FCMP_0
, F_SSIZE
),
2465 SF16_INSN ("fcmlt", 0x5ef8e800, 0xfffffc00, asisdmisc
, OP3 (Sd
, Sn
, FPIMM0
), QL_SISD_FCMP_H_0
, F_SSIZE
),
2466 SIMD_INSN ("fcvtps", 0x5ea1a800, 0xffbffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAMESD
, F_SSIZE
),
2467 SF16_INSN ("fcvtps", 0x5ef9a800, 0xfffffc00, asisdmisc
, OP2 (Sd
, Sn
), QL_S_2SAMEH
, F_SSIZE
),
2468 SIMD_INSN ("fcvtzs", 0x5ea1b800, 0xffbffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAMESD
, F_SSIZE
),
2469 SF16_INSN ("fcvtzs", 0x5ef9b800, 0xfffffc00, asisdmisc
, OP2 (Sd
, Sn
), QL_S_2SAMEH
, F_SSIZE
),
2470 SIMD_INSN ("frecpe", 0x5ea1d800, 0xffbffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAMESD
, F_SSIZE
),
2471 SF16_INSN ("frecpe", 0x5ef9d800, 0xfffffc00, asisdmisc
, OP2 (Sd
, Sn
), QL_S_2SAMEH
, F_SSIZE
),
2472 SIMD_INSN ("frecpx", 0x5ea1f800, 0xffbffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAMESD
, F_SSIZE
),
2473 SF16_INSN ("frecpx", 0x5ef9f800, 0xfffffc00, asisdmisc
, OP2 (Sd
, Sn
), QL_S_2SAMEH
, F_SSIZE
),
2474 SIMD_INSN ("usqadd", 0x7e203800, 0xff3ffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAME
, F_SSIZE
),
2475 SIMD_INSN ("sqneg", 0x7e207800, 0xff3ffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAME
, F_SSIZE
),
2476 SIMD_INSN ("cmge", 0x7e208800, 0xff3ffc00, asisdmisc
, 0, OP3 (Sd
, Sn
, IMM0
), QL_SISD_CMP_0
, F_SSIZE
),
2477 SIMD_INSN ("cmle", 0x7e209800, 0xff3ffc00, asisdmisc
, 0, OP3 (Sd
, Sn
, IMM0
), QL_SISD_CMP_0
, F_SSIZE
),
2478 SIMD_INSN ("neg", 0x7e20b800, 0xff3ffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_2SAMED
, F_SSIZE
),
2479 SIMD_INSN ("sqxtun", 0x7e212800, 0xff3ffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_SISD_NARROW
, F_SSIZE
),
2480 SIMD_INSN ("uqxtn", 0x7e214800, 0xff3ffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_SISD_NARROW
, F_SSIZE
),
2481 SIMD_INSN ("fcvtxn", 0x7e216800, 0xffbffc00, asisdmisc
, OP_FCVTXN_S
, OP2 (Sd
, Sn
), QL_SISD_NARROW_S
, F_MISC
),
2482 SIMD_INSN ("fcvtnu", 0x7e21a800, 0xffbffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAMESD
, F_SSIZE
),
2483 SF16_INSN ("fcvtnu", 0x7e79a800, 0xfffffc00, asisdmisc
, OP2 (Sd
, Sn
), QL_S_2SAMEH
, F_SSIZE
),
2484 SIMD_INSN ("fcvtmu", 0x7e21b800, 0xffbffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAMESD
, F_SSIZE
),
2485 SF16_INSN ("fcvtmu", 0x7e79b800, 0xfffffc00, asisdmisc
, OP2 (Sd
, Sn
), QL_S_2SAMEH
, F_SSIZE
),
2486 SIMD_INSN ("fcvtau", 0x7e21c800, 0xffbffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAMESD
, F_SSIZE
),
2487 SF16_INSN ("fcvtau", 0x7e79c800, 0xfffffc00, asisdmisc
, OP2 (Sd
, Sn
), QL_S_2SAMEH
, F_SSIZE
),
2488 SIMD_INSN ("ucvtf", 0x7e21d800, 0xffbffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAMESD
, F_SSIZE
),
2489 SF16_INSN ("ucvtf", 0x7e79d800, 0xfffffc00, asisdmisc
, OP2 (Sd
, Sn
), QL_S_2SAMEH
, F_SSIZE
),
2490 SIMD_INSN ("fcmge", 0x7ea0c800, 0xffbffc00, asisdmisc
, 0, OP3 (Sd
, Sn
, FPIMM0
), QL_SISD_FCMP_0
, F_SSIZE
),
2491 SF16_INSN ("fcmge", 0x7ef8c800, 0xfffffc00, asisdmisc
, OP3 (Sd
, Sn
, FPIMM0
), QL_SISD_FCMP_H_0
, F_SSIZE
),
2492 SIMD_INSN ("fcmle", 0x7ea0d800, 0xffbffc00, asisdmisc
, 0, OP3 (Sd
, Sn
, FPIMM0
), QL_SISD_FCMP_0
, F_SSIZE
),
2493 SF16_INSN ("fcmle", 0x7ef8d800, 0xfffffc00, asisdmisc
, OP3 (Sd
, Sn
, FPIMM0
), QL_SISD_FCMP_H_0
, F_SSIZE
),
2494 SIMD_INSN ("fcvtpu", 0x7ea1a800, 0xffbffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAMESD
, F_SSIZE
),
2495 SF16_INSN ("fcvtpu", 0x7ef9a800, 0xfffffc00, asisdmisc
, OP2 (Sd
, Sn
), QL_SISD_FCMP_H_0
, F_SSIZE
),
2496 SIMD_INSN ("fcvtzu", 0x7ea1b800, 0xffbffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAMESD
, F_SSIZE
),
2497 SF16_INSN ("fcvtzu", 0x7ef9b800, 0xfffffc00, asisdmisc
, OP2 (Sd
, Sn
), QL_S_2SAMEH
, F_SSIZE
),
2498 SIMD_INSN ("frsqrte", 0x7ea1d800, 0xffbffc00, asisdmisc
, 0, OP2 (Sd
, Sn
), QL_S_2SAMESD
, F_SSIZE
),
2499 SF16_INSN ("frsqrte", 0x7ef9d800, 0xfffffc00, asisdmisc
, OP2 (Sd
, Sn
), QL_S_2SAMEH
, F_SSIZE
),
2500 /* AdvSIMD scalar copy. */
2501 SIMD_INSN ("dup", 0x5e000400, 0xffe0fc00, asisdone
, 0, OP2 (Sd
, En
), QL_S_2SAME
, F_HAS_ALIAS
),
2502 SIMD_INSN ("mov", 0x5e000400, 0xffe0fc00, asisdone
, 0, OP2 (Sd
, En
), QL_S_2SAME
, F_ALIAS
),
2503 /* AdvSIMD scalar pairwise. */
2504 SIMD_INSN ("addp", 0x5e31b800, 0xff3ffc00, asisdpair
, 0, OP2 (Sd
, Vn
), QL_SISD_PAIR_D
, F_SIZEQ
),
2505 SIMD_INSN ("fmaxnmp", 0x7e30c800, 0xffbffc00, asisdpair
, 0, OP2 (Sd
, Vn
), QL_SISD_PAIR
, F_SIZEQ
),
2506 SF16_INSN ("fmaxnmp", 0x5e30c800, 0xfffffc00, asisdpair
, OP2 (Sd
, Vn
), QL_SISD_PAIR_H
, F_SIZEQ
),
2507 SIMD_INSN ("faddp", 0x7e30d800, 0xffbffc00, asisdpair
, 0, OP2 (Sd
, Vn
), QL_SISD_PAIR
, F_SIZEQ
),
2508 SF16_INSN ("faddp", 0x5e30d800, 0xfffffc00, asisdpair
, OP2 (Sd
, Vn
), QL_SISD_PAIR_H
, F_SIZEQ
),
2509 SIMD_INSN ("fmaxp", 0x7e30f800, 0xffbffc00, asisdpair
, 0, OP2 (Sd
, Vn
), QL_SISD_PAIR
, F_SIZEQ
),
2510 SF16_INSN ("fmaxp", 0x5e30f800, 0xfffffc00, asisdpair
, OP2 (Sd
, Vn
), QL_SISD_PAIR_H
, F_SIZEQ
),
2511 SIMD_INSN ("fminnmp", 0x7eb0c800, 0xffbffc00, asisdpair
, 0, OP2 (Sd
, Vn
), QL_SISD_PAIR
, F_SIZEQ
),
2512 SF16_INSN ("fminnmp", 0x5eb0c800, 0xfffffc00, asisdpair
, OP2 (Sd
, Vn
), QL_SISD_PAIR_H
, F_SIZEQ
),
2513 SIMD_INSN ("fminp", 0x7eb0f800, 0xffbffc00, asisdpair
, 0, OP2 (Sd
, Vn
), QL_SISD_PAIR
, F_SIZEQ
),
2514 SF16_INSN ("fminp", 0x5eb0f800, 0xfffffc00, asisdpair
, OP2 (Sd
, Vn
), QL_SISD_PAIR_H
, F_SIZEQ
),
2515 /* AdvSIMD scalar three same. */
2516 SIMD_INSN ("sqadd", 0x5e200c00, 0xff20fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAME
, F_SSIZE
),
2517 SIMD_INSN ("sqsub", 0x5e202c00, 0xff20fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAME
, F_SSIZE
),
2518 SIMD_INSN ("sqshl", 0x5e204c00, 0xff20fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAME
, F_SSIZE
),
2519 SIMD_INSN ("sqrshl", 0x5e205c00, 0xff20fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAME
, F_SSIZE
),
2520 SIMD_INSN ("sqdmulh", 0x5e20b400, 0xff20fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_SISD_HS
, F_SSIZE
),
2521 SIMD_INSN ("fmulx", 0x5e20dc00, 0xffa0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_FP3
, F_SSIZE
),
2522 SF16_INSN ("fmulx", 0x5e401c00, 0xffe0fc00, asisdsame
, OP3 (Sd
, Sn
, Sm
), QL_FP3_H
, F_SSIZE
),
2523 SIMD_INSN ("fcmeq", 0x5e20e400, 0xffa0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_FP3
, F_SSIZE
),
2524 SF16_INSN ("fcmeq", 0x5e402400, 0xffe0fc00, asisdsame
, OP3 (Sd
, Sn
, Sm
), QL_FP3_H
, F_SSIZE
),
2525 SIMD_INSN ("frecps", 0x5e20fc00, 0xffa0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_FP3
, F_SSIZE
),
2526 SF16_INSN ("frecps", 0x5e403c00, 0xffe0fc00, asisdsame
, OP3 (Sd
, Sn
, Sm
), QL_FP3_H
, F_SSIZE
),
2527 SIMD_INSN ("frsqrts", 0x5ea0fc00, 0xffa0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_FP3
, F_SSIZE
),
2528 SF16_INSN ("frsqrts", 0x5ec03c00, 0xffe0fc00, asisdsame
, OP3 (Sd
, Sn
, Sm
), QL_FP3_H
, F_SSIZE
),
2529 SIMD_INSN ("cmgt", 0x5ee03400, 0xffe0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAMED
, F_SSIZE
),
2530 SIMD_INSN ("cmge", 0x5ee03c00, 0xffe0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAMED
, F_SSIZE
),
2531 SIMD_INSN ("sshl", 0x5ee04400, 0xffe0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAMED
, F_SSIZE
),
2532 SIMD_INSN ("srshl", 0x5ee05400, 0xffe0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAMED
, F_SSIZE
),
2533 SIMD_INSN ("add", 0x5ee08400, 0xffe0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAMED
, F_SSIZE
),
2534 SIMD_INSN ("cmtst", 0x5ee08c00, 0xffe0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAMED
, F_SSIZE
),
2535 SIMD_INSN ("uqadd", 0x7e200c00, 0xff20fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAME
, F_SSIZE
),
2536 SIMD_INSN ("uqsub", 0x7e202c00, 0xff20fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAME
, F_SSIZE
),
2537 SIMD_INSN ("uqshl", 0x7e204c00, 0xff20fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAME
, F_SSIZE
),
2538 SIMD_INSN ("uqrshl", 0x7e205c00, 0xff20fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAME
, F_SSIZE
),
2539 SIMD_INSN ("sqrdmulh", 0x7e20b400, 0xff20fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_SISD_HS
, F_SSIZE
),
2540 SIMD_INSN ("fcmge", 0x7e20e400, 0xffa0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_FP3
, F_SSIZE
),
2541 SF16_INSN ("fcmge", 0x7e402400, 0xffe0fc00, asisdsame
, OP3 (Sd
, Sn
, Sm
), QL_FP3_H
, F_SSIZE
),
2542 SIMD_INSN ("facge", 0x7e20ec00, 0xffa0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_FP3
, F_SSIZE
),
2543 SF16_INSN ("facge", 0x7e402c00, 0xffe0fc00, asisdsame
, OP3 (Sd
, Sn
, Sm
), QL_FP3_H
, F_SSIZE
),
2544 SIMD_INSN ("fabd", 0x7ea0d400, 0xffa0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_FP3
, F_SSIZE
),
2545 SF16_INSN ("fabd", 0x7ec01400, 0xffe0fc00, asisdsame
, OP3 (Sd
, Sn
, Sm
), QL_FP3_H
, F_SSIZE
),
2546 SIMD_INSN ("fcmgt", 0x7ea0e400, 0xffa0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_FP3
, F_SSIZE
),
2547 SF16_INSN ("fcmgt", 0x7ec02400, 0xffe0fc00, asisdsame
, OP3 (Sd
, Sn
, Sm
), QL_FP3_H
, F_SSIZE
),
2548 SIMD_INSN ("facgt", 0x7ea0ec00, 0xffa0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_FP3
, F_SSIZE
),
2549 SF16_INSN ("facgt", 0x7ec02c00, 0xffe0fc00, asisdsame
, OP3 (Sd
, Sn
, Sm
), QL_FP3_H
, F_SSIZE
),
2550 SIMD_INSN ("cmhi", 0x7ee03400, 0xffe0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAMED
, F_SSIZE
),
2551 SIMD_INSN ("cmhs", 0x7ee03c00, 0xffe0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAMED
, F_SSIZE
),
2552 SIMD_INSN ("ushl", 0x7ee04400, 0xffe0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAMED
, F_SSIZE
),
2553 SIMD_INSN ("urshl", 0x7ee05400, 0xffe0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAMED
, F_SSIZE
),
2554 SIMD_INSN ("sub", 0x7ee08400, 0xffe0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAMED
, F_SSIZE
),
2555 SIMD_INSN ("cmeq", 0x7ee08c00, 0xffe0fc00, asisdsame
, 0, OP3 (Sd
, Sn
, Sm
), QL_S_3SAMED
, F_SSIZE
),
2556 /* AdvSIMDs scalar three same extension. */
2557 RDMA_INSN ("sqrdmlah", 0x7e008400, 0xff20fc00, asimdsame
, OP3 (Sd
, Sn
, Sm
), QL_SISD_HS
, F_SSIZE
),
2558 RDMA_INSN ("sqrdmlsh", 0x7e008c00, 0xff20fc00, asimdsame
, OP3 (Sd
, Sn
, Sm
), QL_SISD_HS
, F_SSIZE
),
2559 /* AdvSIMD scalar shift by immediate. */
2560 SIMD_INSN ("sshr", 0x5f000400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_D
, 0),
2561 SIMD_INSN ("ssra", 0x5f001400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_D
, 0),
2562 SIMD_INSN ("srshr", 0x5f002400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_D
, 0),
2563 SIMD_INSN ("srsra", 0x5f003400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_D
, 0),
2564 SIMD_INSN ("shl", 0x5f005400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSL
), QL_SSHIFT_D
, 0),
2565 SIMD_INSN ("sqshl", 0x5f007400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSL
), QL_SSHIFT
, 0),
2566 SIMD_INSN ("sqshrn", 0x5f009400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFTN
, 0),
2567 SIMD_INSN ("sqrshrn", 0x5f009c00, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFTN
, 0),
2568 SIMD_INSN ("scvtf", 0x5f00e400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_SD
, 0),
2569 SF16_INSN ("scvtf", 0x5f10e400, 0xff80fc00, asisdshf
, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_H
, 0),
2570 SIMD_INSN ("fcvtzs", 0x5f00fc00, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_SD
, 0),
2571 SF16_INSN ("fcvtzs", 0x5f10fc00, 0xff80fc00, asisdshf
, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_H
, 0),
2572 SIMD_INSN ("ushr", 0x7f000400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_D
, 0),
2573 SIMD_INSN ("usra", 0x7f001400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_D
, 0),
2574 SIMD_INSN ("urshr", 0x7f002400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_D
, 0),
2575 SIMD_INSN ("ursra", 0x7f003400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_D
, 0),
2576 SIMD_INSN ("sri", 0x7f004400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_D
, 0),
2577 SIMD_INSN ("sli", 0x7f005400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSL
), QL_SSHIFT_D
, 0),
2578 SIMD_INSN ("sqshlu", 0x7f006400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSL
), QL_SSHIFT
, 0),
2579 SIMD_INSN ("uqshl", 0x7f007400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSL
), QL_SSHIFT
, 0),
2580 SIMD_INSN ("sqshrun", 0x7f008400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFTN
, 0),
2581 SIMD_INSN ("sqrshrun", 0x7f008c00, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFTN
, 0),
2582 SIMD_INSN ("uqshrn", 0x7f009400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFTN
, 0),
2583 SIMD_INSN ("uqrshrn", 0x7f009c00, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFTN
, 0),
2584 SIMD_INSN ("ucvtf", 0x7f00e400, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_SD
, 0),
2585 SF16_INSN ("ucvtf", 0x7f10e400, 0xff80fc00, asisdshf
, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_H
, 0),
2586 SIMD_INSN ("fcvtzu", 0x7f00fc00, 0xff80fc00, asisdshf
, 0, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_SD
, 0),
2587 SF16_INSN ("fcvtzu", 0x7f10fc00, 0xff80fc00, asisdshf
, OP3 (Sd
, Sn
, IMM_VLSR
), QL_SSHIFT_H
, 0),
2589 CORE_INSN ("sbfm", 0x13000000, 0x7f800000, bitfield
, 0, OP4 (Rd
, Rn
, IMMR
, IMMS
), QL_BF
, F_HAS_ALIAS
| F_SF
| F_N
),
2590 CORE_INSN ("sbfiz", 0x13000000, 0x7f800000, bitfield
, OP_SBFIZ
, OP4 (Rd
, Rn
, IMM
, WIDTH
), QL_BF2
, F_ALIAS
| F_P1
| F_CONV
),
2591 CORE_INSN ("sbfx", 0x13000000, 0x7f800000, bitfield
, OP_SBFX
, OP4 (Rd
, Rn
, IMM
, WIDTH
), QL_BF2
, F_ALIAS
| F_P1
| F_CONV
),
2592 CORE_INSN ("sxtb", 0x13001c00, 0x7fbffc00, bitfield
, 0, OP2 (Rd
, Rn
), QL_EXT
, F_ALIAS
| F_P3
| F_SF
| F_N
),
2593 CORE_INSN ("sxth", 0x13003c00, 0x7fbffc00, bitfield
, 0, OP2 (Rd
, Rn
), QL_EXT
, F_ALIAS
| F_P3
| F_SF
| F_N
),
2594 CORE_INSN ("sxtw", 0x93407c00, 0xfffffc00, bitfield
, 0, OP2 (Rd
, Rn
), QL_EXT_W
, F_ALIAS
| F_P3
),
2595 CORE_INSN ("asr", 0x13000000, 0x7f800000, bitfield
, OP_ASR_IMM
, OP3 (Rd
, Rn
, IMM
), QL_SHIFT
, F_ALIAS
| F_P2
| F_CONV
),
2596 CORE_INSN ("bfm", 0x33000000, 0x7f800000, bitfield
, 0, OP4 (Rd
, Rn
, IMMR
, IMMS
), QL_BF
, F_HAS_ALIAS
| F_SF
| F_N
),
2597 CORE_INSN ("bfi", 0x33000000, 0x7f800000, bitfield
, OP_BFI
, OP4 (Rd
, Rn
, IMM
, WIDTH
), QL_BF2
, F_ALIAS
| F_P1
| F_CONV
),
2598 V8_2_INSN ("bfc", 0x330003e0, 0x7f8003e0, bitfield
, OP_BFC
, OP3 (Rd
, IMM
, WIDTH
), QL_BF1
, F_ALIAS
| F_P2
| F_CONV
),
2599 CORE_INSN ("bfxil", 0x33000000, 0x7f800000, bitfield
, OP_BFXIL
, OP4 (Rd
, Rn
, IMM
, WIDTH
), QL_BF2
, F_ALIAS
| F_P1
| F_CONV
),
2600 CORE_INSN ("ubfm", 0x53000000, 0x7f800000, bitfield
, 0, OP4 (Rd
, Rn
, IMMR
, IMMS
), QL_BF
, F_HAS_ALIAS
| F_SF
| F_N
),
2601 CORE_INSN ("ubfiz", 0x53000000, 0x7f800000, bitfield
, OP_UBFIZ
, OP4 (Rd
, Rn
, IMM
, WIDTH
), QL_BF2
, F_ALIAS
| F_P1
| F_CONV
),
2602 CORE_INSN ("ubfx", 0x53000000, 0x7f800000, bitfield
, OP_UBFX
, OP4 (Rd
, Rn
, IMM
, WIDTH
), QL_BF2
, F_ALIAS
| F_P1
| F_CONV
),
2603 CORE_INSN ("uxtb", 0x53001c00, 0xfffffc00, bitfield
, OP_UXTB
, OP2 (Rd
, Rn
), QL_I2SAMEW
, F_ALIAS
| F_P3
),
2604 CORE_INSN ("uxth", 0x53003c00, 0xfffffc00, bitfield
, OP_UXTH
, OP2 (Rd
, Rn
), QL_I2SAMEW
, F_ALIAS
| F_P3
),
2605 CORE_INSN ("lsl", 0x53000000, 0x7f800000, bitfield
, OP_LSL_IMM
, OP3 (Rd
, Rn
, IMM
), QL_SHIFT
, F_ALIAS
| F_P2
| F_CONV
),
2606 CORE_INSN ("lsr", 0x53000000, 0x7f800000, bitfield
, OP_LSR_IMM
, OP3 (Rd
, Rn
, IMM
), QL_SHIFT
, F_ALIAS
| F_P2
| F_CONV
),
2607 /* Unconditional branch (immediate). */
2608 CORE_INSN ("b", 0x14000000, 0xfc000000, branch_imm
, OP_B
, OP1 (ADDR_PCREL26
), QL_PCREL_26
, 0),
2609 CORE_INSN ("bl", 0x94000000, 0xfc000000, branch_imm
, OP_BL
, OP1 (ADDR_PCREL26
), QL_PCREL_26
, 0),
2610 /* Unconditional branch (register). */
2611 CORE_INSN ("br", 0xd61f0000, 0xfffffc1f, branch_reg
, 0, OP1 (Rn
), QL_I1X
, 0),
2612 CORE_INSN ("blr", 0xd63f0000, 0xfffffc1f, branch_reg
, 0, OP1 (Rn
), QL_I1X
, 0),
2613 CORE_INSN ("ret", 0xd65f0000, 0xfffffc1f, branch_reg
, 0, OP1 (Rn
), QL_I1X
, F_OPD0_OPT
| F_DEFAULT (30)),
2614 CORE_INSN ("eret", 0xd69f03e0, 0xffffffff, branch_reg
, 0, OP0 (), {}, 0),
2615 CORE_INSN ("drps", 0xd6bf03e0, 0xffffffff, branch_reg
, 0, OP0 (), {}, 0),
2616 /* Compare & branch (immediate). */
2617 CORE_INSN ("cbz", 0x34000000, 0x7f000000, compbranch
, 0, OP2 (Rt
, ADDR_PCREL19
), QL_R_PCREL
, F_SF
),
2618 CORE_INSN ("cbnz", 0x35000000, 0x7f000000, compbranch
, 0, OP2 (Rt
, ADDR_PCREL19
), QL_R_PCREL
, F_SF
),
2619 /* Conditional branch (immediate). */
2620 CORE_INSN ("b.c", 0x54000000, 0xff000010, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_COND
),
2621 /* Conditional compare (immediate). */
2622 CORE_INSN ("ccmn", 0x3a400800, 0x7fe00c10, condcmp_imm
, 0, OP4 (Rn
, CCMP_IMM
, NZCV
, COND
), QL_CCMP_IMM
, F_SF
),
2623 CORE_INSN ("ccmp", 0x7a400800, 0x7fe00c10, condcmp_imm
, 0, OP4 (Rn
, CCMP_IMM
, NZCV
, COND
), QL_CCMP_IMM
, F_SF
),
2624 /* Conditional compare (register). */
2625 CORE_INSN ("ccmn", 0x3a400000, 0x7fe00c10, condcmp_reg
, 0, OP4 (Rn
, Rm
, NZCV
, COND
), QL_CCMP
, F_SF
),
2626 CORE_INSN ("ccmp", 0x7a400000, 0x7fe00c10, condcmp_reg
, 0, OP4 (Rn
, Rm
, NZCV
, COND
), QL_CCMP
, F_SF
),
2627 /* Conditional select. */
2628 CORE_INSN ("csel", 0x1a800000, 0x7fe00c00, condsel
, 0, OP4 (Rd
, Rn
, Rm
, COND
), QL_CSEL
, F_SF
),
2629 CORE_INSN ("csinc", 0x1a800400, 0x7fe00c00, condsel
, 0, OP4 (Rd
, Rn
, Rm
, COND
), QL_CSEL
, F_HAS_ALIAS
| F_SF
),
2630 CORE_INSN ("cinc", 0x1a800400, 0x7fe00c00, condsel
, OP_CINC
, OP3 (Rd
, Rn
, COND1
), QL_CSEL
, F_ALIAS
| F_SF
| F_CONV
),
2631 CORE_INSN ("cset", 0x1a9f07e0, 0x7fff0fe0, condsel
, OP_CSET
, OP2 (Rd
, COND1
), QL_DST_R
, F_ALIAS
| F_P1
| F_SF
| F_CONV
),
2632 CORE_INSN ("csinv", 0x5a800000, 0x7fe00c00, condsel
, 0, OP4 (Rd
, Rn
, Rm
, COND
), QL_CSEL
, F_HAS_ALIAS
| F_SF
),
2633 CORE_INSN ("cinv", 0x5a800000, 0x7fe00c00, condsel
, OP_CINV
, OP3 (Rd
, Rn
, COND1
), QL_CSEL
, F_ALIAS
| F_SF
| F_CONV
),
2634 CORE_INSN ("csetm", 0x5a9f03e0, 0x7fff0fe0, condsel
, OP_CSETM
, OP2 (Rd
, COND1
), QL_DST_R
, F_ALIAS
| F_P1
| F_SF
| F_CONV
),
2635 CORE_INSN ("csneg", 0x5a800400, 0x7fe00c00, condsel
, 0, OP4 (Rd
, Rn
, Rm
, COND
), QL_CSEL
, F_HAS_ALIAS
| F_SF
),
2636 CORE_INSN ("cneg", 0x5a800400, 0x7fe00c00, condsel
, OP_CNEG
, OP3 (Rd
, Rn
, COND1
), QL_CSEL
, F_ALIAS
| F_SF
| F_CONV
),
2638 CRYP_INSN ("aese", 0x4e284800, 0xfffffc00, cryptoaes
, OP2 (Vd
, Vn
), QL_V2SAME16B
, 0),
2639 CRYP_INSN ("aesd", 0x4e285800, 0xfffffc00, cryptoaes
, OP2 (Vd
, Vn
), QL_V2SAME16B
, 0),
2640 CRYP_INSN ("aesmc", 0x4e286800, 0xfffffc00, cryptoaes
, OP2 (Vd
, Vn
), QL_V2SAME16B
, 0),
2641 CRYP_INSN ("aesimc", 0x4e287800, 0xfffffc00, cryptoaes
, OP2 (Vd
, Vn
), QL_V2SAME16B
, 0),
2642 /* Crypto two-reg SHA. */
2643 CRYP_INSN ("sha1h", 0x5e280800, 0xfffffc00, cryptosha2
, OP2 (Fd
, Fn
), QL_2SAMES
, 0),
2644 CRYP_INSN ("sha1su1", 0x5e281800, 0xfffffc00, cryptosha2
, OP2 (Vd
, Vn
), QL_V2SAME4S
, 0),
2645 CRYP_INSN ("sha256su0",0x5e282800, 0xfffffc00, cryptosha2
, OP2 (Vd
, Vn
), QL_V2SAME4S
, 0),
2646 /* Crypto three-reg SHA. */
2647 CRYP_INSN ("sha1c", 0x5e000000, 0xffe0fc00, cryptosha3
, OP3 (Fd
, Fn
, Vm
), QL_SHAUPT
, 0),
2648 CRYP_INSN ("sha1p", 0x5e001000, 0xffe0fc00, cryptosha3
, OP3 (Fd
, Fn
, Vm
), QL_SHAUPT
, 0),
2649 CRYP_INSN ("sha1m", 0x5e002000, 0xffe0fc00, cryptosha3
, OP3 (Fd
, Fn
, Vm
), QL_SHAUPT
, 0),
2650 CRYP_INSN ("sha1su0", 0x5e003000, 0xffe0fc00, cryptosha3
, OP3 (Vd
, Vn
, Vm
), QL_V3SAME4S
, 0),
2651 CRYP_INSN ("sha256h", 0x5e004000, 0xffe0fc00, cryptosha3
, OP3 (Fd
, Fn
, Vm
), QL_SHA256UPT
, 0),
2652 CRYP_INSN ("sha256h2", 0x5e005000, 0xffe0fc00, cryptosha3
, OP3 (Fd
, Fn
, Vm
), QL_SHA256UPT
, 0),
2653 CRYP_INSN ("sha256su1",0x5e006000, 0xffe0fc00, cryptosha3
, OP3 (Vd
, Vn
, Vm
), QL_V3SAME4S
, 0),
2654 /* Data-processing (1 source). */
2655 CORE_INSN ("rbit", 0x5ac00000, 0x7ffffc00, dp_1src
, 0, OP2 (Rd
, Rn
), QL_I2SAME
, F_SF
),
2656 CORE_INSN ("rev16", 0x5ac00400, 0x7ffffc00, dp_1src
, 0, OP2 (Rd
, Rn
), QL_I2SAME
, F_SF
),
2657 CORE_INSN ("rev", 0x5ac00800, 0xfffffc00, dp_1src
, 0, OP2 (Rd
, Rn
), QL_I2SAMEW
, 0),
2658 CORE_INSN ("rev", 0xdac00c00, 0xfffffc00, dp_1src
, 0, OP2 (Rd
, Rn
), QL_I2SAMEX
, F_SF
| F_HAS_ALIAS
| F_P1
),
2659 V8_2_INSN ("rev64", 0xdac00c00, 0xfffffc00, dp_1src
, 0, OP2 (Rd
, Rn
), QL_I2SAMEX
, F_SF
| F_ALIAS
),
2660 CORE_INSN ("clz", 0x5ac01000, 0x7ffffc00, dp_1src
, 0, OP2 (Rd
, Rn
), QL_I2SAME
, F_SF
),
2661 CORE_INSN ("cls", 0x5ac01400, 0x7ffffc00, dp_1src
, 0, OP2 (Rd
, Rn
), QL_I2SAME
, F_SF
),
2662 CORE_INSN ("rev32", 0xdac00800, 0xfffffc00, dp_1src
, 0, OP2 (Rd
, Rn
), QL_I2SAMEX
, 0),
2663 /* Data-processing (2 source). */
2664 CORE_INSN ("udiv", 0x1ac00800, 0x7fe0fc00, dp_2src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_SF
),
2665 CORE_INSN ("sdiv", 0x1ac00c00, 0x7fe0fc00, dp_2src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_SF
),
2666 CORE_INSN ("lslv", 0x1ac02000, 0x7fe0fc00, dp_2src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_SF
| F_HAS_ALIAS
),
2667 CORE_INSN ("lsl", 0x1ac02000, 0x7fe0fc00, dp_2src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_SF
| F_ALIAS
),
2668 CORE_INSN ("lsrv", 0x1ac02400, 0x7fe0fc00, dp_2src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_SF
| F_HAS_ALIAS
),
2669 CORE_INSN ("lsr", 0x1ac02400, 0x7fe0fc00, dp_2src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_SF
| F_ALIAS
),
2670 CORE_INSN ("asrv", 0x1ac02800, 0x7fe0fc00, dp_2src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_SF
| F_HAS_ALIAS
),
2671 CORE_INSN ("asr", 0x1ac02800, 0x7fe0fc00, dp_2src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_SF
| F_ALIAS
),
2672 CORE_INSN ("rorv", 0x1ac02c00, 0x7fe0fc00, dp_2src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_SF
| F_HAS_ALIAS
),
2673 CORE_INSN ("ror", 0x1ac02c00, 0x7fe0fc00, dp_2src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_SF
| F_ALIAS
),
2674 /* CRC instructions. */
2675 _CRC_INSN ("crc32b", 0x1ac04000, 0xffe0fc00, dp_2src
, OP3 (Rd
, Rn
, Rm
), QL_I3SAMEW
, 0),
2676 _CRC_INSN ("crc32h", 0x1ac04400, 0xffe0fc00, dp_2src
, OP3 (Rd
, Rn
, Rm
), QL_I3SAMEW
, 0),
2677 _CRC_INSN ("crc32w", 0x1ac04800, 0xffe0fc00, dp_2src
, OP3 (Rd
, Rn
, Rm
), QL_I3SAMEW
, 0),
2678 _CRC_INSN ("crc32x", 0x9ac04c00, 0xffe0fc00, dp_2src
, OP3 (Rd
, Rn
, Rm
), QL_I3WWX
, 0),
2679 _CRC_INSN ("crc32cb",0x1ac05000, 0xffe0fc00, dp_2src
, OP3 (Rd
, Rn
, Rm
), QL_I3SAMEW
, 0),
2680 _CRC_INSN ("crc32ch",0x1ac05400, 0xffe0fc00, dp_2src
, OP3 (Rd
, Rn
, Rm
), QL_I3SAMEW
, 0),
2681 _CRC_INSN ("crc32cw",0x1ac05800, 0xffe0fc00, dp_2src
, OP3 (Rd
, Rn
, Rm
), QL_I3SAMEW
, 0),
2682 _CRC_INSN ("crc32cx",0x9ac05c00, 0xffe0fc00, dp_2src
, OP3 (Rd
, Rn
, Rm
), QL_I3WWX
, 0),
2683 /* Data-processing (3 source). */
2684 CORE_INSN ("madd", 0x1b000000, 0x7fe08000, dp_3src
, 0, OP4 (Rd
, Rn
, Rm
, Ra
), QL_I4SAMER
, F_HAS_ALIAS
| F_SF
),
2685 CORE_INSN ("mul", 0x1b007c00, 0x7fe0fc00, dp_3src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_ALIAS
| F_SF
),
2686 CORE_INSN ("msub", 0x1b008000, 0x7fe08000, dp_3src
, 0, OP4 (Rd
, Rn
, Rm
, Ra
), QL_I4SAMER
, F_HAS_ALIAS
| F_SF
),
2687 CORE_INSN ("mneg", 0x1b00fc00, 0x7fe0fc00, dp_3src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMER
, F_ALIAS
| F_SF
),
2688 CORE_INSN ("smaddl",0x9b200000, 0xffe08000, dp_3src
, 0, OP4 (Rd
, Rn
, Rm
, Ra
), QL_I4SAMEL
, F_HAS_ALIAS
),
2689 CORE_INSN ("smull", 0x9b207c00, 0xffe0fc00, dp_3src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMEL
, F_ALIAS
),
2690 CORE_INSN ("smsubl",0x9b208000, 0xffe08000, dp_3src
, 0, OP4 (Rd
, Rn
, Rm
, Ra
), QL_I4SAMEL
, F_HAS_ALIAS
),
2691 CORE_INSN ("smnegl",0x9b20fc00, 0xffe0fc00, dp_3src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMEL
, F_ALIAS
),
2692 CORE_INSN ("smulh", 0x9b407c00, 0xffe08000, dp_3src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMEX
, 0),
2693 CORE_INSN ("umaddl",0x9ba00000, 0xffe08000, dp_3src
, 0, OP4 (Rd
, Rn
, Rm
, Ra
), QL_I4SAMEL
, F_HAS_ALIAS
),
2694 CORE_INSN ("umull", 0x9ba07c00, 0xffe0fc00, dp_3src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMEL
, F_ALIAS
),
2695 CORE_INSN ("umsubl",0x9ba08000, 0xffe08000, dp_3src
, 0, OP4 (Rd
, Rn
, Rm
, Ra
), QL_I4SAMEL
, F_HAS_ALIAS
),
2696 CORE_INSN ("umnegl",0x9ba0fc00, 0xffe0fc00, dp_3src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMEL
, F_ALIAS
),
2697 CORE_INSN ("umulh", 0x9bc07c00, 0xffe08000, dp_3src
, 0, OP3 (Rd
, Rn
, Rm
), QL_I3SAMEX
, 0),
2698 /* Excep'n generation. */
2699 CORE_INSN ("svc", 0xd4000001, 0xffe0001f, exception
, 0, OP1 (EXCEPTION
), {}, 0),
2700 CORE_INSN ("hvc", 0xd4000002, 0xffe0001f, exception
, 0, OP1 (EXCEPTION
), {}, 0),
2701 CORE_INSN ("smc", 0xd4000003, 0xffe0001f, exception
, 0, OP1 (EXCEPTION
), {}, 0),
2702 CORE_INSN ("brk", 0xd4200000, 0xffe0001f, exception
, 0, OP1 (EXCEPTION
), {}, 0),
2703 CORE_INSN ("hlt", 0xd4400000, 0xffe0001f, exception
, 0, OP1 (EXCEPTION
), {}, 0),
2704 CORE_INSN ("dcps1", 0xd4a00001, 0xffe0001f, exception
, 0, OP1 (EXCEPTION
), {}, F_OPD0_OPT
| F_DEFAULT (0)),
2705 CORE_INSN ("dcps2", 0xd4a00002, 0xffe0001f, exception
, 0, OP1 (EXCEPTION
), {}, F_OPD0_OPT
| F_DEFAULT (0)),
2706 CORE_INSN ("dcps3", 0xd4a00003, 0xffe0001f, exception
, 0, OP1 (EXCEPTION
), {}, F_OPD0_OPT
| F_DEFAULT (0)),
2708 CORE_INSN ("extr", 0x13800000, 0x7fa00000, extract
, 0, OP4 (Rd
, Rn
, Rm
, IMMS
), QL_EXTR
, F_HAS_ALIAS
| F_SF
| F_N
),
2709 CORE_INSN ("ror", 0x13800000, 0x7fa00000, extract
, OP_ROR_IMM
, OP3 (Rd
, Rm
, IMMS
), QL_SHIFT
, F_ALIAS
| F_CONV
),
2710 /* Floating-point<->fixed-point conversions. */
2711 __FP_INSN ("scvtf", 0x1e020000, 0x7f3f0000, float2fix
, 0, OP3 (Fd
, Rn
, FBITS
), QL_FIX2FP
, F_FPTYPE
| F_SF
),
2712 FF16_INSN ("scvtf", 0x1ec20000, 0x7f3f0000, float2fix
, OP3 (Fd
, Rn
, FBITS
), QL_FIX2FP_H
, F_FPTYPE
| F_SF
),
2713 __FP_INSN ("ucvtf", 0x1e030000, 0x7f3f0000, float2fix
, 0, OP3 (Fd
, Rn
, FBITS
), QL_FIX2FP
, F_FPTYPE
| F_SF
),
2714 FF16_INSN ("ucvtf", 0x1ec30000, 0x7f3f0000, float2fix
, OP3 (Fd
, Rn
, FBITS
), QL_FIX2FP_H
, F_FPTYPE
| F_SF
),
2715 __FP_INSN ("fcvtzs",0x1e180000, 0x7f3f0000, float2fix
, 0, OP3 (Rd
, Fn
, FBITS
), QL_FP2FIX
, F_FPTYPE
| F_SF
),
2716 FF16_INSN ("fcvtzs",0x1ed80000, 0x7f3f0000, float2fix
, OP3 (Rd
, Fn
, FBITS
), QL_FP2FIX_H
, F_FPTYPE
| F_SF
),
2717 __FP_INSN ("fcvtzu",0x1e190000, 0x7f3f0000, float2fix
, 0, OP3 (Rd
, Fn
, FBITS
), QL_FP2FIX
, F_FPTYPE
| F_SF
),
2718 FF16_INSN ("fcvtzu",0x1ed90000, 0x7f3f0000, float2fix
, OP3 (Rd
, Fn
, FBITS
), QL_FP2FIX_H
, F_FPTYPE
| F_SF
),
2719 /* Floating-point<->integer conversions. */
2720 __FP_INSN ("fcvtns",0x1e200000, 0x7f3ffc00, float2int
, 0, OP2 (Rd
, Fn
), QL_FP2INT
, F_FPTYPE
| F_SF
),
2721 FF16_INSN ("fcvtns",0x1ee00000, 0x7f3ffc00, float2int
, OP2 (Rd
, Fn
), QL_FP2INT_H
, F_FPTYPE
| F_SF
),
2722 __FP_INSN ("fcvtnu",0x1e210000, 0x7f3ffc00, float2int
, 0, OP2 (Rd
, Fn
), QL_FP2INT
, F_FPTYPE
| F_SF
),
2723 FF16_INSN ("fcvtnu",0x1ee10000, 0x7f3ffc00, float2int
, OP2 (Rd
, Fn
), QL_FP2INT_H
, F_FPTYPE
| F_SF
),
2724 __FP_INSN ("scvtf", 0x1e220000, 0x7f3ffc00, float2int
, 0, OP2 (Fd
, Rn
), QL_INT2FP
, F_FPTYPE
| F_SF
),
2725 FF16_INSN ("scvtf", 0x1ee20000, 0x7f3ffc00, float2int
, OP2 (Fd
, Rn
), QL_INT2FP_H
, F_FPTYPE
| F_SF
),
2726 __FP_INSN ("ucvtf", 0x1e230000, 0x7f3ffc00, float2int
, 0, OP2 (Fd
, Rn
), QL_INT2FP
, F_FPTYPE
| F_SF
),
2727 FF16_INSN ("ucvtf", 0x1ee30000, 0x7f3ffc00, float2int
, OP2 (Fd
, Rn
), QL_INT2FP_H
, F_FPTYPE
| F_SF
),
2728 __FP_INSN ("fcvtas",0x1e240000, 0x7f3ffc00, float2int
, 0, OP2 (Rd
, Fn
), QL_FP2INT
, F_FPTYPE
| F_SF
),
2729 FF16_INSN ("fcvtas",0x1ee40000, 0x7f3ffc00, float2int
, OP2 (Rd
, Fn
), QL_FP2INT_H
, F_FPTYPE
| F_SF
),
2730 __FP_INSN ("fcvtau",0x1e250000, 0x7f3ffc00, float2int
, 0, OP2 (Rd
, Fn
), QL_FP2INT
, F_FPTYPE
| F_SF
),
2731 FF16_INSN ("fcvtau",0x1ee50000, 0x7f3ffc00, float2int
, OP2 (Rd
, Fn
), QL_FP2INT_H
, F_FPTYPE
| F_SF
),
2732 __FP_INSN ("fmov", 0x1e260000, 0x7f3ffc00, float2int
, 0, OP2 (Rd
, Fn
), QL_FP2INT
, F_FPTYPE
| F_SF
),
2733 FF16_INSN ("fmov", 0x1ee60000, 0x7f3ffc00, float2int
, OP2 (Rd
, Fn
), QL_FP2INT_H
, F_FPTYPE
| F_SF
),
2734 __FP_INSN ("fmov", 0x1e270000, 0x7f3ffc00, float2int
, 0, OP2 (Fd
, Rn
), QL_INT2FP
, F_FPTYPE
| F_SF
),
2735 FF16_INSN ("fmov", 0x1ee70000, 0x7f3ffc00, float2int
, OP2 (Fd
, Rn
), QL_INT2FP_H
, F_FPTYPE
| F_SF
),
2736 __FP_INSN ("fcvtps",0x1e280000, 0x7f3ffc00, float2int
, 0, OP2 (Rd
, Fn
), QL_FP2INT
, F_FPTYPE
| F_SF
),
2737 FF16_INSN ("fcvtps",0x1ee80000, 0x7f3ffc00, float2int
, OP2 (Rd
, Fn
), QL_FP2INT_H
, F_FPTYPE
| F_SF
),
2738 __FP_INSN ("fcvtpu",0x1e290000, 0x7f3ffc00, float2int
, 0, OP2 (Rd
, Fn
), QL_FP2INT
, F_FPTYPE
| F_SF
),
2739 FF16_INSN ("fcvtpu",0x1ee90000, 0x7f3ffc00, float2int
, OP2 (Rd
, Fn
), QL_FP2INT_H
, F_FPTYPE
| F_SF
),
2740 __FP_INSN ("fcvtms",0x1e300000, 0x7f3ffc00, float2int
, 0, OP2 (Rd
, Fn
), QL_FP2INT
, F_FPTYPE
| F_SF
),
2741 FF16_INSN ("fcvtms",0x1ef00000, 0x7f3ffc00, float2int
, OP2 (Rd
, Fn
), QL_FP2INT_H
, F_FPTYPE
| F_SF
),
2742 __FP_INSN ("fcvtmu",0x1e310000, 0x7f3ffc00, float2int
, 0, OP2 (Rd
, Fn
), QL_FP2INT
, F_FPTYPE
| F_SF
),
2743 FF16_INSN ("fcvtmu",0x1ef10000, 0x7f3ffc00, float2int
, OP2 (Rd
, Fn
), QL_FP2INT_H
, F_FPTYPE
| F_SF
),
2744 __FP_INSN ("fcvtzs",0x1e380000, 0x7f3ffc00, float2int
, 0, OP2 (Rd
, Fn
), QL_FP2INT
, F_FPTYPE
| F_SF
),
2745 FF16_INSN ("fcvtzs",0x1ef80000, 0x7f3ffc00, float2int
, OP2 (Rd
, Fn
), QL_FP2INT_H
, F_FPTYPE
| F_SF
),
2746 __FP_INSN ("fcvtzu",0x1e390000, 0x7f3ffc00, float2int
, 0, OP2 (Rd
, Fn
), QL_FP2INT
, F_FPTYPE
| F_SF
),
2747 FF16_INSN ("fcvtzu",0x1ef90000, 0x7f3ffc00, float2int
, OP2 (Rd
, Fn
), QL_FP2INT_H
, F_FPTYPE
| F_SF
),
2748 __FP_INSN ("fmov", 0x9eae0000, 0xfffffc00, float2int
, 0, OP2 (Rd
, VnD1
), QL_XVD1
, 0),
2749 __FP_INSN ("fmov", 0x9eaf0000, 0xfffffc00, float2int
, 0, OP2 (VdD1
, Rn
), QL_VD1X
, 0),
2750 /* Floating-point conditional compare. */
2751 __FP_INSN ("fccmp", 0x1e200400, 0xff200c10, floatccmp
, 0, OP4 (Fn
, Fm
, NZCV
, COND
), QL_FCCMP
, F_FPTYPE
),
2752 FF16_INSN ("fccmp", 0x1ee00400, 0xff200c10, floatccmp
, OP4 (Fn
, Fm
, NZCV
, COND
), QL_FCCMP_H
, F_FPTYPE
),
2753 __FP_INSN ("fccmpe",0x1e200410, 0xff200c10, floatccmp
, 0, OP4 (Fn
, Fm
, NZCV
, COND
), QL_FCCMP
, F_FPTYPE
),
2754 FF16_INSN ("fccmpe",0x1ee00410, 0xff200c10, floatccmp
, OP4 (Fn
, Fm
, NZCV
, COND
), QL_FCCMP_H
, F_FPTYPE
),
2755 /* Floating-point compare. */
2756 __FP_INSN ("fcmp", 0x1e202000, 0xff20fc1f, floatcmp
, 0, OP2 (Fn
, Fm
), QL_FP2
, F_FPTYPE
),
2757 FF16_INSN ("fcmp", 0x1ee02000, 0xff20fc1f, floatcmp
, OP2 (Fn
, Fm
), QL_FP2_H
, F_FPTYPE
),
2758 __FP_INSN ("fcmpe", 0x1e202010, 0xff20fc1f, floatcmp
, 0, OP2 (Fn
, Fm
), QL_FP2
, F_FPTYPE
),
2759 FF16_INSN ("fcmpe", 0x1ee02010, 0xff20fc1f, floatcmp
, OP2 (Fn
, Fm
), QL_FP2_H
, F_FPTYPE
),
2760 __FP_INSN ("fcmp", 0x1e202008, 0xff20fc1f, floatcmp
, 0, OP2 (Fn
, FPIMM0
), QL_DST_SD
,F_FPTYPE
),
2761 FF16_INSN ("fcmp", 0x1ee02008, 0xff20fc1f, floatcmp
, OP2 (Fn
, FPIMM0
), QL_FP2_H
, F_FPTYPE
),
2762 __FP_INSN ("fcmpe", 0x1e202018, 0xff20fc1f, floatcmp
, 0, OP2 (Fn
, FPIMM0
), QL_DST_SD
,F_FPTYPE
),
2763 FF16_INSN ("fcmpe", 0x1ee02018, 0xff20fc1f, floatcmp
, OP2 (Fn
, FPIMM0
), QL_FP2_H
, F_FPTYPE
),
2764 /* Floating-point data-processing (1 source). */
2765 __FP_INSN ("fmov", 0x1e204000, 0xff3ffc00, floatdp1
, 0, OP2 (Fd
, Fn
), QL_FP2
, F_FPTYPE
),
2766 FF16_INSN ("fmov", 0x1ee04000, 0xff3ffc00, floatdp1
, OP2 (Fd
, Fn
), QL_FP2_H
, F_FPTYPE
),
2767 __FP_INSN ("fabs", 0x1e20c000, 0xff3ffc00, floatdp1
, 0, OP2 (Fd
, Fn
), QL_FP2
, F_FPTYPE
),
2768 FF16_INSN ("fabs", 0x1ee0c000, 0xff3ffc00, floatdp1
, OP2 (Fd
, Fn
), QL_FP2_H
, F_FPTYPE
),
2769 __FP_INSN ("fneg", 0x1e214000, 0xff3ffc00, floatdp1
, 0, OP2 (Fd
, Fn
), QL_FP2
, F_FPTYPE
),
2770 FF16_INSN ("fneg", 0x1ee14000, 0xff3ffc00, floatdp1
, OP2 (Fd
, Fn
), QL_FP2_H
, F_FPTYPE
),
2771 __FP_INSN ("fsqrt", 0x1e21c000, 0xff3ffc00, floatdp1
, 0, OP2 (Fd
, Fn
), QL_FP2
, F_FPTYPE
),
2772 FF16_INSN ("fsqrt", 0x1ee1c000, 0xff3ffc00, floatdp1
, OP2 (Fd
, Fn
), QL_FP2_H
, F_FPTYPE
),
2773 __FP_INSN ("fcvt", 0x1e224000, 0xff3e7c00, floatdp1
, OP_FCVT
, OP2 (Fd
, Fn
), QL_FCVT
, F_FPTYPE
| F_MISC
),
2774 __FP_INSN ("frintn",0x1e244000, 0xff3ffc00, floatdp1
, 0, OP2 (Fd
, Fn
), QL_FP2
, F_FPTYPE
),
2775 FF16_INSN ("frintn",0x1ee44000, 0xff3ffc00, floatdp1
, OP2 (Fd
, Fn
), QL_FP2_H
, F_FPTYPE
),
2776 __FP_INSN ("frintp",0x1e24c000, 0xff3ffc00, floatdp1
, 0, OP2 (Fd
, Fn
), QL_FP2
, F_FPTYPE
),
2777 FF16_INSN ("frintp",0x1ee4c000, 0xff3ffc00, floatdp1
, OP2 (Fd
, Fn
), QL_FP2_H
, F_FPTYPE
),
2778 __FP_INSN ("frintm",0x1e254000, 0xff3ffc00, floatdp1
, 0, OP2 (Fd
, Fn
), QL_FP2
, F_FPTYPE
),
2779 FF16_INSN ("frintm",0x1ee54000, 0xff3ffc00, floatdp1
, OP2 (Fd
, Fn
), QL_FP2_H
, F_FPTYPE
),
2780 __FP_INSN ("frintz",0x1e25c000, 0xff3ffc00, floatdp1
, 0, OP2 (Fd
, Fn
), QL_FP2
, F_FPTYPE
),
2781 FF16_INSN ("frintz",0x1ee5c000, 0xff3ffc00, floatdp1
, OP2 (Fd
, Fn
), QL_FP2_H
, F_FPTYPE
),
2782 __FP_INSN ("frinta",0x1e264000, 0xff3ffc00, floatdp1
, 0, OP2 (Fd
, Fn
), QL_FP2
, F_FPTYPE
),
2783 FF16_INSN ("frinta",0x1ee64000, 0xff3ffc00, floatdp1
, OP2 (Fd
, Fn
), QL_FP2_H
, F_FPTYPE
),
2784 __FP_INSN ("frintx",0x1e274000, 0xff3ffc00, floatdp1
, 0, OP2 (Fd
, Fn
), QL_FP2
, F_FPTYPE
),
2785 FF16_INSN ("frintx",0x1ee74000, 0xff3ffc00, floatdp1
, OP2 (Fd
, Fn
), QL_FP2_H
, F_FPTYPE
),
2786 __FP_INSN ("frinti",0x1e27c000, 0xff3ffc00, floatdp1
, 0, OP2 (Fd
, Fn
), QL_FP2
, F_FPTYPE
),
2787 FF16_INSN ("frinti",0x1ee7c000, 0xff3ffc00, floatdp1
, OP2 (Fd
, Fn
), QL_FP2_H
, F_FPTYPE
),
2788 /* Floating-point data-processing (2 source). */
2789 __FP_INSN ("fmul", 0x1e200800, 0xff20fc00, floatdp2
, 0, OP3 (Fd
, Fn
, Fm
), QL_FP3
, F_FPTYPE
),
2790 FF16_INSN ("fmul", 0x1ee00800, 0xff20fc00, floatdp2
, OP3 (Fd
, Fn
, Fm
), QL_FP3_H
, F_FPTYPE
),
2791 __FP_INSN ("fdiv", 0x1e201800, 0xff20fc00, floatdp2
, 0, OP3 (Fd
, Fn
, Fm
), QL_FP3
, F_FPTYPE
),
2792 FF16_INSN ("fdiv", 0x1ee01800, 0xff20fc00, floatdp2
, OP3 (Fd
, Fn
, Fm
), QL_FP3_H
, F_FPTYPE
),
2793 __FP_INSN ("fadd", 0x1e202800, 0xff20fc00, floatdp2
, 0, OP3 (Fd
, Fn
, Fm
), QL_FP3
, F_FPTYPE
),
2794 FF16_INSN ("fadd", 0x1ee02800, 0xff20fc00, floatdp2
, OP3 (Fd
, Fn
, Fm
), QL_FP3_H
, F_FPTYPE
),
2795 __FP_INSN ("fsub", 0x1e203800, 0xff20fc00, floatdp2
, 0, OP3 (Fd
, Fn
, Fm
), QL_FP3
, F_FPTYPE
),
2796 FF16_INSN ("fsub", 0x1ee03800, 0xff20fc00, floatdp2
, OP3 (Fd
, Fn
, Fm
), QL_FP3_H
, F_FPTYPE
),
2797 __FP_INSN ("fmax", 0x1e204800, 0xff20fc00, floatdp2
, 0, OP3 (Fd
, Fn
, Fm
), QL_FP3
, F_FPTYPE
),
2798 FF16_INSN ("fmax", 0x1ee04800, 0xff20fc00, floatdp2
, OP3 (Fd
, Fn
, Fm
), QL_FP3_H
, F_FPTYPE
),
2799 __FP_INSN ("fmin", 0x1e205800, 0xff20fc00, floatdp2
, 0, OP3 (Fd
, Fn
, Fm
), QL_FP3
, F_FPTYPE
),
2800 FF16_INSN ("fmin", 0x1ee05800, 0xff20fc00, floatdp2
, OP3 (Fd
, Fn
, Fm
), QL_FP3_H
, F_FPTYPE
),
2801 __FP_INSN ("fmaxnm",0x1e206800, 0xff20fc00, floatdp2
, 0, OP3 (Fd
, Fn
, Fm
), QL_FP3
, F_FPTYPE
),
2802 FF16_INSN ("fmaxnm",0x1ee06800, 0xff20fc00, floatdp2
, OP3 (Fd
, Fn
, Fm
), QL_FP3_H
, F_FPTYPE
),
2803 __FP_INSN ("fminnm",0x1e207800, 0xff20fc00, floatdp2
, 0, OP3 (Fd
, Fn
, Fm
), QL_FP3
, F_FPTYPE
),
2804 FF16_INSN ("fminnm",0x1ee07800, 0xff20fc00, floatdp2
, OP3 (Fd
, Fn
, Fm
), QL_FP3_H
, F_FPTYPE
),
2805 __FP_INSN ("fnmul", 0x1e208800, 0xff20fc00, floatdp2
, 0, OP3 (Fd
, Fn
, Fm
), QL_FP3
, F_FPTYPE
),
2806 FF16_INSN ("fnmul", 0x1ee08800, 0xff20fc00, floatdp2
, OP3 (Fd
, Fn
, Fm
), QL_FP3_H
, F_FPTYPE
),
2807 /* Floating-point data-processing (3 source). */
2808 __FP_INSN ("fmadd", 0x1f000000, 0xff208000, floatdp3
, 0, OP4 (Fd
, Fn
, Fm
, Fa
), QL_FP4
, F_FPTYPE
),
2809 FF16_INSN ("fmadd", 0x1fc00000, 0xff208000, floatdp3
, OP4 (Fd
, Fn
, Fm
, Fa
), QL_FP4_H
, F_FPTYPE
),
2810 __FP_INSN ("fmsub", 0x1f008000, 0xff208000, floatdp3
, 0, OP4 (Fd
, Fn
, Fm
, Fa
), QL_FP4
, F_FPTYPE
),
2811 FF16_INSN ("fmsub", 0x1fc08000, 0xff208000, floatdp3
, OP4 (Fd
, Fn
, Fm
, Fa
), QL_FP4_H
, F_FPTYPE
),
2812 __FP_INSN ("fnmadd",0x1f200000, 0xff208000, floatdp3
, 0, OP4 (Fd
, Fn
, Fm
, Fa
), QL_FP4
, F_FPTYPE
),
2813 FF16_INSN ("fnmadd",0x1fe00000, 0xff208000, floatdp3
, OP4 (Fd
, Fn
, Fm
, Fa
), QL_FP4_H
, F_FPTYPE
),
2814 __FP_INSN ("fnmsub",0x1f208000, 0xff208000, floatdp3
, 0, OP4 (Fd
, Fn
, Fm
, Fa
), QL_FP4
, F_FPTYPE
),
2815 FF16_INSN ("fnmsub",0x1fe08000, 0xff208000, floatdp3
, OP4 (Fd
, Fn
, Fm
, Fa
), QL_FP4_H
, F_FPTYPE
),
2816 /* Floating-point immediate. */
2817 __FP_INSN ("fmov", 0x1e201000, 0xff201fe0, floatimm
, 0, OP2 (Fd
, FPIMM
), QL_DST_SD
, F_FPTYPE
),
2818 FF16_INSN ("fmov", 0x1ee01000, 0xff201fe0, floatimm
, OP2 (Fd
, FPIMM
), QL_DST_H
, F_FPTYPE
),
2819 /* Floating-point conditional select. */
2820 __FP_INSN ("fcsel", 0x1e200c00, 0xff200c00, floatsel
, 0, OP4 (Fd
, Fn
, Fm
, COND
), QL_FP_COND
, F_FPTYPE
),
2821 FF16_INSN ("fcsel", 0x1ee00c00, 0xff200c00, floatsel
, OP4 (Fd
, Fn
, Fm
, COND
), QL_FP_COND_H
, F_FPTYPE
),
2822 /* Load/store register (immediate indexed). */
2823 CORE_INSN ("strb", 0x38000400, 0xffe00400, ldst_imm9
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_W8
, 0),
2824 CORE_INSN ("ldrb", 0x38400400, 0xffe00400, ldst_imm9
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_W8
, 0),
2825 CORE_INSN ("ldrsb", 0x38800400, 0xffa00400, ldst_imm9
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_R8
, F_LDS_SIZE
),
2826 CORE_INSN ("str", 0x3c000400, 0x3f600400, ldst_imm9
, 0, OP2 (Ft
, ADDR_SIMM9
), QL_LDST_FP
, 0),
2827 CORE_INSN ("ldr", 0x3c400400, 0x3f600400, ldst_imm9
, 0, OP2 (Ft
, ADDR_SIMM9
), QL_LDST_FP
, 0),
2828 CORE_INSN ("strh", 0x78000400, 0xffe00400, ldst_imm9
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_W16
, 0),
2829 CORE_INSN ("ldrh", 0x78400400, 0xffe00400, ldst_imm9
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_W16
, 0),
2830 CORE_INSN ("ldrsh", 0x78800400, 0xffa00400, ldst_imm9
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_R16
, F_LDS_SIZE
),
2831 CORE_INSN ("str", 0xb8000400, 0xbfe00400, ldst_imm9
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_R
, F_GPRSIZE_IN_Q
),
2832 CORE_INSN ("ldr", 0xb8400400, 0xbfe00400, ldst_imm9
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_R
, F_GPRSIZE_IN_Q
),
2833 CORE_INSN ("ldrsw", 0xb8800400, 0xffe00400, ldst_imm9
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_X32
, 0),
2834 /* Load/store register (unsigned immediate). */
2835 CORE_INSN ("strb", 0x39000000, 0xffc00000, ldst_pos
, OP_STRB_POS
, OP2 (Rt
, ADDR_UIMM12
), QL_LDST_W8
, 0),
2836 CORE_INSN ("ldrb", 0x39400000, 0xffc00000, ldst_pos
, OP_LDRB_POS
, OP2 (Rt
, ADDR_UIMM12
), QL_LDST_W8
, 0),
2837 CORE_INSN ("ldrsb", 0x39800000, 0xff800000, ldst_pos
, OP_LDRSB_POS
, OP2 (Rt
, ADDR_UIMM12
), QL_LDST_R8
, F_LDS_SIZE
),
2838 CORE_INSN ("str", 0x3d000000, 0x3f400000, ldst_pos
, OP_STRF_POS
, OP2 (Ft
, ADDR_UIMM12
), QL_LDST_FP
, 0),
2839 CORE_INSN ("ldr", 0x3d400000, 0x3f400000, ldst_pos
, OP_LDRF_POS
, OP2 (Ft
, ADDR_UIMM12
), QL_LDST_FP
, 0),
2840 CORE_INSN ("strh", 0x79000000, 0xffc00000, ldst_pos
, OP_STRH_POS
, OP2 (Rt
, ADDR_UIMM12
), QL_LDST_W16
, 0),
2841 CORE_INSN ("ldrh", 0x79400000, 0xffc00000, ldst_pos
, OP_LDRH_POS
, OP2 (Rt
, ADDR_UIMM12
), QL_LDST_W16
, 0),
2842 CORE_INSN ("ldrsh", 0x79800000, 0xff800000, ldst_pos
, OP_LDRSH_POS
, OP2 (Rt
, ADDR_UIMM12
), QL_LDST_R16
, F_LDS_SIZE
),
2843 CORE_INSN ("str", 0xb9000000, 0xbfc00000, ldst_pos
, OP_STR_POS
, OP2 (Rt
, ADDR_UIMM12
), QL_LDST_R
, F_GPRSIZE_IN_Q
),
2844 CORE_INSN ("ldr", 0xb9400000, 0xbfc00000, ldst_pos
, OP_LDR_POS
, OP2 (Rt
, ADDR_UIMM12
), QL_LDST_R
, F_GPRSIZE_IN_Q
),
2845 CORE_INSN ("ldrsw", 0xb9800000, 0xffc00000, ldst_pos
, OP_LDRSW_POS
, OP2 (Rt
, ADDR_UIMM12
), QL_LDST_X32
, 0),
2846 CORE_INSN ("prfm", 0xf9800000, 0xffc00000, ldst_pos
, OP_PRFM_POS
, OP2 (PRFOP
, ADDR_UIMM12
), QL_LDST_PRFM
, 0),
2847 /* Load/store register (register offset). */
2848 CORE_INSN ("strb", 0x38200800, 0xffe00c00, ldst_regoff
, 0, OP2 (Rt
, ADDR_REGOFF
), QL_LDST_W8
, 0),
2849 CORE_INSN ("ldrb", 0x38600800, 0xffe00c00, ldst_regoff
, 0, OP2 (Rt
, ADDR_REGOFF
), QL_LDST_W8
, 0),
2850 CORE_INSN ("ldrsb", 0x38a00800, 0xffa00c00, ldst_regoff
, 0, OP2 (Rt
, ADDR_REGOFF
), QL_LDST_R8
, F_LDS_SIZE
),
2851 CORE_INSN ("str", 0x3c200800, 0x3f600c00, ldst_regoff
, 0, OP2 (Ft
, ADDR_REGOFF
), QL_LDST_FP
, 0),
2852 CORE_INSN ("ldr", 0x3c600800, 0x3f600c00, ldst_regoff
, 0, OP2 (Ft
, ADDR_REGOFF
), QL_LDST_FP
, 0),
2853 CORE_INSN ("strh", 0x78200800, 0xffe00c00, ldst_regoff
, 0, OP2 (Rt
, ADDR_REGOFF
), QL_LDST_W16
, 0),
2854 CORE_INSN ("ldrh", 0x78600800, 0xffe00c00, ldst_regoff
, 0, OP2 (Rt
, ADDR_REGOFF
), QL_LDST_W16
, 0),
2855 CORE_INSN ("ldrsh", 0x78a00800, 0xffa00c00, ldst_regoff
, 0, OP2 (Rt
, ADDR_REGOFF
), QL_LDST_R16
, F_LDS_SIZE
),
2856 CORE_INSN ("str", 0xb8200800, 0xbfe00c00, ldst_regoff
, 0, OP2 (Rt
, ADDR_REGOFF
), QL_LDST_R
, F_GPRSIZE_IN_Q
),
2857 CORE_INSN ("ldr", 0xb8600800, 0xbfe00c00, ldst_regoff
, 0, OP2 (Rt
, ADDR_REGOFF
), QL_LDST_R
, F_GPRSIZE_IN_Q
),
2858 CORE_INSN ("ldrsw", 0xb8a00800, 0xffe00c00, ldst_regoff
, 0, OP2 (Rt
, ADDR_REGOFF
), QL_LDST_X32
, 0),
2859 CORE_INSN ("prfm", 0xf8a00800, 0xffe00c00, ldst_regoff
, 0, OP2 (PRFOP
, ADDR_REGOFF
), QL_LDST_PRFM
, 0),
2860 /* Load/store register (unprivileged). */
2861 CORE_INSN ("sttrb", 0x38000800, 0xffe00c00, ldst_unpriv
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_W8
, 0),
2862 CORE_INSN ("ldtrb", 0x38400800, 0xffe00c00, ldst_unpriv
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_W8
, 0),
2863 CORE_INSN ("ldtrsb", 0x38800800, 0xffa00c00, ldst_unpriv
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_R8
, F_LDS_SIZE
),
2864 CORE_INSN ("sttrh", 0x78000800, 0xffe00c00, ldst_unpriv
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_W16
, 0),
2865 CORE_INSN ("ldtrh", 0x78400800, 0xffe00c00, ldst_unpriv
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_W16
, 0),
2866 CORE_INSN ("ldtrsh", 0x78800800, 0xffa00c00, ldst_unpriv
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_R16
, F_LDS_SIZE
),
2867 CORE_INSN ("sttr", 0xb8000800, 0xbfe00c00, ldst_unpriv
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_R
, F_GPRSIZE_IN_Q
),
2868 CORE_INSN ("ldtr", 0xb8400800, 0xbfe00c00, ldst_unpriv
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_R
, F_GPRSIZE_IN_Q
),
2869 CORE_INSN ("ldtrsw", 0xb8800800, 0xffe00c00, ldst_unpriv
, 0, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_X32
, 0),
2870 /* Load/store register (unscaled immediate). */
2871 CORE_INSN ("sturb", 0x38000000, 0xffe00c00, ldst_unscaled
, OP_STURB
, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_W8
, 0),
2872 CORE_INSN ("ldurb", 0x38400000, 0xffe00c00, ldst_unscaled
, OP_LDURB
, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_W8
, 0),
2873 CORE_INSN ("ldursb", 0x38800000, 0xffa00c00, ldst_unscaled
, OP_LDURSB
, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_R8
, F_LDS_SIZE
),
2874 CORE_INSN ("stur", 0x3c000000, 0x3f600c00, ldst_unscaled
, OP_STURV
, OP2 (Ft
, ADDR_SIMM9
), QL_LDST_FP
, 0),
2875 CORE_INSN ("ldur", 0x3c400000, 0x3f600c00, ldst_unscaled
, OP_LDURV
, OP2 (Ft
, ADDR_SIMM9
), QL_LDST_FP
, 0),
2876 CORE_INSN ("sturh", 0x78000000, 0xffe00c00, ldst_unscaled
, OP_STURH
, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_W16
, 0),
2877 CORE_INSN ("ldurh", 0x78400000, 0xffe00c00, ldst_unscaled
, OP_LDURH
, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_W16
, 0),
2878 CORE_INSN ("ldursh", 0x78800000, 0xffa00c00, ldst_unscaled
, OP_LDURSH
, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_R16
, F_LDS_SIZE
),
2879 CORE_INSN ("stur", 0xb8000000, 0xbfe00c00, ldst_unscaled
, OP_STUR
, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_R
, F_GPRSIZE_IN_Q
),
2880 CORE_INSN ("ldur", 0xb8400000, 0xbfe00c00, ldst_unscaled
, OP_LDUR
, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_R
, F_GPRSIZE_IN_Q
),
2881 CORE_INSN ("ldursw", 0xb8800000, 0xffe00c00, ldst_unscaled
, OP_LDURSW
, OP2 (Rt
, ADDR_SIMM9
), QL_LDST_X32
, 0),
2882 CORE_INSN ("prfum", 0xf8800000, 0xffe00c00, ldst_unscaled
, OP_PRFUM
, OP2 (PRFOP
, ADDR_SIMM9
), QL_LDST_PRFM
, 0),
2883 /* Load/store exclusive. */
2884 CORE_INSN ("stxrb", 0x8007c00, 0xffe08000, ldstexcl
, 0, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2885 CORE_INSN ("stlxrb", 0x800fc00, 0xffe08000, ldstexcl
, 0, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2886 CORE_INSN ("ldxrb", 0x85f7c00, 0xffe08000, ldstexcl
, 0, OP2 (Rt
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, 0),
2887 CORE_INSN ("ldaxrb", 0x85ffc00, 0xffe08000, ldstexcl
, 0, OP2 (Rt
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, 0),
2888 CORE_INSN ("stlrb", 0x89ffc00, 0xffe08000, ldstexcl
, 0, OP2 (Rt
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, 0),
2889 CORE_INSN ("ldarb", 0x8dffc00, 0xffeffc00, ldstexcl
, 0, OP2 (Rt
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, 0),
2890 CORE_INSN ("stxrh", 0x48007c00, 0xffe08000, ldstexcl
, 0, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2891 CORE_INSN ("stlxrh", 0x4800fc00, 0xffe08000, ldstexcl
, 0, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2892 CORE_INSN ("ldxrh", 0x485f7c00, 0xffe08000, ldstexcl
, 0, OP2 (Rt
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, 0),
2893 CORE_INSN ("ldaxrh", 0x485ffc00, 0xffe08000, ldstexcl
, 0, OP2 (Rt
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, 0),
2894 CORE_INSN ("stlrh", 0x489ffc00, 0xffe08000, ldstexcl
, 0, OP2 (Rt
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, 0),
2895 CORE_INSN ("ldarh", 0x48dffc00, 0xffeffc00, ldstexcl
, 0, OP2 (Rt
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, 0),
2896 CORE_INSN ("stxr", 0x88007c00, 0xbfe08000, ldstexcl
, 0, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2_LDST_EXC
, F_GPRSIZE_IN_Q
),
2897 CORE_INSN ("stlxr", 0x8800fc00, 0xbfe08000, ldstexcl
, 0, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2_LDST_EXC
, F_GPRSIZE_IN_Q
),
2898 CORE_INSN ("stxp", 0x88200000, 0xbfe08000, ldstexcl
, 0, OP4 (Rs
, Rt
, Rt2
, ADDR_SIMPLE
), QL_R3_LDST_EXC
, F_GPRSIZE_IN_Q
),
2899 CORE_INSN ("stlxp", 0x88208000, 0xbfe08000, ldstexcl
, 0, OP4 (Rs
, Rt
, Rt2
, ADDR_SIMPLE
), QL_R3_LDST_EXC
, F_GPRSIZE_IN_Q
),
2900 CORE_INSN ("ldxr", 0x885f7c00, 0xbfe08000, ldstexcl
, 0, OP2 (Rt
, ADDR_SIMPLE
), QL_R1NIL
, F_GPRSIZE_IN_Q
),
2901 CORE_INSN ("ldaxr", 0x885ffc00, 0xbfe08000, ldstexcl
, 0, OP2 (Rt
, ADDR_SIMPLE
), QL_R1NIL
, F_GPRSIZE_IN_Q
),
2902 CORE_INSN ("ldxp", 0x887f0000, 0xbfe08000, ldstexcl
, 0, OP3 (Rt
, Rt2
, ADDR_SIMPLE
), QL_R2NIL
, F_GPRSIZE_IN_Q
),
2903 CORE_INSN ("ldaxp", 0x887f8000, 0xbfe08000, ldstexcl
, 0, OP3 (Rt
, Rt2
, ADDR_SIMPLE
), QL_R2NIL
, F_GPRSIZE_IN_Q
),
2904 CORE_INSN ("stlr", 0x889ffc00, 0xbfe08000, ldstexcl
, 0, OP2 (Rt
, ADDR_SIMPLE
), QL_R1NIL
, F_GPRSIZE_IN_Q
),
2905 CORE_INSN ("ldar", 0x88dffc00, 0xbfeffc00, ldstexcl
, 0, OP2 (Rt
, ADDR_SIMPLE
), QL_R1NIL
, F_GPRSIZE_IN_Q
),
2906 /* Limited Ordering Regions load/store instructions. */
2907 _LOR_INSN ("ldlar", 0x88df7c00, 0xbfe08000, ldstexcl
, OP2 (Rt
, ADDR_SIMPLE
), QL_R1NIL
, F_GPRSIZE_IN_Q
),
2908 _LOR_INSN ("ldlarb", 0x08df7c00, 0xffe08000, ldstexcl
, OP2 (Rt
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, 0),
2909 _LOR_INSN ("ldlarh", 0x48df7c00, 0xffe08000, ldstexcl
, OP2 (Rt
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, 0),
2910 _LOR_INSN ("stllr", 0x889f7c00, 0xbfe08000, ldstexcl
, OP2 (Rt
, ADDR_SIMPLE
), QL_R1NIL
, F_GPRSIZE_IN_Q
),
2911 _LOR_INSN ("stllrb", 0x089f7c00, 0xffe08000, ldstexcl
, OP2 (Rt
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, 0),
2912 _LOR_INSN ("stllrh", 0x489f7c00, 0xbfe08000, ldstexcl
, OP2 (Rt
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, 0),
2913 /* Load/store no-allocate pair (offset). */
2914 CORE_INSN ("stnp", 0x28000000, 0x7fc00000, ldstnapair_offs
, 0, OP3 (Rt
, Rt2
, ADDR_SIMM7
), QL_LDST_PAIR_R
, F_SF
),
2915 CORE_INSN ("ldnp", 0x28400000, 0x7fc00000, ldstnapair_offs
, 0, OP3 (Rt
, Rt2
, ADDR_SIMM7
), QL_LDST_PAIR_R
, F_SF
),
2916 CORE_INSN ("stnp", 0x2c000000, 0x3fc00000, ldstnapair_offs
, 0, OP3 (Ft
, Ft2
, ADDR_SIMM7
), QL_LDST_PAIR_FP
, 0),
2917 CORE_INSN ("ldnp", 0x2c400000, 0x3fc00000, ldstnapair_offs
, 0, OP3 (Ft
, Ft2
, ADDR_SIMM7
), QL_LDST_PAIR_FP
, 0),
2918 /* Load/store register pair (offset). */
2919 CORE_INSN ("stp", 0x29000000, 0x7ec00000, ldstpair_off
, 0, OP3 (Rt
, Rt2
, ADDR_SIMM7
), QL_LDST_PAIR_R
, F_SF
),
2920 CORE_INSN ("ldp", 0x29400000, 0x7ec00000, ldstpair_off
, 0, OP3 (Rt
, Rt2
, ADDR_SIMM7
), QL_LDST_PAIR_R
, F_SF
),
2921 CORE_INSN ("stp", 0x2d000000, 0x3fc00000, ldstpair_off
, 0, OP3 (Ft
, Ft2
, ADDR_SIMM7
), QL_LDST_PAIR_FP
, 0),
2922 CORE_INSN ("ldp", 0x2d400000, 0x3fc00000, ldstpair_off
, 0, OP3 (Ft
, Ft2
, ADDR_SIMM7
), QL_LDST_PAIR_FP
, 0),
2923 {"ldpsw", 0x69400000, 0xffc00000, ldstpair_off
, 0, CORE
, OP3 (Rt
, Rt2
, ADDR_SIMM7
), QL_LDST_PAIR_X32
, 0, 0, VERIFIER (ldpsw
)},
2924 /* Load/store register pair (indexed). */
2925 CORE_INSN ("stp", 0x28800000, 0x7ec00000, ldstpair_indexed
, 0, OP3 (Rt
, Rt2
, ADDR_SIMM7
), QL_LDST_PAIR_R
, F_SF
),
2926 CORE_INSN ("ldp", 0x28c00000, 0x7ec00000, ldstpair_indexed
, 0, OP3 (Rt
, Rt2
, ADDR_SIMM7
), QL_LDST_PAIR_R
, F_SF
),
2927 CORE_INSN ("stp", 0x2c800000, 0x3ec00000, ldstpair_indexed
, 0, OP3 (Ft
, Ft2
, ADDR_SIMM7
), QL_LDST_PAIR_FP
, 0),
2928 CORE_INSN ("ldp", 0x2cc00000, 0x3ec00000, ldstpair_indexed
, 0, OP3 (Ft
, Ft2
, ADDR_SIMM7
), QL_LDST_PAIR_FP
, 0),
2929 {"ldpsw", 0x68c00000, 0xfec00000, ldstpair_indexed
, 0, CORE
, OP3 (Rt
, Rt2
, ADDR_SIMM7
), QL_LDST_PAIR_X32
, 0, 0, VERIFIER (ldpsw
)},
2930 /* Load register (literal). */
2931 CORE_INSN ("ldr", 0x18000000, 0xbf000000, loadlit
, OP_LDR_LIT
, OP2 (Rt
, ADDR_PCREL19
), QL_R_PCREL
, F_GPRSIZE_IN_Q
),
2932 CORE_INSN ("ldr", 0x1c000000, 0x3f000000, loadlit
, OP_LDRV_LIT
, OP2 (Ft
, ADDR_PCREL19
), QL_FP_PCREL
, 0),
2933 CORE_INSN ("ldrsw", 0x98000000, 0xff000000, loadlit
, OP_LDRSW_LIT
, OP2 (Rt
, ADDR_PCREL19
), QL_X_PCREL
, 0),
2934 CORE_INSN ("prfm", 0xd8000000, 0xff000000, loadlit
, OP_PRFM_LIT
, OP2 (PRFOP
, ADDR_PCREL19
), QL_PRFM_PCREL
, 0),
2935 /* Logical (immediate). */
2936 CORE_INSN ("and", 0x12000000, 0x7f800000, log_imm
, 0, OP3 (Rd_SP
, Rn
, LIMM
), QL_R2NIL
, F_HAS_ALIAS
| F_SF
),
2937 CORE_INSN ("bic", 0x12000000, 0x7f800000, log_imm
, OP_BIC
, OP3 (Rd_SP
, Rn
, LIMM
), QL_R2NIL
, F_ALIAS
| F_PSEUDO
| F_SF
),
2938 CORE_INSN ("orr", 0x32000000, 0x7f800000, log_imm
, 0, OP3 (Rd_SP
, Rn
, LIMM
), QL_R2NIL
, F_HAS_ALIAS
| F_SF
),
2939 CORE_INSN ("mov", 0x320003e0, 0x7f8003e0, log_imm
, OP_MOV_IMM_LOG
, OP2 (Rd_SP
, IMM_MOV
), QL_R1NIL
, F_ALIAS
| F_P1
| F_SF
| F_CONV
),
2940 CORE_INSN ("eor", 0x52000000, 0x7f800000, log_imm
, 0, OP3 (Rd_SP
, Rn
, LIMM
), QL_R2NIL
, F_SF
),
2941 CORE_INSN ("ands", 0x72000000, 0x7f800000, log_imm
, 0, OP3 (Rd
, Rn
, LIMM
), QL_R2NIL
, F_HAS_ALIAS
| F_SF
),
2942 CORE_INSN ("tst", 0x7200001f, 0x7f80001f, log_imm
, 0, OP2 (Rn
, LIMM
), QL_R1NIL
, F_ALIAS
| F_SF
),
2943 /* Logical (shifted register). */
2944 CORE_INSN ("and", 0xa000000, 0x7f200000, log_shift
, 0, OP3 (Rd
, Rn
, Rm_SFT
), QL_I3SAMER
, F_SF
),
2945 CORE_INSN ("bic", 0xa200000, 0x7f200000, log_shift
, 0, OP3 (Rd
, Rn
, Rm_SFT
), QL_I3SAMER
, F_SF
),
2946 CORE_INSN ("orr", 0x2a000000, 0x7f200000, log_shift
, 0, OP3 (Rd
, Rn
, Rm_SFT
), QL_I3SAMER
, F_HAS_ALIAS
| F_SF
),
2947 CORE_INSN ("mov", 0x2a0003e0, 0x7f2003e0, log_shift
, 0, OP2 (Rd
, Rm_SFT
), QL_I2SAMER
, F_ALIAS
| F_SF
),
2948 CORE_INSN ("uxtw", 0x2a0003e0, 0x7f2003e0, log_shift
, OP_UXTW
, OP2 (Rd
, Rm
), QL_I2SAMEW
, F_ALIAS
| F_PSEUDO
),
2949 CORE_INSN ("orn", 0x2a200000, 0x7f200000, log_shift
, 0, OP3 (Rd
, Rn
, Rm_SFT
), QL_I3SAMER
, F_HAS_ALIAS
| F_SF
),
2950 CORE_INSN ("mvn", 0x2a2003e0, 0x7f2003e0, log_shift
, 0, OP2 (Rd
, Rm_SFT
), QL_I2SAMER
, F_ALIAS
| F_SF
),
2951 CORE_INSN ("eor", 0x4a000000, 0x7f200000, log_shift
, 0, OP3 (Rd
, Rn
, Rm_SFT
), QL_I3SAMER
, F_SF
),
2952 CORE_INSN ("eon", 0x4a200000, 0x7f200000, log_shift
, 0, OP3 (Rd
, Rn
, Rm_SFT
), QL_I3SAMER
, F_SF
),
2953 CORE_INSN ("ands", 0x6a000000, 0x7f200000, log_shift
, 0, OP3 (Rd
, Rn
, Rm_SFT
), QL_I3SAMER
, F_HAS_ALIAS
| F_SF
),
2954 CORE_INSN ("tst", 0x6a00001f, 0x7f20001f, log_shift
, 0, OP2 (Rn
, Rm_SFT
), QL_I2SAMER
, F_ALIAS
| F_SF
),
2955 CORE_INSN ("bics", 0x6a200000, 0x7f200000, log_shift
, 0, OP3 (Rd
, Rn
, Rm_SFT
), QL_I3SAMER
, F_SF
),
2956 /* LSE extension (atomic). */
2957 _LSE_INSN ("casb", 0x8a07c00, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2958 _LSE_INSN ("cash", 0x48a07c00, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2959 _LSE_INSN ("cas", 0x88a07c00, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
2960 _LSE_INSN ("casab", 0x8e07c00, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2961 _LSE_INSN ("caslb", 0x8a0fc00, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2962 _LSE_INSN ("casalb", 0x8e0fc00, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2963 _LSE_INSN ("casah", 0x48e07c00, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2964 _LSE_INSN ("caslh", 0x48a0fc00, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2965 _LSE_INSN ("casalh", 0x48e0fc00, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2966 _LSE_INSN ("casa", 0x88e07c00, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
2967 _LSE_INSN ("casl", 0x88a0fc00, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
2968 _LSE_INSN ("casal", 0x88e0fc00, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
2969 _LSE_INSN ("casp", 0x8207c00, 0xbfe0fc00, lse_atomic
, OP5 (Rs
, PAIRREG
, Rt
, PAIRREG
, ADDR_SIMPLE
), QL_R4NIL
, F_LSE_SZ
),
2970 _LSE_INSN ("caspa", 0x8607c00, 0xbfe0fc00, lse_atomic
, OP5 (Rs
, PAIRREG
, Rt
, PAIRREG
, ADDR_SIMPLE
), QL_R4NIL
, F_LSE_SZ
),
2971 _LSE_INSN ("caspl", 0x820fc00, 0xbfe0fc00, lse_atomic
, OP5 (Rs
, PAIRREG
, Rt
, PAIRREG
, ADDR_SIMPLE
), QL_R4NIL
, F_LSE_SZ
),
2972 _LSE_INSN ("caspal", 0x860fc00, 0xbfe0fc00, lse_atomic
, OP5 (Rs
, PAIRREG
, Rt
, PAIRREG
, ADDR_SIMPLE
), QL_R4NIL
, F_LSE_SZ
),
2973 _LSE_INSN ("swpb", 0x38208000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2974 _LSE_INSN ("swph", 0x78208000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2975 _LSE_INSN ("swp", 0xb8208000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
2976 _LSE_INSN ("swpab", 0x38a08000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2977 _LSE_INSN ("swplb", 0x38608000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2978 _LSE_INSN ("swpalb", 0x38e08000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2979 _LSE_INSN ("swpah", 0x78a08000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2980 _LSE_INSN ("swplh", 0x78608000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2981 _LSE_INSN ("swpalh", 0x78e08000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2982 _LSE_INSN ("swpa", 0xb8a08000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
2983 _LSE_INSN ("swpl", 0xb8608000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
2984 _LSE_INSN ("swpal", 0xb8e08000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
2985 _LSE_INSN ("ldaddb", 0x38200000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
2986 _LSE_INSN ("ldaddh", 0x78200000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
2987 _LSE_INSN ("ldadd", 0xb8200000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
2988 _LSE_INSN ("ldaddab", 0x38a00000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2989 _LSE_INSN ("ldaddlb", 0x38600000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
2990 _LSE_INSN ("ldaddalb", 0x38e00000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2991 _LSE_INSN ("ldaddah", 0x78a00000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2992 _LSE_INSN ("ldaddlh", 0x78600000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
2993 _LSE_INSN ("ldaddalh", 0x78e00000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
2994 _LSE_INSN ("ldadda", 0xb8a00000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
2995 _LSE_INSN ("ldaddl", 0xb8600000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
2996 _LSE_INSN ("ldaddal", 0xb8e00000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
2997 _LSE_INSN ("ldclrb", 0x38201000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
2998 _LSE_INSN ("ldclrh", 0x78201000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
2999 _LSE_INSN ("ldclr", 0xb8201000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
3000 _LSE_INSN ("ldclrab", 0x38a01000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3001 _LSE_INSN ("ldclrlb", 0x38601000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3002 _LSE_INSN ("ldclralb", 0x38e01000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3003 _LSE_INSN ("ldclrah", 0x78a01000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3004 _LSE_INSN ("ldclrlh", 0x78601000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3005 _LSE_INSN ("ldclralh", 0x78e01000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3006 _LSE_INSN ("ldclra", 0xb8a01000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
3007 _LSE_INSN ("ldclrl", 0xb8601000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
3008 _LSE_INSN ("ldclral", 0xb8e01000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
3009 _LSE_INSN ("ldeorb", 0x38202000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3010 _LSE_INSN ("ldeorh", 0x78202000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3011 _LSE_INSN ("ldeor", 0xb8202000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
3012 _LSE_INSN ("ldeorab", 0x38a02000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3013 _LSE_INSN ("ldeorlb", 0x38602000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3014 _LSE_INSN ("ldeoralb", 0x38e02000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3015 _LSE_INSN ("ldeorah", 0x78a02000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3016 _LSE_INSN ("ldeorlh", 0x78602000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3017 _LSE_INSN ("ldeoralh", 0x78e02000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3018 _LSE_INSN ("ldeora", 0xb8a02000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
3019 _LSE_INSN ("ldeorl", 0xb8602000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
3020 _LSE_INSN ("ldeoral", 0xb8e02000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
3021 _LSE_INSN ("ldsetb", 0x38203000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3022 _LSE_INSN ("ldseth", 0x78203000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3023 _LSE_INSN ("ldset", 0xb8203000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
3024 _LSE_INSN ("ldsetab", 0x38a03000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3025 _LSE_INSN ("ldsetlb", 0x38603000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3026 _LSE_INSN ("ldsetalb", 0x38e03000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3027 _LSE_INSN ("ldsetah", 0x78a03000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3028 _LSE_INSN ("ldsetlh", 0x78603000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3029 _LSE_INSN ("ldsetalh", 0x78e03000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3030 _LSE_INSN ("ldseta", 0xb8a03000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
3031 _LSE_INSN ("ldsetl", 0xb8603000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
3032 _LSE_INSN ("ldsetal", 0xb8e03000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
3033 _LSE_INSN ("ldsmaxb", 0x38204000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3034 _LSE_INSN ("ldsmaxh", 0x78204000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3035 _LSE_INSN ("ldsmax", 0xb8204000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
3036 _LSE_INSN ("ldsmaxab", 0x38a04000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3037 _LSE_INSN ("ldsmaxlb", 0x38604000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3038 _LSE_INSN ("ldsmaxalb", 0x38e04000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3039 _LSE_INSN ("ldsmaxah", 0x78a04000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3040 _LSE_INSN ("ldsmaxlh", 0x78604000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3041 _LSE_INSN ("ldsmaxalh", 0x78e04000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3042 _LSE_INSN ("ldsmaxa", 0xb8a04000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
3043 _LSE_INSN ("ldsmaxl", 0xb8604000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
3044 _LSE_INSN ("ldsmaxal", 0xb8e04000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
3045 _LSE_INSN ("ldsminb", 0x38205000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3046 _LSE_INSN ("ldsminh", 0x78205000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3047 _LSE_INSN ("ldsmin", 0xb8205000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
3048 _LSE_INSN ("ldsminab", 0x38a05000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3049 _LSE_INSN ("ldsminlb", 0x38605000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3050 _LSE_INSN ("ldsminalb", 0x38e05000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3051 _LSE_INSN ("ldsminah", 0x78a05000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3052 _LSE_INSN ("ldsminlh", 0x78605000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3053 _LSE_INSN ("ldsminalh", 0x78e05000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3054 _LSE_INSN ("ldsmina", 0xb8a05000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
3055 _LSE_INSN ("ldsminl", 0xb8605000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
3056 _LSE_INSN ("ldsminal", 0xb8e05000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
3057 _LSE_INSN ("ldumaxb", 0x38206000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3058 _LSE_INSN ("ldumaxh", 0x78206000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3059 _LSE_INSN ("ldumax", 0xb8206000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
3060 _LSE_INSN ("ldumaxab", 0x38a06000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3061 _LSE_INSN ("ldumaxlb", 0x38606000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3062 _LSE_INSN ("ldumaxalb", 0x38e06000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3063 _LSE_INSN ("ldumaxah", 0x78a06000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3064 _LSE_INSN ("ldumaxlh", 0x78606000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3065 _LSE_INSN ("ldumaxalh", 0x78e06000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3066 _LSE_INSN ("ldumaxa", 0xb8a06000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
3067 _LSE_INSN ("ldumaxl", 0xb8606000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
3068 _LSE_INSN ("ldumaxal", 0xb8e06000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
3069 _LSE_INSN ("lduminb", 0x38207000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3070 _LSE_INSN ("lduminh", 0x78207000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3071 _LSE_INSN ("ldumin", 0xb8207000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
3072 _LSE_INSN ("lduminab", 0x38a07000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3073 _LSE_INSN ("lduminlb", 0x38607000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3074 _LSE_INSN ("lduminalb", 0x38e07000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3075 _LSE_INSN ("lduminah", 0x78a07000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3076 _LSE_INSN ("lduminlh", 0x78607000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, F_HAS_ALIAS
),
3077 _LSE_INSN ("lduminalh", 0x78e07000, 0xffe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_W2_LDST_EXC
, 0),
3078 _LSE_INSN ("ldumina", 0xb8a07000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
3079 _LSE_INSN ("lduminl", 0xb8607000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
| F_HAS_ALIAS
),
3080 _LSE_INSN ("lduminal", 0xb8e07000, 0xbfe0fc00, lse_atomic
, OP3 (Rs
, Rt
, ADDR_SIMPLE
), QL_R2NIL
, F_LSE_SZ
),
3081 _LSE_INSN ("staddb", 0x3820001f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3082 _LSE_INSN ("staddh", 0x7820001f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3083 _LSE_INSN ("stadd", 0xb820001f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3084 _LSE_INSN ("staddlb", 0x3860001f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3085 _LSE_INSN ("staddlh", 0x7860001f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3086 _LSE_INSN ("staddl", 0xb860001f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3087 _LSE_INSN ("stclrb", 0x3820101f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3088 _LSE_INSN ("stclrh", 0x7820101f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3089 _LSE_INSN ("stclr", 0xb820101f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3090 _LSE_INSN ("stclrlb", 0x3860101f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3091 _LSE_INSN ("stclrlh", 0x7860101f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3092 _LSE_INSN ("stclrl", 0xb860101f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3093 _LSE_INSN ("steorb", 0x3820201f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3094 _LSE_INSN ("steorh", 0x7820201f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3095 _LSE_INSN ("steor", 0xb820201f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3096 _LSE_INSN ("steorlb", 0x3860201f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3097 _LSE_INSN ("steorlh", 0x7860201f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3098 _LSE_INSN ("steorl", 0xb860201f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3099 _LSE_INSN ("stsetb", 0x3820301f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3100 _LSE_INSN ("stseth", 0x7820301f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3101 _LSE_INSN ("stset", 0xb820301f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3102 _LSE_INSN ("stsetlb", 0x3860301f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3103 _LSE_INSN ("stsetlh", 0x7860301f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3104 _LSE_INSN ("stsetl", 0xb860301f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3105 _LSE_INSN ("stsmaxb", 0x3820401f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3106 _LSE_INSN ("stsmaxh", 0x7820401f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3107 _LSE_INSN ("stsmax", 0xb820401f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3108 _LSE_INSN ("stsmaxlb", 0x3860401f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3109 _LSE_INSN ("stsmaxlh", 0x7860401f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3110 _LSE_INSN ("stsmaxl", 0xb860401f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3111 _LSE_INSN ("stsminb", 0x3820501f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3112 _LSE_INSN ("stsminh", 0x7820501f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3113 _LSE_INSN ("stsmin", 0xb820501f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3114 _LSE_INSN ("stsminlb", 0x3860501f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3115 _LSE_INSN ("stsminlh", 0x7860501f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3116 _LSE_INSN ("stsminl", 0xb860501f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3117 _LSE_INSN ("stumaxb", 0x3820601f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3118 _LSE_INSN ("stumaxh", 0x7820601f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3119 _LSE_INSN ("stumax", 0xb820601f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3120 _LSE_INSN ("stumaxlb", 0x3860601f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3121 _LSE_INSN ("stumaxlh", 0x7860601f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3122 _LSE_INSN ("stumaxl", 0xb860601f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3123 _LSE_INSN ("stuminb", 0x3820701f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3124 _LSE_INSN ("stuminh", 0x7820701f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3125 _LSE_INSN ("stumin", 0xb820701f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3126 _LSE_INSN ("stuminlb", 0x3860701f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3127 _LSE_INSN ("stuminlh", 0x7860701f, 0xffe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_W1_LDST_EXC
, F_ALIAS
),
3128 _LSE_INSN ("stuminl", 0xb860701f, 0xbfe0fc1f, lse_atomic
, OP2 (Rs
, ADDR_SIMPLE
), QL_R1NIL
, F_LSE_SZ
| F_ALIAS
),
3129 /* Move wide (immediate). */
3130 CORE_INSN ("movn", 0x12800000, 0x7f800000, movewide
, OP_MOVN
, OP2 (Rd
, HALF
), QL_DST_R
, F_SF
| F_HAS_ALIAS
),
3131 CORE_INSN ("mov", 0x12800000, 0x7f800000, movewide
, OP_MOV_IMM_WIDEN
, OP2 (Rd
, IMM_MOV
), QL_DST_R
, F_SF
| F_ALIAS
| F_CONV
),
3132 CORE_INSN ("movz", 0x52800000, 0x7f800000, movewide
, OP_MOVZ
, OP2 (Rd
, HALF
), QL_DST_R
, F_SF
| F_HAS_ALIAS
),
3133 CORE_INSN ("mov", 0x52800000, 0x7f800000, movewide
, OP_MOV_IMM_WIDE
, OP2 (Rd
, IMM_MOV
), QL_DST_R
, F_SF
| F_ALIAS
| F_CONV
),
3134 CORE_INSN ("movk", 0x72800000, 0x7f800000, movewide
, OP_MOVK
, OP2 (Rd
, HALF
), QL_DST_R
, F_SF
),
3135 /* PC-rel. addressing. */
3136 CORE_INSN ("adr", 0x10000000, 0x9f000000, pcreladdr
, 0, OP2 (Rd
, ADDR_PCREL21
), QL_ADRP
, 0),
3137 CORE_INSN ("adrp", 0x90000000, 0x9f000000, pcreladdr
, 0, OP2 (Rd
, ADDR_ADRP
), QL_ADRP
, 0),
3139 CORE_INSN ("msr", 0xd500401f, 0xfff8f01f, ic_system
, 0, OP2 (PSTATEFIELD
, UIMM4
), {}, 0),
3140 CORE_INSN ("hint",0xd503201f, 0xfffff01f, ic_system
, 0, OP1 (UIMM7
), {}, F_HAS_ALIAS
),
3141 CORE_INSN ("nop", 0xd503201f, 0xffffffff, ic_system
, 0, OP0 (), {}, F_ALIAS
),
3142 CORE_INSN ("yield", 0xd503203f, 0xffffffff, ic_system
, 0, OP0 (), {}, F_ALIAS
),
3143 CORE_INSN ("wfe", 0xd503205f, 0xffffffff, ic_system
, 0, OP0 (), {}, F_ALIAS
),
3144 CORE_INSN ("wfi", 0xd503207f, 0xffffffff, ic_system
, 0, OP0 (), {}, F_ALIAS
),
3145 CORE_INSN ("sev", 0xd503209f, 0xffffffff, ic_system
, 0, OP0 (), {}, F_ALIAS
),
3146 CORE_INSN ("sevl",0xd50320bf, 0xffffffff, ic_system
, 0, OP0 (), {}, F_ALIAS
),
3147 {"esb", 0xd503221f, 0xffffffff, ic_system
, 0, RAS
, OP0 (), {}, F_ALIAS
, 0, NULL
},
3148 {"psb", 0xd503223f, 0xffffffff, ic_system
, 0, STAT_PROFILE
, OP1 (BARRIER_PSB
), {}, F_ALIAS
, 0, NULL
},
3149 CORE_INSN ("clrex", 0xd503305f, 0xfffff0ff, ic_system
, 0, OP1 (UIMM4
), {}, F_OPD0_OPT
| F_DEFAULT (0xF)),
3150 CORE_INSN ("dsb", 0xd503309f, 0xfffff0ff, ic_system
, 0, OP1 (BARRIER
), {}, 0),
3151 CORE_INSN ("dmb", 0xd50330bf, 0xfffff0ff, ic_system
, 0, OP1 (BARRIER
), {}, 0),
3152 CORE_INSN ("isb", 0xd50330df, 0xfffff0ff, ic_system
, 0, OP1 (BARRIER_ISB
), {}, F_OPD0_OPT
| F_DEFAULT (0xF)),
3153 CORE_INSN ("sys", 0xd5080000, 0xfff80000, ic_system
, 0, OP5 (UIMM3_OP1
, Cn
, Cm
, UIMM3_OP2
, Rt
), QL_SYS
, F_HAS_ALIAS
| F_OPD4_OPT
| F_DEFAULT (0x1F)),
3154 CORE_INSN ("at", 0xd5080000, 0xfff80000, ic_system
, 0, OP2 (SYSREG_AT
, Rt
), QL_SRC_X
, F_ALIAS
),
3155 CORE_INSN ("dc", 0xd5080000, 0xfff80000, ic_system
, 0, OP2 (SYSREG_DC
, Rt
), QL_SRC_X
, F_ALIAS
),
3156 CORE_INSN ("ic", 0xd5080000, 0xfff80000, ic_system
, 0, OP2 (SYSREG_IC
, Rt_SYS
), QL_SRC_X
, F_ALIAS
| F_OPD1_OPT
| F_DEFAULT (0x1F)),
3157 CORE_INSN ("tlbi",0xd5080000, 0xfff80000, ic_system
, 0, OP2 (SYSREG_TLBI
, Rt_SYS
), QL_SRC_X
, F_ALIAS
| F_OPD1_OPT
| F_DEFAULT (0x1F)),
3158 CORE_INSN ("msr", 0xd5000000, 0xffe00000, ic_system
, 0, OP2 (SYSREG
, Rt
), QL_SRC_X
, 0),
3159 CORE_INSN ("sysl",0xd5280000, 0xfff80000, ic_system
, 0, OP5 (Rt
, UIMM3_OP1
, Cn
, Cm
, UIMM3_OP2
), QL_SYSL
, 0),
3160 CORE_INSN ("mrs", 0xd5200000, 0xffe00000, ic_system
, 0, OP2 (Rt
, SYSREG
), QL_DST_X
, 0),
3161 /* Test & branch (immediate). */
3162 CORE_INSN ("tbz", 0x36000000, 0x7f000000, testbranch
, 0, OP3 (Rt
, BIT_NUM
, ADDR_PCREL14
), QL_PCREL_14
, 0),
3163 CORE_INSN ("tbnz",0x37000000, 0x7f000000, testbranch
, 0, OP3 (Rt
, BIT_NUM
, ADDR_PCREL14
), QL_PCREL_14
, 0),
3164 /* The old UAL conditional branch mnemonics (to aid portability). */
3165 CORE_INSN ("beq", 0x54000000, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3166 CORE_INSN ("bne", 0x54000001, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3167 CORE_INSN ("bcs", 0x54000002, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3168 CORE_INSN ("bhs", 0x54000002, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3169 CORE_INSN ("bcc", 0x54000003, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3170 CORE_INSN ("blo", 0x54000003, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3171 CORE_INSN ("bmi", 0x54000004, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3172 CORE_INSN ("bpl", 0x54000005, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3173 CORE_INSN ("bvs", 0x54000006, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3174 CORE_INSN ("bvc", 0x54000007, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3175 CORE_INSN ("bhi", 0x54000008, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3176 CORE_INSN ("bls", 0x54000009, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3177 CORE_INSN ("bge", 0x5400000a, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3178 CORE_INSN ("blt", 0x5400000b, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3179 CORE_INSN ("bgt", 0x5400000c, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3180 CORE_INSN ("ble", 0x5400000d, 0xff00001f, condbranch
, 0, OP1 (ADDR_PCREL19
), QL_PCREL_NIL
, F_ALIAS
| F_PSEUDO
),
3181 /* SVE instructions. */
3182 _SVE_INSN ("fmov", 0x25b9c000, 0xffbfe000, sve_size_sd
, 0, OP2 (SVE_Zd
, SVE_FPIMM8
), OP_SVE_VU_SD
, F_ALIAS
, 0),
3183 _SVE_INSN ("fmov", 0x0590c000, 0xffb0e000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg4_16
, SVE_FPIMM8
), OP_SVE_VMU_SD
, F_ALIAS
, 0),
3184 _SVE_INSN ("mov", 0x04603000, 0xffe0fc00, sve_misc
, OP_MOV_Z_Z
, OP2 (SVE_Zd
, SVE_Zn
), OP_SVE_DD
, F_ALIAS
| F_MISC
, 0),
3185 _SVE_INSN ("mov", 0x05202000, 0xff20fc00, sve_index
, OP_MOV_Z_V
, OP2 (SVE_Zd
, SVE_VZn
), OP_SVE_VV_BHSD
, F_ALIAS
| F_MISC
, 0),
3186 _SVE_INSN ("mov", 0x05203800, 0xff3ffc00, sve_size_bhsd
, 0, OP2 (SVE_Zd
, Rn_SP
), OP_SVE_VR_BHSD
, F_ALIAS
, 0),
3187 _SVE_INSN ("mov", 0x25804000, 0xfff0c210, sve_misc
, OP_MOV_P_P
, OP2 (SVE_Pd
, SVE_Pn
), OP_SVE_BB
, F_ALIAS
| F_MISC
, 0),
3188 _SVE_INSN ("mov", 0x05202000, 0xff20fc00, sve_index
, OP_MOV_Z_Zi
, OP2 (SVE_Zd
, SVE_Zn_INDEX
), OP_SVE_VV_BHSD
, F_ALIAS
| F_MISC
, 0),
3189 _SVE_INSN ("mov", 0x05c00000, 0xfffc0000, sve_limm
, 0, OP2 (SVE_Zd
, SVE_LIMM_MOV
), OP_SVE_VU_BHSD
, F_ALIAS
, 0),
3190 _SVE_INSN ("mov", 0x2538c000, 0xff3fc000, sve_size_bhsd
, 0, OP2 (SVE_Zd
, SVE_ASIMM
), OP_SVE_VU_BHSD
, F_ALIAS
, 0),
3191 _SVE_INSN ("mov", 0x05208000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Vn
), OP_SVE_VMV_BHSD
, F_ALIAS
, 0),
3192 _SVE_INSN ("mov", 0x0520c000, 0xff20c000, sve_size_bhsd
, OP_MOV_Z_P_Z
, OP3 (SVE_Zd
, SVE_Pg4_10
, SVE_Zn
), OP_SVE_VMV_BHSD
, F_ALIAS
| F_MISC
, 0),
3193 _SVE_INSN ("mov", 0x0528a000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, Rn_SP
), OP_SVE_VMR_BHSD
, F_ALIAS
, 0),
3194 _SVE_INSN ("mov", 0x25004000, 0xfff0c210, sve_misc
, OP_MOVZ_P_P_P
, OP3 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
), OP_SVE_BZB
, F_ALIAS
| F_MISC
, 0),
3195 _SVE_INSN ("mov", 0x25004210, 0xfff0c210, sve_misc
, OP_MOVM_P_P_P
, OP3 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
), OP_SVE_BMB
, F_ALIAS
| F_MISC
, 0),
3196 _SVE_INSN ("mov", 0x05100000, 0xff308000, sve_cpy
, 0, OP3 (SVE_Zd
, SVE_Pg4_16
, SVE_ASIMM
), OP_SVE_VPU_BHSD
, F_ALIAS
, 0),
3197 _SVE_INSN ("movs", 0x25c04000, 0xfff0c210, sve_misc
, OP_MOVS_P_P
, OP2 (SVE_Pd
, SVE_Pn
), OP_SVE_BB
, F_ALIAS
| F_MISC
, 0),
3198 _SVE_INSN ("movs", 0x25404000, 0xfff0c210, sve_misc
, OP_MOVZS_P_P_P
, OP3 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
), OP_SVE_BZB
, F_ALIAS
| F_MISC
, 0),
3199 _SVE_INSN ("not", 0x25004200, 0xfff0c210, sve_misc
, OP_NOT_P_P_P_Z
, OP3 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
), OP_SVE_BZB
, F_ALIAS
| F_MISC
, 0),
3200 _SVE_INSN ("nots", 0x25404200, 0xfff0c210, sve_misc
, OP_NOTS_P_P_P_Z
, OP3 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
), OP_SVE_BZB
, F_ALIAS
| F_MISC
, 0),
3201 _SVE_INSN ("abs", 0x0416a000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_BHSD
, 0, 0),
3202 _SVE_INSN ("add", 0x04200000, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_BHSD
, 0, 0),
3203 _SVE_INSN ("add", 0x2520c000, 0xff3fc000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_AIMM
), OP_SVE_VVU_BHSD
, 0, 1),
3204 _SVE_INSN ("add", 0x04000000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3205 _SVE_INSN ("addpl", 0x04605000, 0xffe0f800, sve_misc
, 0, OP3 (Rd_SP
, SVE_Rn_SP
, SVE_SIMM6
), OP_SVE_XXU
, 0, 0),
3206 _SVE_INSN ("addvl", 0x04205000, 0xffe0f800, sve_misc
, 0, OP3 (Rd_SP
, SVE_Rn_SP
, SVE_SIMM6
), OP_SVE_XXU
, 0, 0),
3207 _SVE_INSN ("adr", 0x0420a000, 0xffe0f000, sve_misc
, 0, OP2 (SVE_Zd
, SVE_ADDR_ZZ_SXTW
), OP_SVE_DD
, 0, 0),
3208 _SVE_INSN ("adr", 0x0460a000, 0xffe0f000, sve_misc
, 0, OP2 (SVE_Zd
, SVE_ADDR_ZZ_UXTW
), OP_SVE_DD
, 0, 0),
3209 _SVE_INSN ("adr", 0x04a0a000, 0xffa0f000, sve_size_sd
, 0, OP2 (SVE_Zd
, SVE_ADDR_ZZ_LSL
), OP_SVE_VV_SD
, 0, 0),
3210 _SVE_INSN ("and", 0x04203000, 0xffe0fc00, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_DDD
, 0, 0),
3211 _SVE_INSN ("and", 0x05800000, 0xfffc0000, sve_limm
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_LIMM
), OP_SVE_VVU_BHSD
, F_HAS_ALIAS
, 1),
3212 _SVE_INSN ("and", 0x041a0000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3213 _SVE_INSN ("and", 0x25004000, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, F_HAS_ALIAS
, 0),
3214 _SVE_INSN ("ands", 0x25404000, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, F_HAS_ALIAS
, 0),
3215 _SVE_INSN ("andv", 0x041a2000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VUV_BHSD
, 0, 0),
3216 _SVE_INSN ("asr", 0x04208000, 0xff20fc00, sve_size_bhs
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVD_BHS
, 0, 0),
3217 _SVE_INSN ("asr", 0x04209000, 0xff20fc00, sve_shift_unpred
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_SHRIMM_UNPRED
), OP_SVE_VVU_BHSD
, 0, 0),
3218 _SVE_INSN ("asr", 0x04108000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3219 _SVE_INSN ("asr", 0x04188000, 0xff3fe000, sve_size_bhs
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVD_BHS
, 0, 2),
3220 _SVE_INSN ("asr", 0x04008000, 0xff3fe000, sve_shift_pred
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_SHRIMM_PRED
), OP_SVE_VMVU_BHSD
, 0, 2),
3221 _SVE_INSN ("asrd", 0x04048000, 0xff3fe000, sve_shift_pred
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_SHRIMM_PRED
), OP_SVE_VMVU_BHSD
, 0, 2),
3222 _SVE_INSN ("asrr", 0x04148000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3223 _SVE_INSN ("bic", 0x04e03000, 0xffe0fc00, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_DDD
, 0, 0),
3224 _SVE_INSN ("bic", 0x041b0000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3225 _SVE_INSN ("bic", 0x25004010, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, 0, 0),
3226 _SVE_INSN ("bics", 0x25404010, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, 0, 0),
3227 _SVE_INSN ("brka", 0x25104000, 0xffffc200, sve_pred_zm
, 0, OP3 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
), OP_SVE_BPB
, 0, 0),
3228 _SVE_INSN ("brkas", 0x25504000, 0xffffc210, sve_misc
, 0, OP3 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
), OP_SVE_BZB
, 0, 0),
3229 _SVE_INSN ("brkb", 0x25904000, 0xffffc200, sve_pred_zm
, 0, OP3 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
), OP_SVE_BPB
, 0, 0),
3230 _SVE_INSN ("brkbs", 0x25d04000, 0xffffc210, sve_misc
, 0, OP3 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
), OP_SVE_BZB
, 0, 0),
3231 _SVE_INSN ("brkn", 0x25184000, 0xffffc210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pd
), OP_SVE_BZBB
, 0, 3),
3232 _SVE_INSN ("brkns", 0x25584000, 0xffffc210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pd
), OP_SVE_BZBB
, 0, 3),
3233 _SVE_INSN ("brkpa", 0x2500c000, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, 0, 0),
3234 _SVE_INSN ("brkpas", 0x2540c000, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, 0, 0),
3235 _SVE_INSN ("brkpb", 0x2500c010, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, 0, 0),
3236 _SVE_INSN ("brkpbs", 0x2540c010, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, 0, 0),
3237 _SVE_INSN ("clasta", 0x05288000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VUVV_BHSD
, 0, 2),
3238 _SVE_INSN ("clasta", 0x052a8000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Vd
, SVE_Pg3
, SVE_Vd
, SVE_Zm_5
), OP_SVE_VUVV_BHSD
, 0, 2),
3239 _SVE_INSN ("clasta", 0x0530a000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (Rd
, SVE_Pg3
, Rd
, SVE_Zm_5
), OP_SVE_RURV_BHSD
, 0, 2),
3240 _SVE_INSN ("clastb", 0x05298000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VUVV_BHSD
, 0, 2),
3241 _SVE_INSN ("clastb", 0x052b8000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Vd
, SVE_Pg3
, SVE_Vd
, SVE_Zm_5
), OP_SVE_VUVV_BHSD
, 0, 2),
3242 _SVE_INSN ("clastb", 0x0531a000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (Rd
, SVE_Pg3
, Rd
, SVE_Zm_5
), OP_SVE_RURV_BHSD
, 0, 2),
3243 _SVE_INSN ("cls", 0x0418a000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_BHSD
, 0, 0),
3244 _SVE_INSN ("clz", 0x0419a000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_BHSD
, 0, 0),
3245 _SVE_INSN ("cmpeq", 0x24002000, 0xff20e010, sve_size_bhs
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVD_BHS
, 0, 0),
3246 _SVE_INSN ("cmpeq", 0x2400a000, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVV_BHSD
, 0, 0),
3247 _SVE_INSN ("cmpeq", 0x25008000, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SIMM5
), OP_SVE_VZVU_BHSD
, 0, 0),
3248 _SVE_INSN ("cmpge", 0x24004000, 0xff20e010, sve_size_bhs
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVD_BHS
, 0, 0),
3249 _SVE_INSN ("cmpge", 0x24008000, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVV_BHSD
, F_HAS_ALIAS
, 0),
3250 _SVE_INSN ("cmpge", 0x25000000, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SIMM5
), OP_SVE_VZVU_BHSD
, 0, 0),
3251 _SVE_INSN ("cmpgt", 0x24004010, 0xff20e010, sve_size_bhs
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVD_BHS
, 0, 0),
3252 _SVE_INSN ("cmpgt", 0x24008010, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVV_BHSD
, F_HAS_ALIAS
, 0),
3253 _SVE_INSN ("cmpgt", 0x25000010, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SIMM5
), OP_SVE_VZVU_BHSD
, 0, 0),
3254 _SVE_INSN ("cmphi", 0x24000010, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVV_BHSD
, F_HAS_ALIAS
, 0),
3255 _SVE_INSN ("cmphi", 0x2400c010, 0xff20e010, sve_size_bhs
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVD_BHS
, 0, 0),
3256 _SVE_INSN ("cmphi", 0x24200010, 0xff202010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_UIMM7
), OP_SVE_VZVU_BHSD
, 0, 0),
3257 _SVE_INSN ("cmphs", 0x24000000, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVV_BHSD
, F_HAS_ALIAS
, 0),
3258 _SVE_INSN ("cmphs", 0x2400c000, 0xff20e010, sve_size_bhs
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVD_BHS
, 0, 0),
3259 _SVE_INSN ("cmphs", 0x24200000, 0xff202010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_UIMM7
), OP_SVE_VZVU_BHSD
, 0, 0),
3260 _SVE_INSN ("cmple", 0x24006010, 0xff20e010, sve_size_bhs
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVD_BHS
, 0, 0),
3261 _SVE_INSN ("cmple", 0x25002010, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SIMM5
), OP_SVE_VZVU_BHSD
, 0, 0),
3262 _SVE_INSN ("cmplo", 0x2400e000, 0xff20e010, sve_size_bhs
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVD_BHS
, 0, 0),
3263 _SVE_INSN ("cmplo", 0x24202000, 0xff202010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_UIMM7
), OP_SVE_VZVU_BHSD
, 0, 0),
3264 _SVE_INSN ("cmpls", 0x2400e010, 0xff20e010, sve_size_bhs
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVD_BHS
, 0, 0),
3265 _SVE_INSN ("cmpls", 0x24202010, 0xff202010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_UIMM7
), OP_SVE_VZVU_BHSD
, 0, 0),
3266 _SVE_INSN ("cmplt", 0x24006000, 0xff20e010, sve_size_bhs
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVD_BHS
, 0, 0),
3267 _SVE_INSN ("cmplt", 0x25002000, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SIMM5
), OP_SVE_VZVU_BHSD
, 0, 0),
3268 _SVE_INSN ("cmpne", 0x24002010, 0xff20e010, sve_size_bhs
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVD_BHS
, 0, 0),
3269 _SVE_INSN ("cmpne", 0x2400a010, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVV_BHSD
, 0, 0),
3270 _SVE_INSN ("cmpne", 0x25008010, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SIMM5
), OP_SVE_VZVU_BHSD
, 0, 0),
3271 _SVE_INSN ("cnot", 0x041ba000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_BHSD
, 0, 0),
3272 _SVE_INSN ("cnt", 0x041aa000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_BHSD
, 0, 0),
3273 _SVE_INSN ("cntb", 0x0420e000, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3274 _SVE_INSN ("cntd", 0x04e0e000, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3275 _SVE_INSN ("cnth", 0x0460e000, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3276 _SVE_INSN ("cntp", 0x25208000, 0xff3fc200, sve_size_bhsd
, 0, OP3 (Rd
, SVE_Pg4_10
, SVE_Pn
), OP_SVE_XUV_BHSD
, 0, 0),
3277 _SVE_INSN ("cntw", 0x04a0e000, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3278 _SVE_INSN ("compact", 0x05a18000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VUV_SD
, 0, 0),
3279 _SVE_INSN ("cpy", 0x05208000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Vn
), OP_SVE_VMV_BHSD
, F_HAS_ALIAS
, 0),
3280 _SVE_INSN ("cpy", 0x0528a000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, Rn_SP
), OP_SVE_VMR_BHSD
, F_HAS_ALIAS
, 0),
3281 _SVE_INSN ("cpy", 0x05100000, 0xff308000, sve_cpy
, 0, OP3 (SVE_Zd
, SVE_Pg4_16
, SVE_ASIMM
), OP_SVE_VPU_BHSD
, F_HAS_ALIAS
, 0),
3282 _SVE_INSN ("ctermeq", 0x25a02000, 0xffa0fc1f, sve_size_sd
, 0, OP2 (Rn
, Rm
), OP_SVE_RR
, 0, 0),
3283 _SVE_INSN ("ctermne", 0x25a02010, 0xffa0fc1f, sve_size_sd
, 0, OP2 (Rn
, Rm
), OP_SVE_RR
, 0, 0),
3284 _SVE_INSN ("decb", 0x0430e400, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3285 _SVE_INSN ("decd", 0x04f0c400, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_DU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3286 _SVE_INSN ("decd", 0x04f0e400, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3287 _SVE_INSN ("dech", 0x0470c400, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_HU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3288 _SVE_INSN ("dech", 0x0470e400, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3289 _SVE_INSN ("decp", 0x252d8000, 0xff3ffe00, sve_size_hsd
, 0, OP2 (SVE_Zd
, SVE_Pg4_5
), OP_SVE_VU_HSD
, 0, 0),
3290 _SVE_INSN ("decp", 0x252d8800, 0xff3ffe00, sve_size_bhsd
, 0, OP2 (Rd
, SVE_Pg4_5
), OP_SVE_XV_BHSD
, 0, 0),
3291 _SVE_INSN ("decw", 0x04b0c400, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_SU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3292 _SVE_INSN ("decw", 0x04b0e400, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3293 _SVE_INSN ("dup", 0x05203800, 0xff3ffc00, sve_size_bhsd
, 0, OP2 (SVE_Zd
, Rn_SP
), OP_SVE_VR_BHSD
, F_HAS_ALIAS
, 0),
3294 _SVE_INSN ("dup", 0x05202000, 0xff20fc00, sve_index
, 0, OP2 (SVE_Zd
, SVE_Zn_INDEX
), OP_SVE_VV_BHSD
, F_HAS_ALIAS
, 0),
3295 _SVE_INSN ("dup", 0x2538c000, 0xff3fc000, sve_size_bhsd
, 0, OP2 (SVE_Zd
, SVE_ASIMM
), OP_SVE_VU_BHSD
, F_HAS_ALIAS
, 0),
3296 _SVE_INSN ("dupm", 0x05c00000, 0xfffc0000, sve_limm
, 0, OP2 (SVE_Zd
, SVE_LIMM
), OP_SVE_VU_BHSD
, F_HAS_ALIAS
, 0),
3297 _SVE_INSN ("eor", 0x04a03000, 0xffe0fc00, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_DDD
, 0, 0),
3298 _SVE_INSN ("eor", 0x05400000, 0xfffc0000, sve_limm
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_LIMM
), OP_SVE_VVU_BHSD
, F_HAS_ALIAS
, 1),
3299 _SVE_INSN ("eor", 0x04190000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3300 _SVE_INSN ("eor", 0x25004200, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, F_HAS_ALIAS
, 0),
3301 _SVE_INSN ("eors", 0x25404200, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, F_HAS_ALIAS
, 0),
3302 _SVE_INSN ("eorv", 0x04192000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VUV_BHSD
, 0, 0),
3303 _SVE_INSN ("ext", 0x05200000, 0xffe0e000, sve_misc
, 0, OP4 (SVE_Zd
, SVE_Zd
, SVE_Zm_5
, SVE_UIMM8_53
), OP_SVE_BBBU
, 0, 1),
3304 _SVE_INSN ("fabd", 0x65888000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3305 _SVE_INSN ("fabs", 0x049ca000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_SD
, 0, 0),
3306 _SVE_INSN ("facge", 0x6580c010, 0xffa0e010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVV_SD
, F_HAS_ALIAS
, 0),
3307 _SVE_INSN ("facgt", 0x6580e010, 0xffa0e010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVV_SD
, F_HAS_ALIAS
, 0),
3308 _SVE_INSN ("fadd", 0x65800000, 0xffa0fc00, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_SD
, 0, 0),
3309 _SVE_INSN ("fadd", 0x65808000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3310 _SVE_INSN ("fadd", 0x65988000, 0xffbfe3c0, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_I1_HALF_ONE
), OP_SVE_VMVU_SD
, 0, 2),
3311 _SVE_INSN ("fadda", 0x65982000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Vd
, SVE_Pg3
, SVE_Vd
, SVE_Zm_5
), OP_SVE_VUVV_SD
, 0, 2),
3312 _SVE_INSN ("faddv", 0x65802000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VUV_SD
, 0, 0),
3313 _SVE_INSN ("fcmeq", 0x65922000, 0xffbfe010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, FPIMM0
), OP_SVE_VZV_SD
, 0, 0),
3314 _SVE_INSN ("fcmeq", 0x65806000, 0xffa0e010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVV_SD
, 0, 0),
3315 _SVE_INSN ("fcmge", 0x65902000, 0xffbfe010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, FPIMM0
), OP_SVE_VZV_SD
, 0, 0),
3316 _SVE_INSN ("fcmge", 0x65804000, 0xffa0e010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVV_SD
, F_HAS_ALIAS
, 0),
3317 _SVE_INSN ("fcmgt", 0x65902010, 0xffbfe010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, FPIMM0
), OP_SVE_VZV_SD
, 0, 0),
3318 _SVE_INSN ("fcmgt", 0x65804010, 0xffa0e010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVV_SD
, F_HAS_ALIAS
, 0),
3319 _SVE_INSN ("fcmle", 0x65912010, 0xffbfe010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, FPIMM0
), OP_SVE_VZV_SD
, 0, 0),
3320 _SVE_INSN ("fcmlt", 0x65912000, 0xffbfe010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, FPIMM0
), OP_SVE_VZV_SD
, 0, 0),
3321 _SVE_INSN ("fcmne", 0x65932000, 0xffbfe010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, FPIMM0
), OP_SVE_VZV_SD
, 0, 0),
3322 _SVE_INSN ("fcmne", 0x65806010, 0xffa0e010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVV_SD
, 0, 0),
3323 _SVE_INSN ("fcmuo", 0x6580c000, 0xffa0e010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VZVV_SD
, 0, 0),
3324 _SVE_INSN ("fcpy", 0x0590c000, 0xffb0e000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg4_16
, SVE_FPIMM8
), OP_SVE_VMU_SD
, F_HAS_ALIAS
, 0),
3325 _SVE_INSN ("fcvt", 0x6588a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_HMS
, 0, 0),
3326 _SVE_INSN ("fcvt", 0x6589a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_SMH
, 0, 0),
3327 _SVE_INSN ("fcvt", 0x65c8a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_HMD
, 0, 0),
3328 _SVE_INSN ("fcvt", 0x65c9a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_DMH
, 0, 0),
3329 _SVE_INSN ("fcvt", 0x65caa000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_SMD
, 0, 0),
3330 _SVE_INSN ("fcvt", 0x65cba000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_DMS
, 0, 0),
3331 _SVE_INSN ("fcvtzs", 0x659ca000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_SMS
, 0, 0),
3332 _SVE_INSN ("fcvtzs", 0x65d8a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_SMD
, 0, 0),
3333 _SVE_INSN ("fcvtzs", 0x65dca000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_DMS
, 0, 0),
3334 _SVE_INSN ("fcvtzs", 0x65dea000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_DMD
, 0, 0),
3335 _SVE_INSN ("fcvtzu", 0x659da000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_SMS
, 0, 0),
3336 _SVE_INSN ("fcvtzu", 0x65d9a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_SMD
, 0, 0),
3337 _SVE_INSN ("fcvtzu", 0x65dda000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_DMS
, 0, 0),
3338 _SVE_INSN ("fcvtzu", 0x65dfa000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_DMD
, 0, 0),
3339 _SVE_INSN ("fdiv", 0x658d8000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3340 _SVE_INSN ("fdivr", 0x658c8000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3341 _SVE_INSN ("fdup", 0x25b9c000, 0xffbfe000, sve_size_sd
, 0, OP2 (SVE_Zd
, SVE_FPIMM8
), OP_SVE_VU_SD
, F_HAS_ALIAS
, 0),
3342 _SVE_INSN ("fexpa", 0x04a0b800, 0xffbffc00, sve_size_sd
, 0, OP2 (SVE_Zd
, SVE_Zn
), OP_SVE_VV_SD
, 0, 0),
3343 _SVE_INSN ("fmad", 0x65a08000, 0xffa0e000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zm_5
, SVE_Za_16
), OP_SVE_VMVV_SD
, 0, 0),
3344 _SVE_INSN ("fmax", 0x65868000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3345 _SVE_INSN ("fmax", 0x659e8000, 0xffbfe3c0, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_I1_ZERO_ONE
), OP_SVE_VMVU_SD
, 0, 2),
3346 _SVE_INSN ("fmaxnm", 0x65848000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3347 _SVE_INSN ("fmaxnm", 0x659c8000, 0xffbfe3c0, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_I1_ZERO_ONE
), OP_SVE_VMVU_SD
, 0, 2),
3348 _SVE_INSN ("fmaxnmv", 0x65842000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VUV_SD
, 0, 0),
3349 _SVE_INSN ("fmaxv", 0x65862000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VUV_SD
, 0, 0),
3350 _SVE_INSN ("fmin", 0x65878000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3351 _SVE_INSN ("fmin", 0x659f8000, 0xffbfe3c0, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_I1_ZERO_ONE
), OP_SVE_VMVU_SD
, 0, 2),
3352 _SVE_INSN ("fminnm", 0x65858000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3353 _SVE_INSN ("fminnm", 0x659d8000, 0xffbfe3c0, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_I1_ZERO_ONE
), OP_SVE_VMVU_SD
, 0, 2),
3354 _SVE_INSN ("fminnmv", 0x65852000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VUV_SD
, 0, 0),
3355 _SVE_INSN ("fminv", 0x65872000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VUV_SD
, 0, 0),
3356 _SVE_INSN ("fmla", 0x65a00000, 0xffa0e000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VMVV_SD
, 0, 0),
3357 _SVE_INSN ("fmls", 0x65a02000, 0xffa0e000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VMVV_SD
, 0, 0),
3358 _SVE_INSN ("fmsb", 0x65a0a000, 0xffa0e000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zm_5
, SVE_Za_16
), OP_SVE_VMVV_SD
, 0, 0),
3359 _SVE_INSN ("fmul", 0x65800800, 0xffa0fc00, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_SD
, 0, 0),
3360 _SVE_INSN ("fmul", 0x65828000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3361 _SVE_INSN ("fmul", 0x659a8000, 0xffbfe3c0, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_I1_HALF_TWO
), OP_SVE_VMVU_SD
, 0, 2),
3362 _SVE_INSN ("fmulx", 0x658a8000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3363 _SVE_INSN ("fneg", 0x049da000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_SD
, 0, 0),
3364 _SVE_INSN ("fnmad", 0x65a0c000, 0xffa0e000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zm_5
, SVE_Za_16
), OP_SVE_VMVV_SD
, 0, 0),
3365 _SVE_INSN ("fnmla", 0x65a04000, 0xffa0e000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VMVV_SD
, 0, 0),
3366 _SVE_INSN ("fnmls", 0x65a06000, 0xffa0e000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VMVV_SD
, 0, 0),
3367 _SVE_INSN ("fnmsb", 0x65a0e000, 0xffa0e000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zm_5
, SVE_Za_16
), OP_SVE_VMVV_SD
, 0, 0),
3368 _SVE_INSN ("frecpe", 0x658e3000, 0xffbffc00, sve_size_sd
, 0, OP2 (SVE_Zd
, SVE_Zn
), OP_SVE_VV_SD
, 0, 0),
3369 _SVE_INSN ("frecps", 0x65801800, 0xffa0fc00, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_SD
, 0, 0),
3370 _SVE_INSN ("frecpx", 0x658ca000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_SD
, 0, 0),
3371 _SVE_INSN ("frinta", 0x6584a000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_SD
, 0, 0),
3372 _SVE_INSN ("frinti", 0x6587a000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_SD
, 0, 0),
3373 _SVE_INSN ("frintm", 0x6582a000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_SD
, 0, 0),
3374 _SVE_INSN ("frintn", 0x6580a000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_SD
, 0, 0),
3375 _SVE_INSN ("frintp", 0x6581a000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_SD
, 0, 0),
3376 _SVE_INSN ("frintx", 0x6586a000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_SD
, 0, 0),
3377 _SVE_INSN ("frintz", 0x6583a000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_SD
, 0, 0),
3378 _SVE_INSN ("frsqrte", 0x658f3000, 0xffbffc00, sve_size_sd
, 0, OP2 (SVE_Zd
, SVE_Zn
), OP_SVE_VV_SD
, 0, 0),
3379 _SVE_INSN ("frsqrts", 0x65801c00, 0xffa0fc00, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_SD
, 0, 0),
3380 _SVE_INSN ("fscale", 0x65898000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3381 _SVE_INSN ("fsqrt", 0x658da000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_SD
, 0, 0),
3382 _SVE_INSN ("fsub", 0x65800400, 0xffa0fc00, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_SD
, 0, 0),
3383 _SVE_INSN ("fsub", 0x65818000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3384 _SVE_INSN ("fsub", 0x65998000, 0xffbfe3c0, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_I1_HALF_ONE
), OP_SVE_VMVU_SD
, 0, 2),
3385 _SVE_INSN ("fsubr", 0x65838000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3386 _SVE_INSN ("fsubr", 0x659b8000, 0xffbfe3c0, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_I1_HALF_ONE
), OP_SVE_VMVU_SD
, 0, 2),
3387 _SVE_INSN ("ftmad", 0x65908000, 0xffb8fc00, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Zd
, SVE_Zm_5
, SVE_UIMM3
), OP_SVE_VVVU_SD
, 0, 1),
3388 _SVE_INSN ("ftsmul", 0x65800c00, 0xffa0fc00, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_SD
, 0, 0),
3389 _SVE_INSN ("ftssel", 0x04a0b000, 0xffa0fc00, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_SD
, 0, 0),
3390 _SVE_INSN ("incb", 0x0430e000, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3391 _SVE_INSN ("incd", 0x04f0c000, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_DU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3392 _SVE_INSN ("incd", 0x04f0e000, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3393 _SVE_INSN ("inch", 0x0470c000, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_HU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3394 _SVE_INSN ("inch", 0x0470e000, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3395 _SVE_INSN ("incp", 0x252c8000, 0xff3ffe00, sve_size_hsd
, 0, OP2 (SVE_Zd
, SVE_Pg4_5
), OP_SVE_VU_HSD
, 0, 0),
3396 _SVE_INSN ("incp", 0x252c8800, 0xff3ffe00, sve_size_bhsd
, 0, OP2 (Rd
, SVE_Pg4_5
), OP_SVE_XV_BHSD
, 0, 0),
3397 _SVE_INSN ("incw", 0x04b0c000, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_SU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3398 _SVE_INSN ("incw", 0x04b0e000, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3399 _SVE_INSN ("index", 0x04204c00, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, Rn
, Rm
), OP_SVE_VRR_BHSD
, 0, 0),
3400 _SVE_INSN ("index", 0x04204000, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_SIMM5
, SVE_SIMM5B
), OP_SVE_VUU_BHSD
, 0, 0),
3401 _SVE_INSN ("index", 0x04204400, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, Rn
, SIMM5
), OP_SVE_VRU_BHSD
, 0, 0),
3402 _SVE_INSN ("index", 0x04204800, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_SIMM5
, Rm
), OP_SVE_VUR_BHSD
, 0, 0),
3403 _SVE_INSN ("insr", 0x05243800, 0xff3ffc00, sve_size_bhsd
, 0, OP2 (SVE_Zd
, SVE_Rm
), OP_SVE_VR_BHSD
, 0, 0),
3404 _SVE_INSN ("insr", 0x05343800, 0xff3ffc00, sve_size_bhsd
, 0, OP2 (SVE_Zd
, SVE_Vm
), OP_SVE_VV_BHSD
, 0, 0),
3405 _SVE_INSN ("lasta", 0x0520a000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (Rd
, SVE_Pg3
, SVE_Zn
), OP_SVE_RUV_BHSD
, 0, 0),
3406 _SVE_INSN ("lasta", 0x05228000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VUV_BHSD
, 0, 0),
3407 _SVE_INSN ("lastb", 0x0521a000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (Rd
, SVE_Pg3
, SVE_Zn
), OP_SVE_RUV_BHSD
, 0, 0),
3408 _SVE_INSN ("lastb", 0x05238000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VUV_BHSD
, 0, 0),
3409 _SVE_INSN ("ld1b", 0x84004000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_SZS
, F_OD(1), 0),
3410 _SVE_INSN ("ld1b", 0xa4004000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_BZU
, F_OD(1), 0),
3411 _SVE_INSN ("ld1b", 0xa4204000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_HZU
, F_OD(1), 0),
3412 _SVE_INSN ("ld1b", 0xa4404000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_SZU
, F_OD(1), 0),
3413 _SVE_INSN ("ld1b", 0xa4604000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_DZU
, F_OD(1), 0),
3414 _SVE_INSN ("ld1b", 0xc4004000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_DZD
, F_OD(1), 0),
3415 _SVE_INSN ("ld1b", 0xc440c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DZD
, F_OD(1), 0),
3416 _SVE_INSN ("ld1b", 0x8420c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5
), OP_SVE_SZS
, F_OD(1), 0),
3417 _SVE_INSN ("ld1b", 0xa400a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_BZU
, F_OD(1), 0),
3418 _SVE_INSN ("ld1b", 0xa420a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_HZU
, F_OD(1), 0),
3419 _SVE_INSN ("ld1b", 0xa440a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_SZU
, F_OD(1), 0),
3420 _SVE_INSN ("ld1b", 0xa460a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DZU
, F_OD(1), 0),
3421 _SVE_INSN ("ld1b", 0xc420c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5
), OP_SVE_DZD
, F_OD(1), 0),
3422 _SVE_INSN ("ld1d", 0xa5e04000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL3
), OP_SVE_DZU
, F_OD(1), 0),
3423 _SVE_INSN ("ld1d", 0xc5804000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_DZD
, F_OD(1), 0),
3424 _SVE_INSN ("ld1d", 0xc5a04000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW3_22
), OP_SVE_DZD
, F_OD(1), 0),
3425 _SVE_INSN ("ld1d", 0xc5c0c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DZD
, F_OD(1), 0),
3426 _SVE_INSN ("ld1d", 0xc5e0c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_LSL3
), OP_SVE_DZD
, F_OD(1), 0),
3427 _SVE_INSN ("ld1d", 0xa5e0a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DZU
, F_OD(1), 0),
3428 _SVE_INSN ("ld1d", 0xc5a0c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x8
), OP_SVE_DZD
, F_OD(1), 0),
3429 _SVE_INSN ("ld1h", 0x84804000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_SZS
, F_OD(1), 0),
3430 _SVE_INSN ("ld1h", 0x84a04000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW1_22
), OP_SVE_SZS
, F_OD(1), 0),
3431 _SVE_INSN ("ld1h", 0xa4a04000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_HZU
, F_OD(1), 0),
3432 _SVE_INSN ("ld1h", 0xa4c04000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_SZU
, F_OD(1), 0),
3433 _SVE_INSN ("ld1h", 0xa4e04000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_DZU
, F_OD(1), 0),
3434 _SVE_INSN ("ld1h", 0xc4804000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_DZD
, F_OD(1), 0),
3435 _SVE_INSN ("ld1h", 0xc4a04000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW1_22
), OP_SVE_DZD
, F_OD(1), 0),
3436 _SVE_INSN ("ld1h", 0xc4c0c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DZD
, F_OD(1), 0),
3437 _SVE_INSN ("ld1h", 0xc4e0c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_LSL1
), OP_SVE_DZD
, F_OD(1), 0),
3438 _SVE_INSN ("ld1h", 0x84a0c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x2
), OP_SVE_SZS
, F_OD(1), 0),
3439 _SVE_INSN ("ld1h", 0xa4a0a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_HZU
, F_OD(1), 0),
3440 _SVE_INSN ("ld1h", 0xa4c0a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_SZU
, F_OD(1), 0),
3441 _SVE_INSN ("ld1h", 0xa4e0a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DZU
, F_OD(1), 0),
3442 _SVE_INSN ("ld1h", 0xc4a0c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x2
), OP_SVE_DZD
, F_OD(1), 0),
3443 _SVE_INSN ("ld1rb", 0x84408000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6
), OP_SVE_BZU
, F_OD(1), 0),
3444 _SVE_INSN ("ld1rb", 0x8440a000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6
), OP_SVE_HZU
, F_OD(1), 0),
3445 _SVE_INSN ("ld1rb", 0x8440c000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6
), OP_SVE_SZU
, F_OD(1), 0),
3446 _SVE_INSN ("ld1rb", 0x8440e000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6
), OP_SVE_DZU
, F_OD(1), 0),
3447 _SVE_INSN ("ld1rd", 0x85c0e000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6x8
), OP_SVE_DZU
, F_OD(1), 0),
3448 _SVE_INSN ("ld1rh", 0x84c0a000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6x2
), OP_SVE_HZU
, F_OD(1), 0),
3449 _SVE_INSN ("ld1rh", 0x84c0c000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6x2
), OP_SVE_SZU
, F_OD(1), 0),
3450 _SVE_INSN ("ld1rh", 0x84c0e000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6x2
), OP_SVE_DZU
, F_OD(1), 0),
3451 _SVE_INSN ("ld1rsb", 0x85c08000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6
), OP_SVE_DZU
, F_OD(1), 0),
3452 _SVE_INSN ("ld1rsb", 0x85c0a000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6
), OP_SVE_SZU
, F_OD(1), 0),
3453 _SVE_INSN ("ld1rsb", 0x85c0c000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6
), OP_SVE_HZU
, F_OD(1), 0),
3454 _SVE_INSN ("ld1rsh", 0x85408000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6x2
), OP_SVE_DZU
, F_OD(1), 0),
3455 _SVE_INSN ("ld1rsh", 0x8540a000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6x2
), OP_SVE_SZU
, F_OD(1), 0),
3456 _SVE_INSN ("ld1rsw", 0x84c08000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6x4
), OP_SVE_DZU
, F_OD(1), 0),
3457 _SVE_INSN ("ld1rw", 0x8540c000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6x4
), OP_SVE_SZU
, F_OD(1), 0),
3458 _SVE_INSN ("ld1rw", 0x8540e000, 0xffc0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_U6x4
), OP_SVE_DZU
, F_OD(1), 0),
3459 _SVE_INSN ("ld1sb", 0x84000000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_SZS
, F_OD(1), 0),
3460 _SVE_INSN ("ld1sb", 0xa5804000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_DZU
, F_OD(1), 0),
3461 _SVE_INSN ("ld1sb", 0xa5a04000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_SZU
, F_OD(1), 0),
3462 _SVE_INSN ("ld1sb", 0xa5c04000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_HZU
, F_OD(1), 0),
3463 _SVE_INSN ("ld1sb", 0xc4000000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_DZD
, F_OD(1), 0),
3464 _SVE_INSN ("ld1sb", 0xc4408000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DZD
, F_OD(1), 0),
3465 _SVE_INSN ("ld1sb", 0x84208000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5
), OP_SVE_SZS
, F_OD(1), 0),
3466 _SVE_INSN ("ld1sb", 0xa580a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DZU
, F_OD(1), 0),
3467 _SVE_INSN ("ld1sb", 0xa5a0a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_SZU
, F_OD(1), 0),
3468 _SVE_INSN ("ld1sb", 0xa5c0a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_HZU
, F_OD(1), 0),
3469 _SVE_INSN ("ld1sb", 0xc4208000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5
), OP_SVE_DZD
, F_OD(1), 0),
3470 _SVE_INSN ("ld1sh", 0x84800000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_SZS
, F_OD(1), 0),
3471 _SVE_INSN ("ld1sh", 0x84a00000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW1_22
), OP_SVE_SZS
, F_OD(1), 0),
3472 _SVE_INSN ("ld1sh", 0xa5004000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_DZU
, F_OD(1), 0),
3473 _SVE_INSN ("ld1sh", 0xa5204000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_SZU
, F_OD(1), 0),
3474 _SVE_INSN ("ld1sh", 0xc4800000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_DZD
, F_OD(1), 0),
3475 _SVE_INSN ("ld1sh", 0xc4a00000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW1_22
), OP_SVE_DZD
, F_OD(1), 0),
3476 _SVE_INSN ("ld1sh", 0xc4c08000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DZD
, F_OD(1), 0),
3477 _SVE_INSN ("ld1sh", 0xc4e08000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_LSL1
), OP_SVE_DZD
, F_OD(1), 0),
3478 _SVE_INSN ("ld1sh", 0x84a08000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x2
), OP_SVE_SZS
, F_OD(1), 0),
3479 _SVE_INSN ("ld1sh", 0xa500a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DZU
, F_OD(1), 0),
3480 _SVE_INSN ("ld1sh", 0xa520a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_SZU
, F_OD(1), 0),
3481 _SVE_INSN ("ld1sh", 0xc4a08000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x2
), OP_SVE_DZD
, F_OD(1), 0),
3482 _SVE_INSN ("ld1sw", 0xa4804000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL2
), OP_SVE_DZU
, F_OD(1), 0),
3483 _SVE_INSN ("ld1sw", 0xc5000000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_DZD
, F_OD(1), 0),
3484 _SVE_INSN ("ld1sw", 0xc5200000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW2_22
), OP_SVE_DZD
, F_OD(1), 0),
3485 _SVE_INSN ("ld1sw", 0xc5408000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DZD
, F_OD(1), 0),
3486 _SVE_INSN ("ld1sw", 0xc5608000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_LSL2
), OP_SVE_DZD
, F_OD(1), 0),
3487 _SVE_INSN ("ld1sw", 0xa480a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DZU
, F_OD(1), 0),
3488 _SVE_INSN ("ld1sw", 0xc5208000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x4
), OP_SVE_DZD
, F_OD(1), 0),
3489 _SVE_INSN ("ld1w", 0x85004000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_SZS
, F_OD(1), 0),
3490 _SVE_INSN ("ld1w", 0x85204000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW2_22
), OP_SVE_SZS
, F_OD(1), 0),
3491 _SVE_INSN ("ld1w", 0xa5404000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL2
), OP_SVE_SZU
, F_OD(1), 0),
3492 _SVE_INSN ("ld1w", 0xa5604000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL2
), OP_SVE_DZU
, F_OD(1), 0),
3493 _SVE_INSN ("ld1w", 0xc5004000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_DZD
, F_OD(1), 0),
3494 _SVE_INSN ("ld1w", 0xc5204000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW2_22
), OP_SVE_DZD
, F_OD(1), 0),
3495 _SVE_INSN ("ld1w", 0xc540c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DZD
, F_OD(1), 0),
3496 _SVE_INSN ("ld1w", 0xc560c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_LSL2
), OP_SVE_DZD
, F_OD(1), 0),
3497 _SVE_INSN ("ld1w", 0x8520c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x4
), OP_SVE_SZS
, F_OD(1), 0),
3498 _SVE_INSN ("ld1w", 0xa540a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_SZU
, F_OD(1), 0),
3499 _SVE_INSN ("ld1w", 0xa560a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DZU
, F_OD(1), 0),
3500 _SVE_INSN ("ld1w", 0xc520c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x4
), OP_SVE_DZD
, F_OD(1), 0),
3501 _SVE_INSN ("ld2b", 0xa420c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_BZU
, F_OD(2), 0),
3502 _SVE_INSN ("ld2b", 0xa420e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x2xVL
), OP_SVE_BZU
, F_OD(2), 0),
3503 _SVE_INSN ("ld2d", 0xa5a0c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL3
), OP_SVE_DZU
, F_OD(2), 0),
3504 _SVE_INSN ("ld2d", 0xa5a0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x2xVL
), OP_SVE_DZU
, F_OD(2), 0),
3505 _SVE_INSN ("ld2h", 0xa4a0c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_HZU
, F_OD(2), 0),
3506 _SVE_INSN ("ld2h", 0xa4a0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x2xVL
), OP_SVE_HZU
, F_OD(2), 0),
3507 _SVE_INSN ("ld2w", 0xa520c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL2
), OP_SVE_SZU
, F_OD(2), 0),
3508 _SVE_INSN ("ld2w", 0xa520e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x2xVL
), OP_SVE_SZU
, F_OD(2), 0),
3509 _SVE_INSN ("ld3b", 0xa440c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_BZU
, F_OD(3), 0),
3510 _SVE_INSN ("ld3b", 0xa440e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x3xVL
), OP_SVE_BZU
, F_OD(3), 0),
3511 _SVE_INSN ("ld3d", 0xa5c0c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL3
), OP_SVE_DZU
, F_OD(3), 0),
3512 _SVE_INSN ("ld3d", 0xa5c0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x3xVL
), OP_SVE_DZU
, F_OD(3), 0),
3513 _SVE_INSN ("ld3h", 0xa4c0c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_HZU
, F_OD(3), 0),
3514 _SVE_INSN ("ld3h", 0xa4c0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x3xVL
), OP_SVE_HZU
, F_OD(3), 0),
3515 _SVE_INSN ("ld3w", 0xa540c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL2
), OP_SVE_SZU
, F_OD(3), 0),
3516 _SVE_INSN ("ld3w", 0xa540e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x3xVL
), OP_SVE_SZU
, F_OD(3), 0),
3517 _SVE_INSN ("ld4b", 0xa460c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_BZU
, F_OD(4), 0),
3518 _SVE_INSN ("ld4b", 0xa460e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x4xVL
), OP_SVE_BZU
, F_OD(4), 0),
3519 _SVE_INSN ("ld4d", 0xa5e0c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL3
), OP_SVE_DZU
, F_OD(4), 0),
3520 _SVE_INSN ("ld4d", 0xa5e0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x4xVL
), OP_SVE_DZU
, F_OD(4), 0),
3521 _SVE_INSN ("ld4h", 0xa4e0c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_HZU
, F_OD(4), 0),
3522 _SVE_INSN ("ld4h", 0xa4e0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x4xVL
), OP_SVE_HZU
, F_OD(4), 0),
3523 _SVE_INSN ("ld4w", 0xa560c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL2
), OP_SVE_SZU
, F_OD(4), 0),
3524 _SVE_INSN ("ld4w", 0xa560e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x4xVL
), OP_SVE_SZU
, F_OD(4), 0),
3525 _SVE_INSN ("ldff1b", 0x84006000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_SZS
, F_OD(1), 0),
3526 _SVE_INSN ("ldff1b", 0xa4006000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR
), OP_SVE_BZU
, F_OD(1), 0),
3527 _SVE_INSN ("ldff1b", 0xa4206000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR
), OP_SVE_HZU
, F_OD(1), 0),
3528 _SVE_INSN ("ldff1b", 0xa4406000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR
), OP_SVE_SZU
, F_OD(1), 0),
3529 _SVE_INSN ("ldff1b", 0xa4606000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR
), OP_SVE_DZU
, F_OD(1), 0),
3530 _SVE_INSN ("ldff1b", 0xc4006000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_DZD
, F_OD(1), 0),
3531 _SVE_INSN ("ldff1b", 0xc440e000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DZD
, F_OD(1), 0),
3532 _SVE_INSN ("ldff1b", 0x8420e000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5
), OP_SVE_SZS
, F_OD(1), 0),
3533 _SVE_INSN ("ldff1b", 0xc420e000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5
), OP_SVE_DZD
, F_OD(1), 0),
3534 _SVE_INSN ("ldff1d", 0xa5e06000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR_LSL3
), OP_SVE_DZU
, F_OD(1), 0),
3535 _SVE_INSN ("ldff1d", 0xc5806000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_DZD
, F_OD(1), 0),
3536 _SVE_INSN ("ldff1d", 0xc5a06000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW3_22
), OP_SVE_DZD
, F_OD(1), 0),
3537 _SVE_INSN ("ldff1d", 0xc5c0e000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DZD
, F_OD(1), 0),
3538 _SVE_INSN ("ldff1d", 0xc5e0e000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_LSL3
), OP_SVE_DZD
, F_OD(1), 0),
3539 _SVE_INSN ("ldff1d", 0xc5a0e000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x8
), OP_SVE_DZD
, F_OD(1), 0),
3540 _SVE_INSN ("ldff1h", 0x84806000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_SZS
, F_OD(1), 0),
3541 _SVE_INSN ("ldff1h", 0x84a06000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW1_22
), OP_SVE_SZS
, F_OD(1), 0),
3542 _SVE_INSN ("ldff1h", 0xa4a06000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR_LSL1
), OP_SVE_HZU
, F_OD(1), 0),
3543 _SVE_INSN ("ldff1h", 0xa4c06000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR_LSL1
), OP_SVE_SZU
, F_OD(1), 0),
3544 _SVE_INSN ("ldff1h", 0xa4e06000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR_LSL1
), OP_SVE_DZU
, F_OD(1), 0),
3545 _SVE_INSN ("ldff1h", 0xc4806000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_DZD
, F_OD(1), 0),
3546 _SVE_INSN ("ldff1h", 0xc4a06000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW1_22
), OP_SVE_DZD
, F_OD(1), 0),
3547 _SVE_INSN ("ldff1h", 0xc4c0e000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DZD
, F_OD(1), 0),
3548 _SVE_INSN ("ldff1h", 0xc4e0e000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_LSL1
), OP_SVE_DZD
, F_OD(1), 0),
3549 _SVE_INSN ("ldff1h", 0x84a0e000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x2
), OP_SVE_SZS
, F_OD(1), 0),
3550 _SVE_INSN ("ldff1h", 0xc4a0e000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x2
), OP_SVE_DZD
, F_OD(1), 0),
3551 _SVE_INSN ("ldff1sb", 0x84002000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_SZS
, F_OD(1), 0),
3552 _SVE_INSN ("ldff1sb", 0xa5806000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR
), OP_SVE_DZU
, F_OD(1), 0),
3553 _SVE_INSN ("ldff1sb", 0xa5a06000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR
), OP_SVE_SZU
, F_OD(1), 0),
3554 _SVE_INSN ("ldff1sb", 0xa5c06000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR
), OP_SVE_HZU
, F_OD(1), 0),
3555 _SVE_INSN ("ldff1sb", 0xc4002000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_DZD
, F_OD(1), 0),
3556 _SVE_INSN ("ldff1sb", 0xc440a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DZD
, F_OD(1), 0),
3557 _SVE_INSN ("ldff1sb", 0x8420a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5
), OP_SVE_SZS
, F_OD(1), 0),
3558 _SVE_INSN ("ldff1sb", 0xc420a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5
), OP_SVE_DZD
, F_OD(1), 0),
3559 _SVE_INSN ("ldff1sh", 0x84802000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_SZS
, F_OD(1), 0),
3560 _SVE_INSN ("ldff1sh", 0x84a02000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW1_22
), OP_SVE_SZS
, F_OD(1), 0),
3561 _SVE_INSN ("ldff1sh", 0xa5006000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR_LSL1
), OP_SVE_DZU
, F_OD(1), 0),
3562 _SVE_INSN ("ldff1sh", 0xa5206000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR_LSL1
), OP_SVE_SZU
, F_OD(1), 0),
3563 _SVE_INSN ("ldff1sh", 0xc4802000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_DZD
, F_OD(1), 0),
3564 _SVE_INSN ("ldff1sh", 0xc4a02000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW1_22
), OP_SVE_DZD
, F_OD(1), 0),
3565 _SVE_INSN ("ldff1sh", 0xc4c0a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DZD
, F_OD(1), 0),
3566 _SVE_INSN ("ldff1sh", 0xc4e0a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_LSL1
), OP_SVE_DZD
, F_OD(1), 0),
3567 _SVE_INSN ("ldff1sh", 0x84a0a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x2
), OP_SVE_SZS
, F_OD(1), 0),
3568 _SVE_INSN ("ldff1sh", 0xc4a0a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x2
), OP_SVE_DZD
, F_OD(1), 0),
3569 _SVE_INSN ("ldff1sw", 0xa4806000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR_LSL2
), OP_SVE_DZU
, F_OD(1), 0),
3570 _SVE_INSN ("ldff1sw", 0xc5002000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_DZD
, F_OD(1), 0),
3571 _SVE_INSN ("ldff1sw", 0xc5202000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW2_22
), OP_SVE_DZD
, F_OD(1), 0),
3572 _SVE_INSN ("ldff1sw", 0xc540a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DZD
, F_OD(1), 0),
3573 _SVE_INSN ("ldff1sw", 0xc560a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_LSL2
), OP_SVE_DZD
, F_OD(1), 0),
3574 _SVE_INSN ("ldff1sw", 0xc520a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x4
), OP_SVE_DZD
, F_OD(1), 0),
3575 _SVE_INSN ("ldff1w", 0x85006000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_SZS
, F_OD(1), 0),
3576 _SVE_INSN ("ldff1w", 0x85206000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW2_22
), OP_SVE_SZS
, F_OD(1), 0),
3577 _SVE_INSN ("ldff1w", 0xa5406000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR_LSL2
), OP_SVE_SZU
, F_OD(1), 0),
3578 _SVE_INSN ("ldff1w", 0xa5606000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RR_LSL2
), OP_SVE_DZU
, F_OD(1), 0),
3579 _SVE_INSN ("ldff1w", 0xc5006000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_DZD
, F_OD(1), 0),
3580 _SVE_INSN ("ldff1w", 0xc5206000, 0xffa0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW2_22
), OP_SVE_DZD
, F_OD(1), 0),
3581 _SVE_INSN ("ldff1w", 0xc540e000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DZD
, F_OD(1), 0),
3582 _SVE_INSN ("ldff1w", 0xc560e000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_LSL2
), OP_SVE_DZD
, F_OD(1), 0),
3583 _SVE_INSN ("ldff1w", 0x8520e000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x4
), OP_SVE_SZS
, F_OD(1), 0),
3584 _SVE_INSN ("ldff1w", 0xc520e000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x4
), OP_SVE_DZD
, F_OD(1), 0),
3585 _SVE_INSN ("ldnf1b", 0xa410a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_BZU
, F_OD(1), 0),
3586 _SVE_INSN ("ldnf1b", 0xa430a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_HZU
, F_OD(1), 0),
3587 _SVE_INSN ("ldnf1b", 0xa450a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_SZU
, F_OD(1), 0),
3588 _SVE_INSN ("ldnf1b", 0xa470a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DZU
, F_OD(1), 0),
3589 _SVE_INSN ("ldnf1d", 0xa5f0a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DZU
, F_OD(1), 0),
3590 _SVE_INSN ("ldnf1h", 0xa4b0a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_HZU
, F_OD(1), 0),
3591 _SVE_INSN ("ldnf1h", 0xa4d0a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_SZU
, F_OD(1), 0),
3592 _SVE_INSN ("ldnf1h", 0xa4f0a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DZU
, F_OD(1), 0),
3593 _SVE_INSN ("ldnf1sb", 0xa590a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DZU
, F_OD(1), 0),
3594 _SVE_INSN ("ldnf1sb", 0xa5b0a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_SZU
, F_OD(1), 0),
3595 _SVE_INSN ("ldnf1sb", 0xa5d0a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_HZU
, F_OD(1), 0),
3596 _SVE_INSN ("ldnf1sh", 0xa510a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DZU
, F_OD(1), 0),
3597 _SVE_INSN ("ldnf1sh", 0xa530a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_SZU
, F_OD(1), 0),
3598 _SVE_INSN ("ldnf1sw", 0xa490a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DZU
, F_OD(1), 0),
3599 _SVE_INSN ("ldnf1w", 0xa550a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_SZU
, F_OD(1), 0),
3600 _SVE_INSN ("ldnf1w", 0xa570a000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DZU
, F_OD(1), 0),
3601 _SVE_INSN ("ldnt1b", 0xa400c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_BZU
, F_OD(1), 0),
3602 _SVE_INSN ("ldnt1b", 0xa400e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_BZU
, F_OD(1), 0),
3603 _SVE_INSN ("ldnt1d", 0xa580c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL3
), OP_SVE_DZU
, F_OD(1), 0),
3604 _SVE_INSN ("ldnt1d", 0xa580e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DZU
, F_OD(1), 0),
3605 _SVE_INSN ("ldnt1h", 0xa480c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_HZU
, F_OD(1), 0),
3606 _SVE_INSN ("ldnt1h", 0xa480e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_HZU
, F_OD(1), 0),
3607 _SVE_INSN ("ldnt1w", 0xa500c000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL2
), OP_SVE_SZU
, F_OD(1), 0),
3608 _SVE_INSN ("ldnt1w", 0xa500e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_SZU
, F_OD(1), 0),
3609 _SVE_INSN ("ldr", 0x85800000, 0xffc0e010, sve_misc
, 0, OP2 (SVE_Pt
, SVE_ADDR_RI_S9xVL
), {}, 0, 0),
3610 _SVE_INSN ("ldr", 0x85804000, 0xffc0e000, sve_misc
, 0, OP2 (SVE_Zt
, SVE_ADDR_RI_S9xVL
), {}, 0, 0),
3611 _SVE_INSN ("lsl", 0x04208c00, 0xff20fc00, sve_size_bhs
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVD_BHS
, 0, 0),
3612 _SVE_INSN ("lsl", 0x04209c00, 0xff20fc00, sve_shift_unpred
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_SHLIMM_UNPRED
), OP_SVE_VVU_BHSD
, 0, 0),
3613 _SVE_INSN ("lsl", 0x04138000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3614 _SVE_INSN ("lsl", 0x041b8000, 0xff3fe000, sve_size_bhs
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVD_BHS
, 0, 2),
3615 _SVE_INSN ("lsl", 0x04038000, 0xff3fe000, sve_shift_pred
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_SHLIMM_PRED
), OP_SVE_VMVU_BHSD
, 0, 2),
3616 _SVE_INSN ("lslr", 0x04178000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3617 _SVE_INSN ("lsr", 0x04208400, 0xff20fc00, sve_size_bhs
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVD_BHS
, 0, 0),
3618 _SVE_INSN ("lsr", 0x04209400, 0xff20fc00, sve_shift_unpred
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_SHRIMM_UNPRED
), OP_SVE_VVU_BHSD
, 0, 0),
3619 _SVE_INSN ("lsr", 0x04118000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3620 _SVE_INSN ("lsr", 0x04198000, 0xff3fe000, sve_size_bhs
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVD_BHS
, 0, 2),
3621 _SVE_INSN ("lsr", 0x04018000, 0xff3fe000, sve_shift_pred
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_SHRIMM_PRED
), OP_SVE_VMVU_BHSD
, 0, 2),
3622 _SVE_INSN ("lsrr", 0x04158000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3623 _SVE_INSN ("mad", 0x0400c000, 0xff20e000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zm_16
, SVE_Za_5
), OP_SVE_VMVV_BHSD
, 0, 0),
3624 _SVE_INSN ("mla", 0x04004000, 0xff20e000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VMVV_BHSD
, 0, 0),
3625 _SVE_INSN ("mls", 0x04006000, 0xff20e000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VMVV_BHSD
, 0, 0),
3626 _SVE_INSN ("movprfx", 0x0420bc00, 0xfffffc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_Zn
), {}, 0, 0),
3627 _SVE_INSN ("movprfx", 0x04102000, 0xff3ee000, sve_movprfx
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VPV_BHSD
, 0, 0),
3628 _SVE_INSN ("msb", 0x0400e000, 0xff20e000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zm_16
, SVE_Za_5
), OP_SVE_VMVV_BHSD
, 0, 0),
3629 _SVE_INSN ("mul", 0x2530c000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_SIMM8
), OP_SVE_VVU_BHSD
, 0, 1),
3630 _SVE_INSN ("mul", 0x04100000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3631 _SVE_INSN ("nand", 0x25804210, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, 0, 0),
3632 _SVE_INSN ("nands", 0x25c04210, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, 0, 0),
3633 _SVE_INSN ("neg", 0x0417a000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_BHSD
, 0, 0),
3634 _SVE_INSN ("nor", 0x25804200, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, 0, 0),
3635 _SVE_INSN ("nors", 0x25c04200, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, 0, 0),
3636 _SVE_INSN ("not", 0x041ea000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_BHSD
, 0, 0),
3637 _SVE_INSN ("orn", 0x25804010, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, 0, 0),
3638 _SVE_INSN ("orns", 0x25c04010, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, 0, 0),
3639 _SVE_INSN ("orr", 0x04603000, 0xffe0fc00, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_DDD
, F_HAS_ALIAS
, 0),
3640 _SVE_INSN ("orr", 0x05000000, 0xfffc0000, sve_limm
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_LIMM
), OP_SVE_VVU_BHSD
, F_HAS_ALIAS
, 1),
3641 _SVE_INSN ("orr", 0x04180000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3642 _SVE_INSN ("orr", 0x25804000, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, F_HAS_ALIAS
, 0),
3643 _SVE_INSN ("orrs", 0x25c04000, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BZBB
, F_HAS_ALIAS
, 0),
3644 _SVE_INSN ("orv", 0x04182000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VUV_BHSD
, 0, 0),
3645 _SVE_INSN ("pfalse", 0x2518e400, 0xfffffff0, sve_misc
, 0, OP1 (SVE_Pd
), OP_SVE_B
, 0, 0),
3646 _SVE_INSN ("pfirst", 0x2558c000, 0xfffffe10, sve_misc
, 0, OP3 (SVE_Pd
, SVE_Pg4_5
, SVE_Pd
), OP_SVE_BUB
, 0, 2),
3647 _SVE_INSN ("pnext", 0x2519c400, 0xff3ffe10, sve_size_bhsd
, 0, OP3 (SVE_Pd
, SVE_Pg4_5
, SVE_Pd
), OP_SVE_VUV_BHSD
, 0, 2),
3648 _SVE_INSN ("prfb", 0x8400c000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RX
), {}, 0, 0),
3649 _SVE_INSN ("prfb", 0x84200000, 0xffa0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_UUS
, 0, 0),
3650 _SVE_INSN ("prfb", 0xc4200000, 0xffa0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RZ_XTW_22
), OP_SVE_UUD
, 0, 0),
3651 _SVE_INSN ("prfb", 0xc4608000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_UUD
, 0, 0),
3652 _SVE_INSN ("prfb", 0x8400e000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_ZI_U5
), OP_SVE_UUS
, 0, 0),
3653 _SVE_INSN ("prfb", 0x85c00000, 0xffc0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RI_S6xVL
), {}, 0, 0),
3654 _SVE_INSN ("prfb", 0xc400e000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_ZI_U5
), OP_SVE_UUD
, 0, 0),
3655 _SVE_INSN ("prfd", 0x84206000, 0xffa0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RZ_XTW3_22
), OP_SVE_UUS
, 0, 0),
3656 _SVE_INSN ("prfd", 0x8580c000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RX_LSL3
), {}, 0, 0),
3657 _SVE_INSN ("prfd", 0xc4206000, 0xffa0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RZ_XTW3_22
), OP_SVE_UUD
, 0, 0),
3658 _SVE_INSN ("prfd", 0xc460e000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RZ_LSL3
), OP_SVE_UUD
, 0, 0),
3659 _SVE_INSN ("prfd", 0x8580e000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_ZI_U5x8
), OP_SVE_UUS
, 0, 0),
3660 _SVE_INSN ("prfd", 0x85c06000, 0xffc0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RI_S6xVL
), {}, 0, 0),
3661 _SVE_INSN ("prfd", 0xc580e000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_ZI_U5x8
), OP_SVE_UUD
, 0, 0),
3662 _SVE_INSN ("prfh", 0x84202000, 0xffa0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RZ_XTW1_22
), OP_SVE_UUS
, 0, 0),
3663 _SVE_INSN ("prfh", 0x8480c000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), {}, 0, 0),
3664 _SVE_INSN ("prfh", 0xc4202000, 0xffa0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RZ_XTW1_22
), OP_SVE_UUD
, 0, 0),
3665 _SVE_INSN ("prfh", 0xc460a000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RZ_LSL1
), OP_SVE_UUD
, 0, 0),
3666 _SVE_INSN ("prfh", 0x8480e000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_ZI_U5x2
), OP_SVE_UUS
, 0, 0),
3667 _SVE_INSN ("prfh", 0x85c02000, 0xffc0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RI_S6xVL
), {}, 0, 0),
3668 _SVE_INSN ("prfh", 0xc480e000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_ZI_U5x2
), OP_SVE_UUD
, 0, 0),
3669 _SVE_INSN ("prfw", 0x84204000, 0xffa0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RZ_XTW2_22
), OP_SVE_UUS
, 0, 0),
3670 _SVE_INSN ("prfw", 0x8500c000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RX_LSL2
), {}, 0, 0),
3671 _SVE_INSN ("prfw", 0xc4204000, 0xffa0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RZ_XTW2_22
), OP_SVE_UUD
, 0, 0),
3672 _SVE_INSN ("prfw", 0xc460c000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RZ_LSL2
), OP_SVE_UUD
, 0, 0),
3673 _SVE_INSN ("prfw", 0x8500e000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_ZI_U5x4
), OP_SVE_UUS
, 0, 0),
3674 _SVE_INSN ("prfw", 0x85c04000, 0xffc0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_RI_S6xVL
), {}, 0, 0),
3675 _SVE_INSN ("prfw", 0xc500e000, 0xffe0e010, sve_misc
, 0, OP3 (SVE_PRFOP
, SVE_Pg3
, SVE_ADDR_ZI_U5x4
), OP_SVE_UUD
, 0, 0),
3676 _SVE_INSN ("ptest", 0x2550c000, 0xffffc21f, sve_misc
, 0, OP2 (SVE_Pg4_10
, SVE_Pn
), OP_SVE_UB
, 0, 0),
3677 _SVE_INSN ("ptrue", 0x2518e000, 0xff3ffc10, sve_size_bhsd
, 0, OP2 (SVE_Pd
, SVE_PATTERN
), OP_SVE_VU_BHSD
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3678 _SVE_INSN ("ptrues", 0x2519e000, 0xff3ffc10, sve_size_bhsd
, 0, OP2 (SVE_Pd
, SVE_PATTERN
), OP_SVE_VU_BHSD
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3679 _SVE_INSN ("punpkhi", 0x05314000, 0xfffffe10, sve_misc
, 0, OP2 (SVE_Pd
, SVE_Pn
), OP_SVE_HB
, 0, 0),
3680 _SVE_INSN ("punpklo", 0x05304000, 0xfffffe10, sve_misc
, 0, OP2 (SVE_Pd
, SVE_Pn
), OP_SVE_HB
, 0, 0),
3681 _SVE_INSN ("rbit", 0x05278000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_BHSD
, 0, 0),
3682 _SVE_INSN ("rdffr", 0x2519f000, 0xfffffff0, sve_misc
, 0, OP1 (SVE_Pd
), OP_SVE_B
, 0, 0),
3683 _SVE_INSN ("rdffr", 0x2518f000, 0xfffffe10, sve_misc
, 0, OP2 (SVE_Pd
, SVE_Pg4_5
), OP_SVE_BZ
, 0, 0),
3684 _SVE_INSN ("rdffrs", 0x2558f000, 0xfffffe10, sve_misc
, 0, OP2 (SVE_Pd
, SVE_Pg4_5
), OP_SVE_BZ
, 0, 0),
3685 _SVE_INSN ("rdvl", 0x04bf5000, 0xfffff800, sve_misc
, 0, OP2 (Rd
, SVE_SIMM6
), OP_SVE_XU
, 0, 0),
3686 _SVE_INSN ("rev", 0x05344000, 0xff3ffe10, sve_size_bhsd
, 0, OP2 (SVE_Pd
, SVE_Pn
), OP_SVE_VV_BHSD
, 0, 0),
3687 _SVE_INSN ("rev", 0x05383800, 0xff3ffc00, sve_size_bhsd
, 0, OP2 (SVE_Zd
, SVE_Zn
), OP_SVE_VV_BHSD
, 0, 0),
3688 _SVE_INSN ("revb", 0x05248000, 0xff3fe000, sve_size_hsd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_HSD
, 0, 0),
3689 _SVE_INSN ("revh", 0x05a58000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_SD
, 0, 0),
3690 _SVE_INSN ("revw", 0x05e68000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_DMD
, 0, 0),
3691 _SVE_INSN ("sabd", 0x040c0000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3692 _SVE_INSN ("saddv", 0x04002000, 0xff3fe000, sve_size_bhs
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_DUV_BHS
, 0, 0),
3693 _SVE_INSN ("scvtf", 0x6594a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_SMS
, 0, 0),
3694 _SVE_INSN ("scvtf", 0x65d0a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_DMS
, 0, 0),
3695 _SVE_INSN ("scvtf", 0x65d4a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_SMD
, 0, 0),
3696 _SVE_INSN ("scvtf", 0x65d6a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_DMD
, 0, 0),
3697 _SVE_INSN ("sdiv", 0x04940000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3698 _SVE_INSN ("sdivr", 0x04960000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3699 _SVE_INSN ("sel", 0x0520c000, 0xff20c000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg4_10
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VUVV_BHSD
, F_HAS_ALIAS
, 0),
3700 _SVE_INSN ("sel", 0x25004210, 0xfff0c210, sve_misc
, 0, OP4 (SVE_Pd
, SVE_Pg4_10
, SVE_Pn
, SVE_Pm
), OP_SVE_BUBB
, F_HAS_ALIAS
, 0),
3701 _SVE_INSN ("setffr", 0x252c9000, 0xffffffff, sve_misc
, 0, OP0 (), {}, 0, 0),
3702 _SVE_INSN ("smax", 0x2528c000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_SIMM8
), OP_SVE_VVU_BHSD
, 0, 1),
3703 _SVE_INSN ("smax", 0x04080000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3704 _SVE_INSN ("smaxv", 0x04082000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VUV_BHSD
, 0, 0),
3705 _SVE_INSN ("smin", 0x252ac000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_SIMM8
), OP_SVE_VVU_BHSD
, 0, 1),
3706 _SVE_INSN ("smin", 0x040a0000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3707 _SVE_INSN ("sminv", 0x040a2000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VUV_BHSD
, 0, 0),
3708 _SVE_INSN ("smulh", 0x04120000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3709 _SVE_INSN ("splice", 0x052c8000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VUVV_BHSD
, 0, 2),
3710 _SVE_INSN ("sqadd", 0x04201000, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_BHSD
, 0, 0),
3711 _SVE_INSN ("sqadd", 0x2524c000, 0xff3fc000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_AIMM
), OP_SVE_VVU_BHSD
, 0, 1),
3712 _SVE_INSN ("sqdecb", 0x0430f800, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3713 _SVE_INSN ("sqdecb", 0x0420f800, 0xfff0fc00, sve_misc
, 0, OP3 (Rd
, Rd
, SVE_PATTERN_SCALED
), OP_SVE_XWU
, F_OPD2_OPT
| F_DEFAULT(31), 1),
3714 _SVE_INSN ("sqdecd", 0x04e0c800, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_DU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3715 _SVE_INSN ("sqdecd", 0x04f0f800, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3716 _SVE_INSN ("sqdecd", 0x04e0f800, 0xfff0fc00, sve_misc
, 0, OP3 (Rd
, Rd
, SVE_PATTERN_SCALED
), OP_SVE_XWU
, F_OPD2_OPT
| F_DEFAULT(31), 1),
3717 _SVE_INSN ("sqdech", 0x0460c800, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_HU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3718 _SVE_INSN ("sqdech", 0x0470f800, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3719 _SVE_INSN ("sqdech", 0x0460f800, 0xfff0fc00, sve_misc
, 0, OP3 (Rd
, Rd
, SVE_PATTERN_SCALED
), OP_SVE_XWU
, F_OPD2_OPT
| F_DEFAULT(31), 1),
3720 _SVE_INSN ("sqdecp", 0x252a8000, 0xff3ffe00, sve_size_hsd
, 0, OP2 (SVE_Zd
, SVE_Pg4_5
), OP_SVE_VU_HSD
, 0, 0),
3721 _SVE_INSN ("sqdecp", 0x252a8c00, 0xff3ffe00, sve_size_bhsd
, 0, OP2 (Rd
, SVE_Pg4_5
), OP_SVE_XV_BHSD
, 0, 0),
3722 _SVE_INSN ("sqdecp", 0x252a8800, 0xff3ffe00, sve_size_bhsd
, 0, OP3 (Rd
, SVE_Pg4_5
, Rd
), OP_SVE_XVW_BHSD
, 0, 2),
3723 _SVE_INSN ("sqdecw", 0x04a0c800, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_SU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3724 _SVE_INSN ("sqdecw", 0x04b0f800, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3725 _SVE_INSN ("sqdecw", 0x04a0f800, 0xfff0fc00, sve_misc
, 0, OP3 (Rd
, Rd
, SVE_PATTERN_SCALED
), OP_SVE_XWU
, F_OPD2_OPT
| F_DEFAULT(31), 1),
3726 _SVE_INSN ("sqincb", 0x0430f000, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3727 _SVE_INSN ("sqincb", 0x0420f000, 0xfff0fc00, sve_misc
, 0, OP3 (Rd
, Rd
, SVE_PATTERN_SCALED
), OP_SVE_XWU
, F_OPD2_OPT
| F_DEFAULT(31), 1),
3728 _SVE_INSN ("sqincd", 0x04e0c000, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_DU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3729 _SVE_INSN ("sqincd", 0x04f0f000, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3730 _SVE_INSN ("sqincd", 0x04e0f000, 0xfff0fc00, sve_misc
, 0, OP3 (Rd
, Rd
, SVE_PATTERN_SCALED
), OP_SVE_XWU
, F_OPD2_OPT
| F_DEFAULT(31), 1),
3731 _SVE_INSN ("sqinch", 0x0460c000, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_HU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3732 _SVE_INSN ("sqinch", 0x0470f000, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3733 _SVE_INSN ("sqinch", 0x0460f000, 0xfff0fc00, sve_misc
, 0, OP3 (Rd
, Rd
, SVE_PATTERN_SCALED
), OP_SVE_XWU
, F_OPD2_OPT
| F_DEFAULT(31), 1),
3734 _SVE_INSN ("sqincp", 0x25288000, 0xff3ffe00, sve_size_hsd
, 0, OP2 (SVE_Zd
, SVE_Pg4_5
), OP_SVE_VU_HSD
, 0, 0),
3735 _SVE_INSN ("sqincp", 0x25288c00, 0xff3ffe00, sve_size_bhsd
, 0, OP2 (Rd
, SVE_Pg4_5
), OP_SVE_XV_BHSD
, 0, 0),
3736 _SVE_INSN ("sqincp", 0x25288800, 0xff3ffe00, sve_size_bhsd
, 0, OP3 (Rd
, SVE_Pg4_5
, Rd
), OP_SVE_XVW_BHSD
, 0, 2),
3737 _SVE_INSN ("sqincw", 0x04a0c000, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_SU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3738 _SVE_INSN ("sqincw", 0x04b0f000, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3739 _SVE_INSN ("sqincw", 0x04a0f000, 0xfff0fc00, sve_misc
, 0, OP3 (Rd
, Rd
, SVE_PATTERN_SCALED
), OP_SVE_XWU
, F_OPD2_OPT
| F_DEFAULT(31), 1),
3740 _SVE_INSN ("sqsub", 0x04201800, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_BHSD
, 0, 0),
3741 _SVE_INSN ("sqsub", 0x2526c000, 0xff3fc000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_AIMM
), OP_SVE_VVU_BHSD
, 0, 1),
3742 _SVE_INSN ("st1b", 0xe4004000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_BUU
, F_OD(1), 0),
3743 _SVE_INSN ("st1b", 0xe4008000, 0xffe0a000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_14
), OP_SVE_DUD
, F_OD(1), 0),
3744 _SVE_INSN ("st1b", 0xe400a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DUD
, F_OD(1), 0),
3745 _SVE_INSN ("st1b", 0xe4204000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_HUU
, F_OD(1), 0),
3746 _SVE_INSN ("st1b", 0xe4404000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_SUU
, F_OD(1), 0),
3747 _SVE_INSN ("st1b", 0xe4408000, 0xffe0a000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_14
), OP_SVE_SUS
, F_OD(1), 0),
3748 _SVE_INSN ("st1b", 0xe4604000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_DUU
, F_OD(1), 0),
3749 _SVE_INSN ("st1b", 0xe400e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_BUU
, F_OD(1), 0),
3750 _SVE_INSN ("st1b", 0xe420e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_HUU
, F_OD(1), 0),
3751 _SVE_INSN ("st1b", 0xe440a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5
), OP_SVE_DUD
, F_OD(1), 0),
3752 _SVE_INSN ("st1b", 0xe440e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_SUU
, F_OD(1), 0),
3753 _SVE_INSN ("st1b", 0xe460a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5
), OP_SVE_SUS
, F_OD(1), 0),
3754 _SVE_INSN ("st1b", 0xe460e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DUU
, F_OD(1), 0),
3755 _SVE_INSN ("st1d", 0xe5808000, 0xffe0a000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_14
), OP_SVE_DUD
, F_OD(1), 0),
3756 _SVE_INSN ("st1d", 0xe580a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DUD
, F_OD(1), 0),
3757 _SVE_INSN ("st1d", 0xe5a08000, 0xffe0a000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW3_14
), OP_SVE_DUD
, F_OD(1), 0),
3758 _SVE_INSN ("st1d", 0xe5a0a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_LSL3
), OP_SVE_DUD
, F_OD(1), 0),
3759 _SVE_INSN ("st1d", 0xe5e04000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL3
), OP_SVE_DUU
, F_OD(1), 0),
3760 _SVE_INSN ("st1d", 0xe5c0a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x8
), OP_SVE_DUD
, F_OD(1), 0),
3761 _SVE_INSN ("st1d", 0xe5e0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DUU
, F_OD(1), 0),
3762 _SVE_INSN ("st1h", 0xe4808000, 0xffe0a000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_14
), OP_SVE_DUD
, F_OD(1), 0),
3763 _SVE_INSN ("st1h", 0xe480a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DUD
, F_OD(1), 0),
3764 _SVE_INSN ("st1h", 0xe4a04000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_HUU
, F_OD(1), 0),
3765 _SVE_INSN ("st1h", 0xe4a08000, 0xffe0a000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW1_14
), OP_SVE_DUD
, F_OD(1), 0),
3766 _SVE_INSN ("st1h", 0xe4a0a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_LSL1
), OP_SVE_DUD
, F_OD(1), 0),
3767 _SVE_INSN ("st1h", 0xe4c04000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_SUU
, F_OD(1), 0),
3768 _SVE_INSN ("st1h", 0xe4c08000, 0xffe0a000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_14
), OP_SVE_SUS
, F_OD(1), 0),
3769 _SVE_INSN ("st1h", 0xe4e04000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_DUU
, F_OD(1), 0),
3770 _SVE_INSN ("st1h", 0xe4e08000, 0xffe0a000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW1_14
), OP_SVE_SUS
, F_OD(1), 0),
3771 _SVE_INSN ("st1h", 0xe4a0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_HUU
, F_OD(1), 0),
3772 _SVE_INSN ("st1h", 0xe4c0a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x2
), OP_SVE_DUD
, F_OD(1), 0),
3773 _SVE_INSN ("st1h", 0xe4c0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_SUU
, F_OD(1), 0),
3774 _SVE_INSN ("st1h", 0xe4e0a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x2
), OP_SVE_SUS
, F_OD(1), 0),
3775 _SVE_INSN ("st1h", 0xe4e0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DUU
, F_OD(1), 0),
3776 _SVE_INSN ("st1w", 0xe5008000, 0xffe0a000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_14
), OP_SVE_DUD
, F_OD(1), 0),
3777 _SVE_INSN ("st1w", 0xe500a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ
), OP_SVE_DUD
, F_OD(1), 0),
3778 _SVE_INSN ("st1w", 0xe5208000, 0xffe0a000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW2_14
), OP_SVE_DUD
, F_OD(1), 0),
3779 _SVE_INSN ("st1w", 0xe520a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_LSL2
), OP_SVE_DUD
, F_OD(1), 0),
3780 _SVE_INSN ("st1w", 0xe5404000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL2
), OP_SVE_SUU
, F_OD(1), 0),
3781 _SVE_INSN ("st1w", 0xe5408000, 0xffe0a000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW_14
), OP_SVE_SUS
, F_OD(1), 0),
3782 _SVE_INSN ("st1w", 0xe5604000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL2
), OP_SVE_DUU
, F_OD(1), 0),
3783 _SVE_INSN ("st1w", 0xe5608000, 0xffe0a000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RZ_XTW2_14
), OP_SVE_SUS
, F_OD(1), 0),
3784 _SVE_INSN ("st1w", 0xe540a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x4
), OP_SVE_DUD
, F_OD(1), 0),
3785 _SVE_INSN ("st1w", 0xe540e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_SUU
, F_OD(1), 0),
3786 _SVE_INSN ("st1w", 0xe560a000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_ZI_U5x4
), OP_SVE_SUS
, F_OD(1), 0),
3787 _SVE_INSN ("st1w", 0xe560e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DUU
, F_OD(1), 0),
3788 _SVE_INSN ("st2b", 0xe4206000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_BUU
, F_OD(2), 0),
3789 _SVE_INSN ("st2b", 0xe430e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x2xVL
), OP_SVE_BUU
, F_OD(2), 0),
3790 _SVE_INSN ("st2d", 0xe5a06000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL3
), OP_SVE_DUU
, F_OD(2), 0),
3791 _SVE_INSN ("st2d", 0xe5b0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x2xVL
), OP_SVE_DUU
, F_OD(2), 0),
3792 _SVE_INSN ("st2h", 0xe4a06000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_HUU
, F_OD(2), 0),
3793 _SVE_INSN ("st2h", 0xe4b0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x2xVL
), OP_SVE_HUU
, F_OD(2), 0),
3794 _SVE_INSN ("st2w", 0xe5206000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL2
), OP_SVE_SUU
, F_OD(2), 0),
3795 _SVE_INSN ("st2w", 0xe530e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x2xVL
), OP_SVE_SUU
, F_OD(2), 0),
3796 _SVE_INSN ("st3b", 0xe4406000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_BUU
, F_OD(3), 0),
3797 _SVE_INSN ("st3b", 0xe450e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x3xVL
), OP_SVE_BUU
, F_OD(3), 0),
3798 _SVE_INSN ("st3d", 0xe5c06000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL3
), OP_SVE_DUU
, F_OD(3), 0),
3799 _SVE_INSN ("st3d", 0xe5d0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x3xVL
), OP_SVE_DUU
, F_OD(3), 0),
3800 _SVE_INSN ("st3h", 0xe4c06000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_HUU
, F_OD(3), 0),
3801 _SVE_INSN ("st3h", 0xe4d0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x3xVL
), OP_SVE_HUU
, F_OD(3), 0),
3802 _SVE_INSN ("st3w", 0xe5406000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL2
), OP_SVE_SUU
, F_OD(3), 0),
3803 _SVE_INSN ("st3w", 0xe550e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x3xVL
), OP_SVE_SUU
, F_OD(3), 0),
3804 _SVE_INSN ("st4b", 0xe4606000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_BUU
, F_OD(4), 0),
3805 _SVE_INSN ("st4b", 0xe470e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x4xVL
), OP_SVE_BUU
, F_OD(4), 0),
3806 _SVE_INSN ("st4d", 0xe5e06000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL3
), OP_SVE_DUU
, F_OD(4), 0),
3807 _SVE_INSN ("st4d", 0xe5f0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x4xVL
), OP_SVE_DUU
, F_OD(4), 0),
3808 _SVE_INSN ("st4h", 0xe4e06000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_HUU
, F_OD(4), 0),
3809 _SVE_INSN ("st4h", 0xe4f0e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x4xVL
), OP_SVE_HUU
, F_OD(4), 0),
3810 _SVE_INSN ("st4w", 0xe5606000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL2
), OP_SVE_SUU
, F_OD(4), 0),
3811 _SVE_INSN ("st4w", 0xe570e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4x4xVL
), OP_SVE_SUU
, F_OD(4), 0),
3812 _SVE_INSN ("stnt1b", 0xe4006000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX
), OP_SVE_BUU
, F_OD(1), 0),
3813 _SVE_INSN ("stnt1b", 0xe410e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_BUU
, F_OD(1), 0),
3814 _SVE_INSN ("stnt1d", 0xe5806000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL3
), OP_SVE_DUU
, F_OD(1), 0),
3815 _SVE_INSN ("stnt1d", 0xe590e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_DUU
, F_OD(1), 0),
3816 _SVE_INSN ("stnt1h", 0xe4806000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL1
), OP_SVE_HUU
, F_OD(1), 0),
3817 _SVE_INSN ("stnt1h", 0xe490e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_HUU
, F_OD(1), 0),
3818 _SVE_INSN ("stnt1w", 0xe5006000, 0xffe0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RX_LSL2
), OP_SVE_SUU
, F_OD(1), 0),
3819 _SVE_INSN ("stnt1w", 0xe510e000, 0xfff0e000, sve_misc
, 0, OP3 (SVE_ZtxN
, SVE_Pg3
, SVE_ADDR_RI_S4xVL
), OP_SVE_SUU
, F_OD(1), 0),
3820 _SVE_INSN ("str", 0xe5800000, 0xffc0e010, sve_misc
, 0, OP2 (SVE_Pt
, SVE_ADDR_RI_S9xVL
), {}, 0, 0),
3821 _SVE_INSN ("str", 0xe5804000, 0xffc0e000, sve_misc
, 0, OP2 (SVE_Zt
, SVE_ADDR_RI_S9xVL
), {}, 0, 0),
3822 _SVE_INSN ("sub", 0x04200400, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_BHSD
, 0, 0),
3823 _SVE_INSN ("sub", 0x2521c000, 0xff3fc000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_AIMM
), OP_SVE_VVU_BHSD
, 0, 1),
3824 _SVE_INSN ("sub", 0x04010000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3825 _SVE_INSN ("subr", 0x2523c000, 0xff3fc000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_AIMM
), OP_SVE_VVU_BHSD
, 0, 1),
3826 _SVE_INSN ("subr", 0x04030000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3827 _SVE_INSN ("sunpkhi", 0x05313800, 0xff3ffc00, sve_size_hsd
, 0, OP2 (SVE_Zd
, SVE_Zn
), OP_SVE_VV_HSD_BHS
, 0, 0),
3828 _SVE_INSN ("sunpklo", 0x05303800, 0xff3ffc00, sve_size_hsd
, 0, OP2 (SVE_Zd
, SVE_Zn
), OP_SVE_VV_HSD_BHS
, 0, 0),
3829 _SVE_INSN ("sxtb", 0x0410a000, 0xff3fe000, sve_size_hsd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_HSD
, 0, 0),
3830 _SVE_INSN ("sxth", 0x0492a000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_SD
, 0, 0),
3831 _SVE_INSN ("sxtw", 0x04d4a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_DMD
, 0, 0),
3832 _SVE_INSN ("tbl", 0x05203000, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_ZnxN
, SVE_Zm_16
), OP_SVE_VVV_BHSD
, F_OD(1), 0),
3833 _SVE_INSN ("trn1", 0x05205000, 0xff30fe10, sve_size_bhsd
, 0, OP3 (SVE_Pd
, SVE_Pn
, SVE_Pm
), OP_SVE_VVV_BHSD
, 0, 0),
3834 _SVE_INSN ("trn1", 0x05207000, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_BHSD
, 0, 0),
3835 _SVE_INSN ("trn2", 0x05205400, 0xff30fe10, sve_size_bhsd
, 0, OP3 (SVE_Pd
, SVE_Pn
, SVE_Pm
), OP_SVE_VVV_BHSD
, 0, 0),
3836 _SVE_INSN ("trn2", 0x05207400, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_BHSD
, 0, 0),
3837 _SVE_INSN ("uabd", 0x040d0000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3838 _SVE_INSN ("uaddv", 0x04012000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_DUV_BHSD
, 0, 0),
3839 _SVE_INSN ("ucvtf", 0x6595a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_SMS
, 0, 0),
3840 _SVE_INSN ("ucvtf", 0x65d1a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_DMS
, 0, 0),
3841 _SVE_INSN ("ucvtf", 0x65d5a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_SMD
, 0, 0),
3842 _SVE_INSN ("ucvtf", 0x65d7a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_DMD
, 0, 0),
3843 _SVE_INSN ("udiv", 0x04950000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3844 _SVE_INSN ("udivr", 0x04970000, 0xffbfe000, sve_size_sd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_SD
, 0, 2),
3845 _SVE_INSN ("umax", 0x2529c000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_UIMM8
), OP_SVE_VVU_BHSD
, 0, 1),
3846 _SVE_INSN ("umax", 0x04090000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3847 _SVE_INSN ("umaxv", 0x04092000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VUV_BHSD
, 0, 0),
3848 _SVE_INSN ("umin", 0x252bc000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_UIMM8
), OP_SVE_VVU_BHSD
, 0, 1),
3849 _SVE_INSN ("umin", 0x040b0000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3850 _SVE_INSN ("uminv", 0x040b2000, 0xff3fe000, sve_size_bhsd
, 0, OP3 (SVE_Vd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VUV_BHSD
, 0, 0),
3851 _SVE_INSN ("umulh", 0x04130000, 0xff3fe000, sve_size_bhsd
, 0, OP4 (SVE_Zd
, SVE_Pg3
, SVE_Zd
, SVE_Zm_5
), OP_SVE_VMVV_BHSD
, 0, 2),
3852 _SVE_INSN ("uqadd", 0x04201400, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_BHSD
, 0, 0),
3853 _SVE_INSN ("uqadd", 0x2525c000, 0xff3fc000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_AIMM
), OP_SVE_VVU_BHSD
, 0, 1),
3854 _SVE_INSN ("uqdecb", 0x0420fc00, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_WU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3855 _SVE_INSN ("uqdecb", 0x0430fc00, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3856 _SVE_INSN ("uqdecd", 0x04e0cc00, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_DU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3857 _SVE_INSN ("uqdecd", 0x04e0fc00, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_WU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3858 _SVE_INSN ("uqdecd", 0x04f0fc00, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3859 _SVE_INSN ("uqdech", 0x0460cc00, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_HU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3860 _SVE_INSN ("uqdech", 0x0460fc00, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_WU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3861 _SVE_INSN ("uqdech", 0x0470fc00, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3862 _SVE_INSN ("uqdecp", 0x252b8000, 0xff3ffe00, sve_size_hsd
, 0, OP2 (SVE_Zd
, SVE_Pg4_5
), OP_SVE_VU_HSD
, 0, 0),
3863 _SVE_INSN ("uqdecp", 0x252b8800, 0xff3ffe00, sve_size_bhsd
, 0, OP2 (Rd
, SVE_Pg4_5
), OP_SVE_WV_BHSD
, 0, 0),
3864 _SVE_INSN ("uqdecp", 0x252b8c00, 0xff3ffe00, sve_size_bhsd
, 0, OP2 (Rd
, SVE_Pg4_5
), OP_SVE_XV_BHSD
, 0, 0),
3865 _SVE_INSN ("uqdecw", 0x04a0cc00, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_SU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3866 _SVE_INSN ("uqdecw", 0x04a0fc00, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_WU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3867 _SVE_INSN ("uqdecw", 0x04b0fc00, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3868 _SVE_INSN ("uqincb", 0x0420f400, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_WU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3869 _SVE_INSN ("uqincb", 0x0430f400, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3870 _SVE_INSN ("uqincd", 0x04e0c400, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_DU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3871 _SVE_INSN ("uqincd", 0x04e0f400, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_WU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3872 _SVE_INSN ("uqincd", 0x04f0f400, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3873 _SVE_INSN ("uqinch", 0x0460c400, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_HU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3874 _SVE_INSN ("uqinch", 0x0460f400, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_WU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3875 _SVE_INSN ("uqinch", 0x0470f400, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3876 _SVE_INSN ("uqincp", 0x25298000, 0xff3ffe00, sve_size_hsd
, 0, OP2 (SVE_Zd
, SVE_Pg4_5
), OP_SVE_VU_HSD
, 0, 0),
3877 _SVE_INSN ("uqincp", 0x25298800, 0xff3ffe00, sve_size_bhsd
, 0, OP2 (Rd
, SVE_Pg4_5
), OP_SVE_WV_BHSD
, 0, 0),
3878 _SVE_INSN ("uqincp", 0x25298c00, 0xff3ffe00, sve_size_bhsd
, 0, OP2 (Rd
, SVE_Pg4_5
), OP_SVE_XV_BHSD
, 0, 0),
3879 _SVE_INSN ("uqincw", 0x04a0c400, 0xfff0fc00, sve_misc
, 0, OP2 (SVE_Zd
, SVE_PATTERN_SCALED
), OP_SVE_SU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3880 _SVE_INSN ("uqincw", 0x04a0f400, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_WU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3881 _SVE_INSN ("uqincw", 0x04b0f400, 0xfff0fc00, sve_misc
, 0, OP2 (Rd
, SVE_PATTERN_SCALED
), OP_SVE_XU
, F_OPD1_OPT
| F_DEFAULT(31), 0),
3882 _SVE_INSN ("uqsub", 0x04201c00, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_BHSD
, 0, 0),
3883 _SVE_INSN ("uqsub", 0x2527c000, 0xff3fc000, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_AIMM
), OP_SVE_VVU_BHSD
, 0, 1),
3884 _SVE_INSN ("uunpkhi", 0x05333800, 0xff3ffc00, sve_size_hsd
, 0, OP2 (SVE_Zd
, SVE_Zn
), OP_SVE_VV_HSD_BHS
, 0, 0),
3885 _SVE_INSN ("uunpklo", 0x05323800, 0xff3ffc00, sve_size_hsd
, 0, OP2 (SVE_Zd
, SVE_Zn
), OP_SVE_VV_HSD_BHS
, 0, 0),
3886 _SVE_INSN ("uxtb", 0x0411a000, 0xff3fe000, sve_size_hsd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_HSD
, 0, 0),
3887 _SVE_INSN ("uxth", 0x0493a000, 0xffbfe000, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_VMV_SD
, 0, 0),
3888 _SVE_INSN ("uxtw", 0x04d5a000, 0xffffe000, sve_misc
, 0, OP3 (SVE_Zd
, SVE_Pg3
, SVE_Zn
), OP_SVE_DMD
, 0, 0),
3889 _SVE_INSN ("uzp1", 0x05204800, 0xff30fe10, sve_size_bhsd
, 0, OP3 (SVE_Pd
, SVE_Pn
, SVE_Pm
), OP_SVE_VVV_BHSD
, 0, 0),
3890 _SVE_INSN ("uzp1", 0x05206800, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_BHSD
, 0, 0),
3891 _SVE_INSN ("uzp2", 0x05204c00, 0xff30fe10, sve_size_bhsd
, 0, OP3 (SVE_Pd
, SVE_Pn
, SVE_Pm
), OP_SVE_VVV_BHSD
, 0, 0),
3892 _SVE_INSN ("uzp2", 0x05206c00, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_BHSD
, 0, 0),
3893 _SVE_INSN ("whilele", 0x25200410, 0xff20fc10, sve_size_bhsd
, 0, OP3 (SVE_Pd
, Rn
, Rm
), OP_SVE_VWW_BHSD
, 0, 0),
3894 _SVE_INSN ("whilele", 0x25201410, 0xff20fc10, sve_size_bhsd
, 0, OP3 (SVE_Pd
, Rn
, Rm
), OP_SVE_VXX_BHSD
, 0, 0),
3895 _SVE_INSN ("whilelo", 0x25200c00, 0xff20fc10, sve_size_bhsd
, 0, OP3 (SVE_Pd
, Rn
, Rm
), OP_SVE_VWW_BHSD
, 0, 0),
3896 _SVE_INSN ("whilelo", 0x25201c00, 0xff20fc10, sve_size_bhsd
, 0, OP3 (SVE_Pd
, Rn
, Rm
), OP_SVE_VXX_BHSD
, 0, 0),
3897 _SVE_INSN ("whilels", 0x25200c10, 0xff20fc10, sve_size_bhsd
, 0, OP3 (SVE_Pd
, Rn
, Rm
), OP_SVE_VWW_BHSD
, 0, 0),
3898 _SVE_INSN ("whilels", 0x25201c10, 0xff20fc10, sve_size_bhsd
, 0, OP3 (SVE_Pd
, Rn
, Rm
), OP_SVE_VXX_BHSD
, 0, 0),
3899 _SVE_INSN ("whilelt", 0x25200400, 0xff20fc10, sve_size_bhsd
, 0, OP3 (SVE_Pd
, Rn
, Rm
), OP_SVE_VWW_BHSD
, 0, 0),
3900 _SVE_INSN ("whilelt", 0x25201400, 0xff20fc10, sve_size_bhsd
, 0, OP3 (SVE_Pd
, Rn
, Rm
), OP_SVE_VXX_BHSD
, 0, 0),
3901 _SVE_INSN ("wrffr", 0x25289000, 0xfffffe1f, sve_misc
, 0, OP1 (SVE_Pn
), OP_SVE_B
, 0, 0),
3902 _SVE_INSN ("zip1", 0x05204000, 0xff30fe10, sve_size_bhsd
, 0, OP3 (SVE_Pd
, SVE_Pn
, SVE_Pm
), OP_SVE_VVV_BHSD
, 0, 0),
3903 _SVE_INSN ("zip1", 0x05206000, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_BHSD
, 0, 0),
3904 _SVE_INSN ("zip2", 0x05204400, 0xff30fe10, sve_size_bhsd
, 0, OP3 (SVE_Pd
, SVE_Pn
, SVE_Pm
), OP_SVE_VVV_BHSD
, 0, 0),
3905 _SVE_INSN ("zip2", 0x05206400, 0xff20fc00, sve_size_bhsd
, 0, OP3 (SVE_Zd
, SVE_Zn
, SVE_Zm_16
), OP_SVE_VVV_BHSD
, 0, 0),
3906 _SVE_INSN ("bic", 0x05800000, 0xfffc0000, sve_limm
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_INV_LIMM
), OP_SVE_VVU_BHSD
, F_ALIAS
| F_PSEUDO
, 1),
3907 _SVE_INSN ("cmple", 0x24008000, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zm_16
, SVE_Zn
), OP_SVE_VZVV_BHSD
, F_ALIAS
| F_PSEUDO
, 0),
3908 _SVE_INSN ("cmplo", 0x24000010, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zm_16
, SVE_Zn
), OP_SVE_VZVV_BHSD
, F_ALIAS
| F_PSEUDO
, 0),
3909 _SVE_INSN ("cmpls", 0x24000000, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zm_16
, SVE_Zn
), OP_SVE_VZVV_BHSD
, F_ALIAS
| F_PSEUDO
, 0),
3910 _SVE_INSN ("cmplt", 0x24008010, 0xff20e010, sve_size_bhsd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zm_16
, SVE_Zn
), OP_SVE_VZVV_BHSD
, F_ALIAS
| F_PSEUDO
, 0),
3911 _SVE_INSN ("eon", 0x05400000, 0xfffc0000, sve_limm
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_INV_LIMM
), OP_SVE_VVU_BHSD
, F_ALIAS
| F_PSEUDO
, 1),
3912 _SVE_INSN ("facle", 0x6580c010, 0xffa0e010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zm_16
, SVE_Zn
), OP_SVE_VZVV_SD
, F_ALIAS
| F_PSEUDO
, 0),
3913 _SVE_INSN ("faclt", 0x6580e010, 0xffa0e010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zm_16
, SVE_Zn
), OP_SVE_VZVV_SD
, F_ALIAS
| F_PSEUDO
, 0),
3914 _SVE_INSN ("fcmle", 0x65804000, 0xffa0e010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zm_16
, SVE_Zn
), OP_SVE_VZVV_SD
, F_ALIAS
| F_PSEUDO
, 0),
3915 _SVE_INSN ("fcmlt", 0x65804010, 0xffa0e010, sve_size_sd
, 0, OP4 (SVE_Pd
, SVE_Pg3
, SVE_Zm_16
, SVE_Zn
), OP_SVE_VZVV_SD
, F_ALIAS
| F_PSEUDO
, 0),
3916 _SVE_INSN ("fmov", 0x25b8c000, 0xffbfffe0, sve_size_sd
, 0, OP2 (SVE_Zd
, FPIMM0
), OP_SVE_V_SD
, F_ALIAS
| F_PSEUDO
, 0),
3917 _SVE_INSN ("fmov", 0x05904000, 0xffb0ffe0, sve_size_sd
, 0, OP3 (SVE_Zd
, SVE_Pg4_16
, FPIMM0
), OP_SVE_VM_SD
, F_ALIAS
| F_PSEUDO
, 0),
3918 _SVE_INSN ("orn", 0x05000000, 0xfffc0000, sve_limm
, 0, OP3 (SVE_Zd
, SVE_Zd
, SVE_INV_LIMM
), OP_SVE_VVU_BHSD
, F_ALIAS
| F_PSEUDO
, 1),
3920 {0, 0, 0, 0, 0, 0, {}, {}, 0, 0, NULL
},
3923 #ifdef AARCH64_OPERANDS
3924 #undef AARCH64_OPERANDS
3927 /* Macro-based operand decription; this will be fed into aarch64-gen for it
3928 to generate the structure aarch64_operands and the function
3929 aarch64_insert_operand and aarch64_extract_operand.
3931 These inserters and extracters in the description execute the conversion
3932 between the aarch64_opnd_info and value in the operand-related instruction
3935 /* Y expects arguments (left to right) to be operand class, inserter/extractor
3936 name suffix, operand name, flags, related bitfield(s) and description.
3937 X only differs from Y by having the operand inserter and extractor names
3938 listed separately. */
3940 #define AARCH64_OPERANDS \
3941 Y(INT_REG, regno, "Rd", 0, F(FLD_Rd), "an integer register") \
3942 Y(INT_REG, regno, "Rn", 0, F(FLD_Rn), "an integer register") \
3943 Y(INT_REG, regno, "Rm", 0, F(FLD_Rm), "an integer register") \
3944 Y(INT_REG, regno, "Rt", 0, F(FLD_Rt), "an integer register") \
3945 Y(INT_REG, regno, "Rt2", 0, F(FLD_Rt2), "an integer register") \
3946 Y(INT_REG, regno, "Rs", 0, F(FLD_Rs), "an integer register") \
3947 Y(INT_REG, regno, "Ra", 0, F(FLD_Ra), "an integer register") \
3948 X(INT_REG, ins_regno, ext_regrt_sysins, "Rt_SYS", 0, F(FLD_Rt), \
3949 "an integer register") \
3950 Y(INT_REG, regno, "Rd_SP", OPD_F_MAYBE_SP, F(FLD_Rd), \
3951 "an integer or stack pointer register") \
3952 Y(INT_REG, regno, "Rn_SP", OPD_F_MAYBE_SP, F(FLD_Rn), \
3953 "an integer or stack pointer register") \
3954 X(INT_REG, 0, ext_regno_pair, "PAIRREG", 0, F(), \
3955 "the second reg of a pair") \
3956 Y(MODIFIED_REG, reg_extended, "Rm_EXT", 0, F(), \
3957 "an integer register with optional extension") \
3958 Y(MODIFIED_REG, reg_shifted, "Rm_SFT", 0, F(), \
3959 "an integer register with optional shift") \
3960 Y(FP_REG, regno, "Fd", 0, F(FLD_Rd), "a floating-point register") \
3961 Y(FP_REG, regno, "Fn", 0, F(FLD_Rn), "a floating-point register") \
3962 Y(FP_REG, regno, "Fm", 0, F(FLD_Rm), "a floating-point register") \
3963 Y(FP_REG, regno, "Fa", 0, F(FLD_Ra), "a floating-point register") \
3964 Y(FP_REG, ft, "Ft", 0, F(FLD_Rt), "a floating-point register") \
3965 Y(FP_REG, regno, "Ft2", 0, F(FLD_Rt2), "a floating-point register") \
3966 Y(SISD_REG, regno, "Sd", 0, F(FLD_Rd), "a SIMD scalar register") \
3967 Y(SISD_REG, regno, "Sn", 0, F(FLD_Rn), "a SIMD scalar register") \
3968 Y(SISD_REG, regno, "Sm", 0, F(FLD_Rm), "a SIMD scalar register") \
3969 Y(SIMD_REG, regno, "Vd", 0, F(FLD_Rd), "a SIMD vector register") \
3970 Y(SIMD_REG, regno, "Vn", 0, F(FLD_Rn), "a SIMD vector register") \
3971 Y(SIMD_REG, regno, "Vm", 0, F(FLD_Rm), "a SIMD vector register") \
3972 Y(FP_REG, regno, "VdD1", 0, F(FLD_Rd), \
3973 "the top half of a 128-bit FP/SIMD register") \
3974 Y(FP_REG, regno, "VnD1", 0, F(FLD_Rn), \
3975 "the top half of a 128-bit FP/SIMD register") \
3976 Y(SIMD_ELEMENT, reglane, "Ed", 0, F(FLD_Rd), \
3977 "a SIMD vector element") \
3978 Y(SIMD_ELEMENT, reglane, "En", 0, F(FLD_Rn), \
3979 "a SIMD vector element") \
3980 Y(SIMD_ELEMENT, reglane, "Em", 0, F(FLD_Rm), \
3981 "a SIMD vector element") \
3982 Y(SIMD_REGLIST, reglist, "LVn", 0, F(FLD_Rn), \
3983 "a SIMD vector register list") \
3984 Y(SIMD_REGLIST, ldst_reglist, "LVt", 0, F(), \
3985 "a SIMD vector register list") \
3986 Y(SIMD_REGLIST, ldst_reglist_r, "LVt_AL", 0, F(), \
3987 "a SIMD vector register list") \
3988 Y(SIMD_REGLIST, ldst_elemlist, "LEt", 0, F(), \
3989 "a SIMD vector element list") \
3990 Y(CP_REG, regno, "Cn", 0, F(FLD_CRn), \
3991 "a 4-bit opcode field named for historical reasons C0 - C15") \
3992 Y(CP_REG, regno, "Cm", 0, F(FLD_CRm), \
3993 "a 4-bit opcode field named for historical reasons C0 - C15") \
3994 Y(IMMEDIATE, imm, "IDX", 0, F(FLD_imm4), \
3995 "an immediate as the index of the least significant byte") \
3996 Y(IMMEDIATE, advsimd_imm_shift, "IMM_VLSL", 0, F(), \
3997 "a left shift amount for an AdvSIMD register") \
3998 Y(IMMEDIATE, advsimd_imm_shift, "IMM_VLSR", 0, F(), \
3999 "a right shift amount for an AdvSIMD register") \
4000 Y(IMMEDIATE, advsimd_imm_modified, "SIMD_IMM", 0, F(), \
4002 Y(IMMEDIATE, advsimd_imm_modified, "SIMD_IMM_SFT", 0, F(), \
4003 "an 8-bit unsigned immediate with optional shift") \
4004 Y(IMMEDIATE, advsimd_imm_modified, "SIMD_FPIMM", 0, F(), \
4005 "an 8-bit floating-point constant") \
4006 X(IMMEDIATE, 0, ext_shll_imm, "SHLL_IMM", 0, F(), \
4007 "an immediate shift amount of 8, 16 or 32") \
4008 X(IMMEDIATE, 0, 0, "IMM0", 0, F(), "0") \
4009 X(IMMEDIATE, 0, 0, "FPIMM0", 0, F(), "0.0") \
4010 Y(IMMEDIATE, fpimm, "FPIMM", 0, F(FLD_imm8), \
4011 "an 8-bit floating-point constant") \
4012 Y(IMMEDIATE, imm, "IMMR", 0, F(FLD_immr), \
4013 "the right rotate amount") \
4014 Y(IMMEDIATE, imm, "IMMS", 0, F(FLD_imm6), \
4015 "the leftmost bit number to be moved from the source") \
4016 Y(IMMEDIATE, imm, "WIDTH", 0, F(FLD_imm6), \
4017 "the width of the bit-field") \
4018 Y(IMMEDIATE, imm, "IMM", 0, F(FLD_imm6), "an immediate") \
4019 Y(IMMEDIATE, imm, "UIMM3_OP1", 0, F(FLD_op1), \
4020 "a 3-bit unsigned immediate") \
4021 Y(IMMEDIATE, imm, "UIMM3_OP2", 0, F(FLD_op2), \
4022 "a 3-bit unsigned immediate") \
4023 Y(IMMEDIATE, imm, "UIMM4", 0, F(FLD_CRm), \
4024 "a 4-bit unsigned immediate") \
4025 Y(IMMEDIATE, imm, "UIMM7", 0, F(FLD_CRm, FLD_op2), \
4026 "a 7-bit unsigned immediate") \
4027 Y(IMMEDIATE, imm, "BIT_NUM", 0, F(FLD_b5, FLD_b40), \
4028 "the bit number to be tested") \
4029 Y(IMMEDIATE, imm, "EXCEPTION", 0, F(FLD_imm16), \
4030 "a 16-bit unsigned immediate") \
4031 Y(IMMEDIATE, imm, "CCMP_IMM", 0, F(FLD_imm5), \
4032 "a 5-bit unsigned immediate") \
4033 Y(IMMEDIATE, imm, "SIMM5", OPD_F_SEXT, F(FLD_imm5), \
4034 "a 5-bit signed immediate") \
4035 Y(IMMEDIATE, imm, "NZCV", 0, F(FLD_nzcv), \
4036 "a flag bit specifier giving an alternative value for each flag") \
4037 Y(IMMEDIATE, limm, "LIMM", 0, F(FLD_N,FLD_immr,FLD_imms), \
4038 "Logical immediate") \
4039 Y(IMMEDIATE, aimm, "AIMM", 0, F(FLD_shift,FLD_imm12), \
4040 "a 12-bit unsigned immediate with optional left shift of 12 bits")\
4041 Y(IMMEDIATE, imm_half, "HALF", 0, F(FLD_imm16), \
4042 "a 16-bit immediate with optional left shift") \
4043 Y(IMMEDIATE, fbits, "FBITS", 0, F(FLD_scale), \
4044 "the number of bits after the binary point in the fixed-point value")\
4045 X(IMMEDIATE, 0, 0, "IMM_MOV", 0, F(), "an immediate") \
4046 Y(COND, cond, "COND", 0, F(), "a condition") \
4047 Y(COND, cond, "COND1", 0, F(), \
4048 "one of the standard conditions, excluding AL and NV.") \
4049 X(ADDRESS, 0, ext_imm, "ADDR_ADRP", OPD_F_SEXT, F(FLD_immhi, FLD_immlo),\
4050 "21-bit PC-relative address of a 4KB page") \
4051 Y(ADDRESS, imm, "ADDR_PCREL14", OPD_F_SEXT | OPD_F_SHIFT_BY_2, \
4052 F(FLD_imm14), "14-bit PC-relative address") \
4053 Y(ADDRESS, imm, "ADDR_PCREL19", OPD_F_SEXT | OPD_F_SHIFT_BY_2, \
4054 F(FLD_imm19), "19-bit PC-relative address") \
4055 Y(ADDRESS, imm, "ADDR_PCREL21", OPD_F_SEXT, F(FLD_immhi,FLD_immlo), \
4056 "21-bit PC-relative address") \
4057 Y(ADDRESS, imm, "ADDR_PCREL26", OPD_F_SEXT | OPD_F_SHIFT_BY_2, \
4058 F(FLD_imm26), "26-bit PC-relative address") \
4059 Y(ADDRESS, addr_simple, "ADDR_SIMPLE", 0, F(), \
4060 "an address with base register (no offset)") \
4061 Y(ADDRESS, addr_regoff, "ADDR_REGOFF", 0, F(), \
4062 "an address with register offset") \
4063 Y(ADDRESS, addr_simm, "ADDR_SIMM7", 0, F(FLD_imm7,FLD_index2), \
4064 "an address with 7-bit signed immediate offset") \
4065 Y(ADDRESS, addr_simm, "ADDR_SIMM9", 0, F(FLD_imm9,FLD_index), \
4066 "an address with 9-bit signed immediate offset") \
4067 Y(ADDRESS, addr_simm, "ADDR_SIMM9_2", 0, F(FLD_imm9,FLD_index), \
4068 "an address with 9-bit negative or unaligned immediate offset") \
4069 Y(ADDRESS, addr_uimm12, "ADDR_UIMM12", 0, F(FLD_Rn,FLD_imm12), \
4070 "an address with scaled, unsigned immediate offset") \
4071 Y(ADDRESS, addr_simple, "SIMD_ADDR_SIMPLE", 0, F(), \
4072 "an address with base register (no offset)") \
4073 Y(ADDRESS, simd_addr_post, "SIMD_ADDR_POST", 0, F(), \
4074 "a post-indexed address with immediate or register increment") \
4075 Y(SYSTEM, sysreg, "SYSREG", 0, F(), "a system register") \
4076 Y(SYSTEM, pstatefield, "PSTATEFIELD", 0, F(), \
4077 "a PSTATE field name") \
4078 Y(SYSTEM, sysins_op, "SYSREG_AT", 0, F(), \
4079 "an address translation operation specifier") \
4080 Y(SYSTEM, sysins_op, "SYSREG_DC", 0, F(), \
4081 "a data cache maintenance operation specifier") \
4082 Y(SYSTEM, sysins_op, "SYSREG_IC", 0, F(), \
4083 "an instruction cache maintenance operation specifier") \
4084 Y(SYSTEM, sysins_op, "SYSREG_TLBI", 0, F(), \
4085 "a TBL invalidation operation specifier") \
4086 Y(SYSTEM, barrier, "BARRIER", 0, F(), \
4087 "a barrier option name") \
4088 Y(SYSTEM, barrier, "BARRIER_ISB", 0, F(), \
4089 "the ISB option name SY or an optional 4-bit unsigned immediate") \
4090 Y(SYSTEM, prfop, "PRFOP", 0, F(), \
4091 "a prefetch operation specifier") \
4092 Y(SYSTEM, hint, "BARRIER_PSB", 0, F (), \
4093 "the PSB option name CSYNC") \
4094 Y(ADDRESS, sve_addr_ri_s4xvl, "SVE_ADDR_RI_S4xVL", \
4095 0 << OPD_F_OD_LSB, F(FLD_Rn), \
4096 "an address with a 4-bit signed offset, multiplied by VL") \
4097 Y(ADDRESS, sve_addr_ri_s4xvl, "SVE_ADDR_RI_S4x2xVL", \
4098 1 << OPD_F_OD_LSB, F(FLD_Rn), \
4099 "an address with a 4-bit signed offset, multiplied by 2*VL") \
4100 Y(ADDRESS, sve_addr_ri_s4xvl, "SVE_ADDR_RI_S4x3xVL", \
4101 2 << OPD_F_OD_LSB, F(FLD_Rn), \
4102 "an address with a 4-bit signed offset, multiplied by 3*VL") \
4103 Y(ADDRESS, sve_addr_ri_s4xvl, "SVE_ADDR_RI_S4x4xVL", \
4104 3 << OPD_F_OD_LSB, F(FLD_Rn), \
4105 "an address with a 4-bit signed offset, multiplied by 4*VL") \
4106 Y(ADDRESS, sve_addr_ri_s6xvl, "SVE_ADDR_RI_S6xVL", \
4107 0 << OPD_F_OD_LSB, F(FLD_Rn), \
4108 "an address with a 6-bit signed offset, multiplied by VL") \
4109 Y(ADDRESS, sve_addr_ri_s9xvl, "SVE_ADDR_RI_S9xVL", \
4110 0 << OPD_F_OD_LSB, F(FLD_Rn), \
4111 "an address with a 9-bit signed offset, multiplied by VL") \
4112 Y(ADDRESS, sve_addr_ri_u6, "SVE_ADDR_RI_U6", 0 << OPD_F_OD_LSB, \
4113 F(FLD_Rn), "an address with a 6-bit unsigned offset") \
4114 Y(ADDRESS, sve_addr_ri_u6, "SVE_ADDR_RI_U6x2", 1 << OPD_F_OD_LSB, \
4116 "an address with a 6-bit unsigned offset, multiplied by 2") \
4117 Y(ADDRESS, sve_addr_ri_u6, "SVE_ADDR_RI_U6x4", 2 << OPD_F_OD_LSB, \
4119 "an address with a 6-bit unsigned offset, multiplied by 4") \
4120 Y(ADDRESS, sve_addr_ri_u6, "SVE_ADDR_RI_U6x8", 3 << OPD_F_OD_LSB, \
4122 "an address with a 6-bit unsigned offset, multiplied by 8") \
4123 Y(ADDRESS, sve_addr_rr_lsl, "SVE_ADDR_RR", 0 << OPD_F_OD_LSB, \
4124 F(FLD_Rn,FLD_Rm), "an address with a scalar register offset") \
4125 Y(ADDRESS, sve_addr_rr_lsl, "SVE_ADDR_RR_LSL1", 1 << OPD_F_OD_LSB, \
4126 F(FLD_Rn,FLD_Rm), "an address with a scalar register offset") \
4127 Y(ADDRESS, sve_addr_rr_lsl, "SVE_ADDR_RR_LSL2", 2 << OPD_F_OD_LSB, \
4128 F(FLD_Rn,FLD_Rm), "an address with a scalar register offset") \
4129 Y(ADDRESS, sve_addr_rr_lsl, "SVE_ADDR_RR_LSL3", 3 << OPD_F_OD_LSB, \
4130 F(FLD_Rn,FLD_Rm), "an address with a scalar register offset") \
4131 Y(ADDRESS, sve_addr_rr_lsl, "SVE_ADDR_RX", \
4132 (0 << OPD_F_OD_LSB) | OPD_F_NO_ZR, F(FLD_Rn,FLD_Rm), \
4133 "an address with a scalar register offset") \
4134 Y(ADDRESS, sve_addr_rr_lsl, "SVE_ADDR_RX_LSL1", \
4135 (1 << OPD_F_OD_LSB) | OPD_F_NO_ZR, F(FLD_Rn,FLD_Rm), \
4136 "an address with a scalar register offset") \
4137 Y(ADDRESS, sve_addr_rr_lsl, "SVE_ADDR_RX_LSL2", \
4138 (2 << OPD_F_OD_LSB) | OPD_F_NO_ZR, F(FLD_Rn,FLD_Rm), \
4139 "an address with a scalar register offset") \
4140 Y(ADDRESS, sve_addr_rr_lsl, "SVE_ADDR_RX_LSL3", \
4141 (3 << OPD_F_OD_LSB) | OPD_F_NO_ZR, F(FLD_Rn,FLD_Rm), \
4142 "an address with a scalar register offset") \
4143 Y(ADDRESS, sve_addr_rr_lsl, "SVE_ADDR_RZ", 0 << OPD_F_OD_LSB, \
4144 F(FLD_Rn,FLD_SVE_Zm_16), \
4145 "an address with a vector register offset") \
4146 Y(ADDRESS, sve_addr_rr_lsl, "SVE_ADDR_RZ_LSL1", 1 << OPD_F_OD_LSB, \
4147 F(FLD_Rn,FLD_SVE_Zm_16), \
4148 "an address with a vector register offset") \
4149 Y(ADDRESS, sve_addr_rr_lsl, "SVE_ADDR_RZ_LSL2", 2 << OPD_F_OD_LSB, \
4150 F(FLD_Rn,FLD_SVE_Zm_16), \
4151 "an address with a vector register offset") \
4152 Y(ADDRESS, sve_addr_rr_lsl, "SVE_ADDR_RZ_LSL3", 3 << OPD_F_OD_LSB, \
4153 F(FLD_Rn,FLD_SVE_Zm_16), \
4154 "an address with a vector register offset") \
4155 Y(ADDRESS, sve_addr_rz_xtw, "SVE_ADDR_RZ_XTW_14", \
4156 0 << OPD_F_OD_LSB, F(FLD_Rn,FLD_SVE_Zm_16,FLD_SVE_xs_14), \
4157 "an address with a vector register offset") \
4158 Y(ADDRESS, sve_addr_rz_xtw, "SVE_ADDR_RZ_XTW_22", \
4159 0 << OPD_F_OD_LSB, F(FLD_Rn,FLD_SVE_Zm_16,FLD_SVE_xs_22), \
4160 "an address with a vector register offset") \
4161 Y(ADDRESS, sve_addr_rz_xtw, "SVE_ADDR_RZ_XTW1_14", \
4162 1 << OPD_F_OD_LSB, F(FLD_Rn,FLD_SVE_Zm_16,FLD_SVE_xs_14), \
4163 "an address with a vector register offset") \
4164 Y(ADDRESS, sve_addr_rz_xtw, "SVE_ADDR_RZ_XTW1_22", \
4165 1 << OPD_F_OD_LSB, F(FLD_Rn,FLD_SVE_Zm_16,FLD_SVE_xs_22), \
4166 "an address with a vector register offset") \
4167 Y(ADDRESS, sve_addr_rz_xtw, "SVE_ADDR_RZ_XTW2_14", \
4168 2 << OPD_F_OD_LSB, F(FLD_Rn,FLD_SVE_Zm_16,FLD_SVE_xs_14), \
4169 "an address with a vector register offset") \
4170 Y(ADDRESS, sve_addr_rz_xtw, "SVE_ADDR_RZ_XTW2_22", \
4171 2 << OPD_F_OD_LSB, F(FLD_Rn,FLD_SVE_Zm_16,FLD_SVE_xs_22), \
4172 "an address with a vector register offset") \
4173 Y(ADDRESS, sve_addr_rz_xtw, "SVE_ADDR_RZ_XTW3_14", \
4174 3 << OPD_F_OD_LSB, F(FLD_Rn,FLD_SVE_Zm_16,FLD_SVE_xs_14), \
4175 "an address with a vector register offset") \
4176 Y(ADDRESS, sve_addr_rz_xtw, "SVE_ADDR_RZ_XTW3_22", \
4177 3 << OPD_F_OD_LSB, F(FLD_Rn,FLD_SVE_Zm_16,FLD_SVE_xs_22), \
4178 "an address with a vector register offset") \
4179 Y(ADDRESS, sve_addr_zi_u5, "SVE_ADDR_ZI_U5", 0 << OPD_F_OD_LSB, \
4180 F(FLD_SVE_Zn), "an address with a 5-bit unsigned offset") \
4181 Y(ADDRESS, sve_addr_zi_u5, "SVE_ADDR_ZI_U5x2", 1 << OPD_F_OD_LSB, \
4183 "an address with a 5-bit unsigned offset, multiplied by 2") \
4184 Y(ADDRESS, sve_addr_zi_u5, "SVE_ADDR_ZI_U5x4", 2 << OPD_F_OD_LSB, \
4186 "an address with a 5-bit unsigned offset, multiplied by 4") \
4187 Y(ADDRESS, sve_addr_zi_u5, "SVE_ADDR_ZI_U5x8", 3 << OPD_F_OD_LSB, \
4189 "an address with a 5-bit unsigned offset, multiplied by 8") \
4190 Y(ADDRESS, sve_addr_zz_lsl, "SVE_ADDR_ZZ_LSL", 0, \
4191 F(FLD_SVE_Zn,FLD_SVE_Zm_16), \
4192 "an address with a vector register offset") \
4193 Y(ADDRESS, sve_addr_zz_sxtw, "SVE_ADDR_ZZ_SXTW", 0, \
4194 F(FLD_SVE_Zn,FLD_SVE_Zm_16), \
4195 "an address with a vector register offset") \
4196 Y(ADDRESS, sve_addr_zz_uxtw, "SVE_ADDR_ZZ_UXTW", 0, \
4197 F(FLD_SVE_Zn,FLD_SVE_Zm_16), \
4198 "an address with a vector register offset") \
4199 Y(IMMEDIATE, sve_aimm, "SVE_AIMM", 0, F(FLD_SVE_imm9), \
4200 "a 9-bit unsigned arithmetic operand") \
4201 Y(IMMEDIATE, sve_asimm, "SVE_ASIMM", 0, F(FLD_SVE_imm9), \
4202 "a 9-bit signed arithmetic operand") \
4203 Y(IMMEDIATE, fpimm, "SVE_FPIMM8", 0, F(FLD_SVE_imm8), \
4204 "an 8-bit floating-point immediate") \
4205 Y(IMMEDIATE, sve_float_half_one, "SVE_I1_HALF_ONE", 0, \
4206 F(FLD_SVE_i1), "either 0.5 or 1.0") \
4207 Y(IMMEDIATE, sve_float_half_two, "SVE_I1_HALF_TWO", 0, \
4208 F(FLD_SVE_i1), "either 0.5 or 2.0") \
4209 Y(IMMEDIATE, sve_float_zero_one, "SVE_I1_ZERO_ONE", 0, \
4210 F(FLD_SVE_i1), "either 0.0 or 1.0") \
4211 Y(IMMEDIATE, inv_limm, "SVE_INV_LIMM", 0, \
4212 F(FLD_SVE_N,FLD_SVE_immr,FLD_SVE_imms), \
4213 "an inverted 13-bit logical immediate") \
4214 Y(IMMEDIATE, limm, "SVE_LIMM", 0, \
4215 F(FLD_SVE_N,FLD_SVE_immr,FLD_SVE_imms), \
4216 "a 13-bit logical immediate") \
4217 Y(IMMEDIATE, sve_limm_mov, "SVE_LIMM_MOV", 0, \
4218 F(FLD_SVE_N,FLD_SVE_immr,FLD_SVE_imms), \
4219 "a 13-bit logical move immediate") \
4220 Y(IMMEDIATE, imm, "SVE_PATTERN", 0, F(FLD_SVE_pattern), \
4221 "an enumeration value such as POW2") \
4222 Y(IMMEDIATE, sve_scale, "SVE_PATTERN_SCALED", 0, \
4223 F(FLD_SVE_pattern), "an enumeration value such as POW2") \
4224 Y(IMMEDIATE, imm, "SVE_PRFOP", 0, F(FLD_SVE_prfop), \
4225 "an enumeration value such as PLDL1KEEP") \
4226 Y(PRED_REG, regno, "SVE_Pd", 0, F(FLD_SVE_Pd), \
4227 "an SVE predicate register") \
4228 Y(PRED_REG, regno, "SVE_Pg3", 0, F(FLD_SVE_Pg3), \
4229 "an SVE predicate register") \
4230 Y(PRED_REG, regno, "SVE_Pg4_5", 0, F(FLD_SVE_Pg4_5), \
4231 "an SVE predicate register") \
4232 Y(PRED_REG, regno, "SVE_Pg4_10", 0, F(FLD_SVE_Pg4_10), \
4233 "an SVE predicate register") \
4234 Y(PRED_REG, regno, "SVE_Pg4_16", 0, F(FLD_SVE_Pg4_16), \
4235 "an SVE predicate register") \
4236 Y(PRED_REG, regno, "SVE_Pm", 0, F(FLD_SVE_Pm), \
4237 "an SVE predicate register") \
4238 Y(PRED_REG, regno, "SVE_Pn", 0, F(FLD_SVE_Pn), \
4239 "an SVE predicate register") \
4240 Y(PRED_REG, regno, "SVE_Pt", 0, F(FLD_SVE_Pt), \
4241 "an SVE predicate register") \
4242 Y(INT_REG, regno, "SVE_Rm", 0, F(FLD_SVE_Rm), \
4243 "an integer register or zero") \
4244 Y(INT_REG, regno, "SVE_Rn_SP", OPD_F_MAYBE_SP, F(FLD_SVE_Rn), \
4245 "an integer register or SP") \
4246 Y(IMMEDIATE, sve_shlimm, "SVE_SHLIMM_PRED", 0, \
4247 F(FLD_SVE_tszh,FLD_SVE_imm5), "a shift-left immediate operand") \
4248 Y(IMMEDIATE, sve_shlimm, "SVE_SHLIMM_UNPRED", 0, \
4249 F(FLD_SVE_tszh,FLD_imm5), "a shift-left immediate operand") \
4250 Y(IMMEDIATE, sve_shrimm, "SVE_SHRIMM_PRED", 0, \
4251 F(FLD_SVE_tszh,FLD_SVE_imm5), "a shift-right immediate operand") \
4252 Y(IMMEDIATE, sve_shrimm, "SVE_SHRIMM_UNPRED", 0, \
4253 F(FLD_SVE_tszh,FLD_imm5), "a shift-right immediate operand") \
4254 Y(IMMEDIATE, imm, "SVE_SIMM5", OPD_F_SEXT, F(FLD_SVE_imm5), \
4255 "a 5-bit signed immediate") \
4256 Y(IMMEDIATE, imm, "SVE_SIMM5B", OPD_F_SEXT, F(FLD_SVE_imm5b), \
4257 "a 5-bit signed immediate") \
4258 Y(IMMEDIATE, imm, "SVE_SIMM6", OPD_F_SEXT, F(FLD_SVE_imms), \
4259 "a 6-bit signed immediate") \
4260 Y(IMMEDIATE, imm, "SVE_SIMM8", OPD_F_SEXT, F(FLD_SVE_imm8), \
4261 "an 8-bit signed immediate") \
4262 Y(IMMEDIATE, imm, "SVE_UIMM3", 0, F(FLD_SVE_imm3), \
4263 "a 3-bit unsigned immediate") \
4264 Y(IMMEDIATE, imm, "SVE_UIMM7", 0, F(FLD_SVE_imm7), \
4265 "a 7-bit unsigned immediate") \
4266 Y(IMMEDIATE, imm, "SVE_UIMM8", 0, F(FLD_SVE_imm8), \
4267 "an 8-bit unsigned immediate") \
4268 Y(IMMEDIATE, imm, "SVE_UIMM8_53", 0, F(FLD_imm5,FLD_imm3), \
4269 "an 8-bit unsigned immediate") \
4270 Y(SIMD_REG, regno, "SVE_VZn", 0, F(FLD_SVE_Zn), "a SIMD register") \
4271 Y(SIMD_REG, regno, "SVE_Vd", 0, F(FLD_SVE_Vd), "a SIMD register") \
4272 Y(SIMD_REG, regno, "SVE_Vm", 0, F(FLD_SVE_Vm), "a SIMD register") \
4273 Y(SIMD_REG, regno, "SVE_Vn", 0, F(FLD_SVE_Vn), "a SIMD register") \
4274 Y(SVE_REG, regno, "SVE_Za_5", 0, F(FLD_SVE_Za_5), \
4275 "an SVE vector register") \
4276 Y(SVE_REG, regno, "SVE_Za_16", 0, F(FLD_SVE_Za_16), \
4277 "an SVE vector register") \
4278 Y(SVE_REG, regno, "SVE_Zd", 0, F(FLD_SVE_Zd), \
4279 "an SVE vector register") \
4280 Y(SVE_REG, regno, "SVE_Zm_5", 0, F(FLD_SVE_Zm_5), \
4281 "an SVE vector register") \
4282 Y(SVE_REG, regno, "SVE_Zm_16", 0, F(FLD_SVE_Zm_16), \
4283 "an SVE vector register") \
4284 Y(SVE_REG, regno, "SVE_Zn", 0, F(FLD_SVE_Zn), \
4285 "an SVE vector register") \
4286 Y(SVE_REG, sve_index, "SVE_Zn_INDEX", 0, F(FLD_SVE_Zn), \
4287 "an indexed SVE vector register") \
4288 Y(SVE_REG, sve_reglist, "SVE_ZnxN", 0, F(FLD_SVE_Zn), \
4289 "a list of SVE vector registers") \
4290 Y(SVE_REG, regno, "SVE_Zt", 0, F(FLD_SVE_Zt), \
4291 "an SVE vector register") \
4292 Y(SVE_REG, sve_reglist, "SVE_ZtxN", 0, F(FLD_SVE_Zt), \
4293 "a list of SVE vector registers")