1 /* Instruction printing code for the ARM
2 Copyright (C) 1994, 95, 96, 1997 Free Software Foundation, Inc.
3 Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
4 Modification by James G. Smith (jsmith@cygnus.co.uk)
6 This file is part of libopcodes.
8 This program is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2 of the License, or (at your option)
13 This program is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 #include "coff/internal.h"
28 static char *arm_conditional
[] =
29 {"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
30 "hi", "ls", "ge", "lt", "gt", "le", "", "nv"};
32 static char *arm_regnames
[] =
33 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
34 "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc"};
36 static char *arm_fp_const
[] =
37 {"0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0"};
39 static char *arm_shift
[] =
40 {"lsl", "lsr", "asr", "ror"};
42 static int print_insn_arm
PARAMS ((bfd_vma
, struct disassemble_info
*,
46 arm_decode_shift (given
, func
, stream
)
51 func (stream
, "%s", arm_regnames
[given
& 0xf]);
52 if ((given
& 0xff0) != 0)
54 if ((given
& 0x10) == 0)
56 int amount
= (given
& 0xf80) >> 7;
57 int shift
= (given
& 0x60) >> 5;
62 func (stream
, ", rrx");
67 func (stream
, ", %s #%d", arm_shift
[shift
], amount
);
70 func (stream
, ", %s %s", arm_shift
[(given
& 0x60) >> 5],
71 arm_regnames
[(given
& 0xf00) >> 8]);
75 /* Print one instruction from PC on INFO->STREAM.
76 Return the size of the instruction (always 4 on ARM). */
79 print_insn_arm (pc
, info
, given
)
81 struct disassemble_info
*info
;
84 struct arm_opcode
*insn
;
85 void *stream
= info
->stream
;
86 fprintf_ftype func
= info
->fprintf_func
;
88 for (insn
= arm_opcodes
; insn
->assembler
; insn
++)
90 if ((given
& insn
->mask
) == insn
->value
)
93 for (c
= insn
->assembler
; *c
; c
++)
104 if (((given
& 0x000f0000) == 0x000f0000)
105 && ((given
& 0x02000000) == 0))
107 int offset
= given
& 0xfff;
108 if ((given
& 0x00800000) == 0)
110 (*info
->print_address_func
)
111 (offset
+ pc
+ 8, info
);
116 arm_regnames
[(given
>> 16) & 0xf]);
117 if ((given
& 0x01000000) != 0)
119 if ((given
& 0x02000000) == 0)
121 int offset
= given
& 0xfff;
123 func (stream
, ", %s#%d",
124 (((given
& 0x00800000) == 0)
125 ? "-" : ""), offset
);
129 func (stream
, ", %s",
130 (((given
& 0x00800000) == 0)
132 arm_decode_shift (given
, func
, stream
);
136 ((given
& 0x00200000) != 0) ? "!" : "");
140 if ((given
& 0x02000000) == 0)
142 int offset
= given
& 0xfff;
144 func (stream
, "], %s#%d",
145 (((given
& 0x00800000) == 0)
146 ? "-" : ""), offset
);
152 func (stream
, "], %s",
153 (((given
& 0x00800000) == 0)
155 arm_decode_shift (given
, func
, stream
);
162 if ((given
& 0x004f0000) == 0x004f0000)
164 /* PC relative with immediate offset */
165 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
166 if ((given
& 0x00800000) == 0)
168 (*info
->print_address_func
)
169 (offset
+ pc
+ 8, info
);
174 arm_regnames
[(given
>> 16) & 0xf]);
175 if ((given
& 0x01000000) != 0)
178 if ((given
& 0x00400000) == 0x00400000)
181 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
183 func (stream
, ", %s#%d",
184 (((given
& 0x00800000) == 0)
185 ? "-" : ""), offset
);
190 func (stream
, ", %s%s",
191 (((given
& 0x00800000) == 0)
193 arm_regnames
[given
& 0xf]);
197 ((given
& 0x00200000) != 0) ? "!" : "");
202 if ((given
& 0x00400000) == 0x00400000)
205 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
207 func (stream
, "], %s#%d",
208 (((given
& 0x00800000) == 0)
209 ? "-" : ""), offset
);
216 func (stream
, "], %s%s",
217 (((given
& 0x00800000) == 0)
219 arm_regnames
[given
& 0xf]);
226 (*info
->print_address_func
)
227 (BDISP (given
) * 4 + pc
+ 8, info
);
232 arm_conditional
[(given
>> 28) & 0xf]);
241 for (reg
= 0; reg
< 16; reg
++)
242 if ((given
& (1 << reg
)) != 0)
247 func (stream
, "%s", arm_regnames
[reg
]);
254 if ((given
& 0x02000000) != 0)
256 int rotate
= (given
& 0xf00) >> 7;
257 int immed
= (given
& 0xff);
259 ((immed
<< (32 - rotate
))
260 | (immed
>> rotate
)) & 0xffffffff);
263 arm_decode_shift (given
, func
, stream
);
267 if ((given
& 0x0000f000) == 0x0000f000)
272 if ((given
& 0x01200000) == 0x00200000)
277 if ((given
& 0x00000020) == 0x00000020)
284 func (stream
, "[%s", arm_regnames
[(given
>> 16) & 0xf]);
285 if ((given
& 0x01000000) != 0)
287 int offset
= given
& 0xff;
289 func (stream
, ", %s#%d]%s",
290 ((given
& 0x00800000) == 0 ? "-" : ""),
292 ((given
& 0x00200000) != 0 ? "!" : ""));
298 int offset
= given
& 0xff;
300 func (stream
, "], %s#%d",
301 ((given
& 0x00800000) == 0 ? "-" : ""),
309 switch (given
& 0x00090000)
312 func (stream
, "_???");
315 func (stream
, "_ctl");
318 func (stream
, "_flg");
324 switch (given
& 0x00408000)
341 switch (given
& 0x00080080)
353 func (stream
, "<illegal precision>");
358 switch (given
& 0x00408000)
375 switch (given
& 0x60)
391 case '0': case '1': case '2': case '3': case '4':
392 case '5': case '6': case '7': case '8': case '9':
394 int bitstart
= *c
++ - '0';
396 while (*c
>= '0' && *c
<= '9')
397 bitstart
= (bitstart
* 10) + *c
++ - '0';
403 while (*c
>= '0' && *c
<= '9')
404 bitend
= (bitend
* 10) + *c
++ - '0';
412 reg
= given
>> bitstart
;
413 reg
&= (2 << (bitend
- bitstart
)) - 1;
414 func (stream
, "%s", arm_regnames
[reg
]);
420 reg
= given
>> bitstart
;
421 reg
&= (2 << (bitend
- bitstart
)) - 1;
422 func (stream
, "%d", reg
);
428 reg
= given
>> bitstart
;
429 reg
&= (2 << (bitend
- bitstart
)) - 1;
430 func (stream
, "0x%08x", reg
);
436 reg
= given
>> bitstart
;
437 reg
&= (2 << (bitend
- bitstart
)) - 1;
440 arm_fp_const
[reg
& 7]);
442 func (stream
, "f%d", reg
);
451 if ((given
& (1 << bitstart
)) == 0)
452 func (stream
, "%c", *c
);
456 if ((given
& (1 << bitstart
)) != 0)
457 func (stream
, "%c", *c
);
461 if ((given
& (1 << bitstart
)) != 0)
462 func (stream
, "%c", *c
++);
464 func (stream
, "%c", *++c
);
477 func (stream
, "%c", *c
);
485 /* Print one instruction from PC on INFO->STREAM.
486 Return the size of the instruction. */
489 print_insn_thumb (pc
, info
, given
)
491 struct disassemble_info
*info
;
494 struct thumb_opcode
*insn
;
495 void *stream
= info
->stream
;
496 fprintf_ftype func
= info
->fprintf_func
;
498 for (insn
= thumb_opcodes
; insn
->assembler
; insn
++)
500 if ((given
& insn
->mask
) == insn
->value
)
502 char *c
= insn
->assembler
;
504 /* Special processing for Thumb 2 instruction BL sequence: */
505 if (!*c
) /* check for empty (not NULL) assembler string */
507 info
->bytes_per_chunk
= 4;
508 info
->bytes_per_line
= 4;
510 func (stream
, "%04x\tbl\t", given
& 0xffff);
511 (*info
->print_address_func
)
512 (BDISP23 (given
) * 2 + pc
+ 4, info
);
517 info
->bytes_per_chunk
= 2;
518 info
->bytes_per_line
= 4;
521 func (stream
, "%04x\t", given
);
537 reg
= (given
>> 3) & 0x7;
538 if (given
& (1 << 6))
540 func (stream
, "%s", arm_regnames
[reg
]);
548 if (given
& (1 << 7))
550 func (stream
, "%s", arm_regnames
[reg
]);
556 arm_conditional
[(given
>> 8) & 0xf]);
560 if (given
& (1 << 8))
564 if (*c
== 'O' && (given
& (1 << 8)))
572 /* It would be nice if we could spot
573 ranges, and generate the rS-rE format: */
574 for (reg
= 0; (reg
< 8); reg
++)
575 if ((given
& (1 << reg
)) != 0)
580 func (stream
, "%s", arm_regnames
[reg
]);
603 case '0': case '1': case '2': case '3': case '4':
604 case '5': case '6': case '7': case '8': case '9':
606 int bitstart
= *c
++ - '0';
608 while (*c
>= '0' && *c
<= '9')
609 bitstart
= (bitstart
* 10) + *c
++ - '0';
617 while (*c
>= '0' && *c
<= '9')
618 bitend
= (bitend
* 10) + *c
++ - '0';
621 reg
= given
>> bitstart
;
622 reg
&= (2 << (bitend
- bitstart
)) - 1;
626 func (stream
, "%s", arm_regnames
[reg
]);
630 func (stream
, "%d", reg
);
634 func (stream
, "%d", reg
<< 1);
638 func (stream
, "%d", reg
<< 2);
642 info
->print_address_func (((pc
+ 4) & ~1) + (reg
<< 2), info
);
646 func (stream
, "0x%04x", reg
);
650 reg
= ((reg
^ (1 << bitend
)) - (1 << bitend
));
651 func (stream
, "%d", reg
);
655 reg
= ((reg
^ (1 << bitend
)) - (1 << bitend
));
656 (*info
->print_address_func
)
657 (reg
* 2 + pc
+ 4, info
);
668 if ((given
& (1 << bitstart
)) != 0)
669 func (stream
, "%c", *c
);
674 if ((given
& (1 << bitstart
)) != 0)
675 func (stream
, "%c", *c
++);
677 func (stream
, "%c", *++c
);
691 func (stream
, "%c", *c
);
702 /* NOTE: There are no checks in these routines that the relevant number of data bytes exist */
705 print_insn_big_arm (pc
, info
)
707 struct disassemble_info
*info
;
712 coff_symbol_type
* cs
;
715 cs
= coffsymbol (*info
->symbols
);
716 is_thumb
= (cs
!= NULL
) &&
717 ( cs
->native
->u
.syment
.n_sclass
== C_THUMBEXT
718 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTAT
719 || cs
->native
->u
.syment
.n_sclass
== C_THUMBLABEL
720 || cs
->native
->u
.syment
.n_sclass
== C_THUMBEXTFUNC
721 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTATFUNC
);
723 info
->bytes_per_chunk
= 4;
724 info
->display_endian
= BFD_ENDIAN_BIG
;
726 /* Always fetch word aligned values. */
728 status
= (*info
->read_memory_func
) (pc
& ~ 0x3, (bfd_byte
*) &b
[0], 4, info
);
731 (*info
->memory_error_func
) (status
, pc
, info
);
739 given
= (b
[2] << 8) | b
[3];
741 status
= info
->read_memory_func ((pc
+ 4) & ~ 0x3, (bfd_byte
*) b
, 4, info
);
744 info
->memory_error_func (status
, pc
+ 4, info
);
748 given
|= (b
[0] << 24) | (b
[1] << 16);
752 given
= (b
[0] << 8) | b
[1] | (b
[2] << 24) | (b
[3] << 16);
757 given
= (b
[0] << 24) | (b
[1] << 16) | (b
[2] << 8) | (b
[3]);
762 status
= print_insn_thumb (pc
, info
, given
);
766 status
= print_insn_arm (pc
, info
, given
);
773 print_insn_little_arm (pc
, info
)
775 struct disassemble_info
* info
;
780 coff_symbol_type
* cs
;
783 cs
= coffsymbol (*info
->symbols
);
784 is_thumb
= (cs
!= NULL
) &&
785 ( cs
->native
->u
.syment
.n_sclass
== C_THUMBEXT
786 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTAT
787 || cs
->native
->u
.syment
.n_sclass
== C_THUMBLABEL
788 || cs
->native
->u
.syment
.n_sclass
== C_THUMBEXTFUNC
789 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTATFUNC
);
791 info
->bytes_per_chunk
= 4;
792 info
->display_endian
= BFD_ENDIAN_LITTLE
;
794 status
= (*info
->read_memory_func
) (pc
, (bfd_byte
*) &b
[0], 4, info
);
795 if (status
!= 0 && is_thumb
)
797 info
->bytes_per_chunk
= 2;
799 status
= info
->read_memory_func (pc
, (bfd_byte
*) b
, 2, info
);
804 (*info
->memory_error_func
) (status
, pc
, info
);
808 given
= (b
[0]) | (b
[1] << 8) | (b
[2] << 16) | (b
[3] << 24);
812 status
= print_insn_thumb (pc
, info
, given
);
816 status
= print_insn_arm (pc
, info
, given
);
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