1 /* Instruction printing code for the ARM
2 Copyright (C) 1994, 95, 96, 97, 1998 Free Software Foundation, Inc.
3 Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
4 Modification by James G. Smith (jsmith@cygnus.co.uk)
6 This file is part of libopcodes.
8 This program is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2 of the License, or (at your option)
13 This program is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 #include "coff/internal.h"
29 /* FIXME: This shouldn't be done here */
31 #include "elf/internal.h"
33 static char *arm_conditional
[] =
34 {"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
35 "hi", "ls", "ge", "lt", "gt", "le", "", "nv"};
37 static char *arm_regnames
[] =
38 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
39 "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc"};
41 static char *arm_fp_const
[] =
42 {"0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0"};
44 static char *arm_shift
[] =
45 {"lsl", "lsr", "asr", "ror"};
47 static int print_insn_arm
PARAMS ((bfd_vma
, struct disassemble_info
*,
51 arm_decode_shift (given
, func
, stream
)
56 func (stream
, "%s", arm_regnames
[given
& 0xf]);
57 if ((given
& 0xff0) != 0)
59 if ((given
& 0x10) == 0)
61 int amount
= (given
& 0xf80) >> 7;
62 int shift
= (given
& 0x60) >> 5;
67 func (stream
, ", rrx");
72 func (stream
, ", %s #%d", arm_shift
[shift
], amount
);
75 func (stream
, ", %s %s", arm_shift
[(given
& 0x60) >> 5],
76 arm_regnames
[(given
& 0xf00) >> 8]);
80 /* Print one instruction from PC on INFO->STREAM.
81 Return the size of the instruction (always 4 on ARM). */
84 print_insn_arm (pc
, info
, given
)
86 struct disassemble_info
*info
;
89 struct arm_opcode
*insn
;
90 void *stream
= info
->stream
;
91 fprintf_ftype func
= info
->fprintf_func
;
93 for (insn
= arm_opcodes
; insn
->assembler
; insn
++)
95 if ((given
& insn
->mask
) == insn
->value
)
98 for (c
= insn
->assembler
; *c
; c
++)
109 if (((given
& 0x000f0000) == 0x000f0000)
110 && ((given
& 0x02000000) == 0))
112 int offset
= given
& 0xfff;
113 if ((given
& 0x00800000) == 0)
115 (*info
->print_address_func
)
116 (offset
+ pc
+ 8, info
);
121 arm_regnames
[(given
>> 16) & 0xf]);
122 if ((given
& 0x01000000) != 0)
124 if ((given
& 0x02000000) == 0)
126 int offset
= given
& 0xfff;
128 func (stream
, ", %s#%d",
129 (((given
& 0x00800000) == 0)
130 ? "-" : ""), offset
);
134 func (stream
, ", %s",
135 (((given
& 0x00800000) == 0)
137 arm_decode_shift (given
, func
, stream
);
141 ((given
& 0x00200000) != 0) ? "!" : "");
145 if ((given
& 0x02000000) == 0)
147 int offset
= given
& 0xfff;
149 func (stream
, "], %s#%d",
150 (((given
& 0x00800000) == 0)
151 ? "-" : ""), offset
);
157 func (stream
, "], %s",
158 (((given
& 0x00800000) == 0)
160 arm_decode_shift (given
, func
, stream
);
167 if ((given
& 0x004f0000) == 0x004f0000)
169 /* PC relative with immediate offset */
170 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
171 if ((given
& 0x00800000) == 0)
173 (*info
->print_address_func
)
174 (offset
+ pc
+ 8, info
);
179 arm_regnames
[(given
>> 16) & 0xf]);
180 if ((given
& 0x01000000) != 0)
183 if ((given
& 0x00400000) == 0x00400000)
186 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
188 func (stream
, ", %s#%d",
189 (((given
& 0x00800000) == 0)
190 ? "-" : ""), offset
);
195 func (stream
, ", %s%s",
196 (((given
& 0x00800000) == 0)
198 arm_regnames
[given
& 0xf]);
202 ((given
& 0x00200000) != 0) ? "!" : "");
207 if ((given
& 0x00400000) == 0x00400000)
210 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
212 func (stream
, "], %s#%d",
213 (((given
& 0x00800000) == 0)
214 ? "-" : ""), offset
);
221 func (stream
, "], %s%s",
222 (((given
& 0x00800000) == 0)
224 arm_regnames
[given
& 0xf]);
231 (*info
->print_address_func
)
232 (BDISP (given
) * 4 + pc
+ 8, info
);
237 arm_conditional
[(given
>> 28) & 0xf]);
246 for (reg
= 0; reg
< 16; reg
++)
247 if ((given
& (1 << reg
)) != 0)
252 func (stream
, "%s", arm_regnames
[reg
]);
259 if ((given
& 0x02000000) != 0)
261 int rotate
= (given
& 0xf00) >> 7;
262 int immed
= (given
& 0xff);
264 ((immed
<< (32 - rotate
))
265 | (immed
>> rotate
)) & 0xffffffff);
268 arm_decode_shift (given
, func
, stream
);
272 if ((given
& 0x0000f000) == 0x0000f000)
277 if ((given
& 0x01200000) == 0x00200000)
282 if ((given
& 0x00000020) == 0x00000020)
289 func (stream
, "[%s", arm_regnames
[(given
>> 16) & 0xf]);
290 if ((given
& 0x01000000) != 0)
292 int offset
= given
& 0xff;
294 func (stream
, ", %s#%d]%s",
295 ((given
& 0x00800000) == 0 ? "-" : ""),
297 ((given
& 0x00200000) != 0 ? "!" : ""));
303 int offset
= given
& 0xff;
305 func (stream
, "], %s#%d",
306 ((given
& 0x00800000) == 0 ? "-" : ""),
314 switch (given
& 0x00090000)
317 func (stream
, "_???");
320 func (stream
, "_all");
323 func (stream
, "_ctl");
326 func (stream
, "_flg");
332 switch (given
& 0x00408000)
349 switch (given
& 0x00080080)
361 func (stream
, _("<illegal precision>"));
366 switch (given
& 0x00408000)
383 switch (given
& 0x60)
399 case '0': case '1': case '2': case '3': case '4':
400 case '5': case '6': case '7': case '8': case '9':
402 int bitstart
= *c
++ - '0';
404 while (*c
>= '0' && *c
<= '9')
405 bitstart
= (bitstart
* 10) + *c
++ - '0';
411 while (*c
>= '0' && *c
<= '9')
412 bitend
= (bitend
* 10) + *c
++ - '0';
420 reg
= given
>> bitstart
;
421 reg
&= (2 << (bitend
- bitstart
)) - 1;
422 func (stream
, "%s", arm_regnames
[reg
]);
428 reg
= given
>> bitstart
;
429 reg
&= (2 << (bitend
- bitstart
)) - 1;
430 func (stream
, "%d", reg
);
436 reg
= given
>> bitstart
;
437 reg
&= (2 << (bitend
- bitstart
)) - 1;
438 func (stream
, "0x%08x", reg
);
444 reg
= given
>> bitstart
;
445 reg
&= (2 << (bitend
- bitstart
)) - 1;
448 arm_fp_const
[reg
& 7]);
450 func (stream
, "f%d", reg
);
459 if ((given
& (1 << bitstart
)) == 0)
460 func (stream
, "%c", *c
);
464 if ((given
& (1 << bitstart
)) != 0)
465 func (stream
, "%c", *c
);
469 if ((given
& (1 << bitstart
)) != 0)
470 func (stream
, "%c", *c
++);
472 func (stream
, "%c", *++c
);
485 func (stream
, "%c", *c
);
493 /* Print one instruction from PC on INFO->STREAM.
494 Return the size of the instruction. */
497 print_insn_thumb (pc
, info
, given
)
499 struct disassemble_info
*info
;
502 struct thumb_opcode
*insn
;
503 void *stream
= info
->stream
;
504 fprintf_ftype func
= info
->fprintf_func
;
506 for (insn
= thumb_opcodes
; insn
->assembler
; insn
++)
508 if ((given
& insn
->mask
) == insn
->value
)
510 char *c
= insn
->assembler
;
512 /* Special processing for Thumb 2 instruction BL sequence: */
513 if (!*c
) /* check for empty (not NULL) assembler string */
515 info
->bytes_per_chunk
= 4;
516 info
->bytes_per_line
= 4;
518 func (stream
, "%04x\tbl\t", given
& 0xffff);
519 (*info
->print_address_func
)
520 (BDISP23 (given
) * 2 + pc
+ 4, info
);
525 info
->bytes_per_chunk
= 2;
526 info
->bytes_per_line
= 4;
529 func (stream
, "%04x\t", given
);
545 reg
= (given
>> 3) & 0x7;
546 if (given
& (1 << 6))
548 func (stream
, "%s", arm_regnames
[reg
]);
556 if (given
& (1 << 7))
558 func (stream
, "%s", arm_regnames
[reg
]);
564 arm_conditional
[(given
>> 8) & 0xf]);
568 if (given
& (1 << 8))
572 if (*c
== 'O' && (given
& (1 << 8)))
580 /* It would be nice if we could spot
581 ranges, and generate the rS-rE format: */
582 for (reg
= 0; (reg
< 8); reg
++)
583 if ((given
& (1 << reg
)) != 0)
588 func (stream
, "%s", arm_regnames
[reg
]);
611 case '0': case '1': case '2': case '3': case '4':
612 case '5': case '6': case '7': case '8': case '9':
614 int bitstart
= *c
++ - '0';
616 while (*c
>= '0' && *c
<= '9')
617 bitstart
= (bitstart
* 10) + *c
++ - '0';
625 while (*c
>= '0' && *c
<= '9')
626 bitend
= (bitend
* 10) + *c
++ - '0';
629 reg
= given
>> bitstart
;
630 reg
&= (2 << (bitend
- bitstart
)) - 1;
634 func (stream
, "%s", arm_regnames
[reg
]);
638 func (stream
, "%d", reg
);
642 func (stream
, "%d", reg
<< 1);
646 func (stream
, "%d", reg
<< 2);
650 /* PC-relative address -- the bottom two
651 bits of the address are dropped before
653 info
->print_address_func
654 (((pc
+ 4) & ~3) + (reg
<< 2), info
);
658 func (stream
, "0x%04x", reg
);
662 reg
= ((reg
^ (1 << bitend
)) - (1 << bitend
));
663 func (stream
, "%d", reg
);
667 reg
= ((reg
^ (1 << bitend
)) - (1 << bitend
));
668 (*info
->print_address_func
)
669 (reg
* 2 + pc
+ 4, info
);
680 if ((given
& (1 << bitstart
)) != 0)
681 func (stream
, "%c", *c
);
686 if ((given
& (1 << bitstart
)) != 0)
687 func (stream
, "%c", *c
++);
689 func (stream
, "%c", *++c
);
703 func (stream
, "%c", *c
);
714 /* NOTE: There are no checks in these routines that the relevant number of data bytes exist */
717 print_insn_big_arm (pc
, info
)
719 struct disassemble_info
*info
;
724 coff_symbol_type
*cs
;
729 if (info
->symbols
!= NULL
)
731 if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_coff_flavour
)
733 cs
= coffsymbol (*info
->symbols
);
734 is_thumb
= (cs
->native
->u
.syment
.n_sclass
== C_THUMBEXT
735 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTAT
736 || cs
->native
->u
.syment
.n_sclass
== C_THUMBLABEL
737 || cs
->native
->u
.syment
.n_sclass
== C_THUMBEXTFUNC
738 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTATFUNC
);
741 else if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_elf_flavour
)
743 es
= *(elf_symbol_type
**)(info
->symbols
);
744 is_thumb
= ELF_ST_TYPE (es
->internal_elf_sym
.st_info
) ==
749 info
->bytes_per_chunk
= 4;
750 info
->display_endian
= BFD_ENDIAN_BIG
;
752 /* Always fetch word aligned values. */
754 status
= (*info
->read_memory_func
) (pc
& ~ 0x3, (bfd_byte
*) &b
[0], 4, info
);
757 (*info
->memory_error_func
) (status
, pc
, info
);
765 given
= (b
[2] << 8) | b
[3];
767 status
= info
->read_memory_func ((pc
+ 4) & ~ 0x3, (bfd_byte
*) b
, 4, info
);
770 info
->memory_error_func (status
, pc
+ 4, info
);
774 given
|= (b
[0] << 24) | (b
[1] << 16);
778 given
= (b
[0] << 8) | b
[1] | (b
[2] << 24) | (b
[3] << 16);
783 given
= (b
[0] << 24) | (b
[1] << 16) | (b
[2] << 8) | (b
[3]);
788 status
= print_insn_thumb (pc
, info
, given
);
792 status
= print_insn_arm (pc
, info
, given
);
799 print_insn_little_arm (pc
, info
)
801 struct disassemble_info
* info
;
806 coff_symbol_type
*cs
;
811 if (info
->symbols
!= NULL
)
813 if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_coff_flavour
)
815 cs
= coffsymbol (*info
->symbols
);
816 is_thumb
= (cs
->native
->u
.syment
.n_sclass
== C_THUMBEXT
817 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTAT
818 || cs
->native
->u
.syment
.n_sclass
== C_THUMBLABEL
819 || cs
->native
->u
.syment
.n_sclass
== C_THUMBEXTFUNC
820 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTATFUNC
);
823 else if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_elf_flavour
)
825 es
= *(elf_symbol_type
**)(info
->symbols
);
826 is_thumb
= ELF_ST_TYPE (es
->internal_elf_sym
.st_info
) ==
831 info
->bytes_per_chunk
= 4;
832 info
->display_endian
= BFD_ENDIAN_LITTLE
;
834 status
= (*info
->read_memory_func
) (pc
, (bfd_byte
*) &b
[0], 4, info
);
835 if (status
!= 0 && is_thumb
)
837 info
->bytes_per_chunk
= 2;
839 status
= info
->read_memory_func (pc
, (bfd_byte
*) b
, 2, info
);
844 (*info
->memory_error_func
) (status
, pc
, info
);
848 given
= (b
[0]) | (b
[1] << 8) | (b
[2] << 16) | (b
[3] << 24);
852 status
= print_insn_thumb (pc
, info
, given
);
856 status
= print_insn_arm (pc
, info
, given
);
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