1 /* Instruction printing code for the ARM
2 Copyright (C) 1994, 95, 96, 97, 1998 Free Software Foundation, Inc.
3 Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
4 Modification by James G. Smith (jsmith@cygnus.co.uk)
6 This file is part of libopcodes.
8 This program is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2 of the License, or (at your option)
13 This program is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 #include "coff/internal.h"
29 /* FIXME: This shouldn't be done here */
31 #include "elf/internal.h"
34 static char *arm_conditional
[] =
35 {"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
36 "hi", "ls", "ge", "lt", "gt", "le", "", "nv"};
38 static char *arm_regnames
[] =
39 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
40 "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc"};
42 static char *arm_fp_const
[] =
43 {"0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0"};
45 static char *arm_shift
[] =
46 {"lsl", "lsr", "asr", "ror"};
48 static int print_insn_arm
PARAMS ((bfd_vma
, struct disassemble_info
*,
52 arm_decode_shift (given
, func
, stream
)
57 func (stream
, "%s", arm_regnames
[given
& 0xf]);
58 if ((given
& 0xff0) != 0)
60 if ((given
& 0x10) == 0)
62 int amount
= (given
& 0xf80) >> 7;
63 int shift
= (given
& 0x60) >> 5;
68 func (stream
, ", rrx");
73 func (stream
, ", %s #%d", arm_shift
[shift
], amount
);
76 func (stream
, ", %s %s", arm_shift
[(given
& 0x60) >> 5],
77 arm_regnames
[(given
& 0xf00) >> 8]);
81 /* Print one instruction from PC on INFO->STREAM.
82 Return the size of the instruction (always 4 on ARM). */
85 print_insn_arm (pc
, info
, given
)
87 struct disassemble_info
*info
;
90 struct arm_opcode
* insn
;
91 void * stream
= info
->stream
;
92 fprintf_ftype func
= info
->fprintf_func
;
94 for (insn
= arm_opcodes
; insn
->assembler
; insn
++)
96 if ((given
& insn
->mask
) == insn
->value
)
100 for (c
= insn
->assembler
; *c
; c
++)
111 if (((given
& 0x000f0000) == 0x000f0000)
112 && ((given
& 0x02000000) == 0))
114 int offset
= given
& 0xfff;
116 func (stream
, "[pc");
118 if (given
& 0x01000000)
120 if ((given
& 0x00800000) == 0)
124 func (stream
, ", #%x]", offset
);
128 /* Cope with the possibility of write-back being used.
129 Probably a very dangerous thing for the programmer
130 to do, but who are we to argue ? */
131 if (given
& 0x00200000)
137 func (stream
, "], #%x", offset
);
139 offset
= pc
+ 8; /* ie ignore the offset */
142 func (stream
, "\t; ");
143 info
->print_address_func (offset
, info
);
148 arm_regnames
[(given
>> 16) & 0xf]);
149 if ((given
& 0x01000000) != 0)
151 if ((given
& 0x02000000) == 0)
153 int offset
= given
& 0xfff;
155 func (stream
, ", %s#%d",
156 (((given
& 0x00800000) == 0)
157 ? "-" : ""), offset
);
161 func (stream
, ", %s",
162 (((given
& 0x00800000) == 0)
164 arm_decode_shift (given
, func
, stream
);
168 ((given
& 0x00200000) != 0) ? "!" : "");
172 if ((given
& 0x02000000) == 0)
174 int offset
= given
& 0xfff;
176 func (stream
, "], %s#%d",
177 (((given
& 0x00800000) == 0)
178 ? "-" : ""), offset
);
184 func (stream
, "], %s",
185 (((given
& 0x00800000) == 0)
187 arm_decode_shift (given
, func
, stream
);
194 if ((given
& 0x004f0000) == 0x004f0000)
196 /* PC relative with immediate offset */
197 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
199 if ((given
& 0x00800000) == 0)
202 func (stream
, "[pc, #%x]\t; ", offset
);
204 (*info
->print_address_func
)
205 (offset
+ pc
+ 8, info
);
210 arm_regnames
[(given
>> 16) & 0xf]);
211 if ((given
& 0x01000000) != 0)
214 if ((given
& 0x00400000) == 0x00400000)
217 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
219 func (stream
, ", %s#%d",
220 (((given
& 0x00800000) == 0)
221 ? "-" : ""), offset
);
226 func (stream
, ", %s%s",
227 (((given
& 0x00800000) == 0)
229 arm_regnames
[given
& 0xf]);
233 ((given
& 0x00200000) != 0) ? "!" : "");
238 if ((given
& 0x00400000) == 0x00400000)
241 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
243 func (stream
, "], %s#%d",
244 (((given
& 0x00800000) == 0)
245 ? "-" : ""), offset
);
252 func (stream
, "], %s%s",
253 (((given
& 0x00800000) == 0)
255 arm_regnames
[given
& 0xf]);
262 (*info
->print_address_func
)
263 (BDISP (given
) * 4 + pc
+ 8, info
);
268 arm_conditional
[(given
>> 28) & 0xf]);
277 for (reg
= 0; reg
< 16; reg
++)
278 if ((given
& (1 << reg
)) != 0)
283 func (stream
, "%s", arm_regnames
[reg
]);
290 if ((given
& 0x02000000) != 0)
292 int rotate
= (given
& 0xf00) >> 7;
293 int immed
= (given
& 0xff);
295 ((immed
<< (32 - rotate
))
296 | (immed
>> rotate
)) & 0xffffffff);
299 arm_decode_shift (given
, func
, stream
);
303 if ((given
& 0x0000f000) == 0x0000f000)
308 if ((given
& 0x01200000) == 0x00200000)
313 if ((given
& 0x00000020) == 0x00000020)
320 func (stream
, "[%s", arm_regnames
[(given
>> 16) & 0xf]);
321 if ((given
& 0x01000000) != 0)
323 int offset
= given
& 0xff;
325 func (stream
, ", %s#%d]%s",
326 ((given
& 0x00800000) == 0 ? "-" : ""),
328 ((given
& 0x00200000) != 0 ? "!" : ""));
334 int offset
= given
& 0xff;
336 func (stream
, "], %s#%d",
337 ((given
& 0x00800000) == 0 ? "-" : ""),
345 switch (given
& 0x00090000)
348 func (stream
, "_???");
351 func (stream
, "_all");
354 func (stream
, "_ctl");
357 func (stream
, "_flg");
363 switch (given
& 0x00408000)
380 switch (given
& 0x00080080)
392 func (stream
, _("<illegal precision>"));
397 switch (given
& 0x00408000)
414 switch (given
& 0x60)
430 case '0': case '1': case '2': case '3': case '4':
431 case '5': case '6': case '7': case '8': case '9':
433 int bitstart
= *c
++ - '0';
435 while (*c
>= '0' && *c
<= '9')
436 bitstart
= (bitstart
* 10) + *c
++ - '0';
442 while (*c
>= '0' && *c
<= '9')
443 bitend
= (bitend
* 10) + *c
++ - '0';
451 reg
= given
>> bitstart
;
452 reg
&= (2 << (bitend
- bitstart
)) - 1;
453 func (stream
, "%s", arm_regnames
[reg
]);
459 reg
= given
>> bitstart
;
460 reg
&= (2 << (bitend
- bitstart
)) - 1;
461 func (stream
, "%d", reg
);
467 reg
= given
>> bitstart
;
468 reg
&= (2 << (bitend
- bitstart
)) - 1;
469 func (stream
, "0x%08x", reg
);
475 reg
= given
>> bitstart
;
476 reg
&= (2 << (bitend
- bitstart
)) - 1;
479 arm_fp_const
[reg
& 7]);
481 func (stream
, "f%d", reg
);
490 if ((given
& (1 << bitstart
)) == 0)
491 func (stream
, "%c", *c
);
495 if ((given
& (1 << bitstart
)) != 0)
496 func (stream
, "%c", *c
);
500 if ((given
& (1 << bitstart
)) != 0)
501 func (stream
, "%c", *c
++);
503 func (stream
, "%c", *++c
);
516 func (stream
, "%c", *c
);
524 /* Print one instruction from PC on INFO->STREAM.
525 Return the size of the instruction. */
528 print_insn_thumb (pc
, info
, given
)
530 struct disassemble_info
*info
;
533 struct thumb_opcode
*insn
;
534 void *stream
= info
->stream
;
535 fprintf_ftype func
= info
->fprintf_func
;
537 for (insn
= thumb_opcodes
; insn
->assembler
; insn
++)
539 if ((given
& insn
->mask
) == insn
->value
)
541 char *c
= insn
->assembler
;
543 /* Special processing for Thumb 2 instruction BL sequence: */
544 if (!*c
) /* check for empty (not NULL) assembler string */
546 info
->bytes_per_chunk
= 4;
547 info
->bytes_per_line
= 4;
549 func (stream
, "%04x\tbl\t", given
& 0xffff);
550 (*info
->print_address_func
)
551 (BDISP23 (given
) * 2 + pc
+ 4, info
);
556 info
->bytes_per_chunk
= 2;
557 info
->bytes_per_line
= 4;
560 func (stream
, "%04x\t", given
);
576 reg
= (given
>> 3) & 0x7;
577 if (given
& (1 << 6))
579 func (stream
, "%s", arm_regnames
[reg
]);
587 if (given
& (1 << 7))
589 func (stream
, "%s", arm_regnames
[reg
]);
595 arm_conditional
[(given
>> 8) & 0xf]);
599 if (given
& (1 << 8))
603 if (*c
== 'O' && (given
& (1 << 8)))
611 /* It would be nice if we could spot
612 ranges, and generate the rS-rE format: */
613 for (reg
= 0; (reg
< 8); reg
++)
614 if ((given
& (1 << reg
)) != 0)
619 func (stream
, "%s", arm_regnames
[reg
]);
642 case '0': case '1': case '2': case '3': case '4':
643 case '5': case '6': case '7': case '8': case '9':
645 int bitstart
= *c
++ - '0';
647 while (*c
>= '0' && *c
<= '9')
648 bitstart
= (bitstart
* 10) + *c
++ - '0';
656 while (*c
>= '0' && *c
<= '9')
657 bitend
= (bitend
* 10) + *c
++ - '0';
660 reg
= given
>> bitstart
;
661 reg
&= (2 << (bitend
- bitstart
)) - 1;
665 func (stream
, "%s", arm_regnames
[reg
]);
669 func (stream
, "%d", reg
);
673 func (stream
, "%d", reg
<< 1);
677 func (stream
, "%d", reg
<< 2);
681 /* PC-relative address -- the bottom two
682 bits of the address are dropped before
684 info
->print_address_func
685 (((pc
+ 4) & ~3) + (reg
<< 2), info
);
689 func (stream
, "0x%04x", reg
);
693 reg
= ((reg
^ (1 << bitend
)) - (1 << bitend
));
694 func (stream
, "%d", reg
);
698 reg
= ((reg
^ (1 << bitend
)) - (1 << bitend
));
699 (*info
->print_address_func
)
700 (reg
* 2 + pc
+ 4, info
);
711 if ((given
& (1 << bitstart
)) != 0)
712 func (stream
, "%c", *c
);
717 if ((given
& (1 << bitstart
)) != 0)
718 func (stream
, "%c", *c
++);
720 func (stream
, "%c", *++c
);
734 func (stream
, "%c", *c
);
745 /* NOTE: There are no checks in these routines that the relevant number of data bytes exist */
748 print_insn_big_arm (pc
, info
)
750 struct disassemble_info
*info
;
755 coff_symbol_type
*cs
;
760 if (info
->symbols
!= NULL
)
762 if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_coff_flavour
)
764 cs
= coffsymbol (*info
->symbols
);
765 is_thumb
= (cs
->native
->u
.syment
.n_sclass
== C_THUMBEXT
766 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTAT
767 || cs
->native
->u
.syment
.n_sclass
== C_THUMBLABEL
768 || cs
->native
->u
.syment
.n_sclass
== C_THUMBEXTFUNC
769 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTATFUNC
);
772 else if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_elf_flavour
)
774 es
= *(elf_symbol_type
**)(info
->symbols
);
775 is_thumb
= ELF_ST_TYPE (es
->internal_elf_sym
.st_info
) ==
780 info
->bytes_per_chunk
= 4;
781 info
->display_endian
= BFD_ENDIAN_BIG
;
783 /* Always fetch word aligned values. */
785 status
= (*info
->read_memory_func
) (pc
& ~ 0x3, (bfd_byte
*) &b
[0], 4, info
);
788 (*info
->memory_error_func
) (status
, pc
, info
);
796 given
= (b
[2] << 8) | b
[3];
798 status
= info
->read_memory_func ((pc
+ 4) & ~ 0x3, (bfd_byte
*) b
, 4, info
);
801 info
->memory_error_func (status
, pc
+ 4, info
);
805 given
|= (b
[0] << 24) | (b
[1] << 16);
809 given
= (b
[0] << 8) | b
[1] | (b
[2] << 24) | (b
[3] << 16);
814 given
= (b
[0] << 24) | (b
[1] << 16) | (b
[2] << 8) | (b
[3]);
819 status
= print_insn_thumb (pc
, info
, given
);
823 status
= print_insn_arm (pc
, info
, given
);
830 print_insn_little_arm (pc
, info
)
832 struct disassemble_info
* info
;
837 coff_symbol_type
*cs
;
842 if (info
->symbols
!= NULL
)
844 if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_coff_flavour
)
846 cs
= coffsymbol (*info
->symbols
);
847 is_thumb
= (cs
->native
->u
.syment
.n_sclass
== C_THUMBEXT
848 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTAT
849 || cs
->native
->u
.syment
.n_sclass
== C_THUMBLABEL
850 || cs
->native
->u
.syment
.n_sclass
== C_THUMBEXTFUNC
851 || cs
->native
->u
.syment
.n_sclass
== C_THUMBSTATFUNC
);
854 else if (bfd_asymbol_flavour (*info
->symbols
) == bfd_target_elf_flavour
)
856 es
= *(elf_symbol_type
**)(info
->symbols
);
857 is_thumb
= ELF_ST_TYPE (es
->internal_elf_sym
.st_info
) ==
862 info
->bytes_per_chunk
= 4;
863 info
->display_endian
= BFD_ENDIAN_LITTLE
;
865 status
= (*info
->read_memory_func
) (pc
, (bfd_byte
*) &b
[0], 4, info
);
866 if (status
!= 0 && is_thumb
)
868 info
->bytes_per_chunk
= 2;
870 status
= info
->read_memory_func (pc
, (bfd_byte
*) b
, 2, info
);
875 (*info
->memory_error_func
) (status
, pc
, info
);
879 given
= (b
[0]) | (b
[1] << 8) | (b
[2] << 16) | (b
[3] << 24);
883 status
= print_insn_thumb (pc
, info
, given
);
887 status
= print_insn_arm (pc
, info
, given
);
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