b6a35683393f397e94f6c84d5b8597d689047e39
1 /* Instruction printing code for the ARM
2 Copyright (C) 1994, 95, 96, 1997 Free Software Foundation, Inc.
3 Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
4 Modification by James G. Smith (jsmith@cygnus.co.uk)
6 This file is part of libopcodes.
8 This program is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2 of the License, or (at your option)
13 This program is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
27 static char *arm_conditional
[] =
28 {"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
29 "hi", "ls", "ge", "lt", "gt", "le", "", "nv"};
31 static char *arm_regnames
[] =
32 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
33 "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc"};
35 static char *arm_fp_const
[] =
36 {"0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0"};
38 static char *arm_shift
[] =
39 {"lsl", "lsr", "asr", "ror"};
41 static int print_insn_arm
PARAMS ((bfd_vma
, struct disassemble_info
*,
45 arm_decode_shift (given
, func
, stream
)
50 func (stream
, "%s", arm_regnames
[given
& 0xf]);
51 if ((given
& 0xff0) != 0)
53 if ((given
& 0x10) == 0)
55 int amount
= (given
& 0xf80) >> 7;
56 int shift
= (given
& 0x60) >> 5;
61 func (stream
, ", rrx");
66 func (stream
, ", %s #%d", arm_shift
[shift
], amount
);
69 func (stream
, ", %s %s", arm_shift
[(given
& 0x60) >> 5],
70 arm_regnames
[(given
& 0xf00) >> 8]);
74 /* Print one instruction from PC on INFO->STREAM.
75 Return the size of the instruction (always 4 on ARM). */
78 print_insn_arm (pc
, info
, given
)
80 struct disassemble_info
*info
;
83 struct arm_opcode
*insn
;
84 void *stream
= info
->stream
;
85 fprintf_ftype func
= info
->fprintf_func
;
87 for (insn
= arm_opcodes
; insn
->assembler
; insn
++)
89 if ((given
& insn
->mask
) == insn
->value
)
92 for (c
= insn
->assembler
; *c
; c
++)
103 if (((given
& 0x000f0000) == 0x000f0000)
104 && ((given
& 0x02000000) == 0))
106 int offset
= given
& 0xfff;
107 if ((given
& 0x00800000) == 0)
109 (*info
->print_address_func
)
110 (offset
+ pc
+ 8, info
);
115 arm_regnames
[(given
>> 16) & 0xf]);
116 if ((given
& 0x01000000) != 0)
118 if ((given
& 0x02000000) == 0)
120 int offset
= given
& 0xfff;
122 func (stream
, ", %s#%d",
123 (((given
& 0x00800000) == 0)
124 ? "-" : ""), offset
);
128 func (stream
, ", %s",
129 (((given
& 0x00800000) == 0)
131 arm_decode_shift (given
, func
, stream
);
135 ((given
& 0x00200000) != 0) ? "!" : "");
139 if ((given
& 0x02000000) == 0)
141 int offset
= given
& 0xfff;
143 func (stream
, "], %s#%d",
144 (((given
& 0x00800000) == 0)
145 ? "-" : ""), offset
);
151 func (stream
, "], %s",
152 (((given
& 0x00800000) == 0)
154 arm_decode_shift (given
, func
, stream
);
161 if ((given
& 0x004f0000) == 0x004f0000)
163 /* PC relative with immediate offset */
164 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
165 if ((given
& 0x00800000) == 0)
167 (*info
->print_address_func
)
168 (offset
+ pc
+ 8, info
);
173 arm_regnames
[(given
>> 16) & 0xf]);
174 if ((given
& 0x01000000) != 0)
177 if ((given
& 0x00400000) == 0x00400000)
180 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
182 func (stream
, ", %s#%d",
183 (((given
& 0x00800000) == 0)
184 ? "-" : ""), offset
);
189 func (stream
, ", %s%s",
190 (((given
& 0x00800000) == 0)
192 arm_regnames
[given
& 0xf]);
196 ((given
& 0x00200000) != 0) ? "!" : "");
201 if ((given
& 0x00400000) == 0x00400000)
204 int offset
= ((given
& 0xf00) >> 4) | (given
& 0xf);
206 func (stream
, "], %s#%d",
207 (((given
& 0x00800000) == 0)
208 ? "-" : ""), offset
);
215 func (stream
, "], %s%s",
216 (((given
& 0x00800000) == 0)
218 arm_regnames
[given
& 0xf]);
225 (*info
->print_address_func
)
226 (BDISP (given
) * 4 + pc
+ 8, info
);
231 arm_conditional
[(given
>> 28) & 0xf]);
240 for (reg
= 0; reg
< 16; reg
++)
241 if ((given
& (1 << reg
)) != 0)
246 func (stream
, "%s", arm_regnames
[reg
]);
253 if ((given
& 0x02000000) != 0)
255 int rotate
= (given
& 0xf00) >> 7;
256 int immed
= (given
& 0xff);
258 ((immed
<< (32 - rotate
))
259 | (immed
>> rotate
)) & 0xffffffff);
262 arm_decode_shift (given
, func
, stream
);
266 if ((given
& 0x0000f000) == 0x0000f000)
271 if ((given
& 0x01200000) == 0x00200000)
276 if ((given
& 0x00000020) == 0x00000020)
283 func (stream
, "[%s", arm_regnames
[(given
>> 16) & 0xf]);
284 if ((given
& 0x01000000) != 0)
286 int offset
= given
& 0xff;
288 func (stream
, ", %s#%d]%s",
289 ((given
& 0x00800000) == 0 ? "-" : ""),
291 ((given
& 0x00200000) != 0 ? "!" : ""));
297 int offset
= given
& 0xff;
299 func (stream
, "], %s#%d",
300 ((given
& 0x00800000) == 0 ? "-" : ""),
308 switch (given
& 0x00090000)
311 func (stream
, "_???");
314 func (stream
, "_ctl");
317 func (stream
, "_flg");
323 switch (given
& 0x00408000)
340 switch (given
& 0x00080080)
352 func (stream
, "<illegal precision>");
357 switch (given
& 0x00408000)
374 switch (given
& 0x60)
390 case '0': case '1': case '2': case '3': case '4':
391 case '5': case '6': case '7': case '8': case '9':
393 int bitstart
= *c
++ - '0';
395 while (*c
>= '0' && *c
<= '9')
396 bitstart
= (bitstart
* 10) + *c
++ - '0';
402 while (*c
>= '0' && *c
<= '9')
403 bitend
= (bitend
* 10) + *c
++ - '0';
411 reg
= given
>> bitstart
;
412 reg
&= (2 << (bitend
- bitstart
)) - 1;
413 func (stream
, "%s", arm_regnames
[reg
]);
419 reg
= given
>> bitstart
;
420 reg
&= (2 << (bitend
- bitstart
)) - 1;
421 func (stream
, "%d", reg
);
427 reg
= given
>> bitstart
;
428 reg
&= (2 << (bitend
- bitstart
)) - 1;
429 func (stream
, "0x%08x", reg
);
435 reg
= given
>> bitstart
;
436 reg
&= (2 << (bitend
- bitstart
)) - 1;
439 arm_fp_const
[reg
& 7]);
441 func (stream
, "f%d", reg
);
450 if ((given
& (1 << bitstart
)) == 0)
451 func (stream
, "%c", *c
);
455 if ((given
& (1 << bitstart
)) != 0)
456 func (stream
, "%c", *c
);
460 if ((given
& (1 << bitstart
)) != 0)
461 func (stream
, "%c", *c
++);
463 func (stream
, "%c", *++c
);
476 func (stream
, "%c", *c
);
484 /* Print one instruction from PC on INFO->STREAM.
485 Return the size of the instruction. */
488 print_insn_thumb (pc
, info
, given
)
490 struct disassemble_info
*info
;
493 struct thumb_opcode
*insn
;
494 void *stream
= info
->stream
;
495 fprintf_ftype func
= info
->fprintf_func
;
497 for (insn
= thumb_opcodes
; insn
->assembler
; insn
++)
499 if ((given
& insn
->mask
) == insn
->value
)
501 char *c
= insn
->assembler
;
503 /* Special processing for Thumb 2 instruction BL sequence: */
504 if (!*c
) /* check for empty (not NULL) assembler string */
506 info
->bytes_per_chunk
= 4;
507 info
->bytes_per_line
= 4;
509 func (stream
, "%04x\tbl\t", given
& 0xffff);
510 (*info
->print_address_func
)
511 (BDISP23 (given
) * 2 + pc
+ 4, info
);
516 info
->bytes_per_chunk
= 2;
517 info
->bytes_per_line
= 4;
520 func (stream
, "%04x\t", given
);
536 reg
= (given
>> 3) & 0x7;
537 if (given
& (1 << 6))
539 func (stream
, "%s", arm_regnames
[reg
]);
547 if (given
& (1 << 7))
549 func (stream
, "%s", arm_regnames
[reg
]);
555 arm_conditional
[(given
>> 8) & 0xf]);
559 if (given
& (1 << 8))
563 if (*c
== 'O' && (given
& (1 << 8)))
571 /* It would be nice if we could spot
572 ranges, and generate the rS-rE format: */
573 for (reg
= 0; (reg
< 8); reg
++)
574 if ((given
& (1 << reg
)) != 0)
579 func (stream
, "%s", arm_regnames
[reg
]);
602 case '0': case '1': case '2': case '3': case '4':
603 case '5': case '6': case '7': case '8': case '9':
605 int bitstart
= *c
++ - '0';
607 while (*c
>= '0' && *c
<= '9')
608 bitstart
= (bitstart
* 10) + *c
++ - '0';
616 while (*c
>= '0' && *c
<= '9')
617 bitend
= (bitend
* 10) + *c
++ - '0';
620 reg
= given
>> bitstart
;
621 reg
&= (2 << (bitend
- bitstart
)) - 1;
625 func (stream
, "%s", arm_regnames
[reg
]);
629 func (stream
, "%d", reg
);
633 func (stream
, "%d", reg
<< 1);
637 func (stream
, "%d", reg
<< 2);
641 info
->print_address_func (((pc
+ 4) & ~1) + (reg
<< 2), info
);
645 func (stream
, "0x%04x", reg
);
649 reg
= ((reg
^ (1 << bitend
)) - (1 << bitend
));
650 func (stream
, "%d", reg
);
654 reg
= ((reg
^ (1 << bitend
)) - (1 << bitend
));
655 (*info
->print_address_func
)
656 (reg
* 2 + pc
+ 4, info
);
667 if ((given
& (1 << bitstart
)) != 0)
668 func (stream
, "%c", *c
);
673 if ((given
& (1 << bitstart
)) != 0)
674 func (stream
, "%c", *c
++);
676 func (stream
, "%c", *++c
);
690 func (stream
, "%c", *c
);
701 /* NOTE: There are no checks in these routines that the relevant number of data bytes exist */
704 print_insn_big_arm (pc
, info
)
706 struct disassemble_info
*info
;
712 info
->bytes_per_chunk
= 4;
713 info
->display_endian
= BFD_ENDIAN_BIG
;
715 /* Always fetch word aligned values. */
717 status
= (*info
->read_memory_func
) (pc
& ~ 0x3, (bfd_byte
*) &b
[0], 4, info
);
720 (*info
->memory_error_func
) (status
, pc
, info
);
724 if (info
->flags
& 0x1)
728 given
= (b
[2] << 8) | b
[3];
730 status
= info
->read_memory_func ((pc
+ 4) & ~ 0x3, (bfd_byte
*) b
, 4, info
);
733 info
->memory_error_func (status
, pc
+ 4, info
);
737 given
|= (b
[0] << 24) | (b
[1] << 16);
741 given
= (b
[0] << 8) | b
[1] | (b
[2] << 24) | (b
[3] << 16);
746 given
= (b
[0] << 24) | (b
[1] << 16) | (b
[2] << 8) | (b
[3]);
749 if (info
->flags
& 0x1)
751 status
= print_insn_thumb (pc
, info
, given
);
752 info
->flags
|= 1; /* Stop displayed symbols from resetting the flag */
756 status
= print_insn_arm (pc
, info
, given
);
757 info
->flags
&= ~1; /* Stop displayed symbols from resetting the flag */
764 print_insn_little_arm (pc
, info
)
766 struct disassemble_info
*info
;
772 info
->bytes_per_chunk
= 4;
773 info
->display_endian
= BFD_ENDIAN_LITTLE
;
775 status
= (*info
->read_memory_func
) (pc
, (bfd_byte
*) &b
[0], 4, info
);
776 if (status
!= 0 && (info
->flags
& 0x1))
778 info
->bytes_per_chunk
= 2;
780 status
= info
->read_memory_func (pc
, (bfd_byte
*) b
, 2, info
);
785 (*info
->memory_error_func
) (status
, pc
, info
);
789 given
= (b
[0]) | (b
[1] << 8) | (b
[2] << 16) | (b
[3] << 24);
791 if (info
->flags
& 0x1)
793 status
= print_insn_thumb (pc
, info
, given
);
794 info
->flags
|= 1; /* Stop displayed symbols from resetting the flag */
798 status
= print_insn_arm (pc
, info
, given
);
799 info
->flags
&= ~1; /* Stop displayed symbols from resetting the flag */
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