1 /* Disassemble ADI Blackfin Instructions.
2 Copyright 2005, 2007 Free Software Foundation, Inc.
4 This file is part of libopcodes.
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 It is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
25 #include "opcode/bfin.h"
47 #define HOST_LONG_WORD_SIZE (sizeof (long) * 8)
48 #define XFIELD(w,p,s) (((w) & ((1 << (s)) - 1) << (p)) >> (p))
49 #define SIGNEXTEND(v, n) ((v << (HOST_LONG_WORD_SIZE - (n))) >> (HOST_LONG_WORD_SIZE - (n)))
50 #define MASKBITS(val, bits) (val & ((1 << bits) - 1))
54 typedef unsigned int bu32
;
58 c_0
, c_1
, c_4
, c_2
, c_uimm2
, c_uimm3
, c_imm3
, c_pcrel4
,
59 c_imm4
, c_uimm4s4
, c_uimm4
, c_uimm4s2
, c_negimm5s4
, c_imm5
, c_uimm5
, c_imm6
,
60 c_imm7
, c_imm8
, c_uimm8
, c_pcrel8
, c_uimm8s4
, c_pcrel8s4
, c_lppcrel10
, c_pcrel10
,
61 c_pcrel12
, c_imm16s4
, c_luimm16
, c_imm16
, c_huimm16
, c_rimm16
, c_imm16s2
, c_uimm16s4
,
62 c_uimm16
, c_pcrel24
, c_uimm32
, c_huimm32
,
76 } constant_formats
[] =
78 { "0", 0, 0, 1, 0, 0, 0, 0, 0},
79 { "1", 0, 0, 1, 0, 0, 0, 0, 0},
80 { "4", 0, 0, 1, 0, 0, 0, 0, 0},
81 { "2", 0, 0, 1, 0, 0, 0, 0, 0},
82 { "uimm2", 2, 0, 0, 0, 0, 0, 0, 0},
83 { "uimm3", 3, 0, 0, 0, 0, 0, 0, 0},
84 { "imm3", 3, 0, 1, 0, 0, 0, 0, 0},
85 { "pcrel4", 4, 1, 0, 1, 1, 0, 0, 0},
86 { "imm4", 4, 0, 1, 0, 0, 0, 0, 0},
87 { "uimm4s4", 4, 0, 0, 0, 2, 0, 0, 1},
88 { "uimm4", 4, 0, 0, 0, 0, 0, 0, 0},
89 { "uimm4s2", 4, 0, 0, 0, 1, 0, 0, 1},
90 { "negimm5s4", 5, 0, 1, 0, 2, 0, 1, 0},
91 { "imm5", 5, 0, 1, 0, 0, 0, 0, 0},
92 { "uimm5", 5, 0, 0, 0, 0, 0, 0, 0},
93 { "imm6", 6, 0, 1, 0, 0, 0, 0, 0},
94 { "imm7", 7, 0, 1, 0, 0, 0, 0, 0},
95 { "imm8", 8, 0, 1, 0, 0, 0, 0, 0},
96 { "uimm8", 8, 0, 0, 0, 0, 0, 0, 0},
97 { "pcrel8", 8, 1, 0, 1, 1, 0, 0, 0},
98 { "uimm8s4", 8, 0, 0, 0, 2, 0, 0, 0},
99 { "pcrel8s4", 8, 1, 1, 1, 2, 0, 0, 0},
100 { "lppcrel10", 10, 1, 0, 1, 1, 0, 0, 0},
101 { "pcrel10", 10, 1, 1, 1, 1, 0, 0, 0},
102 { "pcrel12", 12, 1, 1, 1, 1, 0, 0, 0},
103 { "imm16s4", 16, 0, 1, 0, 2, 0, 0, 0},
104 { "luimm16", 16, 1, 0, 0, 0, 0, 0, 0},
105 { "imm16", 16, 0, 1, 0, 0, 0, 0, 0},
106 { "huimm16", 16, 1, 0, 0, 0, 0, 0, 0},
107 { "rimm16", 16, 1, 1, 0, 0, 0, 0, 0},
108 { "imm16s2", 16, 0, 1, 0, 1, 0, 0, 0},
109 { "uimm16s4", 16, 0, 0, 0, 2, 0, 0, 0},
110 { "uimm16", 16, 0, 0, 0, 0, 0, 0, 0},
111 { "pcrel24", 24, 1, 1, 1, 1, 0, 0, 0},
112 { "uimm32", 32, 0, 0, 0, 0, 0, 0, 0},
113 { "huimm16", 32, 1, 0, 0, 0, 0, 0, 0}
116 int _print_insn_bfin (bfd_vma pc
, disassemble_info
* outf
);
117 int print_insn_bfin (bfd_vma pc
, disassemble_info
* outf
);
120 fmtconst (const_forms_t cf
, TIword x
, bfd_vma pc
, disassemble_info
* outf
)
124 if (constant_formats
[cf
].reloc
)
126 bfd_vma ea
= (((constant_formats
[cf
].pcrel
? SIGNEXTEND (x
, constant_formats
[cf
].nbits
)
127 : x
) + constant_formats
[cf
].offset
) << constant_formats
[cf
].scale
);
128 if (constant_formats
[cf
].pcrel
)
131 outf
->print_address_func (ea
, outf
);
135 /* Negative constants have an implied sign bit. */
136 if (constant_formats
[cf
].negative
)
138 int nb
= constant_formats
[cf
].nbits
+ 1;
140 x
= x
| (1 << constant_formats
[cf
].nbits
);
141 x
= SIGNEXTEND (x
, nb
);
144 x
= constant_formats
[cf
].issigned
? SIGNEXTEND (x
, constant_formats
[cf
].nbits
) : x
;
146 if (constant_formats
[cf
].offset
)
147 x
+= constant_formats
[cf
].offset
;
149 if (constant_formats
[cf
].scale
)
150 x
<<= constant_formats
[cf
].scale
;
152 if (constant_formats
[cf
].issigned
&& x
< 0)
153 sprintf (buf
, "%ld", x
);
155 sprintf (buf
, "0x%lx", x
);
161 fmtconst_val (const_forms_t cf
, unsigned int x
, unsigned int pc
)
163 if (0 && constant_formats
[cf
].reloc
)
165 bu32 ea
= (((constant_formats
[cf
].pcrel
166 ? SIGNEXTEND (x
, constant_formats
[cf
].nbits
)
167 : x
) + constant_formats
[cf
].offset
)
168 << constant_formats
[cf
].scale
);
169 if (constant_formats
[cf
].pcrel
)
175 /* Negative constants have an implied sign bit. */
176 if (constant_formats
[cf
].negative
)
178 int nb
= constant_formats
[cf
].nbits
+ 1;
179 x
= x
| (1 << constant_formats
[cf
].nbits
);
180 x
= SIGNEXTEND (x
, nb
);
182 else if (constant_formats
[cf
].issigned
)
183 x
= SIGNEXTEND (x
, constant_formats
[cf
].nbits
);
185 x
+= constant_formats
[cf
].offset
;
186 x
<<= constant_formats
[cf
].scale
;
191 enum machine_registers
193 REG_RL0
, REG_RL1
, REG_RL2
, REG_RL3
, REG_RL4
, REG_RL5
, REG_RL6
, REG_RL7
,
194 REG_RH0
, REG_RH1
, REG_RH2
, REG_RH3
, REG_RH4
, REG_RH5
, REG_RH6
, REG_RH7
,
195 REG_R0
, REG_R1
, REG_R2
, REG_R3
, REG_R4
, REG_R5
, REG_R6
, REG_R7
,
196 REG_R1_0
, REG_R3_2
, REG_R5_4
, REG_R7_6
, REG_P0
, REG_P1
, REG_P2
, REG_P3
,
197 REG_P4
, REG_P5
, REG_SP
, REG_FP
, REG_A0x
, REG_A1x
, REG_A0w
, REG_A1w
,
198 REG_A0
, REG_A1
, REG_I0
, REG_I1
, REG_I2
, REG_I3
, REG_M0
, REG_M1
,
199 REG_M2
, REG_M3
, REG_B0
, REG_B1
, REG_B2
, REG_B3
, REG_L0
, REG_L1
,
201 REG_AZ
, REG_AN
, REG_AC0
, REG_AC1
, REG_AV0
, REG_AV1
, REG_AV0S
, REG_AV1S
,
202 REG_AQ
, REG_V
, REG_VS
,
203 REG_sftreset
, REG_omode
, REG_excause
, REG_emucause
, REG_idle_req
, REG_hwerrcause
, REG_CC
, REG_LC0
,
204 REG_LC1
, REG_GP
, REG_ASTAT
, REG_RETS
, REG_LT0
, REG_LB0
, REG_LT1
, REG_LB1
,
205 REG_CYCLES
, REG_CYCLES2
, REG_USP
, REG_SEQSTAT
, REG_SYSCFG
, REG_RETI
, REG_RETX
, REG_RETN
,
206 REG_RETE
, REG_EMUDAT
, REG_BR0
, REG_BR1
, REG_BR2
, REG_BR3
, REG_BR4
, REG_BR5
, REG_BR6
,
207 REG_BR7
, REG_PL0
, REG_PL1
, REG_PL2
, REG_PL3
, REG_PL4
, REG_PL5
, REG_SLP
, REG_FLP
,
208 REG_PH0
, REG_PH1
, REG_PH2
, REG_PH3
, REG_PH4
, REG_PH5
, REG_SHP
, REG_FHP
,
209 REG_IL0
, REG_IL1
, REG_IL2
, REG_IL3
, REG_ML0
, REG_ML1
, REG_ML2
, REG_ML3
,
210 REG_BL0
, REG_BL1
, REG_BL2
, REG_BL3
, REG_LL0
, REG_LL1
, REG_LL2
, REG_LL3
,
211 REG_IH0
, REG_IH1
, REG_IH2
, REG_IH3
, REG_MH0
, REG_MH1
, REG_MH2
, REG_MH3
,
212 REG_BH0
, REG_BH1
, REG_BH2
, REG_BH3
, REG_LH0
, REG_LH1
, REG_LH2
, REG_LH3
,
218 rc_dregs_lo
, rc_dregs_hi
, rc_dregs
, rc_dregs_pair
, rc_pregs
, rc_spfp
, rc_dregs_hilo
, rc_accum_ext
,
219 rc_accum_word
, rc_accum
, rc_iregs
, rc_mregs
, rc_bregs
, rc_lregs
, rc_dpregs
, rc_gregs
,
220 rc_regs
, rc_statbits
, rc_ignore_bits
, rc_ccstat
, rc_counters
, rc_dregs2_sysregs1
, rc_open
, rc_sysregs2
,
221 rc_sysregs3
, rc_allregs
,
225 static char *reg_names
[] =
227 "R0.L", "R1.L", "R2.L", "R3.L", "R4.L", "R5.L", "R6.L", "R7.L",
228 "R0.H", "R1.H", "R2.H", "R3.H", "R4.H", "R5.H", "R6.H", "R7.H",
229 "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
230 "R1:0", "R3:2", "R5:4", "R7:6", "P0", "P1", "P2", "P3",
231 "P4", "P5", "SP", "FP", "A0.x", "A1.x", "A0.w", "A1.w",
232 "A0", "A1", "I0", "I1", "I2", "I3", "M0", "M1",
233 "M2", "M3", "B0", "B1", "B2", "B3", "L0", "L1",
235 "AZ", "AN", "AC0", "AC1", "AV0", "AV1", "AV0S", "AV1S",
237 "sftreset", "omode", "excause", "emucause", "idle_req", "hwerrcause", "CC", "LC0",
238 "LC1", "GP", "ASTAT", "RETS", "LT0", "LB0", "LT1", "LB1",
239 "CYCLES", "CYCLES2", "USP", "SEQSTAT", "SYSCFG", "RETI", "RETX", "RETN",
241 "R0.B", "R1.B", "R2.B", "R3.B", "R4.B", "R5.B", "R6.B", "R7.B",
242 "P0.L", "P1.L", "P2.L", "P3.L", "P4.L", "P5.L", "SP.L", "FP.L",
243 "P0.H", "P1.H", "P2.H", "P3.H", "P4.H", "P5.H", "SP.H", "FP.H",
244 "I0.L", "I1.L", "I2.L", "I3.L", "M0.L", "M1.L", "M2.L", "M3.L",
245 "B0.L", "B1.L", "B2.L", "B3.L", "L0.L", "L1.L", "L2.L", "L3.L",
246 "I0.H", "I1.H", "I2.H", "I3.H", "M0.H", "M1.H", "M2.H", "M3.H",
247 "B0.H", "B1.H", "B2.H", "B3.H", "L0.H", "L1.H", "L2.H", "L3.H",
252 #define REGNAME(x) ((x) < REG_LASTREG ? (reg_names[x]) : "...... Illegal register .......")
255 static enum machine_registers decode_dregs_lo
[] =
257 REG_RL0
, REG_RL1
, REG_RL2
, REG_RL3
, REG_RL4
, REG_RL5
, REG_RL6
, REG_RL7
,
260 #define dregs_lo(x) REGNAME (decode_dregs_lo[(x) & 7])
263 static enum machine_registers decode_dregs_hi
[] =
265 REG_RH0
, REG_RH1
, REG_RH2
, REG_RH3
, REG_RH4
, REG_RH5
, REG_RH6
, REG_RH7
,
268 #define dregs_hi(x) REGNAME (decode_dregs_hi[(x) & 7])
271 static enum machine_registers decode_dregs
[] =
273 REG_R0
, REG_R1
, REG_R2
, REG_R3
, REG_R4
, REG_R5
, REG_R6
, REG_R7
,
276 #define dregs(x) REGNAME (decode_dregs[(x) & 7])
279 static enum machine_registers decode_dregs_byte
[] =
281 REG_BR0
, REG_BR1
, REG_BR2
, REG_BR3
, REG_BR4
, REG_BR5
, REG_BR6
, REG_BR7
,
284 #define dregs_byte(x) REGNAME (decode_dregs_byte[(x) & 7])
285 #define dregs_pair(x) REGNAME (decode_dregs_pair[(x) & 7])
288 static enum machine_registers decode_pregs
[] =
290 REG_P0
, REG_P1
, REG_P2
, REG_P3
, REG_P4
, REG_P5
, REG_SP
, REG_FP
,
293 #define pregs(x) REGNAME (decode_pregs[(x) & 7])
294 #define spfp(x) REGNAME (decode_spfp[(x) & 1])
295 #define dregs_hilo(x,i) REGNAME (decode_dregs_hilo[((i) << 3)|x])
296 #define accum_ext(x) REGNAME (decode_accum_ext[(x) & 1])
297 #define accum_word(x) REGNAME (decode_accum_word[(x) & 1])
298 #define accum(x) REGNAME (decode_accum[(x) & 1])
301 static enum machine_registers decode_iregs
[] =
303 REG_I0
, REG_I1
, REG_I2
, REG_I3
,
306 #define iregs(x) REGNAME (decode_iregs[(x) & 3])
309 static enum machine_registers decode_mregs
[] =
311 REG_M0
, REG_M1
, REG_M2
, REG_M3
,
314 #define mregs(x) REGNAME (decode_mregs[(x) & 3])
315 #define bregs(x) REGNAME (decode_bregs[(x) & 3])
316 #define lregs(x) REGNAME (decode_lregs[(x) & 3])
319 static enum machine_registers decode_dpregs
[] =
321 REG_R0
, REG_R1
, REG_R2
, REG_R3
, REG_R4
, REG_R5
, REG_R6
, REG_R7
,
322 REG_P0
, REG_P1
, REG_P2
, REG_P3
, REG_P4
, REG_P5
, REG_SP
, REG_FP
,
325 #define dpregs(x) REGNAME (decode_dpregs[(x) & 15])
328 static enum machine_registers decode_gregs
[] =
330 REG_R0
, REG_R1
, REG_R2
, REG_R3
, REG_R4
, REG_R5
, REG_R6
, REG_R7
,
331 REG_P0
, REG_P1
, REG_P2
, REG_P3
, REG_P4
, REG_P5
, REG_SP
, REG_FP
,
334 #define gregs(x,i) REGNAME (decode_gregs[((i) << 3)|x])
336 /* [dregs pregs (iregs mregs) (bregs lregs)]. */
337 static enum machine_registers decode_regs
[] =
339 REG_R0
, REG_R1
, REG_R2
, REG_R3
, REG_R4
, REG_R5
, REG_R6
, REG_R7
,
340 REG_P0
, REG_P1
, REG_P2
, REG_P3
, REG_P4
, REG_P5
, REG_SP
, REG_FP
,
341 REG_I0
, REG_I1
, REG_I2
, REG_I3
, REG_M0
, REG_M1
, REG_M2
, REG_M3
,
342 REG_B0
, REG_B1
, REG_B2
, REG_B3
, REG_L0
, REG_L1
, REG_L2
, REG_L3
,
345 #define regs(x,i) REGNAME (decode_regs[((i) << 3)|x])
347 /* [dregs pregs (iregs mregs) (bregs lregs) Low Half]. */
348 static enum machine_registers decode_regs_lo
[] =
350 REG_RL0
, REG_RL1
, REG_RL2
, REG_RL3
, REG_RL4
, REG_RL5
, REG_RL6
, REG_RL7
,
351 REG_PL0
, REG_PL1
, REG_PL2
, REG_PL3
, REG_PL4
, REG_PL5
, REG_SLP
, REG_FLP
,
352 REG_IL0
, REG_IL1
, REG_IL2
, REG_IL3
, REG_ML0
, REG_ML1
, REG_ML2
, REG_ML3
,
353 REG_BL0
, REG_BL1
, REG_BL2
, REG_BL3
, REG_LL0
, REG_LL1
, REG_LL2
, REG_LL3
,
356 #define regs_lo(x,i) REGNAME (decode_regs_lo[((i) << 3)|x])
357 /* [dregs pregs (iregs mregs) (bregs lregs) High Half]. */
358 static enum machine_registers decode_regs_hi
[] =
360 REG_RH0
, REG_RH1
, REG_RH2
, REG_RH3
, REG_RH4
, REG_RH5
, REG_RH6
, REG_RH7
,
361 REG_PH0
, REG_PH1
, REG_PH2
, REG_PH3
, REG_PH4
, REG_PH5
, REG_SHP
, REG_FHP
,
362 REG_IH0
, REG_IH1
, REG_IH2
, REG_IH3
, REG_MH0
, REG_MH1
, REG_LH2
, REG_MH3
,
363 REG_BH0
, REG_BH1
, REG_BH2
, REG_BH3
, REG_LH0
, REG_LH1
, REG_LH2
, REG_LH3
,
366 #define regs_hi(x,i) REGNAME (decode_regs_hi[((i) << 3)|x])
368 static enum machine_registers decode_statbits
[] =
370 REG_AZ
, REG_AN
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_AQ
, REG_LASTREG
,
371 REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_AC0
, REG_AC1
, REG_LASTREG
, REG_LASTREG
,
372 REG_AV0
, REG_AV0S
, REG_AV1
, REG_AV1S
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
,
373 REG_V
, REG_VS
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
,
376 #define statbits(x) REGNAME (decode_statbits[(x) & 31])
377 #define ignore_bits(x) REGNAME (decode_ignore_bits[(x) & 7])
378 #define ccstat(x) REGNAME (decode_ccstat[(x) & 0])
381 static enum machine_registers decode_counters
[] =
386 #define counters(x) REGNAME (decode_counters[(x) & 1])
387 #define dregs2_sysregs1(x) REGNAME (decode_dregs2_sysregs1[(x) & 7])
389 /* [dregs pregs (iregs mregs) (bregs lregs)
390 dregs2_sysregs1 open sysregs2 sysregs3]. */
391 static enum machine_registers decode_allregs
[] =
393 REG_R0
, REG_R1
, REG_R2
, REG_R3
, REG_R4
, REG_R5
, REG_R6
, REG_R7
,
394 REG_P0
, REG_P1
, REG_P2
, REG_P3
, REG_P4
, REG_P5
, REG_SP
, REG_FP
,
395 REG_I0
, REG_I1
, REG_I2
, REG_I3
, REG_M0
, REG_M1
, REG_M2
, REG_M3
,
396 REG_B0
, REG_B1
, REG_B2
, REG_B3
, REG_L0
, REG_L1
, REG_L2
, REG_L3
,
397 REG_A0x
, REG_A0w
, REG_A1x
, REG_A1w
, REG_GP
, REG_LASTREG
, REG_ASTAT
, REG_RETS
,
398 REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
, REG_LASTREG
,
399 REG_LC0
, REG_LT0
, REG_LB0
, REG_LC1
, REG_LT1
, REG_LB1
, REG_CYCLES
, REG_CYCLES2
,
400 REG_USP
, REG_SEQSTAT
, REG_SYSCFG
, REG_RETI
, REG_RETX
, REG_RETN
, REG_RETE
, REG_EMUDAT
, REG_LASTREG
,
403 #define allregs(x,i) REGNAME (decode_allregs[((i) << 3) | x])
404 #define uimm16s4(x) fmtconst (c_uimm16s4, x, 0, outf)
405 #define pcrel4(x) fmtconst (c_pcrel4, x, pc, outf)
406 #define pcrel8(x) fmtconst (c_pcrel8, x, pc, outf)
407 #define pcrel8s4(x) fmtconst (c_pcrel8s4, x, pc, outf)
408 #define pcrel10(x) fmtconst (c_pcrel10, x, pc, outf)
409 #define pcrel12(x) fmtconst (c_pcrel12, x, pc, outf)
410 #define negimm5s4(x) fmtconst (c_negimm5s4, x, 0, outf)
411 #define rimm16(x) fmtconst (c_rimm16, x, 0, outf)
412 #define huimm16(x) fmtconst (c_huimm16, x, 0, outf)
413 #define imm16(x) fmtconst (c_imm16, x, 0, outf)
414 #define uimm2(x) fmtconst (c_uimm2, x, 0, outf)
415 #define uimm3(x) fmtconst (c_uimm3, x, 0, outf)
416 #define luimm16(x) fmtconst (c_luimm16, x, 0, outf)
417 #define uimm4(x) fmtconst (c_uimm4, x, 0, outf)
418 #define uimm5(x) fmtconst (c_uimm5, x, 0, outf)
419 #define imm16s2(x) fmtconst (c_imm16s2, x, 0, outf)
420 #define uimm8(x) fmtconst (c_uimm8, x, 0, outf)
421 #define imm16s4(x) fmtconst (c_imm16s4, x, 0, outf)
422 #define uimm4s2(x) fmtconst (c_uimm4s2, x, 0, outf)
423 #define uimm4s4(x) fmtconst (c_uimm4s4, x, 0, outf)
424 #define lppcrel10(x) fmtconst (c_lppcrel10, x, pc, outf)
425 #define imm3(x) fmtconst (c_imm3, x, 0, outf)
426 #define imm4(x) fmtconst (c_imm4, x, 0, outf)
427 #define uimm8s4(x) fmtconst (c_uimm8s4, x, 0, outf)
428 #define imm5(x) fmtconst (c_imm5, x, 0, outf)
429 #define imm6(x) fmtconst (c_imm6, x, 0, outf)
430 #define imm7(x) fmtconst (c_imm7, x, 0, outf)
431 #define imm8(x) fmtconst (c_imm8, x, 0, outf)
432 #define pcrel24(x) fmtconst (c_pcrel24, x, pc, outf)
433 #define uimm16(x) fmtconst (c_uimm16, x, 0, outf)
434 #define uimm32(x) fmtconst (c_uimm32, x, 0, outf)
435 #define huimm32(x) fmtconst (c_huimm32, x, 0, outf)
436 #define imm16_val(x) fmtconst_val (c_uimm16, x, 0)
437 #define luimm16_val(x) fmtconst_val (c_luimm16, x, 0)
439 /* (arch.pm)arch_disassembler_functions. */
441 #define OUTS(p, txt) ((p) ? (((txt)[0]) ? (p->fprintf_func)(p->stream, txt) :0) :0)
445 amod0 (int s0
, int x0
, disassemble_info
*outf
)
447 if (s0
== 1 && x0
== 0)
449 else if (s0
== 0 && x0
== 1)
451 else if (s0
== 1 && x0
== 1)
452 OUTS (outf
, "(SCO)");
456 amod1 (int s0
, int x0
, disassemble_info
*outf
)
458 if (s0
== 0 && x0
== 0)
460 else if (s0
== 1 && x0
== 0)
465 amod0amod2 (int s0
, int x0
, int aop0
, disassemble_info
*outf
)
467 if (s0
== 1 && x0
== 0 && aop0
== 0)
469 else if (s0
== 0 && x0
== 1 && aop0
== 0)
471 else if (s0
== 1 && x0
== 1 && aop0
== 0)
472 OUTS (outf
, "(SCO)");
473 else if (s0
== 0 && x0
== 0 && aop0
== 2)
474 OUTS (outf
, "(ASR)");
475 else if (s0
== 1 && x0
== 0 && aop0
== 2)
476 OUTS (outf
, "(S,ASR)");
477 else if (s0
== 0 && x0
== 1 && aop0
== 2)
478 OUTS (outf
, "(CO,ASR)");
479 else if (s0
== 1 && x0
== 1 && aop0
== 2)
480 OUTS (outf
, "(SCO,ASR)");
481 else if (s0
== 0 && x0
== 0 && aop0
== 3)
482 OUTS (outf
, "(ASL)");
483 else if (s0
== 1 && x0
== 0 && aop0
== 3)
484 OUTS (outf
, "(S,ASL)");
485 else if (s0
== 0 && x0
== 1 && aop0
== 3)
486 OUTS (outf
, "(CO,ASL)");
487 else if (s0
== 1 && x0
== 1 && aop0
== 3)
488 OUTS (outf
, "(SCO,ASL)");
492 searchmod (int r0
, disassemble_info
*outf
)
505 aligndir (int r0
, disassemble_info
*outf
)
512 decode_multfunc (int h0
, int h1
, int src0
, int src1
, disassemble_info
* outf
)
517 s0
= dregs_hi (src0
);
519 s0
= dregs_lo (src0
);
522 s1
= dregs_hi (src1
);
524 s1
= dregs_lo (src1
);
533 decode_macfunc (int which
, int op
, int h0
, int h1
, int src0
, int src1
, disassemble_info
* outf
)
536 char *sop
= "<unknown op>";
551 case 0: sop
= "="; break;
552 case 1: sop
= "+="; break;
553 case 2: sop
= "-="; break;
561 decode_multfunc (h0
, h1
, src0
, src1
, outf
);
567 decode_optmode (int mod
, int MM
, disassemble_info
*outf
)
569 if (mod
== 0 && MM
== 0)
584 OUTS (outf
, "S2RND");
587 else if (mod
== M_W32
)
589 else if (mod
== M_FU
)
591 else if (mod
== M_TFU
)
593 else if (mod
== M_IS
)
595 else if (mod
== M_ISS2
)
597 else if (mod
== M_IH
)
599 else if (mod
== M_IU
)
609 bu32 dpregs
[16], iregs
[4], mregs
[4], bregs
[4], lregs
[4];
610 bu32 a0x
, a0w
, a1x
, a1w
;
611 bu32 lt
[2], lc
[2], lb
[2];
612 int ac0
, ac0_copy
, ac1
, an
, aq
;
613 int av0
, av0s
, av1
, av1s
, az
, cc
, v
, v_copy
, vs
;
623 int end_of_registers
;
626 unsigned char *memory
;
627 unsigned long bfd_mach
;
630 #define DREG(x) (saved_state.dpregs[x])
631 #define GREG(x,i) DPREG ((x) | (i << 3))
632 #define DPREG(x) (saved_state.dpregs[x])
633 #define DREG(x) (saved_state.dpregs[x])
634 #define PREG(x) (saved_state.dpregs[x + 8])
635 #define SPREG PREG (6)
636 #define FPREG PREG (7)
637 #define IREG(x) (saved_state.iregs[x])
638 #define MREG(x) (saved_state.mregs[x])
639 #define BREG(x) (saved_state.bregs[x])
640 #define LREG(x) (saved_state.lregs[x])
641 #define A0XREG (saved_state.a0x)
642 #define A0WREG (saved_state.a0w)
643 #define A1XREG (saved_state.a1x)
644 #define A1WREG (saved_state.a1w)
645 #define CCREG (saved_state.cc)
646 #define LC0REG (saved_state.lc[0])
647 #define LT0REG (saved_state.lt[0])
648 #define LB0REG (saved_state.lb[0])
649 #define LC1REG (saved_state.lc[1])
650 #define LT1REG (saved_state.lt[1])
651 #define LB1REG (saved_state.lb[1])
652 #define RETSREG (saved_state.rets)
653 #define PCREG (saved_state.pc)
656 get_allreg (int grp
, int reg
)
658 int fullreg
= (grp
<< 3) | reg
;
659 /* REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
660 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
661 REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, REG_M2, REG_M3,
662 REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3,
663 REG_A0x, REG_A0w, REG_A1x, REG_A1w, , , REG_ASTAT, REG_RETS,
665 REG_LC0, REG_LT0, REG_LB0, REG_LC1, REG_LT1, REG_LB1, REG_CYCLES,
667 REG_USP, REG_SEQSTAT, REG_SYSCFG, REG_RETI, REG_RETX, REG_RETN, REG_RETE,
669 switch (fullreg
>> 2)
671 case 0: case 1: return &DREG (reg
); break;
672 case 2: case 3: return &PREG (reg
); break;
673 case 4: return &IREG (reg
& 3); break;
674 case 5: return &MREG (reg
& 3); break;
675 case 6: return &BREG (reg
& 3); break;
676 case 7: return &LREG (reg
& 3); break;
680 case 32: return &saved_state
.a0x
;
681 case 33: return &saved_state
.a0w
;
682 case 34: return &saved_state
.a1x
;
683 case 35: return &saved_state
.a1w
;
684 case 39: return &saved_state
.rets
;
685 case 48: return &LC0REG
;
686 case 49: return <0REG
;
687 case 50: return &LB0REG
;
688 case 51: return &LC1REG
;
689 case 52: return <1REG
;
690 case 53: return &LB1REG
;
697 decode_ProgCtrl_0 (TIword iw0
, disassemble_info
*outf
)
700 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
701 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.prgfunc.......|.poprnd........|
702 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
703 int poprnd
= ((iw0
>> ProgCtrl_poprnd_bits
) & ProgCtrl_poprnd_mask
);
704 int prgfunc
= ((iw0
>> ProgCtrl_prgfunc_bits
) & ProgCtrl_prgfunc_mask
);
706 if (prgfunc
== 0 && poprnd
== 0)
708 else if (prgfunc
== 1 && poprnd
== 0)
710 else if (prgfunc
== 1 && poprnd
== 1)
712 else if (prgfunc
== 1 && poprnd
== 2)
714 else if (prgfunc
== 1 && poprnd
== 3)
716 else if (prgfunc
== 1 && poprnd
== 4)
718 else if (prgfunc
== 2 && poprnd
== 0)
720 else if (prgfunc
== 2 && poprnd
== 3)
721 OUTS (outf
, "CSYNC");
722 else if (prgfunc
== 2 && poprnd
== 4)
723 OUTS (outf
, "SSYNC");
724 else if (prgfunc
== 2 && poprnd
== 5)
725 OUTS (outf
, "EMUEXCPT");
726 else if (prgfunc
== 3)
729 OUTS (outf
, dregs (poprnd
));
731 else if (prgfunc
== 4)
734 OUTS (outf
, dregs (poprnd
));
736 else if (prgfunc
== 5)
738 OUTS (outf
, "JUMP (");
739 OUTS (outf
, pregs (poprnd
));
742 else if (prgfunc
== 6)
744 OUTS (outf
, "CALL (");
745 OUTS (outf
, pregs (poprnd
));
748 else if (prgfunc
== 7)
750 OUTS (outf
, "CALL (PC+");
751 OUTS (outf
, pregs (poprnd
));
754 else if (prgfunc
== 8)
756 OUTS (outf
, "JUMP (PC+");
757 OUTS (outf
, pregs (poprnd
));
760 else if (prgfunc
== 9)
762 OUTS (outf
, "RAISE ");
763 OUTS (outf
, uimm4 (poprnd
));
765 else if (prgfunc
== 10)
767 OUTS (outf
, "EXCPT ");
768 OUTS (outf
, uimm4 (poprnd
));
770 else if (prgfunc
== 11)
772 OUTS (outf
, "TESTSET (");
773 OUTS (outf
, pregs (poprnd
));
782 decode_CaCTRL_0 (TIword iw0
, disassemble_info
*outf
)
785 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
786 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......|
787 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
788 int a
= ((iw0
>> CaCTRL_a_bits
) & CaCTRL_a_mask
);
789 int op
= ((iw0
>> CaCTRL_op_bits
) & CaCTRL_op_mask
);
790 int reg
= ((iw0
>> CaCTRL_reg_bits
) & CaCTRL_reg_mask
);
792 if (a
== 0 && op
== 0)
794 OUTS (outf
, "PREFETCH[");
795 OUTS (outf
, pregs (reg
));
798 else if (a
== 0 && op
== 1)
800 OUTS (outf
, "FLUSHINV[");
801 OUTS (outf
, pregs (reg
));
804 else if (a
== 0 && op
== 2)
806 OUTS (outf
, "FLUSH[");
807 OUTS (outf
, pregs (reg
));
810 else if (a
== 0 && op
== 3)
812 OUTS (outf
, "IFLUSH[");
813 OUTS (outf
, pregs (reg
));
816 else if (a
== 1 && op
== 0)
818 OUTS (outf
, "PREFETCH[");
819 OUTS (outf
, pregs (reg
));
822 else if (a
== 1 && op
== 1)
824 OUTS (outf
, "FLUSHINV[");
825 OUTS (outf
, pregs (reg
));
828 else if (a
== 1 && op
== 2)
830 OUTS (outf
, "FLUSH[");
831 OUTS (outf
, pregs (reg
));
834 else if (a
== 1 && op
== 3)
836 OUTS (outf
, "IFLUSH[");
837 OUTS (outf
, pregs (reg
));
846 decode_PushPopReg_0 (TIword iw0
, disassemble_info
*outf
)
849 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
850 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.W.|.grp.......|.reg.......|
851 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
852 int W
= ((iw0
>> PushPopReg_W_bits
) & PushPopReg_W_mask
);
853 int grp
= ((iw0
>> PushPopReg_grp_bits
) & PushPopReg_grp_mask
);
854 int reg
= ((iw0
>> PushPopReg_reg_bits
) & PushPopReg_reg_mask
);
858 OUTS (outf
, allregs (reg
, grp
));
859 OUTS (outf
, " = [SP++]");
863 OUTS (outf
, "[--SP] = ");
864 OUTS (outf
, allregs (reg
, grp
));
872 decode_PushPopMultiple_0 (TIword iw0
, disassemble_info
*outf
)
875 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
876 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.d.|.p.|.W.|.dr........|.pr........|
877 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
878 int p
= ((iw0
>> PushPopMultiple_p_bits
) & PushPopMultiple_p_mask
);
879 int d
= ((iw0
>> PushPopMultiple_d_bits
) & PushPopMultiple_d_mask
);
880 int W
= ((iw0
>> PushPopMultiple_W_bits
) & PushPopMultiple_W_mask
);
881 int dr
= ((iw0
>> PushPopMultiple_dr_bits
) & PushPopMultiple_dr_mask
);
882 int pr
= ((iw0
>> PushPopMultiple_pr_bits
) & PushPopMultiple_pr_mask
);
885 sprintf (ps
, "%d", pr
);
886 sprintf (ds
, "%d", dr
);
888 if (W
== 1 && d
== 1 && p
== 1)
890 OUTS (outf
, "[--SP] = (R7:");
892 OUTS (outf
, ", P5:");
896 else if (W
== 1 && d
== 1 && p
== 0)
898 OUTS (outf
, "[--SP] = (R7:");
902 else if (W
== 1 && d
== 0 && p
== 1)
904 OUTS (outf
, "[--SP] = (P5:");
908 else if (W
== 0 && d
== 1 && p
== 1)
912 OUTS (outf
, ", P5:");
914 OUTS (outf
, ") = [SP++]");
916 else if (W
== 0 && d
== 1 && p
== 0)
920 OUTS (outf
, ") = [SP++]");
922 else if (W
== 0 && d
== 0 && p
== 1)
926 OUTS (outf
, ") = [SP++]");
934 decode_ccMV_0 (TIword iw0
, disassemble_info
*outf
)
937 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
938 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.T.|.d.|.s.|.dst.......|.src.......|
939 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
940 int s
= ((iw0
>> CCmv_s_bits
) & CCmv_s_mask
);
941 int d
= ((iw0
>> CCmv_d_bits
) & CCmv_d_mask
);
942 int T
= ((iw0
>> CCmv_T_bits
) & CCmv_T_mask
);
943 int src
= ((iw0
>> CCmv_src_bits
) & CCmv_src_mask
);
944 int dst
= ((iw0
>> CCmv_dst_bits
) & CCmv_dst_mask
);
948 OUTS (outf
, "IF CC ");
949 OUTS (outf
, gregs (dst
, d
));
951 OUTS (outf
, gregs (src
, s
));
955 OUTS (outf
, "IF ! CC ");
956 OUTS (outf
, gregs (dst
, d
));
958 OUTS (outf
, gregs (src
, s
));
966 decode_CCflag_0 (TIword iw0
, disassemble_info
*outf
)
969 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
970 | 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........|
971 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
972 int x
= ((iw0
>> CCflag_x_bits
) & CCflag_x_mask
);
973 int y
= ((iw0
>> CCflag_y_bits
) & CCflag_y_mask
);
974 int I
= ((iw0
>> CCflag_I_bits
) & CCflag_I_mask
);
975 int G
= ((iw0
>> CCflag_G_bits
) & CCflag_G_mask
);
976 int opc
= ((iw0
>> CCflag_opc_bits
) & CCflag_opc_mask
);
978 if (opc
== 0 && I
== 0 && G
== 0)
981 OUTS (outf
, dregs (x
));
983 OUTS (outf
, dregs (y
));
985 else if (opc
== 1 && I
== 0 && G
== 0)
988 OUTS (outf
, dregs (x
));
990 OUTS (outf
, dregs (y
));
992 else if (opc
== 2 && I
== 0 && G
== 0)
995 OUTS (outf
, dregs (x
));
997 OUTS (outf
, dregs (y
));
999 else if (opc
== 3 && I
== 0 && G
== 0)
1002 OUTS (outf
, dregs (x
));
1004 OUTS (outf
, dregs (y
));
1005 OUTS (outf
, "(IU)");
1007 else if (opc
== 4 && I
== 0 && G
== 0)
1010 OUTS (outf
, dregs (x
));
1012 OUTS (outf
, dregs (y
));
1013 OUTS (outf
, "(IU)");
1015 else if (opc
== 0 && I
== 1 && G
== 0)
1018 OUTS (outf
, dregs (x
));
1020 OUTS (outf
, imm3 (y
));
1022 else if (opc
== 1 && I
== 1 && G
== 0)
1025 OUTS (outf
, dregs (x
));
1027 OUTS (outf
, imm3 (y
));
1029 else if (opc
== 2 && I
== 1 && G
== 0)
1032 OUTS (outf
, dregs (x
));
1034 OUTS (outf
, imm3 (y
));
1036 else if (opc
== 3 && I
== 1 && G
== 0)
1039 OUTS (outf
, dregs (x
));
1041 OUTS (outf
, uimm3 (y
));
1042 OUTS (outf
, "(IU)");
1044 else if (opc
== 4 && I
== 1 && G
== 0)
1047 OUTS (outf
, dregs (x
));
1049 OUTS (outf
, uimm3 (y
));
1050 OUTS (outf
, "(IU)");
1052 else if (opc
== 0 && I
== 0 && G
== 1)
1055 OUTS (outf
, pregs (x
));
1057 OUTS (outf
, pregs (y
));
1059 else if (opc
== 1 && I
== 0 && G
== 1)
1062 OUTS (outf
, pregs (x
));
1064 OUTS (outf
, pregs (y
));
1066 else if (opc
== 2 && I
== 0 && G
== 1)
1069 OUTS (outf
, pregs (x
));
1071 OUTS (outf
, pregs (y
));
1073 else if (opc
== 3 && I
== 0 && G
== 1)
1076 OUTS (outf
, pregs (x
));
1078 OUTS (outf
, pregs (y
));
1079 OUTS (outf
, "(IU)");
1081 else if (opc
== 4 && I
== 0 && G
== 1)
1084 OUTS (outf
, pregs (x
));
1086 OUTS (outf
, pregs (y
));
1087 OUTS (outf
, "(IU)");
1089 else if (opc
== 0 && I
== 1 && G
== 1)
1092 OUTS (outf
, pregs (x
));
1094 OUTS (outf
, imm3 (y
));
1096 else if (opc
== 1 && I
== 1 && G
== 1)
1099 OUTS (outf
, pregs (x
));
1101 OUTS (outf
, imm3 (y
));
1103 else if (opc
== 2 && I
== 1 && G
== 1)
1106 OUTS (outf
, pregs (x
));
1108 OUTS (outf
, imm3 (y
));
1110 else if (opc
== 3 && I
== 1 && G
== 1)
1113 OUTS (outf
, pregs (x
));
1115 OUTS (outf
, uimm3 (y
));
1116 OUTS (outf
, "(IU)");
1118 else if (opc
== 4 && I
== 1 && G
== 1)
1121 OUTS (outf
, pregs (x
));
1123 OUTS (outf
, uimm3 (y
));
1124 OUTS (outf
, "(IU)");
1126 else if (opc
== 5 && I
== 0 && G
== 0)
1127 OUTS (outf
, "CC=A0==A1");
1129 else if (opc
== 6 && I
== 0 && G
== 0)
1130 OUTS (outf
, "CC=A0<A1");
1132 else if (opc
== 7 && I
== 0 && G
== 0)
1133 OUTS (outf
, "CC=A0<=A1");
1141 decode_CC2dreg_0 (TIword iw0
, disassemble_info
*outf
)
1144 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1145 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |.op....|.reg.......|
1146 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1147 int op
= ((iw0
>> CC2dreg_op_bits
) & CC2dreg_op_mask
);
1148 int reg
= ((iw0
>> CC2dreg_reg_bits
) & CC2dreg_reg_mask
);
1152 OUTS (outf
, dregs (reg
));
1158 OUTS (outf
, dregs (reg
));
1161 OUTS (outf
, "CC=!CC");
1169 decode_CC2stat_0 (TIword iw0
, disassemble_info
*outf
)
1172 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1173 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.D.|.op....|.cbit..............|
1174 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1175 int D
= ((iw0
>> CC2stat_D_bits
) & CC2stat_D_mask
);
1176 int op
= ((iw0
>> CC2stat_op_bits
) & CC2stat_op_mask
);
1177 int cbit
= ((iw0
>> CC2stat_cbit_bits
) & CC2stat_cbit_mask
);
1179 if (op
== 0 && D
== 0)
1181 OUTS (outf
, "CC = ");
1182 OUTS (outf
, statbits (cbit
));
1184 else if (op
== 1 && D
== 0)
1186 OUTS (outf
, "CC|=");
1187 OUTS (outf
, statbits (cbit
));
1189 else if (op
== 2 && D
== 0)
1191 OUTS (outf
, "CC&=");
1192 OUTS (outf
, statbits (cbit
));
1194 else if (op
== 3 && D
== 0)
1196 OUTS (outf
, "CC^=");
1197 OUTS (outf
, statbits (cbit
));
1199 else if (op
== 0 && D
== 1)
1201 OUTS (outf
, statbits (cbit
));
1204 else if (op
== 1 && D
== 1)
1206 OUTS (outf
, statbits (cbit
));
1207 OUTS (outf
, "|=CC");
1209 else if (op
== 2 && D
== 1)
1211 OUTS (outf
, statbits (cbit
));
1212 OUTS (outf
, "&=CC");
1214 else if (op
== 3 && D
== 1)
1216 OUTS (outf
, statbits (cbit
));
1217 OUTS (outf
, "^=CC");
1226 decode_BRCC_0 (TIword iw0
, bfd_vma pc
, disassemble_info
*outf
)
1229 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1230 | 0 | 0 | 0 | 1 |.T.|.B.|.offset................................|
1231 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1232 int B
= ((iw0
>> BRCC_B_bits
) & BRCC_B_mask
);
1233 int T
= ((iw0
>> BRCC_T_bits
) & BRCC_T_mask
);
1234 int offset
= ((iw0
>> BRCC_offset_bits
) & BRCC_offset_mask
);
1236 if (T
== 1 && B
== 1)
1238 OUTS (outf
, "IF CC JUMP ");
1239 OUTS (outf
, pcrel10 (offset
));
1240 OUTS (outf
, "(BP)");
1242 else if (T
== 0 && B
== 1)
1244 OUTS (outf
, "IF ! CC JUMP ");
1245 OUTS (outf
, pcrel10 (offset
));
1246 OUTS (outf
, "(BP)");
1250 OUTS (outf
, "IF CC JUMP ");
1251 OUTS (outf
, pcrel10 (offset
));
1255 OUTS (outf
, "IF ! CC JUMP ");
1256 OUTS (outf
, pcrel10 (offset
));
1265 decode_UJUMP_0 (TIword iw0
, bfd_vma pc
, disassemble_info
*outf
)
1268 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1269 | 0 | 0 | 1 | 0 |.offset........................................|
1270 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1271 int offset
= ((iw0
>> UJump_offset_bits
) & UJump_offset_mask
);
1273 OUTS (outf
, "JUMP.S ");
1274 OUTS (outf
, pcrel12 (offset
));
1279 decode_REGMV_0 (TIword iw0
, disassemble_info
*outf
)
1282 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1283 | 0 | 0 | 1 | 1 |.gd........|.gs........|.dst.......|.src.......|
1284 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1285 int gs
= ((iw0
>> RegMv_gs_bits
) & RegMv_gs_mask
);
1286 int gd
= ((iw0
>> RegMv_gd_bits
) & RegMv_gd_mask
);
1287 int src
= ((iw0
>> RegMv_src_bits
) & RegMv_src_mask
);
1288 int dst
= ((iw0
>> RegMv_dst_bits
) & RegMv_dst_mask
);
1290 OUTS (outf
, allregs (dst
, gd
));
1292 OUTS (outf
, allregs (src
, gs
));
1297 decode_ALU2op_0 (TIword iw0
, disassemble_info
*outf
)
1300 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1301 | 0 | 1 | 0 | 0 | 0 | 0 |.opc...........|.src.......|.dst.......|
1302 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1303 int src
= ((iw0
>> ALU2op_src_bits
) & ALU2op_src_mask
);
1304 int opc
= ((iw0
>> ALU2op_opc_bits
) & ALU2op_opc_mask
);
1305 int dst
= ((iw0
>> ALU2op_dst_bits
) & ALU2op_dst_mask
);
1309 OUTS (outf
, dregs (dst
));
1310 OUTS (outf
, ">>>=");
1311 OUTS (outf
, dregs (src
));
1315 OUTS (outf
, dregs (dst
));
1317 OUTS (outf
, dregs (src
));
1321 OUTS (outf
, dregs (dst
));
1323 OUTS (outf
, dregs (src
));
1327 OUTS (outf
, dregs (dst
));
1329 OUTS (outf
, dregs (src
));
1333 OUTS (outf
, dregs (dst
));
1335 OUTS (outf
, dregs (dst
));
1337 OUTS (outf
, dregs (src
));
1338 OUTS (outf
, ")<<1");
1342 OUTS (outf
, dregs (dst
));
1344 OUTS (outf
, dregs (dst
));
1346 OUTS (outf
, dregs (src
));
1347 OUTS (outf
, ")<<2");
1351 OUTS (outf
, "DIVQ(");
1352 OUTS (outf
, dregs (dst
));
1354 OUTS (outf
, dregs (src
));
1359 OUTS (outf
, "DIVS(");
1360 OUTS (outf
, dregs (dst
));
1362 OUTS (outf
, dregs (src
));
1367 OUTS (outf
, dregs (dst
));
1369 OUTS (outf
, dregs_lo (src
));
1374 OUTS (outf
, dregs (dst
));
1376 OUTS (outf
, dregs_lo (src
));
1381 OUTS (outf
, dregs (dst
));
1383 OUTS (outf
, dregs_byte (src
));
1388 OUTS (outf
, dregs (dst
));
1390 OUTS (outf
, dregs_byte (src
));
1395 OUTS (outf
, dregs (dst
));
1397 OUTS (outf
, dregs (src
));
1401 OUTS (outf
, dregs (dst
));
1403 OUTS (outf
, dregs (src
));
1412 decode_PTR2op_0 (TIword iw0
, disassemble_info
*outf
)
1415 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1416 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |.opc.......|.src.......|.dst.......|
1417 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1418 int src
= ((iw0
>> PTR2op_src_bits
) & PTR2op_dst_mask
);
1419 int opc
= ((iw0
>> PTR2op_opc_bits
) & PTR2op_opc_mask
);
1420 int dst
= ((iw0
>> PTR2op_dst_bits
) & PTR2op_dst_mask
);
1424 OUTS (outf
, pregs (dst
));
1426 OUTS (outf
, pregs (src
));
1430 OUTS (outf
, pregs (dst
));
1432 OUTS (outf
, pregs (src
));
1437 OUTS (outf
, pregs (dst
));
1439 OUTS (outf
, pregs (src
));
1444 OUTS (outf
, pregs (dst
));
1446 OUTS (outf
, pregs (src
));
1451 OUTS (outf
, pregs (dst
));
1453 OUTS (outf
, pregs (src
));
1454 OUTS (outf
, "(BREV)");
1458 OUTS (outf
, pregs (dst
));
1460 OUTS (outf
, pregs (dst
));
1462 OUTS (outf
, pregs (src
));
1463 OUTS (outf
, ")<<1");
1467 OUTS (outf
, pregs (dst
));
1469 OUTS (outf
, pregs (dst
));
1471 OUTS (outf
, pregs (src
));
1472 OUTS (outf
, ")<<2");
1481 decode_LOGI2op_0 (TIword iw0
, disassemble_info
*outf
)
1484 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1485 | 0 | 1 | 0 | 0 | 1 |.opc.......|.src...............|.dst.......|
1486 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1487 int src
= ((iw0
>> LOGI2op_src_bits
) & LOGI2op_src_mask
);
1488 int opc
= ((iw0
>> LOGI2op_opc_bits
) & LOGI2op_opc_mask
);
1489 int dst
= ((iw0
>> LOGI2op_dst_bits
) & LOGI2op_dst_mask
);
1493 OUTS (outf
, "CC = ! BITTST (");
1494 OUTS (outf
, dregs (dst
));
1496 OUTS (outf
, uimm5 (src
));
1501 OUTS (outf
, "CC = BITTST (");
1502 OUTS (outf
, dregs (dst
));
1504 OUTS (outf
, uimm5 (src
));
1509 OUTS (outf
, "BITSET (");
1510 OUTS (outf
, dregs (dst
));
1512 OUTS (outf
, uimm5 (src
));
1517 OUTS (outf
, "BITTGL (");
1518 OUTS (outf
, dregs (dst
));
1520 OUTS (outf
, uimm5 (src
));
1525 OUTS (outf
, "BITCLR (");
1526 OUTS (outf
, dregs (dst
));
1528 OUTS (outf
, uimm5 (src
));
1533 OUTS (outf
, dregs (dst
));
1534 OUTS (outf
, ">>>=");
1535 OUTS (outf
, uimm5 (src
));
1539 OUTS (outf
, dregs (dst
));
1541 OUTS (outf
, uimm5 (src
));
1545 OUTS (outf
, dregs (dst
));
1547 OUTS (outf
, uimm5 (src
));
1556 decode_COMP3op_0 (TIword iw0
, disassemble_info
*outf
)
1559 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1560 | 0 | 1 | 0 | 1 |.opc.......|.dst.......|.src1......|.src0......|
1561 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1562 int opc
= ((iw0
>> COMP3op_opc_bits
) & COMP3op_opc_mask
);
1563 int dst
= ((iw0
>> COMP3op_dst_bits
) & COMP3op_dst_mask
);
1564 int src0
= ((iw0
>> COMP3op_src0_bits
) & COMP3op_src0_mask
);
1565 int src1
= ((iw0
>> COMP3op_src1_bits
) & COMP3op_src1_mask
);
1567 if (opc
== 5 && src1
== src0
)
1569 OUTS (outf
, pregs (dst
));
1571 OUTS (outf
, pregs (src0
));
1576 OUTS (outf
, dregs (dst
));
1578 OUTS (outf
, dregs (src0
));
1580 OUTS (outf
, dregs (src1
));
1584 OUTS (outf
, dregs (dst
));
1586 OUTS (outf
, dregs (src0
));
1588 OUTS (outf
, dregs (src1
));
1592 OUTS (outf
, dregs (dst
));
1594 OUTS (outf
, dregs (src0
));
1596 OUTS (outf
, dregs (src1
));
1600 OUTS (outf
, dregs (dst
));
1602 OUTS (outf
, dregs (src0
));
1604 OUTS (outf
, dregs (src1
));
1608 OUTS (outf
, pregs (dst
));
1610 OUTS (outf
, pregs (src0
));
1612 OUTS (outf
, pregs (src1
));
1616 OUTS (outf
, pregs (dst
));
1618 OUTS (outf
, pregs (src0
));
1620 OUTS (outf
, pregs (src1
));
1621 OUTS (outf
, "<<1)");
1625 OUTS (outf
, pregs (dst
));
1627 OUTS (outf
, pregs (src0
));
1629 OUTS (outf
, pregs (src1
));
1630 OUTS (outf
, "<<2)");
1634 OUTS (outf
, dregs (dst
));
1636 OUTS (outf
, dregs (src0
));
1638 OUTS (outf
, dregs (src1
));
1647 decode_COMPI2opD_0 (TIword iw0
, disassemble_info
*outf
)
1650 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1651 | 0 | 1 | 1 | 0 | 0 |.op|..src......................|.dst.......|
1652 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1653 int op
= ((iw0
>> COMPI2opD_op_bits
) & COMPI2opD_op_mask
);
1654 int dst
= ((iw0
>> COMPI2opD_dst_bits
) & COMPI2opD_dst_mask
);
1655 int src
= ((iw0
>> COMPI2opD_src_bits
) & COMPI2opD_src_mask
);
1659 OUTS (outf
, dregs (dst
));
1661 OUTS (outf
, imm7 (src
));
1666 OUTS (outf
, dregs (dst
));
1668 OUTS (outf
, imm7 (src
));
1677 decode_COMPI2opP_0 (TIword iw0
, disassemble_info
*outf
)
1680 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1681 | 0 | 1 | 1 | 0 | 1 |.op|.src.......................|.dst.......|
1682 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1683 int op
= ((iw0
>> COMPI2opP_op_bits
) & COMPI2opP_op_mask
);
1684 int src
= ((iw0
>> COMPI2opP_src_bits
) & COMPI2opP_src_mask
);
1685 int dst
= ((iw0
>> COMPI2opP_dst_bits
) & COMPI2opP_dst_mask
);
1689 OUTS (outf
, pregs (dst
));
1691 OUTS (outf
, imm7 (src
));
1695 OUTS (outf
, pregs (dst
));
1697 OUTS (outf
, imm7 (src
));
1706 decode_LDSTpmod_0 (TIword iw0
, disassemble_info
*outf
)
1709 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1710 | 1 | 0 | 0 | 0 |.W.|.aop...|.reg.......|.idx.......|.ptr.......|
1711 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1712 int W
= ((iw0
>> LDSTpmod_W_bits
) & LDSTpmod_W_mask
);
1713 int aop
= ((iw0
>> LDSTpmod_aop_bits
) & LDSTpmod_aop_mask
);
1714 int idx
= ((iw0
>> LDSTpmod_idx_bits
) & LDSTpmod_idx_mask
);
1715 int ptr
= ((iw0
>> LDSTpmod_ptr_bits
) & LDSTpmod_ptr_mask
);
1716 int reg
= ((iw0
>> LDSTpmod_reg_bits
) & LDSTpmod_reg_mask
);
1718 if (aop
== 1 && W
== 0 && idx
== ptr
)
1720 OUTS (outf
, dregs_lo (reg
));
1722 OUTS (outf
, pregs (ptr
));
1725 else if (aop
== 2 && W
== 0 && idx
== ptr
)
1727 OUTS (outf
, dregs_hi (reg
));
1729 OUTS (outf
, pregs (ptr
));
1732 else if (aop
== 1 && W
== 1 && idx
== ptr
)
1735 OUTS (outf
, pregs (ptr
));
1737 OUTS (outf
, dregs_lo (reg
));
1739 else if (aop
== 2 && W
== 1 && idx
== ptr
)
1742 OUTS (outf
, pregs (ptr
));
1744 OUTS (outf
, dregs_hi (reg
));
1746 else if (aop
== 0 && W
== 0)
1748 OUTS (outf
, dregs (reg
));
1750 OUTS (outf
, pregs (ptr
));
1752 OUTS (outf
, pregs (idx
));
1755 else if (aop
== 1 && W
== 0)
1757 OUTS (outf
, dregs_lo (reg
));
1759 OUTS (outf
, pregs (ptr
));
1761 OUTS (outf
, pregs (idx
));
1764 else if (aop
== 2 && W
== 0)
1766 OUTS (outf
, dregs_hi (reg
));
1768 OUTS (outf
, pregs (ptr
));
1770 OUTS (outf
, pregs (idx
));
1773 else if (aop
== 3 && W
== 0)
1775 OUTS (outf
, dregs (reg
));
1777 OUTS (outf
, pregs (ptr
));
1779 OUTS (outf
, pregs (idx
));
1780 OUTS (outf
, "] (Z)");
1782 else if (aop
== 3 && W
== 1)
1784 OUTS (outf
, dregs (reg
));
1786 OUTS (outf
, pregs (ptr
));
1788 OUTS (outf
, pregs (idx
));
1789 OUTS (outf
, "](X)");
1791 else if (aop
== 0 && W
== 1)
1794 OUTS (outf
, pregs (ptr
));
1796 OUTS (outf
, pregs (idx
));
1798 OUTS (outf
, dregs (reg
));
1800 else if (aop
== 1 && W
== 1)
1803 OUTS (outf
, pregs (ptr
));
1805 OUTS (outf
, pregs (idx
));
1807 OUTS (outf
, dregs_lo (reg
));
1809 else if (aop
== 2 && W
== 1)
1812 OUTS (outf
, pregs (ptr
));
1814 OUTS (outf
, pregs (idx
));
1816 OUTS (outf
, dregs_hi (reg
));
1825 decode_dagMODim_0 (TIword iw0
, disassemble_info
*outf
)
1828 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1829 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |.br| 1 | 1 |.op|.m.....|.i.....|
1830 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1831 int i
= ((iw0
>> DagMODim_i_bits
) & DagMODim_i_mask
);
1832 int m
= ((iw0
>> DagMODim_m_bits
) & DagMODim_m_mask
);
1833 int br
= ((iw0
>> DagMODim_br_bits
) & DagMODim_br_mask
);
1834 int op
= ((iw0
>> DagMODim_op_bits
) & DagMODim_op_mask
);
1836 if (op
== 0 && br
== 1)
1838 OUTS (outf
, iregs (i
));
1840 OUTS (outf
, mregs (m
));
1841 OUTS (outf
, "(BREV)");
1845 OUTS (outf
, iregs (i
));
1847 OUTS (outf
, mregs (m
));
1851 OUTS (outf
, iregs (i
));
1853 OUTS (outf
, mregs (m
));
1862 decode_dagMODik_0 (TIword iw0
, disassemble_info
*outf
)
1865 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1866 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |.op....|.i.....|
1867 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1868 int i
= ((iw0
>> DagMODik_i_bits
) & DagMODik_i_mask
);
1869 int op
= ((iw0
>> DagMODik_op_bits
) & DagMODik_op_mask
);
1873 OUTS (outf
, iregs (i
));
1878 OUTS (outf
, iregs (i
));
1883 OUTS (outf
, iregs (i
));
1888 OUTS (outf
, iregs (i
));
1898 decode_dspLDST_0 (TIword iw0
, disassemble_info
*outf
)
1901 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1902 | 1 | 0 | 0 | 1 | 1 | 1 |.W.|.aop...|.m.....|.i.....|.reg.......|
1903 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
1904 int i
= ((iw0
>> DspLDST_i_bits
) & DspLDST_i_mask
);
1905 int m
= ((iw0
>> DspLDST_m_bits
) & DspLDST_m_mask
);
1906 int W
= ((iw0
>> DspLDST_W_bits
) & DspLDST_W_mask
);
1907 int aop
= ((iw0
>> DspLDST_aop_bits
) & DspLDST_aop_mask
);
1908 int reg
= ((iw0
>> DspLDST_reg_bits
) & DspLDST_reg_mask
);
1910 if (aop
== 0 && W
== 0 && m
== 0)
1912 OUTS (outf
, dregs (reg
));
1914 OUTS (outf
, iregs (i
));
1917 else if (aop
== 0 && W
== 0 && m
== 1)
1919 OUTS (outf
, dregs_lo (reg
));
1921 OUTS (outf
, iregs (i
));
1924 else if (aop
== 0 && W
== 0 && m
== 2)
1926 OUTS (outf
, dregs_hi (reg
));
1928 OUTS (outf
, iregs (i
));
1931 else if (aop
== 1 && W
== 0 && m
== 0)
1933 OUTS (outf
, dregs (reg
));
1935 OUTS (outf
, iregs (i
));
1938 else if (aop
== 1 && W
== 0 && m
== 1)
1940 OUTS (outf
, dregs_lo (reg
));
1942 OUTS (outf
, iregs (i
));
1945 else if (aop
== 1 && W
== 0 && m
== 2)
1947 OUTS (outf
, dregs_hi (reg
));
1949 OUTS (outf
, iregs (i
));
1952 else if (aop
== 2 && W
== 0 && m
== 0)
1954 OUTS (outf
, dregs (reg
));
1956 OUTS (outf
, iregs (i
));
1959 else if (aop
== 2 && W
== 0 && m
== 1)
1961 OUTS (outf
, dregs_lo (reg
));
1963 OUTS (outf
, iregs (i
));
1966 else if (aop
== 2 && W
== 0 && m
== 2)
1968 OUTS (outf
, dregs_hi (reg
));
1970 OUTS (outf
, iregs (i
));
1973 else if (aop
== 0 && W
== 1 && m
== 0)
1976 OUTS (outf
, iregs (i
));
1977 OUTS (outf
, "++]=");
1978 OUTS (outf
, dregs (reg
));
1980 else if (aop
== 0 && W
== 1 && m
== 1)
1983 OUTS (outf
, iregs (i
));
1984 OUTS (outf
, "++]=");
1985 OUTS (outf
, dregs_lo (reg
));
1987 else if (aop
== 0 && W
== 1 && m
== 2)
1990 OUTS (outf
, iregs (i
));
1991 OUTS (outf
, "++]=");
1992 OUTS (outf
, dregs_hi (reg
));
1994 else if (aop
== 1 && W
== 1 && m
== 0)
1997 OUTS (outf
, iregs (i
));
1998 OUTS (outf
, "--]=");
1999 OUTS (outf
, dregs (reg
));
2001 else if (aop
== 1 && W
== 1 && m
== 1)
2004 OUTS (outf
, iregs (i
));
2005 OUTS (outf
, "--]=");
2006 OUTS (outf
, dregs_lo (reg
));
2008 else if (aop
== 1 && W
== 1 && m
== 2)
2011 OUTS (outf
, iregs (i
));
2012 OUTS (outf
, "--]=");
2013 OUTS (outf
, dregs_hi (reg
));
2015 else if (aop
== 2 && W
== 1 && m
== 0)
2018 OUTS (outf
, iregs (i
));
2020 OUTS (outf
, dregs (reg
));
2022 else if (aop
== 2 && W
== 1 && m
== 1)
2025 OUTS (outf
, iregs (i
));
2027 OUTS (outf
, dregs_lo (reg
));
2029 else if (aop
== 2 && W
== 1 && m
== 2)
2032 OUTS (outf
, iregs (i
));
2034 OUTS (outf
, dregs_hi (reg
));
2036 else if (aop
== 3 && W
== 0)
2038 OUTS (outf
, dregs (reg
));
2040 OUTS (outf
, iregs (i
));
2042 OUTS (outf
, mregs (m
));
2045 else if (aop
== 3 && W
== 1)
2048 OUTS (outf
, iregs (i
));
2050 OUTS (outf
, mregs (m
));
2052 OUTS (outf
, dregs (reg
));
2061 decode_LDST_0 (TIword iw0
, disassemble_info
*outf
)
2064 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2065 | 1 | 0 | 0 | 1 |.sz....|.W.|.aop...|.Z.|.ptr.......|.reg.......|
2066 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2067 int Z
= ((iw0
>> LDST_Z_bits
) & LDST_Z_mask
);
2068 int W
= ((iw0
>> LDST_W_bits
) & LDST_W_mask
);
2069 int sz
= ((iw0
>> LDST_sz_bits
) & LDST_sz_mask
);
2070 int aop
= ((iw0
>> LDST_aop_bits
) & LDST_aop_mask
);
2071 int reg
= ((iw0
>> LDST_reg_bits
) & LDST_reg_mask
);
2072 int ptr
= ((iw0
>> LDST_ptr_bits
) & LDST_ptr_mask
);
2074 if (aop
== 0 && sz
== 0 && Z
== 0 && W
== 0)
2076 OUTS (outf
, dregs (reg
));
2078 OUTS (outf
, pregs (ptr
));
2081 else if (aop
== 0 && sz
== 0 && Z
== 1 && W
== 0)
2083 OUTS (outf
, pregs (reg
));
2085 OUTS (outf
, pregs (ptr
));
2088 else if (aop
== 0 && sz
== 1 && Z
== 0 && W
== 0)
2090 OUTS (outf
, dregs (reg
));
2092 OUTS (outf
, pregs (ptr
));
2093 OUTS (outf
, "++] (Z)");
2095 else if (aop
== 0 && sz
== 1 && Z
== 1 && W
== 0)
2097 OUTS (outf
, dregs (reg
));
2099 OUTS (outf
, pregs (ptr
));
2100 OUTS (outf
, "++](X)");
2102 else if (aop
== 0 && sz
== 2 && Z
== 0 && W
== 0)
2104 OUTS (outf
, dregs (reg
));
2106 OUTS (outf
, pregs (ptr
));
2107 OUTS (outf
, "++] (Z)");
2109 else if (aop
== 0 && sz
== 2 && Z
== 1 && W
== 0)
2111 OUTS (outf
, dregs (reg
));
2113 OUTS (outf
, pregs (ptr
));
2114 OUTS (outf
, "++](X)");
2116 else if (aop
== 1 && sz
== 0 && Z
== 0 && W
== 0)
2118 OUTS (outf
, dregs (reg
));
2120 OUTS (outf
, pregs (ptr
));
2123 else if (aop
== 1 && sz
== 0 && Z
== 1 && W
== 0)
2125 OUTS (outf
, pregs (reg
));
2127 OUTS (outf
, pregs (ptr
));
2130 else if (aop
== 1 && sz
== 1 && Z
== 0 && W
== 0)
2132 OUTS (outf
, dregs (reg
));
2134 OUTS (outf
, pregs (ptr
));
2135 OUTS (outf
, "--] (Z)");
2137 else if (aop
== 1 && sz
== 1 && Z
== 1 && W
== 0)
2139 OUTS (outf
, dregs (reg
));
2141 OUTS (outf
, pregs (ptr
));
2142 OUTS (outf
, "--](X)");
2144 else if (aop
== 1 && sz
== 2 && Z
== 0 && W
== 0)
2146 OUTS (outf
, dregs (reg
));
2148 OUTS (outf
, pregs (ptr
));
2149 OUTS (outf
, "--] (Z)");
2151 else if (aop
== 1 && sz
== 2 && Z
== 1 && W
== 0)
2153 OUTS (outf
, dregs (reg
));
2155 OUTS (outf
, pregs (ptr
));
2156 OUTS (outf
, "--](X)");
2158 else if (aop
== 2 && sz
== 0 && Z
== 0 && W
== 0)
2160 OUTS (outf
, dregs (reg
));
2162 OUTS (outf
, pregs (ptr
));
2165 else if (aop
== 2 && sz
== 0 && Z
== 1 && W
== 0)
2167 OUTS (outf
, pregs (reg
));
2169 OUTS (outf
, pregs (ptr
));
2172 else if (aop
== 2 && sz
== 1 && Z
== 0 && W
== 0)
2174 OUTS (outf
, dregs (reg
));
2176 OUTS (outf
, pregs (ptr
));
2177 OUTS (outf
, "] (Z)");
2179 else if (aop
== 2 && sz
== 1 && Z
== 1 && W
== 0)
2181 OUTS (outf
, dregs (reg
));
2183 OUTS (outf
, pregs (ptr
));
2184 OUTS (outf
, "](X)");
2186 else if (aop
== 2 && sz
== 2 && Z
== 0 && W
== 0)
2188 OUTS (outf
, dregs (reg
));
2190 OUTS (outf
, pregs (ptr
));
2191 OUTS (outf
, "] (Z)");
2193 else if (aop
== 2 && sz
== 2 && Z
== 1 && W
== 0)
2195 OUTS (outf
, dregs (reg
));
2197 OUTS (outf
, pregs (ptr
));
2198 OUTS (outf
, "](X)");
2200 else if (aop
== 0 && sz
== 0 && Z
== 0 && W
== 1)
2203 OUTS (outf
, pregs (ptr
));
2204 OUTS (outf
, "++]=");
2205 OUTS (outf
, dregs (reg
));
2207 else if (aop
== 0 && sz
== 0 && Z
== 1 && W
== 1)
2210 OUTS (outf
, pregs (ptr
));
2211 OUTS (outf
, "++]=");
2212 OUTS (outf
, pregs (reg
));
2214 else if (aop
== 0 && sz
== 1 && Z
== 0 && W
== 1)
2217 OUTS (outf
, pregs (ptr
));
2218 OUTS (outf
, "++]=");
2219 OUTS (outf
, dregs (reg
));
2221 else if (aop
== 0 && sz
== 2 && Z
== 0 && W
== 1)
2224 OUTS (outf
, pregs (ptr
));
2225 OUTS (outf
, "++]=");
2226 OUTS (outf
, dregs (reg
));
2228 else if (aop
== 1 && sz
== 0 && Z
== 0 && W
== 1)
2231 OUTS (outf
, pregs (ptr
));
2232 OUTS (outf
, "--]=");
2233 OUTS (outf
, dregs (reg
));
2235 else if (aop
== 1 && sz
== 0 && Z
== 1 && W
== 1)
2238 OUTS (outf
, pregs (ptr
));
2239 OUTS (outf
, "--]=");
2240 OUTS (outf
, pregs (reg
));
2242 else if (aop
== 1 && sz
== 1 && Z
== 0 && W
== 1)
2245 OUTS (outf
, pregs (ptr
));
2246 OUTS (outf
, "--]=");
2247 OUTS (outf
, dregs (reg
));
2249 else if (aop
== 1 && sz
== 2 && Z
== 0 && W
== 1)
2252 OUTS (outf
, pregs (ptr
));
2253 OUTS (outf
, "--]=");
2254 OUTS (outf
, dregs (reg
));
2256 else if (aop
== 2 && sz
== 0 && Z
== 0 && W
== 1)
2259 OUTS (outf
, pregs (ptr
));
2261 OUTS (outf
, dregs (reg
));
2263 else if (aop
== 2 && sz
== 0 && Z
== 1 && W
== 1)
2266 OUTS (outf
, pregs (ptr
));
2268 OUTS (outf
, pregs (reg
));
2270 else if (aop
== 2 && sz
== 1 && Z
== 0 && W
== 1)
2273 OUTS (outf
, pregs (ptr
));
2275 OUTS (outf
, dregs (reg
));
2277 else if (aop
== 2 && sz
== 2 && Z
== 0 && W
== 1)
2280 OUTS (outf
, pregs (ptr
));
2282 OUTS (outf
, dregs (reg
));
2291 decode_LDSTiiFP_0 (TIword iw0
, disassemble_info
*outf
)
2294 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2295 | 1 | 0 | 1 | 1 | 1 | 0 |.W.|.offset............|.reg...........|
2296 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2297 int reg
= ((iw0
>> LDSTiiFP_reg_bits
) & LDSTiiFP_reg_mask
);
2298 int offset
= ((iw0
>> LDSTiiFP_offset_bits
) & LDSTiiFP_offset_mask
);
2299 int W
= ((iw0
>> LDSTiiFP_W_bits
) & LDSTiiFP_W_mask
);
2303 OUTS (outf
, dpregs (reg
));
2304 OUTS (outf
, "=[FP");
2305 OUTS (outf
, negimm5s4 (offset
));
2311 OUTS (outf
, negimm5s4 (offset
));
2313 OUTS (outf
, dpregs (reg
));
2322 decode_LDSTii_0 (TIword iw0
, disassemble_info
*outf
)
2325 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2326 | 1 | 0 | 1 |.W.|.op....|.offset........|.ptr.......|.reg.......|
2327 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2328 int reg
= ((iw0
>> LDSTii_reg_bit
) & LDSTii_reg_mask
);
2329 int ptr
= ((iw0
>> LDSTii_ptr_bit
) & LDSTii_ptr_mask
);
2330 int offset
= ((iw0
>> LDSTii_offset_bit
) & LDSTii_offset_mask
);
2331 int op
= ((iw0
>> LDSTii_op_bit
) & LDSTii_op_mask
);
2332 int W
= ((iw0
>> LDSTii_W_bit
) & LDSTii_W_mask
);
2334 if (W
== 0 && op
== 0)
2336 OUTS (outf
, dregs (reg
));
2338 OUTS (outf
, pregs (ptr
));
2340 OUTS (outf
, uimm4s4 (offset
));
2343 else if (W
== 0 && op
== 1)
2345 OUTS (outf
, dregs (reg
));
2347 OUTS (outf
, pregs (ptr
));
2349 OUTS (outf
, uimm4s2 (offset
));
2350 OUTS (outf
, "] (Z)");
2352 else if (W
== 0 && op
== 2)
2354 OUTS (outf
, dregs (reg
));
2356 OUTS (outf
, pregs (ptr
));
2358 OUTS (outf
, uimm4s2 (offset
));
2359 OUTS (outf
, "](X)");
2361 else if (W
== 0 && op
== 3)
2363 OUTS (outf
, pregs (reg
));
2365 OUTS (outf
, pregs (ptr
));
2367 OUTS (outf
, uimm4s4 (offset
));
2370 else if (W
== 1 && op
== 0)
2373 OUTS (outf
, pregs (ptr
));
2375 OUTS (outf
, uimm4s4 (offset
));
2377 OUTS (outf
, dregs (reg
));
2379 else if (W
== 1 && op
== 1)
2383 OUTS (outf
, pregs (ptr
));
2385 OUTS (outf
, uimm4s2 (offset
));
2388 OUTS (outf
, dregs (reg
));
2390 else if (W
== 1 && op
== 3)
2393 OUTS (outf
, pregs (ptr
));
2395 OUTS (outf
, uimm4s4 (offset
));
2397 OUTS (outf
, pregs (reg
));
2406 decode_LoopSetup_0 (TIword iw0
, TIword iw1
, bfd_vma pc
, disassemble_info
*outf
)
2409 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2410 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |.rop...|.c.|.soffset.......|
2411 |.reg...........| - | - |.eoffset...............................|
2412 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2413 int c
= ((iw0
>> (LoopSetup_c_bits
- 16)) & LoopSetup_c_mask
);
2414 int reg
= ((iw1
>> LoopSetup_reg_bits
) & LoopSetup_reg_mask
);
2415 int rop
= ((iw0
>> (LoopSetup_rop_bits
- 16)) & LoopSetup_rop_mask
);
2416 int soffset
= ((iw0
>> (LoopSetup_soffset_bits
- 16)) & LoopSetup_soffset_mask
);
2417 int eoffset
= ((iw1
>> LoopSetup_eoffset_bits
) & LoopSetup_eoffset_mask
);
2421 OUTS (outf
, "LSETUP");
2423 OUTS (outf
, pcrel4 (soffset
));
2425 OUTS (outf
, lppcrel10 (eoffset
));
2427 OUTS (outf
, counters (c
));
2431 OUTS (outf
, "LSETUP");
2433 OUTS (outf
, pcrel4 (soffset
));
2435 OUTS (outf
, lppcrel10 (eoffset
));
2437 OUTS (outf
, counters (c
));
2439 OUTS (outf
, pregs (reg
));
2443 OUTS (outf
, "LSETUP");
2445 OUTS (outf
, pcrel4 (soffset
));
2447 OUTS (outf
, lppcrel10 (eoffset
));
2449 OUTS (outf
, counters (c
));
2451 OUTS (outf
, pregs (reg
));
2461 decode_LDIMMhalf_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
2464 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2465 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 |.Z.|.H.|.S.|.grp...|.reg.......|
2466 |.hword.........................................................|
2467 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2468 int H
= ((iw0
>> (LDIMMhalf_H_bits
- 16)) & LDIMMhalf_H_mask
);
2469 int Z
= ((iw0
>> (LDIMMhalf_Z_bits
- 16)) & LDIMMhalf_Z_mask
);
2470 int S
= ((iw0
>> (LDIMMhalf_S_bits
- 16)) & LDIMMhalf_S_mask
);
2471 int reg
= ((iw0
>> (LDIMMhalf_reg_bits
- 16)) & LDIMMhalf_reg_mask
);
2472 int grp
= ((iw0
>> (LDIMMhalf_grp_bits
- 16)) & LDIMMhalf_grp_mask
);
2473 int hword
= ((iw1
>> LDIMMhalf_hword_bits
) & LDIMMhalf_hword_mask
);
2475 bu32
*pval
= get_allreg (grp
, reg
);
2477 /* Since we don't have 32-bit immediate loads, we allow the disassembler
2478 to combine them, so it prints out the right values.
2479 Here we keep track of the registers. */
2480 if (H
== 0 && S
== 1 && Z
== 0)
2482 /* regs = imm16 (x) */
2483 *pval
= imm16_val (hword
);
2485 else if (H
== 0 && S
== 0 && Z
== 1)
2487 /* regs = luimm16 (Z) */
2488 *pval
= luimm16_val (hword
);
2490 else if (H
== 0 && S
== 0 && Z
== 0)
2492 /* regs_lo = luimm16 */
2493 *pval
&= 0xFFFF0000;
2494 *pval
|= luimm16_val (hword
);
2496 else if (H
== 1 && S
== 0 && Z
== 0)
2498 /* regs_hi = huimm16 */
2500 *pval
|= luimm16_val (hword
) << 16;
2503 /* Here we do the disassembly */
2504 if (grp
== 0 && H
== 0 && S
== 0 && Z
== 0)
2506 OUTS (outf
, dregs_lo (reg
));
2508 OUTS (outf
, imm16 (hword
));
2510 else if (grp
== 0 && H
== 1 && S
== 0 && Z
== 0)
2512 OUTS (outf
, dregs_hi (reg
));
2514 OUTS (outf
, imm16 (hword
));
2516 else if (grp
== 0 && H
== 0 && S
== 1 && Z
== 0)
2518 OUTS (outf
, dregs (reg
));
2520 OUTS (outf
, imm16 (hword
));
2521 OUTS (outf
, " (X)");
2523 else if (H
== 0 && S
== 1 && Z
== 0)
2525 OUTS (outf
, regs (reg
, grp
));
2527 OUTS (outf
, imm16 (hword
));
2528 OUTS (outf
, " (X)");
2530 else if (H
== 0 && S
== 0 && Z
== 1)
2532 OUTS (outf
, regs (reg
, grp
));
2534 OUTS (outf
, luimm16 (hword
));
2537 else if (H
== 0 && S
== 0 && Z
== 0)
2539 OUTS (outf
, regs_lo (reg
, grp
));
2541 OUTS (outf
, uimm16 (hword
));
2543 else if (H
== 1 && S
== 0 && Z
== 0)
2545 OUTS (outf
, regs_hi (reg
, grp
));
2547 OUTS (outf
, uimm16 (hword
));
2552 /* And we print out the 32-bit value if it is a pointer. */
2553 if ( S
== 0 && Z
== 0 && grp
!= 0 )
2555 OUTS (outf
, "\t/* ");
2556 /* If it is an MMR, don't print the symbol. */
2557 if ( *pval
< 0xFFC00000 )
2558 OUTS (outf
, huimm32(*pval
));
2560 OUTS (outf
, uimm32(*pval
));
2569 decode_CALLa_0 (TIword iw0
, TIword iw1
, bfd_vma pc
, disassemble_info
*outf
)
2572 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2573 | 1 | 1 | 1 | 0 | 0 | 0 | 1 |.S.|.msw...........................|
2574 |.lsw...........................................................|
2575 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2576 int S
= ((iw0
>> (CALLa_S_bits
- 16)) & CALLa_S_mask
);
2577 int lsw
= ((iw1
>> 0) & 0xffff);
2578 int msw
= ((iw0
>> 0) & 0xff);
2581 OUTS (outf
, "CALL ");
2583 OUTS (outf
, "JUMP.L ");
2587 OUTS (outf
, pcrel24 (((msw
) << 16) | (lsw
)));
2592 decode_LDSTidxI_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
2595 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2596 | 1 | 1 | 1 | 0 | 0 | 1 |.W.|.Z.|.sz....|.ptr.......|.reg.......|
2597 |.offset........................................................|
2598 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2599 int Z
= ((iw0
>> (LDSTidxI_Z_bits
- 16)) & LDSTidxI_Z_mask
);
2600 int W
= ((iw0
>> (LDSTidxI_W_bits
- 16)) & LDSTidxI_W_mask
);
2601 int sz
= ((iw0
>> (LDSTidxI_sz_bits
- 16)) & LDSTidxI_sz_mask
);
2602 int reg
= ((iw0
>> (LDSTidxI_reg_bits
- 16)) & LDSTidxI_reg_mask
);
2603 int ptr
= ((iw0
>> (LDSTidxI_ptr_bits
- 16)) & LDSTidxI_ptr_mask
);
2604 int offset
= ((iw1
>> LDSTidxI_offset_bits
) & LDSTidxI_offset_mask
);
2606 if (W
== 0 && sz
== 0 && Z
== 0)
2608 OUTS (outf
, dregs (reg
));
2610 OUTS (outf
, pregs (ptr
));
2612 OUTS (outf
, imm16s4 (offset
));
2615 else if (W
== 0 && sz
== 0 && Z
== 1)
2617 OUTS (outf
, pregs (reg
));
2619 OUTS (outf
, pregs (ptr
));
2621 OUTS (outf
, imm16s4 (offset
));
2624 else if (W
== 0 && sz
== 1 && Z
== 0)
2626 OUTS (outf
, dregs (reg
));
2628 OUTS (outf
, pregs (ptr
));
2630 OUTS (outf
, imm16s2 (offset
));
2631 OUTS (outf
, "] (Z)");
2633 else if (W
== 0 && sz
== 1 && Z
== 1)
2635 OUTS (outf
, dregs (reg
));
2637 OUTS (outf
, pregs (ptr
));
2639 OUTS (outf
, imm16s2 (offset
));
2640 OUTS (outf
, "](X)");
2642 else if (W
== 0 && sz
== 2 && Z
== 0)
2644 OUTS (outf
, dregs (reg
));
2646 OUTS (outf
, pregs (ptr
));
2648 OUTS (outf
, imm16 (offset
));
2649 OUTS (outf
, "] (Z)");
2651 else if (W
== 0 && sz
== 2 && Z
== 1)
2653 OUTS (outf
, dregs (reg
));
2655 OUTS (outf
, pregs (ptr
));
2657 OUTS (outf
, imm16 (offset
));
2658 OUTS (outf
, "](X)");
2660 else if (W
== 1 && sz
== 0 && Z
== 0)
2663 OUTS (outf
, pregs (ptr
));
2665 OUTS (outf
, imm16s4 (offset
));
2667 OUTS (outf
, dregs (reg
));
2669 else if (W
== 1 && sz
== 0 && Z
== 1)
2672 OUTS (outf
, pregs (ptr
));
2674 OUTS (outf
, imm16s4 (offset
));
2676 OUTS (outf
, pregs (reg
));
2678 else if (W
== 1 && sz
== 1 && Z
== 0)
2681 OUTS (outf
, pregs (ptr
));
2683 OUTS (outf
, imm16s2 (offset
));
2685 OUTS (outf
, dregs (reg
));
2687 else if (W
== 1 && sz
== 2 && Z
== 0)
2690 OUTS (outf
, pregs (ptr
));
2692 OUTS (outf
, imm16 (offset
));
2694 OUTS (outf
, dregs (reg
));
2703 decode_linkage_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
2706 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2707 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.R.|
2708 |.framesize.....................................................|
2709 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2710 int R
= ((iw0
>> (Linkage_R_bits
- 16)) & Linkage_R_mask
);
2711 int framesize
= ((iw1
>> Linkage_framesize_bits
) & Linkage_framesize_mask
);
2715 OUTS (outf
, "LINK ");
2716 OUTS (outf
, uimm16s4 (framesize
));
2719 OUTS (outf
, "UNLINK");
2727 decode_dsp32mac_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
2730 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2731 | 1 | 1 | 0 | 0 |.M.| 0 | 0 |.mmod..........|.MM|.P.|.w1|.op1...|
2732 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1..|
2733 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2734 int op1
= ((iw0
>> (DSP32Mac_op1_bits
- 16)) & DSP32Mac_op1_mask
);
2735 int w1
= ((iw0
>> (DSP32Mac_w1_bits
- 16)) & DSP32Mac_w1_mask
);
2736 int P
= ((iw0
>> (DSP32Mac_p_bits
- 16)) & DSP32Mac_p_mask
);
2737 int MM
= ((iw0
>> (DSP32Mac_MM_bits
- 16)) & DSP32Mac_MM_mask
);
2738 int mmod
= ((iw0
>> (DSP32Mac_mmod_bits
- 16)) & DSP32Mac_mmod_mask
);
2739 int w0
= ((iw1
>> DSP32Mac_w0_bits
) & DSP32Mac_w0_mask
);
2740 int src0
= ((iw1
>> DSP32Mac_src0_bits
) & DSP32Mac_src0_mask
);
2741 int src1
= ((iw1
>> DSP32Mac_src1_bits
) & DSP32Mac_src1_mask
);
2742 int dst
= ((iw1
>> DSP32Mac_dst_bits
) & DSP32Mac_dst_mask
);
2743 int h10
= ((iw1
>> DSP32Mac_h10_bits
) & DSP32Mac_h10_mask
);
2744 int h00
= ((iw1
>> DSP32Mac_h00_bits
) & DSP32Mac_h00_mask
);
2745 int op0
= ((iw1
>> DSP32Mac_op0_bits
) & DSP32Mac_op0_mask
);
2746 int h11
= ((iw1
>> DSP32Mac_h11_bits
) & DSP32Mac_h11_mask
);
2747 int h01
= ((iw1
>> DSP32Mac_h01_bits
) & DSP32Mac_h01_mask
);
2749 if (w0
== 0 && w1
== 0 && op1
== 3 && op0
== 3)
2755 if ((w1
|| w0
) && mmod
== M_W32
)
2758 if (((1 << mmod
) & (P
? 0x31b : 0x1b5f)) == 0)
2761 if (w1
== 1 || op1
!= 3)
2764 OUTS (outf
, P
? dregs (dst
+ 1) : dregs_hi (dst
));
2767 OUTS (outf
, " = A1");
2771 OUTS (outf
, " = (");
2772 decode_macfunc (1, op1
, h01
, h11
, src0
, src1
, outf
);
2777 if (w0
== 1 || op0
!= 3)
2780 OUTS (outf
, " (M)");
2786 if (w0
== 1 || op0
!= 3)
2789 OUTS (outf
, P
? dregs (dst
) : dregs_lo (dst
));
2792 OUTS (outf
, " = A0");
2796 OUTS (outf
, " = (");
2797 decode_macfunc (0, op0
, h00
, h10
, src0
, src1
, outf
);
2803 decode_optmode (mmod
, MM
, outf
);
2809 decode_dsp32mult_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
2812 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2813 | 1 | 1 | 0 | 0 |.M.| 0 | 1 |.mmod..........|.MM|.P.|.w1|.op1...|
2814 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1..|
2815 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2816 int w1
= ((iw0
>> (DSP32Mac_w1_bits
- 16)) & DSP32Mac_w1_mask
);
2817 int P
= ((iw0
>> (DSP32Mac_p_bits
- 16)) & DSP32Mac_p_mask
);
2818 int MM
= ((iw0
>> (DSP32Mac_MM_bits
- 16)) & DSP32Mac_MM_mask
);
2819 int mmod
= ((iw0
>> (DSP32Mac_mmod_bits
- 16)) & DSP32Mac_mmod_mask
);
2820 int w0
= ((iw1
>> DSP32Mac_w0_bits
) & DSP32Mac_w0_mask
);
2821 int src0
= ((iw1
>> DSP32Mac_src0_bits
) & DSP32Mac_src0_mask
);
2822 int src1
= ((iw1
>> DSP32Mac_src1_bits
) & DSP32Mac_src1_mask
);
2823 int dst
= ((iw1
>> DSP32Mac_dst_bits
) & DSP32Mac_dst_mask
);
2824 int h10
= ((iw1
>> DSP32Mac_h10_bits
) & DSP32Mac_h10_mask
);
2825 int h00
= ((iw1
>> DSP32Mac_h00_bits
) & DSP32Mac_h00_mask
);
2826 int h11
= ((iw1
>> DSP32Mac_h11_bits
) & DSP32Mac_h11_mask
);
2827 int h01
= ((iw1
>> DSP32Mac_h01_bits
) & DSP32Mac_h01_mask
);
2829 if (w1
== 0 && w0
== 0)
2832 if (((1 << mmod
) & (P
? 0x313 : 0x1b57)) == 0)
2837 OUTS (outf
, P
? dregs (dst
| 1) : dregs_hi (dst
));
2839 decode_multfunc (h01
, h11
, src0
, src1
, outf
);
2844 OUTS (outf
, " (M)");
2852 OUTS (outf
, dregs (dst
));
2854 decode_multfunc (h00
, h10
, src0
, src1
, outf
);
2857 decode_optmode (mmod
, MM
, outf
);
2862 decode_dsp32alu_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
2865 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2866 | 1 | 1 | 0 | 0 |.M.| 1 | 0 | - | - | - |.HL|.aopcde............|
2867 |.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......|
2868 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
2869 int s
= ((iw1
>> DSP32Alu_s_bits
) & DSP32Alu_s_mask
);
2870 int x
= ((iw1
>> DSP32Alu_x_bits
) & DSP32Alu_x_mask
);
2871 int aop
= ((iw1
>> DSP32Alu_aop_bits
) & DSP32Alu_aop_mask
);
2872 int src0
= ((iw1
>> DSP32Alu_src0_bits
) & DSP32Alu_src0_mask
);
2873 int src1
= ((iw1
>> DSP32Alu_src1_bits
) & DSP32Alu_src1_mask
);
2874 int dst0
= ((iw1
>> DSP32Alu_dst0_bits
) & DSP32Alu_dst0_mask
);
2875 int dst1
= ((iw1
>> DSP32Alu_dst1_bits
) & DSP32Alu_dst1_mask
);
2876 int HL
= ((iw0
>> (DSP32Alu_HL_bits
- 16)) & DSP32Alu_HL_mask
);
2877 int aopcde
= ((iw0
>> (DSP32Alu_aopcde_bits
- 16)) & DSP32Alu_aopcde_mask
);
2879 if (aop
== 0 && aopcde
== 9 && HL
== 0 && s
== 0)
2881 OUTS (outf
, "A0.L=");
2882 OUTS (outf
, dregs_lo (src0
));
2884 else if (aop
== 2 && aopcde
== 9 && HL
== 1 && s
== 0)
2886 OUTS (outf
, "A1.H=");
2887 OUTS (outf
, dregs_hi (src0
));
2889 else if (aop
== 2 && aopcde
== 9 && HL
== 0 && s
== 0)
2891 OUTS (outf
, "A1.L=");
2892 OUTS (outf
, dregs_lo (src0
));
2894 else if (aop
== 0 && aopcde
== 9 && HL
== 1 && s
== 0)
2896 OUTS (outf
, "A0.H=");
2897 OUTS (outf
, dregs_hi (src0
));
2899 else if (x
== 1 && HL
== 1 && aop
== 3 && aopcde
== 5)
2901 OUTS (outf
, dregs_hi (dst0
));
2903 OUTS (outf
, dregs (src0
));
2905 OUTS (outf
, dregs (src1
));
2906 OUTS (outf
, "(RND20)");
2908 else if (x
== 1 && HL
== 1 && aop
== 2 && aopcde
== 5)
2910 OUTS (outf
, dregs_hi (dst0
));
2912 OUTS (outf
, dregs (src0
));
2914 OUTS (outf
, dregs (src1
));
2915 OUTS (outf
, "(RND20)");
2917 else if (x
== 0 && HL
== 0 && aop
== 1 && aopcde
== 5)
2919 OUTS (outf
, dregs_lo (dst0
));
2921 OUTS (outf
, dregs (src0
));
2923 OUTS (outf
, dregs (src1
));
2924 OUTS (outf
, "(RND12)");
2926 else if (x
== 0 && HL
== 0 && aop
== 0 && aopcde
== 5)
2928 OUTS (outf
, dregs_lo (dst0
));
2930 OUTS (outf
, dregs (src0
));
2932 OUTS (outf
, dregs (src1
));
2933 OUTS (outf
, "(RND12)");
2935 else if (x
== 1 && HL
== 0 && aop
== 3 && aopcde
== 5)
2937 OUTS (outf
, dregs_lo (dst0
));
2939 OUTS (outf
, dregs (src0
));
2941 OUTS (outf
, dregs (src1
));
2942 OUTS (outf
, "(RND20)");
2944 else if (x
== 0 && HL
== 1 && aop
== 0 && aopcde
== 5)
2946 OUTS (outf
, dregs_hi (dst0
));
2948 OUTS (outf
, dregs (src0
));
2950 OUTS (outf
, dregs (src1
));
2951 OUTS (outf
, "(RND12)");
2953 else if (x
== 1 && HL
== 0 && aop
== 2 && aopcde
== 5)
2955 OUTS (outf
, dregs_lo (dst0
));
2957 OUTS (outf
, dregs (src0
));
2959 OUTS (outf
, dregs (src1
));
2960 OUTS (outf
, "(RND20)");
2962 else if (x
== 0 && HL
== 1 && aop
== 1 && aopcde
== 5)
2964 OUTS (outf
, dregs_hi (dst0
));
2966 OUTS (outf
, dregs (src0
));
2968 OUTS (outf
, dregs (src1
));
2969 OUTS (outf
, "(RND12)");
2971 else if (HL
== 1 && aop
== 0 && aopcde
== 2)
2973 OUTS (outf
, dregs_hi (dst0
));
2975 OUTS (outf
, dregs_lo (src0
));
2977 OUTS (outf
, dregs_lo (src1
));
2981 else if (HL
== 1 && aop
== 1 && aopcde
== 2)
2983 OUTS (outf
, dregs_hi (dst0
));
2985 OUTS (outf
, dregs_lo (src0
));
2987 OUTS (outf
, dregs_hi (src1
));
2991 else if (HL
== 1 && aop
== 2 && aopcde
== 2)
2993 OUTS (outf
, dregs_hi (dst0
));
2995 OUTS (outf
, dregs_hi (src0
));
2997 OUTS (outf
, dregs_lo (src1
));
3001 else if (HL
== 1 && aop
== 3 && aopcde
== 2)
3003 OUTS (outf
, dregs_hi (dst0
));
3005 OUTS (outf
, dregs_hi (src0
));
3007 OUTS (outf
, dregs_hi (src1
));
3011 else if (HL
== 0 && aop
== 0 && aopcde
== 3)
3013 OUTS (outf
, dregs_lo (dst0
));
3015 OUTS (outf
, dregs_lo (src0
));
3017 OUTS (outf
, dregs_lo (src1
));
3021 else if (HL
== 0 && aop
== 1 && aopcde
== 3)
3023 OUTS (outf
, dregs_lo (dst0
));
3025 OUTS (outf
, dregs_lo (src0
));
3027 OUTS (outf
, dregs_hi (src1
));
3031 else if (HL
== 0 && aop
== 3 && aopcde
== 2)
3033 OUTS (outf
, dregs_lo (dst0
));
3035 OUTS (outf
, dregs_hi (src0
));
3037 OUTS (outf
, dregs_hi (src1
));
3041 else if (HL
== 1 && aop
== 0 && aopcde
== 3)
3043 OUTS (outf
, dregs_hi (dst0
));
3045 OUTS (outf
, dregs_lo (src0
));
3047 OUTS (outf
, dregs_lo (src1
));
3051 else if (HL
== 1 && aop
== 1 && aopcde
== 3)
3053 OUTS (outf
, dregs_hi (dst0
));
3055 OUTS (outf
, dregs_lo (src0
));
3057 OUTS (outf
, dregs_hi (src1
));
3061 else if (HL
== 1 && aop
== 2 && aopcde
== 3)
3063 OUTS (outf
, dregs_hi (dst0
));
3065 OUTS (outf
, dregs_hi (src0
));
3067 OUTS (outf
, dregs_lo (src1
));
3071 else if (HL
== 1 && aop
== 3 && aopcde
== 3)
3073 OUTS (outf
, dregs_hi (dst0
));
3075 OUTS (outf
, dregs_hi (src0
));
3077 OUTS (outf
, dregs_hi (src1
));
3081 else if (HL
== 0 && aop
== 2 && aopcde
== 2)
3083 OUTS (outf
, dregs_lo (dst0
));
3085 OUTS (outf
, dregs_hi (src0
));
3087 OUTS (outf
, dregs_lo (src1
));
3091 else if (HL
== 0 && aop
== 1 && aopcde
== 2)
3093 OUTS (outf
, dregs_lo (dst0
));
3095 OUTS (outf
, dregs_lo (src0
));
3097 OUTS (outf
, dregs_hi (src1
));
3101 else if (HL
== 0 && aop
== 2 && aopcde
== 3)
3103 OUTS (outf
, dregs_lo (dst0
));
3105 OUTS (outf
, dregs_hi (src0
));
3107 OUTS (outf
, dregs_lo (src1
));
3111 else if (HL
== 0 && aop
== 3 && aopcde
== 3)
3113 OUTS (outf
, dregs_lo (dst0
));
3115 OUTS (outf
, dregs_hi (src0
));
3117 OUTS (outf
, dregs_hi (src1
));
3121 else if (HL
== 0 && aop
== 0 && aopcde
== 2)
3123 OUTS (outf
, dregs_lo (dst0
));
3125 OUTS (outf
, dregs_lo (src0
));
3127 OUTS (outf
, dregs_lo (src1
));
3131 else if (aop
== 0 && aopcde
== 9 && s
== 1)
3134 OUTS (outf
, dregs (src0
));
3136 else if (aop
== 3 && aopcde
== 11 && s
== 0)
3137 OUTS (outf
, "A0-=A1");
3139 else if (aop
== 3 && aopcde
== 11 && s
== 1)
3140 OUTS (outf
, "A0-=A1(W32)");
3142 else if (aop
== 3 && aopcde
== 22 && HL
== 1)
3144 OUTS (outf
, dregs (dst0
));
3145 OUTS (outf
, "=BYTEOP2M(");
3146 OUTS (outf
, dregs (src0
+ 1));
3148 OUTS (outf
, imm5 (src0
));
3150 OUTS (outf
, dregs (src1
+ 1));
3152 OUTS (outf
, imm5 (src1
));
3153 OUTS (outf
, ")(TH");
3155 OUTS (outf
, ", R)");
3159 else if (aop
== 3 && aopcde
== 22 && HL
== 0)
3161 OUTS (outf
, dregs (dst0
));
3162 OUTS (outf
, "=BYTEOP2M(");
3163 OUTS (outf
, dregs (src0
+ 1));
3165 OUTS (outf
, imm5 (src0
));
3167 OUTS (outf
, dregs (src1
+ 1));
3169 OUTS (outf
, imm5 (src1
));
3170 OUTS (outf
, ")(TL");
3172 OUTS (outf
, ", R)");
3176 else if (aop
== 2 && aopcde
== 22 && HL
== 1)
3178 OUTS (outf
, dregs (dst0
));
3179 OUTS (outf
, "=BYTEOP2M(");
3180 OUTS (outf
, dregs (src0
+ 1));
3182 OUTS (outf
, imm5 (src0
));
3184 OUTS (outf
, dregs (src1
+ 1));
3186 OUTS (outf
, imm5 (src1
));
3187 OUTS (outf
, ")(RNDH");
3189 OUTS (outf
, ", R)");
3193 else if (aop
== 2 && aopcde
== 22 && HL
== 0)
3195 OUTS (outf
, dregs (dst0
));
3196 OUTS (outf
, "=BYTEOP2M(");
3197 OUTS (outf
, dregs (src0
+ 1));
3199 OUTS (outf
, imm5 (src0
));
3201 OUTS (outf
, dregs (src1
+ 1));
3203 OUTS (outf
, imm5 (src1
));
3204 OUTS (outf
, ")(RNDL");
3206 OUTS (outf
, ", R)");
3210 else if (aop
== 1 && aopcde
== 22 && HL
== 1)
3212 OUTS (outf
, dregs (dst0
));
3213 OUTS (outf
, "=BYTEOP2P(");
3214 OUTS (outf
, dregs (src0
+ 1));
3216 OUTS (outf
, imm5 (src0
));
3218 OUTS (outf
, dregs (src1
+ 1));
3220 OUTS (outf
, imm5 (src1
));
3221 OUTS (outf
, ")(TH");
3223 OUTS (outf
, ", R)");
3227 else if (aop
== 1 && aopcde
== 22 && HL
== 0)
3229 OUTS (outf
, dregs (dst0
));
3230 OUTS (outf
, "=BYTEOP2P(");
3231 OUTS (outf
, dregs (src0
+ 1));
3233 OUTS (outf
, imm5 (src0
));
3235 OUTS (outf
, dregs (src1
+ 1));
3237 OUTS (outf
, imm5 (src1
));
3238 OUTS (outf
, ")(TL");
3240 OUTS (outf
, ", R)");
3244 else if (aop
== 0 && aopcde
== 22 && HL
== 1)
3246 OUTS (outf
, dregs (dst0
));
3247 OUTS (outf
, "=BYTEOP2P(");
3248 OUTS (outf
, dregs (src0
+ 1));
3250 OUTS (outf
, imm5 (src0
));
3252 OUTS (outf
, dregs (src1
+ 1));
3254 OUTS (outf
, imm5 (src1
));
3255 OUTS (outf
, ")(RNDH");
3257 OUTS (outf
, ", R)");
3261 else if (aop
== 0 && aopcde
== 22 && HL
== 0)
3263 OUTS (outf
, dregs (dst0
));
3264 OUTS (outf
, "=BYTEOP2P(");
3265 OUTS (outf
, dregs (src0
+ 1));
3267 OUTS (outf
, imm5 (src0
));
3269 OUTS (outf
, dregs (src1
+ 1));
3271 OUTS (outf
, imm5 (src1
));
3272 OUTS (outf
, ")(RNDL");
3274 OUTS (outf
, ", R)");
3278 else if (aop
== 0 && s
== 0 && aopcde
== 8)
3279 OUTS (outf
, "A0=0");
3281 else if (aop
== 0 && s
== 1 && aopcde
== 8)
3282 OUTS (outf
, "A0=A0(S)");
3284 else if (aop
== 1 && s
== 0 && aopcde
== 8)
3285 OUTS (outf
, "A1=0");
3287 else if (aop
== 1 && s
== 1 && aopcde
== 8)
3288 OUTS (outf
, "A1=A1(S)");
3290 else if (aop
== 2 && s
== 0 && aopcde
== 8)
3291 OUTS (outf
, "A1=A0=0");
3293 else if (aop
== 2 && s
== 1 && aopcde
== 8)
3294 OUTS (outf
, "A1=A1(S),A0=A0(S)");
3296 else if (aop
== 3 && s
== 0 && aopcde
== 8)
3297 OUTS (outf
, "A0=A1");
3299 else if (aop
== 3 && s
== 1 && aopcde
== 8)
3300 OUTS (outf
, "A1=A0");
3302 else if (aop
== 1 && aopcde
== 9 && s
== 0)
3304 OUTS (outf
, "A0.x=");
3305 OUTS (outf
, dregs_lo (src0
));
3307 else if (aop
== 1 && HL
== 0 && aopcde
== 11)
3309 OUTS (outf
, dregs_lo (dst0
));
3310 OUTS (outf
, "=(A0+=A1)");
3312 else if (aop
== 3 && HL
== 0 && aopcde
== 16)
3313 OUTS (outf
, "A1= ABS A0,A0= ABS A0");
3315 else if (aop
== 0 && aopcde
== 23 && HL
== 1)
3317 OUTS (outf
, dregs (dst0
));
3318 OUTS (outf
, "=BYTEOP3P(");
3319 OUTS (outf
, dregs (src0
+ 1));
3321 OUTS (outf
, imm5 (src0
));
3323 OUTS (outf
, dregs (src1
+ 1));
3325 OUTS (outf
, imm5 (src1
));
3326 OUTS (outf
, ")(HI");
3328 OUTS (outf
, ", R)");
3332 else if (aop
== 3 && aopcde
== 9 && s
== 0)
3334 OUTS (outf
, "A1.x=");
3335 OUTS (outf
, dregs_lo (src0
));
3337 else if (aop
== 1 && HL
== 1 && aopcde
== 16)
3338 OUTS (outf
, "A1= ABS A1");
3340 else if (aop
== 0 && HL
== 1 && aopcde
== 16)
3341 OUTS (outf
, "A1= ABS A0");
3343 else if (aop
== 2 && aopcde
== 9 && s
== 1)
3346 OUTS (outf
, dregs (src0
));
3348 else if (HL
== 0 && aop
== 3 && aopcde
== 12)
3350 OUTS (outf
, dregs_lo (dst0
));
3352 OUTS (outf
, dregs (src0
));
3353 OUTS (outf
, "(RND)");
3355 else if (aop
== 1 && HL
== 0 && aopcde
== 16)
3356 OUTS (outf
, "A0= ABS A1");
3358 else if (aop
== 0 && HL
== 0 && aopcde
== 16)
3359 OUTS (outf
, "A0= ABS A0");
3361 else if (aop
== 3 && HL
== 0 && aopcde
== 15)
3363 OUTS (outf
, dregs (dst0
));
3365 OUTS (outf
, dregs (src0
));
3368 else if (aop
== 3 && s
== 1 && HL
== 0 && aopcde
== 7)
3370 OUTS (outf
, dregs (dst0
));
3372 OUTS (outf
, dregs (src0
));
3375 else if (aop
== 3 && s
== 0 && HL
== 0 && aopcde
== 7)
3377 OUTS (outf
, dregs (dst0
));
3379 OUTS (outf
, dregs (src0
));
3380 OUTS (outf
, "(NS)");
3382 else if (aop
== 1 && HL
== 1 && aopcde
== 11)
3384 OUTS (outf
, dregs_hi (dst0
));
3385 OUTS (outf
, "=(A0+=A1)");
3387 else if (aop
== 2 && aopcde
== 11 && s
== 0)
3388 OUTS (outf
, "A0+=A1");
3390 else if (aop
== 2 && aopcde
== 11 && s
== 1)
3391 OUTS (outf
, "A0+=A1(W32)");
3393 else if (aop
== 3 && HL
== 0 && aopcde
== 14)
3394 OUTS (outf
, "A1=-A1,A0=-A0");
3396 else if (HL
== 1 && aop
== 3 && aopcde
== 12)
3398 OUTS (outf
, dregs_hi (dst0
));
3400 OUTS (outf
, dregs (src0
));
3401 OUTS (outf
, "(RND)");
3403 else if (aop
== 0 && aopcde
== 23 && HL
== 0)
3405 OUTS (outf
, dregs (dst0
));
3406 OUTS (outf
, "=BYTEOP3P(");
3407 OUTS (outf
, dregs (src0
+ 1));
3409 OUTS (outf
, imm5 (src0
));
3411 OUTS (outf
, dregs (src1
+ 1));
3413 OUTS (outf
, imm5 (src1
));
3414 OUTS (outf
, ")(LO");
3416 OUTS (outf
, ", R)");
3420 else if (aop
== 0 && HL
== 0 && aopcde
== 14)
3421 OUTS (outf
, "A0=-A0");
3423 else if (aop
== 1 && HL
== 0 && aopcde
== 14)
3424 OUTS (outf
, "A0=-A1");
3426 else if (aop
== 0 && HL
== 1 && aopcde
== 14)
3427 OUTS (outf
, "A1=-A0");
3429 else if (aop
== 1 && HL
== 1 && aopcde
== 14)
3430 OUTS (outf
, "A1=-A1");
3432 else if (aop
== 0 && aopcde
== 12)
3434 OUTS (outf
, dregs_hi (dst0
));
3436 OUTS (outf
, dregs_lo (dst0
));
3437 OUTS (outf
, "=SIGN(");
3438 OUTS (outf
, dregs_hi (src0
));
3440 OUTS (outf
, dregs_hi (src1
));
3441 OUTS (outf
, "+SIGN(");
3442 OUTS (outf
, dregs_lo (src0
));
3444 OUTS (outf
, dregs_lo (src1
));
3447 else if (aop
== 2 && aopcde
== 0)
3449 OUTS (outf
, dregs (dst0
));
3451 OUTS (outf
, dregs (src0
));
3453 OUTS (outf
, dregs (src1
));
3457 else if (aop
== 1 && aopcde
== 12)
3459 OUTS (outf
, dregs (dst1
));
3460 OUTS (outf
, "=A1.L+A1.H,");
3461 OUTS (outf
, dregs (dst0
));
3462 OUTS (outf
, "=A0.L+A0.H");
3464 else if (aop
== 2 && aopcde
== 4)
3466 OUTS (outf
, dregs (dst1
));
3468 OUTS (outf
, dregs (src0
));
3470 OUTS (outf
, dregs (src1
));
3472 OUTS (outf
, dregs (dst0
));
3474 OUTS (outf
, dregs (src0
));
3476 OUTS (outf
, dregs (src1
));
3480 else if (HL
== 0 && aopcde
== 1)
3482 OUTS (outf
, dregs (dst1
));
3484 OUTS (outf
, dregs (src0
));
3486 OUTS (outf
, dregs (src1
));
3488 OUTS (outf
, dregs (dst0
));
3490 OUTS (outf
, dregs (src0
));
3492 OUTS (outf
, dregs (src1
));
3493 amod0amod2 (s
, x
, aop
, outf
);
3495 else if (aop
== 0 && aopcde
== 11)
3497 OUTS (outf
, dregs (dst0
));
3498 OUTS (outf
, "=(A0+=A1)");
3500 else if (aop
== 0 && aopcde
== 10)
3502 OUTS (outf
, dregs_lo (dst0
));
3503 OUTS (outf
, "=A0.x");
3505 else if (aop
== 1 && aopcde
== 10)
3507 OUTS (outf
, dregs_lo (dst0
));
3508 OUTS (outf
, "=A1.x");
3510 else if (aop
== 1 && aopcde
== 0)
3512 OUTS (outf
, dregs (dst0
));
3514 OUTS (outf
, dregs (src0
));
3516 OUTS (outf
, dregs (src1
));
3520 else if (aop
== 3 && aopcde
== 0)
3522 OUTS (outf
, dregs (dst0
));
3524 OUTS (outf
, dregs (src0
));
3526 OUTS (outf
, dregs (src1
));
3530 else if (aop
== 1 && aopcde
== 4)
3532 OUTS (outf
, dregs (dst0
));
3534 OUTS (outf
, dregs (src0
));
3536 OUTS (outf
, dregs (src1
));
3540 else if (aop
== 0 && aopcde
== 17)
3542 OUTS (outf
, dregs (dst1
));
3543 OUTS (outf
, "=A1+A0,");
3544 OUTS (outf
, dregs (dst0
));
3545 OUTS (outf
, "=A1-A0 ");
3548 else if (aop
== 1 && aopcde
== 17)
3550 OUTS (outf
, dregs (dst1
));
3551 OUTS (outf
, "=A0+A1,");
3552 OUTS (outf
, dregs (dst0
));
3553 OUTS (outf
, "=A0-A1 ");
3556 else if (aop
== 0 && aopcde
== 18)
3558 OUTS (outf
, "SAA(");
3559 OUTS (outf
, dregs (src0
+ 1));
3561 OUTS (outf
, imm5 (src0
));
3563 OUTS (outf
, dregs (src1
+ 1));
3565 OUTS (outf
, imm5 (src1
));
3569 else if (aop
== 3 && aopcde
== 18)
3570 OUTS (outf
, "DISALGNEXCPT");
3572 else if (aop
== 0 && aopcde
== 20)
3574 OUTS (outf
, dregs (dst0
));
3575 OUTS (outf
, "=BYTEOP1P(");
3576 OUTS (outf
, dregs (src0
+ 1));
3578 OUTS (outf
, imm5 (src0
));
3580 OUTS (outf
, dregs (src1
+ 1));
3582 OUTS (outf
, imm5 (src1
));
3586 else if (aop
== 1 && aopcde
== 20)
3588 OUTS (outf
, dregs (dst0
));
3589 OUTS (outf
, "=BYTEOP1P(");
3590 OUTS (outf
, dregs (src0
+ 1));
3592 OUTS (outf
, imm5 (src0
));
3594 OUTS (outf
, dregs (src1
+ 1));
3596 OUTS (outf
, imm5 (src1
));
3599 OUTS (outf
, ", R)");
3603 else if (aop
== 0 && aopcde
== 21)
3606 OUTS (outf
, dregs (dst1
));
3608 OUTS (outf
, dregs (dst0
));
3609 OUTS (outf
, ")=BYTEOP16P(");
3610 OUTS (outf
, dregs (src0
+ 1));
3612 OUTS (outf
, imm5 (src0
));
3614 OUTS (outf
, dregs (src1
+ 1));
3616 OUTS (outf
, imm5 (src1
));
3620 else if (aop
== 1 && aopcde
== 21)
3623 OUTS (outf
, dregs (dst1
));
3625 OUTS (outf
, dregs (dst0
));
3626 OUTS (outf
, ")=BYTEOP16M(");
3627 OUTS (outf
, dregs (src0
+ 1));
3629 OUTS (outf
, imm5 (src0
));
3631 OUTS (outf
, dregs (src1
+ 1));
3633 OUTS (outf
, imm5 (src1
));
3637 else if (aop
== 2 && aopcde
== 7)
3639 OUTS (outf
, dregs (dst0
));
3640 OUTS (outf
, "= ABS ");
3641 OUTS (outf
, dregs (src0
));
3643 else if (aop
== 1 && aopcde
== 7)
3645 OUTS (outf
, dregs (dst0
));
3646 OUTS (outf
, "=MIN(");
3647 OUTS (outf
, dregs (src0
));
3649 OUTS (outf
, dregs (src1
));
3652 else if (aop
== 0 && aopcde
== 7)
3654 OUTS (outf
, dregs (dst0
));
3655 OUTS (outf
, "=MAX(");
3656 OUTS (outf
, dregs (src0
));
3658 OUTS (outf
, dregs (src1
));
3661 else if (aop
== 2 && aopcde
== 6)
3663 OUTS (outf
, dregs (dst0
));
3664 OUTS (outf
, "= ABS ");
3665 OUTS (outf
, dregs (src0
));
3668 else if (aop
== 1 && aopcde
== 6)
3670 OUTS (outf
, dregs (dst0
));
3671 OUTS (outf
, "=MIN(");
3672 OUTS (outf
, dregs (src0
));
3674 OUTS (outf
, dregs (src1
));
3675 OUTS (outf
, ")(V)");
3677 else if (aop
== 0 && aopcde
== 6)
3679 OUTS (outf
, dregs (dst0
));
3680 OUTS (outf
, "=MAX(");
3681 OUTS (outf
, dregs (src0
));
3683 OUTS (outf
, dregs (src1
));
3684 OUTS (outf
, ")(V)");
3686 else if (HL
== 1 && aopcde
== 1)
3688 OUTS (outf
, dregs (dst1
));
3690 OUTS (outf
, dregs (src0
));
3692 OUTS (outf
, dregs (src1
));
3694 OUTS (outf
, dregs (dst0
));
3696 OUTS (outf
, dregs (src0
));
3698 OUTS (outf
, dregs (src1
));
3699 amod0amod2 (s
, x
, aop
, outf
);
3701 else if (aop
== 0 && aopcde
== 4)
3703 OUTS (outf
, dregs (dst0
));
3705 OUTS (outf
, dregs (src0
));
3707 OUTS (outf
, dregs (src1
));
3711 else if (aop
== 0 && aopcde
== 0)
3713 OUTS (outf
, dregs (dst0
));
3715 OUTS (outf
, dregs (src0
));
3717 OUTS (outf
, dregs (src1
));
3721 else if (aop
== 0 && aopcde
== 24)
3723 OUTS (outf
, dregs (dst0
));
3724 OUTS (outf
, "=BYTEPACK(");
3725 OUTS (outf
, dregs (src0
));
3727 OUTS (outf
, dregs (src1
));
3730 else if (aop
== 1 && aopcde
== 24)
3733 OUTS (outf
, dregs (dst1
));
3735 OUTS (outf
, dregs (dst0
));
3736 OUTS (outf
, ") = BYTEUNPACK ");
3737 OUTS (outf
, dregs (src0
+ 1));
3739 OUTS (outf
, imm5 (src0
));
3743 else if (aopcde
== 13)
3746 OUTS (outf
, dregs (dst1
));
3748 OUTS (outf
, dregs (dst0
));
3749 OUTS (outf
, ") = SEARCH ");
3750 OUTS (outf
, dregs (src0
));
3752 searchmod (aop
, outf
);
3762 decode_dsp32shift_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
3765 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3766 | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 0 | - | - |.sopcde............|
3767 |.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......|
3768 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
3769 int HLs
= ((iw1
>> DSP32Shift_HLs_bits
) & DSP32Shift_HLs_mask
);
3770 int sop
= ((iw1
>> DSP32Shift_sop_bits
) & DSP32Shift_sop_mask
);
3771 int src0
= ((iw1
>> DSP32Shift_src0_bits
) & DSP32Shift_src0_mask
);
3772 int src1
= ((iw1
>> DSP32Shift_src1_bits
) & DSP32Shift_src1_mask
);
3773 int dst0
= ((iw1
>> DSP32Shift_dst0_bits
) & DSP32Shift_dst0_mask
);
3774 int sopcde
= ((iw0
>> (DSP32Shift_sopcde_bits
- 16)) & DSP32Shift_sopcde_mask
);
3775 const char *acc01
= (HLs
& 1) == 0 ? "A0" : "A1";
3777 if (HLs
== 0 && sop
== 0 && sopcde
== 0)
3779 OUTS (outf
, dregs_lo (dst0
));
3780 OUTS (outf
, "= ASHIFT ");
3781 OUTS (outf
, dregs_lo (src1
));
3782 OUTS (outf
, " BY ");
3783 OUTS (outf
, dregs_lo (src0
));
3785 else if (HLs
== 1 && sop
== 0 && sopcde
== 0)
3787 OUTS (outf
, dregs_lo (dst0
));
3788 OUTS (outf
, "= ASHIFT ");
3789 OUTS (outf
, dregs_hi (src1
));
3790 OUTS (outf
, " BY ");
3791 OUTS (outf
, dregs_lo (src0
));
3793 else if (HLs
== 2 && sop
== 0 && sopcde
== 0)
3795 OUTS (outf
, dregs_hi (dst0
));
3796 OUTS (outf
, "= ASHIFT ");
3797 OUTS (outf
, dregs_lo (src1
));
3798 OUTS (outf
, " BY ");
3799 OUTS (outf
, dregs_lo (src0
));
3801 else if (HLs
== 3 && sop
== 0 && sopcde
== 0)
3803 OUTS (outf
, dregs_hi (dst0
));
3804 OUTS (outf
, "= ASHIFT ");
3805 OUTS (outf
, dregs_hi (src1
));
3806 OUTS (outf
, " BY ");
3807 OUTS (outf
, dregs_lo (src0
));
3809 else if (HLs
== 0 && sop
== 1 && sopcde
== 0)
3811 OUTS (outf
, dregs_lo (dst0
));
3812 OUTS (outf
, "= ASHIFT ");
3813 OUTS (outf
, dregs_lo (src1
));
3814 OUTS (outf
, " BY ");
3815 OUTS (outf
, dregs_lo (src0
));
3818 else if (HLs
== 1 && sop
== 1 && sopcde
== 0)
3820 OUTS (outf
, dregs_lo (dst0
));
3821 OUTS (outf
, "= ASHIFT ");
3822 OUTS (outf
, dregs_hi (src1
));
3823 OUTS (outf
, " BY ");
3824 OUTS (outf
, dregs_lo (src0
));
3827 else if (HLs
== 2 && sop
== 1 && sopcde
== 0)
3829 OUTS (outf
, dregs_hi (dst0
));
3830 OUTS (outf
, "= ASHIFT ");
3831 OUTS (outf
, dregs_lo (src1
));
3832 OUTS (outf
, " BY ");
3833 OUTS (outf
, dregs_lo (src0
));
3836 else if (HLs
== 3 && sop
== 1 && sopcde
== 0)
3838 OUTS (outf
, dregs_hi (dst0
));
3839 OUTS (outf
, "= ASHIFT ");
3840 OUTS (outf
, dregs_hi (src1
));
3841 OUTS (outf
, " BY ");
3842 OUTS (outf
, dregs_lo (src0
));
3845 else if (sop
== 2 && sopcde
== 0)
3847 OUTS (outf
, (HLs
& 2) == 0 ? dregs_lo (dst0
) : dregs_hi (dst0
));
3848 OUTS (outf
, "= LSHIFT ");
3849 OUTS (outf
, (HLs
& 1) == 0 ? dregs_lo (src1
) : dregs_hi (src1
));
3850 OUTS (outf
, " BY ");
3851 OUTS (outf
, dregs_lo (src0
));
3853 else if (sop
== 0 && sopcde
== 3)
3856 OUTS (outf
, "= ASHIFT ");
3858 OUTS (outf
, " BY ");
3859 OUTS (outf
, dregs_lo (src0
));
3861 else if (sop
== 1 && sopcde
== 3)
3864 OUTS (outf
, "= LSHIFT ");
3866 OUTS (outf
, " BY ");
3867 OUTS (outf
, dregs_lo (src0
));
3869 else if (sop
== 2 && sopcde
== 3)
3872 OUTS (outf
, "= ROT ");
3874 OUTS (outf
, " BY ");
3875 OUTS (outf
, dregs_lo (src0
));
3877 else if (sop
== 3 && sopcde
== 3)
3879 OUTS (outf
, dregs (dst0
));
3880 OUTS (outf
, "= ROT ");
3881 OUTS (outf
, dregs (src1
));
3882 OUTS (outf
, " BY ");
3883 OUTS (outf
, dregs_lo (src0
));
3885 else if (sop
== 1 && sopcde
== 1)
3887 OUTS (outf
, dregs (dst0
));
3888 OUTS (outf
, "= ASHIFT ");
3889 OUTS (outf
, dregs (src1
));
3890 OUTS (outf
, " BY ");
3891 OUTS (outf
, dregs_lo (src0
));
3892 OUTS (outf
, "(V,S)");
3894 else if (sop
== 0 && sopcde
== 1)
3896 OUTS (outf
, dregs (dst0
));
3897 OUTS (outf
, "= ASHIFT ");
3898 OUTS (outf
, dregs (src1
));
3899 OUTS (outf
, " BY ");
3900 OUTS (outf
, dregs_lo (src0
));
3903 else if (sop
== 0 && sopcde
== 2)
3905 OUTS (outf
, dregs (dst0
));
3906 OUTS (outf
, "= ASHIFT ");
3907 OUTS (outf
, dregs (src1
));
3908 OUTS (outf
, " BY ");
3909 OUTS (outf
, dregs_lo (src0
));
3911 else if (sop
== 1 && sopcde
== 2)
3913 OUTS (outf
, dregs (dst0
));
3914 OUTS (outf
, "= ASHIFT ");
3915 OUTS (outf
, dregs (src1
));
3916 OUTS (outf
, " BY ");
3917 OUTS (outf
, dregs_lo (src0
));
3920 else if (sop
== 2 && sopcde
== 2)
3922 OUTS (outf
, dregs (dst0
));
3923 OUTS (outf
, "=SHIFT ");
3924 OUTS (outf
, dregs (src1
));
3925 OUTS (outf
, " BY ");
3926 OUTS (outf
, dregs_lo (src0
));
3928 else if (sop
== 3 && sopcde
== 2)
3930 OUTS (outf
, dregs (dst0
));
3931 OUTS (outf
, "= ROT ");
3932 OUTS (outf
, dregs (src1
));
3933 OUTS (outf
, " BY ");
3934 OUTS (outf
, dregs_lo (src0
));
3936 else if (sop
== 2 && sopcde
== 1)
3938 OUTS (outf
, dregs (dst0
));
3939 OUTS (outf
, "=SHIFT ");
3940 OUTS (outf
, dregs (src1
));
3941 OUTS (outf
, " BY ");
3942 OUTS (outf
, dregs_lo (src0
));
3945 else if (sop
== 0 && sopcde
== 4)
3947 OUTS (outf
, dregs (dst0
));
3948 OUTS (outf
, "=PACK");
3950 OUTS (outf
, dregs_lo (src1
));
3952 OUTS (outf
, dregs_lo (src0
));
3955 else if (sop
== 1 && sopcde
== 4)
3957 OUTS (outf
, dregs (dst0
));
3958 OUTS (outf
, "=PACK(");
3959 OUTS (outf
, dregs_lo (src1
));
3961 OUTS (outf
, dregs_hi (src0
));
3964 else if (sop
== 2 && sopcde
== 4)
3966 OUTS (outf
, dregs (dst0
));
3967 OUTS (outf
, "=PACK(");
3968 OUTS (outf
, dregs_hi (src1
));
3970 OUTS (outf
, dregs_lo (src0
));
3973 else if (sop
== 3 && sopcde
== 4)
3975 OUTS (outf
, dregs (dst0
));
3976 OUTS (outf
, "=PACK(");
3977 OUTS (outf
, dregs_hi (src1
));
3979 OUTS (outf
, dregs_hi (src0
));
3982 else if (sop
== 0 && sopcde
== 5)
3984 OUTS (outf
, dregs_lo (dst0
));
3985 OUTS (outf
, "=SIGNBITS ");
3986 OUTS (outf
, dregs (src1
));
3988 else if (sop
== 1 && sopcde
== 5)
3990 OUTS (outf
, dregs_lo (dst0
));
3991 OUTS (outf
, "=SIGNBITS ");
3992 OUTS (outf
, dregs_lo (src1
));
3994 else if (sop
== 2 && sopcde
== 5)
3996 OUTS (outf
, dregs_lo (dst0
));
3997 OUTS (outf
, "=SIGNBITS ");
3998 OUTS (outf
, dregs_hi (src1
));
4000 else if (sop
== 0 && sopcde
== 6)
4002 OUTS (outf
, dregs_lo (dst0
));
4003 OUTS (outf
, "=SIGNBITS A0");
4005 else if (sop
== 1 && sopcde
== 6)
4007 OUTS (outf
, dregs_lo (dst0
));
4008 OUTS (outf
, "=SIGNBITS A1");
4010 else if (sop
== 3 && sopcde
== 6)
4012 OUTS (outf
, dregs_lo (dst0
));
4013 OUTS (outf
, "=ONES ");
4014 OUTS (outf
, dregs (src1
));
4016 else if (sop
== 0 && sopcde
== 7)
4018 OUTS (outf
, dregs_lo (dst0
));
4019 OUTS (outf
, "=EXPADJ (");
4020 OUTS (outf
, dregs (src1
));
4022 OUTS (outf
, dregs_lo (src0
));
4025 else if (sop
== 1 && sopcde
== 7)
4027 OUTS (outf
, dregs_lo (dst0
));
4028 OUTS (outf
, "=EXPADJ (");
4029 OUTS (outf
, dregs (src1
));
4031 OUTS (outf
, dregs_lo (src0
));
4032 OUTS (outf
, ") (V)");
4034 else if (sop
== 2 && sopcde
== 7)
4036 OUTS (outf
, dregs_lo (dst0
));
4037 OUTS (outf
, "=EXPADJ (");
4038 OUTS (outf
, dregs_lo (src1
));
4040 OUTS (outf
, dregs_lo (src0
));
4043 else if (sop
== 3 && sopcde
== 7)
4045 OUTS (outf
, dregs_lo (dst0
));
4046 OUTS (outf
, "=EXPADJ (");
4047 OUTS (outf
, dregs_hi (src1
));
4049 OUTS (outf
, dregs_lo (src0
));
4052 else if (sop
== 0 && sopcde
== 8)
4054 OUTS (outf
, "BITMUX (");
4055 OUTS (outf
, dregs (src0
));
4057 OUTS (outf
, dregs (src1
));
4058 OUTS (outf
, ",A0 )(ASR)");
4060 else if (sop
== 1 && sopcde
== 8)
4062 OUTS (outf
, "BITMUX (");
4063 OUTS (outf
, dregs (src0
));
4065 OUTS (outf
, dregs (src1
));
4066 OUTS (outf
, ",A0 )(ASL)");
4068 else if (sop
== 0 && sopcde
== 9)
4070 OUTS (outf
, dregs_lo (dst0
));
4071 OUTS (outf
, "=VIT_MAX (");
4072 OUTS (outf
, dregs (src1
));
4073 OUTS (outf
, ") (ASL)");
4075 else if (sop
== 1 && sopcde
== 9)
4077 OUTS (outf
, dregs_lo (dst0
));
4078 OUTS (outf
, "=VIT_MAX (");
4079 OUTS (outf
, dregs (src1
));
4080 OUTS (outf
, ") (ASR)");
4082 else if (sop
== 2 && sopcde
== 9)
4084 OUTS (outf
, dregs (dst0
));
4085 OUTS (outf
, "=VIT_MAX(");
4086 OUTS (outf
, dregs (src1
));
4088 OUTS (outf
, dregs (src0
));
4089 OUTS (outf
, ")(ASL)");
4091 else if (sop
== 3 && sopcde
== 9)
4093 OUTS (outf
, dregs (dst0
));
4094 OUTS (outf
, "=VIT_MAX(");
4095 OUTS (outf
, dregs (src1
));
4097 OUTS (outf
, dregs (src0
));
4098 OUTS (outf
, ")(ASR)");
4100 else if (sop
== 0 && sopcde
== 10)
4102 OUTS (outf
, dregs (dst0
));
4103 OUTS (outf
, "=EXTRACT(");
4104 OUTS (outf
, dregs (src1
));
4106 OUTS (outf
, dregs_lo (src0
));
4107 OUTS (outf
, ") (Z)");
4109 else if (sop
== 1 && sopcde
== 10)
4111 OUTS (outf
, dregs (dst0
));
4112 OUTS (outf
, "=EXTRACT(");
4113 OUTS (outf
, dregs (src1
));
4115 OUTS (outf
, dregs_lo (src0
));
4116 OUTS (outf
, ")(X)");
4118 else if (sop
== 2 && sopcde
== 10)
4120 OUTS (outf
, dregs (dst0
));
4121 OUTS (outf
, "=DEPOSIT(");
4122 OUTS (outf
, dregs (src1
));
4124 OUTS (outf
, dregs (src0
));
4127 else if (sop
== 3 && sopcde
== 10)
4129 OUTS (outf
, dregs (dst0
));
4130 OUTS (outf
, "=DEPOSIT(");
4131 OUTS (outf
, dregs (src1
));
4133 OUTS (outf
, dregs (src0
));
4134 OUTS (outf
, ")(X)");
4136 else if (sop
== 0 && sopcde
== 11)
4138 OUTS (outf
, dregs_lo (dst0
));
4139 OUTS (outf
, "=CC=BXORSHIFT(A0,");
4140 OUTS (outf
, dregs (src0
));
4143 else if (sop
== 1 && sopcde
== 11)
4145 OUTS (outf
, dregs_lo (dst0
));
4146 OUTS (outf
, "=CC=BXOR(A0,");
4147 OUTS (outf
, dregs (src0
));
4150 else if (sop
== 0 && sopcde
== 12)
4151 OUTS (outf
, "A0=BXORSHIFT(A0,A1 ,CC)");
4153 else if (sop
== 1 && sopcde
== 12)
4155 OUTS (outf
, dregs_lo (dst0
));
4156 OUTS (outf
, "=CC=BXOR( A0,A1 ,CC )");
4158 else if (sop
== 0 && sopcde
== 13)
4160 OUTS (outf
, dregs (dst0
));
4161 OUTS (outf
, "=ALIGN8(");
4162 OUTS (outf
, dregs (src1
));
4164 OUTS (outf
, dregs (src0
));
4167 else if (sop
== 1 && sopcde
== 13)
4169 OUTS (outf
, dregs (dst0
));
4170 OUTS (outf
, "=ALIGN16(");
4171 OUTS (outf
, dregs (src1
));
4173 OUTS (outf
, dregs (src0
));
4176 else if (sop
== 2 && sopcde
== 13)
4178 OUTS (outf
, dregs (dst0
));
4179 OUTS (outf
, "=ALIGN24(");
4180 OUTS (outf
, dregs (src1
));
4182 OUTS (outf
, dregs (src0
));
4192 decode_dsp32shiftimm_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
4195 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
4196 | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 1 | - | - |.sopcde............|
4197 |.sop...|.HLs...|.dst0......|.immag.................|.src1......|
4198 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4199 int src1
= ((iw1
>> DSP32ShiftImm_src1_bits
) & DSP32ShiftImm_src1_mask
);
4200 int sop
= ((iw1
>> DSP32ShiftImm_sop_bits
) & DSP32ShiftImm_sop_mask
);
4201 int bit8
= ((iw1
>> 8) & 0x1);
4202 int immag
= ((iw1
>> DSP32ShiftImm_immag_bits
) & DSP32ShiftImm_immag_mask
);
4203 int newimmag
= (-(iw1
>> DSP32ShiftImm_immag_bits
) & DSP32ShiftImm_immag_mask
);
4204 int dst0
= ((iw1
>> DSP32ShiftImm_dst0_bits
) & DSP32ShiftImm_dst0_mask
);
4205 int sopcde
= ((iw0
>> (DSP32ShiftImm_sopcde_bits
- 16)) & DSP32ShiftImm_sopcde_mask
);
4206 int HLs
= ((iw1
>> DSP32ShiftImm_HLs_bits
) & DSP32ShiftImm_HLs_mask
);
4209 if (sop
== 0 && sopcde
== 0)
4211 OUTS (outf
, (HLs
& 2) ? dregs_hi (dst0
) : dregs_lo (dst0
));
4213 OUTS (outf
, (HLs
& 1) ? dregs_hi (src1
) : dregs_lo (src1
));
4214 OUTS (outf
, " >>> ");
4215 OUTS (outf
, uimm4 (newimmag
));
4217 else if (sop
== 1 && sopcde
== 0 && bit8
== 0)
4219 OUTS (outf
, (HLs
& 2) ? dregs_hi (dst0
) : dregs_lo (dst0
));
4221 OUTS (outf
, (HLs
& 1) ? dregs_hi (src1
) : dregs_lo (src1
));
4222 OUTS (outf
, " << ");
4223 OUTS (outf
, uimm4 (immag
));
4224 OUTS (outf
, " (S)");
4226 else if (sop
== 1 && sopcde
== 0 && bit8
== 1)
4228 OUTS (outf
, (HLs
& 2) ? dregs_hi (dst0
) : dregs_lo (dst0
));
4230 OUTS (outf
, (HLs
& 1) ? dregs_hi (src1
) : dregs_lo (src1
));
4231 OUTS (outf
, " >>> ");
4232 OUTS (outf
, uimm4 (newimmag
));
4233 OUTS (outf
, " (S)");
4235 else if (sop
== 2 && sopcde
== 0 && bit8
== 0)
4237 OUTS (outf
, (HLs
& 2) ? dregs_hi (dst0
) : dregs_lo (dst0
));
4239 OUTS (outf
, (HLs
& 1) ? dregs_hi (src1
) : dregs_lo (src1
));
4240 OUTS (outf
, " << ");
4241 OUTS (outf
, uimm4 (immag
));
4243 else if (sop
== 2 && sopcde
== 0 && bit8
== 1)
4245 OUTS (outf
, (HLs
& 2) ? dregs_hi (dst0
) : dregs_lo (dst0
));
4247 OUTS (outf
, (HLs
& 1) ? dregs_hi (src1
) : dregs_lo (src1
));
4248 OUTS (outf
, " >> ");
4249 OUTS (outf
, uimm4 (newimmag
));
4251 else if (sop
== 2 && sopcde
== 3 && HLs
== 1)
4253 OUTS (outf
, "A1= ROT A1 BY ");
4254 OUTS (outf
, imm6 (immag
));
4256 else if (sop
== 0 && sopcde
== 3 && HLs
== 0 && bit8
== 0)
4258 OUTS (outf
, "A0=A0<<");
4259 OUTS (outf
, uimm5 (immag
));
4261 else if (sop
== 0 && sopcde
== 3 && HLs
== 0 && bit8
== 1)
4263 OUTS (outf
, "A0=A0>>>");
4264 OUTS (outf
, uimm5 (newimmag
));
4266 else if (sop
== 0 && sopcde
== 3 && HLs
== 1 && bit8
== 0)
4268 OUTS (outf
, "A1=A1<<");
4269 OUTS (outf
, uimm5 (immag
));
4271 else if (sop
== 0 && sopcde
== 3 && HLs
== 1 && bit8
== 1)
4273 OUTS (outf
, "A1=A1>>>");
4274 OUTS (outf
, uimm5 (newimmag
));
4276 else if (sop
== 1 && sopcde
== 3 && HLs
== 0)
4278 OUTS (outf
, "A0=A0>>");
4279 OUTS (outf
, uimm5 (newimmag
));
4281 else if (sop
== 1 && sopcde
== 3 && HLs
== 1)
4283 OUTS (outf
, "A1=A1>>");
4284 OUTS (outf
, uimm5 (newimmag
));
4286 else if (sop
== 2 && sopcde
== 3 && HLs
== 0)
4288 OUTS (outf
, "A0= ROT A0 BY ");
4289 OUTS (outf
, imm6 (immag
));
4291 else if (sop
== 1 && sopcde
== 1 && bit8
== 0)
4293 OUTS (outf
, dregs (dst0
));
4295 OUTS (outf
, dregs (src1
));
4297 OUTS (outf
, uimm5 (immag
));
4298 OUTS (outf
, " (V, S)");
4300 else if (sop
== 1 && sopcde
== 1 && bit8
== 1)
4302 OUTS (outf
, dregs (dst0
));
4304 OUTS (outf
, dregs (src1
));
4306 OUTS (outf
, imm5 (-immag
));
4307 OUTS (outf
, " (V)");
4309 else if (sop
== 2 && sopcde
== 1 && bit8
== 1)
4311 OUTS (outf
, dregs (dst0
));
4313 OUTS (outf
, dregs (src1
));
4314 OUTS (outf
, " >> ");
4315 OUTS (outf
, uimm5 (newimmag
));
4316 OUTS (outf
, " (V)");
4318 else if (sop
== 2 && sopcde
== 1 && bit8
== 0)
4320 OUTS (outf
, dregs (dst0
));
4322 OUTS (outf
, dregs (src1
));
4324 OUTS (outf
, imm5 (immag
));
4325 OUTS (outf
, " (V)");
4327 else if (sop
== 0 && sopcde
== 1)
4329 OUTS (outf
, dregs (dst0
));
4331 OUTS (outf
, dregs (src1
));
4333 OUTS (outf
, uimm5 (newimmag
));
4334 OUTS (outf
, " (V)");
4336 else if (sop
== 1 && sopcde
== 2)
4338 OUTS (outf
, dregs (dst0
));
4340 OUTS (outf
, dregs (src1
));
4342 OUTS (outf
, uimm5 (immag
));
4345 else if (sop
== 2 && sopcde
== 2 && bit8
== 1)
4347 OUTS (outf
, dregs (dst0
));
4349 OUTS (outf
, dregs (src1
));
4351 OUTS (outf
, uimm5 (newimmag
));
4353 else if (sop
== 2 && sopcde
== 2 && bit8
== 0)
4355 OUTS (outf
, dregs (dst0
));
4357 OUTS (outf
, dregs (src1
));
4359 OUTS (outf
, uimm5 (immag
));
4361 else if (sop
== 3 && sopcde
== 2)
4363 OUTS (outf
, dregs (dst0
));
4364 OUTS (outf
, "= ROT ");
4365 OUTS (outf
, dregs (src1
));
4366 OUTS (outf
, " BY ");
4367 OUTS (outf
, imm6 (immag
));
4369 else if (sop
== 0 && sopcde
== 2)
4371 OUTS (outf
, dregs (dst0
));
4373 OUTS (outf
, dregs (src1
));
4375 OUTS (outf
, uimm5 (newimmag
));
4384 decode_pseudoDEBUG_0 (TIword iw0
, disassemble_info
*outf
)
4387 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
4388 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |.fn....|.grp.......|.reg.......|
4389 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4390 int fn
= ((iw0
>> PseudoDbg_fn_bits
) & PseudoDbg_fn_mask
);
4391 int grp
= ((iw0
>> PseudoDbg_grp_bits
) & PseudoDbg_grp_mask
);
4392 int reg
= ((iw0
>> PseudoDbg_reg_bits
) & PseudoDbg_reg_mask
);
4394 if (reg
== 0 && fn
== 3)
4395 OUTS (outf
, "DBG A0");
4397 else if (reg
== 1 && fn
== 3)
4398 OUTS (outf
, "DBG A1");
4400 else if (reg
== 3 && fn
== 3)
4401 OUTS (outf
, "ABORT");
4403 else if (reg
== 4 && fn
== 3)
4406 else if (reg
== 5 && fn
== 3)
4407 OUTS (outf
, "DBGHALT");
4409 else if (reg
== 6 && fn
== 3)
4411 OUTS (outf
, "DBGCMPLX(");
4412 OUTS (outf
, dregs (grp
));
4415 else if (reg
== 7 && fn
== 3)
4418 else if (grp
== 0 && fn
== 2)
4420 OUTS (outf
, "OUTC");
4421 OUTS (outf
, dregs (reg
));
4426 OUTS (outf
, allregs (reg
, grp
));
4430 OUTS (outf
, "PRNT");
4431 OUTS (outf
, allregs (reg
, grp
));
4440 decode_pseudodbg_assert_0 (TIword iw0
, TIword iw1
, disassemble_info
*outf
)
4443 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
4444 | 1 | 1 | 1 | 1 | 0 | - | - | - | - | - |.dbgop.....|.regtest...|
4445 |.expected......................................................|
4446 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */
4447 int expected
= ((iw1
>> PseudoDbg_Assert_expected_bits
) & PseudoDbg_Assert_expected_mask
);
4448 int dbgop
= ((iw0
>> (PseudoDbg_Assert_dbgop_bits
- 16)) & PseudoDbg_Assert_dbgop_mask
);
4449 int regtest
= ((iw0
>> (PseudoDbg_Assert_regtest_bits
- 16)) & PseudoDbg_Assert_regtest_mask
);
4453 OUTS (outf
, "DBGA(");
4454 OUTS (outf
, dregs_lo (regtest
));
4456 OUTS (outf
, uimm16 (expected
));
4459 else if (dbgop
== 1)
4461 OUTS (outf
, "DBGA(");
4462 OUTS (outf
, dregs_hi (regtest
));
4464 OUTS (outf
, uimm16 (expected
));
4467 else if (dbgop
== 2)
4469 OUTS (outf
, "DBGAL(");
4470 OUTS (outf
, dregs (regtest
));
4472 OUTS (outf
, uimm16 (expected
));
4475 else if (dbgop
== 3)
4477 OUTS (outf
, "DBGAH(");
4478 OUTS (outf
, dregs (regtest
));
4480 OUTS (outf
, uimm16 (expected
));
4489 _print_insn_bfin (bfd_vma pc
, disassemble_info
*outf
)
4497 status
= (*outf
->read_memory_func
) (pc
& ~0x1, buf
, 2, outf
);
4498 status
= (*outf
->read_memory_func
) ((pc
+ 2) & ~0x1, buf
+ 2, 2, outf
);
4500 iw0
= bfd_getl16 (buf
);
4501 iw1
= bfd_getl16 (buf
+ 2);
4503 if ((iw0
& 0xf7ff) == 0xc003 && iw1
== 0x1800)
4505 OUTS (outf
, "mnop");
4508 else if ((iw0
& 0xff00) == 0x0000)
4509 rv
= decode_ProgCtrl_0 (iw0
, outf
);
4510 else if ((iw0
& 0xffc0) == 0x0240)
4511 rv
= decode_CaCTRL_0 (iw0
, outf
);
4512 else if ((iw0
& 0xff80) == 0x0100)
4513 rv
= decode_PushPopReg_0 (iw0
, outf
);
4514 else if ((iw0
& 0xfe00) == 0x0400)
4515 rv
= decode_PushPopMultiple_0 (iw0
, outf
);
4516 else if ((iw0
& 0xfe00) == 0x0600)
4517 rv
= decode_ccMV_0 (iw0
, outf
);
4518 else if ((iw0
& 0xf800) == 0x0800)
4519 rv
= decode_CCflag_0 (iw0
, outf
);
4520 else if ((iw0
& 0xffe0) == 0x0200)
4521 rv
= decode_CC2dreg_0 (iw0
, outf
);
4522 else if ((iw0
& 0xff00) == 0x0300)
4523 rv
= decode_CC2stat_0 (iw0
, outf
);
4524 else if ((iw0
& 0xf000) == 0x1000)
4525 rv
= decode_BRCC_0 (iw0
, pc
, outf
);
4526 else if ((iw0
& 0xf000) == 0x2000)
4527 rv
= decode_UJUMP_0 (iw0
, pc
, outf
);
4528 else if ((iw0
& 0xf000) == 0x3000)
4529 rv
= decode_REGMV_0 (iw0
, outf
);
4530 else if ((iw0
& 0xfc00) == 0x4000)
4531 rv
= decode_ALU2op_0 (iw0
, outf
);
4532 else if ((iw0
& 0xfe00) == 0x4400)
4533 rv
= decode_PTR2op_0 (iw0
, outf
);
4534 else if ((iw0
& 0xf800) == 0x4800)
4535 rv
= decode_LOGI2op_0 (iw0
, outf
);
4536 else if ((iw0
& 0xf000) == 0x5000)
4537 rv
= decode_COMP3op_0 (iw0
, outf
);
4538 else if ((iw0
& 0xf800) == 0x6000)
4539 rv
= decode_COMPI2opD_0 (iw0
, outf
);
4540 else if ((iw0
& 0xf800) == 0x6800)
4541 rv
= decode_COMPI2opP_0 (iw0
, outf
);
4542 else if ((iw0
& 0xf000) == 0x8000)
4543 rv
= decode_LDSTpmod_0 (iw0
, outf
);
4544 else if ((iw0
& 0xff60) == 0x9e60)
4545 rv
= decode_dagMODim_0 (iw0
, outf
);
4546 else if ((iw0
& 0xfff0) == 0x9f60)
4547 rv
= decode_dagMODik_0 (iw0
, outf
);
4548 else if ((iw0
& 0xfc00) == 0x9c00)
4549 rv
= decode_dspLDST_0 (iw0
, outf
);
4550 else if ((iw0
& 0xf000) == 0x9000)
4551 rv
= decode_LDST_0 (iw0
, outf
);
4552 else if ((iw0
& 0xfc00) == 0xb800)
4553 rv
= decode_LDSTiiFP_0 (iw0
, outf
);
4554 else if ((iw0
& 0xe000) == 0xA000)
4555 rv
= decode_LDSTii_0 (iw0
, outf
);
4556 else if ((iw0
& 0xff80) == 0xe080 && (iw1
& 0x0C00) == 0x0000)
4557 rv
= decode_LoopSetup_0 (iw0
, iw1
, pc
, outf
);
4558 else if ((iw0
& 0xff00) == 0xe100 && (iw1
& 0x0000) == 0x0000)
4559 rv
= decode_LDIMMhalf_0 (iw0
, iw1
, outf
);
4560 else if ((iw0
& 0xfe00) == 0xe200 && (iw1
& 0x0000) == 0x0000)
4561 rv
= decode_CALLa_0 (iw0
, iw1
, pc
, outf
);
4562 else if ((iw0
& 0xfc00) == 0xe400 && (iw1
& 0x0000) == 0x0000)
4563 rv
= decode_LDSTidxI_0 (iw0
, iw1
, outf
);
4564 else if ((iw0
& 0xfffe) == 0xe800 && (iw1
& 0x0000) == 0x0000)
4565 rv
= decode_linkage_0 (iw0
, iw1
, outf
);
4566 else if ((iw0
& 0xf600) == 0xc000 && (iw1
& 0x0000) == 0x0000)
4567 rv
= decode_dsp32mac_0 (iw0
, iw1
, outf
);
4568 else if ((iw0
& 0xf600) == 0xc200 && (iw1
& 0x0000) == 0x0000)
4569 rv
= decode_dsp32mult_0 (iw0
, iw1
, outf
);
4570 else if ((iw0
& 0xf7c0) == 0xc400 && (iw1
& 0x0000) == 0x0000)
4571 rv
= decode_dsp32alu_0 (iw0
, iw1
, outf
);
4572 else if ((iw0
& 0xf780) == 0xc600 && (iw1
& 0x01c0) == 0x0000)
4573 rv
= decode_dsp32shift_0 (iw0
, iw1
, outf
);
4574 else if ((iw0
& 0xf780) == 0xc680 && (iw1
& 0x0000) == 0x0000)
4575 rv
= decode_dsp32shiftimm_0 (iw0
, iw1
, outf
);
4576 else if ((iw0
& 0xff00) == 0xf800)
4577 rv
= decode_pseudoDEBUG_0 (iw0
, outf
);
4579 else if ((iw0
& 0xFF00) == 0xF900)
4580 rv
= decode_pseudoOChar_0 (iw0
, iw1
, pc
, outf
);
4582 else if ((iw0
& 0xFFC0) == 0xf000 && (iw1
& 0x0000) == 0x0000)
4583 rv
= decode_pseudodbg_assert_0 (iw0
, iw1
, outf
);
4590 print_insn_bfin (bfd_vma pc
, disassemble_info
*outf
)
4597 status
= (*outf
->read_memory_func
) (pc
& ~0x01, buf
, 2, outf
);
4598 iw0
= bfd_getl16 (buf
);
4600 count
+= _print_insn_bfin (pc
, outf
);
4602 /* Proper display of multiple issue instructions. */
4604 if ((iw0
& 0xc000) == 0xc000 && (iw0
& BIT_MULTI_INS
)
4605 && ((iw0
& 0xe800) != 0xe800 /* Not Linkage. */ ))
4607 outf
->fprintf_func (outf
->stream
, " || ");
4608 count
+= _print_insn_bfin (pc
+ 4, outf
);
4609 outf
->fprintf_func (outf
->stream
, " || ");
4610 count
+= _print_insn_bfin (pc
+ 6, outf
);
4614 outf
->fprintf_func (outf
->stream
, "ILLEGAL");
4617 outf
->fprintf_func (outf
->stream
, ";");