2005-07-07 H.J. Lu <hongjiu.lu@intel.com>
[deliverable/binutils-gdb.git] / opcodes / cris-dis.c
1 /* Disassembler code for CRIS.
2 Copyright 2000, 2001, 2002, 2004, 2005 Free Software Foundation, Inc.
3 Contributed by Axis Communications AB, Lund, Sweden.
4 Written by Hans-Peter Nilsson.
5
6 This file is part of the GNU binutils and GDB, the GNU debugger.
7
8 This program is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published by the
10 Free Software Foundation; either version 2, or (at your option) any later
11 version.
12
13 This program is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
22
23 #include "dis-asm.h"
24 #include "sysdep.h"
25 #include "opcode/cris.h"
26 #include "libiberty.h"
27 \f
28 /* No instruction will be disassembled longer than this. In theory, and
29 in silicon, address prefixes can be cascaded. In practice, cascading
30 is not used by GCC, and not supported by the assembler. */
31 #ifndef MAX_BYTES_PER_CRIS_INSN
32 #define MAX_BYTES_PER_CRIS_INSN 8
33 #endif
34
35 /* Whether or not to decode prefixes, folding it into the following
36 instruction. FIXME: Make this optional later. */
37 #ifndef PARSE_PREFIX
38 #define PARSE_PREFIX 1
39 #endif
40
41 /* Sometimes we prefix all registers with this character. */
42 #define REGISTER_PREFIX_CHAR '$'
43
44 /* Whether or not to trace the following sequence:
45 sub* X,r%d
46 bound* Y,r%d
47 adds.w [pc+r%d.w],pc
48
49 This is the assembly form of a switch-statement in C.
50 The "sub is optional. If there is none, then X will be zero.
51 X is the value of the first case,
52 Y is the number of cases (including default).
53
54 This results in case offsets printed on the form:
55 case N: -> case_address
56 where N is an estimation on the corresponding 'case' operand in C,
57 and case_address is where execution of that case continues after the
58 sequence presented above.
59
60 The old style of output was to print the offsets as instructions,
61 which made it hard to follow "case"-constructs in the disassembly,
62 and caused a lot of annoying warnings about undefined instructions.
63
64 FIXME: Make this optional later. */
65 #ifndef TRACE_CASE
66 #define TRACE_CASE (disdata->trace_case)
67 #endif
68
69 enum cris_disass_family
70 { cris_dis_v0_v10, cris_dis_common_v10_v32, cris_dis_v32 };
71
72 /* Stored in the disasm_info->private_data member. */
73 struct cris_disasm_data
74 {
75 /* Whether to print something less confusing if we find something
76 matching a switch-construct. */
77 bfd_boolean trace_case;
78
79 /* Whether this code is flagged as crisv32. FIXME: Should be an enum
80 that includes "compatible". */
81 enum cris_disass_family distype;
82 };
83
84 /* Value of first element in switch. */
85 static long case_offset = 0;
86
87 /* How many more case-offsets to print. */
88 static long case_offset_counter = 0;
89
90 /* Number of case offsets. */
91 static long no_of_case_offsets = 0;
92
93 /* Candidate for next case_offset. */
94 static long last_immediate = 0;
95
96 static int cris_constraint
97 (const char *, unsigned, unsigned, struct cris_disasm_data *);
98
99 /* Parse disassembler options and store state in info. FIXME: For the
100 time being, we abuse static variables. */
101
102 static bfd_boolean
103 cris_parse_disassembler_options (disassemble_info *info,
104 enum cris_disass_family distype)
105 {
106 struct cris_disasm_data *disdata;
107
108 info->private_data = calloc (1, sizeof (struct cris_disasm_data));
109 disdata = (struct cris_disasm_data *) info->private_data;
110 if (disdata == NULL)
111 return FALSE;
112
113 /* Default true. */
114 disdata->trace_case
115 = (info->disassembler_options == NULL
116 || (strcmp (info->disassembler_options, "nocase") != 0));
117
118 disdata->distype = distype;
119 return TRUE;
120 }
121
122 static const struct cris_spec_reg *
123 spec_reg_info (unsigned int sreg, enum cris_disass_family distype)
124 {
125 int i;
126
127 for (i = 0; cris_spec_regs[i].name != NULL; i++)
128 {
129 if (cris_spec_regs[i].number == sreg)
130 {
131 if (distype == cris_dis_v32)
132 switch (cris_spec_regs[i].applicable_version)
133 {
134 case cris_ver_warning:
135 case cris_ver_version_all:
136 case cris_ver_v3p:
137 case cris_ver_v8p:
138 case cris_ver_v10p:
139 case cris_ver_v32p:
140 /* No ambiguous sizes or register names with CRISv32. */
141 if (cris_spec_regs[i].warning == NULL)
142 return &cris_spec_regs[i];
143 default:
144 ;
145 }
146 else if (cris_spec_regs[i].applicable_version != cris_ver_v32p)
147 return &cris_spec_regs[i];
148 }
149 }
150
151 return NULL;
152 }
153
154 /* Return the number of bits in the argument. */
155
156 static int
157 number_of_bits (unsigned int val)
158 {
159 int bits;
160
161 for (bits = 0; val != 0; val &= val - 1)
162 bits++;
163
164 return bits;
165 }
166
167 /* Get an entry in the opcode-table. */
168
169 static const struct cris_opcode *
170 get_opcode_entry (unsigned int insn,
171 unsigned int prefix_insn,
172 struct cris_disasm_data *disdata)
173 {
174 /* For non-prefixed insns, we keep a table of pointers, indexed by the
175 insn code. Each entry is initialized when found to be NULL. */
176 static const struct cris_opcode **opc_table = NULL;
177
178 const struct cris_opcode *max_matchedp = NULL;
179 const struct cris_opcode **prefix_opc_table = NULL;
180
181 /* We hold a table for each prefix that need to be handled differently. */
182 static const struct cris_opcode **dip_prefixes = NULL;
183 static const struct cris_opcode **bdapq_m1_prefixes = NULL;
184 static const struct cris_opcode **bdapq_m2_prefixes = NULL;
185 static const struct cris_opcode **bdapq_m4_prefixes = NULL;
186 static const struct cris_opcode **rest_prefixes = NULL;
187
188 /* Allocate and clear the opcode-table. */
189 if (opc_table == NULL)
190 {
191 opc_table = malloc (65536 * sizeof (opc_table[0]));
192 if (opc_table == NULL)
193 return NULL;
194
195 memset (opc_table, 0, 65536 * sizeof (const struct cris_opcode *));
196
197 dip_prefixes
198 = malloc (65536 * sizeof (const struct cris_opcode **));
199 if (dip_prefixes == NULL)
200 return NULL;
201
202 memset (dip_prefixes, 0, 65536 * sizeof (dip_prefixes[0]));
203
204 bdapq_m1_prefixes
205 = malloc (65536 * sizeof (const struct cris_opcode **));
206 if (bdapq_m1_prefixes == NULL)
207 return NULL;
208
209 memset (bdapq_m1_prefixes, 0, 65536 * sizeof (bdapq_m1_prefixes[0]));
210
211 bdapq_m2_prefixes
212 = malloc (65536 * sizeof (const struct cris_opcode **));
213 if (bdapq_m2_prefixes == NULL)
214 return NULL;
215
216 memset (bdapq_m2_prefixes, 0, 65536 * sizeof (bdapq_m2_prefixes[0]));
217
218 bdapq_m4_prefixes
219 = malloc (65536 * sizeof (const struct cris_opcode **));
220 if (bdapq_m4_prefixes == NULL)
221 return NULL;
222
223 memset (bdapq_m4_prefixes, 0, 65536 * sizeof (bdapq_m4_prefixes[0]));
224
225 rest_prefixes
226 = malloc (65536 * sizeof (const struct cris_opcode **));
227 if (rest_prefixes == NULL)
228 return NULL;
229
230 memset (rest_prefixes, 0, 65536 * sizeof (rest_prefixes[0]));
231 }
232
233 /* Get the right table if this is a prefix.
234 This code is connected to cris_constraints in that it knows what
235 prefixes play a role in recognition of patterns; the necessary
236 state is reflected by which table is used. If constraints
237 involving match or non-match of prefix insns are changed, then this
238 probably needs changing too. */
239 if (prefix_insn != NO_CRIS_PREFIX)
240 {
241 const struct cris_opcode *popcodep
242 = (opc_table[prefix_insn] != NULL
243 ? opc_table[prefix_insn]
244 : get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata));
245
246 if (popcodep == NULL)
247 return NULL;
248
249 if (popcodep->match == BDAP_QUICK_OPCODE)
250 {
251 /* Since some offsets are recognized with "push" macros, we
252 have to have different tables for them. */
253 int offset = (prefix_insn & 255);
254
255 if (offset > 127)
256 offset -= 256;
257
258 switch (offset)
259 {
260 case -4:
261 prefix_opc_table = bdapq_m4_prefixes;
262 break;
263
264 case -2:
265 prefix_opc_table = bdapq_m2_prefixes;
266 break;
267
268 case -1:
269 prefix_opc_table = bdapq_m1_prefixes;
270 break;
271
272 default:
273 prefix_opc_table = rest_prefixes;
274 break;
275 }
276 }
277 else if (popcodep->match == DIP_OPCODE)
278 /* We don't allow postincrement when the prefix is DIP, so use a
279 different table for DIP. */
280 prefix_opc_table = dip_prefixes;
281 else
282 prefix_opc_table = rest_prefixes;
283 }
284
285 if (prefix_insn != NO_CRIS_PREFIX
286 && prefix_opc_table[insn] != NULL)
287 max_matchedp = prefix_opc_table[insn];
288 else if (prefix_insn == NO_CRIS_PREFIX && opc_table[insn] != NULL)
289 max_matchedp = opc_table[insn];
290 else
291 {
292 const struct cris_opcode *opcodep;
293 int max_level_of_match = -1;
294
295 for (opcodep = cris_opcodes;
296 opcodep->name != NULL;
297 opcodep++)
298 {
299 int level_of_match;
300
301 if (disdata->distype == cris_dis_v32)
302 {
303 switch (opcodep->applicable_version)
304 {
305 case cris_ver_version_all:
306 break;
307
308 case cris_ver_v0_3:
309 case cris_ver_v0_10:
310 case cris_ver_v3_10:
311 case cris_ver_sim_v0_10:
312 case cris_ver_v8_10:
313 case cris_ver_v10:
314 case cris_ver_warning:
315 continue;
316
317 case cris_ver_v3p:
318 case cris_ver_v8p:
319 case cris_ver_v10p:
320 case cris_ver_v32p:
321 break;
322
323 case cris_ver_v8:
324 abort ();
325 default:
326 abort ();
327 }
328 }
329 else
330 {
331 switch (opcodep->applicable_version)
332 {
333 case cris_ver_version_all:
334 case cris_ver_v0_3:
335 case cris_ver_v3p:
336 case cris_ver_v0_10:
337 case cris_ver_v8p:
338 case cris_ver_v8_10:
339 case cris_ver_v10:
340 case cris_ver_sim_v0_10:
341 case cris_ver_v10p:
342 case cris_ver_warning:
343 break;
344
345 case cris_ver_v32p:
346 continue;
347
348 case cris_ver_v8:
349 abort ();
350 default:
351 abort ();
352 }
353 }
354
355 /* We give a double lead for bits matching the template in
356 cris_opcodes. Not even, because then "move p8,r10" would
357 be given 2 bits lead over "clear.d r10". When there's a
358 tie, the first entry in the table wins. This is
359 deliberate, to avoid a more complicated recognition
360 formula. */
361 if ((opcodep->match & insn) == opcodep->match
362 && (opcodep->lose & insn) == 0
363 && ((level_of_match
364 = cris_constraint (opcodep->args,
365 insn,
366 prefix_insn,
367 disdata))
368 >= 0)
369 && ((level_of_match
370 += 2 * number_of_bits (opcodep->match
371 | opcodep->lose))
372 > max_level_of_match))
373 {
374 max_matchedp = opcodep;
375 max_level_of_match = level_of_match;
376
377 /* If there was a full match, never mind looking
378 further. */
379 if (level_of_match >= 2 * 16)
380 break;
381 }
382 }
383 /* Fill in the new entry.
384
385 If there are changes to the opcode-table involving prefixes, and
386 disassembly then does not work correctly, try removing the
387 else-clause below that fills in the prefix-table. If that
388 helps, you need to change the prefix_opc_table setting above, or
389 something related. */
390 if (prefix_insn == NO_CRIS_PREFIX)
391 opc_table[insn] = max_matchedp;
392 else
393 prefix_opc_table[insn] = max_matchedp;
394 }
395
396 return max_matchedp;
397 }
398
399 /* Return -1 if the constraints of a bitwise-matched instruction say
400 that there is no match. Otherwise return a nonnegative number
401 indicating the confidence in the match (higher is better). */
402
403 static int
404 cris_constraint (const char *cs,
405 unsigned int insn,
406 unsigned int prefix_insn,
407 struct cris_disasm_data *disdata)
408 {
409 int retval = 0;
410 int tmp;
411 int prefix_ok = 0;
412 const char *s;
413
414 for (s = cs; *s; s++)
415 switch (*s)
416 {
417 case '!':
418 /* Do not recognize "pop" if there's a prefix and then only for
419 v0..v10. */
420 if (prefix_insn != NO_CRIS_PREFIX
421 || disdata->distype != cris_dis_v0_v10)
422 return -1;
423 break;
424
425 case 'U':
426 /* Not recognized at disassembly. */
427 return -1;
428
429 case 'M':
430 /* Size modifier for "clear", i.e. special register 0, 4 or 8.
431 Check that it is one of them. Only special register 12 could
432 be mismatched, but checking for matches is more logical than
433 checking for mismatches when there are only a few cases. */
434 tmp = ((insn >> 12) & 0xf);
435 if (tmp != 0 && tmp != 4 && tmp != 8)
436 return -1;
437 break;
438
439 case 'm':
440 if ((insn & 0x30) == 0x30)
441 return -1;
442 break;
443
444 case 'S':
445 /* A prefix operand without side-effect. */
446 if (prefix_insn != NO_CRIS_PREFIX && (insn & 0x400) == 0)
447 {
448 prefix_ok = 1;
449 break;
450 }
451 else
452 return -1;
453
454 case 's':
455 case 'y':
456 case 'Y':
457 /* If this is a prefixed insn with postincrement (side-effect),
458 the prefix must not be DIP. */
459 if (prefix_insn != NO_CRIS_PREFIX)
460 {
461 if (insn & 0x400)
462 {
463 const struct cris_opcode *prefix_opcodep
464 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata);
465
466 if (prefix_opcodep->match == DIP_OPCODE)
467 return -1;
468 }
469
470 prefix_ok = 1;
471 }
472 break;
473
474 case 'B':
475 /* If we don't fall through, then the prefix is ok. */
476 prefix_ok = 1;
477
478 /* A "push" prefix. Check for valid "push" size.
479 In case of special register, it may be != 4. */
480 if (prefix_insn != NO_CRIS_PREFIX)
481 {
482 /* Match the prefix insn to BDAPQ. */
483 const struct cris_opcode *prefix_opcodep
484 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata);
485
486 if (prefix_opcodep->match == BDAP_QUICK_OPCODE)
487 {
488 int pushsize = (prefix_insn & 255);
489
490 if (pushsize > 127)
491 pushsize -= 256;
492
493 if (s[1] == 'P')
494 {
495 unsigned int spec_reg = (insn >> 12) & 15;
496 const struct cris_spec_reg *sregp
497 = spec_reg_info (spec_reg, disdata->distype);
498
499 /* For a special-register, the "prefix size" must
500 match the size of the register. */
501 if (sregp && sregp->reg_size == (unsigned int) -pushsize)
502 break;
503 }
504 else if (s[1] == 'R')
505 {
506 if ((insn & 0x30) == 0x20 && pushsize == -4)
507 break;
508 }
509 /* FIXME: Should abort here; next constraint letter
510 *must* be 'P' or 'R'. */
511 }
512 }
513 return -1;
514
515 case 'D':
516 retval = (((insn >> 12) & 15) == (insn & 15));
517 if (!retval)
518 return -1;
519 else
520 retval += 4;
521 break;
522
523 case 'P':
524 {
525 const struct cris_spec_reg *sregp
526 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
527
528 /* Since we match four bits, we will give a value of 4-1 = 3
529 in a match. If there is a corresponding exact match of a
530 special register in another pattern, it will get a value of
531 4, which will be higher. This should be correct in that an
532 exact pattern would match better than a general pattern.
533
534 Note that there is a reason for not returning zero; the
535 pattern for "clear" is partly matched in the bit-pattern
536 (the two lower bits must be zero), while the bit-pattern
537 for a move from a special register is matched in the
538 register constraint. */
539
540 if (sregp != NULL)
541 {
542 retval += 3;
543 break;
544 }
545 else
546 return -1;
547 }
548 }
549
550 if (prefix_insn != NO_CRIS_PREFIX && ! prefix_ok)
551 return -1;
552
553 return retval;
554 }
555
556 /* Format number as hex with a leading "0x" into outbuffer. */
557
558 static char *
559 format_hex (unsigned long number,
560 char *outbuffer,
561 struct cris_disasm_data *disdata)
562 {
563 /* Truncate negative numbers on >32-bit hosts. */
564 number &= 0xffffffff;
565
566 sprintf (outbuffer, "0x%lx", number);
567
568 /* Save this value for the "case" support. */
569 if (TRACE_CASE)
570 last_immediate = number;
571
572 return outbuffer + strlen (outbuffer);
573 }
574
575 /* Format number as decimal into outbuffer. Parameter signedp says
576 whether the number should be formatted as signed (!= 0) or
577 unsigned (== 0). */
578
579 static char *
580 format_dec (long number, char *outbuffer, int signedp)
581 {
582 last_immediate = number;
583 sprintf (outbuffer, signedp ? "%ld" : "%lu", number);
584
585 return outbuffer + strlen (outbuffer);
586 }
587
588 /* Format the name of the general register regno into outbuffer. */
589
590 static char *
591 format_reg (struct cris_disasm_data *disdata,
592 int regno,
593 char *outbuffer_start,
594 bfd_boolean with_reg_prefix)
595 {
596 char *outbuffer = outbuffer_start;
597
598 if (with_reg_prefix)
599 *outbuffer++ = REGISTER_PREFIX_CHAR;
600
601 switch (regno)
602 {
603 case 15:
604 /* For v32, there is no context in which we output PC. */
605 if (disdata->distype == cris_dis_v32)
606 strcpy (outbuffer, "acr");
607 else
608 strcpy (outbuffer, "pc");
609 break;
610
611 case 14:
612 strcpy (outbuffer, "sp");
613 break;
614
615 default:
616 sprintf (outbuffer, "r%d", regno);
617 break;
618 }
619
620 return outbuffer_start + strlen (outbuffer_start);
621 }
622
623 /* Format the name of a support register into outbuffer. */
624
625 static char *
626 format_sup_reg (unsigned int regno,
627 char *outbuffer_start,
628 bfd_boolean with_reg_prefix)
629 {
630 char *outbuffer = outbuffer_start;
631 int i;
632
633 if (with_reg_prefix)
634 *outbuffer++ = REGISTER_PREFIX_CHAR;
635
636 for (i = 0; cris_support_regs[i].name != NULL; i++)
637 if (cris_support_regs[i].number == regno)
638 {
639 sprintf (outbuffer, "%s", cris_support_regs[i].name);
640 return outbuffer_start + strlen (outbuffer_start);
641 }
642
643 /* There's supposed to be register names covering all numbers, though
644 some may be generic names. */
645 sprintf (outbuffer, "format_sup_reg-BUG");
646 return outbuffer_start + strlen (outbuffer_start);
647 }
648
649 /* Return the length of an instruction. */
650
651 static unsigned
652 bytes_to_skip (unsigned int insn,
653 const struct cris_opcode *matchedp,
654 enum cris_disass_family distype)
655 {
656 /* Each insn is a word plus "immediate" operands. */
657 unsigned to_skip = 2;
658 const char *template = matchedp->args;
659 const char *s;
660
661 for (s = template; *s; s++)
662 if ((*s == 's' || *s == 'N' || *s == 'Y')
663 && (insn & 0x400) && (insn & 15) == 15)
664 {
665 /* Immediate via [pc+], so we have to check the size of the
666 operand. */
667 int mode_size = 1 << ((insn >> 4) & (*template == 'z' ? 1 : 3));
668
669 if (matchedp->imm_oprnd_size == SIZE_FIX_32)
670 to_skip += 4;
671 else if (matchedp->imm_oprnd_size == SIZE_SPEC_REG)
672 {
673 const struct cris_spec_reg *sregp
674 = spec_reg_info ((insn >> 12) & 15, distype);
675
676 /* FIXME: Improve error handling; should have been caught
677 earlier. */
678 if (sregp == NULL)
679 return 2;
680
681 /* PC is incremented by two, not one, for a byte. Except on
682 CRISv32, where constants are always DWORD-size for
683 special registers. */
684 to_skip +=
685 distype == cris_dis_v32 ? 4 : (sregp->reg_size + 1) & ~1;
686 }
687 else
688 to_skip += (mode_size + 1) & ~1;
689 }
690 else if (*s == 'n')
691 to_skip += 4;
692 else if (*s == 'b')
693 to_skip += 2;
694
695 return to_skip;
696 }
697
698 /* Print condition code flags. */
699
700 static char *
701 print_flags (struct cris_disasm_data *disdata, unsigned int insn, char *cp)
702 {
703 /* Use the v8 (Etrax 100) flag definitions for disassembly.
704 The differences with v0 (Etrax 1..4) vs. Svinto are:
705 v0 'd' <=> v8 'm'
706 v0 'e' <=> v8 'b'.
707 FIXME: Emit v0..v3 flag names somehow. */
708 static const char v8_fnames[] = "cvznxibm";
709 static const char v32_fnames[] = "cvznxiup";
710 const char *fnames
711 = disdata->distype == cris_dis_v32 ? v32_fnames : v8_fnames;
712
713 unsigned char flagbits = (((insn >> 8) & 0xf0) | (insn & 15));
714 int i;
715
716 for (i = 0; i < 8; i++)
717 if (flagbits & (1 << i))
718 *cp++ = fnames[i];
719
720 return cp;
721 }
722
723 /* Print out an insn with its operands, and update the info->insn_type
724 fields. The prefix_opcodep and the rest hold a prefix insn that is
725 supposed to be output as an address mode. */
726
727 static void
728 print_with_operands (const struct cris_opcode *opcodep,
729 unsigned int insn,
730 unsigned char *buffer,
731 bfd_vma addr,
732 disassemble_info *info,
733 /* If a prefix insn was before this insn (and is supposed
734 to be output as an address), here is a description of
735 it. */
736 const struct cris_opcode *prefix_opcodep,
737 unsigned int prefix_insn,
738 unsigned char *prefix_buffer,
739 bfd_boolean with_reg_prefix)
740 {
741 /* Get a buffer of somewhat reasonable size where we store
742 intermediate parts of the insn. */
743 char temp[sizeof (".d [$r13=$r12-2147483648],$r10") * 2];
744 char *tp = temp;
745 static const char mode_char[] = "bwd?";
746 const char *s;
747 const char *cs;
748 struct cris_disasm_data *disdata
749 = (struct cris_disasm_data *) info->private_data;
750
751 /* Print out the name first thing we do. */
752 (*info->fprintf_func) (info->stream, "%s", opcodep->name);
753
754 cs = opcodep->args;
755 s = cs;
756
757 /* Ignore any prefix indicator. */
758 if (*s == 'p')
759 s++;
760
761 if (*s == 'm' || *s == 'M' || *s == 'z')
762 {
763 *tp++ = '.';
764
765 /* Get the size-letter. */
766 *tp++ = *s == 'M'
767 ? (insn & 0x8000 ? 'd'
768 : insn & 0x4000 ? 'w' : 'b')
769 : mode_char[(insn >> 4) & (*s == 'z' ? 1 : 3)];
770
771 /* Ignore the size and the space character that follows. */
772 s += 2;
773 }
774
775 /* Add a space if this isn't a long-branch, because for those will add
776 the condition part of the name later. */
777 if (opcodep->match != (BRANCH_PC_LOW + BRANCH_INCR_HIGH * 256))
778 *tp++ = ' ';
779
780 /* Fill in the insn-type if deducible from the name (and there's no
781 better way). */
782 if (opcodep->name[0] == 'j')
783 {
784 if (strncmp (opcodep->name, "jsr", 3) == 0)
785 /* It's "jsr" or "jsrc". */
786 info->insn_type = dis_jsr;
787 else
788 /* Any other jump-type insn is considered a branch. */
789 info->insn_type = dis_branch;
790 }
791
792 /* We might know some more fields right now. */
793 info->branch_delay_insns = opcodep->delayed;
794
795 /* Handle operands. */
796 for (; *s; s++)
797 {
798 switch (*s)
799 {
800 case 'T':
801 tp = format_sup_reg ((insn >> 12) & 15, tp, with_reg_prefix);
802 break;
803
804 case 'A':
805 if (with_reg_prefix)
806 *tp++ = REGISTER_PREFIX_CHAR;
807 *tp++ = 'a';
808 *tp++ = 'c';
809 *tp++ = 'r';
810 break;
811
812 case '[':
813 case ']':
814 case ',':
815 *tp++ = *s;
816 break;
817
818 case '!':
819 /* Ignore at this point; used at earlier stages to avoid
820 recognition if there's a prefix at something that in other
821 ways looks like a "pop". */
822 break;
823
824 case 'd':
825 /* Ignore. This is an optional ".d " on the large one of
826 relaxable insns. */
827 break;
828
829 case 'B':
830 /* This was the prefix that made this a "push". We've already
831 handled it by recognizing it, so signal that the prefix is
832 handled by setting it to NULL. */
833 prefix_opcodep = NULL;
834 break;
835
836 case 'D':
837 case 'r':
838 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix);
839 break;
840
841 case 'R':
842 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix);
843 break;
844
845 case 'n':
846 {
847 /* Like N but pc-relative to the start of the insn. */
848 unsigned long number
849 = (buffer[2] + buffer[3] * 256 + buffer[4] * 65536
850 + buffer[5] * 0x1000000 + addr);
851
852 /* Finish off and output previous formatted bytes. */
853 *tp = 0;
854 if (temp[0])
855 (*info->fprintf_func) (info->stream, "%s", temp);
856 tp = temp;
857
858 (*info->print_address_func) ((bfd_vma) number, info);
859 }
860 break;
861
862 case 'u':
863 {
864 /* Like n but the offset is bits <3:0> in the instruction. */
865 unsigned long number = (buffer[0] & 0xf) * 2 + addr;
866
867 /* Finish off and output previous formatted bytes. */
868 *tp = 0;
869 if (temp[0])
870 (*info->fprintf_func) (info->stream, "%s", temp);
871 tp = temp;
872
873 (*info->print_address_func) ((bfd_vma) number, info);
874 }
875 break;
876
877 case 'N':
878 case 'y':
879 case 'Y':
880 case 'S':
881 case 's':
882 /* Any "normal" memory operand. */
883 if ((insn & 0x400) && (insn & 15) == 15)
884 {
885 /* We're looking at [pc+], i.e. we need to output an immediate
886 number, where the size can depend on different things. */
887 long number;
888 int signedp
889 = ((*cs == 'z' && (insn & 0x20))
890 || opcodep->match == BDAP_QUICK_OPCODE);
891 int nbytes;
892
893 if (opcodep->imm_oprnd_size == SIZE_FIX_32)
894 nbytes = 4;
895 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG)
896 {
897 const struct cris_spec_reg *sregp
898 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
899
900 /* A NULL return should have been as a non-match earlier,
901 so catch it as an internal error in the error-case
902 below. */
903 if (sregp == NULL)
904 /* Whatever non-valid size. */
905 nbytes = 42;
906 else
907 /* PC is always incremented by a multiple of two.
908 For CRISv32, immediates are always 4 bytes for
909 special registers. */
910 nbytes = disdata->distype == cris_dis_v32
911 ? 4 : (sregp->reg_size + 1) & ~1;
912 }
913 else
914 {
915 int mode_size = 1 << ((insn >> 4) & (*cs == 'z' ? 1 : 3));
916
917 if (mode_size == 1)
918 nbytes = 2;
919 else
920 nbytes = mode_size;
921 }
922
923 switch (nbytes)
924 {
925 case 1:
926 number = buffer[2];
927 if (signedp && number > 127)
928 number -= 256;
929 break;
930
931 case 2:
932 number = buffer[2] + buffer[3] * 256;
933 if (signedp && number > 32767)
934 number -= 65536;
935 break;
936
937 case 4:
938 number
939 = buffer[2] + buffer[3] * 256 + buffer[4] * 65536
940 + buffer[5] * 0x1000000;
941 break;
942
943 default:
944 strcpy (tp, "bug");
945 tp += 3;
946 number = 42;
947 }
948
949 if ((*cs == 'z' && (insn & 0x20))
950 || (opcodep->match == BDAP_QUICK_OPCODE
951 && (nbytes <= 2 || buffer[1 + nbytes] == 0)))
952 tp = format_dec (number, tp, signedp);
953 else
954 {
955 unsigned int highbyte = (number >> 24) & 0xff;
956
957 /* Either output this as an address or as a number. If it's
958 a dword with the same high-byte as the address of the
959 insn, assume it's an address, and also if it's a non-zero
960 non-0xff high-byte. If this is a jsr or a jump, then
961 it's definitely an address. */
962 if (nbytes == 4
963 && (highbyte == ((addr >> 24) & 0xff)
964 || (highbyte != 0 && highbyte != 0xff)
965 || info->insn_type == dis_branch
966 || info->insn_type == dis_jsr))
967 {
968 /* Finish off and output previous formatted bytes. */
969 *tp = 0;
970 tp = temp;
971 if (temp[0])
972 (*info->fprintf_func) (info->stream, "%s", temp);
973
974 (*info->print_address_func) ((bfd_vma) number, info);
975
976 info->target = number;
977 }
978 else
979 tp = format_hex (number, tp, disdata);
980 }
981 }
982 else
983 {
984 /* Not an immediate number. Then this is a (possibly
985 prefixed) memory operand. */
986 if (info->insn_type != dis_nonbranch)
987 {
988 int mode_size
989 = 1 << ((insn >> 4)
990 & (opcodep->args[0] == 'z' ? 1 : 3));
991 int size;
992 info->insn_type = dis_dref;
993 info->flags |= CRIS_DIS_FLAG_MEMREF;
994
995 if (opcodep->imm_oprnd_size == SIZE_FIX_32)
996 size = 4;
997 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG)
998 {
999 const struct cris_spec_reg *sregp
1000 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
1001
1002 /* FIXME: Improve error handling; should have been caught
1003 earlier. */
1004 if (sregp == NULL)
1005 size = 4;
1006 else
1007 size = sregp->reg_size;
1008 }
1009 else
1010 size = mode_size;
1011
1012 info->data_size = size;
1013 }
1014
1015 *tp++ = '[';
1016
1017 if (prefix_opcodep
1018 /* We don't match dip with a postincremented field
1019 as a side-effect address mode. */
1020 && ((insn & 0x400) == 0
1021 || prefix_opcodep->match != DIP_OPCODE))
1022 {
1023 if (insn & 0x400)
1024 {
1025 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix);
1026 *tp++ = '=';
1027 }
1028
1029
1030 /* We mainly ignore the prefix format string when the
1031 address-mode syntax is output. */
1032 switch (prefix_opcodep->match)
1033 {
1034 case DIP_OPCODE:
1035 /* It's [r], [r+] or [pc+]. */
1036 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15)
1037 {
1038 /* It's [pc+]. This cannot possibly be anything
1039 but an address. */
1040 unsigned long number
1041 = prefix_buffer[2] + prefix_buffer[3] * 256
1042 + prefix_buffer[4] * 65536
1043 + prefix_buffer[5] * 0x1000000;
1044
1045 info->target = (bfd_vma) number;
1046
1047 /* Finish off and output previous formatted
1048 data. */
1049 *tp = 0;
1050 tp = temp;
1051 if (temp[0])
1052 (*info->fprintf_func) (info->stream, "%s", temp);
1053
1054 (*info->print_address_func) ((bfd_vma) number, info);
1055 }
1056 else
1057 {
1058 /* For a memref in an address, we use target2.
1059 In this case, target is zero. */
1060 info->flags
1061 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
1062 | CRIS_DIS_FLAG_MEM_TARGET2_MEM);
1063
1064 info->target2 = prefix_insn & 15;
1065
1066 *tp++ = '[';
1067 tp = format_reg (disdata, prefix_insn & 15, tp,
1068 with_reg_prefix);
1069 if (prefix_insn & 0x400)
1070 *tp++ = '+';
1071 *tp++ = ']';
1072 }
1073 break;
1074
1075 case BDAP_QUICK_OPCODE:
1076 {
1077 int number;
1078
1079 number = prefix_buffer[0];
1080 if (number > 127)
1081 number -= 256;
1082
1083 /* Output "reg+num" or, if num < 0, "reg-num". */
1084 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp,
1085 with_reg_prefix);
1086 if (number >= 0)
1087 *tp++ = '+';
1088 tp = format_dec (number, tp, 1);
1089
1090 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
1091 info->target = (prefix_insn >> 12) & 15;
1092 info->target2 = (bfd_vma) number;
1093 break;
1094 }
1095
1096 case BIAP_OPCODE:
1097 /* Output "r+R.m". */
1098 tp = format_reg (disdata, prefix_insn & 15, tp,
1099 with_reg_prefix);
1100 *tp++ = '+';
1101 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp,
1102 with_reg_prefix);
1103 *tp++ = '.';
1104 *tp++ = mode_char[(prefix_insn >> 4) & 3];
1105
1106 info->flags
1107 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
1108 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG
1109
1110 | ((prefix_insn & 0x8000)
1111 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT4
1112 : ((prefix_insn & 0x8000)
1113 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT2 : 0)));
1114
1115 /* Is it the casejump? It's a "adds.w [pc+r%d.w],pc". */
1116 if (insn == 0xf83f && (prefix_insn & ~0xf000) == 0x55f)
1117 /* Then start interpreting data as offsets. */
1118 case_offset_counter = no_of_case_offsets;
1119 break;
1120
1121 case BDAP_INDIR_OPCODE:
1122 /* Output "r+s.m", or, if "s" is [pc+], "r+s" or
1123 "r-s". */
1124 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp,
1125 with_reg_prefix);
1126
1127 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15)
1128 {
1129 long number;
1130 unsigned int nbytes;
1131
1132 /* It's a value. Get its size. */
1133 int mode_size = 1 << ((prefix_insn >> 4) & 3);
1134
1135 if (mode_size == 1)
1136 nbytes = 2;
1137 else
1138 nbytes = mode_size;
1139
1140 switch (nbytes)
1141 {
1142 case 1:
1143 number = prefix_buffer[2];
1144 if (number > 127)
1145 number -= 256;
1146 break;
1147
1148 case 2:
1149 number = prefix_buffer[2] + prefix_buffer[3] * 256;
1150 if (number > 32767)
1151 number -= 65536;
1152 break;
1153
1154 case 4:
1155 number
1156 = prefix_buffer[2] + prefix_buffer[3] * 256
1157 + prefix_buffer[4] * 65536
1158 + prefix_buffer[5] * 0x1000000;
1159 break;
1160
1161 default:
1162 strcpy (tp, "bug");
1163 tp += 3;
1164 number = 42;
1165 }
1166
1167 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
1168 info->target2 = (bfd_vma) number;
1169
1170 /* If the size is dword, then assume it's an
1171 address. */
1172 if (nbytes == 4)
1173 {
1174 /* Finish off and output previous formatted
1175 bytes. */
1176 *tp++ = '+';
1177 *tp = 0;
1178 tp = temp;
1179 (*info->fprintf_func) (info->stream, "%s", temp);
1180
1181 (*info->print_address_func) ((bfd_vma) number, info);
1182 }
1183 else
1184 {
1185 if (number >= 0)
1186 *tp++ = '+';
1187 tp = format_dec (number, tp, 1);
1188 }
1189 }
1190 else
1191 {
1192 /* Output "r+[R].m" or "r+[R+].m". */
1193 *tp++ = '+';
1194 *tp++ = '[';
1195 tp = format_reg (disdata, prefix_insn & 15, tp,
1196 with_reg_prefix);
1197 if (prefix_insn & 0x400)
1198 *tp++ = '+';
1199 *tp++ = ']';
1200 *tp++ = '.';
1201 *tp++ = mode_char[(prefix_insn >> 4) & 3];
1202
1203 info->flags
1204 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
1205 | CRIS_DIS_FLAG_MEM_TARGET2_MEM
1206 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG
1207
1208 | (((prefix_insn >> 4) == 2)
1209 ? 0
1210 : (((prefix_insn >> 4) & 3) == 1
1211 ? CRIS_DIS_FLAG_MEM_TARGET2_MEM_WORD
1212 : CRIS_DIS_FLAG_MEM_TARGET2_MEM_BYTE)));
1213 }
1214 break;
1215
1216 default:
1217 (*info->fprintf_func) (info->stream, "?prefix-bug");
1218 }
1219
1220 /* To mark that the prefix is used, reset it. */
1221 prefix_opcodep = NULL;
1222 }
1223 else
1224 {
1225 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix);
1226
1227 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
1228 info->target = insn & 15;
1229
1230 if (insn & 0x400)
1231 *tp++ = '+';
1232 }
1233 *tp++ = ']';
1234 }
1235 break;
1236
1237 case 'x':
1238 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix);
1239 *tp++ = '.';
1240 *tp++ = mode_char[(insn >> 4) & 3];
1241 break;
1242
1243 case 'I':
1244 tp = format_dec (insn & 63, tp, 0);
1245 break;
1246
1247 case 'b':
1248 {
1249 int where = buffer[2] + buffer[3] * 256;
1250
1251 if (where > 32767)
1252 where -= 65536;
1253
1254 where += addr + ((disdata->distype == cris_dis_v32) ? 0 : 4);
1255
1256 if (insn == BA_PC_INCR_OPCODE)
1257 info->insn_type = dis_branch;
1258 else
1259 info->insn_type = dis_condbranch;
1260
1261 info->target = (bfd_vma) where;
1262
1263 *tp = 0;
1264 tp = temp;
1265 (*info->fprintf_func) (info->stream, "%s%s ",
1266 temp, cris_cc_strings[insn >> 12]);
1267
1268 (*info->print_address_func) ((bfd_vma) where, info);
1269 }
1270 break;
1271
1272 case 'c':
1273 tp = format_dec (insn & 31, tp, 0);
1274 break;
1275
1276 case 'C':
1277 tp = format_dec (insn & 15, tp, 0);
1278 break;
1279
1280 case 'o':
1281 {
1282 long offset = insn & 0xfe;
1283 bfd_vma target;
1284
1285 if (insn & 1)
1286 offset |= ~0xff;
1287
1288 if (opcodep->match == BA_QUICK_OPCODE)
1289 info->insn_type = dis_branch;
1290 else
1291 info->insn_type = dis_condbranch;
1292
1293 target = addr + ((disdata->distype == cris_dis_v32) ? 0 : 2) + offset;
1294 info->target = target;
1295 *tp = 0;
1296 tp = temp;
1297 (*info->fprintf_func) (info->stream, "%s", temp);
1298 (*info->print_address_func) (target, info);
1299 }
1300 break;
1301
1302 case 'Q':
1303 case 'O':
1304 {
1305 long number = buffer[0];
1306
1307 if (number > 127)
1308 number = number - 256;
1309
1310 tp = format_dec (number, tp, 1);
1311 *tp++ = ',';
1312 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix);
1313 }
1314 break;
1315
1316 case 'f':
1317 tp = print_flags (disdata, insn, tp);
1318 break;
1319
1320 case 'i':
1321 tp = format_dec ((insn & 32) ? (insn & 31) | ~31L : insn & 31, tp, 1);
1322 break;
1323
1324 case 'P':
1325 {
1326 const struct cris_spec_reg *sregp
1327 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
1328
1329 if (sregp->name == NULL)
1330 /* Should have been caught as a non-match eariler. */
1331 *tp++ = '?';
1332 else
1333 {
1334 if (with_reg_prefix)
1335 *tp++ = REGISTER_PREFIX_CHAR;
1336 strcpy (tp, sregp->name);
1337 tp += strlen (tp);
1338 }
1339 }
1340 break;
1341
1342 default:
1343 strcpy (tp, "???");
1344 tp += 3;
1345 }
1346 }
1347
1348 *tp = 0;
1349
1350 if (prefix_opcodep)
1351 (*info->fprintf_func) (info->stream, " (OOPS unused prefix \"%s: %s\")",
1352 prefix_opcodep->name, prefix_opcodep->args);
1353
1354 (*info->fprintf_func) (info->stream, "%s", temp);
1355
1356 /* Get info for matching case-tables, if we don't have any active.
1357 We assume that the last constant seen is used; either in the insn
1358 itself or in a "move.d const,rN, sub.d rN,rM"-like sequence. */
1359 if (TRACE_CASE && case_offset_counter == 0)
1360 {
1361 if (strncmp (opcodep->name, "sub", 3) == 0)
1362 case_offset = last_immediate;
1363
1364 /* It could also be an "add", if there are negative case-values. */
1365 else if (strncmp (opcodep->name, "add", 3) == 0)
1366 /* The first case is the negated operand to the add. */
1367 case_offset = -last_immediate;
1368
1369 /* A bound insn will tell us the number of cases. */
1370 else if (strncmp (opcodep->name, "bound", 5) == 0)
1371 no_of_case_offsets = last_immediate + 1;
1372
1373 /* A jump or jsr or branch breaks the chain of insns for a
1374 case-table, so assume default first-case again. */
1375 else if (info->insn_type == dis_jsr
1376 || info->insn_type == dis_branch
1377 || info->insn_type == dis_condbranch)
1378 case_offset = 0;
1379 }
1380 }
1381
1382
1383 /* Print the CRIS instruction at address memaddr on stream. Returns
1384 length of the instruction, in bytes. Prefix register names with `$' if
1385 WITH_REG_PREFIX. */
1386
1387 static int
1388 print_insn_cris_generic (bfd_vma memaddr,
1389 disassemble_info *info,
1390 bfd_boolean with_reg_prefix)
1391 {
1392 int nbytes;
1393 unsigned int insn;
1394 const struct cris_opcode *matchedp;
1395 int advance = 0;
1396 struct cris_disasm_data *disdata
1397 = (struct cris_disasm_data *) info->private_data;
1398
1399 /* No instruction will be disassembled as longer than this number of
1400 bytes; stacked prefixes will not be expanded. */
1401 unsigned char buffer[MAX_BYTES_PER_CRIS_INSN];
1402 unsigned char *bufp;
1403 int status = 0;
1404 bfd_vma addr;
1405
1406 /* There will be an "out of range" error after the last instruction.
1407 Reading pairs of bytes in decreasing number, we hope that we will get
1408 at least the amount that we will consume.
1409
1410 If we can't get any data, or we do not get enough data, we print
1411 the error message. */
1412
1413 for (nbytes = MAX_BYTES_PER_CRIS_INSN; nbytes > 0; nbytes -= 2)
1414 {
1415 status = (*info->read_memory_func) (memaddr, buffer, nbytes, info);
1416 if (status == 0)
1417 break;
1418 }
1419
1420 /* If we did not get all we asked for, then clear the rest.
1421 Hopefully this makes a reproducible result in case of errors. */
1422 if (nbytes != MAX_BYTES_PER_CRIS_INSN)
1423 memset (buffer + nbytes, 0, MAX_BYTES_PER_CRIS_INSN - nbytes);
1424
1425 addr = memaddr;
1426 bufp = buffer;
1427
1428 /* Set some defaults for the insn info. */
1429 info->insn_info_valid = 1;
1430 info->branch_delay_insns = 0;
1431 info->data_size = 0;
1432 info->insn_type = dis_nonbranch;
1433 info->flags = 0;
1434 info->target = 0;
1435 info->target2 = 0;
1436
1437 /* If we got any data, disassemble it. */
1438 if (nbytes != 0)
1439 {
1440 matchedp = NULL;
1441
1442 insn = bufp[0] + bufp[1] * 256;
1443
1444 /* If we're in a case-table, don't disassemble the offsets. */
1445 if (TRACE_CASE && case_offset_counter != 0)
1446 {
1447 info->insn_type = dis_noninsn;
1448 advance += 2;
1449
1450 /* If to print data as offsets, then shortcut here. */
1451 (*info->fprintf_func) (info->stream, "case %d%s: -> ",
1452 case_offset + no_of_case_offsets
1453 - case_offset_counter,
1454 case_offset_counter == 1 ? "/default" :
1455 "");
1456
1457 (*info->print_address_func) ((bfd_vma)
1458 ((short) (insn)
1459 + (long) (addr
1460 - (no_of_case_offsets
1461 - case_offset_counter)
1462 * 2)), info);
1463 case_offset_counter--;
1464
1465 /* The default case start (without a "sub" or "add") must be
1466 zero. */
1467 if (case_offset_counter == 0)
1468 case_offset = 0;
1469 }
1470 else if (insn == 0)
1471 {
1472 /* We're often called to disassemble zeroes. While this is a
1473 valid "bcc .+2" insn, it is also useless enough and enough
1474 of a nuiscance that we will just output "bcc .+2" for it
1475 and signal it as a noninsn. */
1476 (*info->fprintf_func) (info->stream,
1477 disdata->distype == cris_dis_v32
1478 ? "bcc ." : "bcc .+2");
1479 info->insn_type = dis_noninsn;
1480 advance += 2;
1481 }
1482 else
1483 {
1484 const struct cris_opcode *prefix_opcodep = NULL;
1485 unsigned char *prefix_buffer = bufp;
1486 unsigned int prefix_insn = insn;
1487 int prefix_size = 0;
1488
1489 matchedp = get_opcode_entry (insn, NO_CRIS_PREFIX, disdata);
1490
1491 /* Check if we're supposed to write out prefixes as address
1492 modes and if this was a prefix. */
1493 if (matchedp != NULL && PARSE_PREFIX && matchedp->args[0] == 'p')
1494 {
1495 /* If it's a prefix, put it into the prefix vars and get the
1496 main insn. */
1497 prefix_size = bytes_to_skip (prefix_insn, matchedp,
1498 disdata->distype);
1499 prefix_opcodep = matchedp;
1500
1501 insn = bufp[prefix_size] + bufp[prefix_size + 1] * 256;
1502 matchedp = get_opcode_entry (insn, prefix_insn, disdata);
1503
1504 if (matchedp != NULL)
1505 {
1506 addr += prefix_size;
1507 bufp += prefix_size;
1508 advance += prefix_size;
1509 }
1510 else
1511 {
1512 /* The "main" insn wasn't valid, at least not when
1513 prefixed. Put back things enough to output the
1514 prefix insn only, as a normal insn. */
1515 matchedp = prefix_opcodep;
1516 insn = prefix_insn;
1517 prefix_opcodep = NULL;
1518 }
1519 }
1520
1521 if (matchedp == NULL)
1522 {
1523 (*info->fprintf_func) (info->stream, "??0x%lx", insn);
1524 advance += 2;
1525
1526 info->insn_type = dis_noninsn;
1527 }
1528 else
1529 {
1530 advance += bytes_to_skip (insn, matchedp, disdata->distype);
1531
1532 /* The info_type and assorted fields will be set according
1533 to the operands. */
1534 print_with_operands (matchedp, insn, bufp, addr, info,
1535 prefix_opcodep, prefix_insn,
1536 prefix_buffer, with_reg_prefix);
1537 }
1538 }
1539 }
1540 else
1541 info->insn_type = dis_noninsn;
1542
1543 /* If we read less than MAX_BYTES_PER_CRIS_INSN, i.e. we got an error
1544 status when reading that much, and the insn decoding indicated a
1545 length exceeding what we read, there is an error. */
1546 if (status != 0 && (nbytes == 0 || advance > nbytes))
1547 {
1548 (*info->memory_error_func) (status, memaddr, info);
1549 return -1;
1550 }
1551
1552 /* Max supported insn size with one folded prefix insn. */
1553 info->bytes_per_line = MAX_BYTES_PER_CRIS_INSN;
1554
1555 /* I would like to set this to a fixed value larger than the actual
1556 number of bytes to print in order to avoid spaces between bytes,
1557 but objdump.c (2.9.1) does not like that, so we print 16-bit
1558 chunks, which is the next choice. */
1559 info->bytes_per_chunk = 2;
1560
1561 /* Printing bytes in order of increasing addresses makes sense,
1562 especially on a little-endian target.
1563 This is completely the opposite of what you think; setting this to
1564 BFD_ENDIAN_LITTLE will print bytes in order N..0 rather than the 0..N
1565 we want. */
1566 info->display_endian = BFD_ENDIAN_BIG;
1567
1568 return advance;
1569 }
1570
1571 /* Disassemble, prefixing register names with `$'. CRIS v0..v10. */
1572
1573 static int
1574 print_insn_cris_with_register_prefix (bfd_vma vma,
1575 disassemble_info *info)
1576 {
1577 if (info->private_data == NULL
1578 && !cris_parse_disassembler_options (info, cris_dis_v0_v10))
1579 return -1;
1580 return print_insn_cris_generic (vma, info, TRUE);
1581 }
1582
1583 /* Disassemble, prefixing register names with `$'. CRIS v32. */
1584
1585 static int
1586 print_insn_crisv32_with_register_prefix (bfd_vma vma,
1587 disassemble_info *info)
1588 {
1589 if (info->private_data == NULL
1590 && !cris_parse_disassembler_options (info, cris_dis_v32))
1591 return -1;
1592 return print_insn_cris_generic (vma, info, TRUE);
1593 }
1594
1595 /* Disassemble, prefixing register names with `$'.
1596 Common v10 and v32 subset. */
1597
1598 static int
1599 print_insn_crisv10_v32_with_register_prefix (bfd_vma vma,
1600 disassemble_info *info)
1601 {
1602 if (info->private_data == NULL
1603 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32))
1604 return -1;
1605 return print_insn_cris_generic (vma, info, TRUE);
1606 }
1607
1608 /* Disassemble, no prefixes on register names. CRIS v0..v10. */
1609
1610 static int
1611 print_insn_cris_without_register_prefix (bfd_vma vma,
1612 disassemble_info *info)
1613 {
1614 if (info->private_data == NULL
1615 && !cris_parse_disassembler_options (info, cris_dis_v0_v10))
1616 return -1;
1617 return print_insn_cris_generic (vma, info, FALSE);
1618 }
1619
1620 /* Disassemble, no prefixes on register names. CRIS v32. */
1621
1622 static int
1623 print_insn_crisv32_without_register_prefix (bfd_vma vma,
1624 disassemble_info *info)
1625 {
1626 if (info->private_data == NULL
1627 && !cris_parse_disassembler_options (info, cris_dis_v32))
1628 return -1;
1629 return print_insn_cris_generic (vma, info, FALSE);
1630 }
1631
1632 /* Disassemble, no prefixes on register names.
1633 Common v10 and v32 subset. */
1634
1635 static int
1636 print_insn_crisv10_v32_without_register_prefix (bfd_vma vma,
1637 disassemble_info *info)
1638 {
1639 if (info->private_data == NULL
1640 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32))
1641 return -1;
1642 return print_insn_cris_generic (vma, info, FALSE);
1643 }
1644
1645 /* Return a disassembler-function that prints registers with a `$' prefix,
1646 or one that prints registers without a prefix.
1647 FIXME: We should improve the solution to avoid the multitude of
1648 functions seen above. */
1649
1650 disassembler_ftype
1651 cris_get_disassembler (bfd *abfd)
1652 {
1653 /* If there's no bfd in sight, we return what is valid as input in all
1654 contexts if fed back to the assembler: disassembly *with* register
1655 prefix. Unfortunately this will be totally wrong for v32. */
1656 if (abfd == NULL)
1657 return print_insn_cris_with_register_prefix;
1658
1659 if (bfd_get_symbol_leading_char (abfd) == 0)
1660 {
1661 if (bfd_get_mach (abfd) == bfd_mach_cris_v32)
1662 return print_insn_crisv32_with_register_prefix;
1663 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32)
1664 return print_insn_crisv10_v32_with_register_prefix;
1665
1666 /* We default to v10. This may be specifically specified in the
1667 bfd mach, but is also the default setting. */
1668 return print_insn_cris_with_register_prefix;
1669 }
1670
1671 if (bfd_get_mach (abfd) == bfd_mach_cris_v32)
1672 return print_insn_crisv32_without_register_prefix;
1673 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32)
1674 return print_insn_crisv10_v32_without_register_prefix;
1675 return print_insn_cris_without_register_prefix;
1676 }
1677
1678 /* Local variables:
1679 eval: (c-set-style "gnu")
1680 indent-tabs-mode: t
1681 End: */
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