Generally, handle CRISv32.
[deliverable/binutils-gdb.git] / opcodes / cris-dis.c
1 /* Disassembler code for CRIS.
2 Copyright 2000, 2001, 2002 Free Software Foundation, Inc.
3 Contributed by Axis Communications AB, Lund, Sweden.
4 Written by Hans-Peter Nilsson.
5
6 This file is part of the GNU binutils and GDB, the GNU debugger.
7
8 This program is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 This program is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21
22 #include "dis-asm.h"
23 #include "sysdep.h"
24 #include "opcode/cris.h"
25 #include "libiberty.h"
26 \f
27 /* No instruction will be disassembled longer than this. In theory, and
28 in silicon, address prefixes can be cascaded. In practice, cascading
29 is not used by GCC, and not supported by the assembler. */
30 #ifndef MAX_BYTES_PER_CRIS_INSN
31 #define MAX_BYTES_PER_CRIS_INSN 8
32 #endif
33
34 /* Whether or not to decode prefixes, folding it into the following
35 instruction. FIXME: Make this optional later. */
36 #ifndef PARSE_PREFIX
37 #define PARSE_PREFIX 1
38 #endif
39
40 /* Sometimes we prefix all registers with this character. */
41 #define REGISTER_PREFIX_CHAR '$'
42
43 /* Whether or not to trace the following sequence:
44 sub* X,r%d
45 bound* Y,r%d
46 adds.w [pc+r%d.w],pc
47
48 This is the assembly form of a switch-statement in C.
49 The "sub is optional. If there is none, then X will be zero.
50 X is the value of the first case,
51 Y is the number of cases (including default).
52
53 This results in case offsets printed on the form:
54 case N: -> case_address
55 where N is an estimation on the corresponding 'case' operand in C,
56 and case_address is where execution of that case continues after the
57 sequence presented above.
58
59 The old style of output was to print the offsets as instructions,
60 which made it hard to follow "case"-constructs in the disassembly,
61 and caused a lot of annoying warnings about undefined instructions.
62
63 FIXME: Make this optional later. */
64 #ifndef TRACE_CASE
65 #define TRACE_CASE (disdata->trace_case)
66 #endif
67
68 enum cris_disass_family
69 { cris_dis_v0_v10, cris_dis_common_v10_v32, cris_dis_v32 };
70
71 /* Stored in the disasm_info->private_data member. */
72 struct cris_disasm_data
73 {
74 /* Whether to print something less confusing if we find something
75 matching a switch-construct. */
76 bfd_boolean trace_case;
77
78 /* Whether this code is flagged as crisv32. FIXME: Should be an enum
79 that includes "compatible". */
80 enum cris_disass_family distype;
81 };
82
83 /* Value of first element in switch. */
84 static long case_offset = 0;
85
86 /* How many more case-offsets to print. */
87 static long case_offset_counter = 0;
88
89 /* Number of case offsets. */
90 static long no_of_case_offsets = 0;
91
92 /* Candidate for next case_offset. */
93 static long last_immediate = 0;
94
95 static int number_of_bits
96 PARAMS ((unsigned int));
97 static char *format_hex
98 PARAMS ((unsigned long, char *, struct cris_disasm_data *));
99 static char *format_dec
100 PARAMS ((long, char *, int));
101 static char *format_reg
102 PARAMS ((struct cris_disasm_data *, int, char *, bfd_boolean));
103 static char *format_sup_reg
104 PARAMS ((unsigned int, char *, bfd_boolean));
105 static int cris_constraint
106 PARAMS ((const char *, unsigned int, unsigned int,
107 struct cris_disasm_data *));
108 static unsigned bytes_to_skip
109 PARAMS ((unsigned int, const struct cris_opcode *,
110 enum cris_disass_family));
111 static char *print_flags
112 PARAMS ((struct cris_disasm_data *, unsigned int, char *));
113 static void print_with_operands
114 PARAMS ((const struct cris_opcode *, unsigned int, unsigned char *,
115 bfd_vma, disassemble_info *, const struct cris_opcode *,
116 unsigned int, unsigned char *, bfd_boolean));
117 static const struct cris_spec_reg *spec_reg_info
118 PARAMS ((unsigned int, enum cris_disass_family));
119 static int print_insn_cris_generic
120 PARAMS ((bfd_vma, disassemble_info *, bfd_boolean));
121 static int print_insn_cris_with_register_prefix
122 PARAMS ((bfd_vma, disassemble_info *));
123 static int print_insn_cris_without_register_prefix
124 PARAMS ((bfd_vma, disassemble_info *));
125 static int print_insn_crisv32_with_register_prefix
126 PARAMS ((bfd_vma, disassemble_info *));
127 static int print_insn_crisv32_without_register_prefix
128 PARAMS ((bfd_vma, disassemble_info *));
129 static int print_insn_crisv10_v32_with_register_prefix
130 PARAMS ((bfd_vma, disassemble_info *));
131 static int print_insn_crisv10_v32_without_register_prefix
132 PARAMS ((bfd_vma, disassemble_info *));
133 static bfd_boolean cris_parse_disassembler_options
134 PARAMS ((disassemble_info *, enum cris_disass_family));
135 static const struct cris_opcode *get_opcode_entry
136 PARAMS ((unsigned int, unsigned int, struct cris_disasm_data *));
137
138 /* Parse disassembler options and store state in info. FIXME: For the
139 time being, we abuse static variables. */
140
141 static bfd_boolean
142 cris_parse_disassembler_options (info, distype)
143 disassemble_info *info;
144 enum cris_disass_family distype;
145 {
146 struct cris_disasm_data *disdata;
147
148 info->private_data = calloc (1, sizeof (struct cris_disasm_data));
149 disdata = (struct cris_disasm_data *) info->private_data;
150 if (disdata == NULL)
151 return FALSE;
152
153 /* Default true. */
154 disdata->trace_case
155 = (info->disassembler_options == NULL
156 || (strcmp (info->disassembler_options, "nocase") != 0));
157
158 disdata->distype = distype;
159 return TRUE;
160 }
161
162
163 static const struct cris_spec_reg *
164 spec_reg_info (sreg, distype)
165 unsigned int sreg;
166 enum cris_disass_family distype;
167 {
168 int i;
169 for (i = 0; cris_spec_regs[i].name != NULL; i++)
170 {
171 if (cris_spec_regs[i].number == sreg)
172 {
173 if (distype == cris_dis_v32)
174 switch (cris_spec_regs[i].applicable_version)
175 {
176 case cris_ver_warning:
177 case cris_ver_version_all:
178 case cris_ver_v3p:
179 case cris_ver_v8p:
180 case cris_ver_v10p:
181 case cris_ver_v32p:
182 /* No ambiguous sizes or register names with CRISv32. */
183 if (cris_spec_regs[i].warning == NULL)
184 return &cris_spec_regs[i];
185 default:
186 ;
187 }
188 else if (cris_spec_regs[i].applicable_version != cris_ver_v32p)
189 return &cris_spec_regs[i];
190 }
191 }
192
193 return NULL;
194 }
195
196 /* Return the number of bits in the argument. */
197
198 static int
199 number_of_bits (val)
200 unsigned int val;
201 {
202 int bits;
203
204 for (bits = 0; val != 0; val &= val - 1)
205 bits++;
206
207 return bits;
208 }
209
210 /* Get an entry in the opcode-table. */
211
212 static const struct cris_opcode *
213 get_opcode_entry (insn, prefix_insn, disdata)
214 unsigned int insn;
215 unsigned int prefix_insn;
216 struct cris_disasm_data *disdata;
217 {
218 /* For non-prefixed insns, we keep a table of pointers, indexed by the
219 insn code. Each entry is initialized when found to be NULL. */
220 static const struct cris_opcode **opc_table = NULL;
221
222 const struct cris_opcode *max_matchedp = NULL;
223 const struct cris_opcode **prefix_opc_table = NULL;
224
225 /* We hold a table for each prefix that need to be handled differently. */
226 static const struct cris_opcode **dip_prefixes = NULL;
227 static const struct cris_opcode **bdapq_m1_prefixes = NULL;
228 static const struct cris_opcode **bdapq_m2_prefixes = NULL;
229 static const struct cris_opcode **bdapq_m4_prefixes = NULL;
230 static const struct cris_opcode **rest_prefixes = NULL;
231
232 /* Allocate and clear the opcode-table. */
233 if (opc_table == NULL)
234 {
235 opc_table = malloc (65536 * sizeof (opc_table[0]));
236 if (opc_table == NULL)
237 return NULL;
238
239 memset (opc_table, 0, 65536 * sizeof (const struct cris_opcode *));
240
241 dip_prefixes
242 = malloc (65536 * sizeof (const struct cris_opcode **));
243 if (dip_prefixes == NULL)
244 return NULL;
245
246 memset (dip_prefixes, 0, 65536 * sizeof (dip_prefixes[0]));
247
248 bdapq_m1_prefixes
249 = malloc (65536 * sizeof (const struct cris_opcode **));
250 if (bdapq_m1_prefixes == NULL)
251 return NULL;
252
253 memset (bdapq_m1_prefixes, 0, 65536 * sizeof (bdapq_m1_prefixes[0]));
254
255 bdapq_m2_prefixes
256 = malloc (65536 * sizeof (const struct cris_opcode **));
257 if (bdapq_m2_prefixes == NULL)
258 return NULL;
259
260 memset (bdapq_m2_prefixes, 0, 65536 * sizeof (bdapq_m2_prefixes[0]));
261
262 bdapq_m4_prefixes
263 = malloc (65536 * sizeof (const struct cris_opcode **));
264 if (bdapq_m4_prefixes == NULL)
265 return NULL;
266
267 memset (bdapq_m4_prefixes, 0, 65536 * sizeof (bdapq_m4_prefixes[0]));
268
269 rest_prefixes
270 = malloc (65536 * sizeof (const struct cris_opcode **));
271 if (rest_prefixes == NULL)
272 return NULL;
273
274 memset (rest_prefixes, 0, 65536 * sizeof (rest_prefixes[0]));
275 }
276
277 /* Get the right table if this is a prefix.
278 This code is connected to cris_constraints in that it knows what
279 prefixes play a role in recognition of patterns; the necessary
280 state is reflected by which table is used. If constraints
281 involving match or non-match of prefix insns are changed, then this
282 probably needs changing too. */
283 if (prefix_insn != NO_CRIS_PREFIX)
284 {
285 const struct cris_opcode *popcodep
286 = (opc_table[prefix_insn] != NULL
287 ? opc_table[prefix_insn]
288 : get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata));
289
290 if (popcodep == NULL)
291 return NULL;
292
293 if (popcodep->match == BDAP_QUICK_OPCODE)
294 {
295 /* Since some offsets are recognized with "push" macros, we
296 have to have different tables for them. */
297 int offset = (prefix_insn & 255);
298
299 if (offset > 127)
300 offset -= 256;
301
302 switch (offset)
303 {
304 case -4:
305 prefix_opc_table = bdapq_m4_prefixes;
306 break;
307
308 case -2:
309 prefix_opc_table = bdapq_m2_prefixes;
310 break;
311
312 case -1:
313 prefix_opc_table = bdapq_m1_prefixes;
314 break;
315
316 default:
317 prefix_opc_table = rest_prefixes;
318 break;
319 }
320 }
321 else if (popcodep->match == DIP_OPCODE)
322 /* We don't allow postincrement when the prefix is DIP, so use a
323 different table for DIP. */
324 prefix_opc_table = dip_prefixes;
325 else
326 prefix_opc_table = rest_prefixes;
327 }
328
329 if (prefix_insn != NO_CRIS_PREFIX
330 && prefix_opc_table[insn] != NULL)
331 max_matchedp = prefix_opc_table[insn];
332 else if (prefix_insn == NO_CRIS_PREFIX && opc_table[insn] != NULL)
333 max_matchedp = opc_table[insn];
334 else
335 {
336 const struct cris_opcode *opcodep;
337 int max_level_of_match = -1;
338
339 for (opcodep = cris_opcodes;
340 opcodep->name != NULL;
341 opcodep++)
342 {
343 int level_of_match;
344
345 if (disdata->distype == cris_dis_v32)
346 {
347 switch (opcodep->applicable_version)
348 {
349 case cris_ver_version_all:
350 break;
351
352 case cris_ver_v0_3:
353 case cris_ver_v0_10:
354 case cris_ver_v3_10:
355 case cris_ver_sim_v0_10:
356 case cris_ver_v8_10:
357 case cris_ver_v10:
358 case cris_ver_warning:
359 continue;
360
361 case cris_ver_v3p:
362 case cris_ver_v8p:
363 case cris_ver_v10p:
364 case cris_ver_v32p:
365 break;
366
367 case cris_ver_v8:
368 abort ();
369 default:
370 abort ();
371 }
372 }
373 else
374 {
375 switch (opcodep->applicable_version)
376 {
377 case cris_ver_version_all:
378 case cris_ver_v0_3:
379 case cris_ver_v3p:
380 case cris_ver_v0_10:
381 case cris_ver_v8p:
382 case cris_ver_v8_10:
383 case cris_ver_v10:
384 case cris_ver_sim_v0_10:
385 case cris_ver_v10p:
386 case cris_ver_warning:
387 break;
388
389 case cris_ver_v32p:
390 continue;
391
392 case cris_ver_v8:
393 abort ();
394 default:
395 abort ();
396 }
397 }
398
399 /* We give a double lead for bits matching the template in
400 cris_opcodes. Not even, because then "move p8,r10" would
401 be given 2 bits lead over "clear.d r10". When there's a
402 tie, the first entry in the table wins. This is
403 deliberate, to avoid a more complicated recognition
404 formula. */
405 if ((opcodep->match & insn) == opcodep->match
406 && (opcodep->lose & insn) == 0
407 && ((level_of_match
408 = cris_constraint (opcodep->args,
409 insn,
410 prefix_insn,
411 disdata))
412 >= 0)
413 && ((level_of_match
414 += 2 * number_of_bits (opcodep->match
415 | opcodep->lose))
416 > max_level_of_match))
417 {
418 max_matchedp = opcodep;
419 max_level_of_match = level_of_match;
420
421 /* If there was a full match, never mind looking
422 further. */
423 if (level_of_match >= 2 * 16)
424 break;
425 }
426 }
427 /* Fill in the new entry.
428
429 If there are changes to the opcode-table involving prefixes, and
430 disassembly then does not work correctly, try removing the
431 else-clause below that fills in the prefix-table. If that
432 helps, you need to change the prefix_opc_table setting above, or
433 something related. */
434 if (prefix_insn == NO_CRIS_PREFIX)
435 opc_table[insn] = max_matchedp;
436 else
437 prefix_opc_table[insn] = max_matchedp;
438 }
439
440 return max_matchedp;
441 }
442
443 /* Format number as hex with a leading "0x" into outbuffer. */
444
445 static char *
446 format_hex (number, outbuffer, disdata)
447 unsigned long number;
448 char *outbuffer;
449 struct cris_disasm_data *disdata;
450 {
451 /* Obfuscate to avoid warning on 32-bit host, but properly truncate
452 negative numbers on >32-bit hosts. */
453 if (sizeof (number) > 4)
454 number &= (1 << (sizeof (number) > 4 ? 32 : 1)) - 1;
455
456 sprintf (outbuffer, "0x%lx", number);
457
458 /* Save this value for the "case" support. */
459 if (TRACE_CASE)
460 last_immediate = number;
461
462 return outbuffer + strlen (outbuffer);
463 }
464
465 /* Format number as decimal into outbuffer. Parameter signedp says
466 whether the number should be formatted as signed (!= 0) or
467 unsigned (== 0). */
468
469 static char *
470 format_dec (number, outbuffer, signedp)
471 long number;
472 char *outbuffer;
473 int signedp;
474 {
475 last_immediate = number;
476 sprintf (outbuffer, signedp ? "%ld" : "%lu", number);
477
478 return outbuffer + strlen (outbuffer);
479 }
480
481 /* Format the name of the general register regno into outbuffer. */
482
483 static char *
484 format_reg (disdata, regno, outbuffer_start, with_reg_prefix)
485 struct cris_disasm_data *disdata;
486 int regno;
487 char *outbuffer_start;
488 bfd_boolean with_reg_prefix;
489 {
490 char *outbuffer = outbuffer_start;
491
492 if (with_reg_prefix)
493 *outbuffer++ = REGISTER_PREFIX_CHAR;
494
495 switch (regno)
496 {
497 case 15:
498 /* For v32, there is no context in which we output PC. */
499 if (disdata->distype == cris_dis_v32)
500 strcpy (outbuffer, "acr");
501 else
502 strcpy (outbuffer, "pc");
503 break;
504
505 case 14:
506 strcpy (outbuffer, "sp");
507 break;
508
509 default:
510 sprintf (outbuffer, "r%d", regno);
511 break;
512 }
513
514 return outbuffer_start + strlen (outbuffer_start);
515 }
516
517 /* Format the name of a support register into outbuffer. */
518
519 static char *
520 format_sup_reg (regno, outbuffer_start, with_reg_prefix)
521 unsigned int regno;
522 char *outbuffer_start;
523 bfd_boolean with_reg_prefix;
524 {
525 char *outbuffer = outbuffer_start;
526 int i;
527
528 if (with_reg_prefix)
529 *outbuffer++ = REGISTER_PREFIX_CHAR;
530
531 for (i = 0; cris_support_regs[i].name != NULL; i++)
532 if (cris_support_regs[i].number == regno)
533 {
534 sprintf (outbuffer, "%s", cris_support_regs[i].name);
535 return outbuffer_start + strlen (outbuffer_start);
536 }
537
538 /* There's supposed to be register names covering all numbers, though
539 some may be generic names. */
540 sprintf (outbuffer, "format_sup_reg-BUG");
541 return outbuffer_start + strlen (outbuffer_start);
542 }
543
544 /* Return -1 if the constraints of a bitwise-matched instruction say
545 that there is no match. Otherwise return a nonnegative number
546 indicating the confidence in the match (higher is better). */
547
548 static int
549 cris_constraint (cs, insn, prefix_insn, disdata)
550 const char *cs;
551 unsigned int insn;
552 unsigned int prefix_insn;
553 struct cris_disasm_data *disdata;
554 {
555 int retval = 0;
556 int tmp;
557 int prefix_ok = 0;
558
559 const char *s;
560 for (s = cs; *s; s++)
561 switch (*s)
562 {
563 case '!':
564 /* Do not recognize "pop" if there's a prefix and then only for
565 v0..v10. */
566 if (prefix_insn != NO_CRIS_PREFIX
567 || disdata->distype != cris_dis_v0_v10)
568 return -1;
569 break;
570
571 case 'U':
572 /* Not recognized at disassembly. */
573 return -1;
574
575 case 'M':
576 /* Size modifier for "clear", i.e. special register 0, 4 or 8.
577 Check that it is one of them. Only special register 12 could
578 be mismatched, but checking for matches is more logical than
579 checking for mismatches when there are only a few cases. */
580 tmp = ((insn >> 12) & 0xf);
581 if (tmp != 0 && tmp != 4 && tmp != 8)
582 return -1;
583 break;
584
585 case 'm':
586 if ((insn & 0x30) == 0x30)
587 return -1;
588 break;
589
590 case 'S':
591 /* A prefix operand without side-effect. */
592 if (prefix_insn != NO_CRIS_PREFIX && (insn & 0x400) == 0)
593 {
594 prefix_ok = 1;
595 break;
596 }
597 else
598 return -1;
599
600 case 's':
601 case 'y':
602 case 'Y':
603 /* If this is a prefixed insn with postincrement (side-effect),
604 the prefix must not be DIP. */
605 if (prefix_insn != NO_CRIS_PREFIX)
606 {
607 if (insn & 0x400)
608 {
609 const struct cris_opcode *prefix_opcodep
610 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata);
611
612 if (prefix_opcodep->match == DIP_OPCODE)
613 return -1;
614 }
615
616 prefix_ok = 1;
617 }
618 break;
619
620 case 'B':
621 /* If we don't fall through, then the prefix is ok. */
622 prefix_ok = 1;
623
624 /* A "push" prefix. Check for valid "push" size.
625 In case of special register, it may be != 4. */
626 if (prefix_insn != NO_CRIS_PREFIX)
627 {
628 /* Match the prefix insn to BDAPQ. */
629 const struct cris_opcode *prefix_opcodep
630 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata);
631
632 if (prefix_opcodep->match == BDAP_QUICK_OPCODE)
633 {
634 int pushsize = (prefix_insn & 255);
635
636 if (pushsize > 127)
637 pushsize -= 256;
638
639 if (s[1] == 'P')
640 {
641 unsigned int spec_reg = (insn >> 12) & 15;
642 const struct cris_spec_reg *sregp
643 = spec_reg_info (spec_reg, disdata->distype);
644
645 /* For a special-register, the "prefix size" must
646 match the size of the register. */
647 if (sregp && sregp->reg_size == (unsigned int) -pushsize)
648 break;
649 }
650 else if (s[1] == 'R')
651 {
652 if ((insn & 0x30) == 0x20 && pushsize == -4)
653 break;
654 }
655 /* FIXME: Should abort here; next constraint letter
656 *must* be 'P' or 'R'. */
657 }
658 }
659 return -1;
660
661 case 'D':
662 retval = (((insn >> 12) & 15) == (insn & 15));
663 if (!retval)
664 return -1;
665 else
666 retval += 4;
667 break;
668
669 case 'P':
670 {
671 const struct cris_spec_reg *sregp
672 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
673
674 /* Since we match four bits, we will give a value of 4-1 = 3
675 in a match. If there is a corresponding exact match of a
676 special register in another pattern, it will get a value of
677 4, which will be higher. This should be correct in that an
678 exact pattern would match better than a general pattern.
679
680 Note that there is a reason for not returning zero; the
681 pattern for "clear" is partly matched in the bit-pattern
682 (the two lower bits must be zero), while the bit-pattern
683 for a move from a special register is matched in the
684 register constraint. */
685
686 if (sregp != NULL)
687 {
688 retval += 3;
689 break;
690 }
691 else
692 return -1;
693 }
694 }
695
696 if (prefix_insn != NO_CRIS_PREFIX && ! prefix_ok)
697 return -1;
698
699 return retval;
700 }
701
702 /* Return the length of an instruction. */
703
704 static unsigned
705 bytes_to_skip (insn, matchedp, distype)
706 unsigned int insn;
707 const struct cris_opcode *matchedp;
708 enum cris_disass_family distype;
709 {
710 /* Each insn is a word plus "immediate" operands. */
711 unsigned to_skip = 2;
712 const char *template = matchedp->args;
713 const char *s;
714
715 for (s = template; *s; s++)
716 if ((*s == 's' || *s == 'N' || *s == 'Y')
717 && (insn & 0x400) && (insn & 15) == 15)
718 {
719 /* Immediate via [pc+], so we have to check the size of the
720 operand. */
721 int mode_size = 1 << ((insn >> 4) & (*template == 'z' ? 1 : 3));
722
723 if (matchedp->imm_oprnd_size == SIZE_FIX_32)
724 to_skip += 4;
725 else if (matchedp->imm_oprnd_size == SIZE_SPEC_REG)
726 {
727 const struct cris_spec_reg *sregp
728 = spec_reg_info ((insn >> 12) & 15, distype);
729
730 /* FIXME: Improve error handling; should have been caught
731 earlier. */
732 if (sregp == NULL)
733 return 2;
734
735 /* PC is incremented by two, not one, for a byte. Except on
736 CRISv32, where constants are always DWORD-size for
737 special registers. */
738 to_skip +=
739 distype == cris_dis_v32 ? 4 : (sregp->reg_size + 1) & ~1;
740 }
741 else
742 to_skip += (mode_size + 1) & ~1;
743 }
744 else if (*s == 'n')
745 to_skip += 4;
746 else if (*s == 'b')
747 to_skip += 2;
748
749 return to_skip;
750 }
751
752 /* Print condition code flags. */
753
754 static char *
755 print_flags (disdata, insn, cp)
756 struct cris_disasm_data *disdata;
757 unsigned int insn;
758 char *cp;
759 {
760 /* Use the v8 (Etrax 100) flag definitions for disassembly.
761 The differences with v0 (Etrax 1..4) vs. Svinto are:
762 v0 'd' <=> v8 'm'
763 v0 'e' <=> v8 'b'.
764 FIXME: Emit v0..v3 flag names somehow. */
765 static const char v8_fnames[] = "cvznxibm";
766 static const char v32_fnames[] = "cvznxiup";
767 const char *fnames
768 = disdata->distype == cris_dis_v32 ? v32_fnames : v8_fnames;
769
770 unsigned char flagbits = (((insn >> 8) & 0xf0) | (insn & 15));
771 int i;
772
773 for (i = 0; i < 8; i++)
774 if (flagbits & (1 << i))
775 *cp++ = fnames[i];
776
777 return cp;
778 }
779
780 /* Print out an insn with its operands, and update the info->insn_type
781 fields. The prefix_opcodep and the rest hold a prefix insn that is
782 supposed to be output as an address mode. */
783
784 static void
785 print_with_operands (opcodep, insn, buffer, addr, info, prefix_opcodep,
786 prefix_insn, prefix_buffer, with_reg_prefix)
787 const struct cris_opcode *opcodep;
788 unsigned int insn;
789 unsigned char *buffer;
790 bfd_vma addr;
791 disassemble_info *info;
792
793 /* If a prefix insn was before this insn (and is supposed to be
794 output as an address), here is a description of it. */
795 const struct cris_opcode *prefix_opcodep;
796 unsigned int prefix_insn;
797 unsigned char *prefix_buffer;
798 bfd_boolean with_reg_prefix;
799 {
800 /* Get a buffer of somewhat reasonable size where we store
801 intermediate parts of the insn. */
802 char temp[sizeof (".d [$r13=$r12-2147483648],$r10") * 2];
803 char *tp = temp;
804 static const char mode_char[] = "bwd?";
805 const char *s;
806 const char *cs;
807 struct cris_disasm_data *disdata
808 = (struct cris_disasm_data *) info->private_data;
809
810 /* Print out the name first thing we do. */
811 (*info->fprintf_func) (info->stream, "%s", opcodep->name);
812
813 cs = opcodep->args;
814 s = cs;
815
816 /* Ignore any prefix indicator. */
817 if (*s == 'p')
818 s++;
819
820 if (*s == 'm' || *s == 'M' || *s == 'z')
821 {
822 *tp++ = '.';
823
824 /* Get the size-letter. */
825 *tp++ = *s == 'M'
826 ? (insn & 0x8000 ? 'd'
827 : insn & 0x4000 ? 'w' : 'b')
828 : mode_char[(insn >> 4) & (*s == 'z' ? 1 : 3)];
829
830 /* Ignore the size and the space character that follows. */
831 s += 2;
832 }
833
834 /* Add a space if this isn't a long-branch, because for those will add
835 the condition part of the name later. */
836 if (opcodep->match != (BRANCH_PC_LOW + BRANCH_INCR_HIGH * 256))
837 *tp++ = ' ';
838
839 /* Fill in the insn-type if deducible from the name (and there's no
840 better way). */
841 if (opcodep->name[0] == 'j')
842 {
843 if (strncmp (opcodep->name, "jsr", 3) == 0)
844 /* It's "jsr" or "jsrc". */
845 info->insn_type = dis_jsr;
846 else
847 /* Any other jump-type insn is considered a branch. */
848 info->insn_type = dis_branch;
849 }
850
851 /* We might know some more fields right now. */
852 info->branch_delay_insns = opcodep->delayed;
853
854 /* Handle operands. */
855 for (; *s; s++)
856 {
857 switch (*s)
858 {
859 case 'T':
860 tp = format_sup_reg ((insn >> 12) & 15, tp, with_reg_prefix);
861 break;
862
863 case 'A':
864 if (with_reg_prefix)
865 *tp++ = REGISTER_PREFIX_CHAR;
866 *tp++ = 'a';
867 *tp++ = 'c';
868 *tp++ = 'r';
869 break;
870
871 case '[':
872 case ']':
873 case ',':
874 *tp++ = *s;
875 break;
876
877 case '!':
878 /* Ignore at this point; used at earlier stages to avoid
879 recognition if there's a prefix at something that in other
880 ways looks like a "pop". */
881 break;
882
883 case 'd':
884 /* Ignore. This is an optional ".d " on the large one of
885 relaxable insns. */
886 break;
887
888 case 'B':
889 /* This was the prefix that made this a "push". We've already
890 handled it by recognizing it, so signal that the prefix is
891 handled by setting it to NULL. */
892 prefix_opcodep = NULL;
893 break;
894
895 case 'D':
896 case 'r':
897 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix);
898 break;
899
900 case 'R':
901 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix);
902 break;
903
904 case 'n':
905 {
906 /* Like N but pc-relative to the start of the insn. */
907 unsigned long number
908 = (buffer[2] + buffer[3] * 256 + buffer[4] * 65536
909 + buffer[5] * 0x1000000 + addr);
910
911 /* Finish off and output previous formatted bytes. */
912 *tp = 0;
913 if (temp[0])
914 (*info->fprintf_func) (info->stream, "%s", temp);
915 tp = temp;
916
917 (*info->print_address_func) ((bfd_vma) number, info);
918 }
919 break;
920
921 case 'u':
922 {
923 /* Like n but the offset is bits <3:0> in the instruction. */
924 unsigned long number = (buffer[0] & 0xf) * 2 + addr;
925
926 /* Finish off and output previous formatted bytes. */
927 *tp = 0;
928 if (temp[0])
929 (*info->fprintf_func) (info->stream, "%s", temp);
930 tp = temp;
931
932 (*info->print_address_func) ((bfd_vma) number, info);
933 }
934 break;
935
936 case 'N':
937 case 'y':
938 case 'Y':
939 case 'S':
940 case 's':
941 /* Any "normal" memory operand. */
942 if ((insn & 0x400) && (insn & 15) == 15)
943 {
944 /* We're looking at [pc+], i.e. we need to output an immediate
945 number, where the size can depend on different things. */
946 long number;
947 int signedp
948 = ((*cs == 'z' && (insn & 0x20))
949 || opcodep->match == BDAP_QUICK_OPCODE);
950 int nbytes;
951
952 if (opcodep->imm_oprnd_size == SIZE_FIX_32)
953 nbytes = 4;
954 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG)
955 {
956 const struct cris_spec_reg *sregp
957 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
958
959 /* A NULL return should have been as a non-match earlier,
960 so catch it as an internal error in the error-case
961 below. */
962 if (sregp == NULL)
963 /* Whatever non-valid size. */
964 nbytes = 42;
965 else
966 /* PC is always incremented by a multiple of two.
967 For CRISv32, immediates are always 4 bytes for
968 special registers. */
969 nbytes = disdata->distype == cris_dis_v32
970 ? 4 : (sregp->reg_size + 1) & ~1;
971 }
972 else
973 {
974 int mode_size = 1 << ((insn >> 4) & (*cs == 'z' ? 1 : 3));
975
976 if (mode_size == 1)
977 nbytes = 2;
978 else
979 nbytes = mode_size;
980 }
981
982 switch (nbytes)
983 {
984 case 1:
985 number = buffer[2];
986 if (signedp && number > 127)
987 number -= 256;
988 break;
989
990 case 2:
991 number = buffer[2] + buffer[3] * 256;
992 if (signedp && number > 32767)
993 number -= 65536;
994 break;
995
996 case 4:
997 number
998 = buffer[2] + buffer[3] * 256 + buffer[4] * 65536
999 + buffer[5] * 0x1000000;
1000 break;
1001
1002 default:
1003 strcpy (tp, "bug");
1004 tp += 3;
1005 number = 42;
1006 }
1007
1008 if ((*cs == 'z' && (insn & 0x20))
1009 || (opcodep->match == BDAP_QUICK_OPCODE
1010 && (nbytes <= 2 || buffer[1 + nbytes] == 0)))
1011 tp = format_dec (number, tp, signedp);
1012 else
1013 {
1014 unsigned int highbyte = (number >> 24) & 0xff;
1015
1016 /* Either output this as an address or as a number. If it's
1017 a dword with the same high-byte as the address of the
1018 insn, assume it's an address, and also if it's a non-zero
1019 non-0xff high-byte. If this is a jsr or a jump, then
1020 it's definitely an address. */
1021 if (nbytes == 4
1022 && (highbyte == ((addr >> 24) & 0xff)
1023 || (highbyte != 0 && highbyte != 0xff)
1024 || info->insn_type == dis_branch
1025 || info->insn_type == dis_jsr))
1026 {
1027 /* Finish off and output previous formatted bytes. */
1028 *tp = 0;
1029 tp = temp;
1030 if (temp[0])
1031 (*info->fprintf_func) (info->stream, "%s", temp);
1032
1033 (*info->print_address_func) ((bfd_vma) number, info);
1034
1035 info->target = number;
1036 }
1037 else
1038 tp = format_hex (number, tp, disdata);
1039 }
1040 }
1041 else
1042 {
1043 /* Not an immediate number. Then this is a (possibly
1044 prefixed) memory operand. */
1045 if (info->insn_type != dis_nonbranch)
1046 {
1047 int mode_size
1048 = 1 << ((insn >> 4)
1049 & (opcodep->args[0] == 'z' ? 1 : 3));
1050 int size;
1051 info->insn_type = dis_dref;
1052 info->flags |= CRIS_DIS_FLAG_MEMREF;
1053
1054 if (opcodep->imm_oprnd_size == SIZE_FIX_32)
1055 size = 4;
1056 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG)
1057 {
1058 const struct cris_spec_reg *sregp
1059 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
1060
1061 /* FIXME: Improve error handling; should have been caught
1062 earlier. */
1063 if (sregp == NULL)
1064 size = 4;
1065 else
1066 size = sregp->reg_size;
1067 }
1068 else
1069 size = mode_size;
1070
1071 info->data_size = size;
1072 }
1073
1074 *tp++ = '[';
1075
1076 if (prefix_opcodep
1077 /* We don't match dip with a postincremented field
1078 as a side-effect address mode. */
1079 && ((insn & 0x400) == 0
1080 || prefix_opcodep->match != DIP_OPCODE))
1081 {
1082 if (insn & 0x400)
1083 {
1084 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix);
1085 *tp++ = '=';
1086 }
1087
1088
1089 /* We mainly ignore the prefix format string when the
1090 address-mode syntax is output. */
1091 switch (prefix_opcodep->match)
1092 {
1093 case DIP_OPCODE:
1094 /* It's [r], [r+] or [pc+]. */
1095 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15)
1096 {
1097 /* It's [pc+]. This cannot possibly be anything
1098 but an address. */
1099 unsigned long number
1100 = prefix_buffer[2] + prefix_buffer[3] * 256
1101 + prefix_buffer[4] * 65536
1102 + prefix_buffer[5] * 0x1000000;
1103
1104 info->target = (bfd_vma) number;
1105
1106 /* Finish off and output previous formatted
1107 data. */
1108 *tp = 0;
1109 tp = temp;
1110 if (temp[0])
1111 (*info->fprintf_func) (info->stream, "%s", temp);
1112
1113 (*info->print_address_func) ((bfd_vma) number, info);
1114 }
1115 else
1116 {
1117 /* For a memref in an address, we use target2.
1118 In this case, target is zero. */
1119 info->flags
1120 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
1121 | CRIS_DIS_FLAG_MEM_TARGET2_MEM);
1122
1123 info->target2 = prefix_insn & 15;
1124
1125 *tp++ = '[';
1126 tp = format_reg (disdata, prefix_insn & 15, tp,
1127 with_reg_prefix);
1128 if (prefix_insn & 0x400)
1129 *tp++ = '+';
1130 *tp++ = ']';
1131 }
1132 break;
1133
1134 case BDAP_QUICK_OPCODE:
1135 {
1136 int number;
1137
1138 number = prefix_buffer[0];
1139 if (number > 127)
1140 number -= 256;
1141
1142 /* Output "reg+num" or, if num < 0, "reg-num". */
1143 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp,
1144 with_reg_prefix);
1145 if (number >= 0)
1146 *tp++ = '+';
1147 tp = format_dec (number, tp, 1);
1148
1149 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
1150 info->target = (prefix_insn >> 12) & 15;
1151 info->target2 = (bfd_vma) number;
1152 break;
1153 }
1154
1155 case BIAP_OPCODE:
1156 /* Output "r+R.m". */
1157 tp = format_reg (disdata, prefix_insn & 15, tp,
1158 with_reg_prefix);
1159 *tp++ = '+';
1160 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp,
1161 with_reg_prefix);
1162 *tp++ = '.';
1163 *tp++ = mode_char[(prefix_insn >> 4) & 3];
1164
1165 info->flags
1166 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
1167 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG
1168
1169 | ((prefix_insn & 0x8000)
1170 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT4
1171 : ((prefix_insn & 0x8000)
1172 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT2 : 0)));
1173
1174 /* Is it the casejump? It's a "adds.w [pc+r%d.w],pc". */
1175 if (insn == 0xf83f && (prefix_insn & ~0xf000) == 0x55f)
1176 /* Then start interpreting data as offsets. */
1177 case_offset_counter = no_of_case_offsets;
1178 break;
1179
1180 case BDAP_INDIR_OPCODE:
1181 /* Output "r+s.m", or, if "s" is [pc+], "r+s" or
1182 "r-s". */
1183 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp,
1184 with_reg_prefix);
1185
1186 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15)
1187 {
1188 long number;
1189 unsigned int nbytes;
1190
1191 /* It's a value. Get its size. */
1192 int mode_size = 1 << ((prefix_insn >> 4) & 3);
1193
1194 if (mode_size == 1)
1195 nbytes = 2;
1196 else
1197 nbytes = mode_size;
1198
1199 switch (nbytes)
1200 {
1201 case 1:
1202 number = prefix_buffer[2];
1203 if (number > 127)
1204 number -= 256;
1205 break;
1206
1207 case 2:
1208 number = prefix_buffer[2] + prefix_buffer[3] * 256;
1209 if (number > 32767)
1210 number -= 65536;
1211 break;
1212
1213 case 4:
1214 number
1215 = prefix_buffer[2] + prefix_buffer[3] * 256
1216 + prefix_buffer[4] * 65536
1217 + prefix_buffer[5] * 0x1000000;
1218 break;
1219
1220 default:
1221 strcpy (tp, "bug");
1222 tp += 3;
1223 number = 42;
1224 }
1225
1226 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
1227 info->target2 = (bfd_vma) number;
1228
1229 /* If the size is dword, then assume it's an
1230 address. */
1231 if (nbytes == 4)
1232 {
1233 /* Finish off and output previous formatted
1234 bytes. */
1235 *tp++ = '+';
1236 *tp = 0;
1237 tp = temp;
1238 (*info->fprintf_func) (info->stream, "%s", temp);
1239
1240 (*info->print_address_func) ((bfd_vma) number, info);
1241 }
1242 else
1243 {
1244 if (number >= 0)
1245 *tp++ = '+';
1246 tp = format_dec (number, tp, 1);
1247 }
1248 }
1249 else
1250 {
1251 /* Output "r+[R].m" or "r+[R+].m". */
1252 *tp++ = '+';
1253 *tp++ = '[';
1254 tp = format_reg (disdata, prefix_insn & 15, tp,
1255 with_reg_prefix);
1256 if (prefix_insn & 0x400)
1257 *tp++ = '+';
1258 *tp++ = ']';
1259 *tp++ = '.';
1260 *tp++ = mode_char[(prefix_insn >> 4) & 3];
1261
1262 info->flags
1263 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG
1264 | CRIS_DIS_FLAG_MEM_TARGET2_MEM
1265 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG
1266
1267 | (((prefix_insn >> 4) == 2)
1268 ? 0
1269 : (((prefix_insn >> 4) & 3) == 1
1270 ? CRIS_DIS_FLAG_MEM_TARGET2_MEM_WORD
1271 : CRIS_DIS_FLAG_MEM_TARGET2_MEM_BYTE)));
1272 }
1273 break;
1274
1275 default:
1276 (*info->fprintf_func) (info->stream, "?prefix-bug");
1277 }
1278
1279 /* To mark that the prefix is used, reset it. */
1280 prefix_opcodep = NULL;
1281 }
1282 else
1283 {
1284 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix);
1285
1286 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG;
1287 info->target = insn & 15;
1288
1289 if (insn & 0x400)
1290 *tp++ = '+';
1291 }
1292 *tp++ = ']';
1293 }
1294 break;
1295
1296 case 'x':
1297 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix);
1298 *tp++ = '.';
1299 *tp++ = mode_char[(insn >> 4) & 3];
1300 break;
1301
1302 case 'I':
1303 tp = format_dec (insn & 63, tp, 0);
1304 break;
1305
1306 case 'b':
1307 {
1308 int where = buffer[2] + buffer[3] * 256;
1309
1310 if (where > 32767)
1311 where -= 65536;
1312
1313 where += addr + ((disdata->distype == cris_dis_v32) ? 0 : 4);
1314
1315 if (insn == BA_PC_INCR_OPCODE)
1316 info->insn_type = dis_branch;
1317 else
1318 info->insn_type = dis_condbranch;
1319
1320 info->target = (bfd_vma) where;
1321
1322 *tp = 0;
1323 tp = temp;
1324 (*info->fprintf_func) (info->stream, "%s%s ",
1325 temp, cris_cc_strings[insn >> 12]);
1326
1327 (*info->print_address_func) ((bfd_vma) where, info);
1328 }
1329 break;
1330
1331 case 'c':
1332 tp = format_dec (insn & 31, tp, 0);
1333 break;
1334
1335 case 'C':
1336 tp = format_dec (insn & 15, tp, 0);
1337 break;
1338
1339 case 'o':
1340 {
1341 long offset = insn & 0xfe;
1342 bfd_vma target;
1343
1344 if (insn & 1)
1345 offset |= ~0xff;
1346
1347 if (opcodep->match == BA_QUICK_OPCODE)
1348 info->insn_type = dis_branch;
1349 else
1350 info->insn_type = dis_condbranch;
1351
1352 target = addr + ((disdata->distype == cris_dis_v32) ? 0 : 2) + offset;
1353 info->target = target;
1354 *tp = 0;
1355 tp = temp;
1356 (*info->fprintf_func) (info->stream, "%s", temp);
1357 (*info->print_address_func) (target, info);
1358 }
1359 break;
1360
1361 case 'Q':
1362 case 'O':
1363 {
1364 long number = buffer[0];
1365
1366 if (number > 127)
1367 number = number - 256;
1368
1369 tp = format_dec (number, tp, 1);
1370 *tp++ = ',';
1371 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix);
1372 }
1373 break;
1374
1375 case 'f':
1376 tp = print_flags (disdata, insn, tp);
1377 break;
1378
1379 case 'i':
1380 tp = format_dec ((insn & 32) ? (insn & 31) | ~31 : insn & 31, tp, 1);
1381 break;
1382
1383 case 'P':
1384 {
1385 const struct cris_spec_reg *sregp
1386 = spec_reg_info ((insn >> 12) & 15, disdata->distype);
1387
1388 if (sregp->name == NULL)
1389 /* Should have been caught as a non-match eariler. */
1390 *tp++ = '?';
1391 else
1392 {
1393 if (with_reg_prefix)
1394 *tp++ = REGISTER_PREFIX_CHAR;
1395 strcpy (tp, sregp->name);
1396 tp += strlen (tp);
1397 }
1398 }
1399 break;
1400
1401 default:
1402 strcpy (tp, "???");
1403 tp += 3;
1404 }
1405 }
1406
1407 *tp = 0;
1408
1409 if (prefix_opcodep)
1410 (*info->fprintf_func) (info->stream, " (OOPS unused prefix \"%s: %s\")",
1411 prefix_opcodep->name, prefix_opcodep->args);
1412
1413 (*info->fprintf_func) (info->stream, "%s", temp);
1414
1415 /* Get info for matching case-tables, if we don't have any active.
1416 We assume that the last constant seen is used; either in the insn
1417 itself or in a "move.d const,rN, sub.d rN,rM"-like sequence. */
1418 if (TRACE_CASE && case_offset_counter == 0)
1419 {
1420 if (strncmp (opcodep->name, "sub", 3) == 0)
1421 case_offset = last_immediate;
1422
1423 /* It could also be an "add", if there are negative case-values. */
1424 else if (strncmp (opcodep->name, "add", 3) == 0)
1425 {
1426 /* The first case is the negated operand to the add. */
1427 case_offset = -last_immediate;
1428 }
1429 /* A bound insn will tell us the number of cases. */
1430 else if (strncmp (opcodep->name, "bound", 5) == 0)
1431 {
1432 no_of_case_offsets = last_immediate + 1;
1433 }
1434 /* A jump or jsr or branch breaks the chain of insns for a
1435 case-table, so assume default first-case again. */
1436 else if (info->insn_type == dis_jsr
1437 || info->insn_type == dis_branch
1438 || info->insn_type == dis_condbranch)
1439 case_offset = 0;
1440 }
1441 }
1442
1443
1444 /* Print the CRIS instruction at address memaddr on stream. Returns
1445 length of the instruction, in bytes. Prefix register names with `$' if
1446 WITH_REG_PREFIX. */
1447
1448 static int
1449 print_insn_cris_generic (memaddr, info, with_reg_prefix)
1450 bfd_vma memaddr;
1451 disassemble_info *info;
1452 bfd_boolean with_reg_prefix;
1453 {
1454 int nbytes;
1455 unsigned int insn;
1456 const struct cris_opcode *matchedp;
1457 int advance = 0;
1458 struct cris_disasm_data *disdata
1459 = (struct cris_disasm_data *) info->private_data;
1460
1461 /* No instruction will be disassembled as longer than this number of
1462 bytes; stacked prefixes will not be expanded. */
1463 unsigned char buffer[MAX_BYTES_PER_CRIS_INSN];
1464 unsigned char *bufp;
1465 int status = 0;
1466 bfd_vma addr;
1467
1468 /* There will be an "out of range" error after the last instruction.
1469 Reading pairs of bytes in decreasing number, we hope that we will get
1470 at least the amount that we will consume.
1471
1472 If we can't get any data, or we do not get enough data, we print
1473 the error message. */
1474
1475 for (nbytes = MAX_BYTES_PER_CRIS_INSN; nbytes > 0; nbytes -= 2)
1476 {
1477 status = (*info->read_memory_func) (memaddr, buffer, nbytes, info);
1478 if (status == 0)
1479 break;
1480 }
1481
1482 /* If we did not get all we asked for, then clear the rest.
1483 Hopefully this makes a reproducible result in case of errors. */
1484 if (nbytes != MAX_BYTES_PER_CRIS_INSN)
1485 memset (buffer + nbytes, 0, MAX_BYTES_PER_CRIS_INSN - nbytes);
1486
1487 addr = memaddr;
1488 bufp = buffer;
1489
1490 /* Set some defaults for the insn info. */
1491 info->insn_info_valid = 1;
1492 info->branch_delay_insns = 0;
1493 info->data_size = 0;
1494 info->insn_type = dis_nonbranch;
1495 info->flags = 0;
1496 info->target = 0;
1497 info->target2 = 0;
1498
1499 /* If we got any data, disassemble it. */
1500 if (nbytes != 0)
1501 {
1502 matchedp = NULL;
1503
1504 insn = bufp[0] + bufp[1] * 256;
1505
1506 /* If we're in a case-table, don't disassemble the offsets. */
1507 if (TRACE_CASE && case_offset_counter != 0)
1508 {
1509 info->insn_type = dis_noninsn;
1510 advance += 2;
1511
1512 /* If to print data as offsets, then shortcut here. */
1513 (*info->fprintf_func) (info->stream, "case %d%s: -> ",
1514 case_offset + no_of_case_offsets
1515 - case_offset_counter,
1516 case_offset_counter == 1 ? "/default" :
1517 "");
1518
1519 (*info->print_address_func) ((bfd_vma)
1520 ((short) (insn)
1521 + (long) (addr
1522 - (no_of_case_offsets
1523 - case_offset_counter)
1524 * 2)), info);
1525 case_offset_counter--;
1526
1527 /* The default case start (without a "sub" or "add") must be
1528 zero. */
1529 if (case_offset_counter == 0)
1530 case_offset = 0;
1531 }
1532 else if (insn == 0)
1533 {
1534 /* We're often called to disassemble zeroes. While this is a
1535 valid "bcc .+2" insn, it is also useless enough and enough
1536 of a nuiscance that we will just output "bcc .+2" for it
1537 and signal it as a noninsn. */
1538 (*info->fprintf_func) (info->stream,
1539 disdata->distype == cris_dis_v32
1540 ? "bcc ." : "bcc .+2");
1541 info->insn_type = dis_noninsn;
1542 advance += 2;
1543 }
1544 else
1545 {
1546 const struct cris_opcode *prefix_opcodep = NULL;
1547 unsigned char *prefix_buffer = bufp;
1548 unsigned int prefix_insn = insn;
1549 int prefix_size = 0;
1550
1551 matchedp = get_opcode_entry (insn, NO_CRIS_PREFIX, disdata);
1552
1553 /* Check if we're supposed to write out prefixes as address
1554 modes and if this was a prefix. */
1555 if (matchedp != NULL && PARSE_PREFIX && matchedp->args[0] == 'p')
1556 {
1557 /* If it's a prefix, put it into the prefix vars and get the
1558 main insn. */
1559 prefix_size = bytes_to_skip (prefix_insn, matchedp,
1560 disdata->distype);
1561 prefix_opcodep = matchedp;
1562
1563 insn = bufp[prefix_size] + bufp[prefix_size + 1] * 256;
1564 matchedp = get_opcode_entry (insn, prefix_insn, disdata);
1565
1566 if (matchedp != NULL)
1567 {
1568 addr += prefix_size;
1569 bufp += prefix_size;
1570 advance += prefix_size;
1571 }
1572 else
1573 {
1574 /* The "main" insn wasn't valid, at least not when
1575 prefixed. Put back things enough to output the
1576 prefix insn only, as a normal insn. */
1577 matchedp = prefix_opcodep;
1578 insn = prefix_insn;
1579 prefix_opcodep = NULL;
1580 }
1581 }
1582
1583 if (matchedp == NULL)
1584 {
1585 (*info->fprintf_func) (info->stream, "??0x%lx", insn);
1586 advance += 2;
1587
1588 info->insn_type = dis_noninsn;
1589 }
1590 else
1591 {
1592 advance += bytes_to_skip (insn, matchedp, disdata->distype);
1593
1594 /* The info_type and assorted fields will be set according
1595 to the operands. */
1596 print_with_operands (matchedp, insn, bufp, addr, info,
1597 prefix_opcodep, prefix_insn,
1598 prefix_buffer, with_reg_prefix);
1599 }
1600 }
1601 }
1602 else
1603 info->insn_type = dis_noninsn;
1604
1605 /* If we read less than MAX_BYTES_PER_CRIS_INSN, i.e. we got an error
1606 status when reading that much, and the insn decoding indicated a
1607 length exceeding what we read, there is an error. */
1608 if (status != 0 && (nbytes == 0 || advance > nbytes))
1609 {
1610 (*info->memory_error_func) (status, memaddr, info);
1611 return -1;
1612 }
1613
1614 /* Max supported insn size with one folded prefix insn. */
1615 info->bytes_per_line = MAX_BYTES_PER_CRIS_INSN;
1616
1617 /* I would like to set this to a fixed value larger than the actual
1618 number of bytes to print in order to avoid spaces between bytes,
1619 but objdump.c (2.9.1) does not like that, so we print 16-bit
1620 chunks, which is the next choice. */
1621 info->bytes_per_chunk = 2;
1622
1623 /* Printing bytes in order of increasing addresses makes sense,
1624 especially on a little-endian target.
1625 This is completely the opposite of what you think; setting this to
1626 BFD_ENDIAN_LITTLE will print bytes in order N..0 rather than the 0..N
1627 we want. */
1628 info->display_endian = BFD_ENDIAN_BIG;
1629
1630 return advance;
1631 }
1632
1633 /* Disassemble, prefixing register names with `$'. CRIS v0..v10. */
1634
1635 static int
1636 print_insn_cris_with_register_prefix (vma, info)
1637 bfd_vma vma;
1638 disassemble_info *info;
1639 {
1640 if (info->private_data == NULL
1641 && !cris_parse_disassembler_options (info, cris_dis_v0_v10))
1642 return -1;
1643 return print_insn_cris_generic (vma, info, TRUE);
1644 }
1645
1646 /* Disassemble, prefixing register names with `$'. CRIS v32. */
1647
1648 static int
1649 print_insn_crisv32_with_register_prefix (vma, info)
1650 bfd_vma vma;
1651 disassemble_info *info;
1652 {
1653 if (info->private_data == NULL
1654 && !cris_parse_disassembler_options (info, cris_dis_v32))
1655 return -1;
1656 return print_insn_cris_generic (vma, info, TRUE);
1657 }
1658
1659 /* Disassemble, prefixing register names with `$'.
1660 Common v10 and v32 subset. */
1661
1662 static int
1663 print_insn_crisv10_v32_with_register_prefix (vma, info)
1664 bfd_vma vma;
1665 disassemble_info *info;
1666 {
1667 if (info->private_data == NULL
1668 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32))
1669 return -1;
1670 return print_insn_cris_generic (vma, info, TRUE);
1671 }
1672
1673 /* Disassemble, no prefixes on register names. CRIS v0..v10. */
1674
1675 static int
1676 print_insn_cris_without_register_prefix (vma, info)
1677 bfd_vma vma;
1678 disassemble_info *info;
1679 {
1680 if (info->private_data == NULL
1681 && !cris_parse_disassembler_options (info, cris_dis_v0_v10))
1682 return -1;
1683 return print_insn_cris_generic (vma, info, FALSE);
1684 }
1685
1686 /* Disassemble, no prefixes on register names. CRIS v32. */
1687
1688 static int
1689 print_insn_crisv32_without_register_prefix (vma, info)
1690 bfd_vma vma;
1691 disassemble_info *info;
1692 {
1693 if (info->private_data == NULL
1694 && !cris_parse_disassembler_options (info, cris_dis_v32))
1695 return -1;
1696 return print_insn_cris_generic (vma, info, FALSE);
1697 }
1698
1699 /* Disassemble, no prefixes on register names.
1700 Common v10 and v32 subset. */
1701
1702 static int
1703 print_insn_crisv10_v32_without_register_prefix (vma, info)
1704 bfd_vma vma;
1705 disassemble_info *info;
1706 {
1707 if (info->private_data == NULL
1708 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32))
1709 return -1;
1710 return print_insn_cris_generic (vma, info, FALSE);
1711 }
1712
1713 /* Return a disassembler-function that prints registers with a `$' prefix,
1714 or one that prints registers without a prefix.
1715 FIXME: We should improve the solution to avoid the multitude of
1716 functions seen above. */
1717
1718 disassembler_ftype
1719 cris_get_disassembler (abfd)
1720 bfd *abfd;
1721 {
1722 /* If there's no bfd in sight, we return what is valid as input in all
1723 contexts if fed back to the assembler: disassembly *with* register
1724 prefix. Unfortunately this will be totally wrong for v32. */
1725 if (abfd == NULL)
1726 return print_insn_cris_with_register_prefix;
1727
1728 if (bfd_get_symbol_leading_char (abfd) == 0)
1729 {
1730 if (bfd_get_mach (abfd) == bfd_mach_cris_v32)
1731 return print_insn_crisv32_with_register_prefix;
1732 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32)
1733 return print_insn_crisv10_v32_with_register_prefix;
1734
1735 /* We default to v10. This may be specifically specified in the
1736 bfd mach, but is also the default setting. */
1737 return print_insn_cris_with_register_prefix;
1738 }
1739
1740 if (bfd_get_mach (abfd) == bfd_mach_cris_v32)
1741 return print_insn_crisv32_without_register_prefix;
1742 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32)
1743 return print_insn_crisv10_v32_without_register_prefix;
1744 return print_insn_cris_without_register_prefix;
1745 }
1746
1747 /*
1748 * Local variables:
1749 * eval: (c-set-style "gnu")
1750 * indent-tabs-mode: t
1751 * End:
1752 */
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