1 /* Declarations for C-SKY opcode table
2 Copyright (C) 2007-2020 Free Software Foundation, Inc.
3 Contributed by C-SKY Microsystems and Mentor Graphics.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 #include "opcode/csky.h"
23 #include "safe-ctype.h"
25 #define OP_TABLE_NUM 2
26 #define MAX_OPRND_NUM 5
31 /* Control register. */
42 OPRND_TYPE_AREG_WITH_BRACKET
,
43 OPRND_TYPE_AREG_WITH_LSHIFT
,
44 OPRND_TYPE_AREG_WITH_LSHIFT_FPU
,
46 OPRND_TYPE_FREG_WITH_INDEX
,
47 /* r1 only, for xtrb0(1)(2)(3) in csky v1 ISA. */
49 /* r1 only, for divs/divu in csky v1 ISA. */
54 /* sp register with bracket. */
58 /* Register with bracket. */
60 /* Not sp register. */
62 /* Not lr register. */
64 /* Not sp/lr register. */
81 /* Float round mode. */
84 OPRND_TYPE_PSR_BITS_LIST
,
88 /* Floating Constant. */
90 /* Extern lrw constant. */
91 OPRND_TYPE_ELRW_CONSTANT
,
93 OPRND_TYPE_LABEL_WITH_BRACKET
,
94 /* The operand is the same as first reg. It is a dummy reg that doesn't
95 appear in the binary code of the instruction. It is also used by
97 For example: bclri rz, rz, imm5 -> bclri rz, imm5. */
99 /* The type of the operand is same as the first operand. If the value
100 of the operand is same as the first operand, we can use a 16-bit
101 instruction to represent the opcode.
102 For example: addc r1, r1, r2 -> addc16 r1, r2. */
103 OPRND_TYPE_2IN1_DUMMY
,
104 /* Output a reg same as the first reg.
105 For example: addc r17, r1 -> addc32 r17, r17, r1.
106 The old "addc" cannot be represented by a 16-bit instruction because
107 16-bit "addc" only supports regs from r0 to r15. So we use "addc32"
108 which has 3 operands, and duplicate the first operand to the second. */
109 OPRND_TYPE_DUP_GREG0_7
,
110 OPRND_TYPE_DUP_GREG0_15
,
126 /* Immediate left shift 2 bits. */
127 OPRND_TYPE_IMM7b_LS2
,
128 OPRND_TYPE_IMM8b_LS2
,
129 /* OPRND_TYPE_IMM5b_a_b means: Immediate in (a, b). */
130 OPRND_TYPE_IMM5b_1_31
,
131 OPRND_TYPE_IMM5b_7_31
,
132 /* OPRND_TYPE_IMM5b_LS means: Imm <= prev Imm. */
134 /* Operand type for rori and rotri. */
135 OPRND_TYPE_IMM5b_RORI
,
136 OPRND_TYPE_IMM5b_POWER
,
137 OPRND_TYPE_IMM5b_7_31_POWER
,
138 OPRND_TYPE_IMM5b_BMASKI
,
139 OPRND_TYPE_IMM8b_BMASKI
,
141 OPRND_TYPE_IMM16b_MOVIH
,
143 OPRND_TYPE_IMM16b_ORI
,
146 OPRND_TYPE_IMM_FLDST
,
147 OPRND_TYPE_IMM2b_JMPIX
,
148 /* Offset for bloop. */
149 OPRND_TYPE_BLOOP_OFF4b
,
150 OPRND_TYPE_BLOOP_OFF12b
,
151 /* Offset for jump. */
156 OPRND_TYPE_OFF16b_LSL1
,
158 /* An immediate or label. */
159 OPRND_TYPE_IMM_OFF18b
,
160 /* Offset immediate. */
168 /* For csky v2 idly. */
169 OPRND_TYPE_OIMM5b_IDLY
,
171 OPRND_TYPE_OIMM5b_BMASKI
,
174 /* PC relative offset. */
175 OPRND_TYPE_PCR_OFFSET_16K
,
176 OPRND_TYPE_PCR_OFFSET_64K
,
177 OPRND_TYPE_PCR_OFFSET_64M
,
180 OPRND_TYPE_REGLIST_LDM
,
181 OPRND_TYPE_REGLIST_DASH
,
182 OPRND_TYPE_FREGLIST_DASH
,
183 OPRND_TYPE_REGLIST_COMMA
,
184 OPRND_TYPE_REGLIST_DASH_COMMA
,
190 OPRND_TYPE_UNCOND10b
,
191 OPRND_TYPE_UNCOND16b
,
199 /* Single float and double float. */
202 OPRND_TYPE_HFLOAT_FMOVI
,
203 OPRND_TYPE_SFLOAT_FMOVI
,
204 OPRND_TYPE_DFLOAT_FMOVI
,
207 /* Operand descriptors. */
210 /* Mask for suboperand. */
212 /* Suboperand type. */
213 enum operand_type type
;
220 /* Mask for operand. */
223 enum operand_type type
;
227 struct operand subs
[3];
232 struct operand oprnds
[MAX_OPRND_NUM
];
235 struct operand oprnd
;
236 struct soperand soprnd
;
240 struct soperand soprnd
;
241 struct operand oprnd
;
245 /* Describe a single instruction encoding. */
246 struct csky_opcode_info
248 /* How many operands. */
250 /* The instruction opcode. */
252 /* Operand information. */
253 union csky_operand oprnd
;
256 /* C-SKY instruction description. Each mnemonic can have multiple
257 16-bit and 32-bit encodings. */
260 /* The instruction name. */
261 const char *mnemonic
;
262 /* Whether this is an unconditional control transfer instruction,
263 for the purposes of placing literal pools after it.
264 0 = no, 1 = within function, 2 = end of function.
265 See check_literals in gas/config/tc-csky.c. */
267 /* Encodings for 16-bit opcodes. */
268 struct csky_opcode_info op16
[OP_TABLE_NUM
];
269 /* Encodings for 32-bit opcodes. */
270 struct csky_opcode_info op32
[OP_TABLE_NUM
];
271 /* Instruction set flag. */
272 BFD_HOST_U_64_BIT isa_flag16
;
273 BFD_HOST_U_64_BIT isa_flag32
;
274 /* Whether this insn needs relocation, 0: no, !=0: yes. */
277 /* Whether this insn needs relaxation, 0: no, != 0: yes. */
279 /* Worker function to call when this instruction needs special assembler
281 bfd_boolean (*work
)(void);
284 /* The following are the opcodes used in relax/fix process. */
285 #define CSKYV1_INST_JMPI 0x7000
286 #define CSKYV1_INST_ADDI 0x2000
287 #define CSKYV1_INST_SUBI 0x2400
288 #define CSKYV1_INST_LDW 0x8000
289 #define CSKYV1_INST_STW 0x9000
290 #define CSKYV1_INST_BSR 0xf800
291 #define CSKYV1_INST_LRW 0x7000
292 #define CSKYV1_INST_ADDU 0x1c00
293 #define CSKYV1_INST_JMP 0x00c0
294 #define CSKYV1_INST_MOV_R1_RX 0x1201
295 #define CSKYV1_INST_MOV_RX_R1 0x1210
297 #define CSKYV2_INST_BT16 0x0800
298 #define CSKYV2_INST_BF16 0x0c00
299 #define CSKYV2_INST_BT32 0xe8600000
300 #define CSKYV2_INST_BF32 0xe8400000
301 #define CSKYV2_INST_BR32 0xe8000000
302 #define CSKYV2_INST_NOP 0x6c03
303 #define CSKYV2_INST_MOVI16 0x3000
304 #define CSKYV2_INST_MOVI32 0xea000000
305 #define CSKYV2_INST_MOVIH 0xea200000
306 #define CSKYV2_INST_LRW16 0x1000
307 #define CSKYV2_INST_LRW32 0xea800000
308 #define CSKYV2_INST_BSR32 0xe0000000
309 #define CSKYV2_INST_BR32 0xe8000000
310 #define CSKYV2_INST_FLRW 0xf4003800
311 #define CSKYV2_INST_JMPI32 0xeac00000
312 #define CSKYV2_INST_JSRI32 0xeae00000
313 #define CSKYV2_INST_JSRI_TO_LRW 0xea9a0000
314 #define CSKYV2_INST_JSR_R26 0xe8fa0000
315 #define CSKYV2_INST_MOV_R0_R0 0xc4004820
317 #define OPRND_SHIFT_0_BIT 0
318 #define OPRND_SHIFT_1_BIT 1
319 #define OPRND_SHIFT_2_BIT 2
320 #define OPRND_SHIFT_3_BIT 3
321 #define OPRND_SHIFT_4_BIT 4
323 #define OPRND_MASK_NONE 0x0
324 #define OPRND_MASK_0_1 0x3
325 #define OPRND_MASK_0_2 0x7
326 #define OPRND_MASK_0_3 0xf
327 #define OPRND_MASK_0_4 0x1f
328 #define OPRND_MASK_0_7 0xff
329 #define OPRND_MASK_0_8 0x1ff
330 #define OPRND_MASK_0_9 0x3ff
331 #define OPRND_MASK_0_10 0x7ff
332 #define OPRND_MASK_0_11 0xfff
333 #define OPRND_MASK_0_14 0x7fff
334 #define OPRND_MASK_0_15 0xffff
335 #define OPRND_MASK_0_17 0x3ffff
336 #define OPRND_MASK_0_25 0x3ffffff
337 #define OPRND_MASK_2_4 0x1c
338 #define OPRND_MASK_2_5 0x3c
339 #define OPRND_MASK_3_7 0xf8
340 #define OPRND_MASK_4 0x10
341 #define OPRND_MASK_4_5 0x30
342 #define OPRND_MASK_4_6 0x70
343 #define OPRND_MASK_4_7 0xf0
344 #define OPRND_MASK_4_8 0x1f0
345 #define OPRND_MASK_4_10 0x7f0
346 #define OPRND_MASK_5 0x20
347 #define OPRND_MASK_5_6 0x60
348 #define OPRND_MASK_5_7 0xe0
349 #define OPRND_MASK_5_8 0x1e0
350 #define OPRND_MASK_5_9 0x3e0
351 #define OPRND_MASK_6 0x40
352 #define OPRND_MASK_6_7 0xc0
353 #define OPRND_MASK_6_8 0x1c0
354 #define OPRND_MASK_6_9 0x3c0
355 #define OPRND_MASK_6_10 0x7c0
356 #define OPRND_MASK_7 0x80
357 #define OPRND_MASK_7_8 0x180
358 #define OPRND_MASK_8_9 0x300
359 #define OPRND_MASK_8_10 0x700
360 #define OPRND_MASK_8_11 0xf00
361 #define OPRND_MASK_9_10 0x600
362 #define OPRND_MASK_9_12 0x1e00
363 #define OPRND_MASK_10_11 0xc00
364 #define OPRND_MASK_10_14 0x7c00
365 #define OPRND_MASK_12_15 0xf000
366 #define OPRND_MASK_13_17 0x3e000
367 #define OPRND_MASK_16_19 0xf0000
368 #define OPRND_MASK_16_20 0x1f0000
369 #define OPRND_MASK_16_25 0x3ff0000
370 #define OPRND_MASK_17_24 0x1fe0000
371 #define OPRND_MASK_20 0x0100000
372 #define OPRND_MASK_20_21 0x0300000
373 #define OPRND_MASK_20_22 0x0700000
374 #define OPRND_MASK_20_23 0x0f00000
375 #define OPRND_MASK_20_24 0x1f00000
376 #define OPRND_MASK_20_25 0x3f00000
377 #define OPRND_MASK_21_24 0x1e00000
378 #define OPRND_MASK_21_25 0x3e00000
379 #define OPRND_MASK_25 0x2000000
380 #define OPRND_MASK_RSV 0xffffffff
381 #define OPRND_MASK_0_3or5_8 OPRND_MASK_0_3 | OPRND_MASK_5_8
382 #define OPRND_MASK_0_3or6_7 OPRND_MASK_0_3 | OPRND_MASK_6_7
383 #define OPRND_MASK_0_3or21_24 OPRND_MASK_0_3 | OPRND_MASK_21_24
384 #define OPRND_MASK_0_3or25 OPRND_MASK_0_3 | OPRND_MASK_25
385 #define OPRND_MASK_0_4or21_24 OPRND_MASK_0_4 | OPRND_MASK_21_24
386 #define OPRND_MASK_0_4or21_25 OPRND_MASK_0_4 | OPRND_MASK_21_25
387 #define OPRND_MASK_0_4or16_20 OPRND_MASK_0_4 | OPRND_MASK_16_20
388 #define OPRND_MASK_0_4or8_10 OPRND_MASK_0_4 | OPRND_MASK_8_10
389 #define OPRND_MASK_0_4or8_9 OPRND_MASK_0_4 | OPRND_MASK_8_9
390 #define OPRND_MASK_0_14or16_20 OPRND_MASK_0_14 | OPRND_MASK_16_20
391 #define OPRND_MASK_4or5_8 OPRND_MASK_4 | OPRND_MASK_5_8
392 #define OPRND_MASK_5or20_21 OPRND_MASK_5 | OPRND_MASK_20_21
393 #define OPRND_MASK_5or20_22 OPRND_MASK_5 | OPRND_MASK_20_22
394 #define OPRND_MASK_5or20_23 OPRND_MASK_5 | OPRND_MASK_20_23
395 #define OPRND_MASK_5or20_24 OPRND_MASK_5 | OPRND_MASK_20_24
396 #define OPRND_MASK_5or20_25 OPRND_MASK_5 | OPRND_MASK_20_25
397 #define OPRND_MASK_5or21_24 OPRND_MASK_5 | OPRND_MASK_21_24
398 #define OPRND_MASK_2_5or6_9 OPRND_MASK_2_5 | OPRND_MASK_6_9
399 #define OPRND_MASK_4_6or21_25 OPRND_MASK_4_6 | OPRND_MASK_21_25
400 #define OPRND_MASK_4_7or21_24 OPRND_MASK_4_7 | OPRND_MASK_21_24
401 #define OPRND_MASK_5_6or21_25 OPRND_MASK_5_6 | OPRND_MASK_21_25
402 #define OPRND_MASK_5_7or8_10 OPRND_MASK_5_7 | OPRND_MASK_8_10
403 #define OPRND_MASK_5_9or21_25 OPRND_MASK_5_9 | OPRND_MASK_21_25
404 #define OPRND_MASK_8_9or21_25 OPRND_MASK_8_9 | OPRND_MASK_21_25
405 #define OPRND_MASK_8_9or16_25 OPRND_MASK_8_9 | OPRND_MASK_16_20 | OPRND_MASK_21_25
406 #define OPRND_MASK_16_19or21_24 OPRND_MASK_16_19 | OPRND_MASK_21_24
407 #define OPRND_MASK_16_20or21_25 OPRND_MASK_16_20 | OPRND_MASK_21_25
408 #define OPRND_MASK_4or9_10or25 OPRND_MASK_4 | OPRND_MASK_9_10 | OPRND_MASK_25
409 #define OPRND_MASK_4_7or16_24 OPRND_MASK_4_7 | OPRND_MASK_16_20 | OPRND_MASK_21_24
410 #define OPRND_MASK_4_6or20 OPRND_MASK_4_6 | OPRND_MASK_20
411 #define OPRND_MASK_5_7or20 OPRND_MASK_5_7 | OPRND_MASK_20
412 #define OPRND_MASK_4_5or20or25 OPRND_MASK_4 | OPRND_MASK_5 | OPRND_MASK_20 | OPRND_MASK_25
413 #define OPRND_MASK_4_6or20or25 OPRND_MASK_4_6 | OPRND_MASK_20 | OPRND_MASK_25
414 #define OPRND_MASK_4_7or20or25 OPRND_MASK_4_7 | OPRND_MASK_20 | OPRND_MASK_25
415 #define OPRND_MASK_6_9or17_24 OPRND_MASK_6_9 | OPRND_MASK_17_24
416 #define OPRND_MASK_6_7or20 OPRND_MASK_6_7 | OPRND_MASK_20
417 #define OPRND_MASK_6or20 OPRND_MASK_6 | OPRND_MASK_20
418 #define OPRND_MASK_7or20 OPRND_MASK_7 | OPRND_MASK_20
419 #define OPRND_MASK_5or8_9or16_25 OPRND_MASK_5 | OPRND_MASK_8_9or16_25
420 #define OPRND_MASK_5or8_9or20_25 OPRND_MASK_5 | OPRND_MASK_8_9 | OPRND_MASK_20_25
422 #define OPERAND_INFO(mask, type, shift) \
423 {OPRND_MASK_##mask, OPRND_TYPE_##type, shift}
425 #define OPCODE_INFO_NONE() \
427 {{OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
428 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
429 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
430 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
431 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
433 /* Here and in subsequent macros, the "oprnd" arguments are the
434 parenthesized arglist to the OPERAND_INFO macro above. */
435 #define OPCODE_INFO(num, op, oprnd1, oprnd2, oprnd3, oprnd4, oprnd5) \
437 {OPERAND_INFO oprnd1, OPERAND_INFO oprnd2, OPERAND_INFO oprnd3, \
438 OPERAND_INFO oprnd4, OPERAND_INFO oprnd5}}
440 #define OPCODE_INFO0(op) \
442 {{OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
443 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
444 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
445 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
446 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
447 #define OPCODE_INFO1(op, oprnd) \
449 {{OPERAND_INFO oprnd, \
450 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
451 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
452 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
453 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
454 #define OPCODE_INFO2(op, oprnd1, oprnd2) \
456 {{OPERAND_INFO oprnd1, \
457 OPERAND_INFO oprnd2, \
458 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
459 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
460 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
461 #define OPCODE_INFO3(op, oprnd1, oprnd2, oprnd3) \
463 {{OPERAND_INFO oprnd1, \
464 OPERAND_INFO oprnd2, \
465 OPERAND_INFO oprnd3, \
466 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
467 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
468 #define OPCODE_INFO4(op, oprnd1, oprnd2, oprnd3, oprnd4) \
470 {{OPERAND_INFO oprnd1, \
471 OPERAND_INFO oprnd2, \
472 OPERAND_INFO oprnd3, \
473 OPERAND_INFO oprnd4, \
474 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
475 #define OPCODE_INFO_LIST(op, oprnd) \
477 {{OPERAND_INFO oprnd, \
478 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
479 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT) , \
480 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
481 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
482 #define OPCODE_INFO5(op, oprnd1, oprnd2, oprnd3, oprnd4, oprnd5) \
484 {{OPERAND_INFO oprnd1, \
485 OPERAND_INFO oprnd2, \
486 OPERAND_INFO oprnd3, \
487 OPERAND_INFO oprnd4, \
488 OPERAND_INFO oprnd5}}}
490 #define BRACKET_OPRND(oprnd1, oprnd2) \
491 OPERAND_INFO (RSV, BRACKET, OPRND_SHIFT_0_BIT), \
492 OPERAND_INFO oprnd1, \
493 OPERAND_INFO oprnd2, \
494 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)
495 #define ABRACKET_OPRND(oprnd1, oprnd2) \
496 OPERAND_INFO (RSV, ABRACKET, OPRND_SHIFT_0_BIT), \
497 OPERAND_INFO oprnd1, \
498 OPERAND_INFO oprnd2, \
499 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)
501 #define SOPCODE_INFO1(op, soprnd) \
504 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
505 #define SOPCODE_INFO2(op, oprnd, soprnd) \
507 {{OPERAND_INFO oprnd, soprnd}}}
510 /* Before using the opcode-defining macros, there need to be
511 #defines for _TRANSFER, _RELOC16, _RELOC32, and _RELAX. See
513 /* FIXME: it is a wart that these parameters are not explicit. */
515 #define OP16(mnem, opcode16, isa) \
517 {opcode16, OPCODE_INFO_NONE ()}, \
518 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
519 isa, 0, _RELOC16, 0, _RELAX, NULL}
523 #define OP16_WITH_WORK(mnem, opcode16, isa, work) \
525 {opcode16, OPCODE_INFO_NONE ()}, \
526 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
527 isa, 0, _RELOC16, 0, _RELAX, work}
528 #define OP32_WITH_WORK(mnem, opcode32, isa, work) \
530 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
531 {opcode32, OPCODE_INFO_NONE ()}, \
532 0, isa, 0, _RELOC32, _RELAX, work}
533 #define OP16_OP32_WITH_WORK(mnem, opcode16, isa16, opcode32, isa32, work) \
535 {opcode16, OPCODE_INFO_NONE ()}, \
536 {opcode32, OPCODE_INFO_NONE ()}, \
537 isa16, isa32, _RELOC16, _RELOC32, _RELAX, work}
538 #define DOP16_OP32_WITH_WORK(mnem, opcode16a, opcode16b, isa16, opcode32, isa32, work) \
540 {opcode16a, opcode16b}, \
541 {opcode32, OPCODE_INFO_NONE ()}, \
542 isa16, isa32, _RELOC16, _RELOC32, _RELAX, work}
543 #define DOP16_DOP32_WITH_WORK(mnem, opcode16a, opcode16b, isa16, opcode32a, opcode32b, isa32, work) \
545 {opcode16a, opcode16b}, \
546 {opcode32a, opcode32b}, \
547 isa16, isa32, _RELOC16, _RELOC32, _RELAX, work}
548 #define DOP32_WITH_WORK(mnem, opcode32a, opcode32b, isa, work) \
550 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
551 {opcode32a, opcode32b}, \
552 0, isa, 0, _RELOC32, _RELAX, work}
554 #else /* ifdef BUILD_AS */
556 #define OP16_WITH_WORK(mnem, opcode16, isa, work) \
558 {opcode16, OPCODE_INFO_NONE ()}, \
559 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
560 isa, 0, _RELOC16, 0, _RELAX, NULL}
561 #define OP32_WITH_WORK(mnem, opcode32, isa, work) \
563 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
564 {opcode32, OPCODE_INFO_NONE ()}, \
565 0, isa, 0, _RELOC32, _RELAX, NULL}
566 #define OP16_OP32_WITH_WORK(mnem, opcode16, isa16, opcode32, isa32, work) \
568 {opcode16, OPCODE_INFO_NONE ()}, \
569 {opcode32, OPCODE_INFO_NONE ()}, \
570 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
571 #define DOP16_OP32_WITH_WORK(mnem, opcode16a, opcode16b, isa16, opcode32, isa32, work) \
573 {opcode16a, opcode16b}, \
574 {opcode32, OPCODE_INFO_NONE ()}, \
575 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
576 #define DOP16_DOP32_WITH_WORK(mnem, opcode16a, opcode16b, isa16, opcode32a, opcode32b, isa32, work) \
578 {opcode16a, opcode16b}, \
579 {opcode32a, opcode32b}, \
580 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
581 #define DOP32_WITH_WORK(mnem, opcode32a, opcode32b, isa, work) \
583 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
584 {opcode32a, opcode32b}, \
585 0, isa, 0, _RELOC32, _RELAX, NULL}
587 #endif /* ifdef BUILD_AS */
589 #define DOP16(mnem, opcode16_1, opcode16_2, isa) \
591 {opcode16_1, opcode16_2}, \
592 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
593 isa, 0, _RELOC16, 0, _RELAX, NULL}
594 #define OP32(mnem, opcode32, isa) \
596 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
597 {opcode32, OPCODE_INFO_NONE ()}, \
598 0, isa, 0, _RELOC32, _RELAX, NULL}
599 #define DOP32(mnem, opcode32a, opcode32b, isa) \
601 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
602 {opcode32a, opcode32b}, \
603 0, isa, 0, _RELOC32, _RELAX, NULL}
604 #define OP16_OP32(mnem, opcode16, isa16, opcode32, isa32) \
606 {opcode16, OPCODE_INFO_NONE ()}, \
607 {opcode32, OPCODE_INFO_NONE ()}, \
608 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
609 #define DOP16_OP32(mnem, opcode16a, opcode16b, isa16, opcode32, isa32) \
611 {opcode16a, opcode16b}, \
612 {opcode32, OPCODE_INFO_NONE ()}, \
613 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
614 #define OP16_DOP32(mnem, opcode16, isa16, opcode32a, opcode32b, isa32) \
616 {opcode16, OPCODE_INFO_NONE ()}, \
617 {opcode32a, opcode32b}, \
618 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
619 #define DOP16_DOP32(mnem, opcode16a, opcode16b, isa16, opcode32a, opcode32b, isa32) \
621 {opcode16a, opcode16b}, \
622 {opcode32a, opcode32b}, \
623 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
626 /* Register names and numbers. */
637 const struct psrbit cskyv1_psr_bits
[] =
646 const struct psrbit cskyv2_psr_bits
[] =
652 {0x10, CSKY_ISA_TRUST
, "sie"},
656 #define GENERAL_REG_BANK 0x80000000
657 #define REG_SUPPORT_ALL 0xffffffff
659 /* CSKY register description. */
662 /* The group number for control registers,
663 and set the bank of genaral registers to a special number. */
666 /* The name displayed by serial number. */
668 /* The name displayed by ABI infomation,
669 used when objdump add option -Mabi-names. */
670 const char *abi_name
;
671 /* The flags indicate which arches support the register. */
673 /* Some registers depend on special features. */
678 #define ASH(a) (1 << CSKY_ARCH_##a)
680 /* All arches exclued 801. */
681 #define REG_SUPPORT_A (REG_SUPPORT_ALL & ~ASH(801))
683 /* All arches exclued 801 and 802. */
684 #define REG_SUPPORT_B (REG_SUPPORT_ALL & ~(ASH(801) | ASH(802)))
686 /* All arches exclued 801, 802, 803, 805.*/
687 #define REG_SUPPORT_C (REG_SUPPORT_ALL & ~(ASH(801) \
688 | ASH(802) | ASH(803) | ASH(805)))
690 /* All arches exclued 801, 802, 803, 805, 807, 810. */
691 #define REG_SUPPORT_D (REG_SUPPORT_C & ~(ASH(807) | ASH(810)))
693 /* All arches exclued 807, 810, 860. */
694 #define REG_SUPPORT_E (REG_SUPPORT_ALL & ~(ASH(807) | ASH(810) | \
697 /* C-SKY V1 general registers table. */
698 static struct csky_reg_def csky_abiv1_general_regs
[] =
700 #define DECLARE_REG(regno, abi_name, support) \
701 {GENERAL_REG_BANK, regno, "r"#regno, abi_name, support, NULL}
703 DECLARE_REG (0, "sp", REG_SUPPORT_ALL
),
704 DECLARE_REG (1, NULL
, REG_SUPPORT_ALL
),
705 DECLARE_REG (2, "a0", REG_SUPPORT_ALL
),
706 DECLARE_REG (3, "a1", REG_SUPPORT_ALL
),
707 DECLARE_REG (4, "a2", REG_SUPPORT_ALL
),
708 DECLARE_REG (5, "a3", REG_SUPPORT_ALL
),
709 DECLARE_REG (6, "a4", REG_SUPPORT_ALL
),
710 DECLARE_REG (7, "a5", REG_SUPPORT_ALL
),
711 DECLARE_REG (8, "fp", REG_SUPPORT_ALL
),
712 DECLARE_REG (8, "l0", REG_SUPPORT_ALL
),
713 DECLARE_REG (9, "l1", REG_SUPPORT_ALL
),
714 DECLARE_REG (10, "l2", REG_SUPPORT_ALL
),
715 DECLARE_REG (11, "l3", REG_SUPPORT_ALL
),
716 DECLARE_REG (12, "l4", REG_SUPPORT_ALL
),
717 DECLARE_REG (13, "l5", REG_SUPPORT_ALL
),
718 DECLARE_REG (14, "gb", REG_SUPPORT_ALL
),
719 DECLARE_REG (15, "lr", REG_SUPPORT_ALL
),
721 {-1, -1, NULL
, NULL
, 0, NULL
},
724 /* C-SKY V1 control registers table. */
725 static struct csky_reg_def csky_abiv1_control_regs
[] =
727 #define DECLARE_REG(regno, abi_name, support) \
728 {0, regno, "cr"#regno, abi_name, support, NULL}
730 DECLARE_REG (0, "psr", REG_SUPPORT_ALL
),
731 DECLARE_REG (1, "vbr", REG_SUPPORT_ALL
),
732 DECLARE_REG (2, "epsr", REG_SUPPORT_ALL
),
733 DECLARE_REG (3, "fpsr", REG_SUPPORT_ALL
),
734 DECLARE_REG (4, "epc", REG_SUPPORT_ALL
),
735 DECLARE_REG (5, "fpc", REG_SUPPORT_ALL
),
736 DECLARE_REG (6, "ss0", REG_SUPPORT_ALL
),
737 DECLARE_REG (7, "ss1", REG_SUPPORT_ALL
),
738 DECLARE_REG (8, "ss2", REG_SUPPORT_ALL
),
739 DECLARE_REG (9, "ss3", REG_SUPPORT_ALL
),
740 DECLARE_REG (10, "ss4", REG_SUPPORT_ALL
),
741 DECLARE_REG (11, "gcr", REG_SUPPORT_ALL
),
742 DECLARE_REG (12, "gsr", REG_SUPPORT_ALL
),
743 DECLARE_REG (13, "cpid", REG_SUPPORT_ALL
),
744 DECLARE_REG (14, "dcsr", REG_SUPPORT_ALL
),
745 DECLARE_REG (15, "cwr", REG_SUPPORT_ALL
),
746 DECLARE_REG (16, NULL
, REG_SUPPORT_ALL
),
747 DECLARE_REG (17, "cfr", REG_SUPPORT_ALL
),
748 DECLARE_REG (18, "ccr", REG_SUPPORT_ALL
),
749 DECLARE_REG (19, "capr", REG_SUPPORT_ALL
),
750 DECLARE_REG (20, "pacr", REG_SUPPORT_ALL
),
751 DECLARE_REG (21, "prsr", REG_SUPPORT_ALL
),
752 DECLARE_REG (22, "mir", REG_SUPPORT_ALL
),
753 DECLARE_REG (23, "mrr", REG_SUPPORT_ALL
),
754 DECLARE_REG (24, "mel0", REG_SUPPORT_ALL
),
755 DECLARE_REG (25, "mel1", REG_SUPPORT_ALL
),
756 DECLARE_REG (26, "meh", REG_SUPPORT_ALL
),
757 DECLARE_REG (27, "mcr", REG_SUPPORT_ALL
),
758 DECLARE_REG (28, "mpr", REG_SUPPORT_ALL
),
759 DECLARE_REG (29, "mwr", REG_SUPPORT_ALL
),
760 DECLARE_REG (30, "mcir", REG_SUPPORT_ALL
),
762 {-1, -1, NULL
, NULL
, 0, NULL
},
765 /* C-SKY V2 general registers table. */
766 static struct csky_reg_def csky_abiv2_general_regs
[] =
771 #define DECLARE_REG(regno, abi_name, support) \
772 {GENERAL_REG_BANK, regno, "r"#regno, abi_name, support, NULL}
774 DECLARE_REG (0, "a0", REG_SUPPORT_ALL
),
775 DECLARE_REG (1, "a1", REG_SUPPORT_ALL
),
776 DECLARE_REG (2, "a2", REG_SUPPORT_ALL
),
777 DECLARE_REG (3, "a3", REG_SUPPORT_ALL
),
778 DECLARE_REG (4, "l0", REG_SUPPORT_ALL
),
779 DECLARE_REG (5, "l1", REG_SUPPORT_ALL
),
780 DECLARE_REG (6, "l2", REG_SUPPORT_ALL
),
781 DECLARE_REG (7, "l3", REG_SUPPORT_ALL
),
782 DECLARE_REG (8, "l4", REG_SUPPORT_ALL
),
783 DECLARE_REG (9, "l5", REG_SUPPORT_A
),
784 DECLARE_REG (10, "l6", REG_SUPPORT_A
),
785 DECLARE_REG (11, "l7", REG_SUPPORT_A
),
786 DECLARE_REG (12, "t0", REG_SUPPORT_A
),
787 DECLARE_REG (13, "t1", REG_SUPPORT_ALL
),
788 DECLARE_REG (14, "sp", REG_SUPPORT_ALL
),
789 DECLARE_REG (15, "lr", REG_SUPPORT_ALL
),
790 DECLARE_REG (16, "l8", REG_SUPPORT_B
),
791 DECLARE_REG (17, "l9", REG_SUPPORT_B
),
792 DECLARE_REG (18, "t2", REG_SUPPORT_B
),
793 DECLARE_REG (19, "t3", REG_SUPPORT_B
),
794 DECLARE_REG (20, "t4", REG_SUPPORT_B
),
795 DECLARE_REG (21, "t5", REG_SUPPORT_B
),
796 DECLARE_REG (22, "t6", REG_SUPPORT_B
),
797 DECLARE_REG (23, "t7", REG_SUPPORT_B
),
798 DECLARE_REG (24, "t8", REG_SUPPORT_B
),
799 DECLARE_REG (25, "t9", REG_SUPPORT_B
),
800 DECLARE_REG (26, NULL
, REG_SUPPORT_B
),
801 DECLARE_REG (27, NULL
, REG_SUPPORT_B
),
802 DECLARE_REG (28, "gb", REG_SUPPORT_B
),
803 DECLARE_REG (28, "rgb", REG_SUPPORT_B
),
804 DECLARE_REG (28, "rdb", REG_SUPPORT_B
),
805 DECLARE_REG (29, "tb", REG_SUPPORT_B
),
806 DECLARE_REG (29, "rtb", REG_SUPPORT_B
),
807 DECLARE_REG (30, "svbr", REG_SUPPORT_A
),
808 DECLARE_REG (31, "tls", REG_SUPPORT_B
),
810 /* The followings JAVA/BCTM's features. */
811 DECLARE_REG (23, "fp", REG_SUPPORT_ALL
),
812 DECLARE_REG (24, "top", REG_SUPPORT_ALL
),
813 DECLARE_REG (25, "bsp", REG_SUPPORT_ALL
),
815 {-1, -1, NULL
, NULL
, 0, NULL
},
818 /* C-SKY V2 control registers table. */
819 static struct csky_reg_def csky_abiv2_control_regs
[] =
826 #define DECLARE_REG(regno, abi_name) \
827 {0, regno, "cr<"#regno", 0>", abi_name, REG_SUPPORT_ALL, NULL}
828 DECLARE_REG (0, "psr"),
829 DECLARE_REG (1, "vbr"),
830 DECLARE_REG (2, "epsr"),
831 DECLARE_REG (3, "fpsr"),
832 DECLARE_REG (4, "epc"),
833 DECLARE_REG (5, "fpc"),
834 DECLARE_REG (6, "ss0"),
835 DECLARE_REG (7, "ss1"),
836 DECLARE_REG (8, "ss2"),
837 DECLARE_REG (9, "ss3"),
838 DECLARE_REG (10, "ss4"),
839 DECLARE_REG (11, "gcr"),
840 DECLARE_REG (12, "gsr"),
841 DECLARE_REG (13, "cpid"),
842 DECLARE_REG (14, "dcsr"),
843 DECLARE_REG (15, NULL
),
844 DECLARE_REG (16, NULL
),
845 DECLARE_REG (17, "cfr"),
846 DECLARE_REG (18, "ccr"),
847 DECLARE_REG (19, "capr"),
848 DECLARE_REG (20, "pacr"),
849 DECLARE_REG (21, "prsr"),
850 DECLARE_REG (22, "cir"),
851 DECLARE_REG (23, "ccr2"),
852 DECLARE_REG (24, NULL
),
853 DECLARE_REG (25, "cer2"),
854 DECLARE_REG (26, NULL
),
855 DECLARE_REG (27, NULL
),
856 DECLARE_REG (28, "rvbr"),
857 DECLARE_REG (29, "rmr"),
858 DECLARE_REG (30, "mpid"),
861 #define DECLARE_REG(regno, abi_name, support) \
862 {0, regno, "cr<"#regno", 0>", abi_name, support, NULL}
863 DECLARE_REG (31, "chr", REG_SUPPORT_E
),
864 DECLARE_REG (31, "hint", REG_SUPPORT_C
),
868 #define DECLARE_REG(regno, abi_name) \
869 {1, regno, "cr<"#regno", 1>", abi_name, REG_SUPPORT_ALL, NULL}
871 DECLARE_REG (14, "usp"),
872 DECLARE_REG (26, "cindex"),
873 DECLARE_REG (27, "cdata0"),
874 DECLARE_REG (28, "cdata1"),
875 DECLARE_REG (29, "cdata2"),
876 DECLARE_REG (30, "cdata3"),
877 DECLARE_REG (31, "cins"),
881 #define DECLARE_REG(regno, abi_name) \
882 {2, regno, "cr<"#regno", 2>", abi_name, REG_SUPPORT_ALL, NULL}
884 DECLARE_REG (0, "fid"),
885 DECLARE_REG (1, "fcr"),
886 DECLARE_REG (2, "fesr"),
890 #define DECLARE_REG(regno, abi_name) \
891 {3, regno, "cr<"#regno", 3>", abi_name, REG_SUPPORT_ALL, NULL}
892 DECLARE_REG (8, "dcr"),
893 DECLARE_REG (8, "sedcr"),
894 DECLARE_REG (9, "pcr"),
895 DECLARE_REG (9, "sepcr"),
899 #define DECLARE_REG(regno, abi_name) \
900 {15, regno, "cr<"#regno", 15>", abi_name, REG_SUPPORT_ALL, NULL}
902 DECLARE_REG (0, "mir"),
903 DECLARE_REG (2, "mel0"),
904 DECLARE_REG (3, "mel1"),
905 DECLARE_REG (4, "meh"),
906 DECLARE_REG (6, "mpr"),
907 DECLARE_REG (8, "mcir"),
908 DECLARE_REG (28, "mpgd0"),
909 DECLARE_REG (29, "mpgd"),
910 DECLARE_REG (29, "mpgd1"),
911 DECLARE_REG (30, "msa0"),
912 DECLARE_REG (31, "msa1"),
914 {-1, -1, NULL
, NULL
, 0, NULL
},
917 /* Get register name according to giving parameters,
918 IS_ABI controls whether is ABI name or not. */
919 static inline const char *
920 get_register_name (struct csky_reg_def
*reg_table
,
921 int arch
, int bank
, int regno
, int is_abi
)
923 static char regname
[64] = {0};
925 while (reg_table
[i
].name
!= NULL
)
927 if (reg_table
[i
].bank
== bank
928 && reg_table
[i
].regno
== regno
929 && (reg_table
[i
].arch_flag
& (1u << (arch
& CSKY_ARCH_MASK
))))
931 if (is_abi
&& reg_table
[i
].abi_name
)
932 return reg_table
[i
].abi_name
;
934 return reg_table
[i
].name
;
939 if (bank
& 0x80000000)
940 return "unkown register";
942 sprintf (regname
, "cr<%d, %d>", regno
, bank
);
947 /* Get register number according to giving parameters.
948 If not found, return -1. */
950 get_register_number (struct csky_reg_def
*reg_table
,
951 int arch
, char *s
, char **end
, int *bank
)
955 while (reg_table
[i
].name
!= NULL
)
957 len
= strlen (reg_table
[i
].name
);
958 if ((strncasecmp (reg_table
[i
].name
, s
, len
) == 0)
959 && !(ISDIGIT (s
[len
]))
960 && (reg_table
[i
].arch_flag
& (1u << (arch
& CSKY_ARCH_MASK
))))
963 *bank
= reg_table
[i
].bank
;
964 return reg_table
[i
].regno
;
967 if (reg_table
[i
].abi_name
== NULL
)
973 len
= strlen (reg_table
[i
].abi_name
);
974 if ((strncasecmp (reg_table
[i
].abi_name
, s
, len
) == 0)
975 && !(ISALNUM (s
[len
]))
976 && (reg_table
[i
].arch_flag
& (1u << (arch
& CSKY_ARCH_MASK
))))
979 *bank
= reg_table
[i
].bank
;
980 return reg_table
[i
].regno
;
987 /* Return general register's name. */
988 static inline const char *
989 csky_get_general_reg_name (int arch
, int regno
, int is_abi
)
991 struct csky_reg_def
*reg_table
;
993 if (IS_CSKY_ARCH_V1 (arch
))
994 reg_table
= csky_abiv1_general_regs
;
996 reg_table
= csky_abiv2_general_regs
;
998 return get_register_name (reg_table
, arch
, GENERAL_REG_BANK
, regno
, is_abi
);
1001 /* Return general register's number. */
1003 csky_get_general_regno (int arch
, char *s
, char **end
)
1005 struct csky_reg_def
*reg_table
;
1008 if (IS_CSKY_ARCH_V1 (arch
))
1009 reg_table
= csky_abiv1_general_regs
;
1011 reg_table
= csky_abiv2_general_regs
;
1013 return get_register_number (reg_table
, arch
, s
, end
, &bank
);
1016 /* Return control register's name. */
1017 static inline const char *
1018 csky_get_control_reg_name (int arch
, int bank
, int regno
, int is_abi
)
1020 struct csky_reg_def
*reg_table
;
1022 if (IS_CSKY_ARCH_V1 (arch
))
1023 reg_table
= csky_abiv1_control_regs
;
1025 reg_table
= csky_abiv2_control_regs
;
1027 return get_register_name (reg_table
, arch
, bank
, regno
, is_abi
);
1030 /* Return control register's number. */
1032 csky_get_control_regno (int arch
, char *s
, char **end
, int *bank
)
1034 struct csky_reg_def
*reg_table
;
1036 if (IS_CSKY_ARCH_V1 (arch
))
1037 reg_table
= csky_abiv1_control_regs
;
1039 reg_table
= csky_abiv2_control_regs
;
1041 return get_register_number (reg_table
, arch
, s
, end
, bank
);
1044 /* C-SKY V1 opcodes. */
1045 const struct csky_opcode csky_v1_opcodes
[] =
1052 OPCODE_INFO0 (0x0000),
1055 OPCODE_INFO0 (0x0001),
1060 OPCODE_INFO0 (0x0003),
1065 OPCODE_INFO0 (0x0004),
1068 OPCODE_INFO0 (0x0005),
1071 OPCODE_INFO0 (0x0006),
1074 OPCODE_INFO0 (0x0007),
1077 OPCODE_INFO1 (0x0008,
1078 (0_1
, IMM2b
, OPRND_SHIFT_0_BIT
)),
1081 OPCODE_INFO0 (0x000c),
1084 OPCODE_INFO0 (0x000d),
1087 OPCODE_INFO1 (0x0010,
1088 (0_3
, CPIDX
, OPRND_SHIFT_0_BIT
)),
1091 OPCODE_INFO1 (0x0020,
1092 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1095 OPCODE_INFO1 (0x0030,
1096 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1099 OPCODE_INFO2 (0x0040,
1100 (NONE
, REGr4_r7
, OPRND_SHIFT_0_BIT
),
1101 (0_3
, REGnr4_r7
, OPRND_SHIFT_0_BIT
)),
1104 OPCODE_INFO2 (0x0050,
1105 (NONE
, REGr4_r7
, OPRND_SHIFT_0_BIT
),
1106 (0_3
, REGnr4_r7
, OPRND_SHIFT_0_BIT
)),
1109 OPCODE_INFO2 (0x0060,
1110 (0_3
, REGLIST_DASH
, OPRND_SHIFT_0_BIT
),
1111 (NONE
, REGbsp
, OPRND_SHIFT_0_BIT
)),
1114 OPCODE_INFO2 (0x0070,
1115 (0_3
, REGLIST_DASH
, OPRND_SHIFT_0_BIT
),
1116 (NONE
, REGbsp
, OPRND_SHIFT_0_BIT
)),
1119 OPCODE_INFO3 (0x0080,
1120 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1121 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1122 (NONE
, CONST1
, OPRND_SHIFT_0_BIT
)),
1123 OPCODE_INFO1 (0x0080,
1124 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1127 OPCODE_INFO3 (0x0090,
1128 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1129 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1130 (NONE
, CONST1
, OPRND_SHIFT_0_BIT
)),
1131 OPCODE_INFO1 (0x0090,
1132 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1135 OPCODE_INFO3 (0x00a0,
1136 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1137 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1138 (NONE
, CONST1
, OPRND_SHIFT_0_BIT
)),
1139 OPCODE_INFO1 (0x00a0,
1140 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1143 OPCODE_INFO3 (0x00b0,
1144 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1145 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1146 (NONE
, CONST1
, OPRND_SHIFT_0_BIT
)),
1147 OPCODE_INFO1 (0x00b0,
1148 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1153 OPCODE_INFO1 (0x00c0,
1154 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1159 OPCODE_INFO1 (0x00d0,
1160 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1163 OPCODE_INFO2 (0x00e0,
1164 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1165 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
)),
1166 OPCODE_INFO1 (0x00e0,
1167 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1170 OPCODE_INFO2 (0x00f0,
1171 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1172 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
)),
1173 OPCODE_INFO1 (0x00f0,
1174 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1177 OPCODE_INFO2 (0x0100,
1178 (NONE
, REG_r1a
, OPRND_SHIFT_0_BIT
),
1179 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1180 OPCODE_INFO1 (0x0100,
1181 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1184 OPCODE_INFO2 (0x0110,
1185 (NONE
, REG_r1a
, OPRND_SHIFT_0_BIT
),
1186 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1187 OPCODE_INFO1 (0x0110,
1188 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1191 OPCODE_INFO2 (0x0120,
1192 (NONE
, REG_r1a
, OPRND_SHIFT_0_BIT
),
1193 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1194 OPCODE_INFO1 (0x0120,
1195 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1198 OPCODE_INFO2 (0x0130,
1199 (NONE
, REG_r1a
, OPRND_SHIFT_0_BIT
),
1200 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1201 OPCODE_INFO1 (0x0130,
1202 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1205 OPCODE_INFO2 (0x0140,
1206 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1207 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
)),
1208 OPCODE_INFO1 (0x0140,
1209 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1212 OPCODE_INFO2 (0x0150,
1213 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1214 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
)),
1215 OPCODE_INFO1 (0x0150,
1216 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1219 OPCODE_INFO2 (0x0160,
1220 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1221 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
)),
1222 OPCODE_INFO1 (0x0160,
1223 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1226 OPCODE_INFO2 (0x0170,
1227 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1228 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
)),
1229 OPCODE_INFO1 (0x0170,
1230 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1233 OPCODE_INFO3 (0x0180,
1234 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1235 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1236 (NONE
, CONST1
, OPRND_SHIFT_0_BIT
)),
1237 OPCODE_INFO1 (0x0180,
1238 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1241 OPCODE_INFO1 (0x0190,
1242 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1245 OPCODE_INFO3 (0x01a0,
1246 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1247 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1248 (NONE
, CONST1
, OPRND_SHIFT_0_BIT
)),
1249 OPCODE_INFO1 (0x01a0,
1250 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1253 OPCODE_INFO3 (0x01b0,
1254 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1255 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1256 (NONE
, CONST1
, OPRND_SHIFT_0_BIT
)),
1257 OPCODE_INFO1 (0x01b0,
1258 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1261 OPCODE_INFO1 (0x01c0,
1262 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1265 OPCODE_INFO1 (0x01d0,
1266 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1269 OPCODE_INFO2 (0x01e0,
1270 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1271 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
)),
1272 OPCODE_INFO1 (0x01e0,
1273 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1276 OPCODE_INFO2 (0x01f0,
1277 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1278 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
)),
1279 OPCODE_INFO1 (0x01f0,
1280 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1283 OPCODE_INFO2 (0x0200,
1284 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1285 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1288 OPCODE_INFO3 (0x0300,
1289 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1290 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1291 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1292 OPCODE_INFO2 (0x0300,
1293 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1294 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1297 OPCODE_INFO2 (0x0400,
1298 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1299 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1302 OPCODE_INFO3 (0x0500,
1303 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1304 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1305 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1306 OPCODE_INFO2 (0x0500,
1307 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1308 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1311 OPCODE_INFO3 (0x0500,
1312 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1313 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1314 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1315 OPCODE_INFO2 (0x0500,
1316 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1317 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1320 OPCODE_INFO3 (0x0600,
1321 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1322 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1323 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1324 OPCODE_INFO2 (0x0600,
1325 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1326 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1329 OPCODE_INFO3 (0x0700,
1330 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1331 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1332 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1333 OPCODE_INFO2 (0x0700,
1334 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1335 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1338 OPCODE_INFO2 (0x0800,
1339 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1340 (4_8
, CPREG
, OPRND_SHIFT_0_BIT
)),
1343 OPCODE_INFO2 (0x0a00,
1344 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1345 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1348 OPCODE_INFO3 (0x0b00,
1349 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1350 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1351 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1352 OPCODE_INFO2 (0x0b00,
1353 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1354 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1357 OPCODE_INFO2 (0x0c00,
1358 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1359 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1362 OPCODE_INFO2 (0x0d00,
1363 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1364 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1367 OPCODE_INFO2 (0x0e00,
1368 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1369 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1372 OPCODE_INFO2 (0x0f00,
1373 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1374 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1377 OPCODE_INFO2 (0x1000,
1378 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1379 (4_8
, CTRLREG
, OPRND_SHIFT_0_BIT
)),
1382 OPCODE_INFO_LIST (0x11f0,
1383 (0_2
, PSR_BITS_LIST
, OPRND_SHIFT_0_BIT
)),
1386 OPCODE_INFO_LIST (0x11f8,
1387 (0_2
, PSR_BITS_LIST
, OPRND_SHIFT_0_BIT
)),
1390 OPCODE_INFO2 (0x1200,
1391 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1392 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1395 OPCODE_INFO2 (0x1300,
1396 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1397 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1400 OPCODE_INFO3 (0x1400,
1401 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1402 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1403 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1404 OPCODE_INFO2 (0x1400,
1405 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1406 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1409 OPCODE_INFO3 (0x1500,
1410 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1411 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1412 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1413 OPCODE_INFO2 (0x1500,
1414 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1415 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1418 OPCODE_INFO3 (0x1600,
1419 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1420 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1421 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1422 OPCODE_INFO2 (0x1600,
1423 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1424 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1427 OPCODE_INFO3 (0x1700,
1428 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1429 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1430 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1431 OPCODE_INFO2 (0x1700,
1432 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1433 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1436 OPCODE_INFO2 (0x1800,
1437 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1438 (4_8
, CTRLREG
, OPRND_SHIFT_0_BIT
)),
1441 OPCODE_INFO3 (0x1a00,
1442 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1443 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1444 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1445 OPCODE_INFO2 (0x1a00,
1446 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1447 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1450 OPCODE_INFO3 (0x1b00,
1451 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1452 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1453 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1454 OPCODE_INFO2 (0x1b00,
1455 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1456 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1459 OPCODE_INFO3 (0x1c00,
1460 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1461 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1462 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1463 OPCODE_INFO2 (0x1c00,
1464 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1465 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1468 OPCODE_INFO2 (0x1c00,
1469 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1470 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1473 OPCODE_INFO3 (0x1d00,
1474 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1475 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1476 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1477 OPCODE_INFO2 (0x1d00,
1478 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1479 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1482 OPCODE_INFO3 (0x1e00,
1483 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1484 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1485 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1486 OPCODE_INFO2 (0x1e00,
1487 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1488 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1491 OPCODE_INFO3 (0x1f00,
1492 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1493 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1494 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1495 OPCODE_INFO2 (0x1f00,
1496 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1497 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1500 OPCODE_INFO3 (0x2000,
1501 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1502 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1503 (4_8
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
1504 OPCODE_INFO2 (0x2000,
1505 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1506 (4_8
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
1509 OPCODE_INFO2 (0x2200,
1510 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1511 (4_8
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
1514 OPCODE_INFO3 (0x2400,
1515 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1516 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1517 (4_8
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
1518 OPCODE_INFO2 (0x2400,
1519 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1520 (4_8
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
1523 OPCODE_INFO2 (0x2600,
1524 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1525 (4_8
, CPREG
, OPRND_SHIFT_0_BIT
)),
1528 OPCODE_INFO3 (0x2800,
1529 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1530 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1531 (4_8
, IMM5b
, OPRND_SHIFT_0_BIT
)),
1532 OPCODE_INFO2 (0x2800,
1533 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1534 (4_8
, IMM5b
, OPRND_SHIFT_0_BIT
)),
1537 OPCODE_INFO2 (0x2a00,
1538 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1539 (4_8
, IMM5b
, OPRND_SHIFT_0_BIT
)),
1542 OPCODE_INFO2 (0x2c00,
1543 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1544 (4_8
, IMM5b_BMASKI
, OPRND_SHIFT_0_BIT
)),
1547 OPCODE_INFO3 (0x2c10,
1548 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1549 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1550 (NONE
, REG_r1b
, OPRND_SHIFT_0_BIT
)),
1551 OPCODE_INFO2 (0x2c10,
1552 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1553 (NONE
, REG_r1b
, OPRND_SHIFT_0_BIT
)),
1556 OPCODE_INFO1 (0x2c20,
1557 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1560 OPCODE_INFO1 (0x2c30,
1561 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1564 OPCODE_INFO1 (0x2c40,
1565 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1568 OPCODE_INFO1 (0x2c50,
1569 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1572 OPCODE_INFO1 (0x2c60,
1573 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1576 OPCODE_INFO1 (0x2c70,
1577 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1580 OPCODE_INFO3 (0x2e00,
1581 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1582 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1583 (4_8
, IMM5b
, OPRND_SHIFT_0_BIT
)),
1584 OPCODE_INFO2 (0x2e00,
1585 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1586 (4_8
, IMM5b
, OPRND_SHIFT_0_BIT
)),
1589 OPCODE_INFO3 (0x3000,
1590 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1591 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1592 (4_8
, IMM5b
, OPRND_SHIFT_0_BIT
)),
1593 OPCODE_INFO2 (0x3000,
1594 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1595 (4_8
, IMM5b
, OPRND_SHIFT_0_BIT
)),
1598 OPCODE_INFO2 (0x3200,
1599 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1600 (4_8
, IMM5b_7_31
, OPRND_SHIFT_0_BIT
)),
1603 OPCODE_INFO1 (0x3200,
1604 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1607 OPCODE_INFO3 (0x3210,
1608 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1609 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1610 (NONE
, REG_r1b
, OPRND_SHIFT_0_BIT
)),
1611 OPCODE_INFO2 (0x3210,
1612 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1613 (NONE
, REG_r1b
, OPRND_SHIFT_0_BIT
)),
1616 OPCODE_INFO1 (0x3220,
1617 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1620 OPCODE_INFO1 (0x3230,
1621 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1624 OPCODE_INFO3 (0x3400,
1625 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1626 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1627 (4_8
, IMM5b
, OPRND_SHIFT_0_BIT
)),
1628 OPCODE_INFO2 (0x3400,
1629 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1630 (4_8
, IMM5b
, OPRND_SHIFT_0_BIT
)),
1633 OPCODE_INFO2 (0x3600,
1634 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1635 (4_8
, IMM5b
, OPRND_SHIFT_0_BIT
)),
1638 OPCODE_INFO3 (0x3800,
1639 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1640 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1641 (4_8
, IMM5b_1_31
, OPRND_SHIFT_0_BIT
)),
1642 OPCODE_INFO2 (0x3800,
1643 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1644 (4_8
, IMM5b_1_31
, OPRND_SHIFT_0_BIT
)),
1647 OPCODE_INFO3 (0x3800,
1648 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1649 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1650 (NONE
, CONST1
, OPRND_SHIFT_0_BIT
)),
1651 OPCODE_INFO1 (0x3800,
1652 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1655 OPCODE_INFO3 (0x3a00,
1656 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1657 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1658 (NONE
, CONST1
, OPRND_SHIFT_0_BIT
)),
1659 OPCODE_INFO1 (0x3a00,
1660 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1663 OPCODE_INFO3 (0x3a00,
1664 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1665 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1666 (4_8
, IMM5b_1_31
, OPRND_SHIFT_0_BIT
)),
1667 OPCODE_INFO2 (0x3a00,
1668 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1669 (4_8
, IMM5b_1_31
, OPRND_SHIFT_0_BIT
)),
1672 OPCODE_INFO3 (0x3c00,
1673 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1674 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1675 (NONE
, CONST1
, OPRND_SHIFT_0_BIT
)),
1676 OPCODE_INFO1 (0x3c00,
1677 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1680 OPCODE_INFO3 (0x3c00,
1681 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1682 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1683 (4_8
, IMM5b_1_31
, OPRND_SHIFT_0_BIT
)),
1684 OPCODE_INFO2 (0x3c00,
1685 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1686 (4_8
, IMM5b_1_31
, OPRND_SHIFT_0_BIT
)),
1689 OPCODE_INFO3 (0x3e00,
1690 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1691 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1692 (NONE
, CONST1
, OPRND_SHIFT_0_BIT
)),
1693 OPCODE_INFO1 (0x3e00,
1694 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1697 OPCODE_INFO3 (0x3e00,
1698 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1699 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1700 (4_8
, IMM5b_1_31
, OPRND_SHIFT_0_BIT
)),
1701 OPCODE_INFO2 (0x3e00,
1702 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1703 (4_8
, IMM5b_1_31
, OPRND_SHIFT_0_BIT
)),
1706 SOPCODE_INFO2 (0x4000,
1707 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1708 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1709 (4_7
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
1712 SOPCODE_INFO2 (0x4000,
1713 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1714 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1715 (4_7
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
1718 SOPCODE_INFO2 (0x4000,
1719 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1720 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1721 (4_7
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
1724 SOPCODE_INFO2 (0x5000,
1725 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1726 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1727 (4_7
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
1730 SOPCODE_INFO2 (0x5000,
1731 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1732 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1733 (4_7
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
1736 SOPCODE_INFO2 (0x5000,
1737 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1738 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1739 (4_7
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
1742 OPCODE_INFO2 (0x4000,
1743 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1744 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1747 OPCODE_INFO2 (0x4100,
1748 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1749 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1752 OPCODE_INFO2 (0x4200,
1753 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1754 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1757 OPCODE_INFO2 (0x4300,
1758 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1759 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1762 OPCODE_INFO2 (0x5000,
1763 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1764 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1767 OPCODE_INFO2 (0x5100,
1768 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1769 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1772 OPCODE_INFO2 (0x5200,
1773 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1774 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1777 OPCODE_INFO2 (0x5400,
1778 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1779 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1782 OPCODE_INFO2 (0x5500,
1783 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1784 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1787 OPCODE_INFO2 (0x5600,
1788 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1789 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1792 OPCODE_INFO2 (0x5800,
1793 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1794 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1797 OPCODE_INFO2 (0x5900,
1798 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1799 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1802 OPCODE_INFO2 (0x5a00,
1803 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1804 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1807 OPCODE_INFO2 (0x5c00,
1808 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1809 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1812 OPCODE_INFO2 (0x5d00,
1813 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1814 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1817 OPCODE_INFO2 (0x5e00,
1818 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1819 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1822 OPCODE_INFO2 (0x6000,
1823 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1824 (4_10
, IMM7b
, OPRND_SHIFT_0_BIT
)),
1827 OPCODE_INFO3 (0x6800,
1828 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1829 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1830 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1831 OPCODE_INFO2 (0x6800,
1832 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1833 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1836 OPCODE_INFO3 (0x6800,
1837 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1838 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
1839 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1840 OPCODE_INFO2 (0x6800,
1841 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1842 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1845 OPCODE_INFO2 (0x6900,
1846 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1847 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1850 OPCODE_INFO2 (0x6a00,
1851 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1852 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1855 OPCODE_INFO2 (0x6b00,
1856 (0_2
, GREG0_7
, OPRND_SHIFT_0_BIT
),
1857 (3_7
, CPCREG
, OPRND_SHIFT_0_BIT
)),
1860 OPCODE_INFO2 (0x6c00,
1861 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1862 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1865 OPCODE_INFO2 (0x6d00,
1866 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1867 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1870 OPCODE_INFO2 (0x6e00,
1871 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1872 (4_7
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
1875 OPCODE_INFO2 (0x6f00,
1876 (0_2
, GREG0_7
, OPRND_SHIFT_0_BIT
),
1877 (3_7
, CPCREG
, OPRND_SHIFT_0_BIT
)),
1880 #define _RELOC16 BFD_RELOC_CKCORE_PCREL_IMM8BY4
1884 OPCODE_INFO1 (0x7000,
1885 (0_7
, OFF8b
, OPRND_SHIFT_2_BIT
)),
1890 OPCODE_INFO1 (0x7f00,
1891 (0_7
, OFF8b
, OPRND_SHIFT_2_BIT
)),
1893 OP16_WITH_WORK ("lrw",
1894 OPCODE_INFO2 (0x7000,
1895 (8_11
, REGnsplr
, OPRND_SHIFT_0_BIT
),
1896 (0_7
, CONSTANT
, OPRND_SHIFT_2_BIT
)),
1902 SOPCODE_INFO2 (0x8000,
1903 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1904 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1905 (4_7
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
1906 OPCODE_INFO2 (0x8000,
1907 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1908 (0_3
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
1911 SOPCODE_INFO2 (0x8000,
1912 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1913 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1914 (4_7
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
1915 OPCODE_INFO2 (0x8000,
1916 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1917 (0_3
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
1920 SOPCODE_INFO2 (0x8000,
1921 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1922 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1923 (4_7
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
1924 OPCODE_INFO2 (0x8000,
1925 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1926 (0_3
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
1929 SOPCODE_INFO2 (0x9000,
1930 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1931 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1932 (4_7
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
1933 OPCODE_INFO2 (0x9000,
1934 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1935 (0_3
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
1938 SOPCODE_INFO2 (0x9000,
1939 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1940 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1941 (4_7
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
1942 OPCODE_INFO2 (0x9000,
1943 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1944 (0_3
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
1947 SOPCODE_INFO2 (0x9000,
1948 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1949 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1950 (4_7
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
1951 OPCODE_INFO2 (0x9000,
1952 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1953 (0_3
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
1956 SOPCODE_INFO2 (0xa000,
1957 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1958 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1959 (4_7
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
1960 OPCODE_INFO2 (0xa000,
1961 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1962 (0_3
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
1965 SOPCODE_INFO2 (0xa000,
1966 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1967 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1968 (4_7
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
1969 OPCODE_INFO2 (0xa000,
1970 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1971 (0_3
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
1974 SOPCODE_INFO2 (0xb000,
1975 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1976 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1977 (4_7
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
1978 OPCODE_INFO2 (0xb000,
1979 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1980 (0_3
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
1983 SOPCODE_INFO2 (0xb000,
1984 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1985 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1986 (4_7
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
1987 OPCODE_INFO2 (0xb000,
1988 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1989 (0_3
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
1992 SOPCODE_INFO2 (0xc000,
1993 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1994 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1995 (4_7
, IMM_LDST
, OPRND_SHIFT_1_BIT
))),
1996 OPCODE_INFO2 (0xc000,
1997 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
1998 (0_3
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
2001 SOPCODE_INFO2 (0xc000,
2002 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2003 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2004 (4_7
, IMM_LDST
, OPRND_SHIFT_1_BIT
))),
2005 OPCODE_INFO2 (0xc000,
2006 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2007 (0_3
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
2010 SOPCODE_INFO2 (0xd000,
2011 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2012 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2013 (4_7
, IMM_LDST
, OPRND_SHIFT_1_BIT
))),
2014 OPCODE_INFO2 (0xd000,
2015 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2016 (0_3
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
2019 SOPCODE_INFO2 (0xd000,
2020 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2021 BRACKET_OPRND ((0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2022 (4_7
, IMM_LDST
, OPRND_SHIFT_1_BIT
))),
2023 OPCODE_INFO2 (0xd000,
2024 (8_11
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2025 (0_3
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
2029 #define _RELOC16 BFD_RELOC_CKCORE_PCREL_IMM11BY2
2031 OPCODE_INFO1 (0xe000,
2032 (0_10
, OFF11b
, OPRND_SHIFT_1_BIT
)),
2035 OPCODE_INFO1 (0xe800,
2036 (0_10
, OFF11b
, OPRND_SHIFT_1_BIT
)),
2041 OPCODE_INFO1 (0xf000,
2042 (0_10
, OFF11b
, OPRND_SHIFT_1_BIT
)),
2047 OPCODE_INFO1 (0xf800,
2048 (0_10
, OFF11b
, OPRND_SHIFT_1_BIT
)),
2056 OPCODE_INFO1 (0xe000,
2057 (0_10
, JBTF
, OPRND_SHIFT_0_BIT
)),
2060 OPCODE_INFO1 (0xe800,
2061 (0_10
, JBTF
, OPRND_SHIFT_0_BIT
)),
2066 OPCODE_INFO1 (0xf000,
2067 (0_10
, JBR
, OPRND_SHIFT_0_BIT
)),
2074 OP16_WITH_WORK ("jbsr",
2075 OPCODE_INFO1 (0xf800,
2076 (0_10
, JBSR
, OPRND_SHIFT_0_BIT
)),
2080 /* The following are aliases for other instructions. */
2081 /* rts -> jmp r15. */
2085 OPCODE_INFO0 (0x00CF),
2088 OPCODE_INFO0 (0x0002),
2091 OPCODE_INFO0 (0x0002),
2098 OPCODE_INFO0 (0x0c00),
2102 OPCODE_INFO0 (0x0f00),
2106 OPCODE_INFO1 (0x2200,
2107 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2109 /* cmplei rd,X -> cmplti rd,X+1 */
2111 OPCODE_INFO2 (0x2200,
2112 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2113 (4_8
, IMM5b
, OPRND_SHIFT_0_BIT
)),
2117 OPCODE_INFO1 (0x2800,
2118 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2122 OPCODE_INFO1 (0x2a00,
2123 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2127 OPCODE_INFO1 (0x37f0,
2128 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2130 /* bclri rx,log2(imm). */
2132 OPCODE_INFO2 (0x3000,
2133 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2134 (4_8
, IMM5b_POWER
, OPRND_SHIFT_0_BIT
)),
2136 /* bgeni rx,log2(imm). */
2138 OPCODE_INFO2 (0x3200,
2139 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2140 (4_8
, IMM5b_7_31_POWER
, OPRND_SHIFT_0_BIT
)),
2142 /* bseti rx,log2(imm). */
2144 OPCODE_INFO2 (0x3400,
2145 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2146 (4_8
, IMM5b_POWER
, OPRND_SHIFT_0_BIT
)),
2148 /* btsti rx,log2(imm). */
2150 OPCODE_INFO2 (0x3600,
2151 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2152 (4_8
, IMM5b_POWER
, OPRND_SHIFT_0_BIT
)),
2155 OPCODE_INFO2 (0x3800,
2156 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2157 (4_8
, IMM5b_RORI
, OPRND_SHIFT_0_BIT
)),
2160 OPCODE_INFO2 (0x3800,
2161 (0_3
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2162 (4_8
, IMM5b_RORI
, OPRND_SHIFT_0_BIT
)),
2166 OPCODE_INFO0 (0x1200),
2169 /* Float instruction with work. */
2170 OP16_WITH_WORK ("fabss",
2171 OPCODE_INFO3 (0xffe04400,
2172 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2173 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2174 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2177 OP16_WITH_WORK ("fnegs",
2178 OPCODE_INFO3 (0xffe04c00,
2179 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2180 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2181 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2184 OP16_WITH_WORK ("fsqrts",
2185 OPCODE_INFO3 (0xffe05400,
2186 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2187 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2188 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2191 OP16_WITH_WORK ("frecips",
2192 OPCODE_INFO3 (0xffe05c00,
2193 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2194 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2195 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2198 OP16_WITH_WORK ("fadds",
2199 OPCODE_INFO4 (0xffe38000,
2200 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2201 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2202 (10_14
, FREG
, OPRND_SHIFT_0_BIT
),
2203 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2206 OP16_WITH_WORK ("fsubs",
2207 OPCODE_INFO4 (0xffe48000,
2208 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2209 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2210 (10_14
, FREG
, OPRND_SHIFT_0_BIT
),
2211 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2212 CSKY_ISA_FLOAT_E1
, v1_work_fpu_fo
),
2213 OP16_WITH_WORK ("fmacs",
2214 OPCODE_INFO4 (0xffe58000,
2215 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2216 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2217 (10_14
, FREG
, OPRND_SHIFT_0_BIT
),
2218 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2221 OP16_WITH_WORK ("fmscs",
2222 OPCODE_INFO4 (0xffe68000,
2223 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2224 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2225 (10_14
, FREG
, OPRND_SHIFT_0_BIT
),
2226 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2229 OP16_WITH_WORK ("fmuls",
2230 OPCODE_INFO4 (0xffe78000,
2231 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2232 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2233 (10_14
, FREG
, OPRND_SHIFT_0_BIT
),
2234 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2237 OP16_WITH_WORK ("fdivs",
2238 OPCODE_INFO4 (0xffe88000,
2239 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2240 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2241 (10_14
, FREG
, OPRND_SHIFT_0_BIT
),
2242 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2245 OP16_WITH_WORK ("fnmacs",
2246 OPCODE_INFO4 (0xffe98000,
2247 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2248 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2249 (10_14
, FREG
, OPRND_SHIFT_0_BIT
),
2250 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2253 OP16_WITH_WORK ("fnmscs",
2254 OPCODE_INFO4 (0xffea8000,
2255 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2256 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2257 (10_14
, FREG
, OPRND_SHIFT_0_BIT
),
2258 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2261 OP16_WITH_WORK ("fnmuls",
2262 OPCODE_INFO4 (0xffeb8000,
2263 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2264 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2265 (10_14
, FREG
, OPRND_SHIFT_0_BIT
),
2266 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2269 OP16_WITH_WORK ("fabsd",
2270 OPCODE_INFO3 (0xffe04000,
2271 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2272 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2273 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2276 OP16_WITH_WORK ("fnegd",
2277 OPCODE_INFO3 (0xffe04800,
2278 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2279 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2280 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2283 OP16_WITH_WORK ("fsqrtd",
2284 OPCODE_INFO3 (0xffe05000,
2285 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2286 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2287 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2290 OP16_WITH_WORK ("frecipd",
2291 OPCODE_INFO3 (0xffe05800,
2292 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2293 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2294 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2297 OP16_WITH_WORK ("faddd",
2298 OPCODE_INFO4 (0xffe30000,
2299 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2300 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2301 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2302 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2305 OP16_WITH_WORK ("fsubd",
2306 OPCODE_INFO4 (0xffe40000,
2307 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2308 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2309 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2310 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2313 OP16_WITH_WORK ("fmacd",
2314 OPCODE_INFO4 (0xffe50000,
2315 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2316 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2317 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2318 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2321 OP16_WITH_WORK ("fmscd",
2322 OPCODE_INFO4 (0xffe60000,
2323 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2324 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2325 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2326 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2329 OP16_WITH_WORK ("fmuld",
2330 OPCODE_INFO4 (0xffe70000,
2331 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2332 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2333 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2334 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2337 OP16_WITH_WORK ("fdivd",
2338 OPCODE_INFO4 (0xffe80000,
2339 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2340 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2341 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2342 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2345 OP16_WITH_WORK ("fnmacd",
2346 OPCODE_INFO4 (0xffe90000,
2347 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2348 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2349 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2350 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2353 OP16_WITH_WORK ("fnmscd",
2354 OPCODE_INFO4 (0xffea0000,
2355 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2356 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2357 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2358 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2361 OP16_WITH_WORK ("fnmuld",
2362 OPCODE_INFO4 (0xffeb0000,
2363 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2364 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2365 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2366 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2369 OP16_WITH_WORK ("fabsm",
2370 OPCODE_INFO3 (0xffe06000,
2371 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2372 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2373 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2376 OP16_WITH_WORK ("fnegm",
2377 OPCODE_INFO3 (0xffe06400,
2378 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2379 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2380 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2383 OP16_WITH_WORK ("faddm",
2384 OPCODE_INFO4 (0xffec0000,
2385 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2386 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2387 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2388 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2391 OP16_WITH_WORK ("fsubm",
2392 OPCODE_INFO4 (0xffec8000,
2393 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2394 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2395 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2396 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2399 OP16_WITH_WORK ("fmacm",
2400 OPCODE_INFO4 (0xffed8000,
2401 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2402 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2403 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2404 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2407 OP16_WITH_WORK ("fmscm",
2408 OPCODE_INFO4 (0xffee0000,
2409 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2410 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2411 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2412 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2415 OP16_WITH_WORK ("fmulm",
2416 OPCODE_INFO4 (0xffed0000,
2417 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2418 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2419 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2420 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2423 OP16_WITH_WORK ("fnmacm",
2424 OPCODE_INFO4 (0xffee8000,
2425 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2426 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2427 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2428 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2431 OP16_WITH_WORK ("fnmscm",
2432 OPCODE_INFO4 (0xffef0000,
2433 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2434 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2435 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2436 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2439 OP16_WITH_WORK ("fnmulm",
2440 OPCODE_INFO4 (0xffef8000,
2441 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2442 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2443 (10_14
, FEREG
, OPRND_SHIFT_0_BIT
),
2444 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2447 OP16_WITH_WORK ("fcmphsd",
2448 OPCODE_INFO3 (0xffe00800,
2449 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2450 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2451 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2454 OP16_WITH_WORK ("fcmpltd",
2455 OPCODE_INFO3 (0xffe00c00,
2456 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2457 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2458 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2461 OP16_WITH_WORK ("fcmpned",
2462 OPCODE_INFO3 (0xffe01000,
2463 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2464 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2465 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2468 OP16_WITH_WORK ("fcmpuod",
2469 OPCODE_INFO3 (0xffe01400,
2470 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2471 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2472 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2475 OP16_WITH_WORK ("fcmphss",
2476 OPCODE_INFO3 (0xffe01800,
2477 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2478 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2479 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2482 OP16_WITH_WORK ("fcmplts",
2483 OPCODE_INFO3 (0xffe01c00,
2484 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2485 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2486 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2489 OP16_WITH_WORK ("fcmpnes",
2490 OPCODE_INFO3 (0xffe02000,
2491 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2492 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2493 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2496 OP16_WITH_WORK ("fcmpuos",
2497 OPCODE_INFO3 (0xffe02400,
2498 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2499 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2500 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2503 OP16_WITH_WORK ("fcmpzhsd",
2504 OPCODE_INFO2 (0xffe00400,
2505 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2506 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2509 OP16_WITH_WORK ("fcmpzltd",
2510 OPCODE_INFO2 (0xffe00480,
2511 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2512 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2515 OP16_WITH_WORK ("fcmpzned",
2516 OPCODE_INFO2 (0xffe00500,
2517 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2518 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2521 OP16_WITH_WORK ("fcmpzuod",
2522 OPCODE_INFO2 (0xffe00580,
2523 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2524 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2527 OP16_WITH_WORK ("fcmpzhss",
2528 OPCODE_INFO2 (0xffe00600,
2529 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2530 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2533 OP16_WITH_WORK ("fcmpzlts",
2534 OPCODE_INFO2 (0xffe00680,
2535 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2536 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2539 OP16_WITH_WORK ("fcmpznes",
2540 OPCODE_INFO2 (0xffe00700,
2541 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2542 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2545 OP16_WITH_WORK ("fcmpzuos",
2546 OPCODE_INFO2 (0xffe00780,
2547 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2548 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2551 OP16_WITH_WORK ("fstod",
2552 OPCODE_INFO3 (0xffe02800,
2553 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2554 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2555 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2558 OP16_WITH_WORK ("fdtos",
2559 OPCODE_INFO3 (0xffe02c00,
2560 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2561 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2562 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2565 OP16_WITH_WORK ("fsitos",
2566 OPCODE_INFO3 (0xffe03400,
2567 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2568 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2569 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2572 OP16_WITH_WORK ("fsitod",
2573 OPCODE_INFO3 (0xffe03000,
2574 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2575 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2576 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2579 OP16_WITH_WORK ("fuitos",
2580 OPCODE_INFO3 (0xffe03c00,
2581 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2582 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2583 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2586 OP16_WITH_WORK ("fuitod",
2587 OPCODE_INFO3 (0xffe03800,
2588 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2589 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2590 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2593 OP16_WITH_WORK ("fstosi",
2594 OPCODE_INFO4 (0xffe10000,
2595 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2596 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2597 (13_17
, RM
, OPRND_SHIFT_0_BIT
),
2598 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2601 OP16_WITH_WORK ("fdtosi",
2602 OPCODE_INFO4 (0xffe08000,
2603 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2604 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2605 (13_17
, RM
, OPRND_SHIFT_0_BIT
),
2606 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2609 OP16_WITH_WORK ("fstoui",
2610 OPCODE_INFO4 (0xffe20000,
2611 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2612 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2613 (13_17
, RM
, OPRND_SHIFT_0_BIT
),
2614 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2617 OP16_WITH_WORK ("fdtoui",
2618 OPCODE_INFO4 (0xffe18000,
2619 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2620 (0_4
, FEREG
, OPRND_SHIFT_0_BIT
),
2621 (13_17
, RM
, OPRND_SHIFT_0_BIT
),
2622 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2625 OP16_WITH_WORK ("fmovd",
2626 OPCODE_INFO3 (0xffe06800,
2627 (5_9
, FEREG
, OPRND_SHIFT_0_BIT
),
2628 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2629 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2632 OP16_WITH_WORK ("fmovs",
2633 OPCODE_INFO3 (0xffe06c00,
2634 (5_9
, FREG
, OPRND_SHIFT_0_BIT
),
2635 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
2636 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
2639 OP16_WITH_WORK ("fmts",
2640 OPCODE_INFO2 (0x00000000,
2641 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2642 (NONE
, FREG
, OPRND_SHIFT_0_BIT
)),
2645 OP16_WITH_WORK ("fmfs",
2646 OPCODE_INFO2 (0x00000000,
2647 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2648 (NONE
, FREG
, OPRND_SHIFT_0_BIT
)),
2651 OP16_WITH_WORK ("fmtd",
2652 OPCODE_INFO2 (0x00000000,
2653 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2654 (NONE
, FEREG
, OPRND_SHIFT_0_BIT
)),
2656 v1_work_fpu_writed
),
2657 OP16_WITH_WORK ("fmfd",
2658 OPCODE_INFO2 (0x00000000,
2659 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
),
2660 (NONE
, FEREG
, OPRND_SHIFT_0_BIT
)),
2663 {NULL
, 0, {}, {}, 0, 0, 0, 0, 0, NULL
}
2671 /* C-SKY v2 opcodes. */
2672 const struct csky_opcode csky_v2_opcodes
[] =
2679 OPCODE_INFO0 (0x0000),
2681 OP16_WITH_WORK ("nie",
2682 OPCODE_INFO0 (0x1460),
2685 OP16_WITH_WORK ("nir",
2686 OPCODE_INFO0 (0x1461),
2689 OP16_WITH_WORK ("ipush",
2690 OPCODE_INFO0 (0x1462),
2693 OP16_WITH_WORK ("ipop",
2694 OPCODE_INFO0 (0x1463),
2698 OPCODE_INFO1 (0x14a0,
2699 (2_4
, GREG0_7
, OPRND_SHIFT_0_BIT
)),
2702 OPCODE_INFO1 (0x14a2,
2703 (2_4
, GREG0_7
, OPRND_SHIFT_0_BIT
)),
2706 OPCODE_INFO1 (0x14e0,
2707 (2_4
, GREG0_7
, OPRND_SHIFT_0_BIT
)),
2710 OPCODE_INFO1 (0x14e2,
2711 (2_4
, GREG0_7
, OPRND_SHIFT_0_BIT
)),
2714 OPCODE_INFO0 (0xc0001020),
2717 OPCODE_INFO0 (0xc0001420),
2720 OPCODE_INFO1 (0xc0001820,
2721 (21_24
, IMM4b
, OPRND_SHIFT_0_BIT
)),
2724 OPCODE_INFO1 (0xc0002020,
2725 (10_11
, IMM2b
, OPRND_SHIFT_0_BIT
)),
2727 /* Secure/nsecure world switch. */
2729 OPCODE_INFO0 (0xc0003c20),
2732 OPCODE_INFO2 (0xc0006420,
2733 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2734 (0_4or21_25
, CTRLREG
, OPRND_SHIFT_0_BIT
)),
2737 OPCODE_INFO2 (0xc0006020,
2738 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2739 (16_20or21_25
, CTRLREG
, OPRND_SHIFT_0_BIT
)),
2744 OPCODE_INFO0 (0xc0004020),
2747 OPCODE_INFO0 (0xc0004420),
2752 OPCODE_INFO0 (0xc0004820),
2755 OPCODE_INFO0 (0xc0004c20),
2758 OPCODE_INFO0 (0xc0005020),
2761 OPCODE_INFO0 (0xc0005420),
2764 OPCODE_INFO0 (0xc0005820),
2767 OPCODE_INFO_LIST (0xc0007020,
2768 (21_25
, PSR_BITS_LIST
, OPRND_SHIFT_0_BIT
)),
2771 OPCODE_INFO_LIST (0xc0007420,
2772 (21_25
, PSR_BITS_LIST
, OPRND_SHIFT_0_BIT
)),
2775 OPCODE_INFO2 (0xc4000200,
2776 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2777 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
2778 OPCODE_INFO1 (0xc4000200,
2779 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
)),
2782 OPCODE_INFO1 (0xc4000500,
2783 (0_4
, AREG
, OPRND_SHIFT_0_BIT
)),
2786 OPCODE_INFO3 (0xc4000c20,
2787 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
2788 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2789 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
2792 OPCODE_INFO2 (0xc4000c20,
2793 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
2794 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
2797 OPCODE_INFO3 (0xc4000c40,
2798 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
2799 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2800 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
2803 OPCODE_INFO2 (0xc4000c40,
2804 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
2805 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
2808 OPCODE_INFO3 (0xc4000c80,
2809 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
2810 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2811 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
2814 OPCODE_INFO3 (0xc4000d00,
2815 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
2816 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2817 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
2820 OPCODE_INFO3 (0xc4001020,
2821 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2822 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2823 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
2826 OPCODE_INFO3 (0xc4001040,
2827 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2828 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2829 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
2832 OPCODE_INFO3 (0xc4001080,
2833 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2834 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2835 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
2838 OPCODE_INFO1 (0xc4002c20,
2839 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
2842 OPCODE_INFO1 (0xc4002c40,
2843 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
2846 OPCODE_INFO3 (0xc4004900,
2847 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2848 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2849 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
2850 OPCODE_INFO2 (0xc4004900,
2851 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
2852 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
2855 OPCODE_INFO3 (0xc4004c20,
2856 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2857 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2858 (21_25
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
2861 OPCODE_INFO3 (0xc4004c40,
2862 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2863 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2864 (21_25
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
2867 OPCODE_INFO3 (0xc4004c80,
2868 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2869 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2870 (21_25
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
2871 OPCODE_INFO1 (0xc4004c80,
2872 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
)),
2875 OPCODE_INFO3 (0xc4004d00,
2876 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2877 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2878 (21_25
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
2881 OPCODE_INFO2 (0xc4005040,
2882 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2883 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
2886 OPCODE_INFO2 (0xc4006200,
2887 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2888 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
2889 OPCODE_INFO1 (0xc4006200,
2890 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
)),
2893 OPCODE_INFO2 (0xc4007020,
2894 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2895 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
2898 OPCODE_INFO2 (0xc4007040,
2899 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2900 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
2903 OPCODE_INFO2 (0xc4007080,
2904 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2905 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
2908 OPCODE_INFO2 (0xc4007100,
2909 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2910 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
2913 OPCODE_INFO2 (0xc4007c20,
2914 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2915 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
2918 OPCODE_INFO2 (0xc4007c40,
2919 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
2920 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
2921 OPCODE_INFO1 (0xc4007c40,
2922 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
)),
2925 OPCODE_INFO2 (0xc4008820,
2926 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2927 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
2930 OPCODE_INFO2 (0xc4008840,
2931 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2932 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
2935 OPCODE_INFO2 (0xc4008880,
2936 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2937 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
2940 OPCODE_INFO2 (0xc4008c20,
2941 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2942 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
2945 OPCODE_INFO2 (0xc4008c40,
2946 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2947 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
2950 OPCODE_INFO2 (0xc4008c80,
2951 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2952 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
2955 OPCODE_INFO2 (0xc4009040,
2956 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2957 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
2960 OPCODE_INFO2 (0xc4009080,
2961 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2962 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
2965 OPCODE_INFO2 (0xc4009440,
2966 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2967 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
2970 OPCODE_INFO2 (0xc4009500,
2971 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
2972 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
2975 OPCODE_INFO1 (0xc4009820,
2976 (0_4
, AREG
, OPRND_SHIFT_0_BIT
)),
2979 OPCODE_INFO1 (0xc4009880,
2980 (0_4
, AREG
, OPRND_SHIFT_0_BIT
)),
2983 OPCODE_INFO0 (0xc4009a00),
2986 OPCODE_INFO1 (0xc4009c20,
2987 (0_4
, AREG
, OPRND_SHIFT_0_BIT
)),
2990 OPCODE_INFO1 (0xc4009c40,
2991 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
2994 OPCODE_INFO1 (0xc4009c80,
2995 (0_4
, AREG
, OPRND_SHIFT_0_BIT
)),
2998 OPCODE_INFO1 (0xc4009d00,
2999 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
3002 OPCODE_INFO2 (0xc400b020,
3003 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3004 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
3007 OPCODE_INFO2 (0xc400b040,
3008 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3009 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
3012 OPCODE_INFO2 (0xc400b080,
3013 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3014 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
3017 OPCODE_INFO2 (0xc400b420,
3018 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3019 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
3022 OPCODE_INFO2 (0xc400b440,
3023 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3024 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
3027 OPCODE_INFO2 (0xc400b480,
3028 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3029 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
3032 SOPCODE_INFO2 (0xd0000000,
3033 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3034 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3035 (5_9or21_25
, AREG_WITH_LSHIFT
, OPRND_SHIFT_0_BIT
))),
3038 SOPCODE_INFO2 (0xd0001000,
3039 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3040 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3041 (5_9or21_25
, AREG_WITH_LSHIFT
, OPRND_SHIFT_0_BIT
))),
3044 SOPCODE_INFO2 (0xd0000400,
3045 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3046 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3047 (5_9or21_25
, AREG_WITH_LSHIFT
, OPRND_SHIFT_0_BIT
))),
3050 SOPCODE_INFO2 (0xd0001400,
3051 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3052 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3053 (5_9or21_25
, AREG_WITH_LSHIFT
, OPRND_SHIFT_0_BIT
))),
3056 SOPCODE_INFO2 (0xd0000800,
3057 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3058 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3059 (5_9or21_25
, AREG_WITH_LSHIFT
, OPRND_SHIFT_0_BIT
))),
3062 OPCODE_INFO2 (0xd0001c20,
3063 (0_4or21_25
, REGLIST_DASH
, OPRND_SHIFT_0_BIT
),
3064 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
3067 OPCODE_INFO2 (0xd0801c23,
3068 (NONE
, REGr4_r7
, OPRND_SHIFT_0_BIT
),
3069 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
3072 SOPCODE_INFO2 (0xd4000000,
3073 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3074 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3075 (5_9or21_25
, AREG_WITH_LSHIFT
, OPRND_SHIFT_0_BIT
))),
3078 SOPCODE_INFO2 (0xd4000400,
3079 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3080 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3081 (5_9or21_25
, AREG_WITH_LSHIFT
, OPRND_SHIFT_0_BIT
))),
3084 SOPCODE_INFO2 (0xd4000800,
3085 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3086 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3087 (5_9or21_25
, AREG_WITH_LSHIFT
, OPRND_SHIFT_0_BIT
))),
3090 OPCODE_INFO2 (0xd4001c20,
3091 (0_4or21_25
, REGLIST_DASH
, OPRND_SHIFT_0_BIT
),
3092 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
3095 OPCODE_INFO2 (0xd4801c23,
3096 (NONE
, REGr4_r7
, OPRND_SHIFT_0_BIT
),
3097 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
3100 SOPCODE_INFO2 (0xd8004000,
3101 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3102 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3103 (0_11
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
3106 SOPCODE_INFO2 (0xd8004000,
3107 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3108 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3109 (0_11
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
3112 SOPCODE_INFO2 (0xd8005000,
3113 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3114 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3115 (0_11
, IMM_LDST
, OPRND_SHIFT_1_BIT
))),
3118 SOPCODE_INFO2 (0xd8005000,
3119 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3120 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3121 (0_11
, IMM_LDST
, OPRND_SHIFT_1_BIT
))),
3124 SOPCODE_INFO2 (0xd8003000,
3125 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3126 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3127 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
3130 SOPCODE_INFO2 (0xd8007000,
3131 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3132 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3133 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
3136 SOPCODE_INFO2 (0xd8007000,
3137 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3138 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3139 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
3142 SOPCODE_INFO2 (0xd8007000,
3143 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3144 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3145 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
3148 SOPCODE_INFO2 (0xdc003000,
3149 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3150 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3151 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
3154 SOPCODE_INFO2 (0xdc007000,
3155 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3156 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3157 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
3160 SOPCODE_INFO2 (0xdc007000,
3161 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3162 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3163 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
3166 SOPCODE_INFO2 (0xdc007000,
3167 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3168 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3169 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
3172 OPCODE_INFO3 (0xe4002000,
3173 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3174 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3175 (0_11
, IMM12b
, OPRND_SHIFT_0_BIT
)),
3176 OPCODE_INFO2 (0xe4002000,
3177 (16_20or21_25
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
3178 (0_11
, IMM12b
, OPRND_SHIFT_0_BIT
)),
3181 OPCODE_INFO3 (0xe4003000,
3182 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3183 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3184 (0_11
, IMM12b
, OPRND_SHIFT_0_BIT
)),
3187 OPCODE_INFO3 (0xe4004000,
3188 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3189 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3190 (0_11
, IMM12b
, OPRND_SHIFT_0_BIT
)),
3193 OPCODE_INFO4 (0xc4005c00,
3194 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3195 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3196 (5_9
, MSB2SIZE
, OPRND_SHIFT_0_BIT
),
3197 (0_4
, LSB2SIZE
, OPRND_SHIFT_0_BIT
)),
3202 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM16BY4
3204 OPCODE_INFO1 (0xeac00000,
3205 (0_15
, OFF16b
, OPRND_SHIFT_2_BIT
)),
3213 OPCODE_INFO3 (0xf4000000,
3214 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3215 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3216 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3219 OPCODE_INFO3 (0xf4000020,
3220 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3221 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3222 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3225 OPCODE_INFO2 (0xf4000080,
3226 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3227 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3230 OPCODE_INFO2 (0xf40000c0,
3231 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3232 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3235 OPCODE_INFO2 (0xf40000e0,
3236 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3237 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3240 OPCODE_INFO1 (0xf4000100,
3241 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3244 OPCODE_INFO1 (0xf4000120,
3245 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3248 OPCODE_INFO1 (0xf4000140,
3249 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3252 OPCODE_INFO1 (0xf4000160,
3253 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3256 OPCODE_INFO2 (0xf4000180,
3257 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3258 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3261 OPCODE_INFO2 (0xf40001a0,
3262 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3263 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3266 OPCODE_INFO2 (0xf40001c0,
3267 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3268 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3271 OPCODE_INFO2 (0xf40001e0,
3272 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3273 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3276 OPCODE_INFO3 (0xf4000200,
3277 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3278 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3279 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3282 OPCODE_INFO3 (0xf4000280,
3283 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3284 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3285 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3288 OPCODE_INFO3 (0xf40002a0,
3289 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3290 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3291 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3294 OPCODE_INFO3 (0xf40002c0,
3295 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3296 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3297 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3300 OPCODE_INFO3 (0xf40002e0,
3301 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3302 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3303 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3306 OPCODE_INFO3 (0xf4000220,
3307 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3308 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3309 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3312 OPCODE_INFO3 (0xf4000300,
3313 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3314 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3315 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3318 OPCODE_INFO2 (0xf4000320,
3319 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3320 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3323 OPCODE_INFO2 (0xf4000340,
3324 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3325 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3328 OPCODE_INFO3 (0xf4000800,
3329 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3330 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3331 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3332 CSKY_ISA_FLOAT_1E2
),
3334 OPCODE_INFO3 (0xf4000820,
3335 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3336 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3337 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3338 CSKY_ISA_FLOAT_1E2
),
3340 OPCODE_INFO2 (0xf4000880,
3341 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3342 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3343 CSKY_ISA_FLOAT_1E2
),
3345 OPCODE_INFO2 (0xf40008c0,
3346 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3347 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3348 CSKY_ISA_FLOAT_1E2
),
3350 OPCODE_INFO2 (0xf40008e0,
3351 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3352 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3353 CSKY_ISA_FLOAT_1E2
),
3355 OPCODE_INFO1 (0xf4000900,
3356 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3357 CSKY_ISA_FLOAT_1E2
),
3359 OPCODE_INFO1 (0xf4000920,
3360 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3361 CSKY_ISA_FLOAT_1E2
),
3363 OPCODE_INFO1 (0xf4000940,
3364 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3365 CSKY_ISA_FLOAT_1E2
),
3367 OPCODE_INFO1 (0xf4000960,
3368 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3369 CSKY_ISA_FLOAT_1E2
),
3371 OPCODE_INFO2 (0xf4000980,
3372 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3373 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3374 CSKY_ISA_FLOAT_1E2
),
3376 OPCODE_INFO2 (0xf40009a0,
3377 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3378 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3379 CSKY_ISA_FLOAT_1E2
),
3381 OPCODE_INFO2 (0xf40009c0,
3382 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3383 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3384 CSKY_ISA_FLOAT_1E2
),
3386 OPCODE_INFO2 (0xf40009e0,
3387 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3388 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3389 CSKY_ISA_FLOAT_1E2
),
3391 OPCODE_INFO3 (0xf4000a00,
3392 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3393 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3394 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3395 CSKY_ISA_FLOAT_1E2
),
3397 OPCODE_INFO3 (0xf4000a20,
3398 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3399 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3400 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3401 CSKY_ISA_FLOAT_1E2
),
3403 OPCODE_INFO3 (0xf4000a80,
3404 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3405 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3406 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3407 CSKY_ISA_FLOAT_1E2
),
3409 OPCODE_INFO3 (0xf4000aa0,
3410 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3411 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3412 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3413 CSKY_ISA_FLOAT_1E2
),
3415 OPCODE_INFO3 (0xf4000ac0,
3416 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3417 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3418 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3419 CSKY_ISA_FLOAT_1E2
),
3421 OPCODE_INFO3 (0xf4000ae0,
3422 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3423 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3424 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3425 CSKY_ISA_FLOAT_1E2
),
3427 OPCODE_INFO3 (0xf4000b00,
3428 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3429 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3430 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3431 CSKY_ISA_FLOAT_1E2
),
3433 OPCODE_INFO2 (0xf4000b20,
3434 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3435 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3436 CSKY_ISA_FLOAT_1E2
),
3438 OPCODE_INFO2 (0xf4000b40,
3439 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3440 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3441 CSKY_ISA_FLOAT_1E2
),
3443 OPCODE_INFO3 (0xf4001000,
3444 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3445 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3446 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3447 CSKY_ISA_FLOAT_1E2
),
3449 OPCODE_INFO3 (0xf4001020,
3450 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3451 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3452 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3453 CSKY_ISA_FLOAT_1E2
),
3455 OPCODE_INFO2 (0xf4001080,
3456 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3457 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3458 CSKY_ISA_FLOAT_1E2
),
3460 OPCODE_INFO2 (0xf40010c0,
3461 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3462 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3463 CSKY_ISA_FLOAT_1E2
),
3465 OPCODE_INFO2 (0xf40010e0,
3466 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3467 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3468 CSKY_ISA_FLOAT_1E2
),
3470 OPCODE_INFO3 (0xf4001200,
3471 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3472 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3473 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3474 CSKY_ISA_FLOAT_1E2
),
3476 OPCODE_INFO3 (0xf4001220,
3477 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3478 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3479 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3480 CSKY_ISA_FLOAT_1E2
),
3482 OPCODE_INFO3 (0xf4001280,
3483 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3484 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3485 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3486 CSKY_ISA_FLOAT_1E2
),
3488 OPCODE_INFO3 (0xf40012a0,
3489 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3490 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3491 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3492 CSKY_ISA_FLOAT_1E2
),
3494 OPCODE_INFO3 (0xf40012c0,
3495 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3496 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3497 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3498 CSKY_ISA_FLOAT_1E2
),
3500 OPCODE_INFO3 (0xf40012e0,
3501 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3502 (16_19
, FREG
, OPRND_SHIFT_0_BIT
),
3503 (21_24
, FREG
, OPRND_SHIFT_0_BIT
)),
3504 CSKY_ISA_FLOAT_1E2
),
3506 OPCODE_INFO2 (0xf4001800,
3507 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3508 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3511 OPCODE_INFO2 (0xf4001820,
3512 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3513 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3516 OPCODE_INFO2 (0xf4001840,
3517 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3518 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3521 OPCODE_INFO2 (0xf4001860,
3522 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3523 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3526 OPCODE_INFO2 (0xf4001880,
3527 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3528 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3531 OPCODE_INFO2 (0xf40018a0,
3532 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3533 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3536 OPCODE_INFO2 (0xf40018c0,
3537 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3538 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3541 OPCODE_INFO2 (0xf40018e0,
3542 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3543 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3546 OPCODE_INFO2 (0xf4001900,
3547 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3548 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3549 CSKY_ISA_FLOAT_1E2
),
3551 OPCODE_INFO2 (0xf4001920,
3552 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3553 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3554 CSKY_ISA_FLOAT_1E2
),
3556 OPCODE_INFO2 (0xf4001940,
3557 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3558 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3559 CSKY_ISA_FLOAT_1E2
),
3561 OPCODE_INFO2 (0xf4001960,
3562 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3563 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3564 CSKY_ISA_FLOAT_1E2
),
3566 OPCODE_INFO2 (0xf4001980,
3567 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3568 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3569 CSKY_ISA_FLOAT_1E2
),
3571 OPCODE_INFO2 (0xf40019a0,
3572 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3573 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3574 CSKY_ISA_FLOAT_1E2
),
3576 OPCODE_INFO2 (0xf40019c0,
3577 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3578 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3579 CSKY_ISA_FLOAT_1E2
),
3581 OPCODE_INFO2 (0xf40019e0,
3582 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3583 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3584 CSKY_ISA_FLOAT_1E2
),
3586 OPCODE_INFO2 (0xf4001a00,
3587 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3588 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3591 OPCODE_INFO2 (0xf4001a20,
3592 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3593 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3596 OPCODE_INFO2 (0xf4001a80,
3597 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3598 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3599 CSKY_ISA_FLOAT_1E2
),
3601 OPCODE_INFO2 (0xf4001aa0,
3602 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3603 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3604 CSKY_ISA_FLOAT_1E2
),
3606 OPCODE_INFO2 (0xf4001ac0,
3607 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3608 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3609 CSKY_ISA_FLOAT_1E2
),
3611 OPCODE_INFO2 (0xf4001ae0,
3612 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3613 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3614 CSKY_ISA_FLOAT_1E2
),
3616 OPCODE_INFO2 (0xf4001b00,
3617 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3618 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3619 CSKY_ISA_FLOAT_1E2
),
3621 OPCODE_INFO2 (0xf4001b20,
3622 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3623 (16_19
, FREG
, OPRND_SHIFT_0_BIT
)),
3626 OPCODE_INFO2 (0xf4001b40,
3627 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3628 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
3629 CSKY_ISA_FLOAT_1E2
),
3631 OPCODE_INFO2 (0xf4001b60,
3632 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3633 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
3636 SOPCODE_INFO2 (0xf4002000,
3637 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3638 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3639 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_2_BIT
))),
3642 SOPCODE_INFO2 (0xf4002100,
3643 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3644 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3645 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_2_BIT
))),
3646 CSKY_ISA_FLOAT_1E2
),
3648 SOPCODE_INFO2 (0xf4002200,
3649 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3650 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3651 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_3_BIT
))),
3652 CSKY_ISA_FLOAT_1E2
),
3654 SOPCODE_INFO2 (0xf4002400,
3655 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3656 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3657 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_2_BIT
))),
3660 SOPCODE_INFO2 (0xf4002500,
3661 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3662 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3663 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_2_BIT
))),
3664 CSKY_ISA_FLOAT_1E2
),
3666 SOPCODE_INFO2 (0xf4002600,
3667 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3668 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3669 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_3_BIT
))),
3670 CSKY_ISA_FLOAT_1E2
),
3672 SOPCODE_INFO2 (0xf4002800,
3673 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3674 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3675 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
3678 SOPCODE_INFO2 (0xf4002c00,
3679 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3680 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3681 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
3684 SOPCODE_INFO2 (0xf4002900,
3685 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3686 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3687 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
3688 CSKY_ISA_FLOAT_1E2
),
3690 SOPCODE_INFO2 (0xf4002a00,
3691 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3692 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3693 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
3694 CSKY_ISA_FLOAT_1E2
),
3696 SOPCODE_INFO2 (0xf4002d00,
3697 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3698 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3699 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
3700 CSKY_ISA_FLOAT_1E2
),
3702 SOPCODE_INFO2 (0xf4002e00,
3703 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
3704 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3705 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
3706 CSKY_ISA_FLOAT_1E2
),
3708 OPCODE_INFO2 (0xf4003000,
3709 (0_3or21_24
, FREGLIST_DASH
, OPRND_SHIFT_0_BIT
),
3710 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
3713 OPCODE_INFO2 (0xf4003100,
3714 (0_3or21_24
, FREGLIST_DASH
, OPRND_SHIFT_0_BIT
),
3715 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
3716 CSKY_ISA_FLOAT_1E2
),
3718 OPCODE_INFO2 (0xf4003200,
3719 (0_3or21_24
, FREGLIST_DASH
, OPRND_SHIFT_0_BIT
),
3720 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
3721 CSKY_ISA_FLOAT_1E2
),
3723 OPCODE_INFO2 (0xf4003400,
3724 (0_3or21_24
, FREGLIST_DASH
, OPRND_SHIFT_0_BIT
),
3725 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
3728 OPCODE_INFO2 (0xf4003500,
3729 (0_3or21_24
, FREGLIST_DASH
, OPRND_SHIFT_0_BIT
),
3730 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
3731 CSKY_ISA_FLOAT_1E2
),
3733 OPCODE_INFO2 (0xf4003600,
3734 (0_3or21_24
, FREGLIST_DASH
, OPRND_SHIFT_0_BIT
),
3735 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
3736 CSKY_ISA_FLOAT_1E2
),
3738 OPCODE_INFO1 (0xc0001c20,
3739 (21_25
, OIMM5b_IDLY
, OPRND_SHIFT_0_BIT
)),
3740 OPCODE_INFO0 (0xc0601c20),
3744 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM18BY2
3746 OPCODE_INFO2 (0xcc0c0000,
3747 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
3748 (0_17
, IMM_OFF18b
, OPRND_SHIFT_1_BIT
)),
3753 OPCODE_INFO3 (0xc4000820,
3754 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3755 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3756 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
3757 OPCODE_INFO2 (0xc4000820,
3758 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
3759 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
3762 OPCODE_INFO3 (0xc4000840,
3763 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3764 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3765 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
3766 OPCODE_INFO2 (0xc4000840,
3767 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
3768 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
3771 OPCODE_INFO3 (0xc4000880,
3772 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3773 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3774 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
3777 OPCODE_INFO3 (0xc4008020,
3778 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3779 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3780 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
3781 OPCODE_INFO2 (0xc4008020,
3782 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
3783 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
3786 OPCODE_INFO3 (0xc4008040,
3787 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3788 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3789 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
3790 OPCODE_INFO2 (0xc4008040,
3791 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
3792 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
3795 SOPCODE_INFO1 (0xd8006000,
3796 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3797 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
3800 SOPCODE_INFO1 (0xdc006000,
3801 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3802 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
3805 SOPCODE_INFO2 (0xfc000000,
3806 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3807 ABRACKET_OPRND ((21_25
, IMM5b
, OPRND_SHIFT_0_BIT
),
3808 (0_11
, IMM12b
, OPRND_SHIFT_0_BIT
))),
3811 SOPCODE_INFO2 (0xfc001000,
3812 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3813 ABRACKET_OPRND ((21_25
, IMM5b
, OPRND_SHIFT_0_BIT
),
3814 (0_11
, IMM12b
, OPRND_SHIFT_0_BIT
))),
3817 SOPCODE_INFO2 (0xfc002000,
3818 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3819 ABRACKET_OPRND ((21_25
, IMM5b
, OPRND_SHIFT_0_BIT
),
3820 (0_11
, IMM12b
, OPRND_SHIFT_0_BIT
))),
3823 SOPCODE_INFO2 (0xfc003000,
3824 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3825 ABRACKET_OPRND ((21_25
, IMM5b
, OPRND_SHIFT_0_BIT
),
3826 (0_11
, IMM12b
, OPRND_SHIFT_0_BIT
))),
3829 SOPCODE_INFO1 (0xfc004000,
3830 ABRACKET_OPRND ((21_25
, IMM5b
, OPRND_SHIFT_0_BIT
),
3831 (0_11
, IMM12b
, OPRND_SHIFT_0_BIT
))),
3834 SOPCODE_INFO1 (0xfc008000,
3835 ABRACKET_OPRND ((21_25
, IMM5b
, OPRND_SHIFT_0_BIT
),
3836 (0_14or16_20
, IMM15b
, OPRND_SHIFT_0_BIT
))),
3840 OPCODE_INFO_LIST (0x14c0,
3841 (0_4
, REGLIST_DASH_COMMA
, OPRND_SHIFT_0_BIT
)),
3843 OPCODE_INFO_LIST (0xebe00000,
3844 (0_8
, REGLIST_DASH_COMMA
, OPRND_SHIFT_0_BIT
)),
3849 OPCODE_INFO_LIST (0x1480,
3850 (0_4
, REGLIST_DASH_COMMA
, OPRND_SHIFT_0_BIT
)),
3852 OPCODE_INFO_LIST (0xebc00000,
3853 (0_8
, REGLIST_DASH_COMMA
, OPRND_SHIFT_0_BIT
)),
3858 OPCODE_INFO2 (0x3000,
3859 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3860 (0_7
, IMM8b
, OPRND_SHIFT_0_BIT
)),
3862 OPCODE_INFO2 (0xea000000,
3863 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3864 (0_15
, IMM16b
, OPRND_SHIFT_0_BIT
)),
3866 /* bmaski will transfer to movi when imm < 17. */
3867 OP16_OP32 ("bmaski",
3868 OPCODE_INFO2 (0x3000,
3869 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3870 (0_7
, IMM8b_BMASKI
, OPRND_SHIFT_0_BIT
)),
3872 OPCODE_INFO2 (0xc4005020,
3873 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3874 (21_25
, OIMM5b_BMASKI
, OPRND_SHIFT_0_BIT
)),
3876 OP16_OP32 ("cmphsi",
3877 OPCODE_INFO2 (0x3800,
3878 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3879 (0_4
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
3881 OPCODE_INFO2 (0xeb000000,
3882 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3883 (0_15
, OIMM16b
, OPRND_SHIFT_0_BIT
)),
3885 OP16_OP32 ("cmplti",
3886 OPCODE_INFO2 (0x3820,
3887 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3888 (0_4
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
3890 OPCODE_INFO2 (0xeb200000,
3891 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3892 (0_15
, OIMM16b
, OPRND_SHIFT_0_BIT
)),
3894 OP16_OP32 ("cmpnei",
3895 OPCODE_INFO2 (0x3840,
3896 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3897 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3899 OPCODE_INFO2 (0xeb400000,
3900 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3901 (0_15
, IMM16b
, OPRND_SHIFT_0_BIT
)),
3906 OPCODE_INFO2 (0x38e0,
3907 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3908 (0_1
, IMM2b_JMPIX
, OPRND_SHIFT_0_BIT
)),
3910 OPCODE_INFO2 (0xe9e00000,
3911 (16_20
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3912 (0_1
, IMM2b_JMPIX
, OPRND_SHIFT_0_BIT
)),
3916 DOP16_DOP32 ("bclri",
3917 OPCODE_INFO2 (0x3880,
3918 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3919 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3920 OPCODE_INFO3 (0x3880,
3921 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3922 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
3923 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3925 OPCODE_INFO3 (0xc4002820,
3926 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3927 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3928 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3929 OPCODE_INFO2 (0xc4002820,
3930 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
3931 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3933 DOP16_DOP32 ("bseti",
3934 OPCODE_INFO2 (0x38a0,
3935 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3936 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3937 OPCODE_INFO3 (0x38a0,
3938 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3939 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
3940 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3942 OPCODE_INFO3 (0xc4002840,
3943 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3944 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3945 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3946 OPCODE_INFO2 (0xc4002840,
3947 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
3948 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3950 OP16_OP32_WITH_WORK ("btsti",
3951 OPCODE_INFO2 (0x38c0,
3952 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3953 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3955 OPCODE_INFO2 (0xc4002880,
3956 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3957 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3958 CSKYV2_ISA_1E2
, v2_work_btsti
),
3959 DOP16_DOP32 ("lsli",
3960 OPCODE_INFO3 (0x4000,
3961 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3962 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3963 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3964 OPCODE_INFO2 (0x4000,
3965 (5_7or8_10
, DUP_GREG0_7
, OPRND_SHIFT_0_BIT
),
3966 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3968 OPCODE_INFO3 (0xc4004820,
3969 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3970 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3971 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3972 OPCODE_INFO2 (0xc4004820,
3973 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
3974 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3976 DOP16_DOP32 ("lsri",
3977 OPCODE_INFO3 (0x4800,
3978 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3979 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3980 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3981 OPCODE_INFO2 (0x4800,
3982 (5_7or8_10
, DUP_GREG0_7
, OPRND_SHIFT_0_BIT
),
3983 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3985 OPCODE_INFO3 (0xc4004840,
3986 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
3987 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
3988 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3989 OPCODE_INFO2 (0xc4004840,
3990 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
3991 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3994 OPCODE_INFO3 (0x5000,
3995 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3996 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
3997 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
3999 OPCODE_INFO3 (0xc4004880,
4000 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4001 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4002 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
4004 DOP16_DOP32_WITH_WORK ("addc",
4005 OPCODE_INFO2 (0x6001,
4006 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4007 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4008 OPCODE_INFO3 (0x6001,
4009 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4010 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4011 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4013 OPCODE_INFO3 (0xc4000040,
4014 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4015 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4016 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4017 OPCODE_INFO2 (0xc4000040,
4018 (0_4or16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4019 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4022 DOP16_DOP32 ("subc",
4023 OPCODE_INFO2 (0x6003,
4024 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4025 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4026 OPCODE_INFO3 (0x6003,
4027 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4028 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
4029 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4031 OPCODE_INFO3 (0xc4000100,
4032 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4033 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4034 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4035 OPCODE_INFO2 (0xc4000100,
4036 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4037 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4040 OPCODE_INFO2 (0x6400,
4041 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4042 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4044 OPCODE_INFO2 (0xc4000420,
4045 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4046 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4049 OPCODE_INFO2 (0x6401,
4050 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4051 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4053 OPCODE_INFO2 (0xc4000440,
4054 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4055 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4058 OPCODE_INFO2 (0x6402,
4059 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4060 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4062 OPCODE_INFO2 (0xc4000480,
4063 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4064 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4067 OPCODE_INFO1 (0x6403,
4068 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4070 OPCODE_INFO1 (0xc4000600,
4071 (0_4
, AREG
, OPRND_SHIFT_0_BIT
)),
4074 OPCODE_INFO2 (0x6800,
4075 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4076 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4077 OPCODE_INFO3 (0x6800,
4078 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4079 (2_5
, 2IN1_DUMMY
, OPRND_SHIFT_0_BIT
),
4080 (2_5
, 2IN1_DUMMY
, OPRND_SHIFT_0_BIT
)),
4082 OPCODE_INFO3 (0xc4002020,
4083 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4084 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4085 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4086 OPCODE_INFO2 (0xc4002020,
4087 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4088 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4090 DOP16_DOP32 ("andn",
4091 OPCODE_INFO2 (0x6801,
4092 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4093 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4094 OPCODE_INFO3 (0x6801,
4095 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4096 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
4097 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4099 OPCODE_INFO3 (0xc4002040,
4100 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4101 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4102 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4103 OPCODE_INFO2 (0xc4002040,
4104 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4105 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4108 OPCODE_INFO2 (0x6802,
4109 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4110 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4112 OPCODE_INFO2 (0xc4002080,
4113 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4114 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4116 OP16_OP32 ("tstnbz",
4117 OPCODE_INFO1 (0x6803,
4118 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4120 OPCODE_INFO1 (0xc4002100,
4121 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
4124 OPCODE_INFO2 (0x6c00,
4125 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4126 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4127 OPCODE_INFO3 (0x6c00,
4128 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4129 (2_5
, 2IN1_DUMMY
, OPRND_SHIFT_0_BIT
),
4130 (2_5
, 2IN1_DUMMY
, OPRND_SHIFT_0_BIT
)),
4132 OPCODE_INFO3 (0xc4002420,
4133 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4134 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4135 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4136 OPCODE_INFO2 (0xc4002420,
4137 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4138 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4141 OPCODE_INFO2 (0x6c01,
4142 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4143 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4144 OPCODE_INFO3 (0x6c01,
4145 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4146 (2_5
, 2IN1_DUMMY
, OPRND_SHIFT_0_BIT
),
4147 (2_5
, 2IN1_DUMMY
, OPRND_SHIFT_0_BIT
)),
4149 OPCODE_INFO3 (0xc4002440,
4150 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4151 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4152 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4153 OPCODE_INFO2 (0xc4002440,
4154 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4155 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4158 OPCODE_INFO2 (0x6c02,
4159 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4160 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4161 OPCODE_INFO3 (0x6c02,
4162 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4163 (2_5
, 2IN1_DUMMY
, OPRND_SHIFT_0_BIT
),
4164 (2_5
, 2IN1_DUMMY
, OPRND_SHIFT_0_BIT
)),
4166 OPCODE_INFO3 (0xc4002480,
4167 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4168 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4169 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4170 OPCODE_INFO2 (0xc4002480,
4171 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4172 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4175 OPCODE_INFO2 (0x6c03,
4176 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4177 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4179 OPCODE_INFO2 (0xc4004820,
4180 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4181 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
4184 OPCODE_INFO0 (0x6c03),
4186 OPCODE_INFO0 (0xc4004820),
4189 OPCODE_INFO2 (0x7000,
4190 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4191 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4192 OPCODE_INFO3 (0x7000,
4193 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4194 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
4195 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4197 OPCODE_INFO3 (0xc4004020,
4198 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4199 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4200 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4201 OPCODE_INFO2 (0xc4004020,
4202 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4203 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4206 OPCODE_INFO2 (0x7001,
4207 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4208 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4209 OPCODE_INFO3 (0x7001,
4210 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4211 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
4212 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4214 OPCODE_INFO3 (0xc4004040,
4215 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4216 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4217 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4218 OPCODE_INFO2 (0xc4004040,
4219 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4220 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4223 OPCODE_INFO2 (0x7002,
4224 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4225 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4226 OPCODE_INFO3 (0x7002,
4227 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4228 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
4229 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4231 OPCODE_INFO3 (0xc4004080,
4232 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4233 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4234 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4235 OPCODE_INFO2 (0xc4004080,
4236 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4237 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4239 DOP16_DOP32 ("rotl",
4240 OPCODE_INFO2 (0x7003,
4241 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4242 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4243 OPCODE_INFO3 (0x7003,
4244 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4245 (NONE
, DUMMY_REG
, OPRND_SHIFT_0_BIT
),
4246 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4248 OPCODE_INFO3 (0xc4004100,
4249 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4250 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4251 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4252 OPCODE_INFO2 (0xc4004100,
4253 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4254 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4256 DOP16_DOP32 ("zextb",
4257 OPCODE_INFO2 (0x7400,
4258 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4259 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4260 OPCODE_INFO1 (0x7400,
4261 (2_5or6_9
, DUP_GREG0_15
, OPRND_SHIFT_0_BIT
)),
4263 OPCODE_INFO2 (0xc40054e0,
4264 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4265 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
4266 OPCODE_INFO1 (0xc40054e0,
4267 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
)),
4269 DOP16_DOP32 ("zexth",
4270 OPCODE_INFO2 (0x7401,
4271 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4272 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4273 OPCODE_INFO1 (0x7401,
4274 (2_5or6_9
, DUP_GREG0_15
, OPRND_SHIFT_0_BIT
)),
4276 OPCODE_INFO2 (0xc40055e0,
4277 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4278 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
4279 OPCODE_INFO1 (0xc40055e0,
4280 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
)),
4282 DOP16_DOP32 ("sextb",
4283 OPCODE_INFO2 (0x7402,
4284 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4285 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4286 OPCODE_INFO1 (0x7402,
4287 (2_5or6_9
, DUP_GREG0_15
, OPRND_SHIFT_0_BIT
)),
4289 OPCODE_INFO2 (0xc40058e0,
4290 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4291 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
4292 OPCODE_INFO1 (0xc40058e0,
4293 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
)),
4295 DOP16_DOP32 ("sexth",
4296 OPCODE_INFO2 (0x7403,
4297 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4298 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4299 OPCODE_INFO1 (0x7403,
4300 (2_5or6_9
, DUP_GREG0_15
, OPRND_SHIFT_0_BIT
)),
4302 OPCODE_INFO2 (0xc40059e0,
4303 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4304 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
4305 OPCODE_INFO1 (0xc40059e0,
4306 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
)),
4309 OPCODE_INFO4 (0xc4005400,
4310 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4311 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4312 (5_9
, IMM5b
, OPRND_SHIFT_0_BIT
),
4313 (21_25
, IMM5b_LS
, OPRND_SHIFT_0_BIT
)),
4316 OPCODE_INFO4 (0xc4005800,
4317 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4318 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4319 (5_9
, IMM5b
, OPRND_SHIFT_0_BIT
),
4320 (21_25
, IMM5b_LS
, OPRND_SHIFT_0_BIT
)),
4325 OPCODE_INFO0 (0x783c),
4327 OPCODE_INFO0 (0xe8cf0000),
4332 OPCODE_INFO1 (0x7800,
4333 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4335 OPCODE_INFO1 (0xe8c00000,
4336 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
4341 OPCODE_INFO2 (0x7802,
4342 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4343 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4345 OPCODE_INFO2 (0xc4006080,
4346 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4347 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
4350 OPCODE_INFO2 (0x7803,
4351 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4352 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4354 OPCODE_INFO2 (0xc4006100,
4355 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4356 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
4359 OPCODE_INFO1 (0x7bc1,
4360 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4362 OPCODE_INFO1 (0xe8e00000,
4363 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
4365 DOP16_DOP32 ("mult",
4366 OPCODE_INFO2 (0x7c00,
4367 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4368 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4369 OPCODE_INFO3 (0x7c00,
4370 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4371 (2_5
, 2IN1_DUMMY
, OPRND_SHIFT_0_BIT
),
4372 (2_5
, 2IN1_DUMMY
, OPRND_SHIFT_0_BIT
)),
4374 OPCODE_INFO3 (0xc4008420,
4375 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4376 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4377 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4378 OPCODE_INFO2 (0xc4008420,
4379 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4380 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4383 OPCODE_INFO2 (0x7c00,
4384 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4385 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4387 DOP16_DOP32 ("mulsh",
4388 OPCODE_INFO2 (0x7c01,
4389 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4390 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4391 OPCODE_INFO3 (0x7c01,
4392 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4393 (2_5
, 2IN1_DUMMY
, OPRND_SHIFT_0_BIT
),
4394 (2_5
, 2IN1_DUMMY
, OPRND_SHIFT_0_BIT
)),
4396 OPCODE_INFO3 (0xc4009020,
4397 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4398 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4399 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4400 OPCODE_INFO2 (0xc4009020,
4401 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4402 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4405 OPCODE_INFO2 (0x7c01,
4406 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4407 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4410 OPCODE_INFO3 (0xc4009420,
4411 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4412 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4413 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4414 OPCODE_INFO2 (0xc4009420,
4415 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4416 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4419 SOPCODE_INFO2 (0x8000,
4420 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4421 BRACKET_OPRND ((8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4422 (0_4
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
4424 SOPCODE_INFO2 (0xd8000000,
4425 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4426 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4427 (0_11
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
4430 SOPCODE_INFO2 (0x8000,
4431 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4432 BRACKET_OPRND ((8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4433 (0_4
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
4435 SOPCODE_INFO2 (0xd8000000,
4436 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4437 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4438 (0_11
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
4441 SOPCODE_INFO2 (0xa000,
4442 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4443 BRACKET_OPRND ((8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4444 (0_4
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
4446 SOPCODE_INFO2 (0xdc000000,
4447 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4448 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4449 (0_11
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
4452 SOPCODE_INFO2 (0xa000,
4453 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4454 BRACKET_OPRND ((8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4455 (0_4
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
4457 SOPCODE_INFO2 (0xdc000000,
4458 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4459 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4460 (0_11
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
4464 SOPCODE_INFO2 (0x8800,
4465 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4466 BRACKET_OPRND ((8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4467 (0_4
, IMM_LDST
, OPRND_SHIFT_1_BIT
))),
4469 SOPCODE_INFO2 (0xd8001000,
4470 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4471 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4472 (0_11
, IMM_LDST
, OPRND_SHIFT_1_BIT
))),
4475 SOPCODE_INFO2 (0x8800,
4476 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4477 BRACKET_OPRND ((8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4478 (0_4
, IMM_LDST
, OPRND_SHIFT_1_BIT
))),
4480 SOPCODE_INFO2 (0xd8001000,
4481 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4482 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4483 (0_11
, IMM_LDST
, OPRND_SHIFT_1_BIT
))),
4486 SOPCODE_INFO2 (0xa800,
4487 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4488 BRACKET_OPRND ((8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4489 (0_4
, IMM_LDST
, OPRND_SHIFT_1_BIT
))),
4491 SOPCODE_INFO2 (0xdc001000,
4492 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4493 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4494 (0_11
, IMM_LDST
, OPRND_SHIFT_1_BIT
))),
4497 SOPCODE_INFO2 (0xa800,
4498 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4499 BRACKET_OPRND ((8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4500 (0_4
, IMM_LDST
, OPRND_SHIFT_1_BIT
))),
4502 SOPCODE_INFO2 (0xdc001000,
4503 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4504 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4505 (0_11
, IMM_LDST
, OPRND_SHIFT_1_BIT
))),
4508 SOPCODE_INFO2 (0x9000,
4509 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4510 BRACKET_OPRND ((8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4511 (0_4
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4512 SOPCODE_INFO2 (0x9800,
4513 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4514 BRACKET_OPRND ((NONE
, REGsp
, OPRND_SHIFT_0_BIT
),
4515 (0_4or8_10
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4517 SOPCODE_INFO2 (0xd8002000,
4518 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4519 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4520 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4523 SOPCODE_INFO2 (0x9000,
4524 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4525 BRACKET_OPRND ((8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4526 (0_4
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4527 SOPCODE_INFO2 (0x9800,
4528 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4529 BRACKET_OPRND ((NONE
, REGsp
, OPRND_SHIFT_0_BIT
),
4530 (0_4or8_10
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4532 SOPCODE_INFO2 (0xd8002000,
4533 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4534 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4535 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4538 SOPCODE_INFO2 (0x9000,
4539 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4540 BRACKET_OPRND ((8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4541 (0_4
, IMM_LDST
, OPRND_SHIFT_0_BIT
))),
4542 SOPCODE_INFO2 (0x9800,
4543 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4544 BRACKET_OPRND ((NONE
, REGsp
, OPRND_SHIFT_0_BIT
),
4545 (0_4or8_10
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4547 SOPCODE_INFO2 (0xd8002000,
4548 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4549 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4550 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4553 SOPCODE_INFO2 (0xb000,
4554 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4555 BRACKET_OPRND ((8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4556 (0_4
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4557 SOPCODE_INFO2 (0xb800,
4558 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4559 BRACKET_OPRND ((NONE
, REGsp
, OPRND_SHIFT_0_BIT
),
4560 (0_4or8_10
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4562 SOPCODE_INFO2 (0xdc002000,
4563 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4564 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4565 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4568 SOPCODE_INFO2 (0xb000,
4569 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4570 BRACKET_OPRND ((8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4571 (0_4
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4572 SOPCODE_INFO2 (0xb800,
4573 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4574 BRACKET_OPRND ((NONE
, REGsp
, OPRND_SHIFT_0_BIT
),
4575 (0_4or8_10
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4577 SOPCODE_INFO2 (0xdc002000,
4578 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4579 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4580 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4583 SOPCODE_INFO2 (0xb000,
4584 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4585 BRACKET_OPRND ((8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4586 (0_4
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4587 SOPCODE_INFO2 (0xb800,
4588 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4589 BRACKET_OPRND ((NONE
, REGsp
, OPRND_SHIFT_0_BIT
),
4590 (0_4or8_10
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4592 SOPCODE_INFO2 (0xdc002000,
4593 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4594 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4595 (0_11
, IMM_LDST
, OPRND_SHIFT_2_BIT
))),
4598 DOP16_DOP32_WITH_WORK ("addi",
4599 OPCODE_INFO2 (0x2000,
4600 (NONE
, AREG
, OPRND_SHIFT_0_BIT
),
4601 (NONE
, IMM32b
, OPRND_SHIFT_0_BIT
)),
4602 OPCODE_INFO3 (0x2000,
4603 (NONE
, AREG
, OPRND_SHIFT_0_BIT
),
4604 (NONE
, AREG
, OPRND_SHIFT_0_BIT
),
4605 (NONE
, IMM32b
, OPRND_SHIFT_0_BIT
)),
4607 OPCODE_INFO2 (0xe4000000,
4608 (NONE
, AREG
, OPRND_SHIFT_0_BIT
),
4609 (NONE
, IMM32b
, OPRND_SHIFT_0_BIT
)),
4610 OPCODE_INFO3 (0xe4000000,
4611 (NONE
, AREG
, OPRND_SHIFT_0_BIT
),
4612 (NONE
, AREG
, OPRND_SHIFT_0_BIT
),
4613 (NONE
, IMM32b
, OPRND_SHIFT_0_BIT
)),
4618 OPCODE_INFO2 (0x2000,
4619 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4620 (0_7
, OIMM8b
, OPRND_SHIFT_0_BIT
)),
4621 OPCODE_INFO3 (0x5802,
4622 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4623 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4624 (2_4
, OIMM3b
, OPRND_SHIFT_0_BIT
)),
4627 OPCODE_INFO3 (0x1800,
4628 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4629 (NONE
, REGsp
, OPRND_SHIFT_0_BIT
),
4630 (0_7
, IMM8b_LS2
, OPRND_SHIFT_0_BIT
)),
4631 OPCODE_INFO3 (0x1400,
4632 (NONE
, REGsp
, OPRND_SHIFT_0_BIT
),
4633 (NONE
, REGsp
, OPRND_SHIFT_0_BIT
),
4634 (0_4or8_9
, IMM7b_LS2
, OPRND_SHIFT_0_BIT
)),
4637 OPCODE_INFO3 (0xe4000000,
4638 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4639 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4640 (0_11
, OIMM12b
, OPRND_SHIFT_0_BIT
)),
4641 OPCODE_INFO3 (0xcc1c0000,
4642 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4643 (NONE
, REG_r28
, OPRND_SHIFT_0_BIT
),
4644 (0_17
, OIMM18b
, OPRND_SHIFT_0_BIT
)),
4648 DOP16_DOP32_WITH_WORK ("subi",
4649 OPCODE_INFO2 (0x2800,
4650 (NONE
, AREG
, OPRND_SHIFT_0_BIT
),
4651 (NONE
, IMM32b
, OPRND_SHIFT_0_BIT
)),
4652 OPCODE_INFO3 (0x2800,
4653 (NONE
, AREG
, OPRND_SHIFT_0_BIT
),
4654 (NONE
, AREG
, OPRND_SHIFT_0_BIT
),
4655 (NONE
, IMM32b
, OPRND_SHIFT_0_BIT
)),
4657 OPCODE_INFO2 (0xe4001000,
4658 (NONE
, AREG
, OPRND_SHIFT_0_BIT
),
4659 (NONE
, IMM32b
, OPRND_SHIFT_0_BIT
)),
4660 OPCODE_INFO3 (0xe4001000,
4661 (NONE
, AREG
, OPRND_SHIFT_0_BIT
),
4662 (NONE
, AREG
, OPRND_SHIFT_0_BIT
),
4663 (NONE
, IMM32b
, OPRND_SHIFT_0_BIT
)),
4664 CSKYV2_ISA_1E2
, v2_work_subi
),
4667 OPCODE_INFO2 (0x2800,
4668 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4669 (0_7
, OIMM8b
, OPRND_SHIFT_0_BIT
)),
4670 OPCODE_INFO3 (0x5803,
4671 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4672 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4673 (2_4
, OIMM3b
, OPRND_SHIFT_0_BIT
)),
4676 OPCODE_INFO3 (0xe4001000,
4677 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4678 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4679 (0_11
, OIMM12b
, OPRND_SHIFT_0_BIT
)),
4682 OPCODE_INFO3 (0x1420,
4683 (NONE
, REGsp
, OPRND_SHIFT_0_BIT
),
4684 (NONE
, REGsp
, OPRND_SHIFT_0_BIT
),
4685 (0_4or8_9
, IMM7b_LS2
, OPRND_SHIFT_0_BIT
)),
4688 DOP16_DOP32_WITH_WORK ("addu",
4689 OPCODE_INFO2 (0x6000,
4690 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4691 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4692 OPCODE_INFO3 (0x5800,
4693 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4694 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4695 (2_4
, GREG0_7
, OPRND_SHIFT_0_BIT
)),
4697 OPCODE_INFO3 (0xc4000020,
4698 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4699 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4700 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4701 OPCODE_INFO2 (0xc4000020,
4702 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4703 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4706 DOP16_DOP32_WITH_WORK ("add",
4707 OPCODE_INFO2 (0x6000,
4708 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4709 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4710 OPCODE_INFO3 (0x5800,
4711 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4712 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4713 (2_4
, GREG0_7
, OPRND_SHIFT_0_BIT
)),
4715 OPCODE_INFO3 (0xc4000020,
4716 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4717 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4718 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4719 OPCODE_INFO2 (0xc4000020,
4720 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4721 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4724 DOP16_DOP32_WITH_WORK ("subu",
4725 OPCODE_INFO2 (0x6002,
4726 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4727 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4728 OPCODE_INFO3 (0x5801,
4729 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4730 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4731 (2_4
, GREG0_7
, OPRND_SHIFT_0_BIT
)),
4733 OPCODE_INFO3 (0xc4000080,
4734 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4735 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4736 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4737 OPCODE_INFO2 (0xc4000080,
4738 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4739 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4742 DOP16_DOP32_WITH_WORK ("sub",
4743 OPCODE_INFO2 (0x6002,
4744 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
4745 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
4746 OPCODE_INFO3 (0x5801,
4747 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4748 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4749 (2_4
, GREG0_7
, OPRND_SHIFT_0_BIT
)),
4751 OPCODE_INFO3 (0xc4000080,
4752 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
4753 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4754 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4755 OPCODE_INFO2 (0xc4000080,
4756 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
4757 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
4760 OP32_WITH_WORK ("fmovis",
4761 OPCODE_INFO2 (0xf4001c00,
4762 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
4763 (4_7or16_24
, SFLOAT
, OPRND_SHIFT_2_BIT
)),
4766 OP32_WITH_WORK ("fmovid",
4767 OPCODE_INFO2 (0xf4001e00,
4768 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
4769 (4_7or16_24
, DFLOAT
, OPRND_SHIFT_2_BIT
)),
4773 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM26BY2
4775 OPCODE_INFO1 (0xe0000000,
4776 (0_25
, OFF26b
, OPRND_SHIFT_1_BIT
)),
4779 #define _RELOC32 BFD_RELOC_CKCORE_DOFFSET_IMM18
4781 OPCODE_INFO2 (0xcc000000,
4782 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4783 (0_17
, LABEL_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
4786 OPCODE_INFO2 (0xcc100000,
4787 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4788 (0_17
, LABEL_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
4791 #define _RELOC32 BFD_RELOC_CKCORE_DOFFSET_IMM18BY2
4793 OPCODE_INFO2 (0xcc040000,
4794 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4795 (0_17
, LABEL_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
4798 OPCODE_INFO2 (0xcc140000,
4799 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4800 (0_17
, LABEL_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
4803 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_FLRW_IMM8BY4
4805 OPCODE_INFO2 (0xf4003800,
4806 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
4807 (4_7or21_24
, FCONSTANT
, OPRND_SHIFT_2_BIT
)),
4808 CSKY_ISA_FLOAT_1E3
),
4810 OPCODE_INFO2 (0xf4003900,
4811 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
4812 (4_7or21_24
, FCONSTANT
, OPRND_SHIFT_2_BIT
)),
4813 CSKY_ISA_FLOAT_3E4
),
4815 #define _RELOC32 BFD_RELOC_CKCORE_DOFFSET_IMM18BY4
4816 OP32_WITH_WORK ("lrs.w",
4817 OPCODE_INFO2 (0xcc080000,
4818 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4819 (0_17
, LABEL_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
4822 OP32_WITH_WORK ("srs.w",
4823 OPCODE_INFO2 (0xcc180000,
4824 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4825 (0_17
, LABEL_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
4830 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM16BY4
4831 OP32_WITH_WORK ("jsri",
4832 OPCODE_INFO1 (0xeae00000,
4833 (0_15
, OFF16b
, OPRND_SHIFT_2_BIT
)),
4837 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM16BY2
4839 OPCODE_INFO2 (0xe9000000,
4840 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4841 (0_15
, OFF16b_LSL1
, OPRND_SHIFT_1_BIT
)),
4844 OPCODE_INFO2 (0xe9200000,
4845 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4846 (0_15
, OFF16b_LSL1
, OPRND_SHIFT_1_BIT
)),
4849 OPCODE_INFO2 (0xe9400000,
4850 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4851 (0_15
, OFF16b_LSL1
, OPRND_SHIFT_1_BIT
)),
4854 OPCODE_INFO2 (0xe9600000,
4855 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4856 (0_15
, OFF16b_LSL1
, OPRND_SHIFT_1_BIT
)),
4859 OPCODE_INFO2 (0xe9800000,
4860 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4861 (0_15
, OFF16b_LSL1
, OPRND_SHIFT_1_BIT
)),
4864 OPCODE_INFO2 (0xe9a00000,
4865 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4866 (0_15
, OFF16b_LSL1
, OPRND_SHIFT_1_BIT
)),
4873 #define _RELOC16 BFD_RELOC_CKCORE_PCREL_IMM10BY2
4875 OPCODE_INFO1 (0x0400,
4876 (0_9
, UNCOND10b
, OPRND_SHIFT_1_BIT
)),
4878 OPCODE_INFO1 (0xe8000000,
4879 (0_15
, UNCOND16b
, OPRND_SHIFT_1_BIT
)),
4884 OPCODE_INFO1 (0x0800,
4885 (0_9
, COND10b
, OPRND_SHIFT_1_BIT
)),
4887 OPCODE_INFO1 (0xe8600000,
4888 (0_15
, COND16b
, OPRND_SHIFT_1_BIT
)),
4891 OPCODE_INFO1 (0x0c00,
4892 (0_9
, COND10b
, OPRND_SHIFT_1_BIT
)),
4894 OPCODE_INFO1 (0xe8400000,
4895 (0_15
, COND16b
, OPRND_SHIFT_1_BIT
)),
4902 OPCODE_INFO2 (0xe8200000,
4903 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4904 (0_15
, COND16b
, OPRND_SHIFT_1_BIT
)),
4912 OP16_WITH_WORK ("jbr",
4913 OPCODE_INFO1 (0x0400,
4914 (0_10
, UNCOND10b
, OPRND_SHIFT_1_BIT
)),
4919 OP16_WITH_WORK ("jbt",
4920 OPCODE_INFO1 (0x0800,
4921 (0_10
, COND10b
, OPRND_SHIFT_1_BIT
)),
4924 OP16_WITH_WORK ("jbf",
4925 OPCODE_INFO1 (0x0c00,
4926 (0_10
, COND10b
, OPRND_SHIFT_1_BIT
)),
4929 OP32_WITH_WORK ("jbsr",
4930 OPCODE_INFO1 (0xe0000000,
4931 (0_25
, OFF26b
, OPRND_SHIFT_1_BIT
)),
4934 OP32_WITH_WORK ("movih",
4935 OPCODE_INFO2 (0xea200000,
4936 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4937 (0_15
, IMM16b_MOVIH
, OPRND_SHIFT_0_BIT
)),
4940 OP32_WITH_WORK ("ori",
4941 OPCODE_INFO3 (0xec000000,
4942 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
4943 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4944 (0_15
, IMM16b_ORI
, OPRND_SHIFT_0_BIT
)),
4947 DOP32_WITH_WORK ("bgeni",
4948 OPCODE_INFO2 (0xea000000,
4949 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4950 (0_4
, IMM4b
, OPRND_SHIFT_0_BIT
)),
4951 OPCODE_INFO2 (0xea200000,
4952 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4953 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
4958 #define _RELOC16 BFD_RELOC_CKCORE_PCREL_IMM7BY4
4959 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM16BY4
4960 DOP16_OP32_WITH_WORK ("lrw",
4961 OPCODE_INFO2 (0x1000,
4962 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4963 (0_4or8_9
, CONSTANT
, OPRND_SHIFT_2_BIT
)),
4964 OPCODE_INFO2 (0x0000,
4965 (5_7
, GREG0_7
, OPRND_SHIFT_0_BIT
),
4966 (0_4or8_9
, ELRW_CONSTANT
, OPRND_SHIFT_2_BIT
)),
4968 OPCODE_INFO2 (0xea800000,
4969 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4970 (0_15
, CONSTANT
, OPRND_SHIFT_2_BIT
)),
4981 OPCODE_INFO2 (0xe9000000,
4982 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4983 (0_15
, JCOMPZ
, OPRND_SHIFT_0_BIT
)),
4986 OPCODE_INFO2 (0xe9200000,
4987 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4988 (0_15
, JCOMPZ
, OPRND_SHIFT_0_BIT
)),
4991 OPCODE_INFO2 (0xe9400000,
4992 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4993 (0_15
, JCOMPZ
, OPRND_SHIFT_0_BIT
)),
4996 OPCODE_INFO2 (0xe9600000,
4997 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
4998 (0_15
, JCOMPZ
, OPRND_SHIFT_0_BIT
)),
5001 OPCODE_INFO2 (0xe9800000,
5002 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5003 (0_15
, JCOMPZ
, OPRND_SHIFT_0_BIT
)),
5006 OPCODE_INFO2 (0xe9a00000,
5007 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5008 (0_15
, JCOMPZ
, OPRND_SHIFT_0_BIT
)),
5013 /* CK860 instructions. */
5015 OPCODE_INFO0 (0xc2200420),
5018 OPCODE_INFO0 (0xc0200420),
5021 OPCODE_INFO0 (0xc2000420),
5024 OPCODE_INFO0 (0xc000842f),
5026 OP32 ("bar.brwarws",
5027 OPCODE_INFO0 (0xc200842f),
5030 OPCODE_INFO0 (0xc0008425),
5033 OPCODE_INFO0 (0xc2008425),
5036 OPCODE_INFO0 (0xc000842a),
5039 OPCODE_INFO0 (0xc200842a),
5041 OP32 ("icache.iall",
5042 OPCODE_INFO0 (0xc1009020),
5044 OP32 ("icache.ialls",
5045 OPCODE_INFO0 (0xc3009020),
5047 OP32 ("l2cache.iall",
5048 OPCODE_INFO0 (0xc1009820),
5050 OP32 ("l2cache.call",
5051 OPCODE_INFO0 (0xc0809820),
5053 OP32 ("l2cache.ciall",
5054 OPCODE_INFO0 (0xc1809820),
5057 OPCODE_INFO1 (0xc1609020,
5058 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5060 OP32 ("dcache.iall",
5061 OPCODE_INFO0 (0xc1009420),
5064 OPCODE_INFO1 (0xc1609420,
5065 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5068 OPCODE_INFO1 (0xc1409420,
5069 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5071 OP32 ("dcache.call",
5072 OPCODE_INFO0 (0xc0809420),
5075 OPCODE_INFO1 (0xc0e09420,
5076 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5078 OP32 ("dcache.cval1",
5079 OPCODE_INFO1 (0xc2e09420,
5080 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5083 OPCODE_INFO1 (0xc0c09420,
5084 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5086 OP32 ("dcache.ciall",
5087 OPCODE_INFO0 (0xc1809420),
5089 OP32 ("dcache.civa",
5090 OPCODE_INFO1 (0xc1e09420,
5091 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5093 OP32 ("dcache.cisw",
5094 OPCODE_INFO1 (0xc1c09420,
5095 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5098 OPCODE_INFO1 (0xc0408820,
5099 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5102 OPCODE_INFO1 (0xc2408820,
5103 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5106 OPCODE_INFO1 (0xc0208820,
5107 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5110 OPCODE_INFO1 (0xc2208820,
5111 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5114 OPCODE_INFO1 (0xc0608820,
5115 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5118 OPCODE_INFO1 (0xc2608820,
5119 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5122 OPCODE_INFO0 (0xc0008820),
5125 OPCODE_INFO0 (0xc2008820),
5128 OPCODE_INFO0 (0xc0000420),
5129 OPCODE_INFO1 (0xc0000420,
5130 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
5133 /* The followings are enhance DSP instructions. */
5134 DOP32_WITH_WORK ("bloop",
5135 OPCODE_INFO3 (0xe9c00000,
5136 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5137 (0_11
, BLOOP_OFF12b
, OPRND_SHIFT_1_BIT
),
5138 (12_15
, BLOOP_OFF4b
, OPRND_SHIFT_1_BIT
)),
5139 OPCODE_INFO2 (0xe9c00000,
5140 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5141 (0_11
, BLOOP_OFF12b
, OPRND_SHIFT_1_BIT
)),
5142 CSKY_ISA_DSP_ENHANCE
,
5144 /* The followings are ld/st instructions. */
5146 OPCODE_INFO2 (0xd0008000,
5147 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5148 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
5149 CSKY_ISA_DSP_ENHANCE
),
5151 OPCODE_INFO2 (0xd0008400,
5152 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5153 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
5154 CSKY_ISA_DSP_ENHANCE
),
5156 OPCODE_INFO2 (0xd0008800,
5157 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5158 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
5159 CSKY_ISA_DSP_ENHANCE
),
5161 OPCODE_INFO2 (0xd0008c00,
5162 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5163 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
5164 CSKY_ISA_DSP_ENHANCE
),
5166 OPCODE_INFO2 (0xd0009000,
5167 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5168 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
5169 CSKY_ISA_DSP_ENHANCE
),
5171 OPCODE_INFO2 (0xd0009400,
5172 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5173 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
5174 CSKY_ISA_DSP_ENHANCE
),
5176 OPCODE_INFO2 (0xd4008000,
5177 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5178 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
5179 CSKY_ISA_DSP_ENHANCE
),
5181 OPCODE_INFO2 (0xd4008400,
5182 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5183 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
5184 CSKY_ISA_DSP_ENHANCE
),
5186 OPCODE_INFO2 (0xd4008800,
5187 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5188 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
)),
5189 CSKY_ISA_DSP_ENHANCE
),
5191 OPCODE_INFO3 (0xd000a000,
5192 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5193 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
),
5194 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5195 CSKY_ISA_DSP_ENHANCE
),
5197 OPCODE_INFO3 (0xd000a400,
5198 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5199 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
),
5200 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5201 CSKY_ISA_DSP_ENHANCE
),
5203 OPCODE_INFO3 (0xd000a800,
5204 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5205 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
),
5206 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5207 CSKY_ISA_DSP_ENHANCE
),
5209 OPCODE_INFO3 (0xd000ac00,
5210 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5211 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
),
5212 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5213 CSKY_ISA_DSP_ENHANCE
),
5215 OPCODE_INFO3 (0xd000b000,
5216 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5217 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
),
5218 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5219 CSKY_ISA_DSP_ENHANCE
),
5221 OPCODE_INFO3 (0xd000b400,
5222 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5223 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
),
5224 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5225 CSKY_ISA_DSP_ENHANCE
),
5227 OPCODE_INFO3 (0xd400a000,
5228 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5229 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
),
5230 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5231 CSKY_ISA_DSP_ENHANCE
),
5233 OPCODE_INFO3 (0xd400a400,
5234 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5235 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
),
5236 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5237 CSKY_ISA_DSP_ENHANCE
),
5239 OPCODE_INFO3 (0xd400a800,
5240 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5241 (16_20
, AREG_WITH_BRACKET
, OPRND_SHIFT_0_BIT
),
5242 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5243 CSKY_ISA_DSP_ENHANCE
),
5244 /* The followings are add/sub instructions. */
5246 OPCODE_INFO3 (0xf800c040,
5247 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5248 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5249 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5250 CSKY_ISA_DSP_ENHANCE
),
5252 OPCODE_INFO3 (0xf800c000,
5253 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5254 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5255 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5256 CSKY_ISA_DSP_ENHANCE
),
5258 OPCODE_INFO3 (0xf800c140,
5259 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5260 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5261 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5262 CSKY_ISA_DSP_ENHANCE
),
5264 OPCODE_INFO3 (0xf800c1c0,
5265 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5266 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5267 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5268 CSKY_ISA_DSP_ENHANCE
),
5270 OPCODE_INFO3 (0xf800c100,
5271 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5272 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5273 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5274 CSKY_ISA_DSP_ENHANCE
),
5276 OPCODE_INFO3 (0xf800c180,
5277 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5278 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5279 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5280 CSKY_ISA_DSP_ENHANCE
),
5282 OPCODE_INFO3 (0xf800c120,
5283 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5284 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5285 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5286 CSKY_ISA_DSP_ENHANCE
),
5288 OPCODE_INFO3 (0xf800c1a0,
5289 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5290 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5291 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5292 CSKY_ISA_DSP_ENHANCE
),
5294 OPCODE_INFO3 (0xf800c440,
5295 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5296 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5297 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5298 CSKY_ISA_DSP_ENHANCE
),
5300 OPCODE_INFO3 (0xf800c400,
5301 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5302 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5303 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5304 CSKY_ISA_DSP_ENHANCE
),
5306 OPCODE_INFO3 (0xf800c540,
5307 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5308 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5309 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5310 CSKY_ISA_DSP_ENHANCE
),
5312 OPCODE_INFO3 (0xf800c5c0,
5313 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5314 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5315 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5316 CSKY_ISA_DSP_ENHANCE
),
5318 OPCODE_INFO3 (0xf800c500,
5319 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5320 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5321 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5322 CSKY_ISA_DSP_ENHANCE
),
5324 OPCODE_INFO3 (0xf800c580,
5325 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5326 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5327 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5328 CSKY_ISA_DSP_ENHANCE
),
5330 OPCODE_INFO3 (0xf800c520,
5331 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5332 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5333 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5334 CSKY_ISA_DSP_ENHANCE
),
5336 OPCODE_INFO3 (0xf800c5a0,
5337 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5338 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5339 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5340 CSKY_ISA_DSP_ENHANCE
),
5342 OPCODE_INFO3 (0xf800c240,
5343 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5344 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5345 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5346 CSKY_ISA_DSP_ENHANCE
),
5348 OPCODE_INFO3 (0xf800c2c0,
5349 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5350 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5351 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5352 CSKY_ISA_DSP_ENHANCE
),
5354 OPCODE_INFO3 (0xf800c200,
5355 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5356 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5357 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5358 CSKY_ISA_DSP_ENHANCE
),
5360 OPCODE_INFO3 (0xf800c280,
5361 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5362 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5363 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5364 CSKY_ISA_DSP_ENHANCE
),
5366 OPCODE_INFO3 (0xf800c220,
5367 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5368 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5369 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5370 CSKY_ISA_DSP_ENHANCE
),
5372 OPCODE_INFO3 (0xf800c2a0,
5373 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5374 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5375 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5376 CSKY_ISA_DSP_ENHANCE
),
5378 OPCODE_INFO3 (0xf800c640,
5379 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5380 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5381 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5382 CSKY_ISA_DSP_ENHANCE
),
5384 OPCODE_INFO3 (0xf800c6c0,
5385 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5386 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5387 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5388 CSKY_ISA_DSP_ENHANCE
),
5390 OPCODE_INFO3 (0xf800c600,
5391 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5392 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5393 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5394 CSKY_ISA_DSP_ENHANCE
),
5396 OPCODE_INFO3 (0xf800c680,
5397 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5398 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5399 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5400 CSKY_ISA_DSP_ENHANCE
),
5402 OPCODE_INFO3 (0xf800c620,
5403 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5404 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5405 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5406 CSKY_ISA_DSP_ENHANCE
),
5408 OPCODE_INFO3 (0xf800c6a0,
5409 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5410 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5411 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5412 CSKY_ISA_DSP_ENHANCE
),
5414 OPCODE_INFO3 (0xf800c060,
5415 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5416 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5417 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5418 CSKY_ISA_DSP_ENHANCE
),
5420 OPCODE_INFO3 (0xf800c460,
5421 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5422 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5423 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5424 CSKY_ISA_DSP_ENHANCE
),
5426 OPCODE_INFO3 (0xf800c160,
5427 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5428 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5429 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5430 CSKY_ISA_DSP_ENHANCE
),
5432 OPCODE_INFO3 (0xf800c1e0,
5433 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5434 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5435 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5436 CSKY_ISA_DSP_ENHANCE
),
5438 OPCODE_INFO3 (0xf800c560,
5439 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5440 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5441 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5442 CSKY_ISA_DSP_ENHANCE
),
5444 OPCODE_INFO3 (0xf800c5e0,
5445 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5446 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5447 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5448 CSKY_ISA_DSP_ENHANCE
),
5449 /* The following are comparison instructions. */
5451 OPCODE_INFO3 (0xf800c860,
5452 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5453 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5454 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5455 CSKY_ISA_DSP_ENHANCE
),
5457 OPCODE_INFO3 (0xf800cc60,
5458 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5459 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5460 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5461 CSKY_ISA_DSP_ENHANCE
),
5463 OPCODE_INFO3 (0xf800c960,
5464 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5465 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5466 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5467 CSKY_ISA_DSP_ENHANCE
),
5469 OPCODE_INFO3 (0xf800c9e0,
5470 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5471 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5472 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5473 CSKY_ISA_DSP_ENHANCE
),
5475 OPCODE_INFO3 (0xf800cd60,
5476 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5477 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5478 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5479 CSKY_ISA_DSP_ENHANCE
),
5481 OPCODE_INFO3 (0xf800cde0,
5482 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5483 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5484 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5485 CSKY_ISA_DSP_ENHANCE
),
5487 OPCODE_INFO3 (0xf800ca60,
5488 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5489 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5490 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5491 CSKY_ISA_DSP_ENHANCE
),
5493 OPCODE_INFO3 (0xf800cae0,
5494 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5495 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5496 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5497 CSKY_ISA_DSP_ENHANCE
),
5499 OPCODE_INFO3 (0xf800ce60,
5500 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5501 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5502 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5503 CSKY_ISA_DSP_ENHANCE
),
5505 OPCODE_INFO3 (0xf800cee0,
5506 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5507 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5508 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5509 CSKY_ISA_DSP_ENHANCE
),
5511 OPCODE_INFO3 (0xf800c840,
5512 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5513 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5514 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5515 CSKY_ISA_DSP_ENHANCE
),
5517 OPCODE_INFO3 (0xf800c800,
5518 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5519 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5520 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5521 CSKY_ISA_DSP_ENHANCE
),
5523 OPCODE_INFO3 (0xf800c940,
5524 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5525 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5526 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5527 CSKY_ISA_DSP_ENHANCE
),
5529 OPCODE_INFO3 (0xf800c9c0,
5530 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5531 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5532 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5533 CSKY_ISA_DSP_ENHANCE
),
5535 OPCODE_INFO3 (0xf800c900,
5536 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5537 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5538 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5539 CSKY_ISA_DSP_ENHANCE
),
5541 OPCODE_INFO3 (0xf800c980,
5542 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5543 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5544 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5545 CSKY_ISA_DSP_ENHANCE
),
5547 OPCODE_INFO3 (0xf800ca40,
5548 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5549 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5550 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5551 CSKY_ISA_DSP_ENHANCE
),
5553 OPCODE_INFO3 (0xf800cac0,
5554 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5555 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5556 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5557 CSKY_ISA_DSP_ENHANCE
),
5559 OPCODE_INFO3 (0xf800ca00,
5560 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5561 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5562 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5563 CSKY_ISA_DSP_ENHANCE
),
5565 OPCODE_INFO3 (0xf800ca80,
5566 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5567 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5568 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5569 CSKY_ISA_DSP_ENHANCE
),
5571 OPCODE_INFO3 (0xf800cc40,
5572 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5573 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5574 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5575 CSKY_ISA_DSP_ENHANCE
),
5577 OPCODE_INFO3 (0xf800ccc0,
5578 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5579 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5580 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5581 CSKY_ISA_DSP_ENHANCE
),
5583 OPCODE_INFO3 (0xf800cc00,
5584 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5585 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5586 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5587 CSKY_ISA_DSP_ENHANCE
),
5589 OPCODE_INFO3 (0xf800cc80,
5590 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5591 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5592 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5593 CSKY_ISA_DSP_ENHANCE
),
5595 OPCODE_INFO3 (0xf800cc20,
5596 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5597 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5598 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5599 CSKY_ISA_DSP_ENHANCE
),
5601 OPCODE_INFO3 (0xf800cca0,
5602 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5603 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5604 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5605 CSKY_ISA_DSP_ENHANCE
),
5607 OPCODE_INFO3 (0xf800cd40,
5608 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5609 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5610 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5611 CSKY_ISA_DSP_ENHANCE
),
5613 OPCODE_INFO3 (0xf800cdc0,
5614 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5615 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5616 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5617 CSKY_ISA_DSP_ENHANCE
),
5619 OPCODE_INFO3 (0xf800cd00,
5620 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5621 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5622 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5623 CSKY_ISA_DSP_ENHANCE
),
5625 OPCODE_INFO3 (0xf800cd80,
5626 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5627 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5628 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5629 CSKY_ISA_DSP_ENHANCE
),
5631 OPCODE_INFO3 (0xf800cd20,
5632 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5633 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5634 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5635 CSKY_ISA_DSP_ENHANCE
),
5637 OPCODE_INFO3 (0xf800cda0,
5638 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5639 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5640 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5641 CSKY_ISA_DSP_ENHANCE
),
5643 OPCODE_INFO4 (0xf8009000,
5644 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5645 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5646 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
5647 (5_9
, AREG
, OPRND_SHIFT_0_BIT
)),
5648 CSKY_ISA_DSP_ENHANCE
),
5649 /* The followings are miscs. */
5651 OPCODE_INFO3 (0xf800e040,
5652 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5653 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5654 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5655 CSKY_ISA_DSP_ENHANCE
),
5657 OPCODE_INFO3 (0xf800e140,
5658 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5659 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5660 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5661 CSKY_ISA_DSP_ENHANCE
),
5663 OPCODE_INFO3 (0xf800e260,
5664 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5665 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5666 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5669 OPCODE_INFO3 (0xf800e2e0,
5670 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5671 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5672 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5675 OPCODE_INFO3 (0xf800e4c0,
5676 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5677 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5678 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5679 CSKY_ISA_DSP_ENHANCE
),
5680 /* The followings are shift instructions. */
5682 OPCODE_INFO3 (0xf800d1a0,
5683 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5684 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5685 (21_25
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
5686 CSKY_ISA_DSP_ENHANCE
),
5688 OPCODE_INFO3 (0xf800d1e0,
5689 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5690 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5691 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5692 CSKY_ISA_DSP_ENHANCE
),
5694 OPCODE_INFO3 (0xf800d320,
5695 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5696 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5697 (21_25
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
5698 CSKY_ISA_DSP_ENHANCE
),
5700 OPCODE_INFO3 (0xf800d360,
5701 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5702 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5703 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5704 CSKY_ISA_DSP_ENHANCE
),
5706 OPCODE_INFO3 (0xf800d520,
5707 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5708 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5709 (21_25
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
5710 CSKY_ISA_DSP_ENHANCE
),
5712 OPCODE_INFO3 (0xf800d5a0,
5713 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5714 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5715 (21_25
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
5716 CSKY_ISA_DSP_ENHANCE
),
5718 OPCODE_INFO3 (0xf800d560,
5719 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5720 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5721 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5722 CSKY_ISA_DSP_ENHANCE
),
5724 OPCODE_INFO3 (0xf800d5e0,
5725 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5726 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5727 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5728 CSKY_ISA_DSP_ENHANCE
),
5730 OPCODE_INFO3 (0xf800d080,
5731 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5732 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5733 (21_25
, OIMM4b
, OPRND_SHIFT_0_BIT
)),
5734 CSKY_ISA_DSP_ENHANCE
),
5736 OPCODE_INFO3 (0xf800d0c0,
5737 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5738 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5739 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5740 CSKY_ISA_DSP_ENHANCE
),
5741 OP32 ("pasri.s16.r",
5742 OPCODE_INFO3 (0xf800d180,
5743 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5744 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5745 (21_25
, OIMM4b
, OPRND_SHIFT_0_BIT
)),
5746 CSKY_ISA_DSP_ENHANCE
),
5748 OPCODE_INFO3 (0xf800d1c0,
5749 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5750 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5751 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5752 CSKY_ISA_DSP_ENHANCE
),
5754 OPCODE_INFO3 (0xf800d200,
5755 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5756 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5757 (21_25
, OIMM4b
, OPRND_SHIFT_0_BIT
)),
5758 CSKY_ISA_DSP_ENHANCE
),
5760 OPCODE_INFO3 (0xf800d240,
5761 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5762 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5763 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5764 CSKY_ISA_DSP_ENHANCE
),
5765 OP32 ("plsri.u16.r",
5766 OPCODE_INFO3 (0xf800d300,
5767 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5768 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5769 (21_25
, OIMM4b
, OPRND_SHIFT_0_BIT
)),
5770 CSKY_ISA_DSP_ENHANCE
),
5772 OPCODE_INFO3 (0xf800d340,
5773 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5774 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5775 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5776 CSKY_ISA_DSP_ENHANCE
),
5778 OPCODE_INFO3 (0xf800d400,
5779 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5780 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5781 (21_25
, OIMM4b
, OPRND_SHIFT_0_BIT
)),
5782 CSKY_ISA_DSP_ENHANCE
),
5784 OPCODE_INFO3 (0xf800d440,
5785 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5786 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5787 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5788 CSKY_ISA_DSP_ENHANCE
),
5789 OP32 ("plsli.u16.s",
5790 OPCODE_INFO3 (0xf800d500,
5791 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5792 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5793 (21_25
, OIMM4b
, OPRND_SHIFT_0_BIT
)),
5794 CSKY_ISA_DSP_ENHANCE
),
5795 OP32 ("plsli.s16.s",
5796 OPCODE_INFO3 (0xf800d580,
5797 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5798 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5799 (21_25
, OIMM4b
, OPRND_SHIFT_0_BIT
)),
5800 CSKY_ISA_DSP_ENHANCE
),
5802 OPCODE_INFO3 (0xf800d540,
5803 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5804 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5805 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5806 CSKY_ISA_DSP_ENHANCE
),
5808 OPCODE_INFO3 (0xf800d5c0,
5809 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5810 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5811 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5812 CSKY_ISA_DSP_ENHANCE
),
5813 /* The following are package & unpackage instructions. */
5815 OPCODE_INFO5 (0xf800a000,
5816 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5817 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5818 (5_8
, IMM4b
, OPRND_SHIFT_0_BIT
),
5819 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
5820 (9_12
, OIMM4b
, OPRND_SHIFT_0_BIT
)),
5821 CSKY_ISA_DSP_ENHANCE
),
5823 OPCODE_INFO4 (0xf8009800,
5824 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5825 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5826 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
5827 (5_9
, IMM5b
, OPRND_SHIFT_0_BIT
)),
5828 CSKY_ISA_DSP_ENHANCE
),
5830 OPCODE_INFO4 (0xf8009c00,
5831 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5832 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5833 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
5834 (5_9
, AREG
, OPRND_SHIFT_0_BIT
)),
5835 CSKY_ISA_DSP_ENHANCE
),
5837 OPCODE_INFO3 (0xf800d840,
5838 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5839 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5840 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5841 CSKY_ISA_DSP_ENHANCE
),
5843 OPCODE_INFO3 (0xf800d860,
5844 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5845 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5846 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5847 CSKY_ISA_DSP_ENHANCE
),
5849 OPCODE_INFO2 (0xf800d900,
5850 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5851 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5852 CSKY_ISA_DSP_ENHANCE
),
5854 OPCODE_INFO2 (0xf800d980,
5855 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5856 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5857 CSKY_ISA_DSP_ENHANCE
),
5859 OPCODE_INFO2 (0xf800d920,
5860 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5861 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5862 CSKY_ISA_DSP_ENHANCE
),
5864 OPCODE_INFO2 (0xf800d9a0,
5865 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5866 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5867 CSKY_ISA_DSP_ENHANCE
),
5869 OPCODE_INFO3 (0xf800da00,
5870 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5871 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5872 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5873 CSKY_ISA_DSP_ENHANCE
),
5875 OPCODE_INFO3 (0xf800da20,
5876 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5877 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5878 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5879 CSKY_ISA_DSP_ENHANCE
),
5881 OPCODE_INFO3 (0xf800da40,
5882 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5883 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5884 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5885 CSKY_ISA_DSP_ENHANCE
),
5887 OPCODE_INFO3 (0xf800da60,
5888 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5889 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5890 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5891 CSKY_ISA_DSP_ENHANCE
),
5893 OPCODE_INFO3 (0xf800db00,
5894 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5895 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5896 (21_25
, IMM5b
, OPRND_SHIFT_0_BIT
)),
5897 CSKY_ISA_DSP_ENHANCE
),
5899 OPCODE_INFO3 (0xf800db80,
5900 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5901 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5902 (21_25
, OIMM5b
, OPRND_SHIFT_0_BIT
)),
5903 CSKY_ISA_DSP_ENHANCE
),
5905 OPCODE_INFO3 (0xf800db20,
5906 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5907 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5908 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5909 CSKY_ISA_DSP_ENHANCE
),
5911 OPCODE_INFO3 (0xf800dba0,
5912 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5913 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5914 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5915 CSKY_ISA_DSP_ENHANCE
),
5917 OPCODE_INFO3 (0xf800db40,
5918 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5919 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5920 (21_25
, IMM4b
, OPRND_SHIFT_0_BIT
)),
5921 CSKY_ISA_DSP_ENHANCE
),
5923 OPCODE_INFO3 (0xf800dbc0,
5924 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5925 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5926 (21_25
, OIMM4b
, OPRND_SHIFT_0_BIT
)),
5927 CSKY_ISA_DSP_ENHANCE
),
5929 OPCODE_INFO3 (0xf800db60,
5930 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5931 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5932 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5933 CSKY_ISA_DSP_ENHANCE
),
5935 OPCODE_INFO3 (0xf800dbe0,
5936 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5937 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5938 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5939 CSKY_ISA_DSP_ENHANCE
),
5941 OPCODE_INFO2 (0xf800dc80,
5942 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5943 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5944 CSKY_ISA_DSP_ENHANCE
),
5946 OPCODE_INFO2 (0xf800dca0,
5947 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5948 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5949 CSKY_ISA_DSP_ENHANCE
),
5951 OPCODE_INFO2 (0xf800dcc0,
5952 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5953 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5954 CSKY_ISA_DSP_ENHANCE
),
5956 OPCODE_INFO2 (0xf800dd80,
5957 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5958 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5959 CSKY_ISA_DSP_ENHANCE
),
5961 OPCODE_INFO2 (0xf800dda0,
5962 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5963 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5964 CSKY_ISA_DSP_ENHANCE
),
5966 OPCODE_INFO2 (0xf800ddc0,
5967 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5968 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
5969 CSKY_ISA_DSP_ENHANCE
),
5971 OPCODE_INFO3 (0xf800de00,
5972 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5973 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5974 (5_6
, IMM2b
, OPRND_SHIFT_0_BIT
)),
5975 CSKY_ISA_DSP_ENHANCE
),
5977 OPCODE_INFO3 (0xf800df00,
5978 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5979 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5980 (5_6
, IMM1b
, OPRND_SHIFT_0_BIT
)),
5981 CSKY_ISA_DSP_ENHANCE
),
5982 /* The followings are multiplication instructions. */
5984 OPCODE_INFO3 (0xf8008000,
5985 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5986 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5987 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5990 OPCODE_INFO3 (0xf8008200,
5991 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5992 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5993 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
5996 OPCODE_INFO3 (0xf8008080,
5997 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
5998 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
5999 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6002 OPCODE_INFO3 (0xf8008280,
6003 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6004 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6005 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6008 OPCODE_INFO3 (0xf8008440,
6009 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6010 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6011 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6013 OP32 ("mulall.s16.s",
6014 OPCODE_INFO3 (0xf80081a0,
6015 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6016 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6017 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6020 OPCODE_INFO3 (0xf80080c0,
6021 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6022 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6023 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6024 CSKY_ISA_DSP_ENHANCE
),
6026 OPCODE_INFO3 (0xf80082c0,
6027 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6028 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6029 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6030 CSKY_ISA_DSP_ENHANCE
),
6032 OPCODE_INFO3 (0xf8008180,
6033 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6034 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6035 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6036 CSKY_ISA_DSP_ENHANCE
),
6038 OPCODE_INFO3 (0xf8008380,
6039 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6040 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6041 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6042 CSKY_ISA_DSP_ENHANCE
),
6044 OPCODE_INFO3 (0xf80081c0,
6045 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6046 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6047 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6048 CSKY_ISA_DSP_ENHANCE
),
6050 OPCODE_INFO3 (0xf80083c0,
6051 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6052 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6053 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6054 CSKY_ISA_DSP_ENHANCE
),
6056 OPCODE_INFO3 (0xf8008400,
6057 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6058 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6059 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6060 CSKY_ISA_DSP_ENHANCE
),
6062 OPCODE_INFO3 (0xf8008600,
6063 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6064 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6065 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6066 CSKY_ISA_DSP_ENHANCE
),
6068 OPCODE_INFO3 (0xf8008500,
6069 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6070 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6071 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6072 CSKY_ISA_DSP_ENHANCE
),
6073 OP32 ("rmul.s32.rh",
6074 OPCODE_INFO3 (0xf8008700,
6075 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6076 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6077 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6078 CSKY_ISA_DSP_ENHANCE
),
6079 OP32 ("mula.s32.hs",
6080 OPCODE_INFO3 (0xf8008580,
6081 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6082 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6083 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6084 CSKY_ISA_DSP_ENHANCE
),
6085 OP32 ("muls.s32.hs",
6086 OPCODE_INFO3 (0xf80085c0,
6087 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6088 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6089 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6090 CSKY_ISA_DSP_ENHANCE
),
6091 OP32 ("mula.s32.rhs",
6092 OPCODE_INFO3 (0xf8008780,
6093 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6094 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6095 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6096 CSKY_ISA_DSP_ENHANCE
),
6097 OP32 ("muls.s32.rhs",
6098 OPCODE_INFO3 (0xf80087c0,
6099 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6100 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6101 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6102 CSKY_ISA_DSP_ENHANCE
),
6104 OPCODE_INFO3 (0xf8008800,
6105 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6106 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6107 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6108 CSKY_ISA_DSP_ENHANCE
),
6109 OP32 ("mulxl.s32.r",
6110 OPCODE_INFO3 (0xf8008a00,
6111 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6112 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6113 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6114 CSKY_ISA_DSP_ENHANCE
),
6116 OPCODE_INFO3 (0xf8008c00,
6117 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6118 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6119 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6120 CSKY_ISA_DSP_ENHANCE
),
6121 OP32 ("mulxh.s32.r",
6122 OPCODE_INFO3 (0xf8008e00,
6123 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6124 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6125 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6126 CSKY_ISA_DSP_ENHANCE
),
6128 OPCODE_INFO3 (0xf8008900,
6129 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6130 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6131 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6132 CSKY_ISA_DSP_ENHANCE
),
6133 OP32 ("rmulxl.s32.r",
6134 OPCODE_INFO3 (0xf8008b00,
6135 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6136 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6137 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6138 CSKY_ISA_DSP_ENHANCE
),
6140 OPCODE_INFO3 (0xf8008d00,
6141 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6142 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6143 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6144 CSKY_ISA_DSP_ENHANCE
),
6145 OP32 ("rmulxh.s32.r",
6146 OPCODE_INFO3 (0xf8008f00,
6147 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6148 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6149 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6150 CSKY_ISA_DSP_ENHANCE
),
6151 OP32 ("mulaxl.s32.s",
6152 OPCODE_INFO3 (0xf8008980,
6153 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6154 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6155 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6156 CSKY_ISA_DSP_ENHANCE
),
6157 OP32 ("mulaxl.s32.rs",
6158 OPCODE_INFO3 (0xf8008b80,
6159 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6160 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6161 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6162 CSKY_ISA_DSP_ENHANCE
),
6163 OP32 ("mulaxh.s32.s",
6164 OPCODE_INFO3 (0xf8008d80,
6165 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6166 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6167 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6168 CSKY_ISA_DSP_ENHANCE
),
6169 OP32 ("mulaxh.s32.rs",
6170 OPCODE_INFO3 (0xf8008f80,
6171 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6172 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6173 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6174 CSKY_ISA_DSP_ENHANCE
),
6176 OPCODE_INFO3 (0xf8008020,
6177 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6178 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6179 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6180 CSKY_ISA_DSP_ENHANCE
),
6182 OPCODE_INFO3 (0xf8008260,
6183 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6184 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6185 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6186 CSKY_ISA_DSP_ENHANCE
),
6188 OPCODE_INFO3 (0xf8008220,
6189 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6190 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6191 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6192 CSKY_ISA_DSP_ENHANCE
),
6194 OPCODE_INFO3 (0xf8008120,
6195 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6196 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6197 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6198 CSKY_ISA_DSP_ENHANCE
),
6200 OPCODE_INFO3 (0xf8008360,
6201 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6202 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6203 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6204 CSKY_ISA_DSP_ENHANCE
),
6206 OPCODE_INFO3 (0xf8008320,
6207 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6208 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6209 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6210 CSKY_ISA_DSP_ENHANCE
),
6211 OP32 ("mulahh.s16.s",
6212 OPCODE_INFO3 (0xf80083e0,
6213 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6214 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6215 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6216 CSKY_ISA_DSP_ENHANCE
),
6217 OP32 ("mulahl.s16.s",
6218 OPCODE_INFO3 (0xf80083a0,
6219 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6220 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6221 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6222 CSKY_ISA_DSP_ENHANCE
),
6223 OP32 ("mulall.s16.e",
6224 OPCODE_INFO3 (0xf80080a0,
6225 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6226 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6227 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6228 CSKY_ISA_DSP_ENHANCE
),
6229 OP32 ("mulahh.s16.e",
6230 OPCODE_INFO3 (0xf80082e0,
6231 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6232 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6233 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6234 CSKY_ISA_DSP_ENHANCE
),
6235 OP32 ("mulahl.s16.e",
6236 OPCODE_INFO3 (0xf80080e0,
6237 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6238 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6239 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6240 CSKY_ISA_DSP_ENHANCE
),
6242 OPCODE_INFO3 (0xf80084a0,
6243 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6244 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6245 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6246 CSKY_ISA_DSP_ENHANCE
),
6248 OPCODE_INFO3 (0xf80084e0,
6249 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6250 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6251 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6252 CSKY_ISA_DSP_ENHANCE
),
6254 OPCODE_INFO3 (0xf8008420,
6255 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6256 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6257 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6258 CSKY_ISA_DSP_ENHANCE
),
6260 OPCODE_INFO3 (0xf8008460,
6261 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6262 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6263 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6264 CSKY_ISA_DSP_ENHANCE
),
6266 OPCODE_INFO3 (0xf8008520,
6267 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6268 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6269 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6270 CSKY_ISA_DSP_ENHANCE
),
6272 OPCODE_INFO3 (0xf8008560,
6273 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6274 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6275 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6276 CSKY_ISA_DSP_ENHANCE
),
6277 OP32 ("prmul.s16.h",
6278 OPCODE_INFO3 (0xf80085a0,
6279 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6280 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6281 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6282 CSKY_ISA_DSP_ENHANCE
),
6283 OP32 ("prmul.s16.rh",
6284 OPCODE_INFO3 (0xf80087a0,
6285 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6286 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6287 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6288 CSKY_ISA_DSP_ENHANCE
),
6289 OP32 ("prmulx.s16.h",
6290 OPCODE_INFO3 (0xf80085e0,
6291 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6292 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6293 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6294 CSKY_ISA_DSP_ENHANCE
),
6295 OP32 ("prmulx.s16.rh",
6296 OPCODE_INFO3 (0xf80087e0,
6297 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6298 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6299 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6300 CSKY_ISA_DSP_ENHANCE
),
6301 OP32 ("mulca.s16.s",
6302 OPCODE_INFO3 (0xf8008920,
6303 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6304 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6305 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6306 CSKY_ISA_DSP_ENHANCE
),
6307 OP32 ("mulcax.s16.s",
6308 OPCODE_INFO3 (0xf8008960,
6309 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6310 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6311 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6312 CSKY_ISA_DSP_ENHANCE
),
6314 OPCODE_INFO3 (0xf8008a20,
6315 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6316 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6317 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6318 CSKY_ISA_DSP_ENHANCE
),
6320 OPCODE_INFO3 (0xf8008a60,
6321 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6322 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6323 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6324 CSKY_ISA_DSP_ENHANCE
),
6326 OPCODE_INFO3 (0xf8008c20,
6327 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6328 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6329 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6330 CSKY_ISA_DSP_ENHANCE
),
6331 OP32 ("mulaca.s16.s",
6332 OPCODE_INFO3 (0xf80089a0,
6333 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6334 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6335 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6336 CSKY_ISA_DSP_ENHANCE
),
6337 OP32 ("mulacax.s16.s",
6338 OPCODE_INFO3 (0xf80089e0,
6339 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6340 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6341 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6342 CSKY_ISA_DSP_ENHANCE
),
6343 OP32 ("mulacs.s16.s",
6344 OPCODE_INFO3 (0xf8008ba0,
6345 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6346 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6347 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6348 CSKY_ISA_DSP_ENHANCE
),
6349 OP32 ("mulacsr.s16.s",
6350 OPCODE_INFO3 (0xf8008be0,
6351 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6352 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6353 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6354 CSKY_ISA_DSP_ENHANCE
),
6355 OP32 ("mulacsx.s16.s",
6356 OPCODE_INFO3 (0xf8008da0,
6357 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6358 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6359 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6360 CSKY_ISA_DSP_ENHANCE
),
6361 OP32 ("mulsca.s16.s",
6362 OPCODE_INFO3 (0xf8008de0,
6363 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6364 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6365 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6366 CSKY_ISA_DSP_ENHANCE
),
6367 OP32 ("mulscax.s16.s",
6368 OPCODE_INFO3 (0xf8008fa0,
6369 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6370 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6371 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6372 CSKY_ISA_DSP_ENHANCE
),
6373 OP32 ("mulaca.s16.e",
6374 OPCODE_INFO3 (0xf80088a0,
6375 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6376 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6377 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6378 CSKY_ISA_DSP_ENHANCE
),
6379 OP32 ("mulacax.s16.e",
6380 OPCODE_INFO3 (0xf80088e0,
6381 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6382 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6383 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6384 CSKY_ISA_DSP_ENHANCE
),
6385 OP32 ("mulacs.s16.e",
6386 OPCODE_INFO3 (0xf8008aa0,
6387 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6388 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6389 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6390 CSKY_ISA_DSP_ENHANCE
),
6391 OP32 ("mulacsr.s16.e",
6392 OPCODE_INFO3 (0xf8008ae0,
6393 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6394 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6395 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6396 CSKY_ISA_DSP_ENHANCE
),
6397 OP32 ("mulacsx.s16.e",
6398 OPCODE_INFO3 (0xf8008ca0,
6399 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6400 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6401 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6402 CSKY_ISA_DSP_ENHANCE
),
6403 OP32 ("mulsca.s16.e",
6404 OPCODE_INFO3 (0xf8008ce0,
6405 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6406 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6407 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6408 CSKY_ISA_DSP_ENHANCE
),
6409 OP32 ("mulscax.s16.e",
6410 OPCODE_INFO3 (0xf8008ea0,
6411 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6412 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6413 (21_25
, AREG
, OPRND_SHIFT_0_BIT
)),
6414 CSKY_ISA_DSP_ENHANCE
),
6416 /* The followings are vdsp instructions for ck810. */
6418 OPCODE_INFO2 (0xf8000e80,
6419 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6420 (16_19or21_24
, FREG_WITH_INDEX
, OPRND_SHIFT_0_BIT
)),
6423 OPCODE_INFO2 (0xf8100e80,
6424 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6425 (16_19or21_24
, FREG_WITH_INDEX
, OPRND_SHIFT_0_BIT
)),
6428 OPCODE_INFO2 (0xfa000e80,
6429 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6430 (16_19or21_24
, FREG_WITH_INDEX
, OPRND_SHIFT_0_BIT
)),
6433 OPCODE_INFO2 (0xf8001200,
6434 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6435 (16_19or21_24
, FREG_WITH_INDEX
, OPRND_SHIFT_0_BIT
)),
6438 OPCODE_INFO2 (0xf8001220,
6439 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6440 (16_19or21_24
, FREG_WITH_INDEX
, OPRND_SHIFT_0_BIT
)),
6443 OPCODE_INFO2 (0xf8001240,
6444 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6445 (16_19or21_24
, FREG_WITH_INDEX
, OPRND_SHIFT_0_BIT
)),
6448 OPCODE_INFO2 (0xf8001280,
6449 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6450 (16_19or21_24
, FREG_WITH_INDEX
, OPRND_SHIFT_0_BIT
)),
6453 OPCODE_INFO2 (0xf80012a0,
6454 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
6455 (16_19or21_24
, FREG_WITH_INDEX
, OPRND_SHIFT_0_BIT
)),
6458 OPCODE_INFO2 (0xf8001300,
6459 (0_3or21_24
, FREG_WITH_INDEX
, OPRND_SHIFT_0_BIT
),
6460 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
6463 OPCODE_INFO2 (0xf8001320,
6464 (0_3or21_24
, FREG_WITH_INDEX
, OPRND_SHIFT_0_BIT
),
6465 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
6468 OPCODE_INFO2 (0xf8001340,
6469 (0_3or21_24
, FREG_WITH_INDEX
, OPRND_SHIFT_0_BIT
),
6470 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
6473 SOPCODE_INFO2 (0xf8002000,
6474 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6475 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6476 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_3_BIT
))),
6479 SOPCODE_INFO2 (0xf8002100,
6480 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6481 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6482 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_3_BIT
))),
6485 SOPCODE_INFO2 (0xf8002200,
6486 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6487 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6488 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_3_BIT
))),
6491 SOPCODE_INFO2 (0xf8002400,
6492 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6493 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6494 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_4_BIT
))),
6497 SOPCODE_INFO2 (0xf8002500,
6498 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6499 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6500 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_4_BIT
))),
6503 SOPCODE_INFO2 (0xf8002600,
6504 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6505 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6506 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_4_BIT
))),
6509 SOPCODE_INFO2 (0xf8002800,
6510 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6511 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6512 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_3_BIT
))),
6515 SOPCODE_INFO2 (0xf8002900,
6516 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6517 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6518 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_3_BIT
))),
6521 SOPCODE_INFO2 (0xf8002a00,
6522 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6523 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6524 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_3_BIT
))),
6527 SOPCODE_INFO2 (0xf8002c00,
6528 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6529 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6530 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_4_BIT
))),
6533 SOPCODE_INFO2 (0xf8002d00,
6534 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6535 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6536 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_4_BIT
))),
6539 SOPCODE_INFO2 (0xf8002e00,
6540 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6541 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6542 (4_7or21_24
, IMM_FLDST
, OPRND_SHIFT_4_BIT
))),
6545 SOPCODE_INFO2 (0xf8003000,
6546 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6547 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6548 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
6551 SOPCODE_INFO2 (0xf8003100,
6552 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6553 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6554 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
6557 SOPCODE_INFO2 (0xf8003200,
6558 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6559 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6560 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
6563 SOPCODE_INFO2 (0xf8003400,
6564 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6565 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6566 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
6569 SOPCODE_INFO2 (0xf8003500,
6570 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6571 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6572 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
6575 SOPCODE_INFO2 (0xf8003600,
6576 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6577 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6578 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
6581 SOPCODE_INFO2 (0xf8003800,
6582 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6583 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6584 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
6587 SOPCODE_INFO2 (0xf8003900,
6588 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6589 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6590 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
6593 SOPCODE_INFO2 (0xf8003a00,
6594 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6595 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6596 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
6599 SOPCODE_INFO2 (0xf8003c00,
6600 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6601 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6602 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
6605 SOPCODE_INFO2 (0xf8003d00,
6606 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6607 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6608 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
6611 SOPCODE_INFO2 (0xf8003e00,
6612 (0_3
, FREG
, OPRND_SHIFT_0_BIT
),
6613 BRACKET_OPRND ((16_20
, AREG
, OPRND_SHIFT_0_BIT
),
6614 (5_6or21_25
, AREG_WITH_LSHIFT_FPU
, OPRND_SHIFT_0_BIT
))),
6617 OPCODE_INFO2 (0xf8000c00,
6618 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6619 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6622 OPCODE_INFO2 (0xf8000060,
6623 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6624 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6627 OPCODE_INFO2 (0xf8100060,
6628 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6629 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6632 OPCODE_INFO2 (0xf8000070,
6633 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6634 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6637 OPCODE_INFO2 (0xf8100070,
6638 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6639 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6642 OPCODE_INFO2 (0xf8000c20,
6643 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6644 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6647 OPCODE_INFO2 (0xf8100c20,
6648 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6649 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6652 OPCODE_INFO2 (0xf8000c30,
6653 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6654 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6657 OPCODE_INFO2 (0xf8100c30,
6658 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6659 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6662 OPCODE_INFO2 (0xf8100d00,
6663 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6664 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6667 OPCODE_INFO2 (0xfa000d00,
6668 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6669 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6672 OPCODE_INFO2 (0xf8100d10,
6673 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6674 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6677 OPCODE_INFO2 (0xfa000d10,
6678 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6679 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6681 OP32 ("vmov.u16.sl",
6682 OPCODE_INFO2 (0xf8100d40,
6683 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6684 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6686 OP32 ("vmov.u32.sl",
6687 OPCODE_INFO2 (0xfa000d40,
6688 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6689 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6691 OP32 ("vmov.s16.sl",
6692 OPCODE_INFO2 (0xf8100d50,
6693 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6694 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6696 OP32 ("vmov.s32.sl",
6697 OPCODE_INFO2 (0xfa000d50,
6698 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6699 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6702 OPCODE_INFO2 (0xf8100d60,
6703 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6704 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6707 OPCODE_INFO2 (0xfa000d60,
6708 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6709 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6712 OPCODE_INFO2 (0xf8100d70,
6713 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6714 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6717 OPCODE_INFO2 (0xfa000d70,
6718 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6719 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6721 OP32 ("vmov.u16.rh",
6722 OPCODE_INFO2 (0xf8100d80,
6723 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6724 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6726 OP32 ("vmov.u32.rh",
6727 OPCODE_INFO2 (0xfa000d80,
6728 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6729 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6731 OP32 ("vmov.s16.rh",
6732 OPCODE_INFO2 (0xf8100d90,
6733 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6734 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6736 OP32 ("vmov.s32.rh",
6737 OPCODE_INFO2 (0xfa000d90,
6738 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6739 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6741 OP32 ("vstou.u16.sl",
6742 OPCODE_INFO2 (0xf8100dc0,
6743 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6744 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6746 OP32 ("vstou.u32.sl",
6747 OPCODE_INFO2 (0xfa000dc0,
6748 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6749 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6751 OP32 ("vstou.s16.sl",
6752 OPCODE_INFO2 (0xf8100dd0,
6753 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6754 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6756 OP32 ("vstou.s32.sl",
6757 OPCODE_INFO2 (0xfa000dd0,
6758 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6759 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6762 OPCODE_INFO2 (0xf8000e60,
6763 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6764 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6767 OPCODE_INFO2 (0xf8100e60,
6768 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6769 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6772 OPCODE_INFO2 (0xfa000e60,
6773 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6774 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6777 OPCODE_INFO2 (0xf8000ea0,
6778 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6779 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6782 OPCODE_INFO2 (0xf8000ec0,
6783 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6784 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6787 OPCODE_INFO2 (0xf8100ec0,
6788 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6789 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6792 OPCODE_INFO2 (0xfa000ec0,
6793 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6794 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6797 OPCODE_INFO2 (0xf8000ee0,
6798 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6799 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6802 OPCODE_INFO2 (0xf8100ee0,
6803 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6804 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6807 OPCODE_INFO2 (0xfa000ee0,
6808 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6809 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6812 OPCODE_INFO2 (0xf8000ef0,
6813 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6814 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6817 OPCODE_INFO2 (0xf8100ef0,
6818 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6819 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6822 OPCODE_INFO2 (0xfa000ef0,
6823 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6824 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6827 OPCODE_INFO2 (0xf8001010,
6828 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6829 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6832 OPCODE_INFO2 (0xf8101010,
6833 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6834 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6837 OPCODE_INFO2 (0xfa001010,
6838 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6839 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6842 OPCODE_INFO2 (0xf8001040,
6843 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6844 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6847 OPCODE_INFO2 (0xf8101040,
6848 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6849 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6852 OPCODE_INFO2 (0xfa001040,
6853 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6854 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6857 OPCODE_INFO2 (0xf8001050,
6858 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6859 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6862 OPCODE_INFO2 (0xf8101050,
6863 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6864 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6867 OPCODE_INFO2 (0xfa001050,
6868 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6869 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6872 OPCODE_INFO2 (0xf8001080,
6873 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6874 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6877 OPCODE_INFO2 (0xf8101080,
6878 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6879 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6882 OPCODE_INFO2 (0xfa001080,
6883 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6884 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6887 OPCODE_INFO2 (0xf8001090,
6888 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6889 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6892 OPCODE_INFO2 (0xf8101090,
6893 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6894 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6897 OPCODE_INFO2 (0xfa001090,
6898 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6899 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6902 OPCODE_INFO2 (0xf80010c0,
6903 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6904 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6907 OPCODE_INFO2 (0xf81010c0,
6908 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6909 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6912 OPCODE_INFO2 (0xfa0010c0,
6913 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6914 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6917 OPCODE_INFO2 (0xf80010d0,
6918 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6919 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6922 OPCODE_INFO2 (0xf81010d0,
6923 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6924 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6927 OPCODE_INFO2 (0xfa0010d0,
6928 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6929 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6932 OPCODE_INFO2 (0xf8000880,
6933 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6934 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6936 OP32 ("vcmphsz.u16",
6937 OPCODE_INFO2 (0xf8100880,
6938 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6939 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6941 OP32 ("vcmphsz.u32",
6942 OPCODE_INFO2 (0xfa000880,
6943 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6944 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6947 OPCODE_INFO2 (0xf8000890,
6948 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6949 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6951 OP32 ("vcmphsz.s16",
6952 OPCODE_INFO2 (0xf8100890,
6953 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6954 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6956 OP32 ("vcmphsz.s32",
6957 OPCODE_INFO2 (0xfa000890,
6958 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6959 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6962 OPCODE_INFO2 (0xf80008a0,
6963 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6964 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6966 OP32 ("vcmpltz.u16",
6967 OPCODE_INFO2 (0xf81008a0,
6968 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6969 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6971 OP32 ("vcmpltz.u32",
6972 OPCODE_INFO2 (0xfa0008a0,
6973 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6974 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6977 OPCODE_INFO2 (0xf80008b0,
6978 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6979 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6981 OP32 ("vcmpltz.s16",
6982 OPCODE_INFO2 (0xf81008b0,
6983 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6984 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6986 OP32 ("vcmpltz.s32",
6987 OPCODE_INFO2 (0xfa0008b0,
6988 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6989 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6992 OPCODE_INFO2 (0xf80008c0,
6993 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6994 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
6996 OP32 ("vcmpnez.u16",
6997 OPCODE_INFO2 (0xf81008c0,
6998 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
6999 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
7001 OP32 ("vcmpnez.u32",
7002 OPCODE_INFO2 (0xfa0008c0,
7003 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7004 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
7007 OPCODE_INFO2 (0xf80008d0,
7008 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7009 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
7011 OP32 ("vcmpnez.s16",
7012 OPCODE_INFO2 (0xf81008d0,
7013 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7014 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
7016 OP32 ("vcmpnez.s32",
7017 OPCODE_INFO2 (0xfa0008d0,
7018 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7019 (16_19
, VREG
, OPRND_SHIFT_0_BIT
)),
7022 OPCODE_INFO3 (0xf8000f40,
7023 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7024 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7025 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7028 OPCODE_INFO3 (0xf8100f40,
7029 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7030 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7031 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7034 OPCODE_INFO3 (0xfa000f40,
7035 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7036 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7037 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7040 OPCODE_INFO3 (0xf8000f60,
7041 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7042 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7043 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7046 OPCODE_INFO3 (0xf8100f60,
7047 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7048 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7049 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7052 OPCODE_INFO3 (0xfa000f60,
7053 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7054 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7055 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7058 OPCODE_INFO3 (0xf8000000,
7059 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7060 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7061 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7064 OPCODE_INFO3 (0xf8100000,
7065 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7066 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7067 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7070 OPCODE_INFO3 (0xfa000000,
7071 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7072 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7073 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7076 OPCODE_INFO3 (0xf8000010,
7077 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7078 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7079 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7082 OPCODE_INFO3 (0xf8100010,
7083 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7084 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7085 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7088 OPCODE_INFO3 (0xfa000010,
7089 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7090 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7091 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7094 OPCODE_INFO3 (0xf8000020,
7095 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7096 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7097 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7100 OPCODE_INFO3 (0xf8100020,
7101 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7102 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7103 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7106 OPCODE_INFO3 (0xf8000030,
7107 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7108 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7109 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7112 OPCODE_INFO3 (0xf8100030,
7113 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7114 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7115 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7118 OPCODE_INFO3 (0xf8000040,
7119 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7120 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7121 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7124 OPCODE_INFO3 (0xf8100040,
7125 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7126 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7127 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7130 OPCODE_INFO3 (0xfa000040,
7131 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7132 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7133 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7136 OPCODE_INFO3 (0xf8000050,
7137 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7138 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7139 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7142 OPCODE_INFO3 (0xf8100050,
7143 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7144 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7145 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7148 OPCODE_INFO3 (0xfa000050,
7149 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7150 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7151 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7153 OP32 ("vadd.xu16.sl",
7154 OPCODE_INFO3 (0xf8100140,
7155 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7156 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7157 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7159 OP32 ("vadd.xu32.sl",
7160 OPCODE_INFO3 (0xfa000140,
7161 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7162 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7163 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7165 OP32 ("vadd.xs16.sl",
7166 OPCODE_INFO3 (0xf8100150,
7167 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7168 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7169 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7171 OP32 ("vadd.xs32.sl",
7172 OPCODE_INFO3 (0xfa000150,
7173 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7174 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7175 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7178 OPCODE_INFO3 (0xf8100160,
7179 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7180 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7181 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7184 OPCODE_INFO3 (0xfa000160,
7185 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7186 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7187 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7190 OPCODE_INFO3 (0xf8100170,
7191 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7192 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7193 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7196 OPCODE_INFO3 (0xfa000170,
7197 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7198 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7199 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7202 OPCODE_INFO3 (0xf8000180,
7203 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7204 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7205 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7208 OPCODE_INFO3 (0xf8100180,
7209 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7210 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7211 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7214 OPCODE_INFO3 (0xfa000180,
7215 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7216 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7217 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7220 OPCODE_INFO3 (0xf8000190,
7221 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7222 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7223 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7226 OPCODE_INFO3 (0xf8100190,
7227 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7228 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7229 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7232 OPCODE_INFO3 (0xfa000190,
7233 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7234 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7235 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7238 OPCODE_INFO3 (0xf80001a0,
7239 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7240 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7241 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7243 OP32 ("vaddh.u16.r",
7244 OPCODE_INFO3 (0xf81001a0,
7245 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7246 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7247 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7249 OP32 ("vaddh.u32.r",
7250 OPCODE_INFO3 (0xfa0001a0,
7251 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7252 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7253 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7256 OPCODE_INFO3 (0xf80001b0,
7257 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7258 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7259 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7261 OP32 ("vaddh.s16.r",
7262 OPCODE_INFO3 (0xf81001b0,
7263 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7264 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7265 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7267 OP32 ("vaddh.s32.r",
7268 OPCODE_INFO3 (0xfa0001b0,
7269 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7270 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7271 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7274 OPCODE_INFO3 (0xf80001c0,
7275 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7276 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7277 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7280 OPCODE_INFO3 (0xf81001c0,
7281 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7282 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7283 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7286 OPCODE_INFO3 (0xfa0001c0,
7287 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7288 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7289 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7292 OPCODE_INFO3 (0xf80001d0,
7293 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7294 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7295 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7298 OPCODE_INFO3 (0xf81001d0,
7299 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7300 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7301 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7304 OPCODE_INFO3 (0xfa0001d0,
7305 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7306 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7307 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7310 OPCODE_INFO3 (0xf8000200,
7311 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7312 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7313 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7316 OPCODE_INFO3 (0xf8100200,
7317 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7318 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7319 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7322 OPCODE_INFO3 (0xfa000200,
7323 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7324 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7325 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7328 OPCODE_INFO3 (0xf8000210,
7329 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7330 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7331 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7334 OPCODE_INFO3 (0xf8100210,
7335 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7336 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7337 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7340 OPCODE_INFO3 (0xfa000210,
7341 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7342 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7343 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7346 OPCODE_INFO3 (0xf8000220,
7347 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7348 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7349 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7352 OPCODE_INFO3 (0xf8100220,
7353 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7354 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7355 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7358 OPCODE_INFO3 (0xfa000220,
7359 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7360 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7361 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7364 OPCODE_INFO3 (0xf8000230,
7365 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7366 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7367 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7370 OPCODE_INFO3 (0xf8100230,
7371 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7372 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7373 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7376 OPCODE_INFO3 (0xfa000230,
7377 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7378 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7379 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7382 OPCODE_INFO3 (0xf8000240,
7383 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7384 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7385 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7388 OPCODE_INFO3 (0xf8100240,
7389 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7390 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7391 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7394 OPCODE_INFO3 (0xfa000240,
7395 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7396 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7397 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7400 OPCODE_INFO3 (0xf8000250,
7401 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7402 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7403 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7406 OPCODE_INFO3 (0xf8100250,
7407 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7408 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7409 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7412 OPCODE_INFO3 (0xfa000250,
7413 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7414 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7415 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7418 OPCODE_INFO3 (0xf8000260,
7419 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7420 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7421 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7424 OPCODE_INFO3 (0xf8100260,
7425 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7426 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7427 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7430 OPCODE_INFO3 (0xf8000270,
7431 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7432 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7433 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7436 OPCODE_INFO3 (0xf8100270,
7437 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7438 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7439 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7442 OPCODE_INFO3 (0xf8000280,
7443 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7444 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7445 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7448 OPCODE_INFO3 (0xf8100280,
7449 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7450 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7451 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7454 OPCODE_INFO3 (0xfa000280,
7455 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7456 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7457 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7460 OPCODE_INFO3 (0xf8000290,
7461 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7462 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7463 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7466 OPCODE_INFO3 (0xf8100290,
7467 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7468 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7469 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7472 OPCODE_INFO3 (0xfa000290,
7473 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7474 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7475 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7478 OPCODE_INFO3 (0xf80002a0,
7479 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7480 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7481 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7483 OP32 ("vsabsa.eu16",
7484 OPCODE_INFO3 (0xf81002a0,
7485 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7486 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7487 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7490 OPCODE_INFO3 (0xf80002b0,
7491 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7492 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7493 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7495 OP32 ("vsabsa.es16",
7496 OPCODE_INFO3 (0xf81002b0,
7497 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7498 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7499 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7502 OPCODE_INFO3 (0xf8100360,
7503 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7504 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7505 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7508 OPCODE_INFO3 (0xfa000360,
7509 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7510 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7511 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7514 OPCODE_INFO3 (0xf8100370,
7515 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7516 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7517 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7520 OPCODE_INFO3 (0xfa000370,
7521 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7522 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7523 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7526 OPCODE_INFO3 (0xf8000380,
7527 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7528 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7529 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7532 OPCODE_INFO3 (0xf8100380,
7533 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7534 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7535 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7538 OPCODE_INFO3 (0xfa000380,
7539 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7540 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7541 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7544 OPCODE_INFO3 (0xf8000390,
7545 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7546 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7547 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7550 OPCODE_INFO3 (0xf8100390,
7551 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7552 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7553 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7556 OPCODE_INFO3 (0xfa000390,
7557 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7558 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7559 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7562 OPCODE_INFO3 (0xf80003a0,
7563 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7564 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7565 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7567 OP32 ("vsubh.u16.r",
7568 OPCODE_INFO3 (0xf81003a0,
7569 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7570 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7571 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7573 OP32 ("vsubh.u32.r",
7574 OPCODE_INFO3 (0xfa0003a0,
7575 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7576 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7577 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7580 OPCODE_INFO3 (0xf80003b0,
7581 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7582 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7583 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7585 OP32 ("vsubh.s16.r",
7586 OPCODE_INFO3 (0xf81003b0,
7587 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7588 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7589 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7591 OP32 ("vsubh.s32.r",
7592 OPCODE_INFO3 (0xfa0003b0,
7593 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7594 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7595 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7598 OPCODE_INFO3 (0xf80003c0,
7599 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7600 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7601 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7604 OPCODE_INFO3 (0xf81003c0,
7605 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7606 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7607 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7610 OPCODE_INFO3 (0xfa0003c0,
7611 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7612 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7613 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7616 OPCODE_INFO3 (0xf80003d0,
7617 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7618 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7619 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7622 OPCODE_INFO3 (0xf81003d0,
7623 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7624 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7625 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7628 OPCODE_INFO3 (0xfa0003d0,
7629 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7630 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7631 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7634 OPCODE_INFO3 (0xf8000400,
7635 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7636 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7637 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7640 OPCODE_INFO3 (0xf8100400,
7641 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7642 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7643 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7646 OPCODE_INFO3 (0xfa000400,
7647 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7648 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7649 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7652 OPCODE_INFO3 (0xf8000410,
7653 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7654 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7655 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7658 OPCODE_INFO3 (0xf8100410,
7659 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7660 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7661 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7664 OPCODE_INFO3 (0xfa000410,
7665 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7666 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7667 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7670 OPCODE_INFO3 (0xf8000420,
7671 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7672 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7673 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7676 OPCODE_INFO3 (0xf8100420,
7677 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7678 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7679 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7682 OPCODE_INFO3 (0xf8000430,
7683 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7684 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7685 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7688 OPCODE_INFO3 (0xf8100430,
7689 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7690 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7691 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7694 OPCODE_INFO3 (0xf8000440,
7695 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7696 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7697 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7700 OPCODE_INFO3 (0xf8100440,
7701 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7702 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7703 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7706 OPCODE_INFO3 (0xfa000440,
7707 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7708 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7709 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7712 OPCODE_INFO3 (0xf8000450,
7713 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7714 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7715 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7718 OPCODE_INFO3 (0xf8100450,
7719 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7720 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7721 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7724 OPCODE_INFO3 (0xfa000450,
7725 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7726 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7727 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7730 OPCODE_INFO3 (0xf8000460,
7731 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7732 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7733 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7736 OPCODE_INFO3 (0xf8100460,
7737 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7738 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7739 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7742 OPCODE_INFO3 (0xfa000460,
7743 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7744 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7745 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7748 OPCODE_INFO3 (0xf8000470,
7749 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7750 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7751 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7754 OPCODE_INFO3 (0xf8100470,
7755 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7756 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7757 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7760 OPCODE_INFO3 (0xfa000470,
7761 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7762 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7763 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7766 OPCODE_INFO3 (0xf8000480,
7767 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7768 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7769 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7772 OPCODE_INFO3 (0xf8100480,
7773 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7774 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7775 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7778 OPCODE_INFO3 (0xfa000480,
7779 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7780 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7781 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7784 OPCODE_INFO3 (0xf8000490,
7785 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7786 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7787 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7790 OPCODE_INFO3 (0xf8100490,
7791 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7792 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7793 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7796 OPCODE_INFO3 (0xfa000490,
7797 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7798 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7799 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7802 OPCODE_INFO3 (0xf80004a0,
7803 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7804 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7805 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7808 OPCODE_INFO3 (0xf81004a0,
7809 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7810 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7811 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7814 OPCODE_INFO3 (0xf80004b0,
7815 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7816 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7817 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7820 OPCODE_INFO3 (0xf81004b0,
7821 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7822 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7823 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7826 OPCODE_INFO3 (0xf8000680,
7827 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7828 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7829 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7832 OPCODE_INFO3 (0xf8100680,
7833 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7834 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7835 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7838 OPCODE_INFO3 (0xfa000680,
7839 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7840 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7841 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7844 OPCODE_INFO3 (0xf8000690,
7845 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7846 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7847 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7850 OPCODE_INFO3 (0xf8100690,
7851 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7852 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7853 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7856 OPCODE_INFO3 (0xfa000690,
7857 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7858 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7859 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7862 OPCODE_INFO3 (0xf80006c0,
7863 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7864 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7865 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7868 OPCODE_INFO3 (0xf81006c0,
7869 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7870 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7871 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7874 OPCODE_INFO3 (0xfa0006c0,
7875 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7876 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7877 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7880 OPCODE_INFO3 (0xf80006d0,
7881 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7882 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7883 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7886 OPCODE_INFO3 (0xf81006d0,
7887 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7888 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7889 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7892 OPCODE_INFO3 (0xfa0006d0,
7893 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7894 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7895 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7898 OPCODE_INFO3 (0xf8000780,
7899 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7900 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7901 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7904 OPCODE_INFO3 (0xf8100780,
7905 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7906 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7907 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7910 OPCODE_INFO3 (0xfa000780,
7911 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7912 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7913 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7916 OPCODE_INFO3 (0xf8000790,
7917 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7918 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7919 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7922 OPCODE_INFO3 (0xf8100790,
7923 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7924 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7925 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7928 OPCODE_INFO3 (0xfa000790,
7929 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7930 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7931 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7934 OPCODE_INFO3 (0xf80007c0,
7935 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7936 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7937 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7940 OPCODE_INFO3 (0xf81007c0,
7941 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7942 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7943 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7946 OPCODE_INFO3 (0xfa0007c0,
7947 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7948 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7949 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7952 OPCODE_INFO3 (0xf80007d0,
7953 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7954 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7955 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7958 OPCODE_INFO3 (0xf81007d0,
7959 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7960 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7961 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7964 OPCODE_INFO3 (0xfa0007d0,
7965 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7966 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7967 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7970 OPCODE_INFO3 (0xf8000800,
7971 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7972 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7973 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7976 OPCODE_INFO3 (0xf8100800,
7977 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7978 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7979 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7982 OPCODE_INFO3 (0xfa000800,
7983 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7984 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7985 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7988 OPCODE_INFO3 (0xf8000810,
7989 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7990 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7991 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
7994 OPCODE_INFO3 (0xf8100810,
7995 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
7996 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
7997 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8000 OPCODE_INFO3 (0xfa000810,
8001 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8002 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8003 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8006 OPCODE_INFO3 (0xf8000820,
8007 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8008 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8009 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8012 OPCODE_INFO3 (0xf8100820,
8013 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8014 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8015 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8018 OPCODE_INFO3 (0xfa000820,
8019 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8020 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8021 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8024 OPCODE_INFO3 (0xf8000830,
8025 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8026 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8027 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8030 OPCODE_INFO3 (0xf8100830,
8031 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8032 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8033 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8036 OPCODE_INFO3 (0xfa000830,
8037 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8038 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8039 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8042 OPCODE_INFO3 (0xf8000840,
8043 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8044 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8045 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8048 OPCODE_INFO3 (0xf8100840,
8049 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8050 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8051 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8054 OPCODE_INFO3 (0xfa000840,
8055 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8056 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8057 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8060 OPCODE_INFO3 (0xf8000850,
8061 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8062 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8063 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8066 OPCODE_INFO3 (0xf8100850,
8067 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8068 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8069 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8072 OPCODE_INFO3 (0xfa000850,
8073 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8074 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8075 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8078 OPCODE_INFO3 (0xf8000900,
8079 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8080 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8081 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8084 OPCODE_INFO3 (0xf8100900,
8085 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8086 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8087 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8090 OPCODE_INFO3 (0xfa000900,
8091 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8092 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8093 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8096 OPCODE_INFO3 (0xf8000910,
8097 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8098 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8099 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8102 OPCODE_INFO3 (0xf8100910,
8103 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8104 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8105 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8108 OPCODE_INFO3 (0xfa000910,
8109 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8110 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8111 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8114 OPCODE_INFO3 (0xf8000920,
8115 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8116 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8117 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8120 OPCODE_INFO3 (0xf8100920,
8121 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8122 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8123 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8126 OPCODE_INFO3 (0xfa000920,
8127 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8128 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8129 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8132 OPCODE_INFO3 (0xf8000930,
8133 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8134 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8135 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8138 OPCODE_INFO3 (0xf8100930,
8139 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8140 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8141 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8144 OPCODE_INFO3 (0xfa000930,
8145 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8146 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8147 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8150 OPCODE_INFO3 (0xf8000980,
8151 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8152 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8153 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8156 OPCODE_INFO3 (0xf8100980,
8157 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8158 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8159 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8162 OPCODE_INFO3 (0xfa000980,
8163 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8164 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8165 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8168 OPCODE_INFO3 (0xf8000990,
8169 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8170 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8171 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8174 OPCODE_INFO3 (0xf8100990,
8175 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8176 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8177 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8180 OPCODE_INFO3 (0xfa000990,
8181 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8182 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8183 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8186 OPCODE_INFO3 (0xf80009a0,
8187 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8188 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8189 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8192 OPCODE_INFO3 (0xf81009a0,
8193 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8194 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8195 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8198 OPCODE_INFO3 (0xfa0009a0,
8199 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8200 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8201 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8204 OPCODE_INFO3 (0xf80009b0,
8205 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8206 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8207 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8210 OPCODE_INFO3 (0xf81009b0,
8211 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8212 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8213 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8216 OPCODE_INFO3 (0xfa0009b0,
8217 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8218 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8219 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8222 OPCODE_INFO3 (0xf8000a00,
8223 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8224 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8225 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8228 OPCODE_INFO3 (0xf8100a00,
8229 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8230 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8231 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8234 OPCODE_INFO3 (0xfa000a00,
8235 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8236 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8237 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8240 OPCODE_INFO3 (0xf8000a20,
8241 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8242 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8243 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8246 OPCODE_INFO3 (0xf8100a20,
8247 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8248 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8249 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8252 OPCODE_INFO3 (0xfa000a20,
8253 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8254 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8255 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8258 OPCODE_INFO3 (0xf8000a40,
8259 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8260 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8261 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8264 OPCODE_INFO3 (0xf8100a40,
8265 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8266 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8267 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8270 OPCODE_INFO3 (0xfa000a40,
8271 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8272 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8273 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8276 OPCODE_INFO3 (0xf8000a60,
8277 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8278 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8279 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8282 OPCODE_INFO3 (0xf8100a60,
8283 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8284 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8285 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8288 OPCODE_INFO3 (0xfa000a60,
8289 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8290 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8291 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8294 OPCODE_INFO3 (0xf8000a80,
8295 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8296 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8297 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8300 OPCODE_INFO3 (0xf8100a80,
8301 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8302 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8303 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8306 OPCODE_INFO3 (0xfa000a80,
8307 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8308 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8309 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8312 OPCODE_INFO3 (0xf8000b20,
8313 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8314 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8315 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8318 OPCODE_INFO3 (0xf8100b20,
8319 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8320 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8321 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8324 OPCODE_INFO3 (0xfa000b20,
8325 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8326 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8327 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8330 OPCODE_INFO3 (0xf8000f00,
8331 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8332 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8333 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8336 OPCODE_INFO3 (0xf8100f00,
8337 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8338 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8339 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8342 OPCODE_INFO3 (0xfa000f00,
8343 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8344 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8345 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8348 OPCODE_INFO3 (0xf8000f20,
8349 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8350 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8351 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8354 OPCODE_INFO3 (0xf8100f20,
8355 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8356 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8357 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8360 OPCODE_INFO3 (0xfa000f20,
8361 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8362 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8363 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8366 OPCODE_INFO3 (0xf8000fc0,
8367 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8368 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8369 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8372 OPCODE_INFO3 (0xf8100fc0,
8373 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8374 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8375 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8378 OPCODE_INFO3 (0xfa000fc0,
8379 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8380 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8381 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8384 OPCODE_INFO3 (0xf8000fe0,
8385 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8386 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8387 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8390 OPCODE_INFO3 (0xf8100fe0,
8391 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8392 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8393 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8396 OPCODE_INFO3 (0xfa000fe0,
8397 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8398 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8399 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8402 OPCODE_INFO3 (0xf8000f80,
8403 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8404 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8405 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8408 OPCODE_INFO3 (0xf8100f80,
8409 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8410 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8411 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8414 OPCODE_INFO3 (0xfa000f80,
8415 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8416 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8417 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8420 OPCODE_INFO3 (0xf8000fa0,
8421 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8422 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8423 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8426 OPCODE_INFO3 (0xf8100fa0,
8427 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8428 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8429 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8432 OPCODE_INFO3 (0xfa000fa0,
8433 (0_3
, VREG
, OPRND_SHIFT_0_BIT
),
8434 (16_19
, VREG
, OPRND_SHIFT_0_BIT
),
8435 (21_24
, VREG
, OPRND_SHIFT_0_BIT
)),
8438 #define OPRND_SHIFT0(mask, type) (mask, type, OPRND_SHIFT_0_BIT)
8439 #define OPRND_SHIFT1(mask, type) (mask, type, OPRND_SHIFT_1_BIT)
8440 #define OPRND_SHIFT2(mask, type) (mask, type, OPRND_SHIFT_2_BIT)
8441 #define OPRND_SHIFT3(mask, type) (mask, type, OPRND_SHIFT_3_BIT)
8442 #define OPRND_SHIFT4(mask, type) (mask, type, OPRND_SHIFT_4_BIT)
8444 /* The followings are 860 floating instructions. */
8446 OPCODE_INFO3 (0xf400c800,
8447 OPRND_SHIFT0 (0_4
, FREG
),
8448 OPRND_SHIFT0 (16_20
, FREG
),
8449 OPRND_SHIFT0 (21_25
, FREG
)),
8450 CSKY_ISA_FLOAT_7E60
),
8452 OPCODE_INFO3 (0xf400c800,
8453 OPRND_SHIFT0 (0_4
, FREG
),
8454 OPRND_SHIFT0 (16_20
, FREG
),
8455 OPRND_SHIFT0 (21_25
, FREG
)),
8456 CSKY_ISA_FLOAT_7E60
),
8458 OPCODE_INFO3 (0xf400c820,
8459 OPRND_SHIFT0 (0_4
, FREG
),
8460 OPRND_SHIFT0 (16_20
, FREG
),
8461 OPRND_SHIFT0 (21_25
, FREG
)),
8462 CSKY_ISA_FLOAT_7E60
),
8464 OPCODE_INFO3 (0xf400c820,
8465 OPRND_SHIFT0 (0_4
, FREG
),
8466 OPRND_SHIFT0 (16_20
, FREG
),
8467 OPRND_SHIFT0 (21_25
, FREG
)),
8468 CSKY_ISA_FLOAT_7E60
),
8470 OPCODE_INFO2 (0xf400c880,
8471 OPRND_SHIFT0 (0_4
, FREG
),
8472 OPRND_SHIFT0 (16_20
, FREG
)),
8473 CSKY_ISA_FLOAT_7E60
),
8475 OPCODE_INFO2 (0xf400c880,
8476 OPRND_SHIFT0 (0_4
, FREG
),
8477 OPRND_SHIFT0 (16_20
, FREG
)),
8478 CSKY_ISA_FLOAT_7E60
),
8480 OPCODE_INFO2 (0xf400c8c0,
8481 OPRND_SHIFT0 (0_4
, FREG
),
8482 OPRND_SHIFT0 (16_20
, FREG
)),
8483 CSKY_ISA_FLOAT_7E60
),
8485 OPCODE_INFO2 (0xf400c8c0,
8486 OPRND_SHIFT0 (0_4
, FREG
),
8487 OPRND_SHIFT0 (16_20
, FREG
)),
8488 CSKY_ISA_FLOAT_7E60
),
8490 OPCODE_INFO2 (0xf400c8e0,
8491 OPRND_SHIFT0 (0_4
, FREG
),
8492 OPRND_SHIFT0 (16_20
, FREG
)),
8493 CSKY_ISA_FLOAT_7E60
),
8495 OPCODE_INFO2 (0xf400c8e0,
8496 OPRND_SHIFT0 (0_4
, FREG
),
8497 OPRND_SHIFT0 (16_20
, FREG
)),
8498 CSKY_ISA_FLOAT_7E60
),
8500 OPCODE_INFO1 (0xf400c900,
8501 OPRND_SHIFT0 (16_20
, FREG
)),
8502 CSKY_ISA_FLOAT_7E60
),
8504 OPCODE_INFO1 (0xf400c900,
8505 OPRND_SHIFT0 (16_20
, FREG
)),
8506 CSKY_ISA_FLOAT_7E60
),
8508 OPCODE_INFO1 (0xf400c920,
8509 OPRND_SHIFT0 (16_20
, FREG
)),
8510 CSKY_ISA_FLOAT_7E60
),
8512 OPCODE_INFO1 (0xf400c920,
8513 OPRND_SHIFT0 (16_20
, FREG
)),
8514 CSKY_ISA_FLOAT_7E60
),
8516 OPCODE_INFO1 (0xf400c940,
8517 OPRND_SHIFT0 (16_20
, FREG
)),
8518 CSKY_ISA_FLOAT_7E60
),
8520 OPCODE_INFO1 (0xf400c940,
8521 OPRND_SHIFT0 (16_20
, FREG
)),
8522 CSKY_ISA_FLOAT_7E60
),
8524 OPCODE_INFO1 (0xf400c960,
8525 OPRND_SHIFT0 (16_20
, FREG
)),
8526 CSKY_ISA_FLOAT_7E60
),
8528 OPCODE_INFO1 (0xf400c960,
8529 OPRND_SHIFT0 (16_20
, FREG
)),
8530 CSKY_ISA_FLOAT_7E60
),
8532 OPCODE_INFO2 (0xf400c980,
8533 OPRND_SHIFT0 (16_20
, FREG
),
8534 OPRND_SHIFT0 (21_25
, FREG
)),
8535 CSKY_ISA_FLOAT_7E60
),
8537 OPCODE_INFO2 (0xf400c980,
8538 OPRND_SHIFT0 (16_20
, FREG
),
8539 OPRND_SHIFT0 (21_25
, FREG
)),
8540 CSKY_ISA_FLOAT_7E60
),
8542 OPCODE_INFO2 (0xf400c9a0,
8543 OPRND_SHIFT0 (16_20
, FREG
),
8544 OPRND_SHIFT0 (21_25
, FREG
)),
8545 CSKY_ISA_FLOAT_7E60
),
8547 OPCODE_INFO2 (0xf400c9c0,
8548 OPRND_SHIFT0 (16_20
, FREG
),
8549 OPRND_SHIFT0 (21_25
, FREG
)),
8550 CSKY_ISA_FLOAT_7E60
),
8552 OPCODE_INFO2 (0xf400c9c0,
8553 OPRND_SHIFT0 (16_20
, FREG
),
8554 OPRND_SHIFT0 (21_25
, FREG
)),
8555 CSKY_ISA_FLOAT_7E60
),
8557 OPCODE_INFO2 (0xf400c9e0,
8558 OPRND_SHIFT0 (16_20
, FREG
),
8559 OPRND_SHIFT0 (21_25
, FREG
)),
8560 CSKY_ISA_FLOAT_7E60
),
8562 OPCODE_INFO2 (0xf400c9e0,
8563 OPRND_SHIFT0 (16_20
, FREG
),
8564 OPRND_SHIFT0 (21_25
, FREG
)),
8565 CSKY_ISA_FLOAT_7E60
),
8567 OPCODE_INFO3 (0xf400cd00,
8568 OPRND_SHIFT0 (0_4
, FREG
),
8569 OPRND_SHIFT0 (16_20
, FREG
),
8570 OPRND_SHIFT0 (21_25
, FREG
)),
8571 CSKY_ISA_FLOAT_7E60
),
8573 OPCODE_INFO3 (0xf400cd20,
8574 OPRND_SHIFT0 (0_4
, FREG
),
8575 OPRND_SHIFT0 (16_20
, FREG
),
8576 OPRND_SHIFT0 (21_25
, FREG
)),
8577 CSKY_ISA_FLOAT_7E60
),
8579 OPCODE_INFO1 (0xf400cd40,
8580 OPRND_SHIFT0 (16_20
, FREG
)),
8581 CSKY_ISA_FLOAT_7E60
),
8583 OPCODE_INFO1 (0xf400cd60,
8584 OPRND_SHIFT0 (16_20
, FREG
)),
8585 CSKY_ISA_FLOAT_7E60
),
8587 OPCODE_INFO3 (0xf400ca00,
8588 OPRND_SHIFT0 (0_4
, FREG
),
8589 OPRND_SHIFT0 (16_20
, FREG
),
8590 OPRND_SHIFT0 (21_25
, FREG
)),
8591 CSKY_ISA_FLOAT_7E60
),
8593 OPCODE_INFO3 (0xf400ca00,
8594 OPRND_SHIFT0 (0_4
, FREG
),
8595 OPRND_SHIFT0 (16_20
, FREG
),
8596 OPRND_SHIFT0 (21_25
, FREG
)),
8597 CSKY_ISA_FLOAT_7E60
),
8599 OPCODE_INFO3 (0xf400ca20,
8600 OPRND_SHIFT0 (0_4
, FREG
),
8601 OPRND_SHIFT0 (16_20
, FREG
),
8602 OPRND_SHIFT0 (21_25
, FREG
)),
8603 CSKY_ISA_FLOAT_7E60
),
8605 OPCODE_INFO3 (0xf400ca20,
8606 OPRND_SHIFT0 (0_4
, FREG
),
8607 OPRND_SHIFT0 (16_20
, FREG
),
8608 OPRND_SHIFT0 (21_25
, FREG
)),
8609 CSKY_ISA_FLOAT_7E60
),
8611 OPCODE_INFO3 (0xf400ca80,
8612 OPRND_SHIFT0 (0_4
, FREG
),
8613 OPRND_SHIFT0 (16_20
, FREG
),
8614 OPRND_SHIFT0 (21_25
, FREG
)),
8615 CSKY_ISA_FLOAT_7E60
),
8617 OPCODE_INFO3 (0xf400ca80,
8618 OPRND_SHIFT0 (0_4
, FREG
),
8619 OPRND_SHIFT0 (16_20
, FREG
),
8620 OPRND_SHIFT0 (21_25
, FREG
)),
8621 CSKY_ISA_FLOAT_7E60
),
8623 OPCODE_INFO3 (0xf400caa0,
8624 OPRND_SHIFT0 (0_4
, FREG
),
8625 OPRND_SHIFT0 (16_20
, FREG
),
8626 OPRND_SHIFT0 (21_25
, FREG
)),
8627 CSKY_ISA_FLOAT_7E60
),
8629 OPCODE_INFO3 (0xf400caa0,
8630 OPRND_SHIFT0 (0_4
, FREG
),
8631 OPRND_SHIFT0 (16_20
, FREG
),
8632 OPRND_SHIFT0 (21_25
, FREG
)),
8633 CSKY_ISA_FLOAT_7E60
),
8635 OPCODE_INFO3 (0xf400cac0,
8636 OPRND_SHIFT0 (0_4
, FREG
),
8637 OPRND_SHIFT0 (16_20
, FREG
),
8638 OPRND_SHIFT0 (21_25
, FREG
)),
8639 CSKY_ISA_FLOAT_7E60
),
8641 OPCODE_INFO3 (0xf400cac0,
8642 OPRND_SHIFT0 (0_4
, FREG
),
8643 OPRND_SHIFT0 (16_20
, FREG
),
8644 OPRND_SHIFT0 (21_25
, FREG
)),
8645 CSKY_ISA_FLOAT_7E60
),
8647 OPCODE_INFO3 (0xf400cae0,
8648 OPRND_SHIFT0 (0_4
, FREG
),
8649 OPRND_SHIFT0 (16_20
, FREG
),
8650 OPRND_SHIFT0 (21_25
, FREG
)),
8651 CSKY_ISA_FLOAT_7E60
),
8653 OPCODE_INFO3 (0xf400cae0,
8654 OPRND_SHIFT0 (0_4
, FREG
),
8655 OPRND_SHIFT0 (16_20
, FREG
),
8656 OPRND_SHIFT0 (21_25
, FREG
)),
8657 CSKY_ISA_FLOAT_7E60
),
8659 OPCODE_INFO3 (0xf400ce00,
8660 OPRND_SHIFT0 (0_4
, FREG
),
8661 OPRND_SHIFT0 (16_20
, FREG
),
8662 OPRND_SHIFT0 (21_25
, FREG
)),
8663 CSKY_ISA_FLOAT_7E60
),
8665 OPCODE_INFO3 (0xf400ce20,
8666 OPRND_SHIFT0 (0_4
, FREG
),
8667 OPRND_SHIFT0 (16_20
, FREG
),
8668 OPRND_SHIFT0 (21_25
, FREG
)),
8669 CSKY_ISA_FLOAT_7E60
),
8671 OPCODE_INFO3 (0xf400ce40,
8672 OPRND_SHIFT0 (0_4
, FREG
),
8673 OPRND_SHIFT0 (16_20
, FREG
),
8674 OPRND_SHIFT0 (21_25
, FREG
)),
8675 CSKY_ISA_FLOAT_7E60
),
8677 OPCODE_INFO3 (0xf400ce60,
8678 OPRND_SHIFT0 (0_4
, FREG
),
8679 OPRND_SHIFT0 (16_20
, FREG
),
8680 OPRND_SHIFT0 (21_25
, FREG
)),
8681 CSKY_ISA_FLOAT_7E60
),
8683 OPCODE_INFO3 (0xf400cb00,
8684 OPRND_SHIFT0 (0_4
, FREG
),
8685 OPRND_SHIFT0 (16_20
, FREG
),
8686 OPRND_SHIFT0 (21_25
, FREG
)),
8687 CSKY_ISA_FLOAT_7E60
),
8689 OPCODE_INFO3 (0xf400cb00,
8690 OPRND_SHIFT0 (0_4
, FREG
),
8691 OPRND_SHIFT0 (16_20
, FREG
),
8692 OPRND_SHIFT0 (21_25
, FREG
)),
8693 CSKY_ISA_FLOAT_7E60
),
8695 OPCODE_INFO2 (0xf400cb20,
8696 OPRND_SHIFT0 (0_4
, FREG
),
8697 OPRND_SHIFT0 (16_20
, FREG
)),
8698 CSKY_ISA_FLOAT_7E60
),
8700 OPCODE_INFO2 (0xf400cb20,
8701 OPRND_SHIFT0 (0_4
, FREG
),
8702 OPRND_SHIFT0 (16_20
, FREG
)),
8703 CSKY_ISA_FLOAT_7E60
),
8705 OPCODE_INFO2 (0xf400cb40,
8706 OPRND_SHIFT0 (0_4
, FREG
),
8707 OPRND_SHIFT0 (16_20
, FREG
)),
8708 CSKY_ISA_FLOAT_7E60
),
8710 OPCODE_INFO2 (0xf400cb40,
8711 OPRND_SHIFT0 (0_4
, FREG
),
8712 OPRND_SHIFT0 (16_20
, FREG
)),
8713 CSKY_ISA_FLOAT_7E60
),
8715 OPCODE_INFO3 (0xf400cf20,
8716 OPRND_SHIFT0 (0_4
, FREG
),
8717 OPRND_SHIFT0 (16_20
, FREG
),
8718 OPRND_SHIFT0 (21_25
, FREG
)),
8719 CSKY_ISA_FLOAT_7E60
),
8720 /* Single floating. */
8722 OPCODE_INFO3 (0xf4000000,
8723 OPRND_SHIFT0 (0_4
, FREG
),
8724 OPRND_SHIFT0 (16_20
, FREG
),
8725 OPRND_SHIFT0 (21_25
, FREG
)),
8726 CSKY_ISA_FLOAT_7E60
),
8728 OPCODE_INFO3 (0xf4000000,
8729 OPRND_SHIFT0 (0_4
, FREG
),
8730 OPRND_SHIFT0 (16_20
, FREG
),
8731 OPRND_SHIFT0 (21_25
, FREG
)),
8732 CSKY_ISA_FLOAT_7E60
),
8734 OPCODE_INFO3 (0xf4000020,
8735 OPRND_SHIFT0 (0_4
, FREG
),
8736 OPRND_SHIFT0 (16_20
, FREG
),
8737 OPRND_SHIFT0 (21_25
, FREG
)),
8738 CSKY_ISA_FLOAT_7E60
),
8740 OPCODE_INFO3 (0xf4000020,
8741 OPRND_SHIFT0 (0_4
, FREG
),
8742 OPRND_SHIFT0 (16_20
, FREG
),
8743 OPRND_SHIFT0 (21_25
, FREG
)),
8744 CSKY_ISA_FLOAT_7E60
),
8746 OPCODE_INFO2 (0xf4000080,
8747 OPRND_SHIFT0 (0_4
, FREG
),
8748 OPRND_SHIFT0 (16_20
, FREG
)),
8749 CSKY_ISA_FLOAT_7E60
),
8751 OPCODE_INFO2 (0xf4000080,
8752 OPRND_SHIFT0 (0_4
, FREG
),
8753 OPRND_SHIFT0 (16_20
, FREG
)),
8754 CSKY_ISA_FLOAT_7E60
),
8756 OPCODE_INFO2 (0xf40000c0,
8757 OPRND_SHIFT0 (0_4
, FREG
),
8758 OPRND_SHIFT0 (16_20
, FREG
)),
8759 CSKY_ISA_FLOAT_7E60
),
8761 OPCODE_INFO2 (0xf40000c0,
8762 OPRND_SHIFT0 (0_4
, FREG
),
8763 OPRND_SHIFT0 (16_20
, FREG
)),
8764 CSKY_ISA_FLOAT_7E60
),
8766 OPCODE_INFO2 (0xf40000e0,
8767 OPRND_SHIFT0 (0_4
, FREG
),
8768 OPRND_SHIFT0 (16_20
, FREG
)),
8769 CSKY_ISA_FLOAT_7E60
),
8771 OPCODE_INFO2 (0xf40000e0,
8772 OPRND_SHIFT0 (0_4
, FREG
),
8773 OPRND_SHIFT0 (16_20
, FREG
)),
8774 CSKY_ISA_FLOAT_7E60
),
8776 OPCODE_INFO1 (0xf4000100,
8777 OPRND_SHIFT0 (16_20
, FREG
)),
8778 CSKY_ISA_FLOAT_7E60
),
8780 OPCODE_INFO1 (0xf4000100,
8781 OPRND_SHIFT0 (16_20
, FREG
)),
8782 CSKY_ISA_FLOAT_7E60
),
8784 OPCODE_INFO1 (0xf4000120,
8785 OPRND_SHIFT0 (16_20
, FREG
)),
8786 CSKY_ISA_FLOAT_7E60
),
8788 OPCODE_INFO1 (0xf4000120,
8789 OPRND_SHIFT0 (16_20
, FREG
)),
8790 CSKY_ISA_FLOAT_7E60
),
8792 OPCODE_INFO1 (0xf4000140,
8793 OPRND_SHIFT0 (16_20
, FREG
)),
8794 CSKY_ISA_FLOAT_7E60
),
8796 OPCODE_INFO1 (0xf4000140,
8797 OPRND_SHIFT0 (16_20
, FREG
)),
8798 CSKY_ISA_FLOAT_7E60
),
8800 OPCODE_INFO1 (0xf4000160,
8801 OPRND_SHIFT0 (16_20
, FREG
)),
8802 CSKY_ISA_FLOAT_7E60
),
8804 OPCODE_INFO1 (0xf4000160,
8805 OPRND_SHIFT0 (16_20
, FREG
)),
8806 CSKY_ISA_FLOAT_7E60
),
8808 OPCODE_INFO2 (0xf4000180,
8809 OPRND_SHIFT0 (16_20
, FREG
),
8810 OPRND_SHIFT0 (21_25
, FREG
)),
8811 CSKY_ISA_FLOAT_7E60
),
8813 OPCODE_INFO2 (0xf4000180,
8814 OPRND_SHIFT0 (16_20
, FREG
),
8815 OPRND_SHIFT0 (21_25
, FREG
)),
8816 CSKY_ISA_FLOAT_7E60
),
8818 OPCODE_INFO2 (0xf40001a0,
8819 OPRND_SHIFT0 (16_20
, FREG
),
8820 OPRND_SHIFT0 (21_25
, FREG
)),
8821 CSKY_ISA_FLOAT_7E60
),
8823 OPCODE_INFO2 (0xf40001a0,
8824 OPRND_SHIFT0 (16_20
, FREG
),
8825 OPRND_SHIFT0 (21_25
, FREG
)),
8826 CSKY_ISA_FLOAT_7E60
),
8828 OPCODE_INFO2 (0xf40001c0,
8829 OPRND_SHIFT0 (16_20
, FREG
),
8830 OPRND_SHIFT0 (21_25
, FREG
)),
8831 CSKY_ISA_FLOAT_7E60
),
8833 OPCODE_INFO2 (0xf40001c0,
8834 OPRND_SHIFT0 (16_20
, FREG
),
8835 OPRND_SHIFT0 (21_25
, FREG
)),
8836 CSKY_ISA_FLOAT_7E60
),
8838 OPCODE_INFO2 (0xf40001e0,
8839 OPRND_SHIFT0 (16_20
, FREG
),
8840 OPRND_SHIFT0 (21_25
, FREG
)),
8841 CSKY_ISA_FLOAT_7E60
),
8843 OPCODE_INFO2 (0xf40001e0,
8844 OPRND_SHIFT0 (16_20
, FREG
),
8845 OPRND_SHIFT0 (21_25
, FREG
)),
8846 CSKY_ISA_FLOAT_7E60
),
8848 OPCODE_INFO3 (0xf4000500,
8849 OPRND_SHIFT0 (0_4
, FREG
),
8850 OPRND_SHIFT0 (16_20
, FREG
),
8851 OPRND_SHIFT0 (21_25
, FREG
)),
8852 CSKY_ISA_FLOAT_7E60
),
8854 OPCODE_INFO3 (0xf4000520,
8855 OPRND_SHIFT0 (0_4
, FREG
),
8856 OPRND_SHIFT0 (16_20
, FREG
),
8857 OPRND_SHIFT0 (21_25
, FREG
)),
8858 CSKY_ISA_FLOAT_7E60
),
8860 OPCODE_INFO1 (0xf4000540,
8861 OPRND_SHIFT0 (16_20
, FREG
)),
8862 CSKY_ISA_FLOAT_7E60
),
8864 OPCODE_INFO1 (0xf4000560,
8865 OPRND_SHIFT0 (16_20
, FREG
)),
8866 CSKY_ISA_FLOAT_7E60
),
8868 OPCODE_INFO3 (0xf4000200,
8869 OPRND_SHIFT0 (0_4
, FREG
),
8870 OPRND_SHIFT0 (16_20
, FREG
),
8871 OPRND_SHIFT0 (21_25
, FREG
)),
8872 CSKY_ISA_FLOAT_7E60
),
8874 OPCODE_INFO3 (0xf4000200,
8875 OPRND_SHIFT0 (0_4
, FREG
),
8876 OPRND_SHIFT0 (16_20
, FREG
),
8877 OPRND_SHIFT0 (21_25
, FREG
)),
8878 CSKY_ISA_FLOAT_7E60
),
8880 OPCODE_INFO3 (0xf4000220,
8881 OPRND_SHIFT0 (0_4
, FREG
),
8882 OPRND_SHIFT0 (16_20
, FREG
),
8883 OPRND_SHIFT0 (21_25
, FREG
)),
8884 CSKY_ISA_FLOAT_7E60
),
8886 OPCODE_INFO3 (0xf4000220,
8887 OPRND_SHIFT0 (0_4
, FREG
),
8888 OPRND_SHIFT0 (16_20
, FREG
),
8889 OPRND_SHIFT0 (21_25
, FREG
)),
8890 CSKY_ISA_FLOAT_7E60
),
8892 OPCODE_INFO3 (0xf4000280,
8893 OPRND_SHIFT0 (0_4
, FREG
),
8894 OPRND_SHIFT0 (16_20
, FREG
),
8895 OPRND_SHIFT0 (21_25
, FREG
)),
8896 CSKY_ISA_FLOAT_7E60
),
8898 OPCODE_INFO3 (0xf4000280,
8899 OPRND_SHIFT0 (0_4
, FREG
),
8900 OPRND_SHIFT0 (16_20
, FREG
),
8901 OPRND_SHIFT0 (21_25
, FREG
)),
8902 CSKY_ISA_FLOAT_7E60
),
8904 OPCODE_INFO3 (0xf40002a0,
8905 OPRND_SHIFT0 (0_4
, FREG
),
8906 OPRND_SHIFT0 (16_20
, FREG
),
8907 OPRND_SHIFT0 (21_25
, FREG
)),
8908 CSKY_ISA_FLOAT_7E60
),
8910 OPCODE_INFO3 (0xf40002a0,
8911 OPRND_SHIFT0 (0_4
, FREG
),
8912 OPRND_SHIFT0 (16_20
, FREG
),
8913 OPRND_SHIFT0 (21_25
, FREG
)),
8914 CSKY_ISA_FLOAT_7E60
),
8916 OPCODE_INFO3 (0xf40002c0,
8917 OPRND_SHIFT0 (0_4
, FREG
),
8918 OPRND_SHIFT0 (16_20
, FREG
),
8919 OPRND_SHIFT0 (21_25
, FREG
)),
8920 CSKY_ISA_FLOAT_7E60
),
8922 OPCODE_INFO3 (0xf40002c0,
8923 OPRND_SHIFT0 (0_4
, FREG
),
8924 OPRND_SHIFT0 (16_20
, FREG
),
8925 OPRND_SHIFT0 (21_25
, FREG
)),
8926 CSKY_ISA_FLOAT_7E60
),
8928 OPCODE_INFO3 (0xf40002e0,
8929 OPRND_SHIFT0 (0_4
, FREG
),
8930 OPRND_SHIFT0 (16_20
, FREG
),
8931 OPRND_SHIFT0 (21_25
, FREG
)),
8932 CSKY_ISA_FLOAT_7E60
),
8934 OPCODE_INFO3 (0xf40002e0,
8935 OPRND_SHIFT0 (0_4
, FREG
),
8936 OPRND_SHIFT0 (16_20
, FREG
),
8937 OPRND_SHIFT0 (21_25
, FREG
)),
8938 CSKY_ISA_FLOAT_7E60
),
8940 OPCODE_INFO3 (0xf4000600,
8941 OPRND_SHIFT0 (0_4
, FREG
),
8942 OPRND_SHIFT0 (16_20
, FREG
),
8943 OPRND_SHIFT0 (21_25
, FREG
)),
8944 CSKY_ISA_FLOAT_7E60
),
8946 OPCODE_INFO3 (0xf4000620,
8947 OPRND_SHIFT0 (0_4
, FREG
),
8948 OPRND_SHIFT0 (16_20
, FREG
),
8949 OPRND_SHIFT0 (21_25
, FREG
)),
8950 CSKY_ISA_FLOAT_7E60
),
8952 OPCODE_INFO3 (0xf4000640,
8953 OPRND_SHIFT0 (0_4
, FREG
),
8954 OPRND_SHIFT0 (16_20
, FREG
),
8955 OPRND_SHIFT0 (21_25
, FREG
)),
8956 CSKY_ISA_FLOAT_7E60
),
8958 OPCODE_INFO3 (0xf4000660,
8959 OPRND_SHIFT0 (0_4
, FREG
),
8960 OPRND_SHIFT0 (16_20
, FREG
),
8961 OPRND_SHIFT0 (21_25
, FREG
)),
8962 CSKY_ISA_FLOAT_7E60
),
8964 OPCODE_INFO3 (0xf4000300,
8965 OPRND_SHIFT0 (0_4
, FREG
),
8966 OPRND_SHIFT0 (16_20
, FREG
),
8967 OPRND_SHIFT0 (21_25
, FREG
)),
8968 CSKY_ISA_FLOAT_7E60
),
8970 OPCODE_INFO3 (0xf4000300,
8971 OPRND_SHIFT0 (0_4
, FREG
),
8972 OPRND_SHIFT0 (16_20
, FREG
),
8973 OPRND_SHIFT0 (21_25
, FREG
)),
8974 CSKY_ISA_FLOAT_7E60
),
8976 OPCODE_INFO2 (0xf4000320,
8977 OPRND_SHIFT0 (0_4
, FREG
),
8978 OPRND_SHIFT0 (16_20
, FREG
)),
8979 CSKY_ISA_FLOAT_7E60
),
8981 OPCODE_INFO2 (0xf4000320,
8982 OPRND_SHIFT0 (0_4
, FREG
),
8983 OPRND_SHIFT0 (16_20
, FREG
)),
8984 CSKY_ISA_FLOAT_7E60
),
8986 OPCODE_INFO2 (0xf4000340,
8987 OPRND_SHIFT0 (0_4
, FREG
),
8988 OPRND_SHIFT0 (16_20
, FREG
)),
8989 CSKY_ISA_FLOAT_7E60
),
8991 OPCODE_INFO2 (0xf4000340,
8992 OPRND_SHIFT0 (0_4
, FREG
),
8993 OPRND_SHIFT0 (16_20
, FREG
)),
8994 CSKY_ISA_FLOAT_7E60
),
8996 OPCODE_INFO3 (0xf4000720,
8997 OPRND_SHIFT0 (0_4
, FREG
),
8998 OPRND_SHIFT0 (16_20
, FREG
),
8999 OPRND_SHIFT0 (21_25
, FREG
)),
9000 CSKY_ISA_FLOAT_7E60
),
9001 /* Double floating. */
9003 OPCODE_INFO3 (0xf4000800,
9004 OPRND_SHIFT0 (0_4
, FREG
),
9005 OPRND_SHIFT0 (16_20
, FREG
),
9006 OPRND_SHIFT0 (21_25
, FREG
)),
9007 CSKY_ISA_FLOAT_7E60
),
9009 OPCODE_INFO3 (0xf4000800,
9010 OPRND_SHIFT0 (0_4
, FREG
),
9011 OPRND_SHIFT0 (16_20
, FREG
),
9012 OPRND_SHIFT0 (21_25
, FREG
)),
9013 CSKY_ISA_FLOAT_7E60
),
9015 OPCODE_INFO3 (0xf4000820,
9016 OPRND_SHIFT0 (0_4
, FREG
),
9017 OPRND_SHIFT0 (16_20
, FREG
),
9018 OPRND_SHIFT0 (21_25
, FREG
)),
9019 CSKY_ISA_FLOAT_7E60
),
9021 OPCODE_INFO3 (0xf4000820,
9022 OPRND_SHIFT0 (0_4
, FREG
),
9023 OPRND_SHIFT0 (16_20
, FREG
),
9024 OPRND_SHIFT0 (21_25
, FREG
)),
9025 CSKY_ISA_FLOAT_7E60
),
9027 OPCODE_INFO2 (0xf4000880,
9028 OPRND_SHIFT0 (0_4
, FREG
),
9029 OPRND_SHIFT0 (16_20
, FREG
)),
9030 CSKY_ISA_FLOAT_7E60
),
9032 OPCODE_INFO2 (0xf4000880,
9033 OPRND_SHIFT0 (0_4
, FREG
),
9034 OPRND_SHIFT0 (16_20
, FREG
)),
9035 CSKY_ISA_FLOAT_7E60
),
9037 OPCODE_INFO2 (0xf40008a0,
9038 OPRND_SHIFT0 (0_4
, FREG
),
9039 OPRND_SHIFT0 (16_20
, FREG
)),
9040 CSKY_ISA_FLOAT_7E60
),
9042 OPCODE_INFO2 (0xf40008c0,
9043 OPRND_SHIFT0 (0_4
, FREG
),
9044 OPRND_SHIFT0 (16_20
, FREG
)),
9045 CSKY_ISA_FLOAT_7E60
),
9047 OPCODE_INFO2 (0xf40008c0,
9048 OPRND_SHIFT0 (0_4
, FREG
),
9049 OPRND_SHIFT0 (16_20
, FREG
)),
9050 CSKY_ISA_FLOAT_7E60
),
9052 OPCODE_INFO2 (0xf40008e0,
9053 OPRND_SHIFT0 (0_4
, FREG
),
9054 OPRND_SHIFT0 (16_20
, FREG
)),
9055 CSKY_ISA_FLOAT_7E60
),
9057 OPCODE_INFO2 (0xf40008e0,
9058 OPRND_SHIFT0 (0_4
, FREG
),
9059 OPRND_SHIFT0 (16_20
, FREG
)),
9060 CSKY_ISA_FLOAT_7E60
),
9062 OPCODE_INFO1 (0xf4000900,
9063 OPRND_SHIFT0 (16_20
, FREG
)),
9064 CSKY_ISA_FLOAT_7E60
),
9066 OPCODE_INFO1 (0xf4000900,
9067 OPRND_SHIFT0 (16_20
, FREG
)),
9068 CSKY_ISA_FLOAT_7E60
),
9070 OPCODE_INFO1 (0xf4000920,
9071 OPRND_SHIFT0 (16_20
, FREG
)),
9072 CSKY_ISA_FLOAT_7E60
),
9074 OPCODE_INFO1 (0xf4000920,
9075 OPRND_SHIFT0 (16_20
, FREG
)),
9076 CSKY_ISA_FLOAT_7E60
),
9078 OPCODE_INFO1 (0xf4000940,
9079 OPRND_SHIFT0 (16_20
, FREG
)),
9080 CSKY_ISA_FLOAT_7E60
),
9082 OPCODE_INFO1 (0xf4000940,
9083 OPRND_SHIFT0 (16_20
, FREG
)),
9084 CSKY_ISA_FLOAT_7E60
),
9086 OPCODE_INFO1 (0xf4000960,
9087 OPRND_SHIFT0 (16_20
, FREG
)),
9088 CSKY_ISA_FLOAT_7E60
),
9090 OPCODE_INFO1 (0xf4000960,
9091 OPRND_SHIFT0 (16_20
, FREG
)),
9092 CSKY_ISA_FLOAT_7E60
),
9094 OPCODE_INFO2 (0xf4000980,
9095 OPRND_SHIFT0 (16_20
, FREG
),
9096 OPRND_SHIFT0 (21_25
, FREG
)),
9097 CSKY_ISA_FLOAT_7E60
),
9099 OPCODE_INFO2 (0xf4000980,
9100 OPRND_SHIFT0 (16_20
, FREG
),
9101 OPRND_SHIFT0 (21_25
, FREG
)),
9102 CSKY_ISA_FLOAT_7E60
),
9104 OPCODE_INFO2 (0xf40009a0,
9105 OPRND_SHIFT0 (16_20
, FREG
),
9106 OPRND_SHIFT0 (21_25
, FREG
)),
9107 CSKY_ISA_FLOAT_7E60
),
9109 OPCODE_INFO2 (0xf40009a0,
9110 OPRND_SHIFT0 (16_20
, FREG
),
9111 OPRND_SHIFT0 (21_25
, FREG
)),
9112 CSKY_ISA_FLOAT_7E60
),
9114 OPCODE_INFO2 (0xf40009c0,
9115 OPRND_SHIFT0 (16_20
, FREG
),
9116 OPRND_SHIFT0 (21_25
, FREG
)),
9117 CSKY_ISA_FLOAT_7E60
),
9119 OPCODE_INFO2 (0xf40009c0,
9120 OPRND_SHIFT0 (16_20
, FREG
),
9121 OPRND_SHIFT0 (21_25
, FREG
)),
9122 CSKY_ISA_FLOAT_7E60
),
9124 OPCODE_INFO2 (0xf40009e0,
9125 OPRND_SHIFT0 (16_20
, FREG
),
9126 OPRND_SHIFT0 (21_25
, FREG
)),
9127 CSKY_ISA_FLOAT_7E60
),
9129 OPCODE_INFO2 (0xf40009e0,
9130 OPRND_SHIFT0 (16_20
, FREG
),
9131 OPRND_SHIFT0 (21_25
, FREG
)),
9132 CSKY_ISA_FLOAT_7E60
),
9134 OPCODE_INFO3 (0xf4000d00,
9135 OPRND_SHIFT0 (0_4
, FREG
),
9136 OPRND_SHIFT0 (16_20
, FREG
),
9137 OPRND_SHIFT0 (21_25
, FREG
)),
9138 CSKY_ISA_FLOAT_7E60
),
9140 OPCODE_INFO3 (0xf4000d20,
9141 OPRND_SHIFT0 (0_4
, FREG
),
9142 OPRND_SHIFT0 (16_20
, FREG
),
9143 OPRND_SHIFT0 (21_25
, FREG
)),
9144 CSKY_ISA_FLOAT_7E60
),
9146 OPCODE_INFO1 (0xf4000d40,
9147 OPRND_SHIFT0 (16_20
, FREG
)),
9148 CSKY_ISA_FLOAT_7E60
),
9150 OPCODE_INFO1 (0xf4000d60,
9151 OPRND_SHIFT0 (16_20
, FREG
)),
9152 CSKY_ISA_FLOAT_7E60
),
9154 OPCODE_INFO3 (0xf4000a00,
9155 OPRND_SHIFT0 (0_4
, FREG
),
9156 OPRND_SHIFT0 (16_20
, FREG
),
9157 OPRND_SHIFT0 (21_25
, FREG
)),
9158 CSKY_ISA_FLOAT_7E60
),
9160 OPCODE_INFO3 (0xf4000a00,
9161 OPRND_SHIFT0 (0_4
, FREG
),
9162 OPRND_SHIFT0 (16_20
, FREG
),
9163 OPRND_SHIFT0 (21_25
, FREG
)),
9164 CSKY_ISA_FLOAT_7E60
),
9166 OPCODE_INFO3 (0xf4000a20,
9167 OPRND_SHIFT0 (0_4
, FREG
),
9168 OPRND_SHIFT0 (16_20
, FREG
),
9169 OPRND_SHIFT0 (21_25
, FREG
)),
9170 CSKY_ISA_FLOAT_7E60
),
9172 OPCODE_INFO3 (0xf4000a20,
9173 OPRND_SHIFT0 (0_4
, FREG
),
9174 OPRND_SHIFT0 (16_20
, FREG
),
9175 OPRND_SHIFT0 (21_25
, FREG
)),
9176 CSKY_ISA_FLOAT_7E60
),
9178 OPCODE_INFO3 (0xf4000a80,
9179 OPRND_SHIFT0 (0_4
, FREG
),
9180 OPRND_SHIFT0 (16_20
, FREG
),
9181 OPRND_SHIFT0 (21_25
, FREG
)),
9182 CSKY_ISA_FLOAT_7E60
),
9184 OPCODE_INFO3 (0xf4000a80,
9185 OPRND_SHIFT0 (0_4
, FREG
),
9186 OPRND_SHIFT0 (16_20
, FREG
),
9187 OPRND_SHIFT0 (21_25
, FREG
)),
9188 CSKY_ISA_FLOAT_7E60
),
9190 OPCODE_INFO3 (0xf4000aa0,
9191 OPRND_SHIFT0 (0_4
, FREG
),
9192 OPRND_SHIFT0 (16_20
, FREG
),
9193 OPRND_SHIFT0 (21_25
, FREG
)),
9194 CSKY_ISA_FLOAT_7E60
),
9196 OPCODE_INFO3 (0xf4000aa0,
9197 OPRND_SHIFT0 (0_4
, FREG
),
9198 OPRND_SHIFT0 (16_20
, FREG
),
9199 OPRND_SHIFT0 (21_25
, FREG
)),
9200 CSKY_ISA_FLOAT_7E60
),
9202 OPCODE_INFO3 (0xf4000ac0,
9203 OPRND_SHIFT0 (0_4
, FREG
),
9204 OPRND_SHIFT0 (16_20
, FREG
),
9205 OPRND_SHIFT0 (21_25
, FREG
)),
9206 CSKY_ISA_FLOAT_7E60
),
9208 OPCODE_INFO3 (0xf4000ac0,
9209 OPRND_SHIFT0 (0_4
, FREG
),
9210 OPRND_SHIFT0 (16_20
, FREG
),
9211 OPRND_SHIFT0 (21_25
, FREG
)),
9212 CSKY_ISA_FLOAT_7E60
),
9214 OPCODE_INFO3 (0xf4000ae0,
9215 OPRND_SHIFT0 (0_4
, FREG
),
9216 OPRND_SHIFT0 (16_20
, FREG
),
9217 OPRND_SHIFT0 (21_25
, FREG
)),
9218 CSKY_ISA_FLOAT_7E60
),
9220 OPCODE_INFO3 (0xf4000ae0,
9221 OPRND_SHIFT0 (0_4
, FREG
),
9222 OPRND_SHIFT0 (16_20
, FREG
),
9223 OPRND_SHIFT0 (21_25
, FREG
)),
9224 CSKY_ISA_FLOAT_7E60
),
9226 OPCODE_INFO3 (0xf4000e00,
9227 OPRND_SHIFT0 (0_4
, FREG
),
9228 OPRND_SHIFT0 (16_20
, FREG
),
9229 OPRND_SHIFT0 (21_25
, FREG
)),
9230 CSKY_ISA_FLOAT_7E60
),
9232 OPCODE_INFO3 (0xf4000e20,
9233 OPRND_SHIFT0 (0_4
, FREG
),
9234 OPRND_SHIFT0 (16_20
, FREG
),
9235 OPRND_SHIFT0 (21_25
, FREG
)),
9236 CSKY_ISA_FLOAT_7E60
),
9238 OPCODE_INFO3 (0xf4000e40,
9239 OPRND_SHIFT0 (0_4
, FREG
),
9240 OPRND_SHIFT0 (16_20
, FREG
),
9241 OPRND_SHIFT0 (21_25
, FREG
)),
9242 CSKY_ISA_FLOAT_7E60
),
9244 OPCODE_INFO3 (0xf4000e60,
9245 OPRND_SHIFT0 (0_4
, FREG
),
9246 OPRND_SHIFT0 (16_20
, FREG
),
9247 OPRND_SHIFT0 (21_25
, FREG
)),
9248 CSKY_ISA_FLOAT_7E60
),
9250 OPCODE_INFO3 (0xf4000b00,
9251 OPRND_SHIFT0 (0_4
, FREG
),
9252 OPRND_SHIFT0 (16_20
, FREG
),
9253 OPRND_SHIFT0 (21_25
, FREG
)),
9254 CSKY_ISA_FLOAT_7E60
),
9256 OPCODE_INFO3 (0xf4000b00,
9257 OPRND_SHIFT0 (0_4
, FREG
),
9258 OPRND_SHIFT0 (16_20
, FREG
),
9259 OPRND_SHIFT0 (21_25
, FREG
)),
9260 CSKY_ISA_FLOAT_7E60
),
9262 OPCODE_INFO2 (0xf4000b20,
9263 OPRND_SHIFT0 (0_4
, FREG
),
9264 OPRND_SHIFT0 (16_20
, FREG
)),
9265 CSKY_ISA_FLOAT_7E60
),
9267 OPCODE_INFO2 (0xf4000b20,
9268 OPRND_SHIFT0 (0_4
, FREG
),
9269 OPRND_SHIFT0 (16_20
, FREG
)),
9270 CSKY_ISA_FLOAT_7E60
),
9272 OPCODE_INFO2 (0xf4000b40,
9273 OPRND_SHIFT0 (0_4
, FREG
),
9274 OPRND_SHIFT0 (16_20
, FREG
)),
9275 CSKY_ISA_FLOAT_7E60
),
9277 OPCODE_INFO2 (0xf4000b40,
9278 OPRND_SHIFT0 (0_4
, FREG
),
9279 OPRND_SHIFT0 (16_20
, FREG
)),
9280 CSKY_ISA_FLOAT_7E60
),
9282 OPCODE_INFO2 (0xf4000360,
9283 OPRND_SHIFT0 (0_4
, FREG
),
9284 OPRND_SHIFT0 (16_20
, FREG
)),
9285 CSKY_ISA_FLOAT_7E60
),
9287 OPCODE_INFO3 (0xf4000f20,
9288 OPRND_SHIFT0 (0_4
, FREG
),
9289 OPRND_SHIFT0 (16_20
, FREG
),
9290 OPRND_SHIFT0 (21_25
, FREG
)),
9291 CSKY_ISA_FLOAT_7E60
),
9292 /* SIMD floating. */
9294 OPCODE_INFO3 (0xf4001000,
9295 OPRND_SHIFT0 (0_4
, FREG
),
9296 OPRND_SHIFT0 (16_20
, FREG
),
9297 OPRND_SHIFT0 (21_25
, FREG
)),
9298 CSKY_ISA_FLOAT_7E60
),
9300 OPCODE_INFO3 (0xf4001000,
9301 OPRND_SHIFT0 (0_4
, FREG
),
9302 OPRND_SHIFT0 (16_20
, FREG
),
9303 OPRND_SHIFT0 (21_25
, FREG
)),
9304 CSKY_ISA_FLOAT_7E60
),
9306 OPCODE_INFO3 (0xf4001020,
9307 OPRND_SHIFT0 (0_4
, FREG
),
9308 OPRND_SHIFT0 (16_20
, FREG
),
9309 OPRND_SHIFT0 (21_25
, FREG
)),
9310 CSKY_ISA_FLOAT_7E60
),
9312 OPCODE_INFO3 (0xf4001020,
9313 OPRND_SHIFT0 (0_4
, FREG
),
9314 OPRND_SHIFT0 (16_20
, FREG
),
9315 OPRND_SHIFT0 (21_25
, FREG
)),
9316 CSKY_ISA_FLOAT_7E60
),
9318 OPCODE_INFO2 (0xf4001080,
9319 OPRND_SHIFT0 (0_4
, FREG
),
9320 OPRND_SHIFT0 (16_20
, FREG
)),
9321 CSKY_ISA_FLOAT_7E60
),
9323 OPCODE_INFO2 (0xf4001080,
9324 OPRND_SHIFT0 (0_4
, FREG
),
9325 OPRND_SHIFT0 (16_20
, FREG
)),
9326 CSKY_ISA_FLOAT_7E60
),
9328 OPCODE_INFO2 (0xf40010c0,
9329 OPRND_SHIFT0 (0_4
, FREG
),
9330 OPRND_SHIFT0 (16_20
, FREG
)),
9331 CSKY_ISA_FLOAT_7E60
),
9333 OPCODE_INFO2 (0xf40010c0,
9334 OPRND_SHIFT0 (0_4
, FREG
),
9335 OPRND_SHIFT0 (16_20
, FREG
)),
9336 CSKY_ISA_FLOAT_7E60
),
9338 OPCODE_INFO2 (0xf40010e0,
9339 OPRND_SHIFT0 (0_4
, FREG
),
9340 OPRND_SHIFT0 (16_20
, FREG
)),
9341 CSKY_ISA_FLOAT_7E60
),
9343 OPCODE_INFO2 (0xf40010e0,
9344 OPRND_SHIFT0 (0_4
, FREG
),
9345 OPRND_SHIFT0 (16_20
, FREG
)),
9346 CSKY_ISA_FLOAT_7E60
),
9348 OPCODE_INFO3 (0xf4001200,
9349 OPRND_SHIFT0 (0_4
, FREG
),
9350 OPRND_SHIFT0 (16_20
, FREG
),
9351 OPRND_SHIFT0 (21_25
, FREG
)),
9352 CSKY_ISA_FLOAT_7E60
),
9354 OPCODE_INFO3 (0xf4001200,
9355 OPRND_SHIFT0 (0_4
, FREG
),
9356 OPRND_SHIFT0 (16_20
, FREG
),
9357 OPRND_SHIFT0 (21_25
, FREG
)),
9358 CSKY_ISA_FLOAT_7E60
),
9360 OPCODE_INFO3 (0xf4001280,
9361 OPRND_SHIFT0 (0_4
, FREG
),
9362 OPRND_SHIFT0 (16_20
, FREG
),
9363 OPRND_SHIFT0 (21_25
, FREG
)),
9364 CSKY_ISA_FLOAT_7E60
),
9366 OPCODE_INFO3 (0xf40012c0,
9367 OPRND_SHIFT0 (0_4
, FREG
),
9368 OPRND_SHIFT0 (16_20
, FREG
),
9369 OPRND_SHIFT0 (21_25
, FREG
)),
9370 CSKY_ISA_FLOAT_7E60
),
9372 OPCODE_INFO3 (0xf40012c0,
9373 OPRND_SHIFT0 (0_4
, FREG
),
9374 OPRND_SHIFT0 (16_20
, FREG
),
9375 OPRND_SHIFT0 (21_25
, FREG
)),
9376 CSKY_ISA_FLOAT_7E60
),
9377 /* floating formate. */
9378 OP32 ("fftoi.f32.s32.rn",
9379 OPCODE_INFO2 (0xf4001800,
9380 OPRND_SHIFT0 (0_4
, FREG
),
9381 OPRND_SHIFT0 (16_20
, FREG
)),
9382 CSKY_ISA_FLOAT_7E60
),
9384 OPCODE_INFO2 (0xf4001800,
9385 OPRND_SHIFT0 (0_4
, FREG
),
9386 OPRND_SHIFT0 (16_20
, FREG
)),
9387 CSKY_ISA_FLOAT_7E60
),
9388 OP32 ("fftoi.f32.s32.rz",
9389 OPCODE_INFO2 (0xf4001820,
9390 OPRND_SHIFT0 (0_4
, FREG
),
9391 OPRND_SHIFT0 (16_20
, FREG
)),
9392 CSKY_ISA_FLOAT_7E60
),
9394 OPCODE_INFO2 (0xf4001820,
9395 OPRND_SHIFT0 (0_4
, FREG
),
9396 OPRND_SHIFT0 (16_20
, FREG
)),
9397 CSKY_ISA_FLOAT_7E60
),
9398 OP32 ("fftoi.f32.s32.rpi",
9399 OPCODE_INFO2 (0xf4001840,
9400 OPRND_SHIFT0 (0_4
, FREG
),
9401 OPRND_SHIFT0 (16_20
, FREG
)),
9402 CSKY_ISA_FLOAT_7E60
),
9404 OPCODE_INFO2 (0xf4001840,
9405 OPRND_SHIFT0 (0_4
, FREG
),
9406 OPRND_SHIFT0 (16_20
, FREG
)),
9407 CSKY_ISA_FLOAT_7E60
),
9408 OP32 ("fftoi.f32.s32.rni",
9409 OPCODE_INFO2 (0xf4001860,
9410 OPRND_SHIFT0 (0_4
, FREG
),
9411 OPRND_SHIFT0 (16_20
, FREG
)),
9412 CSKY_ISA_FLOAT_7E60
),
9414 OPCODE_INFO2 (0xf4001860,
9415 OPRND_SHIFT0 (0_4
, FREG
),
9416 OPRND_SHIFT0 (16_20
, FREG
)),
9417 CSKY_ISA_FLOAT_7E60
),
9418 OP32 ("fftoi.f32.u32.rn",
9419 OPCODE_INFO2 (0xf4001880,
9420 OPRND_SHIFT0 (0_4
, FREG
),
9421 OPRND_SHIFT0 (16_20
, FREG
)),
9422 CSKY_ISA_FLOAT_7E60
),
9424 OPCODE_INFO2 (0xf4001880,
9425 OPRND_SHIFT0 (0_4
, FREG
),
9426 OPRND_SHIFT0 (16_20
, FREG
)),
9427 CSKY_ISA_FLOAT_7E60
),
9428 OP32 ("fftoi.f32.u32.rz",
9429 OPCODE_INFO2 (0xf40018a0,
9430 OPRND_SHIFT0 (0_4
, FREG
),
9431 OPRND_SHIFT0 (16_20
, FREG
)),
9432 CSKY_ISA_FLOAT_7E60
),
9434 OPCODE_INFO2 (0xf40018a0,
9435 OPRND_SHIFT0 (0_4
, FREG
),
9436 OPRND_SHIFT0 (16_20
, FREG
)),
9437 CSKY_ISA_FLOAT_7E60
),
9438 OP32 ("fftoi.f32.u32.rpi",
9439 OPCODE_INFO2 (0xf40018c0,
9440 OPRND_SHIFT0 (0_4
, FREG
),
9441 OPRND_SHIFT0 (16_20
, FREG
)),
9442 CSKY_ISA_FLOAT_7E60
),
9444 OPCODE_INFO2 (0xf40018c0,
9445 OPRND_SHIFT0 (0_4
, FREG
),
9446 OPRND_SHIFT0 (16_20
, FREG
)),
9447 CSKY_ISA_FLOAT_7E60
),
9448 OP32 ("fftoi.f32.u32.rni",
9449 OPCODE_INFO2 (0xf40018e0,
9450 OPRND_SHIFT0 (0_4
, FREG
),
9451 OPRND_SHIFT0 (16_20
, FREG
)),
9452 CSKY_ISA_FLOAT_7E60
),
9454 OPCODE_INFO2 (0xf40018e0,
9455 OPRND_SHIFT0 (0_4
, FREG
),
9456 OPRND_SHIFT0 (16_20
, FREG
)),
9457 CSKY_ISA_FLOAT_7E60
),
9458 OP32 ("fftoi.f64.s32.rn",
9459 OPCODE_INFO2 (0xf4001900,
9460 OPRND_SHIFT0 (0_4
, FREG
),
9461 OPRND_SHIFT0 (16_20
, FREG
)),
9462 CSKY_ISA_FLOAT_7E60
),
9464 OPCODE_INFO2 (0xf4001900,
9465 OPRND_SHIFT0 (0_4
, FREG
),
9466 OPRND_SHIFT0 (16_20
, FREG
)),
9467 CSKY_ISA_FLOAT_7E60
),
9468 OP32 ("fftoi.f64.s32.rz",
9469 OPCODE_INFO2 (0xf4001920,
9470 OPRND_SHIFT0 (0_4
, FREG
),
9471 OPRND_SHIFT0 (16_20
, FREG
)),
9472 CSKY_ISA_FLOAT_7E60
),
9474 OPCODE_INFO2 (0xf4001920,
9475 OPRND_SHIFT0 (0_4
, FREG
),
9476 OPRND_SHIFT0 (16_20
, FREG
)),
9477 CSKY_ISA_FLOAT_7E60
),
9478 OP32 ("fftoi.f64.s32.rpi",
9479 OPCODE_INFO2 (0xf4001940,
9480 OPRND_SHIFT0 (0_4
, FREG
),
9481 OPRND_SHIFT0 (16_20
, FREG
)),
9482 CSKY_ISA_FLOAT_7E60
),
9484 OPCODE_INFO2 (0xf4001940,
9485 OPRND_SHIFT0 (0_4
, FREG
),
9486 OPRND_SHIFT0 (16_20
, FREG
)),
9487 CSKY_ISA_FLOAT_7E60
),
9488 OP32 ("fftoi.f64.s32.rni",
9489 OPCODE_INFO2 (0xf4001960,
9490 OPRND_SHIFT0 (0_4
, FREG
),
9491 OPRND_SHIFT0 (16_20
, FREG
)),
9492 CSKY_ISA_FLOAT_7E60
),
9494 OPCODE_INFO2 (0xf4001960,
9495 OPRND_SHIFT0 (0_4
, FREG
),
9496 OPRND_SHIFT0 (16_20
, FREG
)),
9497 CSKY_ISA_FLOAT_7E60
),
9498 OP32 ("fftoi.f64.u32.rn",
9499 OPCODE_INFO2 (0xf4001980,
9500 OPRND_SHIFT0 (0_4
, FREG
),
9501 OPRND_SHIFT0 (16_20
, FREG
)),
9502 CSKY_ISA_FLOAT_7E60
),
9504 OPCODE_INFO2 (0xf4001980,
9505 OPRND_SHIFT0 (0_4
, FREG
),
9506 OPRND_SHIFT0 (16_20
, FREG
)),
9507 CSKY_ISA_FLOAT_7E60
),
9508 OP32 ("fftoi.f64.u32.rz",
9509 OPCODE_INFO2 (0xf40019a0,
9510 OPRND_SHIFT0 (0_4
, FREG
),
9511 OPRND_SHIFT0 (16_20
, FREG
)),
9512 CSKY_ISA_FLOAT_7E60
),
9514 OPCODE_INFO2 (0xf40019a0,
9515 OPRND_SHIFT0 (0_4
, FREG
),
9516 OPRND_SHIFT0 (16_20
, FREG
)),
9517 CSKY_ISA_FLOAT_7E60
),
9518 OP32 ("fftoi.f64.u32.rpi",
9519 OPCODE_INFO2 (0xf40019c0,
9520 OPRND_SHIFT0 (0_4
, FREG
),
9521 OPRND_SHIFT0 (16_20
, FREG
)),
9522 CSKY_ISA_FLOAT_7E60
),
9524 OPCODE_INFO2 (0xf40019c0,
9525 OPRND_SHIFT0 (0_4
, FREG
),
9526 OPRND_SHIFT0 (16_20
, FREG
)),
9527 CSKY_ISA_FLOAT_7E60
),
9528 OP32 ("fftoi.f64.u32.rni",
9529 OPCODE_INFO2 (0xf40019e0,
9530 OPRND_SHIFT0 (0_4
, FREG
),
9531 OPRND_SHIFT0 (16_20
, FREG
)),
9532 CSKY_ISA_FLOAT_7E60
),
9534 OPCODE_INFO2 (0xf40019e0,
9535 OPRND_SHIFT0 (0_4
, FREG
),
9536 OPRND_SHIFT0 (16_20
, FREG
)),
9537 CSKY_ISA_FLOAT_7E60
),
9538 OP32 ("fftoi.f16.s32.rn",
9539 OPCODE_INFO2 (0xf4001c00,
9540 OPRND_SHIFT0 (0_4
, FREG
),
9541 OPRND_SHIFT0 (16_20
, FREG
)),
9542 CSKY_ISA_FLOAT_7E60
),
9544 OPCODE_INFO2 (0xf4001c00,
9545 OPRND_SHIFT0 (0_4
, FREG
),
9546 OPRND_SHIFT0 (16_20
, FREG
)),
9547 CSKY_ISA_FLOAT_7E60
),
9548 OP32 ("fftoi.f16.s32.rz",
9549 OPCODE_INFO2 (0xf4001c20,
9550 OPRND_SHIFT0 (0_4
, FREG
),
9551 OPRND_SHIFT0 (16_20
, FREG
)),
9552 CSKY_ISA_FLOAT_7E60
),
9554 OPCODE_INFO2 (0xf4001c20,
9555 OPRND_SHIFT0 (0_4
, FREG
),
9556 OPRND_SHIFT0 (16_20
, FREG
)),
9557 CSKY_ISA_FLOAT_7E60
),
9558 OP32 ("fftoi.f16.s32.rpi",
9559 OPCODE_INFO2 (0xf4001c40,
9560 OPRND_SHIFT0 (0_4
, FREG
),
9561 OPRND_SHIFT0 (16_20
, FREG
)),
9562 CSKY_ISA_FLOAT_7E60
),
9564 OPCODE_INFO2 (0xf4001c40,
9565 OPRND_SHIFT0 (0_4
, FREG
),
9566 OPRND_SHIFT0 (16_20
, FREG
)),
9567 CSKY_ISA_FLOAT_7E60
),
9568 OP32 ("fftoi.f16.s32.rni",
9569 OPCODE_INFO2 (0xf4001c60,
9570 OPRND_SHIFT0 (0_4
, FREG
),
9571 OPRND_SHIFT0 (16_20
, FREG
)),
9572 CSKY_ISA_FLOAT_7E60
),
9574 OPCODE_INFO2 (0xf4001c60,
9575 OPRND_SHIFT0 (0_4
, FREG
),
9576 OPRND_SHIFT0 (16_20
, FREG
)),
9577 CSKY_ISA_FLOAT_7E60
),
9578 OP32 ("fftoi.f16.u32.rn",
9579 OPCODE_INFO2 (0xf4001c80,
9580 OPRND_SHIFT0 (0_4
, FREG
),
9581 OPRND_SHIFT0 (16_20
, FREG
)),
9582 CSKY_ISA_FLOAT_7E60
),
9584 OPCODE_INFO2 (0xf4001c80,
9585 OPRND_SHIFT0 (0_4
, FREG
),
9586 OPRND_SHIFT0 (16_20
, FREG
)),
9587 CSKY_ISA_FLOAT_7E60
),
9588 OP32 ("fftoi.f16.u32.rz",
9589 OPCODE_INFO2 (0xf4001ca0,
9590 OPRND_SHIFT0 (0_4
, FREG
),
9591 OPRND_SHIFT0 (16_20
, FREG
)),
9592 CSKY_ISA_FLOAT_7E60
),
9594 OPCODE_INFO2 (0xf4001ca0,
9595 OPRND_SHIFT0 (0_4
, FREG
),
9596 OPRND_SHIFT0 (16_20
, FREG
)),
9597 CSKY_ISA_FLOAT_7E60
),
9598 OP32 ("fftoi.f16.u32.rpi",
9599 OPCODE_INFO2 (0xf4001cc0,
9600 OPRND_SHIFT0 (0_4
, FREG
),
9601 OPRND_SHIFT0 (16_20
, FREG
)),
9602 CSKY_ISA_FLOAT_7E60
),
9604 OPCODE_INFO2 (0xf4001cc0,
9605 OPRND_SHIFT0 (0_4
, FREG
),
9606 OPRND_SHIFT0 (16_20
, FREG
)),
9607 CSKY_ISA_FLOAT_7E60
),
9608 OP32 ("fftoi.f16.u32.rni",
9609 OPCODE_INFO2 (0xf4001ce0,
9610 OPRND_SHIFT0 (0_4
, FREG
),
9611 OPRND_SHIFT0 (16_20
, FREG
)),
9612 CSKY_ISA_FLOAT_7E60
),
9614 OPCODE_INFO2 (0xf4001ce0,
9615 OPRND_SHIFT0 (0_4
, FREG
),
9616 OPRND_SHIFT0 (16_20
, FREG
)),
9617 CSKY_ISA_FLOAT_7E60
),
9619 OPCODE_INFO2 (0xf4001a40,
9620 OPRND_SHIFT0 (0_4
, FREG
),
9621 OPRND_SHIFT0 (16_20
, FREG
)),
9622 CSKY_ISA_FLOAT_7E60
),
9624 OPCODE_INFO2 (0xf4001a40,
9625 OPRND_SHIFT0 (0_4
, FREG
),
9626 OPRND_SHIFT0 (16_20
, FREG
)),
9627 CSKY_ISA_FLOAT_7E60
),
9629 OPCODE_INFO2 (0xf4001a60,
9630 OPRND_SHIFT0 (0_4
, FREG
),
9631 OPRND_SHIFT0 (16_20
, FREG
)),
9632 CSKY_ISA_FLOAT_7E60
),
9634 OPCODE_INFO2 (0xf4001a60,
9635 OPRND_SHIFT0 (0_4
, FREG
),
9636 OPRND_SHIFT0 (16_20
, FREG
)),
9637 CSKY_ISA_FLOAT_7E60
),
9639 OPCODE_INFO2 (0xf4001ac0,
9640 OPRND_SHIFT0 (0_4
, FREG
),
9641 OPRND_SHIFT0 (16_20
, FREG
)),
9642 CSKY_ISA_FLOAT_7E60
),
9644 OPCODE_INFO2 (0xf4001ac0,
9645 OPRND_SHIFT0 (0_4
, FREG
),
9646 OPRND_SHIFT0 (16_20
, FREG
)),
9647 CSKY_ISA_FLOAT_7E60
),
9649 OPCODE_INFO2 (0xf4001ae0,
9650 OPRND_SHIFT0 (0_4
, FREG
),
9651 OPRND_SHIFT0 (16_20
, FREG
)),
9652 CSKY_ISA_FLOAT_7E60
),
9654 OPCODE_INFO2 (0xf4001b00,
9655 OPRND_SHIFT0 (0_4
, AREG
),
9656 OPRND_SHIFT0 (16_20
, FREG
)),
9657 CSKY_ISA_FLOAT_7E60
),
9659 OPCODE_INFO2 (0xf4001b20,
9660 OPRND_SHIFT0 (0_4
, AREG
),
9661 OPRND_SHIFT0 (16_20
, FREG
)),
9662 CSKY_ISA_FLOAT_7E60
),
9664 OPCODE_INFO2 (0xf4001b20,
9665 OPRND_SHIFT0 (0_4
, AREG
),
9666 OPRND_SHIFT0 (16_20
, FREG
)),
9667 CSKY_ISA_FLOAT_7E60
),
9669 OPCODE_INFO2 (0xf4001fa0,
9670 OPRND_SHIFT0 (0_4
, FREG
),
9671 OPRND_SHIFT0 (16_20
, AREG
)),
9672 CSKY_ISA_FLOAT_7E60
),
9674 OPCODE_INFO2 (0xf4001f20,
9675 OPRND_SHIFT0 (0_4
, AREG
),
9676 OPRND_SHIFT0 (16_20
, FREG
)),
9677 CSKY_ISA_FLOAT_7E60
),
9679 OPCODE_INFO2 (0xf4001b40,
9680 OPRND_SHIFT0 (0_4
, FREG
),
9681 OPRND_SHIFT0 (16_20
, AREG
)),
9682 CSKY_ISA_FLOAT_7E60
),
9684 OPCODE_INFO2 (0xf4001b60,
9685 OPRND_SHIFT0 (0_4
, FREG
),
9686 OPRND_SHIFT0 (16_20
, AREG
)),
9687 CSKY_ISA_FLOAT_7E60
),
9689 OPCODE_INFO2 (0xf4001b60,
9690 OPRND_SHIFT0 (0_4
, FREG
),
9691 OPRND_SHIFT0 (16_20
, AREG
)),
9692 CSKY_ISA_FLOAT_7E60
),
9694 OPCODE_INFO3 (0xf4001f80,
9695 OPRND_SHIFT0 (0_4
, FREG
),
9696 OPRND_SHIFT0 (16_20
, AREG
),
9697 OPRND_SHIFT0 (21_25
, AREG
)),
9698 CSKY_ISA_FLOAT_7E60
),
9700 OPCODE_INFO3 (0xf4001f00,
9701 OPRND_SHIFT0 (0_4
, AREG
),
9702 OPRND_SHIFT0 (21_25
, AREG
),
9703 OPRND_SHIFT0 (16_20
, FREG
)),
9704 CSKY_ISA_FLOAT_7E60
),
9706 OPCODE_INFO3 (0xf4001fc0,
9707 OPRND_SHIFT0 (0_4
, FREG
),
9708 OPRND_SHIFT0 (16_20
, AREG
),
9709 OPRND_SHIFT0 (21_25
, AREG
)),
9710 CSKY_ISA_FLOAT_7E60
),
9712 OPCODE_INFO3 (0xf4001f40,
9713 OPRND_SHIFT0 (0_4
, AREG
),
9714 OPRND_SHIFT0 (21_25
, AREG
),
9715 OPRND_SHIFT0 (16_20
, FREG
)),
9716 CSKY_ISA_FLOAT_7E60
),
9719 SOPCODE_INFO2 (0xf4002300,
9720 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
9721 BRACKET_OPRND ((16_20
,
9726 OPRND_SHIFT_1_BIT
))),
9727 CSKY_ISA_FLOAT_7E60
),
9729 SOPCODE_INFO2 (0xf4002300,
9730 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
9731 BRACKET_OPRND ((16_20
,
9736 OPRND_SHIFT_1_BIT
))),
9737 CSKY_ISA_FLOAT_7E60
),
9738 OP32_WITH_WORK ("fst.16",
9739 SOPCODE_INFO2 (0xf4002700,
9740 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
9741 BRACKET_OPRND ((16_20
,
9746 OPRND_SHIFT_1_BIT
))),
9747 CSKY_ISA_FLOAT_7E60
,
9748 float_work_fpuv3_fstore
),
9749 OP32_WITH_WORK ("fsth",
9750 SOPCODE_INFO2 (0xf4002700,
9751 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
9752 BRACKET_OPRND ((16_20
,
9757 OPRND_SHIFT_1_BIT
))),
9758 CSKY_ISA_FLOAT_7E60
,
9759 float_work_fpuv3_fstore
),
9761 SOPCODE_INFO2 (0xf4002b00,
9762 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
9763 BRACKET_OPRND ((16_20
,
9767 AREG_WITH_LSHIFT_FPU
,
9768 OPRND_SHIFT_0_BIT
))),
9769 CSKY_ISA_FLOAT_7E60
),
9771 SOPCODE_INFO2 (0xf4002b00,
9772 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
9773 BRACKET_OPRND ((16_20
,
9777 AREG_WITH_LSHIFT_FPU
,
9778 OPRND_SHIFT_0_BIT
))),
9779 CSKY_ISA_FLOAT_7E60
),
9780 OP32_WITH_WORK ("fstr.16",
9781 SOPCODE_INFO2 (0xf4002f00,
9782 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
9783 BRACKET_OPRND ((16_20
,
9787 AREG_WITH_LSHIFT_FPU
,
9788 OPRND_SHIFT_0_BIT
))),
9789 CSKY_ISA_FLOAT_7E60
,
9790 float_work_fpuv3_fstore
),
9791 OP32_WITH_WORK ("fstrh",
9792 SOPCODE_INFO2 (0xf4002f00,
9793 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
9794 BRACKET_OPRND ((16_20
,
9798 AREG_WITH_LSHIFT_FPU
,
9799 OPRND_SHIFT_0_BIT
))),
9800 CSKY_ISA_FLOAT_7E60
,
9801 float_work_fpuv3_fstore
),
9803 OPCODE_INFO2 (0xf4003300,
9804 (0_4or21_24
, FREGLIST_DASH
, OPRND_SHIFT_0_BIT
),
9805 (16_20
, AREG_WITH_BRACKET
,OPRND_SHIFT_0_BIT
)),
9806 CSKY_ISA_FLOAT_7E60
),
9808 OPCODE_INFO2 (0xf4003300,
9809 (0_4or21_24
, FREGLIST_DASH
, OPRND_SHIFT_0_BIT
),
9810 (16_20
, AREG_WITH_BRACKET
,OPRND_SHIFT_0_BIT
)),
9811 CSKY_ISA_FLOAT_7E60
),
9812 OP32_WITH_WORK ("fstm.16",
9813 OPCODE_INFO2 (0xf4003700,
9819 OPRND_SHIFT_0_BIT
)),
9820 CSKY_ISA_FLOAT_7E60
,
9821 float_work_fpuv3_fstore
),
9822 OP32_WITH_WORK ("fstmh",
9823 OPCODE_INFO2 (0xf4003700,
9829 OPRND_SHIFT_0_BIT
)),
9830 CSKY_ISA_FLOAT_7E60
,
9831 float_work_fpuv3_fstore
),
9833 OPCODE_INFO2 (0xf4003380,
9834 OPRND_SHIFT0 (0_4or21_24
, FREGLIST_DASH
),
9835 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
9836 CSKY_ISA_FLOAT_7E60
),
9838 OPCODE_INFO2 (0xf4003380,
9839 OPRND_SHIFT0 (0_4or21_24
, FREGLIST_DASH
),
9840 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
9841 CSKY_ISA_FLOAT_7E60
),
9842 OP32_WITH_WORK ("fstmu.16",
9843 OPCODE_INFO2 (0xf4003780,
9844 OPRND_SHIFT0 (0_4or21_24
, FREGLIST_DASH
),
9845 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
9846 CSKY_ISA_FLOAT_7E60
,
9847 float_work_fpuv3_fstore
),
9848 OP32_WITH_WORK ("fstmu.h",
9849 OPCODE_INFO2 (0xf4003780,
9850 OPRND_SHIFT0 (0_4or21_24
, FREGLIST_DASH
),
9851 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
9852 CSKY_ISA_FLOAT_7E60
,
9853 float_work_fpuv3_fstore
),
9855 SOPCODE_INFO2 (0xf4002000,
9856 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
9857 BRACKET_OPRND ((16_20
,
9862 OPRND_SHIFT_2_BIT
))),
9863 CSKY_ISA_FLOAT_7E60
),
9865 SOPCODE_INFO2 (0xf4002000,
9866 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
9867 BRACKET_OPRND ((16_20
,
9872 OPRND_SHIFT_2_BIT
))),
9873 CSKY_ISA_FLOAT_7E60
),
9874 OP32_WITH_WORK ("fst.32",
9875 SOPCODE_INFO2 (0xf4002400,
9876 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
9877 BRACKET_OPRND ((16_20
,
9882 OPRND_SHIFT_2_BIT
))),
9883 CSKY_ISA_FLOAT_7E60
,
9884 float_work_fpuv3_fstore
),
9885 OP32_WITH_WORK ("fsts",
9886 SOPCODE_INFO2 (0xf4002400,
9887 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
9888 BRACKET_OPRND ((16_20
,
9893 OPRND_SHIFT_2_BIT
))),
9894 CSKY_ISA_FLOAT_7E60
,
9895 float_work_fpuv3_fstore
),
9897 SOPCODE_INFO2 (0xf4002800,
9898 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
9899 BRACKET_OPRND ((16_20
,
9903 AREG_WITH_LSHIFT_FPU
,
9904 OPRND_SHIFT_0_BIT
))),
9905 CSKY_ISA_FLOAT_7E60
),
9907 SOPCODE_INFO2 (0xf4002800,
9908 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
9909 BRACKET_OPRND ((16_20
,
9913 AREG_WITH_LSHIFT_FPU
,
9914 OPRND_SHIFT_0_BIT
))),
9915 CSKY_ISA_FLOAT_7E60
),
9916 OP32_WITH_WORK ("fstr.32",
9917 SOPCODE_INFO2 (0xf4002c00,
9918 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
9919 BRACKET_OPRND ((16_20
,
9923 AREG_WITH_LSHIFT_FPU
,
9924 OPRND_SHIFT_0_BIT
))),
9925 CSKY_ISA_FLOAT_7E60
,
9926 float_work_fpuv3_fstore
),
9927 OP32_WITH_WORK ("fstrs",
9928 SOPCODE_INFO2 (0xf4002c00,
9929 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
9930 BRACKET_OPRND ((16_20
,
9934 AREG_WITH_LSHIFT_FPU
,
9935 OPRND_SHIFT_0_BIT
))),
9936 CSKY_ISA_FLOAT_7E60
,
9937 float_work_fpuv3_fstore
),
9939 OPCODE_INFO2 (0xf4003000,
9940 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
9941 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
9942 CSKY_ISA_FLOAT_7E60
),
9944 OPCODE_INFO2 (0xf4003000,
9945 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
9946 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
9947 CSKY_ISA_FLOAT_7E60
),
9948 OP32_WITH_WORK ("fstm.32",
9949 OPCODE_INFO2 (0xf4003400,
9950 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
9951 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
9952 CSKY_ISA_FLOAT_7E60
,
9953 float_work_fpuv3_fstore
),
9954 OP32_WITH_WORK ("fstms",
9955 OPCODE_INFO2 (0xf4003400,
9956 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
9957 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
9958 CSKY_ISA_FLOAT_7E60
,
9959 float_work_fpuv3_fstore
),
9961 OPCODE_INFO2 (0xf4003080,
9962 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
9963 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
9964 CSKY_ISA_FLOAT_7E60
),
9966 OPCODE_INFO2 (0xf4003080,
9967 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
9968 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
9969 CSKY_ISA_FLOAT_7E60
),
9970 OP32_WITH_WORK ("fstmu.32",
9971 OPCODE_INFO2 (0xf4003480,
9972 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
9973 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
9974 CSKY_ISA_FLOAT_7E60
,
9975 float_work_fpuv3_fstore
),
9976 OP32_WITH_WORK ("fstmu.s",
9977 OPCODE_INFO2 (0xf4003480,
9978 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
9979 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
9980 CSKY_ISA_FLOAT_7E60
,
9981 float_work_fpuv3_fstore
),
9983 SOPCODE_INFO2 (0xf4002100,
9984 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
9985 BRACKET_OPRND ((16_20
,
9990 OPRND_SHIFT_2_BIT
))),
9991 CSKY_ISA_FLOAT_7E60
),
9993 SOPCODE_INFO2 (0xf4002100,
9994 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
9995 BRACKET_OPRND ((16_20
,
10000 OPRND_SHIFT_2_BIT
))),
10001 CSKY_ISA_FLOAT_7E60
),
10002 OP32_WITH_WORK ("fst.64",
10003 SOPCODE_INFO2 (0xf4002500,
10004 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
10005 BRACKET_OPRND ((16_20
,
10007 OPRND_SHIFT_0_BIT
),
10010 OPRND_SHIFT_2_BIT
))),
10011 CSKY_ISA_FLOAT_7E60
,
10012 float_work_fpuv3_fstore
),
10013 OP32_WITH_WORK ("fstd",
10014 SOPCODE_INFO2 (0xf4002500,
10015 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
10016 BRACKET_OPRND ((16_20
,
10018 OPRND_SHIFT_0_BIT
),
10021 OPRND_SHIFT_2_BIT
))),
10022 CSKY_ISA_FLOAT_7E60
,
10023 float_work_fpuv3_fstore
),
10025 SOPCODE_INFO2 (0xf4002900,
10026 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
10027 BRACKET_OPRND ((16_20
,
10029 OPRND_SHIFT_0_BIT
),
10031 AREG_WITH_LSHIFT_FPU
,
10032 OPRND_SHIFT_0_BIT
))),
10033 CSKY_ISA_FLOAT_7E60
),
10035 SOPCODE_INFO2 (0xf4002900,
10036 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
10037 BRACKET_OPRND ((16_20
,
10039 OPRND_SHIFT_0_BIT
),
10041 AREG_WITH_LSHIFT_FPU
,
10042 OPRND_SHIFT_0_BIT
))),
10043 CSKY_ISA_FLOAT_7E60
),
10044 OP32_WITH_WORK ("fstr.64",
10045 SOPCODE_INFO2 (0xf4002d00,
10046 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
10047 BRACKET_OPRND ((16_20
,
10049 OPRND_SHIFT_0_BIT
),
10051 AREG_WITH_LSHIFT_FPU
,
10052 OPRND_SHIFT_0_BIT
))),
10053 CSKY_ISA_FLOAT_7E60
,
10054 float_work_fpuv3_fstore
),
10055 OP32_WITH_WORK ("fstrd",
10056 SOPCODE_INFO2 (0xf4002d00,
10057 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
10058 BRACKET_OPRND ((16_20
,
10060 OPRND_SHIFT_0_BIT
),
10062 AREG_WITH_LSHIFT_FPU
,
10063 OPRND_SHIFT_0_BIT
))),
10064 CSKY_ISA_FLOAT_7E60
,
10065 float_work_fpuv3_fstore
),
10067 OPCODE_INFO2 (0xf4003100,
10068 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
10069 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
10070 CSKY_ISA_FLOAT_7E60
),
10072 OPCODE_INFO2 (0xf4003100,
10073 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
10074 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
10075 CSKY_ISA_FLOAT_7E60
),
10076 OP32_WITH_WORK ("fstm.64",
10077 OPCODE_INFO2 (0xf4003500,
10078 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
10079 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
10080 CSKY_ISA_FLOAT_7E60
,
10081 float_work_fpuv3_fstore
),
10082 OP32_WITH_WORK ("fstmd",
10083 OPCODE_INFO2 (0xf4003500,
10084 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
10085 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
10086 CSKY_ISA_FLOAT_7E60
,
10087 float_work_fpuv3_fstore
),
10089 OPCODE_INFO2 (0xf4003180,
10090 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
10091 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
10092 CSKY_ISA_FLOAT_7E60
),
10094 OPCODE_INFO2 (0xf4003180,
10095 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
10096 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
10097 CSKY_ISA_FLOAT_7E60
),
10098 OP32_WITH_WORK ("fstmu.64",
10099 OPCODE_INFO2 (0xf4003580,
10100 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
10101 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
10102 CSKY_ISA_FLOAT_7E60
,
10103 float_work_fpuv3_fstore
),
10104 OP32_WITH_WORK ("fstmu.d",
10105 OPCODE_INFO2 (0xf4003580,
10106 OPRND_SHIFT0 (0_4or21_25
, FREGLIST_DASH
),
10107 OPRND_SHIFT0 (16_20
, AREG_WITH_BRACKET
)),
10108 CSKY_ISA_FLOAT_7E60
,
10109 float_work_fpuv3_fstore
),
10111 SOPCODE_INFO2 (0xf4002a00,
10112 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
10113 BRACKET_OPRND ((16_20
,
10115 OPRND_SHIFT_0_BIT
),
10117 AREG_WITH_LSHIFT_FPU
,
10118 OPRND_SHIFT_0_BIT
))),
10119 CSKY_ISA_FLOAT_7E60
),
10120 OP32_WITH_WORK ("fstrm",
10121 SOPCODE_INFO2 (0xf4002e00,
10122 (0_4
, FREG
, OPRND_SHIFT_0_BIT
),
10123 BRACKET_OPRND ((16_20
,
10125 OPRND_SHIFT_0_BIT
),
10127 AREG_WITH_LSHIFT_FPU
,
10128 OPRND_SHIFT_0_BIT
))),
10129 CSKY_ISA_FLOAT_7E60
,
10130 float_work_fpuv3_fstore
),
10132 OPCODE_INFO2 (0xf4003200,
10133 (0_4or21_24
, FREGLIST_DASH
, OPRND_SHIFT_0_BIT
),
10134 (16_20
, AREG_WITH_BRACKET
,OPRND_SHIFT_0_BIT
)),
10135 CSKY_ISA_FLOAT_7E60
),
10136 OP32_WITH_WORK ("fstmm",
10137 OPCODE_INFO2 (0xf4003600,
10138 (0_4or21_24
, FREGLIST_DASH
, OPRND_SHIFT_0_BIT
),
10139 (16_20
, AREG_WITH_BRACKET
,OPRND_SHIFT_0_BIT
)),
10140 CSKY_ISA_FLOAT_7E60
,
10141 float_work_fpuv3_fstore
),
10142 OP32 ("fftox.f16.u16",
10143 OPCODE_INFO2 (0xf4004000,
10144 OPRND_SHIFT0 (0_4
, FREG
),
10145 OPRND_SHIFT0 (16_20
, FREG
)),
10146 CSKY_ISA_FLOAT_7E60
),
10147 OP32 ("fftox.f16.s16",
10148 OPCODE_INFO2 (0xf4004020,
10149 OPRND_SHIFT0 (0_4
, FREG
),
10150 OPRND_SHIFT0 (16_20
, FREG
)),
10151 CSKY_ISA_FLOAT_7E60
),
10152 OP32 ("fftox.f16.u32",
10153 OPCODE_INFO2 (0xf4004100,
10154 OPRND_SHIFT0 (0_4
, FREG
),
10155 OPRND_SHIFT0 (16_20
, FREG
)),
10156 CSKY_ISA_FLOAT_7E60
),
10157 OP32 ("fftox.f16.s32",
10158 OPCODE_INFO2 (0xf4004120,
10159 OPRND_SHIFT0 (0_4
, FREG
),
10160 OPRND_SHIFT0 (16_20
, FREG
)),
10161 CSKY_ISA_FLOAT_7E60
),
10162 OP32 ("fftox.f32.u32",
10163 OPCODE_INFO2 (0xf4004140,
10164 OPRND_SHIFT0 (0_4
, FREG
),
10165 OPRND_SHIFT0 (16_20
, FREG
)),
10166 CSKY_ISA_FLOAT_7E60
),
10167 OP32 ("fftox.f32.s32",
10168 OPCODE_INFO2 (0xf4004160,
10169 OPRND_SHIFT0 (0_4
, FREG
),
10170 OPRND_SHIFT0 (16_20
, FREG
)),
10171 CSKY_ISA_FLOAT_7E60
),
10172 OP32 ("fftox.f64.u32",
10173 OPCODE_INFO2 (0xf4004180,
10174 OPRND_SHIFT0 (0_4
, FREG
),
10175 OPRND_SHIFT0 (16_20
, FREG
)),
10176 CSKY_ISA_FLOAT_7E60
),
10177 OP32 ("fftox.f64.s32",
10178 OPCODE_INFO2 (0xf40041a0,
10179 OPRND_SHIFT0 (0_4
, FREG
),
10180 OPRND_SHIFT0 (16_20
, FREG
)),
10181 CSKY_ISA_FLOAT_7E60
),
10182 OP32 ("fxtof.u16.f16",
10183 OPCODE_INFO2 (0xf4004800,
10184 OPRND_SHIFT0 (0_4
, FREG
),
10185 OPRND_SHIFT0 (16_20
, FREG
)),
10186 CSKY_ISA_FLOAT_7E60
),
10187 OP32 ("fxtof.s16.f16",
10188 OPCODE_INFO2 (0xf4004820,
10189 OPRND_SHIFT0 (0_4
, FREG
),
10190 OPRND_SHIFT0 (16_20
, FREG
)),
10191 CSKY_ISA_FLOAT_7E60
),
10192 OP32 ("fxtof.u32.f16",
10193 OPCODE_INFO2 (0xf4004900,
10194 OPRND_SHIFT0 (0_4
, FREG
),
10195 OPRND_SHIFT0 (16_20
, FREG
)),
10196 CSKY_ISA_FLOAT_7E60
),
10197 OP32 ("fxtof.s32.f16",
10198 OPCODE_INFO2 (0xf4004920,
10199 OPRND_SHIFT0 (0_4
, FREG
),
10200 OPRND_SHIFT0 (16_20
, FREG
)),
10201 CSKY_ISA_FLOAT_7E60
),
10202 OP32 ("fxtof.u32.f32",
10203 OPCODE_INFO2 (0xf4004940,
10204 OPRND_SHIFT0 (0_4
, FREG
),
10205 OPRND_SHIFT0 (16_20
, FREG
)),
10206 CSKY_ISA_FLOAT_7E60
),
10207 OP32 ("fxtof.s32.f32",
10208 OPCODE_INFO2 (0xf4004960,
10209 OPRND_SHIFT0 (0_4
, FREG
),
10210 OPRND_SHIFT0 (16_20
, FREG
)),
10211 CSKY_ISA_FLOAT_7E60
),
10212 OP32 ("fxtof.u32.f64",
10213 OPCODE_INFO2 (0xf4004980,
10214 OPRND_SHIFT0 (0_4
, FREG
),
10215 OPRND_SHIFT0 (16_20
, FREG
)),
10216 CSKY_ISA_FLOAT_7E60
),
10217 OP32 ("fxtof.s32.f64",
10218 OPCODE_INFO2 (0xf40049a0,
10219 OPRND_SHIFT0 (0_4
, FREG
),
10220 OPRND_SHIFT0 (16_20
, FREG
)),
10221 CSKY_ISA_FLOAT_7E60
),
10222 OP32 ("fftoi.f16.s16",
10223 OPCODE_INFO2 (0xf4004220,
10224 OPRND_SHIFT0 (0_4
, FREG
),
10225 OPRND_SHIFT0 (16_20
, FREG
)),
10226 CSKY_ISA_FLOAT_7E60
),
10227 OP32 ("fftoi.f16.u16",
10228 OPCODE_INFO2 (0xf4004200,
10229 OPRND_SHIFT0 (0_4
, FREG
),
10230 OPRND_SHIFT0 (16_20
, FREG
)),
10231 CSKY_ISA_FLOAT_7E60
),
10232 OP32 ("fftoi.f16.s32",
10233 OPCODE_INFO2 (0xf4004320,
10234 OPRND_SHIFT0 (0_4
, FREG
),
10235 OPRND_SHIFT0 (16_20
, FREG
)),
10236 CSKY_ISA_FLOAT_7E60
),
10237 OP32 ("fftoi.f16.u32",
10238 OPCODE_INFO2 (0xf4004300,
10239 OPRND_SHIFT0 (0_4
, FREG
),
10240 OPRND_SHIFT0 (16_20
, FREG
)),
10241 CSKY_ISA_FLOAT_7E60
),
10242 OP32 ("fftoi.f32.s32",
10243 OPCODE_INFO2 (0xf4004360,
10244 OPRND_SHIFT0 (0_4
, FREG
),
10245 OPRND_SHIFT0 (16_20
, FREG
)),
10246 CSKY_ISA_FLOAT_7E60
),
10247 OP32 ("fftoi.f32.u32",
10248 OPCODE_INFO2 (0xf4004340,
10249 OPRND_SHIFT0 (0_4
, FREG
),
10250 OPRND_SHIFT0 (16_20
, FREG
)),
10251 CSKY_ISA_FLOAT_7E60
),
10252 OP32 ("fftoi.f64.s32",
10253 OPCODE_INFO2 (0xf40043a0,
10254 OPRND_SHIFT0 (0_4
, FREG
),
10255 OPRND_SHIFT0 (16_20
, FREG
)),
10256 CSKY_ISA_FLOAT_7E60
),
10257 OP32 ("fftoi.f64.u32",
10258 OPCODE_INFO2 (0xf4004380,
10259 OPRND_SHIFT0 (0_4
, FREG
),
10260 OPRND_SHIFT0 (16_20
, FREG
)),
10261 CSKY_ISA_FLOAT_7E60
),
10262 OP32 ("fitof.s16.f16",
10263 OPCODE_INFO2 (0xf4004a20,
10264 OPRND_SHIFT0 (0_4
, FREG
),
10265 OPRND_SHIFT0 (16_20
, FREG
)),
10266 CSKY_ISA_FLOAT_7E60
),
10267 OP32 ("fitof.u16.f16",
10268 OPCODE_INFO2 (0xf4004a00,
10269 OPRND_SHIFT0 (0_4
, FREG
),
10270 OPRND_SHIFT0 (16_20
, FREG
)),
10271 CSKY_ISA_FLOAT_7E60
),
10272 OP32 ("fitof.s32.f16",
10273 OPCODE_INFO2 (0xf4004b20,
10274 OPRND_SHIFT0 (0_4
, FREG
),
10275 OPRND_SHIFT0 (16_20
, FREG
)),
10276 CSKY_ISA_FLOAT_7E60
),
10277 OP32 ("fitof.u32.f16",
10278 OPCODE_INFO2 (0xf4004b00,
10279 OPRND_SHIFT0 (0_4
, FREG
),
10280 OPRND_SHIFT0 (16_20
, FREG
)),
10281 CSKY_ISA_FLOAT_7E60
),
10282 OP32 ("fitof.s32.f32",
10283 OPCODE_INFO2 (0xf4004b60,
10284 OPRND_SHIFT0 (0_4
, FREG
),
10285 OPRND_SHIFT0 (16_20
, FREG
)),
10286 CSKY_ISA_FLOAT_7E60
),
10288 OPCODE_INFO2 (0xf4004b60,
10289 OPRND_SHIFT0 (0_4
, FREG
),
10290 OPRND_SHIFT0 (16_20
, FREG
)),
10291 CSKY_ISA_FLOAT_7E60
),
10292 OP32 ("fitof.u32.f32",
10293 OPCODE_INFO2 (0xf4004b40,
10294 OPRND_SHIFT0 (0_4
, FREG
),
10295 OPRND_SHIFT0 (16_20
, FREG
)),
10296 CSKY_ISA_FLOAT_7E60
),
10298 OPCODE_INFO2 (0xf4004b40,
10299 OPRND_SHIFT0 (0_4
, FREG
),
10300 OPRND_SHIFT0 (16_20
, FREG
)),
10301 CSKY_ISA_FLOAT_7E60
),
10302 OP32 ("fitof.s32.f64",
10303 OPCODE_INFO2 (0xf4004ba0,
10304 OPRND_SHIFT0 (0_4
, FREG
),
10305 OPRND_SHIFT0 (16_20
, FREG
)),
10306 CSKY_ISA_FLOAT_7E60
),
10308 OPCODE_INFO2 (0xf4004ba0,
10309 OPRND_SHIFT0 (0_4
, FREG
),
10310 OPRND_SHIFT0 (16_20
, FREG
)),
10311 CSKY_ISA_FLOAT_7E60
),
10312 OP32 ("fitof.u32.f64",
10313 OPCODE_INFO2 (0xf4004b80,
10314 OPRND_SHIFT0 (0_4
, FREG
),
10315 OPRND_SHIFT0 (16_20
, FREG
)),
10316 CSKY_ISA_FLOAT_7E60
),
10318 OPCODE_INFO2 (0xf4004b80,
10319 OPRND_SHIFT0 (0_4
, FREG
),
10320 OPRND_SHIFT0 (16_20
, FREG
)),
10321 CSKY_ISA_FLOAT_7E60
),
10322 OP32 ("fftofi.f16.rn",
10323 OPCODE_INFO2 (0xf4004400,
10324 OPRND_SHIFT0 (0_4
, FREG
),
10325 OPRND_SHIFT0 (16_20
, FREG
)),
10326 CSKY_ISA_FLOAT_7E60
),
10327 OP32 ("fftofi.f16.rz",
10328 OPCODE_INFO2 (0xf4004420,
10329 OPRND_SHIFT0 (0_4
, FREG
),
10330 OPRND_SHIFT0 (16_20
, FREG
)),
10331 CSKY_ISA_FLOAT_7E60
),
10332 OP32 ("fftofi.f16.rpi",
10333 OPCODE_INFO2 (0xf4004440,
10334 OPRND_SHIFT0 (0_4
, FREG
),
10335 OPRND_SHIFT0 (16_20
, FREG
)),
10336 CSKY_ISA_FLOAT_7E60
),
10337 OP32 ("fftofi.f16.rni",
10338 OPCODE_INFO2 (0xf4004460,
10339 OPRND_SHIFT0 (0_4
, FREG
),
10340 OPRND_SHIFT0 (16_20
, FREG
)),
10341 CSKY_ISA_FLOAT_7E60
),
10342 OP32 ("fftofi.f32.rn",
10343 OPCODE_INFO2 (0xf4004480,
10344 OPRND_SHIFT0 (0_4
, FREG
),
10345 OPRND_SHIFT0 (16_20
, FREG
)),
10346 CSKY_ISA_FLOAT_7E60
),
10347 OP32 ("fftofi.f32.rz",
10348 OPCODE_INFO2 (0xf40044a0,
10349 OPRND_SHIFT0 (0_4
, FREG
),
10350 OPRND_SHIFT0 (16_20
, FREG
)),
10351 CSKY_ISA_FLOAT_7E60
),
10352 OP32 ("fftofi.f32.rpi",
10353 OPCODE_INFO2 (0xf40044c0,
10354 OPRND_SHIFT0 (0_4
, FREG
),
10355 OPRND_SHIFT0 (16_20
, FREG
)),
10356 CSKY_ISA_FLOAT_7E60
),
10357 OP32 ("fftofi.f32.rni",
10358 OPCODE_INFO2 (0xf40044e0,
10359 OPRND_SHIFT0 (0_4
, FREG
),
10360 OPRND_SHIFT0 (16_20
, FREG
)),
10361 CSKY_ISA_FLOAT_7E60
),
10362 OP32 ("fftofi.f64.rn",
10363 OPCODE_INFO2 (0xf4004500,
10364 OPRND_SHIFT0 (0_4
, FREG
),
10365 OPRND_SHIFT0 (16_20
, FREG
)),
10366 CSKY_ISA_FLOAT_7E60
),
10367 OP32 ("fftofi.f64.rz",
10368 OPCODE_INFO2 (0xf4004520,
10369 OPRND_SHIFT0 (0_4
, FREG
),
10370 OPRND_SHIFT0 (16_20
, FREG
)),
10371 CSKY_ISA_FLOAT_7E60
),
10372 OP32 ("fftofi.f64.rpi",
10373 OPCODE_INFO2 (0xf4004540,
10374 OPRND_SHIFT0 (0_4
, FREG
),
10375 OPRND_SHIFT0 (16_20
, FREG
)),
10376 CSKY_ISA_FLOAT_7E60
),
10377 OP32 ("fftofi.f64.rni",
10378 OPCODE_INFO2 (0xf4004560,
10379 OPRND_SHIFT0 (0_4
, FREG
),
10380 OPRND_SHIFT0 (16_20
, FREG
)),
10381 CSKY_ISA_FLOAT_7E60
),
10382 DOP32_WITH_WORK ("fmovi.16",
10383 OPCODE_INFO2 (0xf400e400,
10384 OPRND_SHIFT0 (0_4
, FREG
),
10385 OPRND_SHIFT0 (5or8_9or16_25
, HFLOAT_FMOVI
)),
10386 OPCODE_INFO3 (0xf400e400,
10387 OPRND_SHIFT0 (0_4
, FREG
),
10388 OPRND_SHIFT0 (5or8_9or20_25
, IMM9b
),
10389 OPRND_SHIFT0 (16_19
, IMM4b
)),
10390 CSKY_ISA_FLOAT_7E60
,
10391 float_work_fpuv3_fmovi
),
10392 DOP32_WITH_WORK ("fmovi.32",
10393 OPCODE_INFO2 (0xf400e440,
10394 OPRND_SHIFT0 (0_4
, FREG
),
10395 OPRND_SHIFT0 (5or8_9or16_25
, SFLOAT_FMOVI
)),
10396 OPCODE_INFO3 (0xf400e440,
10397 OPRND_SHIFT0 (0_4
, FREG
),
10398 OPRND_SHIFT0 (5or8_9or20_25
, IMM9b
),
10399 OPRND_SHIFT0 (16_19
, IMM4b
)),
10400 CSKY_ISA_FLOAT_7E60
,
10401 float_work_fpuv3_fmovi
),
10402 DOP32_WITH_WORK ("fmovi.64",
10403 OPCODE_INFO2 (0xf400e480,
10404 OPRND_SHIFT0 (0_4
, FREG
),
10405 OPRND_SHIFT0 (5or8_9or16_25
, DFLOAT_FMOVI
)),
10406 OPCODE_INFO3 (0xf400e480,
10407 OPRND_SHIFT0 (0_4
, FREG
),
10408 OPRND_SHIFT0 (5or8_9or20_25
, IMM9b
),
10409 OPRND_SHIFT0 (16_19
, IMM4b
)),
10410 CSKY_ISA_FLOAT_7E60
,
10411 float_work_fpuv3_fmovi
),
10413 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_FLRW_IMM8BY4
10415 OPCODE_INFO2 (0xf4003800,
10416 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
10417 (4_7or21_24
, FCONSTANT
, OPRND_SHIFT_2_BIT
)),
10418 CSKY_ISA_FLOAT_7E60
),
10420 OPCODE_INFO2 (0xf4003800,
10421 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
10422 (4_7or21_24
, FCONSTANT
, OPRND_SHIFT_2_BIT
)),
10423 CSKY_ISA_FLOAT_7E60
),
10425 OPCODE_INFO2 (0xf4003900,
10426 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
10427 (4_7or21_24
, FCONSTANT
, OPRND_SHIFT_2_BIT
)),
10428 CSKY_ISA_FLOAT_7E60
),
10430 OPCODE_INFO2 (0xf4003900,
10431 (0_3or25
, FREG
, OPRND_SHIFT_0_BIT
),
10432 (4_7or21_24
, FCONSTANT
, OPRND_SHIFT_2_BIT
)),
10433 CSKY_ISA_FLOAT_7E60
),
10437 /* The following are aliases for other instructions. */
10438 /* setc -> cmphs r0, r0 */
10440 OPCODE_INFO0 (0x6400),
10442 /* clrc -> cmpne r0, r0 */
10444 OPCODE_INFO0 (0x6402),
10446 /* tstlt rd -> btsti rd,31 */
10448 OPCODE_INFO1 (0xc7e02880,
10449 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
10451 /* idly4 -> idly 4 */
10453 OPCODE_INFO0 (0xc0601c20),
10455 /* rsub rz, ry, rx -> subu rz, rx, ry */
10457 OPCODE_INFO3 (0xc4000080,
10458 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
10459 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
10460 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
10461 OPCODE_INFO2 (0xc4000080,
10462 (0_4or21_25
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
10463 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)), CSKYV2_ISA_1E2
),
10464 /* cmplei rd,X -> cmplti rd,X+1 */
10465 OP16_OP32 ("cmplei",
10466 OPCODE_INFO2 (0x3820,
10467 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
),
10468 (0_4
, IMM5b
, OPRND_SHIFT_0_BIT
)),
10470 OPCODE_INFO2 (0xeb200000,
10471 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
10472 (0_15
, IMM16b
, OPRND_SHIFT_0_BIT
)),
10474 /* cmpls -> cmphs */
10475 OP16_OP32 ("cmpls",
10476 OPCODE_INFO2 (0x6400,
10477 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
10478 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
10480 OPCODE_INFO2 (0xc4000420,
10481 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
10482 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
10484 /* cmpgt -> cmplt */
10485 OP16_OP32 ("cmpgt",
10486 OPCODE_INFO2 (0x6401,
10487 (6_9
, GREG0_15
, OPRND_SHIFT_0_BIT
),
10488 (2_5
, GREG0_15
, OPRND_SHIFT_0_BIT
)),
10490 OPCODE_INFO2 (0xc4000440,
10491 (21_25
, AREG
, OPRND_SHIFT_0_BIT
),
10492 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
10494 /* tstle rd -> cmplti rd,1 */
10495 OP16_OP32 ("tstle",
10496 OPCODE_INFO1 (0x3820,
10497 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
)),
10499 OPCODE_INFO1 (0xeb200000,
10500 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
10502 /* tstne rd -> cmpnei rd,0 */
10503 OP16_OP32 ("tstne",
10504 OPCODE_INFO1 (0x3840,
10505 (8_10
, GREG0_7
, OPRND_SHIFT_0_BIT
)),
10507 OPCODE_INFO1 (0xeb400000,
10508 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
10510 /* rotri rz, rx, imm5 -> rotli rz, rx, 32-imm5 */
10512 OPCODE_INFO3 (0xc4004900,
10513 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
10514 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
10515 (21_25
, IMM5b_RORI
, OPRND_SHIFT_0_BIT
)),
10516 OPCODE_INFO2 (0xc4004900,
10517 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
10518 (21_25
, IMM5b_RORI
, OPRND_SHIFT_0_BIT
)),
10521 OPCODE_INFO3 (0xc4004900,
10522 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
10523 (16_20
, AREG
, OPRND_SHIFT_0_BIT
),
10524 (21_25
, IMM5b_RORI
, OPRND_SHIFT_0_BIT
)),
10525 OPCODE_INFO2 (0xc4004900,
10526 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
),
10527 (21_25
, IMM5b_RORI
, OPRND_SHIFT_0_BIT
)),
10530 /* rotlc rd -> addc rd, rd/ addc rd, rd, rd */
10531 OP16_OP32_WITH_WORK ("rotlc",
10532 OPCODE_INFO2 (0x6001,
10533 (NONE
, GREG0_15
, OPRND_SHIFT_0_BIT
),
10534 (NONE
, CONST1
, OPRND_SHIFT_0_BIT
)),
10536 OPCODE_INFO2 (0xc4000040,
10537 (NONE
, AREG
, OPRND_SHIFT_0_BIT
),
10538 (NONE
, CONST1
, OPRND_SHIFT_0_BIT
)),
10541 /* not rd -> nor rd, rd, not rz, rx -> nor rz, rx, rx */
10542 OP16_OP32_WITH_WORK ("not",
10543 OPCODE_INFO1 (0x6c02,
10544 (NONE
, AREG
, OPRND_SHIFT_0_BIT
)),
10546 OPCODE_INFO2 (0xc4002480,
10547 (NONE
, AREG
, OPRND_SHIFT_0_BIT
),
10548 (NONE
, AREG
, OPRND_SHIFT_0_BIT
)),
10549 CSKYV2_ISA_E1
, v2_work_not
),
10551 /* Special force 32 bits instruction. */
10553 OPCODE_INFO2 (0xc4007020,
10554 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
10555 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
10558 OPCODE_INFO2 (0xc4007040,
10559 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
10560 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
10563 OPCODE_INFO2 (0xc4007080,
10564 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
10565 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
10568 OPCODE_INFO2 (0xc4007100,
10569 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
10570 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
10573 OPCODE_INFO2 (0xc4007c20,
10574 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
10575 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
10578 OPCODE_INFO2 (0xc4007c40,
10579 (0_4
, AREG
, OPRND_SHIFT_0_BIT
),
10580 (16_20
, AREG
, OPRND_SHIFT_0_BIT
)),
10581 OPCODE_INFO1 (0xc4007c40,
10582 (0_4or16_20
, DUP_AREG
, OPRND_SHIFT_0_BIT
)),
10585 {NULL
, 0, {}, {}, 0, 0, 0, 0, 0, NULL
}