1 /* Disassemble D10V instructions.
2 Copyright (C) 1996, 1997 Free Software Foundation, Inc.
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21 #include "opcode/d10v.h"
24 /* the PC wraps at 18 bits, except for the segment number */
25 /* so use this mask to keep the parts we want */
26 #define PC_MASK 0x03003FFF
28 static void dis_2_short
PARAMS ((unsigned long insn
, bfd_vma memaddr
,
29 struct disassemble_info
*info
, int order
));
30 static void dis_long
PARAMS ((unsigned long insn
, bfd_vma memaddr
,
31 struct disassemble_info
*info
));
34 print_insn_d10v (memaddr
, info
)
36 struct disassemble_info
*info
;
42 status
= (*info
->read_memory_func
) (memaddr
, buffer
, 4, info
);
45 (*info
->memory_error_func
) (status
, memaddr
, info
);
48 insn
= bfd_getb32 (buffer
);
53 dis_2_short (insn
, memaddr
, info
, 2);
56 dis_2_short (insn
, memaddr
, info
, 0);
59 dis_2_short (insn
, memaddr
, info
, 1);
62 dis_long (insn
, memaddr
, info
);
69 print_operand (oper
, insn
, op
, memaddr
, info
)
70 struct d10v_operand
*oper
;
72 struct d10v_opcode
*op
;
74 struct disassemble_info
*info
;
78 if (oper
->flags
== OPERAND_ATMINUS
)
80 (*info
->fprintf_func
) (info
->stream
, "@-");
83 if (oper
->flags
== OPERAND_MINUS
)
85 (*info
->fprintf_func
) (info
->stream
, "-");
88 if (oper
->flags
== OPERAND_PLUS
)
90 (*info
->fprintf_func
) (info
->stream
, "+");
93 if (oper
->flags
== OPERAND_ATSIGN
)
95 (*info
->fprintf_func
) (info
->stream
, "@");
98 if (oper
->flags
== OPERAND_ATPAR
)
100 (*info
->fprintf_func
) (info
->stream
, "@(");
106 /* the LONG_L format shifts registers over by 15 */
107 if (op
->format
== LONG_L
&& (oper
->flags
& OPERAND_REG
))
110 num
= (insn
>> shift
) & (0x7FFFFFFF >> (31 - oper
->bits
));
112 if (oper
->flags
& OPERAND_REG
)
116 num
+= oper
->flags
& (OPERAND_ACC
|OPERAND_FLAG
|OPERAND_CONTROL
);
117 for (i
=0;i
<reg_name_cnt();i
++)
119 if (num
== pre_defined_registers
[i
].value
)
121 if (pre_defined_registers
[i
].pname
)
122 (*info
->fprintf_func
) (info
->stream
, "%s",pre_defined_registers
[i
].pname
);
124 (*info
->fprintf_func
) (info
->stream
, "%s",pre_defined_registers
[i
].name
);
131 /* this would only get executed if a register was not in the
133 if (oper
->flags
& OPERAND_ACC
)
134 (*info
->fprintf_func
) (info
->stream
, "a");
135 else if (oper
->flags
& OPERAND_CONTROL
)
136 (*info
->fprintf_func
) (info
->stream
, "cr");
137 else if(oper
->flags
& OPERAND_REG
)
138 (*info
->fprintf_func
) (info
->stream
, "r");
139 (*info
->fprintf_func
) (info
->stream
, "%d",num
);
144 /* addresses are right-shifted by 2 */
145 if (oper
->flags
& OPERAND_ADDR
)
149 max
= (1 << (oper
->bits
- 1));
152 num
= -num
& ((1 << oper
->bits
)-1);
157 (*info
->print_address_func
) ((memaddr
- num
) & PC_MASK
, info
);
159 (*info
->print_address_func
) ((memaddr
+ num
) & PC_MASK
, info
);
163 if (oper
->flags
& OPERAND_SIGNED
)
165 int max
= (1 << (oper
->bits
- 1));
168 num
= -num
& ((1 << oper
->bits
)-1);
169 (*info
->fprintf_func
) (info
->stream
, "-");
172 (*info
->fprintf_func
) (info
->stream
, "0x%x",num
);
179 dis_long (insn
, memaddr
, info
)
182 struct disassemble_info
*info
;
186 struct d10v_opcode
*op
= (struct d10v_opcode
*)d10v_opcodes
;
187 struct d10v_operand
*oper
;
193 if ((op
->format
& LONG_OPCODE
) && ((op
->mask
& insn
) == op
->opcode
))
196 (*info
->fprintf_func
) (info
->stream
, "%s\t", op
->name
);
197 for ( i
=0; op
->operands
[i
]; i
++)
199 oper
= (struct d10v_operand
*)&d10v_operands
[op
->operands
[i
]];
200 if (oper
->flags
== OPERAND_ATPAR
)
202 print_operand (oper
, insn
, op
, memaddr
, info
);
203 if (op
->operands
[i
+1] && oper
->bits
&&
204 d10v_operands
[op
->operands
[i
+1]].flags
!= OPERAND_PLUS
&&
205 d10v_operands
[op
->operands
[i
+1]].flags
!= OPERAND_MINUS
)
206 (*info
->fprintf_func
) (info
->stream
, ", ");
214 (*info
->fprintf_func
) (info
->stream
, ".long\t0x%08x",insn
);
217 (*info
->fprintf_func
) (info
->stream
, ")");
221 dis_2_short (insn
, memaddr
, info
, order
)
224 struct disassemble_info
*info
;
230 struct d10v_opcode
*op
;
232 int match
, num_match
=0;
233 struct d10v_operand
*oper
;
236 ins
[0] = (insn
& 0x3FFFFFFF) >> 15;
237 ins
[1] = insn
& 0x00007FFF;
241 op
= (struct d10v_opcode
*)d10v_opcodes
;
245 if ((op
->format
& SHORT_OPCODE
) && ((op
->mask
& ins
[j
]) == op
->opcode
))
247 (*info
->fprintf_func
) (info
->stream
, "%s\t",op
->name
);
248 for (i
=0; op
->operands
[i
]; i
++)
250 oper
= (struct d10v_operand
*)&d10v_operands
[op
->operands
[i
]];
251 if (oper
->flags
== OPERAND_ATPAR
)
253 print_operand (oper
, ins
[j
], op
, memaddr
, info
);
254 if (op
->operands
[i
+1] && oper
->bits
&&
255 d10v_operands
[op
->operands
[i
+1]].flags
!= OPERAND_PLUS
&&
256 d10v_operands
[op
->operands
[i
+1]].flags
!= OPERAND_MINUS
)
257 (*info
->fprintf_func
) (info
->stream
, ", ");
266 (*info
->fprintf_func
) (info
->stream
, "unknown");
271 (*info
->fprintf_func
) (info
->stream
, "\t->\t");
275 (*info
->fprintf_func
) (info
->stream
, "\t<-\t");
279 (*info
->fprintf_func
) (info
->stream
, "\t||\t");
288 (*info
->fprintf_func
) (info
->stream
, ".long\t0x%08x",insn
);
291 (*info
->fprintf_func
) (info
->stream
, ")");
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