opcodes/d10v-dis.c

   1 /* Disassemble D10V instructions.
   2    Copyright 1996, 1997, 1998, 2000, 2001 Free Software Foundation, Inc.
   3
   4 This program is free software; you can redistribute it and/or modify
   5 it under the terms of the GNU General Public License as published by
   6 the Free Software Foundation; either version 2 of the License, or
   7 (at your option) any later version.
   8
   9 This program is distributed in the hope that it will be useful,
  10 but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 GNU General Public License for more details.
  13
  14 You should have received a copy of the GNU General Public License
  15 along with this program; if not, write to the Free Software
  16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  17
  18 #include <stdio.h>
  19
  20 #include "sysdep.h"
  21 #include "opcode/d10v.h"
  22 #include "dis-asm.h"
  23
  24 /* The PC wraps at 18 bits, except for the segment number,
  25    so use this mask to keep the parts we want.  */
  26 #define PC_MASK 0x0303FFFF
  27
  28 static void dis_2_short PARAMS ((unsigned long insn, bfd_vma memaddr,
  29                                  struct disassemble_info *info, int order));
  30 static void dis_long PARAMS ((unsigned long insn, bfd_vma memaddr,
  31                               struct disassemble_info *info));
  32
  33 int
  34 print_insn_d10v (memaddr, info)
  35      bfd_vma memaddr;
  36      struct disassemble_info *info;
  37 {
  38   int status;
  39   bfd_byte buffer[4];
  40   unsigned long insn;
  41
  42   status = (*info->read_memory_func) (memaddr, buffer, 4, info);
  43   if (status != 0)
  44     {
  45       (*info->memory_error_func) (status, memaddr, info);
  46       return -1;
  47     }
  48   insn = bfd_getb32 (buffer);
  49
  50   status = insn & FM11;
  51   switch (status)
  52     {
  53     case 0:
  54       dis_2_short (insn, memaddr, info, 2);
  55       break;
  56     case FM01:
  57       dis_2_short (insn, memaddr, info, 0);
  58       break;
  59     case FM10:
  60       dis_2_short (insn, memaddr, info, 1);
  61       break;
  62     case FM11:
  63       dis_long (insn, memaddr, info);
  64       break;
  65     }
  66   return 4;
  67 }
  68
  69 static void
  70 print_operand (oper, insn, op, memaddr, info)
  71      struct d10v_operand *oper;
  72      unsigned long insn;
  73      struct d10v_opcode *op;
  74      bfd_vma memaddr;
  75      struct disassemble_info *info;
  76 {
  77   int num, shift;
  78
  79   if (oper->flags == OPERAND_ATMINUS)
  80     {
  81       (*info->fprintf_func) (info->stream, "@-");
  82       return;
  83     }
  84   if (oper->flags == OPERAND_MINUS)
  85     {
  86       (*info->fprintf_func) (info->stream, "-");
  87       return;
  88     }
  89   if (oper->flags == OPERAND_PLUS)
  90     {
  91       (*info->fprintf_func) (info->stream, "+");
  92       return;
  93     }
  94   if (oper->flags == OPERAND_ATSIGN)
  95     {
  96       (*info->fprintf_func) (info->stream, "@");
  97       return;
  98     }
  99   if (oper->flags == OPERAND_ATPAR)
 100     {
 101       (*info->fprintf_func) (info->stream, "@(");
 102       return;
 103     }
 104
 105   shift = oper->shift;
 106
 107   /* The LONG_L format shifts registers over by 15.  */
 108   if (op->format == LONG_L && (oper->flags & OPERAND_REG))
 109     shift += 15;
 110
 111   num = (insn >> shift) & (0x7FFFFFFF >> (31 - oper->bits));
 112
 113   if (oper->flags & OPERAND_REG)
 114     {
 115       int i;
 116       int match = 0;
 117       num += (oper->flags
 118               & (OPERAND_GPR | OPERAND_FFLAG | OPERAND_CFLAG | OPERAND_CONTROL));
 119       if (oper->flags & (OPERAND_ACC0 | OPERAND_ACC1))
 120         num += num ? OPERAND_ACC1 : OPERAND_ACC0;
 121       for (i = 0; i < d10v_reg_name_cnt (); i++)
 122         {
 123           if (num == d10v_predefined_registers[i].value)
 124             {
 125               if (d10v_predefined_registers[i].pname)
 126                 (*info->fprintf_func) (info->stream, "%s",
 127                                        d10v_predefined_registers[i].pname);
 128               else
 129                 (*info->fprintf_func) (info->stream, "%s",
 130                                        d10v_predefined_registers[i].name);
 131               match = 1;
 132               break;
 133             }
 134         }
 135       if (match == 0)
 136         {
 137           /* This would only get executed if a register was not in the
 138              register table.  */
 139           if (oper->flags & (OPERAND_ACC0 | OPERAND_ACC1))
 140             (*info->fprintf_func) (info->stream, "a");
 141           else if (oper->flags & OPERAND_CONTROL)
 142             (*info->fprintf_func) (info->stream, "cr");
 143           else if (oper->flags & OPERAND_REG)
 144             (*info->fprintf_func) (info->stream, "r");
 145           (*info->fprintf_func) (info->stream, "%d", num);
 146         }
 147     }
 148   else
 149     {
 150       /* Addresses are right-shifted by 2.  */
 151       if (oper->flags & OPERAND_ADDR)
 152         {
 153           long max;
 154           int neg = 0;
 155           max = (1 << (oper->bits - 1));
 156           if (num & max)
 157             {
 158               num = -num & ((1 << oper->bits) - 1);
 159               neg = 1;
 160             }
 161           num = num << 2;
 162           if (info->flags & INSN_HAS_RELOC)
 163             (*info->print_address_func) (num & PC_MASK, info);
 164           else
 165             {
 166               if (neg)
 167                 (*info->print_address_func) ((memaddr - num) & PC_MASK, info);
 168               else
 169                 (*info->print_address_func) ((memaddr + num) & PC_MASK, info);
 170             }
 171         }
 172       else
 173         {
 174           if (oper->flags & OPERAND_SIGNED)
 175             {
 176               int max = (1 << (oper->bits - 1));
 177               if (num & max)
 178                 {
 179                   num = -num & ((1 << oper->bits) - 1);
 180                   (*info->fprintf_func) (info->stream, "-");
 181                 }
 182             }
 183           (*info->fprintf_func) (info->stream, "0x%x", num);
 184         }
 185     }
 186 }
 187
 188 static void
 189 dis_long (insn, memaddr, info)
 190      unsigned long insn;
 191      bfd_vma memaddr;
 192      struct disassemble_info *info;
 193 {
 194   int i;
 195   char buf[32];
 196   struct d10v_opcode *op = (struct d10v_opcode *) d10v_opcodes;
 197   struct d10v_operand *oper;
 198   int need_paren = 0;
 199   int match = 0;
 200
 201   while (op->name)
 202     {
 203       if ((op->format & LONG_OPCODE) && ((op->mask & insn) == op->opcode))
 204         {
 205           match = 1;
 206           (*info->fprintf_func) (info->stream, "%s\t", op->name);
 207           for (i = 0; op->operands[i]; i++)
 208             {
 209               oper = (struct d10v_operand *) &d10v_operands[op->operands[i]];
 210               if (oper->flags == OPERAND_ATPAR)
 211                 need_paren = 1;
 212               print_operand (oper, insn, op, memaddr, info);
 213               if (op->operands[i + 1] && oper->bits
 214                   && d10v_operands[op->operands[i + 1]].flags != OPERAND_PLUS
 215                   && d10v_operands[op->operands[i + 1]].flags != OPERAND_MINUS)
 216                 (*info->fprintf_func) (info->stream, ", ");
 217             }
 218           break;
 219         }
 220       op++;
 221     }
 222
 223   if (!match)
 224     (*info->fprintf_func) (info->stream, ".long\t0x%08x", insn);
 225
 226   if (need_paren)
 227     (*info->fprintf_func) (info->stream, ")");
 228 }
 229
 230 static void
 231 dis_2_short (insn, memaddr, info, order)
 232      unsigned long insn;
 233      bfd_vma memaddr;
 234      struct disassemble_info *info;
 235      int order;
 236 {
 237   int i, j;
 238   char astr[2][32];
 239   unsigned int ins[2];
 240   struct d10v_opcode *op;
 241   char buf[32];
 242   int match, num_match = 0;
 243   struct d10v_operand *oper;
 244   int need_paren = 0;
 245
 246   ins[0] = (insn & 0x3FFFFFFF) >> 15;
 247   ins[1] = insn & 0x00007FFF;
 248
 249   for (j = 0; j < 2; j++)
 250     {
 251       op = (struct d10v_opcode *) d10v_opcodes;
 252       match = 0;
 253       while (op->name)
 254         {
 255           if ((op->format & SHORT_OPCODE)
 256               && ((op->mask & ins[j]) == op->opcode))
 257             {
 258               (*info->fprintf_func) (info->stream, "%s\t", op->name);
 259               for (i = 0; op->operands[i]; i++)
 260                 {
 261                   oper = (struct d10v_operand *) &d10v_operands[op->operands[i]];
 262                   if (oper->flags == OPERAND_ATPAR)
 263                     need_paren = 1;
 264                   print_operand (oper, ins[j], op, memaddr, info);
 265                   if (op->operands[i + 1] && oper->bits
 266                       && d10v_operands[op->operands[i + 1]].flags != OPERAND_PLUS
 267                       && d10v_operands[op->operands[i + 1]].flags != OPERAND_MINUS)
 268                     (*info->fprintf_func) (info->stream, ", ");
 269                 }
 270               match = 1;
 271               num_match++;
 272               break;
 273             }
 274           op++;
 275         }
 276       if (!match)
 277         (*info->fprintf_func) (info->stream, "unknown");
 278
 279       switch (order)
 280         {
 281         case 0:
 282           (*info->fprintf_func) (info->stream, "\t->\t");
 283           order = -1;
 284           break;
 285         case 1:
 286           (*info->fprintf_func) (info->stream, "\t<-\t");
 287           order = -1;
 288           break;
 289         case 2:
 290           (*info->fprintf_func) (info->stream, "\t||\t");
 291           order = -1;
 292           break;
 293         default:
 294           break;
 295         }
 296     }
 297
 298   if (num_match == 0)
 299     (*info->fprintf_func) (info->stream, ".long\t0x%08x", insn);
 300
 301   if (need_paren)
 302     (*info->fprintf_func) (info->stream, ")");
 303 }