1 /* Disassemble D10V instructions.
2 Copyright 1996, 1997, 1998, 2000, 2001, 2005, 2007, 2012
3 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
24 #include "opcode/d10v.h"
27 /* The PC wraps at 18 bits, except for the segment number,
28 so use this mask to keep the parts we want. */
29 #define PC_MASK 0x0303FFFF
32 print_operand (struct d10v_operand
*oper
,
34 struct d10v_opcode
*op
,
36 struct disassemble_info
*info
)
40 if (oper
->flags
== OPERAND_ATMINUS
)
42 (*info
->fprintf_func
) (info
->stream
, "@-");
45 if (oper
->flags
== OPERAND_MINUS
)
47 (*info
->fprintf_func
) (info
->stream
, "-");
50 if (oper
->flags
== OPERAND_PLUS
)
52 (*info
->fprintf_func
) (info
->stream
, "+");
55 if (oper
->flags
== OPERAND_ATSIGN
)
57 (*info
->fprintf_func
) (info
->stream
, "@");
60 if (oper
->flags
== OPERAND_ATPAR
)
62 (*info
->fprintf_func
) (info
->stream
, "@(");
68 /* The LONG_L format shifts registers over by 15. */
69 if (op
->format
== LONG_L
&& (oper
->flags
& OPERAND_REG
))
72 num
= (insn
>> shift
) & (0x7FFFFFFF >> (31 - oper
->bits
));
74 if (oper
->flags
& OPERAND_REG
)
80 & (OPERAND_GPR
| OPERAND_FFLAG
| OPERAND_CFLAG
| OPERAND_CONTROL
));
81 if (oper
->flags
& (OPERAND_ACC0
| OPERAND_ACC1
))
82 num
+= num
? OPERAND_ACC1
: OPERAND_ACC0
;
83 for (i
= 0; i
< d10v_reg_name_cnt (); i
++)
85 if (num
== (d10v_predefined_registers
[i
].value
& ~ OPERAND_SP
))
87 if (d10v_predefined_registers
[i
].pname
)
88 (*info
->fprintf_func
) (info
->stream
, "%s",
89 d10v_predefined_registers
[i
].pname
);
91 (*info
->fprintf_func
) (info
->stream
, "%s",
92 d10v_predefined_registers
[i
].name
);
99 /* This would only get executed if a register was not in the
101 if (oper
->flags
& (OPERAND_ACC0
| OPERAND_ACC1
))
102 (*info
->fprintf_func
) (info
->stream
, "a");
103 else if (oper
->flags
& OPERAND_CONTROL
)
104 (*info
->fprintf_func
) (info
->stream
, "cr");
105 else if (oper
->flags
& OPERAND_REG
)
106 (*info
->fprintf_func
) (info
->stream
, "r");
107 (*info
->fprintf_func
) (info
->stream
, "%d", num
& REGISTER_MASK
);
112 /* Addresses are right-shifted by 2. */
113 if (oper
->flags
& OPERAND_ADDR
)
118 max
= (1 << (oper
->bits
- 1));
121 num
= -num
& ((1 << oper
->bits
) - 1);
125 if (info
->flags
& INSN_HAS_RELOC
)
126 (*info
->print_address_func
) (num
& PC_MASK
, info
);
130 (*info
->print_address_func
) ((memaddr
- num
) & PC_MASK
, info
);
132 (*info
->print_address_func
) ((memaddr
+ num
) & PC_MASK
, info
);
137 if (oper
->flags
& OPERAND_SIGNED
)
139 int max
= (1 << (oper
->bits
- 1));
142 num
= -num
& ((1 << oper
->bits
) - 1);
143 (*info
->fprintf_func
) (info
->stream
, "-");
146 (*info
->fprintf_func
) (info
->stream
, "0x%x", num
);
152 dis_long (unsigned long insn
,
154 struct disassemble_info
*info
)
157 struct d10v_opcode
*op
= (struct d10v_opcode
*) d10v_opcodes
;
158 struct d10v_operand
*oper
;
164 if ((op
->format
& LONG_OPCODE
)
165 && ((op
->mask
& insn
) == (unsigned long) op
->opcode
))
168 (*info
->fprintf_func
) (info
->stream
, "%s\t", op
->name
);
170 for (i
= 0; op
->operands
[i
]; i
++)
172 oper
= (struct d10v_operand
*) &d10v_operands
[op
->operands
[i
]];
173 if (oper
->flags
== OPERAND_ATPAR
)
175 print_operand (oper
, insn
, op
, memaddr
, info
);
176 if (op
->operands
[i
+ 1] && oper
->bits
177 && d10v_operands
[op
->operands
[i
+ 1]].flags
!= OPERAND_PLUS
178 && d10v_operands
[op
->operands
[i
+ 1]].flags
!= OPERAND_MINUS
)
179 (*info
->fprintf_func
) (info
->stream
, ", ");
187 (*info
->fprintf_func
) (info
->stream
, ".long\t0x%08lx", insn
);
190 (*info
->fprintf_func
) (info
->stream
, ")");
194 dis_2_short (unsigned long insn
,
196 struct disassemble_info
*info
,
201 struct d10v_opcode
*op
;
202 int match
, num_match
= 0;
203 struct d10v_operand
*oper
;
206 ins
[0] = (insn
& 0x3FFFFFFF) >> 15;
207 ins
[1] = insn
& 0x00007FFF;
209 for (j
= 0; j
< 2; j
++)
211 op
= (struct d10v_opcode
*) d10v_opcodes
;
215 if ((op
->format
& SHORT_OPCODE
)
216 && ((((unsigned int) op
->mask
) & ins
[j
])
217 == (unsigned int) op
->opcode
))
219 (*info
->fprintf_func
) (info
->stream
, "%s\t", op
->name
);
220 for (i
= 0; op
->operands
[i
]; i
++)
222 oper
= (struct d10v_operand
*) &d10v_operands
[op
->operands
[i
]];
223 if (oper
->flags
== OPERAND_ATPAR
)
225 print_operand (oper
, ins
[j
], op
, memaddr
, info
);
226 if (op
->operands
[i
+ 1] && oper
->bits
227 && d10v_operands
[op
->operands
[i
+ 1]].flags
!= OPERAND_PLUS
228 && d10v_operands
[op
->operands
[i
+ 1]].flags
!= OPERAND_MINUS
)
229 (*info
->fprintf_func
) (info
->stream
, ", ");
238 (*info
->fprintf_func
) (info
->stream
, "unknown");
243 (*info
->fprintf_func
) (info
->stream
, "\t->\t");
247 (*info
->fprintf_func
) (info
->stream
, "\t<-\t");
251 (*info
->fprintf_func
) (info
->stream
, "\t||\t");
260 (*info
->fprintf_func
) (info
->stream
, ".long\t0x%08lx", insn
);
263 (*info
->fprintf_func
) (info
->stream
, ")");
267 print_insn_d10v (bfd_vma memaddr
, struct disassemble_info
*info
)
273 status
= (*info
->read_memory_func
) (memaddr
, buffer
, 4, info
);
276 (*info
->memory_error_func
) (status
, memaddr
, info
);
279 insn
= bfd_getb32 (buffer
);
281 status
= insn
& FM11
;
285 dis_2_short (insn
, memaddr
, info
, 2);
288 dis_2_short (insn
, memaddr
, info
, 0);
291 dis_2_short (insn
, memaddr
, info
, 1);
294 dis_long (insn
, memaddr
, info
);