1 /* Disassemble D30V instructions.
2 Copyright (C) 1997-2016 Free Software Foundation, Inc.
4 This file is part of the GNU opcodes library.
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 It is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
23 #include "opcode/d30v.h"
27 #define PC_MASK 0xFFFFFFFF
29 /* Return 0 if lookup fails,
30 1 if found and only one form,
31 2 if found and there are short and long forms. */
34 lookup_opcode (struct d30v_insn
*insn
, long num
, int is_long
)
37 struct d30v_format
*f
;
38 struct d30v_opcode
*op
= (struct d30v_opcode
*) d30v_opcode_table
;
39 int op1
= (num
>> 25) & 0x7;
40 int op2
= (num
>> 20) & 0x1f;
41 int mod
= (num
>> 18) & 0x3;
43 /* Find the opcode. */
46 if ((op
->op1
== op1
) && (op
->op2
== op2
))
55 while (op
->op1
== op1
&& op
->op2
== op2
)
57 /* Scan through all the formats for the opcode. */
58 op_index
= op
->format
[i
++];
61 f
= (struct d30v_format
*) &d30v_format_table
[op_index
];
62 while (f
->form
== op_index
)
64 if ((!is_long
|| f
->form
>= LONG
) && (f
->modifier
== mod
))
74 while ((op_index
= op
->format
[i
++]) != 0);
80 if (insn
->form
== NULL
)
84 insn
->ecc
= (num
>> 28) & 0x7;
92 extract_value (long long num
, struct d30v_operand
*oper
, int is_long
)
95 int shift
= 12 - oper
->position
;
96 int mask
= (0xFFFFFFFF >> (32 - oper
->bits
));
100 if (oper
->bits
== 32)
101 /* Piece together 32-bit constant. */
102 val
= ((num
& 0x3FFFF)
103 | ((num
& 0xFF00000) >> 2)
104 | ((num
& 0x3F00000000LL
) >> 6));
106 val
= (num
>> (32 + shift
)) & mask
;
109 val
= (num
>> shift
) & mask
;
111 if (oper
->flags
& OPERAND_SHIFT
)
118 print_insn (struct disassemble_info
*info
,
121 struct d30v_insn
*insn
,
125 int val
, opnum
, need_comma
= 0;
126 struct d30v_operand
*oper
;
127 int i
, match
, opind
= 0, need_paren
= 0, found_control
= 0;
129 (*info
->fprintf_func
) (info
->stream
, "%s", insn
->op
->name
);
131 /* Check for CMP or CMPU. */
132 if (d30v_operand_table
[insn
->form
->operands
[0]].flags
& OPERAND_NAME
)
137 (struct d30v_operand
*) &d30v_operand_table
[insn
->form
->operands
[0]],
139 (*info
->fprintf_func
) (info
->stream
, "%s", d30v_cc_names
[val
]);
142 /* Add in ".s" or ".l". */
146 (*info
->fprintf_func
) (info
->stream
, ".l");
148 (*info
->fprintf_func
) (info
->stream
, ".s");
152 (*info
->fprintf_func
) (info
->stream
, "/%s", d30v_ecc_names
[insn
->ecc
]);
154 (*info
->fprintf_func
) (info
->stream
, "\t");
156 while ((opnum
= insn
->form
->operands
[opind
++]) != 0)
160 oper
= (struct d30v_operand
*) &d30v_operand_table
[opnum
];
162 if (oper
->flags
& OPERAND_SHIFT
)
166 && oper
->flags
!= OPERAND_PLUS
167 && oper
->flags
!= OPERAND_MINUS
)
170 (*info
->fprintf_func
) (info
->stream
, ", ");
173 if (oper
->flags
== OPERAND_ATMINUS
)
175 (*info
->fprintf_func
) (info
->stream
, "@-");
178 if (oper
->flags
== OPERAND_MINUS
)
180 (*info
->fprintf_func
) (info
->stream
, "-");
183 if (oper
->flags
== OPERAND_PLUS
)
185 (*info
->fprintf_func
) (info
->stream
, "+");
188 if (oper
->flags
== OPERAND_ATSIGN
)
190 (*info
->fprintf_func
) (info
->stream
, "@");
193 if (oper
->flags
== OPERAND_ATPAR
)
195 (*info
->fprintf_func
) (info
->stream
, "@(");
200 if (oper
->flags
== OPERAND_SPECIAL
)
203 val
= extract_value (num
, oper
, is_long
);
205 if (oper
->flags
& OPERAND_REG
)
208 if (oper
->flags
& OPERAND_CONTROL
)
210 struct d30v_operand
*oper3
=
211 (struct d30v_operand
*) &d30v_operand_table
[insn
->form
->operands
[2]];
212 int id
= extract_value (num
, oper3
, is_long
);
218 val
|= OPERAND_CONTROL
;
222 val
= OPERAND_CONTROL
+ MAX_CONTROL_REG
+ id
;
228 fprintf (stderr
, "illegal id (%d)\n", id
);
231 else if (oper
->flags
& OPERAND_ACC
)
233 else if (oper
->flags
& OPERAND_FLAG
)
235 for (i
= 0; i
< reg_name_cnt (); i
++)
237 if (val
== pre_defined_registers
[i
].value
)
239 if (pre_defined_registers
[i
].pname
)
240 (*info
->fprintf_func
)
241 (info
->stream
, "%s", pre_defined_registers
[i
].pname
);
243 (*info
->fprintf_func
)
244 (info
->stream
, "%s", pre_defined_registers
[i
].name
);
251 /* This would only get executed if a register was not in
252 the register table. */
253 (*info
->fprintf_func
)
254 (info
->stream
, _("<unknown register %d>"), val
& 0x3F);
257 /* repeati has a relocation, but its first argument is a plain
258 immediate. OTOH instructions like djsri have a pc-relative
259 delay target, but an absolute jump target. Therefore, a test
260 of insn->op->reloc_flag is not specific enough; we must test
261 if the actual operand we are handling now is pc-relative. */
262 else if (oper
->flags
& OPERAND_PCREL
)
266 /* IMM6S3 is unsigned. */
267 if (oper
->flags
& OPERAND_SIGNED
|| bits
== 32)
270 max
= (1 << (bits
- 1));
276 val
= -val
& ((1 << bits
) - 1);
282 (*info
->fprintf_func
) (info
->stream
, "-%x\t(", val
);
283 (*info
->print_address_func
) ((memaddr
- val
) & PC_MASK
, info
);
284 (*info
->fprintf_func
) (info
->stream
, ")");
288 (*info
->fprintf_func
) (info
->stream
, "%x\t(", val
);
289 (*info
->print_address_func
) ((memaddr
+ val
) & PC_MASK
, info
);
290 (*info
->fprintf_func
) (info
->stream
, ")");
293 else if (insn
->op
->reloc_flag
== RELOC_ABS
)
295 (*info
->print_address_func
) (val
, info
);
299 if (oper
->flags
& OPERAND_SIGNED
)
301 int max
= (1 << (bits
- 1));
307 val
&= ((1 << bits
) - 1);
308 (*info
->fprintf_func
) (info
->stream
, "-");
311 (*info
->fprintf_func
) (info
->stream
, "0x%x", val
);
313 /* If there is another operand, then write a comma and space. */
314 if (insn
->form
->operands
[opind
] && !(found_control
&& opind
== 2))
318 (*info
->fprintf_func
) (info
->stream
, ")");
322 print_insn_d30v (bfd_vma memaddr
, struct disassemble_info
*info
)
326 unsigned long in1
, in2
;
327 struct d30v_insn insn
;
332 info
->bytes_per_line
= 8;
333 info
->bytes_per_chunk
= 4;
334 info
->display_endian
= BFD_ENDIAN_BIG
;
336 status
= (*info
->read_memory_func
) (memaddr
, buffer
, 4, info
);
339 (*info
->memory_error_func
) (status
, memaddr
, info
);
342 in1
= bfd_getb32 (buffer
);
344 status
= (*info
->read_memory_func
) (memaddr
+ 4, buffer
, 4, info
);
347 info
->bytes_per_line
= 8;
348 if (!(result
= lookup_opcode (&insn
, in1
, 0)))
349 (*info
->fprintf_func
) (info
->stream
, ".long\t0x%lx", in1
);
351 print_insn (info
, memaddr
, (long long) in1
, &insn
, 0, result
);
354 in2
= bfd_getb32 (buffer
);
356 if (in1
& in2
& FM01
)
358 /* LONG instruction. */
359 if (!(result
= lookup_opcode (&insn
, in1
, 1)))
361 (*info
->fprintf_func
) (info
->stream
, ".long\t0x%lx,0x%lx", in1
, in2
);
364 num
= (long long) in1
<< 32 | in2
;
365 print_insn (info
, memaddr
, num
, &insn
, 1, result
);
370 if (!(result
= lookup_opcode (&insn
, in1
, 0)))
371 (*info
->fprintf_func
) (info
->stream
, ".long\t0x%lx", in1
);
373 print_insn (info
, memaddr
, num
, &insn
, 0, result
);
375 switch (((in1
>> 31) << 1) | (in2
>> 31))
378 (*info
->fprintf_func
) (info
->stream
, "\t||\t");
381 (*info
->fprintf_func
) (info
->stream
, "\t->\t");
384 (*info
->fprintf_func
) (info
->stream
, "\t<-\t");
391 if (!(result
= lookup_opcode (&insn
, in2
, 0)))
392 (*info
->fprintf_func
) (info
->stream
, ".long\t0x%lx", in2
);
394 print_insn (info
, memaddr
, num
, &insn
, 0, result
);
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