ubsan: crx: left shift cannot be represented in type 'int'
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
1 /* Select disassembly routine for specified architecture.
2 Copyright (C) 1994-2019 Free Software Foundation, Inc.
3
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include "disassemble.h"
23 #include "safe-ctype.h"
24 #include <assert.h>
25
26 #ifdef ARCH_all
27 #define ARCH_aarch64
28 #define ARCH_alpha
29 #define ARCH_arc
30 #define ARCH_arm
31 #define ARCH_avr
32 #define ARCH_bfin
33 #define ARCH_cr16
34 #define ARCH_cris
35 #define ARCH_crx
36 #define ARCH_csky
37 #define ARCH_d10v
38 #define ARCH_d30v
39 #define ARCH_dlx
40 #define ARCH_bpf
41 #define ARCH_epiphany
42 #define ARCH_fr30
43 #define ARCH_frv
44 #define ARCH_ft32
45 #define ARCH_h8300
46 #define ARCH_hppa
47 #define ARCH_i386
48 #define ARCH_ia64
49 #define ARCH_ip2k
50 #define ARCH_iq2000
51 #define ARCH_lm32
52 #define ARCH_m32c
53 #define ARCH_m32r
54 #define ARCH_m68hc11
55 #define ARCH_m68hc12
56 #define ARCH_m68k
57 #define ARCH_mcore
58 #define ARCH_mep
59 #define ARCH_metag
60 #define ARCH_microblaze
61 #define ARCH_mips
62 #define ARCH_mmix
63 #define ARCH_mn10200
64 #define ARCH_mn10300
65 #define ARCH_moxie
66 #define ARCH_mt
67 #define ARCH_msp430
68 #define ARCH_nds32
69 #define ARCH_nfp
70 #define ARCH_nios2
71 #define ARCH_ns32k
72 #define ARCH_or1k
73 #define ARCH_pdp11
74 #define ARCH_pj
75 #define ARCH_powerpc
76 #define ARCH_pru
77 #define ARCH_riscv
78 #define ARCH_rs6000
79 #define ARCH_rl78
80 #define ARCH_rx
81 #define ARCH_s12z
82 #define ARCH_s390
83 #define ARCH_score
84 #define ARCH_sh
85 #define ARCH_sparc
86 #define ARCH_spu
87 #define ARCH_tic30
88 #define ARCH_tic4x
89 #define ARCH_tic54x
90 #define ARCH_tic6x
91 #define ARCH_tic80
92 #define ARCH_tilegx
93 #define ARCH_tilepro
94 #define ARCH_v850
95 #define ARCH_vax
96 #define ARCH_visium
97 #define ARCH_wasm32
98 #define ARCH_xstormy16
99 #define ARCH_xc16x
100 #define ARCH_xgate
101 #define ARCH_xtensa
102 #define ARCH_z80
103 #define ARCH_z8k
104 #endif
105
106 #ifdef ARCH_m32c
107 #include "m32c-desc.h"
108 #endif
109
110 #ifdef ARCH_bpf
111 /* XXX this should be including bpf-desc.h instead of this hackery,
112 but at the moment it is not possible to include several CGEN
113 generated *-desc.h files simultaneously. To be fixed in
114 CGEN... */
115
116 # ifdef ARCH_m32c
117 enum epbf_isa_attr
118 {
119 ISA_EBPFLE, ISA_EBPFBE, ISA_EBPFMAX
120 };
121 # else
122 # include "bpf-desc.h"
123 # define ISA_EBPFMAX ISA_MAX
124 # endif
125 #endif /* ARCH_bpf */
126
127 disassembler_ftype
128 disassembler (enum bfd_architecture a,
129 bfd_boolean big ATTRIBUTE_UNUSED,
130 unsigned long mach ATTRIBUTE_UNUSED,
131 bfd *abfd ATTRIBUTE_UNUSED)
132 {
133 disassembler_ftype disassemble;
134
135 switch (a)
136 {
137 /* If you add a case to this table, also add it to the
138 ARCH_all definition right above this function. */
139 #ifdef ARCH_aarch64
140 case bfd_arch_aarch64:
141 disassemble = print_insn_aarch64;
142 break;
143 #endif
144 #ifdef ARCH_alpha
145 case bfd_arch_alpha:
146 disassemble = print_insn_alpha;
147 break;
148 #endif
149 #ifdef ARCH_arc
150 case bfd_arch_arc:
151 disassemble = arc_get_disassembler (abfd);
152 break;
153 #endif
154 #ifdef ARCH_arm
155 case bfd_arch_arm:
156 if (big)
157 disassemble = print_insn_big_arm;
158 else
159 disassemble = print_insn_little_arm;
160 break;
161 #endif
162 #ifdef ARCH_avr
163 case bfd_arch_avr:
164 disassemble = print_insn_avr;
165 break;
166 #endif
167 #ifdef ARCH_bfin
168 case bfd_arch_bfin:
169 disassemble = print_insn_bfin;
170 break;
171 #endif
172 #ifdef ARCH_cr16
173 case bfd_arch_cr16:
174 disassemble = print_insn_cr16;
175 break;
176 #endif
177 #ifdef ARCH_cris
178 case bfd_arch_cris:
179 disassemble = cris_get_disassembler (abfd);
180 break;
181 #endif
182 #ifdef ARCH_crx
183 case bfd_arch_crx:
184 disassemble = print_insn_crx;
185 break;
186 #endif
187 #ifdef ARCH_csky
188 case bfd_arch_csky:
189 disassemble = csky_get_disassembler (abfd);
190 break;
191 #endif
192
193 #ifdef ARCH_d10v
194 case bfd_arch_d10v:
195 disassemble = print_insn_d10v;
196 break;
197 #endif
198 #ifdef ARCH_d30v
199 case bfd_arch_d30v:
200 disassemble = print_insn_d30v;
201 break;
202 #endif
203 #ifdef ARCH_dlx
204 case bfd_arch_dlx:
205 /* As far as I know we only handle big-endian DLX objects. */
206 disassemble = print_insn_dlx;
207 break;
208 #endif
209 #ifdef ARCH_h8300
210 case bfd_arch_h8300:
211 if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
212 disassemble = print_insn_h8300h;
213 else if (mach == bfd_mach_h8300s
214 || mach == bfd_mach_h8300sn
215 || mach == bfd_mach_h8300sx
216 || mach == bfd_mach_h8300sxn)
217 disassemble = print_insn_h8300s;
218 else
219 disassemble = print_insn_h8300;
220 break;
221 #endif
222 #ifdef ARCH_hppa
223 case bfd_arch_hppa:
224 disassemble = print_insn_hppa;
225 break;
226 #endif
227 #ifdef ARCH_i386
228 case bfd_arch_i386:
229 case bfd_arch_iamcu:
230 case bfd_arch_l1om:
231 case bfd_arch_k1om:
232 disassemble = print_insn_i386;
233 break;
234 #endif
235 #ifdef ARCH_ia64
236 case bfd_arch_ia64:
237 disassemble = print_insn_ia64;
238 break;
239 #endif
240 #ifdef ARCH_ip2k
241 case bfd_arch_ip2k:
242 disassemble = print_insn_ip2k;
243 break;
244 #endif
245 #ifdef ARCH_bpf
246 case bfd_arch_bpf:
247 disassemble = print_insn_bpf;
248 break;
249 #endif
250 #ifdef ARCH_epiphany
251 case bfd_arch_epiphany:
252 disassemble = print_insn_epiphany;
253 break;
254 #endif
255 #ifdef ARCH_fr30
256 case bfd_arch_fr30:
257 disassemble = print_insn_fr30;
258 break;
259 #endif
260 #ifdef ARCH_lm32
261 case bfd_arch_lm32:
262 disassemble = print_insn_lm32;
263 break;
264 #endif
265 #ifdef ARCH_m32r
266 case bfd_arch_m32r:
267 disassemble = print_insn_m32r;
268 break;
269 #endif
270 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
271 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
272 case bfd_arch_m68hc11:
273 disassemble = print_insn_m68hc11;
274 break;
275 case bfd_arch_m68hc12:
276 disassemble = print_insn_m68hc12;
277 break;
278 case bfd_arch_m9s12x:
279 disassemble = print_insn_m9s12x;
280 break;
281 case bfd_arch_m9s12xg:
282 disassemble = print_insn_m9s12xg;
283 break;
284 #endif
285 #if defined(ARCH_s12z)
286 case bfd_arch_s12z:
287 disassemble = print_insn_s12z;
288 break;
289 #endif
290 #ifdef ARCH_m68k
291 case bfd_arch_m68k:
292 disassemble = print_insn_m68k;
293 break;
294 #endif
295 #ifdef ARCH_mt
296 case bfd_arch_mt:
297 disassemble = print_insn_mt;
298 break;
299 #endif
300 #ifdef ARCH_microblaze
301 case bfd_arch_microblaze:
302 disassemble = print_insn_microblaze;
303 break;
304 #endif
305 #ifdef ARCH_msp430
306 case bfd_arch_msp430:
307 disassemble = print_insn_msp430;
308 break;
309 #endif
310 #ifdef ARCH_nds32
311 case bfd_arch_nds32:
312 disassemble = print_insn_nds32;
313 break;
314 #endif
315 #ifdef ARCH_nfp
316 case bfd_arch_nfp:
317 disassemble = print_insn_nfp;
318 break;
319 #endif
320 #ifdef ARCH_ns32k
321 case bfd_arch_ns32k:
322 disassemble = print_insn_ns32k;
323 break;
324 #endif
325 #ifdef ARCH_mcore
326 case bfd_arch_mcore:
327 disassemble = print_insn_mcore;
328 break;
329 #endif
330 #ifdef ARCH_mep
331 case bfd_arch_mep:
332 disassemble = print_insn_mep;
333 break;
334 #endif
335 #ifdef ARCH_metag
336 case bfd_arch_metag:
337 disassemble = print_insn_metag;
338 break;
339 #endif
340 #ifdef ARCH_mips
341 case bfd_arch_mips:
342 if (big)
343 disassemble = print_insn_big_mips;
344 else
345 disassemble = print_insn_little_mips;
346 break;
347 #endif
348 #ifdef ARCH_mmix
349 case bfd_arch_mmix:
350 disassemble = print_insn_mmix;
351 break;
352 #endif
353 #ifdef ARCH_mn10200
354 case bfd_arch_mn10200:
355 disassemble = print_insn_mn10200;
356 break;
357 #endif
358 #ifdef ARCH_mn10300
359 case bfd_arch_mn10300:
360 disassemble = print_insn_mn10300;
361 break;
362 #endif
363 #ifdef ARCH_nios2
364 case bfd_arch_nios2:
365 if (big)
366 disassemble = print_insn_big_nios2;
367 else
368 disassemble = print_insn_little_nios2;
369 break;
370 #endif
371 #ifdef ARCH_or1k
372 case bfd_arch_or1k:
373 disassemble = print_insn_or1k;
374 break;
375 #endif
376 #ifdef ARCH_pdp11
377 case bfd_arch_pdp11:
378 disassemble = print_insn_pdp11;
379 break;
380 #endif
381 #ifdef ARCH_pj
382 case bfd_arch_pj:
383 disassemble = print_insn_pj;
384 break;
385 #endif
386 #ifdef ARCH_powerpc
387 case bfd_arch_powerpc:
388 #endif
389 #ifdef ARCH_rs6000
390 case bfd_arch_rs6000:
391 #endif
392 #if defined ARCH_powerpc || defined ARCH_rs6000
393 if (big)
394 disassemble = print_insn_big_powerpc;
395 else
396 disassemble = print_insn_little_powerpc;
397 break;
398 #endif
399 #ifdef ARCH_pru
400 case bfd_arch_pru:
401 disassemble = print_insn_pru;
402 break;
403 #endif
404 #ifdef ARCH_riscv
405 case bfd_arch_riscv:
406 disassemble = print_insn_riscv;
407 break;
408 #endif
409 #ifdef ARCH_rl78
410 case bfd_arch_rl78:
411 disassemble = rl78_get_disassembler (abfd);
412 break;
413 #endif
414 #ifdef ARCH_rx
415 case bfd_arch_rx:
416 disassemble = print_insn_rx;
417 break;
418 #endif
419 #ifdef ARCH_s390
420 case bfd_arch_s390:
421 disassemble = print_insn_s390;
422 break;
423 #endif
424 #ifdef ARCH_score
425 case bfd_arch_score:
426 if (big)
427 disassemble = print_insn_big_score;
428 else
429 disassemble = print_insn_little_score;
430 break;
431 #endif
432 #ifdef ARCH_sh
433 case bfd_arch_sh:
434 disassemble = print_insn_sh;
435 break;
436 #endif
437 #ifdef ARCH_sparc
438 case bfd_arch_sparc:
439 disassemble = print_insn_sparc;
440 break;
441 #endif
442 #ifdef ARCH_spu
443 case bfd_arch_spu:
444 disassemble = print_insn_spu;
445 break;
446 #endif
447 #ifdef ARCH_tic30
448 case bfd_arch_tic30:
449 disassemble = print_insn_tic30;
450 break;
451 #endif
452 #ifdef ARCH_tic4x
453 case bfd_arch_tic4x:
454 disassemble = print_insn_tic4x;
455 break;
456 #endif
457 #ifdef ARCH_tic54x
458 case bfd_arch_tic54x:
459 disassemble = print_insn_tic54x;
460 break;
461 #endif
462 #ifdef ARCH_tic6x
463 case bfd_arch_tic6x:
464 disassemble = print_insn_tic6x;
465 break;
466 #endif
467 #ifdef ARCH_tic80
468 case bfd_arch_tic80:
469 disassemble = print_insn_tic80;
470 break;
471 #endif
472 #ifdef ARCH_ft32
473 case bfd_arch_ft32:
474 disassemble = print_insn_ft32;
475 break;
476 #endif
477 #ifdef ARCH_v850
478 case bfd_arch_v850:
479 case bfd_arch_v850_rh850:
480 disassemble = print_insn_v850;
481 break;
482 #endif
483 #ifdef ARCH_wasm32
484 case bfd_arch_wasm32:
485 disassemble = print_insn_wasm32;
486 break;
487 #endif
488 #ifdef ARCH_xgate
489 case bfd_arch_xgate:
490 disassemble = print_insn_xgate;
491 break;
492 #endif
493 #ifdef ARCH_xstormy16
494 case bfd_arch_xstormy16:
495 disassemble = print_insn_xstormy16;
496 break;
497 #endif
498 #ifdef ARCH_xc16x
499 case bfd_arch_xc16x:
500 disassemble = print_insn_xc16x;
501 break;
502 #endif
503 #ifdef ARCH_xtensa
504 case bfd_arch_xtensa:
505 disassemble = print_insn_xtensa;
506 break;
507 #endif
508 #ifdef ARCH_z80
509 case bfd_arch_z80:
510 disassemble = print_insn_z80;
511 break;
512 #endif
513 #ifdef ARCH_z8k
514 case bfd_arch_z8k:
515 if (mach == bfd_mach_z8001)
516 disassemble = print_insn_z8001;
517 else
518 disassemble = print_insn_z8002;
519 break;
520 #endif
521 #ifdef ARCH_vax
522 case bfd_arch_vax:
523 disassemble = print_insn_vax;
524 break;
525 #endif
526 #ifdef ARCH_visium
527 case bfd_arch_visium:
528 disassemble = print_insn_visium;
529 break;
530 #endif
531 #ifdef ARCH_frv
532 case bfd_arch_frv:
533 disassemble = print_insn_frv;
534 break;
535 #endif
536 #ifdef ARCH_moxie
537 case bfd_arch_moxie:
538 disassemble = print_insn_moxie;
539 break;
540 #endif
541 #ifdef ARCH_iq2000
542 case bfd_arch_iq2000:
543 disassemble = print_insn_iq2000;
544 break;
545 #endif
546 #ifdef ARCH_m32c
547 case bfd_arch_m32c:
548 disassemble = print_insn_m32c;
549 break;
550 #endif
551 #ifdef ARCH_tilegx
552 case bfd_arch_tilegx:
553 disassemble = print_insn_tilegx;
554 break;
555 #endif
556 #ifdef ARCH_tilepro
557 case bfd_arch_tilepro:
558 disassemble = print_insn_tilepro;
559 break;
560 #endif
561 default:
562 return 0;
563 }
564 return disassemble;
565 }
566
567 void
568 disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
569 {
570 #ifdef ARCH_aarch64
571 print_aarch64_disassembler_options (stream);
572 #endif
573 #ifdef ARCH_arc
574 print_arc_disassembler_options (stream);
575 #endif
576 #ifdef ARCH_arm
577 print_arm_disassembler_options (stream);
578 #endif
579 #ifdef ARCH_mips
580 print_mips_disassembler_options (stream);
581 #endif
582 #ifdef ARCH_nfp
583 print_nfp_disassembler_options (stream);
584 #endif
585 #ifdef ARCH_powerpc
586 print_ppc_disassembler_options (stream);
587 #endif
588 #ifdef ARCH_riscv
589 print_riscv_disassembler_options (stream);
590 #endif
591 #ifdef ARCH_i386
592 print_i386_disassembler_options (stream);
593 #endif
594 #ifdef ARCH_s390
595 print_s390_disassembler_options (stream);
596 #endif
597 #ifdef ARCH_wasm32
598 print_wasm32_disassembler_options (stream);
599 #endif
600
601 return;
602 }
603
604 void
605 disassemble_init_for_target (struct disassemble_info * info)
606 {
607 if (info == NULL)
608 return;
609
610 switch (info->arch)
611 {
612 #ifdef ARCH_aarch64
613 case bfd_arch_aarch64:
614 info->symbol_is_valid = aarch64_symbol_is_valid;
615 info->disassembler_needs_relocs = TRUE;
616 break;
617 #endif
618 #ifdef ARCH_arm
619 case bfd_arch_arm:
620 info->symbol_is_valid = arm_symbol_is_valid;
621 info->disassembler_needs_relocs = TRUE;
622 break;
623 #endif
624 #ifdef ARCH_csky
625 case bfd_arch_csky:
626 info->symbol_is_valid = csky_symbol_is_valid;
627 info->disassembler_needs_relocs = TRUE;
628 break;
629 #endif
630
631 #ifdef ARCH_ia64
632 case bfd_arch_ia64:
633 info->skip_zeroes = 16;
634 break;
635 #endif
636 #ifdef ARCH_tic4x
637 case bfd_arch_tic4x:
638 info->skip_zeroes = 32;
639 break;
640 #endif
641 #ifdef ARCH_mep
642 case bfd_arch_mep:
643 info->skip_zeroes = 256;
644 info->skip_zeroes_at_end = 0;
645 break;
646 #endif
647 #ifdef ARCH_metag
648 case bfd_arch_metag:
649 info->disassembler_needs_relocs = TRUE;
650 break;
651 #endif
652 #ifdef ARCH_m32c
653 case bfd_arch_m32c:
654 /* This processor in fact is little endian. The value set here
655 reflects the way opcodes are written in the cgen description. */
656 info->endian = BFD_ENDIAN_BIG;
657 if (!info->private_data)
658 {
659 info->private_data = cgen_bitset_create (ISA_MAX);
660 if (info->mach == bfd_mach_m16c)
661 cgen_bitset_set (info->private_data, ISA_M16C);
662 else
663 cgen_bitset_set (info->private_data, ISA_M32C);
664 }
665 break;
666 #endif
667 #ifdef ARCH_bpf
668 case bfd_arch_bpf:
669 if (!info->private_data)
670 {
671 info->private_data = cgen_bitset_create (ISA_EBPFMAX);
672 if (info->endian == BFD_ENDIAN_BIG)
673 cgen_bitset_set (info->private_data, ISA_EBPFBE);
674 else
675 cgen_bitset_set (info->private_data, ISA_EBPFLE);
676 }
677 break;
678 #endif
679 #ifdef ARCH_pru
680 case bfd_arch_pru:
681 info->disassembler_needs_relocs = TRUE;
682 break;
683 #endif
684 #ifdef ARCH_powerpc
685 case bfd_arch_powerpc:
686 #endif
687 #ifdef ARCH_rs6000
688 case bfd_arch_rs6000:
689 #endif
690 #if defined (ARCH_powerpc) || defined (ARCH_rs6000)
691 disassemble_init_powerpc (info);
692 break;
693 #endif
694 #ifdef ARCH_riscv
695 case bfd_arch_riscv:
696 info->symbol_is_valid = riscv_symbol_is_valid;
697 break;
698 #endif
699 #ifdef ARCH_wasm32
700 case bfd_arch_wasm32:
701 disassemble_init_wasm32 (info);
702 break;
703 #endif
704 #ifdef ARCH_s390
705 case bfd_arch_s390:
706 disassemble_init_s390 (info);
707 break;
708 #endif
709 #ifdef ARCH_nds32
710 case bfd_arch_nds32:
711 disassemble_init_nds32 (info);
712 break;
713 #endif
714 default:
715 break;
716 }
717 }
718
719 void
720 disassemble_free_target (struct disassemble_info *info)
721 {
722 if (info == NULL)
723 return;
724
725 switch (info->arch)
726 {
727 default:
728 return;
729
730 #ifdef ARCH_bpf
731 case bfd_arch_bpf:
732 #endif
733 #ifdef ARCH_m32c
734 case bfd_arch_m32c:
735 #endif
736 #if defined ARCH_bpf || defined ARCH_m32c
737 if (info->private_data)
738 {
739 CGEN_BITSET *mask = info->private_data;
740 free (mask->bits);
741 }
742 break;
743 #endif
744
745 #ifdef ARCH_arc
746 case bfd_arch_arc:
747 break;
748 #endif
749 #ifdef ARCH_cris
750 case bfd_arch_cris:
751 break;
752 #endif
753 #ifdef ARCH_mmix
754 case bfd_arch_mmix:
755 break;
756 #endif
757 #ifdef ARCH_nfp
758 case bfd_arch_nfp:
759 break;
760 #endif
761 #ifdef ARCH_powerpc
762 case bfd_arch_powerpc:
763 break;
764 #endif
765 #ifdef ARCH_riscv
766 case bfd_arch_riscv:
767 break;
768 #endif
769 #ifdef ARCH_rs6000
770 case bfd_arch_rs6000:
771 break;
772 #endif
773 }
774
775 free (info->private_data);
776 }
777
778 /* Remove whitespace and consecutive commas from OPTIONS. */
779
780 char *
781 remove_whitespace_and_extra_commas (char *options)
782 {
783 char *str;
784 size_t i, len;
785
786 if (options == NULL)
787 return NULL;
788
789 /* Strip off all trailing whitespace and commas. */
790 for (len = strlen (options); len > 0; len--)
791 {
792 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
793 break;
794 options[len - 1] = '\0';
795 }
796
797 /* Convert all remaining whitespace to commas. */
798 for (i = 0; options[i] != '\0'; i++)
799 if (ISSPACE (options[i]))
800 options[i] = ',';
801
802 /* Remove consecutive commas. */
803 for (str = options; *str != '\0'; str++)
804 if (*str == ',' && (*(str + 1) == ',' || str == options))
805 {
806 char *next = str + 1;
807 while (*next == ',')
808 next++;
809 len = strlen (next);
810 if (str != options)
811 str++;
812 memmove (str, next, len);
813 next[len - (size_t)(next - str)] = '\0';
814 }
815 return (strlen (options) != 0) ? options : NULL;
816 }
817
818 /* Like STRCMP, but treat ',' the same as '\0' so that we match
819 strings like "foobar" against "foobar,xxyyzz,...". */
820
821 int
822 disassembler_options_cmp (const char *s1, const char *s2)
823 {
824 unsigned char c1, c2;
825
826 do
827 {
828 c1 = (unsigned char) *s1++;
829 if (c1 == ',')
830 c1 = '\0';
831 c2 = (unsigned char) *s2++;
832 if (c2 == ',')
833 c2 = '\0';
834 if (c1 == '\0')
835 return c1 - c2;
836 }
837 while (c1 == c2);
838
839 return c1 - c2;
840 }
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