Add support for Motorola XGATE embedded CPU
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
1 /* Select disassembly routine for specified architecture.
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
4 Free Software Foundation, Inc.
5
6 This file is part of the GNU opcodes library.
7
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
22
23 #include "sysdep.h"
24 #include "dis-asm.h"
25
26 #ifdef ARCH_all
27 #define ARCH_alpha
28 #define ARCH_arc
29 #define ARCH_arm
30 #define ARCH_avr
31 #define ARCH_bfin
32 #define ARCH_cr16
33 #define ARCH_cris
34 #define ARCH_crx
35 #define ARCH_d10v
36 #define ARCH_d30v
37 #define ARCH_dlx
38 #define ARCH_epiphany
39 #define ARCH_fr30
40 #define ARCH_frv
41 #define ARCH_h8300
42 #define ARCH_h8500
43 #define ARCH_hppa
44 #define ARCH_i370
45 #define ARCH_i386
46 #define ARCH_i860
47 #define ARCH_i960
48 #define ARCH_ia64
49 #define ARCH_ip2k
50 #define ARCH_iq2000
51 #define ARCH_lm32
52 #define ARCH_m32c
53 #define ARCH_m32r
54 #define ARCH_m68hc11
55 #define ARCH_m68hc12
56 #define ARCH_m68k
57 #define ARCH_m88k
58 #define ARCH_mcore
59 #define ARCH_mep
60 #define ARCH_microblaze
61 #define ARCH_mips
62 #define ARCH_mmix
63 #define ARCH_mn10200
64 #define ARCH_mn10300
65 #define ARCH_moxie
66 #define ARCH_mt
67 #define ARCH_msp430
68 #define ARCH_ns32k
69 #define ARCH_openrisc
70 #define ARCH_or32
71 #define ARCH_pdp11
72 #define ARCH_pj
73 #define ARCH_powerpc
74 #define ARCH_rs6000
75 #define ARCH_rl78
76 #define ARCH_rx
77 #define ARCH_s390
78 #define ARCH_score
79 #define ARCH_sh
80 #define ARCH_sparc
81 #define ARCH_spu
82 #define ARCH_tic30
83 #define ARCH_tic4x
84 #define ARCH_tic54x
85 #define ARCH_tic6x
86 #define ARCH_tic80
87 #define ARCH_tilegx
88 #define ARCH_tilepro
89 #define ARCH_v850
90 #define ARCH_vax
91 #define ARCH_w65
92 #define ARCH_xstormy16
93 #define ARCH_xc16x
94 #define ARCH_xgate
95 #define ARCH_xtensa
96 #define ARCH_z80
97 #define ARCH_z8k
98 #define INCLUDE_SHMEDIA
99 #endif
100
101 #ifdef ARCH_m32c
102 #include "m32c-desc.h"
103 #endif
104
105 disassembler_ftype
106 disassembler (abfd)
107 bfd *abfd;
108 {
109 enum bfd_architecture a = bfd_get_arch (abfd);
110 disassembler_ftype disassemble;
111
112 switch (a)
113 {
114 /* If you add a case to this table, also add it to the
115 ARCH_all definition right above this function. */
116 #ifdef ARCH_alpha
117 case bfd_arch_alpha:
118 disassemble = print_insn_alpha;
119 break;
120 #endif
121 #ifdef ARCH_arc
122 case bfd_arch_arc:
123 disassemble = arc_get_disassembler (abfd);
124 break;
125 #endif
126 #ifdef ARCH_arm
127 case bfd_arch_arm:
128 if (bfd_big_endian (abfd))
129 disassemble = print_insn_big_arm;
130 else
131 disassemble = print_insn_little_arm;
132 break;
133 #endif
134 #ifdef ARCH_avr
135 case bfd_arch_avr:
136 disassemble = print_insn_avr;
137 break;
138 #endif
139 #ifdef ARCH_bfin
140 case bfd_arch_bfin:
141 disassemble = print_insn_bfin;
142 break;
143 #endif
144 #ifdef ARCH_cr16
145 case bfd_arch_cr16:
146 disassemble = print_insn_cr16;
147 break;
148 #endif
149 #ifdef ARCH_cris
150 case bfd_arch_cris:
151 disassemble = cris_get_disassembler (abfd);
152 break;
153 #endif
154 #ifdef ARCH_crx
155 case bfd_arch_crx:
156 disassemble = print_insn_crx;
157 break;
158 #endif
159 #ifdef ARCH_d10v
160 case bfd_arch_d10v:
161 disassemble = print_insn_d10v;
162 break;
163 #endif
164 #ifdef ARCH_d30v
165 case bfd_arch_d30v:
166 disassemble = print_insn_d30v;
167 break;
168 #endif
169 #ifdef ARCH_dlx
170 case bfd_arch_dlx:
171 /* As far as I know we only handle big-endian DLX objects. */
172 disassemble = print_insn_dlx;
173 break;
174 #endif
175 #ifdef ARCH_h8300
176 case bfd_arch_h8300:
177 if (bfd_get_mach (abfd) == bfd_mach_h8300h
178 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
179 disassemble = print_insn_h8300h;
180 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
181 || bfd_get_mach (abfd) == bfd_mach_h8300sn
182 || bfd_get_mach (abfd) == bfd_mach_h8300sx
183 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
184 disassemble = print_insn_h8300s;
185 else
186 disassemble = print_insn_h8300;
187 break;
188 #endif
189 #ifdef ARCH_h8500
190 case bfd_arch_h8500:
191 disassemble = print_insn_h8500;
192 break;
193 #endif
194 #ifdef ARCH_hppa
195 case bfd_arch_hppa:
196 disassemble = print_insn_hppa;
197 break;
198 #endif
199 #ifdef ARCH_i370
200 case bfd_arch_i370:
201 disassemble = print_insn_i370;
202 break;
203 #endif
204 #ifdef ARCH_i386
205 case bfd_arch_i386:
206 case bfd_arch_l1om:
207 case bfd_arch_k1om:
208 disassemble = print_insn_i386;
209 break;
210 #endif
211 #ifdef ARCH_i860
212 case bfd_arch_i860:
213 disassemble = print_insn_i860;
214 break;
215 #endif
216 #ifdef ARCH_i960
217 case bfd_arch_i960:
218 disassemble = print_insn_i960;
219 break;
220 #endif
221 #ifdef ARCH_ia64
222 case bfd_arch_ia64:
223 disassemble = print_insn_ia64;
224 break;
225 #endif
226 #ifdef ARCH_ip2k
227 case bfd_arch_ip2k:
228 disassemble = print_insn_ip2k;
229 break;
230 #endif
231 #ifdef ARCH_epiphany
232 case bfd_arch_epiphany:
233 disassemble = print_insn_epiphany;
234 break;
235 #endif
236 #ifdef ARCH_fr30
237 case bfd_arch_fr30:
238 disassemble = print_insn_fr30;
239 break;
240 #endif
241 #ifdef ARCH_lm32
242 case bfd_arch_lm32:
243 disassemble = print_insn_lm32;
244 break;
245 #endif
246 #ifdef ARCH_m32r
247 case bfd_arch_m32r:
248 disassemble = print_insn_m32r;
249 break;
250 #endif
251 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
252 case bfd_arch_m68hc11:
253 disassemble = print_insn_m68hc11;
254 break;
255 case bfd_arch_m68hc12:
256 disassemble = print_insn_m68hc12;
257 break;
258 #endif
259 #ifdef ARCH_m68k
260 case bfd_arch_m68k:
261 disassemble = print_insn_m68k;
262 break;
263 #endif
264 #ifdef ARCH_m88k
265 case bfd_arch_m88k:
266 disassemble = print_insn_m88k;
267 break;
268 #endif
269 #ifdef ARCH_mt
270 case bfd_arch_mt:
271 disassemble = print_insn_mt;
272 break;
273 #endif
274 #ifdef ARCH_microblaze
275 case bfd_arch_microblaze:
276 disassemble = print_insn_microblaze;
277 break;
278 #endif
279 #ifdef ARCH_msp430
280 case bfd_arch_msp430:
281 disassemble = print_insn_msp430;
282 break;
283 #endif
284 #ifdef ARCH_ns32k
285 case bfd_arch_ns32k:
286 disassemble = print_insn_ns32k;
287 break;
288 #endif
289 #ifdef ARCH_mcore
290 case bfd_arch_mcore:
291 disassemble = print_insn_mcore;
292 break;
293 #endif
294 #ifdef ARCH_mep
295 case bfd_arch_mep:
296 disassemble = print_insn_mep;
297 break;
298 #endif
299 #ifdef ARCH_mips
300 case bfd_arch_mips:
301 if (bfd_big_endian (abfd))
302 disassemble = print_insn_big_mips;
303 else
304 disassemble = print_insn_little_mips;
305 break;
306 #endif
307 #ifdef ARCH_mmix
308 case bfd_arch_mmix:
309 disassemble = print_insn_mmix;
310 break;
311 #endif
312 #ifdef ARCH_mn10200
313 case bfd_arch_mn10200:
314 disassemble = print_insn_mn10200;
315 break;
316 #endif
317 #ifdef ARCH_mn10300
318 case bfd_arch_mn10300:
319 disassemble = print_insn_mn10300;
320 break;
321 #endif
322 #ifdef ARCH_openrisc
323 case bfd_arch_openrisc:
324 disassemble = print_insn_openrisc;
325 break;
326 #endif
327 #ifdef ARCH_or32
328 case bfd_arch_or32:
329 if (bfd_big_endian (abfd))
330 disassemble = print_insn_big_or32;
331 else
332 disassemble = print_insn_little_or32;
333 break;
334 #endif
335 #ifdef ARCH_pdp11
336 case bfd_arch_pdp11:
337 disassemble = print_insn_pdp11;
338 break;
339 #endif
340 #ifdef ARCH_pj
341 case bfd_arch_pj:
342 disassemble = print_insn_pj;
343 break;
344 #endif
345 #ifdef ARCH_powerpc
346 case bfd_arch_powerpc:
347 if (bfd_big_endian (abfd))
348 disassemble = print_insn_big_powerpc;
349 else
350 disassemble = print_insn_little_powerpc;
351 break;
352 #endif
353 #ifdef ARCH_rs6000
354 case bfd_arch_rs6000:
355 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
356 disassemble = print_insn_big_powerpc;
357 else
358 disassemble = print_insn_rs6000;
359 break;
360 #endif
361 #ifdef ARCH_rl78
362 case bfd_arch_rl78:
363 disassemble = print_insn_rl78;
364 break;
365 #endif
366 #ifdef ARCH_rx
367 case bfd_arch_rx:
368 disassemble = print_insn_rx;
369 break;
370 #endif
371 #ifdef ARCH_s390
372 case bfd_arch_s390:
373 disassemble = print_insn_s390;
374 break;
375 #endif
376 #ifdef ARCH_score
377 case bfd_arch_score:
378 if (bfd_big_endian (abfd))
379 disassemble = print_insn_big_score;
380 else
381 disassemble = print_insn_little_score;
382 break;
383 #endif
384 #ifdef ARCH_sh
385 case bfd_arch_sh:
386 disassemble = print_insn_sh;
387 break;
388 #endif
389 #ifdef ARCH_sparc
390 case bfd_arch_sparc:
391 disassemble = print_insn_sparc;
392 break;
393 #endif
394 #ifdef ARCH_spu
395 case bfd_arch_spu:
396 disassemble = print_insn_spu;
397 break;
398 #endif
399 #ifdef ARCH_tic30
400 case bfd_arch_tic30:
401 disassemble = print_insn_tic30;
402 break;
403 #endif
404 #ifdef ARCH_tic4x
405 case bfd_arch_tic4x:
406 disassemble = print_insn_tic4x;
407 break;
408 #endif
409 #ifdef ARCH_tic54x
410 case bfd_arch_tic54x:
411 disassemble = print_insn_tic54x;
412 break;
413 #endif
414 #ifdef ARCH_tic6x
415 case bfd_arch_tic6x:
416 disassemble = print_insn_tic6x;
417 break;
418 #endif
419 #ifdef ARCH_tic80
420 case bfd_arch_tic80:
421 disassemble = print_insn_tic80;
422 break;
423 #endif
424 #ifdef ARCH_v850
425 case bfd_arch_v850:
426 disassemble = print_insn_v850;
427 break;
428 #endif
429 #ifdef ARCH_w65
430 case bfd_arch_w65:
431 disassemble = print_insn_w65;
432 break;
433 #endif
434 #ifdef ARCH_xgate
435 case bfd_arch_xgate:
436 disassemble = print_insn_xgate;
437 break;
438 #endif
439 #ifdef ARCH_xstormy16
440 case bfd_arch_xstormy16:
441 disassemble = print_insn_xstormy16;
442 break;
443 #endif
444 #ifdef ARCH_xc16x
445 case bfd_arch_xc16x:
446 disassemble = print_insn_xc16x;
447 break;
448 #endif
449 #ifdef ARCH_xtensa
450 case bfd_arch_xtensa:
451 disassemble = print_insn_xtensa;
452 break;
453 #endif
454 #ifdef ARCH_z80
455 case bfd_arch_z80:
456 disassemble = print_insn_z80;
457 break;
458 #endif
459 #ifdef ARCH_z8k
460 case bfd_arch_z8k:
461 if (bfd_get_mach(abfd) == bfd_mach_z8001)
462 disassemble = print_insn_z8001;
463 else
464 disassemble = print_insn_z8002;
465 break;
466 #endif
467 #ifdef ARCH_vax
468 case bfd_arch_vax:
469 disassemble = print_insn_vax;
470 break;
471 #endif
472 #ifdef ARCH_frv
473 case bfd_arch_frv:
474 disassemble = print_insn_frv;
475 break;
476 #endif
477 #ifdef ARCH_moxie
478 case bfd_arch_moxie:
479 disassemble = print_insn_moxie;
480 break;
481 #endif
482 #ifdef ARCH_iq2000
483 case bfd_arch_iq2000:
484 disassemble = print_insn_iq2000;
485 break;
486 #endif
487 #ifdef ARCH_m32c
488 case bfd_arch_m32c:
489 disassemble = print_insn_m32c;
490 break;
491 #endif
492 #ifdef ARCH_tilegx
493 case bfd_arch_tilegx:
494 disassemble = print_insn_tilegx;
495 break;
496 #endif
497 #ifdef ARCH_tilepro
498 case bfd_arch_tilepro:
499 disassemble = print_insn_tilepro;
500 break;
501 #endif
502 default:
503 return 0;
504 }
505 return disassemble;
506 }
507
508 void
509 disassembler_usage (stream)
510 FILE * stream ATTRIBUTE_UNUSED;
511 {
512 #ifdef ARCH_arm
513 print_arm_disassembler_options (stream);
514 #endif
515 #ifdef ARCH_mips
516 print_mips_disassembler_options (stream);
517 #endif
518 #ifdef ARCH_powerpc
519 print_ppc_disassembler_options (stream);
520 #endif
521 #ifdef ARCH_i386
522 print_i386_disassembler_options (stream);
523 #endif
524 #ifdef ARCH_s390
525 print_s390_disassembler_options (stream);
526 #endif
527
528 return;
529 }
530
531 void
532 disassemble_init_for_target (struct disassemble_info * info)
533 {
534 if (info == NULL)
535 return;
536
537 switch (info->arch)
538 {
539 #ifdef ARCH_arm
540 case bfd_arch_arm:
541 info->symbol_is_valid = arm_symbol_is_valid;
542 info->disassembler_needs_relocs = TRUE;
543 break;
544 #endif
545 #ifdef ARCH_ia64
546 case bfd_arch_ia64:
547 info->skip_zeroes = 16;
548 break;
549 #endif
550 #ifdef ARCH_tic4x
551 case bfd_arch_tic4x:
552 info->skip_zeroes = 32;
553 break;
554 #endif
555 #ifdef ARCH_mep
556 case bfd_arch_mep:
557 info->skip_zeroes = 256;
558 info->skip_zeroes_at_end = 0;
559 break;
560 #endif
561 #ifdef ARCH_m32c
562 case bfd_arch_m32c:
563 /* This processor in fact is little endian. The value set here
564 reflects the way opcodes are written in the cgen description. */
565 info->endian = BFD_ENDIAN_BIG;
566 if (! info->insn_sets)
567 {
568 info->insn_sets = cgen_bitset_create (ISA_MAX);
569 if (info->mach == bfd_mach_m16c)
570 cgen_bitset_set (info->insn_sets, ISA_M16C);
571 else
572 cgen_bitset_set (info->insn_sets, ISA_M32C);
573 }
574 break;
575 #endif
576 #ifdef ARCH_powerpc
577 case bfd_arch_powerpc:
578 #endif
579 #ifdef ARCH_rs6000
580 case bfd_arch_rs6000:
581 #endif
582 #if defined (ARCH_powerpc) || defined (ARCH_rs6000)
583 disassemble_init_powerpc (info);
584 break;
585 #endif
586 default:
587 break;
588 }
589 }
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