GDB: Add support for the new set/show disassembler-options commands.
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
1 /* Select disassembly routine for specified architecture.
2 Copyright (C) 1994-2017 Free Software Foundation, Inc.
3
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21 #include "sysdep.h"
22 #include "dis-asm.h"
23 #include "safe-ctype.h"
24
25 #ifdef ARCH_all
26 #define ARCH_aarch64
27 #define ARCH_alpha
28 #define ARCH_arc
29 #define ARCH_arm
30 #define ARCH_avr
31 #define ARCH_bfin
32 #define ARCH_cr16
33 #define ARCH_cris
34 #define ARCH_crx
35 #define ARCH_d10v
36 #define ARCH_d30v
37 #define ARCH_dlx
38 #define ARCH_epiphany
39 #define ARCH_fr30
40 #define ARCH_frv
41 #define ARCH_ft32
42 #define ARCH_h8300
43 #define ARCH_h8500
44 #define ARCH_hppa
45 #define ARCH_i370
46 #define ARCH_i386
47 #define ARCH_i860
48 #define ARCH_i960
49 #define ARCH_ia64
50 #define ARCH_ip2k
51 #define ARCH_iq2000
52 #define ARCH_lm32
53 #define ARCH_m32c
54 #define ARCH_m32r
55 #define ARCH_m68hc11
56 #define ARCH_m68hc12
57 #define ARCH_m68k
58 #define ARCH_m88k
59 #define ARCH_mcore
60 #define ARCH_mep
61 #define ARCH_metag
62 #define ARCH_microblaze
63 #define ARCH_mips
64 #define ARCH_mmix
65 #define ARCH_mn10200
66 #define ARCH_mn10300
67 #define ARCH_moxie
68 #define ARCH_mt
69 #define ARCH_msp430
70 #define ARCH_nds32
71 #define ARCH_nios2
72 #define ARCH_ns32k
73 #define ARCH_or1k
74 #define ARCH_pdp11
75 #define ARCH_pj
76 #define ARCH_powerpc
77 #define ARCH_pru
78 #define ARCH_rs6000
79 #define ARCH_rl78
80 #define ARCH_rx
81 #define ARCH_s390
82 #define ARCH_score
83 #define ARCH_sh
84 #define ARCH_sparc
85 #define ARCH_spu
86 #define ARCH_tic30
87 #define ARCH_tic4x
88 #define ARCH_tic54x
89 #define ARCH_tic6x
90 #define ARCH_tic80
91 #define ARCH_tilegx
92 #define ARCH_tilepro
93 #define ARCH_v850
94 #define ARCH_vax
95 #define ARCH_visium
96 #define ARCH_w65
97 #define ARCH_xstormy16
98 #define ARCH_xc16x
99 #define ARCH_xgate
100 #define ARCH_xtensa
101 #define ARCH_z80
102 #define ARCH_z8k
103 #define INCLUDE_SHMEDIA
104 #endif
105
106 #ifdef ARCH_m32c
107 #include "m32c-desc.h"
108 #endif
109
110 disassembler_ftype
111 disassembler (bfd *abfd)
112 {
113 enum bfd_architecture a = bfd_get_arch (abfd);
114 disassembler_ftype disassemble;
115
116 switch (a)
117 {
118 /* If you add a case to this table, also add it to the
119 ARCH_all definition right above this function. */
120 #ifdef ARCH_aarch64
121 case bfd_arch_aarch64:
122 disassemble = print_insn_aarch64;
123 break;
124 #endif
125 #ifdef ARCH_alpha
126 case bfd_arch_alpha:
127 disassemble = print_insn_alpha;
128 break;
129 #endif
130 #ifdef ARCH_arc
131 case bfd_arch_arc:
132 disassemble = arc_get_disassembler (abfd);
133 break;
134 #endif
135 #ifdef ARCH_arm
136 case bfd_arch_arm:
137 if (bfd_big_endian (abfd))
138 disassemble = print_insn_big_arm;
139 else
140 disassemble = print_insn_little_arm;
141 break;
142 #endif
143 #ifdef ARCH_avr
144 case bfd_arch_avr:
145 disassemble = print_insn_avr;
146 break;
147 #endif
148 #ifdef ARCH_bfin
149 case bfd_arch_bfin:
150 disassemble = print_insn_bfin;
151 break;
152 #endif
153 #ifdef ARCH_cr16
154 case bfd_arch_cr16:
155 disassemble = print_insn_cr16;
156 break;
157 #endif
158 #ifdef ARCH_cris
159 case bfd_arch_cris:
160 disassemble = cris_get_disassembler (abfd);
161 break;
162 #endif
163 #ifdef ARCH_crx
164 case bfd_arch_crx:
165 disassemble = print_insn_crx;
166 break;
167 #endif
168 #ifdef ARCH_d10v
169 case bfd_arch_d10v:
170 disassemble = print_insn_d10v;
171 break;
172 #endif
173 #ifdef ARCH_d30v
174 case bfd_arch_d30v:
175 disassemble = print_insn_d30v;
176 break;
177 #endif
178 #ifdef ARCH_dlx
179 case bfd_arch_dlx:
180 /* As far as I know we only handle big-endian DLX objects. */
181 disassemble = print_insn_dlx;
182 break;
183 #endif
184 #ifdef ARCH_h8300
185 case bfd_arch_h8300:
186 if (bfd_get_mach (abfd) == bfd_mach_h8300h
187 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
188 disassemble = print_insn_h8300h;
189 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
190 || bfd_get_mach (abfd) == bfd_mach_h8300sn
191 || bfd_get_mach (abfd) == bfd_mach_h8300sx
192 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
193 disassemble = print_insn_h8300s;
194 else
195 disassemble = print_insn_h8300;
196 break;
197 #endif
198 #ifdef ARCH_h8500
199 case bfd_arch_h8500:
200 disassemble = print_insn_h8500;
201 break;
202 #endif
203 #ifdef ARCH_hppa
204 case bfd_arch_hppa:
205 disassemble = print_insn_hppa;
206 break;
207 #endif
208 #ifdef ARCH_i370
209 case bfd_arch_i370:
210 disassemble = print_insn_i370;
211 break;
212 #endif
213 #ifdef ARCH_i386
214 case bfd_arch_i386:
215 case bfd_arch_iamcu:
216 case bfd_arch_l1om:
217 case bfd_arch_k1om:
218 disassemble = print_insn_i386;
219 break;
220 #endif
221 #ifdef ARCH_i860
222 case bfd_arch_i860:
223 disassemble = print_insn_i860;
224 break;
225 #endif
226 #ifdef ARCH_i960
227 case bfd_arch_i960:
228 disassemble = print_insn_i960;
229 break;
230 #endif
231 #ifdef ARCH_ia64
232 case bfd_arch_ia64:
233 disassemble = print_insn_ia64;
234 break;
235 #endif
236 #ifdef ARCH_ip2k
237 case bfd_arch_ip2k:
238 disassemble = print_insn_ip2k;
239 break;
240 #endif
241 #ifdef ARCH_epiphany
242 case bfd_arch_epiphany:
243 disassemble = print_insn_epiphany;
244 break;
245 #endif
246 #ifdef ARCH_fr30
247 case bfd_arch_fr30:
248 disassemble = print_insn_fr30;
249 break;
250 #endif
251 #ifdef ARCH_lm32
252 case bfd_arch_lm32:
253 disassemble = print_insn_lm32;
254 break;
255 #endif
256 #ifdef ARCH_m32r
257 case bfd_arch_m32r:
258 disassemble = print_insn_m32r;
259 break;
260 #endif
261 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
262 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
263 case bfd_arch_m68hc11:
264 disassemble = print_insn_m68hc11;
265 break;
266 case bfd_arch_m68hc12:
267 disassemble = print_insn_m68hc12;
268 break;
269 case bfd_arch_m9s12x:
270 disassemble = print_insn_m9s12x;
271 break;
272 case bfd_arch_m9s12xg:
273 disassemble = print_insn_m9s12xg;
274 break;
275 #endif
276 #ifdef ARCH_m68k
277 case bfd_arch_m68k:
278 disassemble = print_insn_m68k;
279 break;
280 #endif
281 #ifdef ARCH_m88k
282 case bfd_arch_m88k:
283 disassemble = print_insn_m88k;
284 break;
285 #endif
286 #ifdef ARCH_mt
287 case bfd_arch_mt:
288 disassemble = print_insn_mt;
289 break;
290 #endif
291 #ifdef ARCH_microblaze
292 case bfd_arch_microblaze:
293 disassemble = print_insn_microblaze;
294 break;
295 #endif
296 #ifdef ARCH_msp430
297 case bfd_arch_msp430:
298 disassemble = print_insn_msp430;
299 break;
300 #endif
301 #ifdef ARCH_nds32
302 case bfd_arch_nds32:
303 disassemble = print_insn_nds32;
304 break;
305 #endif
306 #ifdef ARCH_ns32k
307 case bfd_arch_ns32k:
308 disassemble = print_insn_ns32k;
309 break;
310 #endif
311 #ifdef ARCH_mcore
312 case bfd_arch_mcore:
313 disassemble = print_insn_mcore;
314 break;
315 #endif
316 #ifdef ARCH_mep
317 case bfd_arch_mep:
318 disassemble = print_insn_mep;
319 break;
320 #endif
321 #ifdef ARCH_metag
322 case bfd_arch_metag:
323 disassemble = print_insn_metag;
324 break;
325 #endif
326 #ifdef ARCH_mips
327 case bfd_arch_mips:
328 if (bfd_big_endian (abfd))
329 disassemble = print_insn_big_mips;
330 else
331 disassemble = print_insn_little_mips;
332 break;
333 #endif
334 #ifdef ARCH_mmix
335 case bfd_arch_mmix:
336 disassemble = print_insn_mmix;
337 break;
338 #endif
339 #ifdef ARCH_mn10200
340 case bfd_arch_mn10200:
341 disassemble = print_insn_mn10200;
342 break;
343 #endif
344 #ifdef ARCH_mn10300
345 case bfd_arch_mn10300:
346 disassemble = print_insn_mn10300;
347 break;
348 #endif
349 #ifdef ARCH_nios2
350 case bfd_arch_nios2:
351 if (bfd_big_endian (abfd))
352 disassemble = print_insn_big_nios2;
353 else
354 disassemble = print_insn_little_nios2;
355 break;
356 #endif
357 #ifdef ARCH_or1k
358 case bfd_arch_or1k:
359 disassemble = print_insn_or1k;
360 break;
361 #endif
362 #ifdef ARCH_pdp11
363 case bfd_arch_pdp11:
364 disassemble = print_insn_pdp11;
365 break;
366 #endif
367 #ifdef ARCH_pj
368 case bfd_arch_pj:
369 disassemble = print_insn_pj;
370 break;
371 #endif
372 #ifdef ARCH_powerpc
373 case bfd_arch_powerpc:
374 if (bfd_big_endian (abfd))
375 disassemble = print_insn_big_powerpc;
376 else
377 disassemble = print_insn_little_powerpc;
378 break;
379 #endif
380 #ifdef ARCH_pru
381 case bfd_arch_pru:
382 disassemble = print_insn_pru;
383 break;
384 #endif
385 #ifdef ARCH_riscv
386 case bfd_arch_riscv:
387 disassemble = print_insn_riscv;
388 break;
389 #endif
390 #ifdef ARCH_rs6000
391 case bfd_arch_rs6000:
392 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
393 disassemble = print_insn_big_powerpc;
394 else
395 disassemble = print_insn_rs6000;
396 break;
397 #endif
398 #ifdef ARCH_rl78
399 case bfd_arch_rl78:
400 disassemble = rl78_get_disassembler (abfd);
401 break;
402 #endif
403 #ifdef ARCH_rx
404 case bfd_arch_rx:
405 disassemble = print_insn_rx;
406 break;
407 #endif
408 #ifdef ARCH_s390
409 case bfd_arch_s390:
410 disassemble = print_insn_s390;
411 break;
412 #endif
413 #ifdef ARCH_score
414 case bfd_arch_score:
415 if (bfd_big_endian (abfd))
416 disassemble = print_insn_big_score;
417 else
418 disassemble = print_insn_little_score;
419 break;
420 #endif
421 #ifdef ARCH_sh
422 case bfd_arch_sh:
423 disassemble = print_insn_sh;
424 break;
425 #endif
426 #ifdef ARCH_sparc
427 case bfd_arch_sparc:
428 disassemble = print_insn_sparc;
429 break;
430 #endif
431 #ifdef ARCH_spu
432 case bfd_arch_spu:
433 disassemble = print_insn_spu;
434 break;
435 #endif
436 #ifdef ARCH_tic30
437 case bfd_arch_tic30:
438 disassemble = print_insn_tic30;
439 break;
440 #endif
441 #ifdef ARCH_tic4x
442 case bfd_arch_tic4x:
443 disassemble = print_insn_tic4x;
444 break;
445 #endif
446 #ifdef ARCH_tic54x
447 case bfd_arch_tic54x:
448 disassemble = print_insn_tic54x;
449 break;
450 #endif
451 #ifdef ARCH_tic6x
452 case bfd_arch_tic6x:
453 disassemble = print_insn_tic6x;
454 break;
455 #endif
456 #ifdef ARCH_tic80
457 case bfd_arch_tic80:
458 disassemble = print_insn_tic80;
459 break;
460 #endif
461 #ifdef ARCH_ft32
462 case bfd_arch_ft32:
463 disassemble = print_insn_ft32;
464 break;
465 #endif
466 #ifdef ARCH_v850
467 case bfd_arch_v850:
468 case bfd_arch_v850_rh850:
469 disassemble = print_insn_v850;
470 break;
471 #endif
472 #ifdef ARCH_w65
473 case bfd_arch_w65:
474 disassemble = print_insn_w65;
475 break;
476 #endif
477 #ifdef ARCH_xgate
478 case bfd_arch_xgate:
479 disassemble = print_insn_xgate;
480 break;
481 #endif
482 #ifdef ARCH_xstormy16
483 case bfd_arch_xstormy16:
484 disassemble = print_insn_xstormy16;
485 break;
486 #endif
487 #ifdef ARCH_xc16x
488 case bfd_arch_xc16x:
489 disassemble = print_insn_xc16x;
490 break;
491 #endif
492 #ifdef ARCH_xtensa
493 case bfd_arch_xtensa:
494 disassemble = print_insn_xtensa;
495 break;
496 #endif
497 #ifdef ARCH_z80
498 case bfd_arch_z80:
499 disassemble = print_insn_z80;
500 break;
501 #endif
502 #ifdef ARCH_z8k
503 case bfd_arch_z8k:
504 if (bfd_get_mach(abfd) == bfd_mach_z8001)
505 disassemble = print_insn_z8001;
506 else
507 disassemble = print_insn_z8002;
508 break;
509 #endif
510 #ifdef ARCH_vax
511 case bfd_arch_vax:
512 disassemble = print_insn_vax;
513 break;
514 #endif
515 #ifdef ARCH_visium
516 case bfd_arch_visium:
517 disassemble = print_insn_visium;
518 break;
519 #endif
520 #ifdef ARCH_frv
521 case bfd_arch_frv:
522 disassemble = print_insn_frv;
523 break;
524 #endif
525 #ifdef ARCH_moxie
526 case bfd_arch_moxie:
527 disassemble = print_insn_moxie;
528 break;
529 #endif
530 #ifdef ARCH_iq2000
531 case bfd_arch_iq2000:
532 disassemble = print_insn_iq2000;
533 break;
534 #endif
535 #ifdef ARCH_m32c
536 case bfd_arch_m32c:
537 disassemble = print_insn_m32c;
538 break;
539 #endif
540 #ifdef ARCH_tilegx
541 case bfd_arch_tilegx:
542 disassemble = print_insn_tilegx;
543 break;
544 #endif
545 #ifdef ARCH_tilepro
546 case bfd_arch_tilepro:
547 disassemble = print_insn_tilepro;
548 break;
549 #endif
550 default:
551 return 0;
552 }
553 return disassemble;
554 }
555
556 void
557 disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
558 {
559 #ifdef ARCH_aarch64
560 print_aarch64_disassembler_options (stream);
561 #endif
562 #ifdef ARCH_arc
563 print_arc_disassembler_options (stream);
564 #endif
565 #ifdef ARCH_arm
566 print_arm_disassembler_options (stream);
567 #endif
568 #ifdef ARCH_mips
569 print_mips_disassembler_options (stream);
570 #endif
571 #ifdef ARCH_powerpc
572 print_ppc_disassembler_options (stream);
573 #endif
574 #ifdef ARCH_riscv
575 print_riscv_disassembler_options (stream);
576 #endif
577 #ifdef ARCH_i386
578 print_i386_disassembler_options (stream);
579 #endif
580 #ifdef ARCH_s390
581 print_s390_disassembler_options (stream);
582 #endif
583
584 return;
585 }
586
587 void
588 disassemble_init_for_target (struct disassemble_info * info)
589 {
590 if (info == NULL)
591 return;
592
593 switch (info->arch)
594 {
595 #ifdef ARCH_aarch64
596 case bfd_arch_aarch64:
597 info->symbol_is_valid = aarch64_symbol_is_valid;
598 info->disassembler_needs_relocs = TRUE;
599 break;
600 #endif
601 #ifdef ARCH_arm
602 case bfd_arch_arm:
603 info->symbol_is_valid = arm_symbol_is_valid;
604 info->disassembler_needs_relocs = TRUE;
605 break;
606 #endif
607 #ifdef ARCH_ia64
608 case bfd_arch_ia64:
609 info->skip_zeroes = 16;
610 break;
611 #endif
612 #ifdef ARCH_tic4x
613 case bfd_arch_tic4x:
614 info->skip_zeroes = 32;
615 break;
616 #endif
617 #ifdef ARCH_mep
618 case bfd_arch_mep:
619 info->skip_zeroes = 256;
620 info->skip_zeroes_at_end = 0;
621 break;
622 #endif
623 #ifdef ARCH_metag
624 case bfd_arch_metag:
625 info->disassembler_needs_relocs = TRUE;
626 break;
627 #endif
628 #ifdef ARCH_m32c
629 case bfd_arch_m32c:
630 /* This processor in fact is little endian. The value set here
631 reflects the way opcodes are written in the cgen description. */
632 info->endian = BFD_ENDIAN_BIG;
633 if (! info->insn_sets)
634 {
635 info->insn_sets = cgen_bitset_create (ISA_MAX);
636 if (info->mach == bfd_mach_m16c)
637 cgen_bitset_set (info->insn_sets, ISA_M16C);
638 else
639 cgen_bitset_set (info->insn_sets, ISA_M32C);
640 }
641 break;
642 #endif
643 #ifdef ARCH_powerpc
644 case bfd_arch_powerpc:
645 #endif
646 #ifdef ARCH_rs6000
647 case bfd_arch_rs6000:
648 #endif
649 #if defined (ARCH_powerpc) || defined (ARCH_rs6000)
650 disassemble_init_powerpc (info);
651 break;
652 #endif
653 #ifdef ARCH_s390
654 case bfd_arch_s390:
655 disassemble_init_s390 (info);
656 break;
657 #endif
658 default:
659 break;
660 }
661 }
662
663 /* Remove whitespace and consecutive commas from OPTIONS. */
664
665 char *
666 remove_whitespace_and_extra_commas (char *options)
667 {
668 char *str;
669 size_t i, len;
670
671 if (options == NULL)
672 return NULL;
673
674 /* Strip off all trailing whitespace and commas. */
675 for (len = strlen (options); len > 0; len--)
676 {
677 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
678 break;
679 options[len - 1] = '\0';
680 }
681
682 /* Convert all remaining whitespace to commas. */
683 for (i = 0; options[i] != '\0'; i++)
684 if (ISSPACE (options[i]))
685 options[i] = ',';
686
687 /* Remove consecutive commas. */
688 for (str = options; *str != '\0'; str++)
689 if (*str == ',' && (*(str + 1) == ',' || str == options))
690 {
691 char *next = str + 1;
692 while (*next == ',')
693 next++;
694 len = strlen (next);
695 if (str != options)
696 str++;
697 memmove (str, next, len);
698 next[len - (size_t)(next - str)] = '\0';
699 }
700 return (strlen (options) != 0) ? options : NULL;
701 }
702
703 /* Like STRCMP, but treat ',' the same as '\0' so that we match
704 strings like "foobar" against "foobar,xxyyzz,...". */
705
706 int
707 disassembler_options_cmp (const char *s1, const char *s2)
708 {
709 unsigned char c1, c2;
710
711 do
712 {
713 c1 = (unsigned char) *s1++;
714 if (c1 == ',')
715 c1 = '\0';
716 c2 = (unsigned char) *s2++;
717 if (c2 == ',')
718 c2 = '\0';
719 if (c1 == '\0')
720 return c1 - c2;
721 }
722 while (c1 == c2);
723
724 return c1 - c2;
725 }
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