include/
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
1 /* Select disassembly routine for specified architecture.
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
4 Free Software Foundation, Inc.
5
6 This file is part of the GNU opcodes library.
7
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
22
23 #include "sysdep.h"
24 #include "dis-asm.h"
25
26 #ifdef ARCH_all
27 #define ARCH_alpha
28 #define ARCH_arc
29 #define ARCH_arm
30 #define ARCH_avr
31 #define ARCH_bfin
32 #define ARCH_cr16
33 #define ARCH_cris
34 #define ARCH_crx
35 #define ARCH_d10v
36 #define ARCH_d30v
37 #define ARCH_dlx
38 #define ARCH_epiphany
39 #define ARCH_fr30
40 #define ARCH_frv
41 #define ARCH_h8300
42 #define ARCH_h8500
43 #define ARCH_hppa
44 #define ARCH_i370
45 #define ARCH_i386
46 #define ARCH_i860
47 #define ARCH_i960
48 #define ARCH_ia64
49 #define ARCH_ip2k
50 #define ARCH_iq2000
51 #define ARCH_lm32
52 #define ARCH_m32c
53 #define ARCH_m32r
54 #define ARCH_m68hc11
55 #define ARCH_m68hc12
56 #define ARCH_m68k
57 #define ARCH_m88k
58 #define ARCH_mcore
59 #define ARCH_mep
60 #define ARCH_microblaze
61 #define ARCH_mips
62 #define ARCH_mmix
63 #define ARCH_mn10200
64 #define ARCH_mn10300
65 #define ARCH_moxie
66 #define ARCH_mt
67 #define ARCH_msp430
68 #define ARCH_ns32k
69 #define ARCH_openrisc
70 #define ARCH_or32
71 #define ARCH_pdp11
72 #define ARCH_pj
73 #define ARCH_powerpc
74 #define ARCH_rs6000
75 #define ARCH_rl78
76 #define ARCH_rx
77 #define ARCH_s390
78 #define ARCH_score
79 #define ARCH_sh
80 #define ARCH_sparc
81 #define ARCH_spu
82 #define ARCH_tic30
83 #define ARCH_tic4x
84 #define ARCH_tic54x
85 #define ARCH_tic6x
86 #define ARCH_tic80
87 #define ARCH_tilegx
88 #define ARCH_tilepro
89 #define ARCH_v850
90 #define ARCH_vax
91 #define ARCH_w65
92 #define ARCH_xstormy16
93 #define ARCH_xc16x
94 #define ARCH_xtensa
95 #define ARCH_z80
96 #define ARCH_z8k
97 #define INCLUDE_SHMEDIA
98 #endif
99
100 #ifdef ARCH_m32c
101 #include "m32c-desc.h"
102 #endif
103
104 disassembler_ftype
105 disassembler (abfd)
106 bfd *abfd;
107 {
108 enum bfd_architecture a = bfd_get_arch (abfd);
109 disassembler_ftype disassemble;
110
111 switch (a)
112 {
113 /* If you add a case to this table, also add it to the
114 ARCH_all definition right above this function. */
115 #ifdef ARCH_alpha
116 case bfd_arch_alpha:
117 disassemble = print_insn_alpha;
118 break;
119 #endif
120 #ifdef ARCH_arc
121 case bfd_arch_arc:
122 disassemble = arc_get_disassembler (abfd);
123 break;
124 #endif
125 #ifdef ARCH_arm
126 case bfd_arch_arm:
127 if (bfd_big_endian (abfd))
128 disassemble = print_insn_big_arm;
129 else
130 disassemble = print_insn_little_arm;
131 break;
132 #endif
133 #ifdef ARCH_avr
134 case bfd_arch_avr:
135 disassemble = print_insn_avr;
136 break;
137 #endif
138 #ifdef ARCH_bfin
139 case bfd_arch_bfin:
140 disassemble = print_insn_bfin;
141 break;
142 #endif
143 #ifdef ARCH_cr16
144 case bfd_arch_cr16:
145 disassemble = print_insn_cr16;
146 break;
147 #endif
148 #ifdef ARCH_cris
149 case bfd_arch_cris:
150 disassemble = cris_get_disassembler (abfd);
151 break;
152 #endif
153 #ifdef ARCH_crx
154 case bfd_arch_crx:
155 disassemble = print_insn_crx;
156 break;
157 #endif
158 #ifdef ARCH_d10v
159 case bfd_arch_d10v:
160 disassemble = print_insn_d10v;
161 break;
162 #endif
163 #ifdef ARCH_d30v
164 case bfd_arch_d30v:
165 disassemble = print_insn_d30v;
166 break;
167 #endif
168 #ifdef ARCH_dlx
169 case bfd_arch_dlx:
170 /* As far as I know we only handle big-endian DLX objects. */
171 disassemble = print_insn_dlx;
172 break;
173 #endif
174 #ifdef ARCH_h8300
175 case bfd_arch_h8300:
176 if (bfd_get_mach (abfd) == bfd_mach_h8300h
177 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
178 disassemble = print_insn_h8300h;
179 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
180 || bfd_get_mach (abfd) == bfd_mach_h8300sn
181 || bfd_get_mach (abfd) == bfd_mach_h8300sx
182 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
183 disassemble = print_insn_h8300s;
184 else
185 disassemble = print_insn_h8300;
186 break;
187 #endif
188 #ifdef ARCH_h8500
189 case bfd_arch_h8500:
190 disassemble = print_insn_h8500;
191 break;
192 #endif
193 #ifdef ARCH_hppa
194 case bfd_arch_hppa:
195 disassemble = print_insn_hppa;
196 break;
197 #endif
198 #ifdef ARCH_i370
199 case bfd_arch_i370:
200 disassemble = print_insn_i370;
201 break;
202 #endif
203 #ifdef ARCH_i386
204 case bfd_arch_i386:
205 case bfd_arch_l1om:
206 case bfd_arch_k1om:
207 disassemble = print_insn_i386;
208 break;
209 #endif
210 #ifdef ARCH_i860
211 case bfd_arch_i860:
212 disassemble = print_insn_i860;
213 break;
214 #endif
215 #ifdef ARCH_i960
216 case bfd_arch_i960:
217 disassemble = print_insn_i960;
218 break;
219 #endif
220 #ifdef ARCH_ia64
221 case bfd_arch_ia64:
222 disassemble = print_insn_ia64;
223 break;
224 #endif
225 #ifdef ARCH_ip2k
226 case bfd_arch_ip2k:
227 disassemble = print_insn_ip2k;
228 break;
229 #endif
230 #ifdef ARCH_epiphany
231 case bfd_arch_epiphany:
232 disassemble = print_insn_epiphany;
233 break;
234 #endif
235 #ifdef ARCH_fr30
236 case bfd_arch_fr30:
237 disassemble = print_insn_fr30;
238 break;
239 #endif
240 #ifdef ARCH_lm32
241 case bfd_arch_lm32:
242 disassemble = print_insn_lm32;
243 break;
244 #endif
245 #ifdef ARCH_m32r
246 case bfd_arch_m32r:
247 disassemble = print_insn_m32r;
248 break;
249 #endif
250 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
251 case bfd_arch_m68hc11:
252 disassemble = print_insn_m68hc11;
253 break;
254 case bfd_arch_m68hc12:
255 disassemble = print_insn_m68hc12;
256 break;
257 #endif
258 #ifdef ARCH_m68k
259 case bfd_arch_m68k:
260 disassemble = print_insn_m68k;
261 break;
262 #endif
263 #ifdef ARCH_m88k
264 case bfd_arch_m88k:
265 disassemble = print_insn_m88k;
266 break;
267 #endif
268 #ifdef ARCH_mt
269 case bfd_arch_mt:
270 disassemble = print_insn_mt;
271 break;
272 #endif
273 #ifdef ARCH_microblaze
274 case bfd_arch_microblaze:
275 disassemble = print_insn_microblaze;
276 break;
277 #endif
278 #ifdef ARCH_msp430
279 case bfd_arch_msp430:
280 disassemble = print_insn_msp430;
281 break;
282 #endif
283 #ifdef ARCH_ns32k
284 case bfd_arch_ns32k:
285 disassemble = print_insn_ns32k;
286 break;
287 #endif
288 #ifdef ARCH_mcore
289 case bfd_arch_mcore:
290 disassemble = print_insn_mcore;
291 break;
292 #endif
293 #ifdef ARCH_mep
294 case bfd_arch_mep:
295 disassemble = print_insn_mep;
296 break;
297 #endif
298 #ifdef ARCH_mips
299 case bfd_arch_mips:
300 if (bfd_big_endian (abfd))
301 disassemble = print_insn_big_mips;
302 else
303 disassemble = print_insn_little_mips;
304 break;
305 #endif
306 #ifdef ARCH_mmix
307 case bfd_arch_mmix:
308 disassemble = print_insn_mmix;
309 break;
310 #endif
311 #ifdef ARCH_mn10200
312 case bfd_arch_mn10200:
313 disassemble = print_insn_mn10200;
314 break;
315 #endif
316 #ifdef ARCH_mn10300
317 case bfd_arch_mn10300:
318 disassemble = print_insn_mn10300;
319 break;
320 #endif
321 #ifdef ARCH_openrisc
322 case bfd_arch_openrisc:
323 disassemble = print_insn_openrisc;
324 break;
325 #endif
326 #ifdef ARCH_or32
327 case bfd_arch_or32:
328 if (bfd_big_endian (abfd))
329 disassemble = print_insn_big_or32;
330 else
331 disassemble = print_insn_little_or32;
332 break;
333 #endif
334 #ifdef ARCH_pdp11
335 case bfd_arch_pdp11:
336 disassemble = print_insn_pdp11;
337 break;
338 #endif
339 #ifdef ARCH_pj
340 case bfd_arch_pj:
341 disassemble = print_insn_pj;
342 break;
343 #endif
344 #ifdef ARCH_powerpc
345 case bfd_arch_powerpc:
346 if (bfd_big_endian (abfd))
347 disassemble = print_insn_big_powerpc;
348 else
349 disassemble = print_insn_little_powerpc;
350 break;
351 #endif
352 #ifdef ARCH_rs6000
353 case bfd_arch_rs6000:
354 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
355 disassemble = print_insn_big_powerpc;
356 else
357 disassemble = print_insn_rs6000;
358 break;
359 #endif
360 #ifdef ARCH_rl78
361 case bfd_arch_rl78:
362 disassemble = print_insn_rl78;
363 break;
364 #endif
365 #ifdef ARCH_rx
366 case bfd_arch_rx:
367 disassemble = print_insn_rx;
368 break;
369 #endif
370 #ifdef ARCH_s390
371 case bfd_arch_s390:
372 disassemble = print_insn_s390;
373 break;
374 #endif
375 #ifdef ARCH_score
376 case bfd_arch_score:
377 if (bfd_big_endian (abfd))
378 disassemble = print_insn_big_score;
379 else
380 disassemble = print_insn_little_score;
381 break;
382 #endif
383 #ifdef ARCH_sh
384 case bfd_arch_sh:
385 disassemble = print_insn_sh;
386 break;
387 #endif
388 #ifdef ARCH_sparc
389 case bfd_arch_sparc:
390 disassemble = print_insn_sparc;
391 break;
392 #endif
393 #ifdef ARCH_spu
394 case bfd_arch_spu:
395 disassemble = print_insn_spu;
396 break;
397 #endif
398 #ifdef ARCH_tic30
399 case bfd_arch_tic30:
400 disassemble = print_insn_tic30;
401 break;
402 #endif
403 #ifdef ARCH_tic4x
404 case bfd_arch_tic4x:
405 disassemble = print_insn_tic4x;
406 break;
407 #endif
408 #ifdef ARCH_tic54x
409 case bfd_arch_tic54x:
410 disassemble = print_insn_tic54x;
411 break;
412 #endif
413 #ifdef ARCH_tic6x
414 case bfd_arch_tic6x:
415 disassemble = print_insn_tic6x;
416 break;
417 #endif
418 #ifdef ARCH_tic80
419 case bfd_arch_tic80:
420 disassemble = print_insn_tic80;
421 break;
422 #endif
423 #ifdef ARCH_v850
424 case bfd_arch_v850:
425 disassemble = print_insn_v850;
426 break;
427 #endif
428 #ifdef ARCH_w65
429 case bfd_arch_w65:
430 disassemble = print_insn_w65;
431 break;
432 #endif
433 #ifdef ARCH_xstormy16
434 case bfd_arch_xstormy16:
435 disassemble = print_insn_xstormy16;
436 break;
437 #endif
438 #ifdef ARCH_xc16x
439 case bfd_arch_xc16x:
440 disassemble = print_insn_xc16x;
441 break;
442 #endif
443 #ifdef ARCH_xtensa
444 case bfd_arch_xtensa:
445 disassemble = print_insn_xtensa;
446 break;
447 #endif
448 #ifdef ARCH_z80
449 case bfd_arch_z80:
450 disassemble = print_insn_z80;
451 break;
452 #endif
453 #ifdef ARCH_z8k
454 case bfd_arch_z8k:
455 if (bfd_get_mach(abfd) == bfd_mach_z8001)
456 disassemble = print_insn_z8001;
457 else
458 disassemble = print_insn_z8002;
459 break;
460 #endif
461 #ifdef ARCH_vax
462 case bfd_arch_vax:
463 disassemble = print_insn_vax;
464 break;
465 #endif
466 #ifdef ARCH_frv
467 case bfd_arch_frv:
468 disassemble = print_insn_frv;
469 break;
470 #endif
471 #ifdef ARCH_moxie
472 case bfd_arch_moxie:
473 disassemble = print_insn_moxie;
474 break;
475 #endif
476 #ifdef ARCH_iq2000
477 case bfd_arch_iq2000:
478 disassemble = print_insn_iq2000;
479 break;
480 #endif
481 #ifdef ARCH_m32c
482 case bfd_arch_m32c:
483 disassemble = print_insn_m32c;
484 break;
485 #endif
486 #ifdef ARCH_tilegx
487 case bfd_arch_tilegx:
488 disassemble = print_insn_tilegx;
489 break;
490 #endif
491 #ifdef ARCH_tilepro
492 case bfd_arch_tilepro:
493 disassemble = print_insn_tilepro;
494 break;
495 #endif
496 default:
497 return 0;
498 }
499 return disassemble;
500 }
501
502 void
503 disassembler_usage (stream)
504 FILE * stream ATTRIBUTE_UNUSED;
505 {
506 #ifdef ARCH_arm
507 print_arm_disassembler_options (stream);
508 #endif
509 #ifdef ARCH_mips
510 print_mips_disassembler_options (stream);
511 #endif
512 #ifdef ARCH_powerpc
513 print_ppc_disassembler_options (stream);
514 #endif
515 #ifdef ARCH_i386
516 print_i386_disassembler_options (stream);
517 #endif
518 #ifdef ARCH_s390
519 print_s390_disassembler_options (stream);
520 #endif
521
522 return;
523 }
524
525 void
526 disassemble_init_for_target (struct disassemble_info * info)
527 {
528 if (info == NULL)
529 return;
530
531 switch (info->arch)
532 {
533 #ifdef ARCH_arm
534 case bfd_arch_arm:
535 info->symbol_is_valid = arm_symbol_is_valid;
536 info->disassembler_needs_relocs = TRUE;
537 break;
538 #endif
539 #ifdef ARCH_ia64
540 case bfd_arch_ia64:
541 info->skip_zeroes = 16;
542 break;
543 #endif
544 #ifdef ARCH_tic4x
545 case bfd_arch_tic4x:
546 info->skip_zeroes = 32;
547 break;
548 #endif
549 #ifdef ARCH_mep
550 case bfd_arch_mep:
551 info->skip_zeroes = 256;
552 info->skip_zeroes_at_end = 0;
553 break;
554 #endif
555 #ifdef ARCH_m32c
556 case bfd_arch_m32c:
557 /* This processor in fact is little endian. The value set here
558 reflects the way opcodes are written in the cgen description. */
559 info->endian = BFD_ENDIAN_BIG;
560 if (! info->insn_sets)
561 {
562 info->insn_sets = cgen_bitset_create (ISA_MAX);
563 if (info->mach == bfd_mach_m16c)
564 cgen_bitset_set (info->insn_sets, ISA_M16C);
565 else
566 cgen_bitset_set (info->insn_sets, ISA_M32C);
567 }
568 break;
569 #endif
570 #ifdef ARCH_powerpc
571 case bfd_arch_powerpc:
572 #endif
573 #ifdef ARCH_rs6000
574 case bfd_arch_rs6000:
575 #endif
576 #if defined (ARCH_powerpc) || defined (ARCH_rs6000)
577 disassemble_init_powerpc (info);
578 break;
579 #endif
580 default:
581 break;
582 }
583 }
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