1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction building/extraction support for epiphany. -*- C -*-
4 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
5 - the resultant file is machine generated, cgen-ibld.in isn't
7 Copyright (C) 1996-2017 Free Software Foundation, Inc.
9 This file is part of libopcodes.
11 This library is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
34 #include "epiphany-desc.h"
35 #include "epiphany-opc.h"
36 #include "cgen/basic-modes.h"
38 #include "safe-ctype.h"
41 #define min(a,b) ((a) < (b) ? (a) : (b))
43 #define max(a,b) ((a) > (b) ? (a) : (b))
45 /* Used by the ifield rtx function. */
46 #define FLD(f) (fields->f)
48 static const char * insert_normal
49 (CGEN_CPU_DESC
, long, unsigned int, unsigned int, unsigned int,
50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR
);
51 static const char * insert_insn_normal
52 (CGEN_CPU_DESC
, const CGEN_INSN
*,
53 CGEN_FIELDS
*, CGEN_INSN_BYTES_PTR
, bfd_vma
);
54 static int extract_normal
55 (CGEN_CPU_DESC
, CGEN_EXTRACT_INFO
*, CGEN_INSN_INT
,
56 unsigned int, unsigned int, unsigned int, unsigned int,
57 unsigned int, unsigned int, bfd_vma
, long *);
58 static int extract_insn_normal
59 (CGEN_CPU_DESC
, const CGEN_INSN
*, CGEN_EXTRACT_INFO
*,
60 CGEN_INSN_INT
, CGEN_FIELDS
*, bfd_vma
);
62 static void put_insn_int_value
63 (CGEN_CPU_DESC
, CGEN_INSN_BYTES_PTR
, int, int, CGEN_INSN_INT
);
66 static CGEN_INLINE
void insert_1
67 (CGEN_CPU_DESC
, unsigned long, int, int, int, unsigned char *);
68 static CGEN_INLINE
int fill_cache
69 (CGEN_CPU_DESC
, CGEN_EXTRACT_INFO
*, int, int, bfd_vma
);
70 static CGEN_INLINE
long extract_1
71 (CGEN_CPU_DESC
, CGEN_EXTRACT_INFO
*, int, int, int, unsigned char *, bfd_vma
);
74 /* Operand insertion. */
78 /* Subroutine of insert_normal. */
80 static CGEN_INLINE
void
81 insert_1 (CGEN_CPU_DESC cd
,
91 x
= cgen_get_insn_value (cd
, bufp
, word_length
);
93 /* Written this way to avoid undefined behaviour. */
94 mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
96 shift
= (start
+ 1) - length
;
98 shift
= (word_length
- (start
+ length
));
99 x
= (x
& ~(mask
<< shift
)) | ((value
& mask
) << shift
);
101 cgen_put_insn_value (cd
, bufp
, word_length
, (bfd_vma
) x
);
104 #endif /* ! CGEN_INT_INSN_P */
106 /* Default insertion routine.
108 ATTRS is a mask of the boolean attributes.
109 WORD_OFFSET is the offset in bits from the start of the insn of the value.
110 WORD_LENGTH is the length of the word in bits in which the value resides.
111 START is the starting bit number in the word, architecture origin.
112 LENGTH is the length of VALUE in bits.
113 TOTAL_LENGTH is the total length of the insn in bits.
115 The result is an error message or NULL if success. */
117 /* ??? This duplicates functionality with bfd's howto table and
118 bfd_install_relocation. */
119 /* ??? This doesn't handle bfd_vma's. Create another function when
123 insert_normal (CGEN_CPU_DESC cd
,
126 unsigned int word_offset
,
129 unsigned int word_length
,
130 unsigned int total_length
,
131 CGEN_INSN_BYTES_PTR buffer
)
133 static char errbuf
[100];
134 /* Written this way to avoid undefined behaviour. */
135 unsigned long mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
137 /* If LENGTH is zero, this operand doesn't contribute to the value. */
141 if (word_length
> 8 * sizeof (CGEN_INSN_INT
))
144 /* For architectures with insns smaller than the base-insn-bitsize,
145 word_length may be too big. */
146 if (cd
->min_insn_bitsize
< cd
->base_insn_bitsize
)
149 && word_length
> total_length
)
150 word_length
= total_length
;
153 /* Ensure VALUE will fit. */
154 if (CGEN_BOOL_ATTR (attrs
, CGEN_IFLD_SIGN_OPT
))
156 long minval
= - (1L << (length
- 1));
157 unsigned long maxval
= mask
;
159 if ((value
> 0 && (unsigned long) value
> maxval
)
162 /* xgettext:c-format */
164 _("operand out of range (%ld not between %ld and %lu)"),
165 value
, minval
, maxval
);
169 else if (! CGEN_BOOL_ATTR (attrs
, CGEN_IFLD_SIGNED
))
171 unsigned long maxval
= mask
;
172 unsigned long val
= (unsigned long) value
;
174 /* For hosts with a word size > 32 check to see if value has been sign
175 extended beyond 32 bits. If so then ignore these higher sign bits
176 as the user is attempting to store a 32-bit signed value into an
177 unsigned 32-bit field which is allowed. */
178 if (sizeof (unsigned long) > 4 && ((value
>> 32) == -1))
183 /* xgettext:c-format */
185 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
192 if (! cgen_signed_overflow_ok_p (cd
))
194 long minval
= - (1L << (length
- 1));
195 long maxval
= (1L << (length
- 1)) - 1;
197 if (value
< minval
|| value
> maxval
)
200 /* xgettext:c-format */
201 (errbuf
, _("operand out of range (%ld not between %ld and %ld)"),
202 value
, minval
, maxval
);
211 int shift_within_word
, shift_to_word
, shift
;
213 /* How to shift the value to BIT0 of the word. */
214 shift_to_word
= total_length
- (word_offset
+ word_length
);
216 /* How to shift the value to the field within the word. */
217 if (CGEN_INSN_LSB0_P
)
218 shift_within_word
= start
+ 1 - length
;
220 shift_within_word
= word_length
- start
- length
;
222 /* The total SHIFT, then mask in the value. */
223 shift
= shift_to_word
+ shift_within_word
;
224 *buffer
= (*buffer
& ~(mask
<< shift
)) | ((value
& mask
) << shift
);
227 #else /* ! CGEN_INT_INSN_P */
230 unsigned char *bufp
= (unsigned char *) buffer
+ word_offset
/ 8;
232 insert_1 (cd
, value
, start
, length
, word_length
, bufp
);
235 #endif /* ! CGEN_INT_INSN_P */
240 /* Default insn builder (insert handler).
241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
243 recorded in host byte order, otherwise BUFFER is an array of bytes
244 and the value is recorded in target byte order).
245 The result is an error message or NULL if success. */
248 insert_insn_normal (CGEN_CPU_DESC cd
,
249 const CGEN_INSN
* insn
,
250 CGEN_FIELDS
* fields
,
251 CGEN_INSN_BYTES_PTR buffer
,
254 const CGEN_SYNTAX
*syntax
= CGEN_INSN_SYNTAX (insn
);
256 const CGEN_SYNTAX_CHAR_TYPE
* syn
;
258 CGEN_INIT_INSERT (cd
);
259 value
= CGEN_INSN_BASE_VALUE (insn
);
261 /* If we're recording insns as numbers (rather than a string of bytes),
262 target byte order handling is deferred until later. */
266 put_insn_int_value (cd
, buffer
, cd
->base_insn_bitsize
,
267 CGEN_FIELDS_BITSIZE (fields
), value
);
271 cgen_put_insn_value (cd
, buffer
, min ((unsigned) cd
->base_insn_bitsize
,
272 (unsigned) CGEN_FIELDS_BITSIZE (fields
)),
275 #endif /* ! CGEN_INT_INSN_P */
277 /* ??? It would be better to scan the format's fields.
278 Still need to be able to insert a value based on the operand though;
279 e.g. storing a branch displacement that got resolved later.
280 Needs more thought first. */
282 for (syn
= CGEN_SYNTAX_STRING (syntax
); * syn
; ++ syn
)
286 if (CGEN_SYNTAX_CHAR_P (* syn
))
289 errmsg
= (* cd
->insert_operand
) (cd
, CGEN_SYNTAX_FIELD (*syn
),
299 /* Cover function to store an insn value into an integral insn. Must go here
300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
304 CGEN_INSN_BYTES_PTR buf
,
309 /* For architectures with insns smaller than the base-insn-bitsize,
310 length may be too big. */
311 if (length
> insn_length
)
315 int shift
= insn_length
- length
;
316 /* Written this way to avoid undefined behaviour. */
317 CGEN_INSN_INT mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
319 *buf
= (*buf
& ~(mask
<< shift
)) | ((value
& mask
) << shift
);
324 /* Operand extraction. */
326 #if ! CGEN_INT_INSN_P
328 /* Subroutine of extract_normal.
329 Ensure sufficient bytes are cached in EX_INFO.
330 OFFSET is the offset in bytes from the start of the insn of the value.
331 BYTES is the length of the needed value.
332 Returns 1 for success, 0 for failure. */
334 static CGEN_INLINE
int
335 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
336 CGEN_EXTRACT_INFO
*ex_info
,
341 /* It's doubtful that the middle part has already been fetched so
342 we don't optimize that case. kiss. */
344 disassemble_info
*info
= (disassemble_info
*) ex_info
->dis_info
;
346 /* First do a quick check. */
347 mask
= (1 << bytes
) - 1;
348 if (((ex_info
->valid
>> offset
) & mask
) == mask
)
351 /* Search for the first byte we need to read. */
352 for (mask
= 1 << offset
; bytes
> 0; --bytes
, ++offset
, mask
<<= 1)
353 if (! (mask
& ex_info
->valid
))
361 status
= (*info
->read_memory_func
)
362 (pc
, ex_info
->insn_bytes
+ offset
, bytes
, info
);
366 (*info
->memory_error_func
) (status
, pc
, info
);
370 ex_info
->valid
|= ((1 << bytes
) - 1) << offset
;
376 /* Subroutine of extract_normal. */
378 static CGEN_INLINE
long
379 extract_1 (CGEN_CPU_DESC cd
,
380 CGEN_EXTRACT_INFO
*ex_info ATTRIBUTE_UNUSED
,
385 bfd_vma pc ATTRIBUTE_UNUSED
)
390 x
= cgen_get_insn_value (cd
, bufp
, word_length
);
392 if (CGEN_INSN_LSB0_P
)
393 shift
= (start
+ 1) - length
;
395 shift
= (word_length
- (start
+ length
));
399 #endif /* ! CGEN_INT_INSN_P */
401 /* Default extraction routine.
403 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
404 or sometimes less for cases like the m32r where the base insn size is 32
405 but some insns are 16 bits.
406 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
407 but for generality we take a bitmask of all of them.
408 WORD_OFFSET is the offset in bits from the start of the insn of the value.
409 WORD_LENGTH is the length of the word in bits in which the value resides.
410 START is the starting bit number in the word, architecture origin.
411 LENGTH is the length of VALUE in bits.
412 TOTAL_LENGTH is the total length of the insn in bits.
414 Returns 1 for success, 0 for failure. */
416 /* ??? The return code isn't properly used. wip. */
418 /* ??? This doesn't handle bfd_vma's. Create another function when
422 extract_normal (CGEN_CPU_DESC cd
,
423 #if ! CGEN_INT_INSN_P
424 CGEN_EXTRACT_INFO
*ex_info
,
426 CGEN_EXTRACT_INFO
*ex_info ATTRIBUTE_UNUSED
,
428 CGEN_INSN_INT insn_value
,
430 unsigned int word_offset
,
433 unsigned int word_length
,
434 unsigned int total_length
,
435 #if ! CGEN_INT_INSN_P
438 bfd_vma pc ATTRIBUTE_UNUSED
,
444 /* If LENGTH is zero, this operand doesn't contribute to the value
445 so give it a standard value of zero. */
452 if (word_length
> 8 * sizeof (CGEN_INSN_INT
))
455 /* For architectures with insns smaller than the insn-base-bitsize,
456 word_length may be too big. */
457 if (cd
->min_insn_bitsize
< cd
->base_insn_bitsize
)
459 if (word_offset
+ word_length
> total_length
)
460 word_length
= total_length
- word_offset
;
463 /* Does the value reside in INSN_VALUE, and at the right alignment? */
465 if (CGEN_INT_INSN_P
|| (word_offset
== 0 && word_length
== total_length
))
467 if (CGEN_INSN_LSB0_P
)
468 value
= insn_value
>> ((word_offset
+ start
+ 1) - length
);
470 value
= insn_value
>> (total_length
- ( word_offset
+ start
+ length
));
473 #if ! CGEN_INT_INSN_P
477 unsigned char *bufp
= ex_info
->insn_bytes
+ word_offset
/ 8;
479 if (word_length
> 8 * sizeof (CGEN_INSN_INT
))
482 if (fill_cache (cd
, ex_info
, word_offset
/ 8, word_length
/ 8, pc
) == 0)
485 value
= extract_1 (cd
, ex_info
, start
, length
, word_length
, bufp
, pc
);
488 #endif /* ! CGEN_INT_INSN_P */
490 /* Written this way to avoid undefined behaviour. */
491 mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
495 if (CGEN_BOOL_ATTR (attrs
, CGEN_IFLD_SIGNED
)
496 && (value
& (1L << (length
- 1))))
504 /* Default insn extractor.
506 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
507 The extracted fields are stored in FIELDS.
508 EX_INFO is used to handle reading variable length insns.
509 Return the length of the insn in bits, or 0 if no match,
510 or -1 if an error occurs fetching data (memory_error_func will have
514 extract_insn_normal (CGEN_CPU_DESC cd
,
515 const CGEN_INSN
*insn
,
516 CGEN_EXTRACT_INFO
*ex_info
,
517 CGEN_INSN_INT insn_value
,
521 const CGEN_SYNTAX
*syntax
= CGEN_INSN_SYNTAX (insn
);
522 const CGEN_SYNTAX_CHAR_TYPE
*syn
;
524 CGEN_FIELDS_BITSIZE (fields
) = CGEN_INSN_BITSIZE (insn
);
526 CGEN_INIT_EXTRACT (cd
);
528 for (syn
= CGEN_SYNTAX_STRING (syntax
); *syn
; ++syn
)
532 if (CGEN_SYNTAX_CHAR_P (*syn
))
535 length
= (* cd
->extract_operand
) (cd
, CGEN_SYNTAX_FIELD (*syn
),
536 ex_info
, insn_value
, fields
, pc
);
541 /* We recognized and successfully extracted this insn. */
542 return CGEN_INSN_BITSIZE (insn
);
545 /* Machine generated code added here. */
547 const char * epiphany_cgen_insert_operand
548 (CGEN_CPU_DESC
, int, CGEN_FIELDS
*, CGEN_INSN_BYTES_PTR
, bfd_vma
);
550 /* Main entry point for operand insertion.
552 This function is basically just a big switch statement. Earlier versions
553 used tables to look up the function to use, but
554 - if the table contains both assembler and disassembler functions then
555 the disassembler contains much of the assembler and vice-versa,
556 - there's a lot of inlining possibilities as things grow,
557 - using a switch statement avoids the function call overhead.
559 This function could be moved into `parse_insn_normal', but keeping it
560 separate makes clear the interface between `parse_insn_normal' and each of
561 the handlers. It's also needed by GAS to insert operands that couldn't be
562 resolved during parsing. */
565 epiphany_cgen_insert_operand (CGEN_CPU_DESC cd
,
567 CGEN_FIELDS
* fields
,
568 CGEN_INSN_BYTES_PTR buffer
,
569 bfd_vma pc ATTRIBUTE_UNUSED
)
571 const char * errmsg
= NULL
;
572 unsigned int total_length
= CGEN_FIELDS_BITSIZE (fields
);
576 case EPIPHANY_OPERAND_DIRECTION
:
577 errmsg
= insert_normal (cd
, fields
->f_addsubx
, 0, 0, 20, 1, 32, total_length
, buffer
);
579 case EPIPHANY_OPERAND_DISP11
:
582 FLD (f_disp8
) = ((((UINT
) (FLD (f_disp11
)) >> (3))) & (255));
583 FLD (f_disp3
) = ((FLD (f_disp11
)) & (7));
585 errmsg
= insert_normal (cd
, fields
->f_disp3
, 0, 0, 9, 3, 32, total_length
, buffer
);
588 errmsg
= insert_normal (cd
, fields
->f_disp8
, 0, 0, 23, 8, 32, total_length
, buffer
);
593 case EPIPHANY_OPERAND_DISP3
:
594 errmsg
= insert_normal (cd
, fields
->f_disp3
, 0, 0, 9, 3, 32, total_length
, buffer
);
596 case EPIPHANY_OPERAND_DPMI
:
597 errmsg
= insert_normal (cd
, fields
->f_subd
, 0, 0, 24, 1, 32, total_length
, buffer
);
599 case EPIPHANY_OPERAND_FRD
:
600 errmsg
= insert_normal (cd
, fields
->f_rd
, 0, 0, 15, 3, 32, total_length
, buffer
);
602 case EPIPHANY_OPERAND_FRD6
:
605 FLD (f_rd
) = ((FLD (f_rd6
)) & (7));
606 FLD (f_rd_x
) = ((UINT
) (FLD (f_rd6
)) >> (3));
608 errmsg
= insert_normal (cd
, fields
->f_rd_x
, 0, 0, 31, 3, 32, total_length
, buffer
);
611 errmsg
= insert_normal (cd
, fields
->f_rd
, 0, 0, 15, 3, 32, total_length
, buffer
);
616 case EPIPHANY_OPERAND_FRM
:
617 errmsg
= insert_normal (cd
, fields
->f_rm
, 0, 0, 9, 3, 32, total_length
, buffer
);
619 case EPIPHANY_OPERAND_FRM6
:
622 FLD (f_rm
) = ((FLD (f_rm6
)) & (7));
623 FLD (f_rm_x
) = ((UINT
) (FLD (f_rm6
)) >> (3));
625 errmsg
= insert_normal (cd
, fields
->f_rm_x
, 0, 0, 25, 3, 32, total_length
, buffer
);
628 errmsg
= insert_normal (cd
, fields
->f_rm
, 0, 0, 9, 3, 32, total_length
, buffer
);
633 case EPIPHANY_OPERAND_FRN
:
634 errmsg
= insert_normal (cd
, fields
->f_rn
, 0, 0, 12, 3, 32, total_length
, buffer
);
636 case EPIPHANY_OPERAND_FRN6
:
639 FLD (f_rn
) = ((FLD (f_rn6
)) & (7));
640 FLD (f_rn_x
) = ((UINT
) (FLD (f_rn6
)) >> (3));
642 errmsg
= insert_normal (cd
, fields
->f_rn_x
, 0, 0, 28, 3, 32, total_length
, buffer
);
645 errmsg
= insert_normal (cd
, fields
->f_rn
, 0, 0, 12, 3, 32, total_length
, buffer
);
650 case EPIPHANY_OPERAND_IMM16
:
653 FLD (f_imm8
) = ((FLD (f_imm16
)) & (255));
654 FLD (f_imm_27_8
) = ((UINT
) (FLD (f_imm16
)) >> (8));
656 errmsg
= insert_normal (cd
, fields
->f_imm8
, 0, 0, 12, 8, 32, total_length
, buffer
);
659 errmsg
= insert_normal (cd
, fields
->f_imm_27_8
, 0, 0, 27, 8, 32, total_length
, buffer
);
664 case EPIPHANY_OPERAND_IMM8
:
665 errmsg
= insert_normal (cd
, fields
->f_imm8
, 0, 0, 12, 8, 32, total_length
, buffer
);
667 case EPIPHANY_OPERAND_RD
:
668 errmsg
= insert_normal (cd
, fields
->f_rd
, 0, 0, 15, 3, 32, total_length
, buffer
);
670 case EPIPHANY_OPERAND_RD6
:
673 FLD (f_rd
) = ((FLD (f_rd6
)) & (7));
674 FLD (f_rd_x
) = ((UINT
) (FLD (f_rd6
)) >> (3));
676 errmsg
= insert_normal (cd
, fields
->f_rd_x
, 0, 0, 31, 3, 32, total_length
, buffer
);
679 errmsg
= insert_normal (cd
, fields
->f_rd
, 0, 0, 15, 3, 32, total_length
, buffer
);
684 case EPIPHANY_OPERAND_RM
:
685 errmsg
= insert_normal (cd
, fields
->f_rm
, 0, 0, 9, 3, 32, total_length
, buffer
);
687 case EPIPHANY_OPERAND_RM6
:
690 FLD (f_rm
) = ((FLD (f_rm6
)) & (7));
691 FLD (f_rm_x
) = ((UINT
) (FLD (f_rm6
)) >> (3));
693 errmsg
= insert_normal (cd
, fields
->f_rm_x
, 0, 0, 25, 3, 32, total_length
, buffer
);
696 errmsg
= insert_normal (cd
, fields
->f_rm
, 0, 0, 9, 3, 32, total_length
, buffer
);
701 case EPIPHANY_OPERAND_RN
:
702 errmsg
= insert_normal (cd
, fields
->f_rn
, 0, 0, 12, 3, 32, total_length
, buffer
);
704 case EPIPHANY_OPERAND_RN6
:
707 FLD (f_rn
) = ((FLD (f_rn6
)) & (7));
708 FLD (f_rn_x
) = ((UINT
) (FLD (f_rn6
)) >> (3));
710 errmsg
= insert_normal (cd
, fields
->f_rn_x
, 0, 0, 28, 3, 32, total_length
, buffer
);
713 errmsg
= insert_normal (cd
, fields
->f_rn
, 0, 0, 12, 3, 32, total_length
, buffer
);
718 case EPIPHANY_OPERAND_SD
:
719 errmsg
= insert_normal (cd
, fields
->f_sd
, 0, 0, 15, 3, 32, total_length
, buffer
);
721 case EPIPHANY_OPERAND_SD6
:
724 FLD (f_sd
) = ((FLD (f_sd6
)) & (7));
725 FLD (f_sd_x
) = ((UINT
) (FLD (f_sd6
)) >> (3));
727 errmsg
= insert_normal (cd
, fields
->f_sd_x
, 0, 0, 31, 3, 32, total_length
, buffer
);
730 errmsg
= insert_normal (cd
, fields
->f_sd
, 0, 0, 15, 3, 32, total_length
, buffer
);
735 case EPIPHANY_OPERAND_SDDMA
:
738 FLD (f_sd
) = ((FLD (f_sd6
)) & (7));
739 FLD (f_sd_x
) = ((UINT
) (FLD (f_sd6
)) >> (3));
741 errmsg
= insert_normal (cd
, fields
->f_sd_x
, 0, 0, 31, 3, 32, total_length
, buffer
);
744 errmsg
= insert_normal (cd
, fields
->f_sd
, 0, 0, 15, 3, 32, total_length
, buffer
);
749 case EPIPHANY_OPERAND_SDMEM
:
752 FLD (f_sd
) = ((FLD (f_sd6
)) & (7));
753 FLD (f_sd_x
) = ((UINT
) (FLD (f_sd6
)) >> (3));
755 errmsg
= insert_normal (cd
, fields
->f_sd_x
, 0, 0, 31, 3, 32, total_length
, buffer
);
758 errmsg
= insert_normal (cd
, fields
->f_sd
, 0, 0, 15, 3, 32, total_length
, buffer
);
763 case EPIPHANY_OPERAND_SDMESH
:
766 FLD (f_sd
) = ((FLD (f_sd6
)) & (7));
767 FLD (f_sd_x
) = ((UINT
) (FLD (f_sd6
)) >> (3));
769 errmsg
= insert_normal (cd
, fields
->f_sd_x
, 0, 0, 31, 3, 32, total_length
, buffer
);
772 errmsg
= insert_normal (cd
, fields
->f_sd
, 0, 0, 15, 3, 32, total_length
, buffer
);
777 case EPIPHANY_OPERAND_SHIFT
:
778 errmsg
= insert_normal (cd
, fields
->f_shift
, 0, 0, 9, 5, 32, total_length
, buffer
);
780 case EPIPHANY_OPERAND_SIMM11
:
783 FLD (f_disp8
) = ((255) & (((USI
) (FLD (f_sdisp11
)) >> (3))));
784 FLD (f_disp3
) = ((FLD (f_sdisp11
)) & (7));
786 errmsg
= insert_normal (cd
, fields
->f_disp3
, 0, 0, 9, 3, 32, total_length
, buffer
);
789 errmsg
= insert_normal (cd
, fields
->f_disp8
, 0, 0, 23, 8, 32, total_length
, buffer
);
794 case EPIPHANY_OPERAND_SIMM24
:
796 long value
= fields
->f_simm24
;
797 value
= ((SI
) (((value
) - (pc
))) >> (1));
798 errmsg
= insert_normal (cd
, value
, 0|(1<<CGEN_IFLD_SIGNED
)|(1<<CGEN_IFLD_RELOC
)|(1<<CGEN_IFLD_PCREL_ADDR
), 0, 31, 24, 32, total_length
, buffer
);
801 case EPIPHANY_OPERAND_SIMM3
:
802 errmsg
= insert_normal (cd
, fields
->f_sdisp3
, 0|(1<<CGEN_IFLD_SIGNED
), 0, 9, 3, 32, total_length
, buffer
);
804 case EPIPHANY_OPERAND_SIMM8
:
806 long value
= fields
->f_simm8
;
807 value
= ((SI
) (((value
) - (pc
))) >> (1));
808 errmsg
= insert_normal (cd
, value
, 0|(1<<CGEN_IFLD_SIGNED
)|(1<<CGEN_IFLD_RELOC
)|(1<<CGEN_IFLD_PCREL_ADDR
), 0, 15, 8, 32, total_length
, buffer
);
811 case EPIPHANY_OPERAND_SN
:
812 errmsg
= insert_normal (cd
, fields
->f_sn
, 0, 0, 12, 3, 32, total_length
, buffer
);
814 case EPIPHANY_OPERAND_SN6
:
817 FLD (f_sn
) = ((FLD (f_sn6
)) & (7));
818 FLD (f_sn_x
) = ((UINT
) (FLD (f_sn6
)) >> (3));
820 errmsg
= insert_normal (cd
, fields
->f_sn_x
, 0, 0, 28, 3, 32, total_length
, buffer
);
823 errmsg
= insert_normal (cd
, fields
->f_sn
, 0, 0, 12, 3, 32, total_length
, buffer
);
828 case EPIPHANY_OPERAND_SNDMA
:
831 FLD (f_sn
) = ((FLD (f_sn6
)) & (7));
832 FLD (f_sn_x
) = ((UINT
) (FLD (f_sn6
)) >> (3));
834 errmsg
= insert_normal (cd
, fields
->f_sn_x
, 0, 0, 28, 3, 32, total_length
, buffer
);
837 errmsg
= insert_normal (cd
, fields
->f_sn
, 0, 0, 12, 3, 32, total_length
, buffer
);
842 case EPIPHANY_OPERAND_SNMEM
:
845 FLD (f_sn
) = ((FLD (f_sn6
)) & (7));
846 FLD (f_sn_x
) = ((UINT
) (FLD (f_sn6
)) >> (3));
848 errmsg
= insert_normal (cd
, fields
->f_sn_x
, 0, 0, 28, 3, 32, total_length
, buffer
);
851 errmsg
= insert_normal (cd
, fields
->f_sn
, 0, 0, 12, 3, 32, total_length
, buffer
);
856 case EPIPHANY_OPERAND_SNMESH
:
859 FLD (f_sn
) = ((FLD (f_sn6
)) & (7));
860 FLD (f_sn_x
) = ((UINT
) (FLD (f_sn6
)) >> (3));
862 errmsg
= insert_normal (cd
, fields
->f_sn_x
, 0, 0, 28, 3, 32, total_length
, buffer
);
865 errmsg
= insert_normal (cd
, fields
->f_sn
, 0, 0, 12, 3, 32, total_length
, buffer
);
870 case EPIPHANY_OPERAND_SWI_NUM
:
871 errmsg
= insert_normal (cd
, fields
->f_trap_num
, 0, 0, 15, 6, 32, total_length
, buffer
);
873 case EPIPHANY_OPERAND_TRAPNUM6
:
874 errmsg
= insert_normal (cd
, fields
->f_trap_num
, 0, 0, 15, 6, 32, total_length
, buffer
);
878 /* xgettext:c-format */
879 fprintf (stderr
, _("Unrecognized field %d while building insn.\n"),
887 int epiphany_cgen_extract_operand
888 (CGEN_CPU_DESC
, int, CGEN_EXTRACT_INFO
*, CGEN_INSN_INT
, CGEN_FIELDS
*, bfd_vma
);
890 /* Main entry point for operand extraction.
891 The result is <= 0 for error, >0 for success.
892 ??? Actual values aren't well defined right now.
894 This function is basically just a big switch statement. Earlier versions
895 used tables to look up the function to use, but
896 - if the table contains both assembler and disassembler functions then
897 the disassembler contains much of the assembler and vice-versa,
898 - there's a lot of inlining possibilities as things grow,
899 - using a switch statement avoids the function call overhead.
901 This function could be moved into `print_insn_normal', but keeping it
902 separate makes clear the interface between `print_insn_normal' and each of
906 epiphany_cgen_extract_operand (CGEN_CPU_DESC cd
,
908 CGEN_EXTRACT_INFO
*ex_info
,
909 CGEN_INSN_INT insn_value
,
910 CGEN_FIELDS
* fields
,
913 /* Assume success (for those operands that are nops). */
915 unsigned int total_length
= CGEN_FIELDS_BITSIZE (fields
);
919 case EPIPHANY_OPERAND_DIRECTION
:
920 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 20, 1, 32, total_length
, pc
, & fields
->f_addsubx
);
922 case EPIPHANY_OPERAND_DISP11
:
924 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 9, 3, 32, total_length
, pc
, & fields
->f_disp3
);
925 if (length
<= 0) break;
926 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 23, 8, 32, total_length
, pc
, & fields
->f_disp8
);
927 if (length
<= 0) break;
929 FLD (f_disp11
) = ((((FLD (f_disp8
)) << (3))) | (FLD (f_disp3
)));
933 case EPIPHANY_OPERAND_DISP3
:
934 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 9, 3, 32, total_length
, pc
, & fields
->f_disp3
);
936 case EPIPHANY_OPERAND_DPMI
:
937 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 24, 1, 32, total_length
, pc
, & fields
->f_subd
);
939 case EPIPHANY_OPERAND_FRD
:
940 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 3, 32, total_length
, pc
, & fields
->f_rd
);
942 case EPIPHANY_OPERAND_FRD6
:
944 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 31, 3, 32, total_length
, pc
, & fields
->f_rd_x
);
945 if (length
<= 0) break;
946 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 3, 32, total_length
, pc
, & fields
->f_rd
);
947 if (length
<= 0) break;
949 FLD (f_rd6
) = ((((FLD (f_rd_x
)) << (3))) | (FLD (f_rd
)));
953 case EPIPHANY_OPERAND_FRM
:
954 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 9, 3, 32, total_length
, pc
, & fields
->f_rm
);
956 case EPIPHANY_OPERAND_FRM6
:
958 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 25, 3, 32, total_length
, pc
, & fields
->f_rm_x
);
959 if (length
<= 0) break;
960 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 9, 3, 32, total_length
, pc
, & fields
->f_rm
);
961 if (length
<= 0) break;
963 FLD (f_rm6
) = ((((FLD (f_rm_x
)) << (3))) | (FLD (f_rm
)));
967 case EPIPHANY_OPERAND_FRN
:
968 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 12, 3, 32, total_length
, pc
, & fields
->f_rn
);
970 case EPIPHANY_OPERAND_FRN6
:
972 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 28, 3, 32, total_length
, pc
, & fields
->f_rn_x
);
973 if (length
<= 0) break;
974 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 12, 3, 32, total_length
, pc
, & fields
->f_rn
);
975 if (length
<= 0) break;
977 FLD (f_rn6
) = ((((FLD (f_rn_x
)) << (3))) | (FLD (f_rn
)));
981 case EPIPHANY_OPERAND_IMM16
:
983 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 12, 8, 32, total_length
, pc
, & fields
->f_imm8
);
984 if (length
<= 0) break;
985 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 27, 8, 32, total_length
, pc
, & fields
->f_imm_27_8
);
986 if (length
<= 0) break;
988 FLD (f_imm16
) = ((((FLD (f_imm_27_8
)) << (8))) | (FLD (f_imm8
)));
992 case EPIPHANY_OPERAND_IMM8
:
993 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 12, 8, 32, total_length
, pc
, & fields
->f_imm8
);
995 case EPIPHANY_OPERAND_RD
:
996 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 3, 32, total_length
, pc
, & fields
->f_rd
);
998 case EPIPHANY_OPERAND_RD6
:
1000 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 31, 3, 32, total_length
, pc
, & fields
->f_rd_x
);
1001 if (length
<= 0) break;
1002 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 3, 32, total_length
, pc
, & fields
->f_rd
);
1003 if (length
<= 0) break;
1005 FLD (f_rd6
) = ((((FLD (f_rd_x
)) << (3))) | (FLD (f_rd
)));
1009 case EPIPHANY_OPERAND_RM
:
1010 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 9, 3, 32, total_length
, pc
, & fields
->f_rm
);
1012 case EPIPHANY_OPERAND_RM6
:
1014 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 25, 3, 32, total_length
, pc
, & fields
->f_rm_x
);
1015 if (length
<= 0) break;
1016 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 9, 3, 32, total_length
, pc
, & fields
->f_rm
);
1017 if (length
<= 0) break;
1019 FLD (f_rm6
) = ((((FLD (f_rm_x
)) << (3))) | (FLD (f_rm
)));
1023 case EPIPHANY_OPERAND_RN
:
1024 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 12, 3, 32, total_length
, pc
, & fields
->f_rn
);
1026 case EPIPHANY_OPERAND_RN6
:
1028 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 28, 3, 32, total_length
, pc
, & fields
->f_rn_x
);
1029 if (length
<= 0) break;
1030 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 12, 3, 32, total_length
, pc
, & fields
->f_rn
);
1031 if (length
<= 0) break;
1033 FLD (f_rn6
) = ((((FLD (f_rn_x
)) << (3))) | (FLD (f_rn
)));
1037 case EPIPHANY_OPERAND_SD
:
1038 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 3, 32, total_length
, pc
, & fields
->f_sd
);
1040 case EPIPHANY_OPERAND_SD6
:
1042 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 31, 3, 32, total_length
, pc
, & fields
->f_sd_x
);
1043 if (length
<= 0) break;
1044 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 3, 32, total_length
, pc
, & fields
->f_sd
);
1045 if (length
<= 0) break;
1047 FLD (f_sd6
) = ((((FLD (f_sd_x
)) << (3))) | (FLD (f_sd
)));
1051 case EPIPHANY_OPERAND_SDDMA
:
1053 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 31, 3, 32, total_length
, pc
, & fields
->f_sd_x
);
1054 if (length
<= 0) break;
1055 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 3, 32, total_length
, pc
, & fields
->f_sd
);
1056 if (length
<= 0) break;
1058 FLD (f_sd6
) = ((((FLD (f_sd_x
)) << (3))) | (FLD (f_sd
)));
1062 case EPIPHANY_OPERAND_SDMEM
:
1064 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 31, 3, 32, total_length
, pc
, & fields
->f_sd_x
);
1065 if (length
<= 0) break;
1066 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 3, 32, total_length
, pc
, & fields
->f_sd
);
1067 if (length
<= 0) break;
1069 FLD (f_sd6
) = ((((FLD (f_sd_x
)) << (3))) | (FLD (f_sd
)));
1073 case EPIPHANY_OPERAND_SDMESH
:
1075 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 31, 3, 32, total_length
, pc
, & fields
->f_sd_x
);
1076 if (length
<= 0) break;
1077 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 3, 32, total_length
, pc
, & fields
->f_sd
);
1078 if (length
<= 0) break;
1080 FLD (f_sd6
) = ((((FLD (f_sd_x
)) << (3))) | (FLD (f_sd
)));
1084 case EPIPHANY_OPERAND_SHIFT
:
1085 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 9, 5, 32, total_length
, pc
, & fields
->f_shift
);
1087 case EPIPHANY_OPERAND_SIMM11
:
1089 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 9, 3, 32, total_length
, pc
, & fields
->f_disp3
);
1090 if (length
<= 0) break;
1091 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 23, 8, 32, total_length
, pc
, & fields
->f_disp8
);
1092 if (length
<= 0) break;
1094 FLD (f_sdisp11
) = ((SI
) (((((((FLD (f_disp8
)) << (3))) | (FLD (f_disp3
)))) << (21))) >> (21));
1098 case EPIPHANY_OPERAND_SIMM24
:
1101 length
= extract_normal (cd
, ex_info
, insn_value
, 0|(1<<CGEN_IFLD_SIGNED
)|(1<<CGEN_IFLD_RELOC
)|(1<<CGEN_IFLD_PCREL_ADDR
), 0, 31, 24, 32, total_length
, pc
, & value
);
1102 value
= ((((value
) << (1))) + (pc
));
1103 fields
->f_simm24
= value
;
1106 case EPIPHANY_OPERAND_SIMM3
:
1107 length
= extract_normal (cd
, ex_info
, insn_value
, 0|(1<<CGEN_IFLD_SIGNED
), 0, 9, 3, 32, total_length
, pc
, & fields
->f_sdisp3
);
1109 case EPIPHANY_OPERAND_SIMM8
:
1112 length
= extract_normal (cd
, ex_info
, insn_value
, 0|(1<<CGEN_IFLD_SIGNED
)|(1<<CGEN_IFLD_RELOC
)|(1<<CGEN_IFLD_PCREL_ADDR
), 0, 15, 8, 32, total_length
, pc
, & value
);
1113 value
= ((((value
) << (1))) + (pc
));
1114 fields
->f_simm8
= value
;
1117 case EPIPHANY_OPERAND_SN
:
1118 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 12, 3, 32, total_length
, pc
, & fields
->f_sn
);
1120 case EPIPHANY_OPERAND_SN6
:
1122 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 28, 3, 32, total_length
, pc
, & fields
->f_sn_x
);
1123 if (length
<= 0) break;
1124 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 12, 3, 32, total_length
, pc
, & fields
->f_sn
);
1125 if (length
<= 0) break;
1127 FLD (f_sn6
) = ((((FLD (f_sn_x
)) << (3))) | (FLD (f_sn
)));
1131 case EPIPHANY_OPERAND_SNDMA
:
1133 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 28, 3, 32, total_length
, pc
, & fields
->f_sn_x
);
1134 if (length
<= 0) break;
1135 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 12, 3, 32, total_length
, pc
, & fields
->f_sn
);
1136 if (length
<= 0) break;
1138 FLD (f_sn6
) = ((((FLD (f_sn_x
)) << (3))) | (FLD (f_sn
)));
1142 case EPIPHANY_OPERAND_SNMEM
:
1144 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 28, 3, 32, total_length
, pc
, & fields
->f_sn_x
);
1145 if (length
<= 0) break;
1146 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 12, 3, 32, total_length
, pc
, & fields
->f_sn
);
1147 if (length
<= 0) break;
1149 FLD (f_sn6
) = ((((FLD (f_sn_x
)) << (3))) | (FLD (f_sn
)));
1153 case EPIPHANY_OPERAND_SNMESH
:
1155 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 28, 3, 32, total_length
, pc
, & fields
->f_sn_x
);
1156 if (length
<= 0) break;
1157 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 12, 3, 32, total_length
, pc
, & fields
->f_sn
);
1158 if (length
<= 0) break;
1160 FLD (f_sn6
) = ((((FLD (f_sn_x
)) << (3))) | (FLD (f_sn
)));
1164 case EPIPHANY_OPERAND_SWI_NUM
:
1165 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 6, 32, total_length
, pc
, & fields
->f_trap_num
);
1167 case EPIPHANY_OPERAND_TRAPNUM6
:
1168 length
= extract_normal (cd
, ex_info
, insn_value
, 0, 0, 15, 6, 32, total_length
, pc
, & fields
->f_trap_num
);
1172 /* xgettext:c-format */
1173 fprintf (stderr
, _("Unrecognized field %d while decoding insn.\n"),
1181 cgen_insert_fn
* const epiphany_cgen_insert_handlers
[] =
1186 cgen_extract_fn
* const epiphany_cgen_extract_handlers
[] =
1188 extract_insn_normal
,
1191 int epiphany_cgen_get_int_operand (CGEN_CPU_DESC
, int, const CGEN_FIELDS
*);
1192 bfd_vma
epiphany_cgen_get_vma_operand (CGEN_CPU_DESC
, int, const CGEN_FIELDS
*);
1194 /* Getting values from cgen_fields is handled by a collection of functions.
1195 They are distinguished by the type of the VALUE argument they return.
1196 TODO: floating point, inlining support, remove cases where result type
1200 epiphany_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
1202 const CGEN_FIELDS
* fields
)
1208 case EPIPHANY_OPERAND_DIRECTION
:
1209 value
= fields
->f_addsubx
;
1211 case EPIPHANY_OPERAND_DISP11
:
1212 value
= fields
->f_disp11
;
1214 case EPIPHANY_OPERAND_DISP3
:
1215 value
= fields
->f_disp3
;
1217 case EPIPHANY_OPERAND_DPMI
:
1218 value
= fields
->f_subd
;
1220 case EPIPHANY_OPERAND_FRD
:
1221 value
= fields
->f_rd
;
1223 case EPIPHANY_OPERAND_FRD6
:
1224 value
= fields
->f_rd6
;
1226 case EPIPHANY_OPERAND_FRM
:
1227 value
= fields
->f_rm
;
1229 case EPIPHANY_OPERAND_FRM6
:
1230 value
= fields
->f_rm6
;
1232 case EPIPHANY_OPERAND_FRN
:
1233 value
= fields
->f_rn
;
1235 case EPIPHANY_OPERAND_FRN6
:
1236 value
= fields
->f_rn6
;
1238 case EPIPHANY_OPERAND_IMM16
:
1239 value
= fields
->f_imm16
;
1241 case EPIPHANY_OPERAND_IMM8
:
1242 value
= fields
->f_imm8
;
1244 case EPIPHANY_OPERAND_RD
:
1245 value
= fields
->f_rd
;
1247 case EPIPHANY_OPERAND_RD6
:
1248 value
= fields
->f_rd6
;
1250 case EPIPHANY_OPERAND_RM
:
1251 value
= fields
->f_rm
;
1253 case EPIPHANY_OPERAND_RM6
:
1254 value
= fields
->f_rm6
;
1256 case EPIPHANY_OPERAND_RN
:
1257 value
= fields
->f_rn
;
1259 case EPIPHANY_OPERAND_RN6
:
1260 value
= fields
->f_rn6
;
1262 case EPIPHANY_OPERAND_SD
:
1263 value
= fields
->f_sd
;
1265 case EPIPHANY_OPERAND_SD6
:
1266 value
= fields
->f_sd6
;
1268 case EPIPHANY_OPERAND_SDDMA
:
1269 value
= fields
->f_sd6
;
1271 case EPIPHANY_OPERAND_SDMEM
:
1272 value
= fields
->f_sd6
;
1274 case EPIPHANY_OPERAND_SDMESH
:
1275 value
= fields
->f_sd6
;
1277 case EPIPHANY_OPERAND_SHIFT
:
1278 value
= fields
->f_shift
;
1280 case EPIPHANY_OPERAND_SIMM11
:
1281 value
= fields
->f_sdisp11
;
1283 case EPIPHANY_OPERAND_SIMM24
:
1284 value
= fields
->f_simm24
;
1286 case EPIPHANY_OPERAND_SIMM3
:
1287 value
= fields
->f_sdisp3
;
1289 case EPIPHANY_OPERAND_SIMM8
:
1290 value
= fields
->f_simm8
;
1292 case EPIPHANY_OPERAND_SN
:
1293 value
= fields
->f_sn
;
1295 case EPIPHANY_OPERAND_SN6
:
1296 value
= fields
->f_sn6
;
1298 case EPIPHANY_OPERAND_SNDMA
:
1299 value
= fields
->f_sn6
;
1301 case EPIPHANY_OPERAND_SNMEM
:
1302 value
= fields
->f_sn6
;
1304 case EPIPHANY_OPERAND_SNMESH
:
1305 value
= fields
->f_sn6
;
1307 case EPIPHANY_OPERAND_SWI_NUM
:
1308 value
= fields
->f_trap_num
;
1310 case EPIPHANY_OPERAND_TRAPNUM6
:
1311 value
= fields
->f_trap_num
;
1315 /* xgettext:c-format */
1316 fprintf (stderr
, _("Unrecognized field %d while getting int operand.\n"),
1325 epiphany_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
1327 const CGEN_FIELDS
* fields
)
1333 case EPIPHANY_OPERAND_DIRECTION
:
1334 value
= fields
->f_addsubx
;
1336 case EPIPHANY_OPERAND_DISP11
:
1337 value
= fields
->f_disp11
;
1339 case EPIPHANY_OPERAND_DISP3
:
1340 value
= fields
->f_disp3
;
1342 case EPIPHANY_OPERAND_DPMI
:
1343 value
= fields
->f_subd
;
1345 case EPIPHANY_OPERAND_FRD
:
1346 value
= fields
->f_rd
;
1348 case EPIPHANY_OPERAND_FRD6
:
1349 value
= fields
->f_rd6
;
1351 case EPIPHANY_OPERAND_FRM
:
1352 value
= fields
->f_rm
;
1354 case EPIPHANY_OPERAND_FRM6
:
1355 value
= fields
->f_rm6
;
1357 case EPIPHANY_OPERAND_FRN
:
1358 value
= fields
->f_rn
;
1360 case EPIPHANY_OPERAND_FRN6
:
1361 value
= fields
->f_rn6
;
1363 case EPIPHANY_OPERAND_IMM16
:
1364 value
= fields
->f_imm16
;
1366 case EPIPHANY_OPERAND_IMM8
:
1367 value
= fields
->f_imm8
;
1369 case EPIPHANY_OPERAND_RD
:
1370 value
= fields
->f_rd
;
1372 case EPIPHANY_OPERAND_RD6
:
1373 value
= fields
->f_rd6
;
1375 case EPIPHANY_OPERAND_RM
:
1376 value
= fields
->f_rm
;
1378 case EPIPHANY_OPERAND_RM6
:
1379 value
= fields
->f_rm6
;
1381 case EPIPHANY_OPERAND_RN
:
1382 value
= fields
->f_rn
;
1384 case EPIPHANY_OPERAND_RN6
:
1385 value
= fields
->f_rn6
;
1387 case EPIPHANY_OPERAND_SD
:
1388 value
= fields
->f_sd
;
1390 case EPIPHANY_OPERAND_SD6
:
1391 value
= fields
->f_sd6
;
1393 case EPIPHANY_OPERAND_SDDMA
:
1394 value
= fields
->f_sd6
;
1396 case EPIPHANY_OPERAND_SDMEM
:
1397 value
= fields
->f_sd6
;
1399 case EPIPHANY_OPERAND_SDMESH
:
1400 value
= fields
->f_sd6
;
1402 case EPIPHANY_OPERAND_SHIFT
:
1403 value
= fields
->f_shift
;
1405 case EPIPHANY_OPERAND_SIMM11
:
1406 value
= fields
->f_sdisp11
;
1408 case EPIPHANY_OPERAND_SIMM24
:
1409 value
= fields
->f_simm24
;
1411 case EPIPHANY_OPERAND_SIMM3
:
1412 value
= fields
->f_sdisp3
;
1414 case EPIPHANY_OPERAND_SIMM8
:
1415 value
= fields
->f_simm8
;
1417 case EPIPHANY_OPERAND_SN
:
1418 value
= fields
->f_sn
;
1420 case EPIPHANY_OPERAND_SN6
:
1421 value
= fields
->f_sn6
;
1423 case EPIPHANY_OPERAND_SNDMA
:
1424 value
= fields
->f_sn6
;
1426 case EPIPHANY_OPERAND_SNMEM
:
1427 value
= fields
->f_sn6
;
1429 case EPIPHANY_OPERAND_SNMESH
:
1430 value
= fields
->f_sn6
;
1432 case EPIPHANY_OPERAND_SWI_NUM
:
1433 value
= fields
->f_trap_num
;
1435 case EPIPHANY_OPERAND_TRAPNUM6
:
1436 value
= fields
->f_trap_num
;
1440 /* xgettext:c-format */
1441 fprintf (stderr
, _("Unrecognized field %d while getting vma operand.\n"),
1449 void epiphany_cgen_set_int_operand (CGEN_CPU_DESC
, int, CGEN_FIELDS
*, int);
1450 void epiphany_cgen_set_vma_operand (CGEN_CPU_DESC
, int, CGEN_FIELDS
*, bfd_vma
);
1452 /* Stuffing values in cgen_fields is handled by a collection of functions.
1453 They are distinguished by the type of the VALUE argument they accept.
1454 TODO: floating point, inlining support, remove cases where argument type
1458 epiphany_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
1460 CGEN_FIELDS
* fields
,
1465 case EPIPHANY_OPERAND_DIRECTION
:
1466 fields
->f_addsubx
= value
;
1468 case EPIPHANY_OPERAND_DISP11
:
1469 fields
->f_disp11
= value
;
1471 case EPIPHANY_OPERAND_DISP3
:
1472 fields
->f_disp3
= value
;
1474 case EPIPHANY_OPERAND_DPMI
:
1475 fields
->f_subd
= value
;
1477 case EPIPHANY_OPERAND_FRD
:
1478 fields
->f_rd
= value
;
1480 case EPIPHANY_OPERAND_FRD6
:
1481 fields
->f_rd6
= value
;
1483 case EPIPHANY_OPERAND_FRM
:
1484 fields
->f_rm
= value
;
1486 case EPIPHANY_OPERAND_FRM6
:
1487 fields
->f_rm6
= value
;
1489 case EPIPHANY_OPERAND_FRN
:
1490 fields
->f_rn
= value
;
1492 case EPIPHANY_OPERAND_FRN6
:
1493 fields
->f_rn6
= value
;
1495 case EPIPHANY_OPERAND_IMM16
:
1496 fields
->f_imm16
= value
;
1498 case EPIPHANY_OPERAND_IMM8
:
1499 fields
->f_imm8
= value
;
1501 case EPIPHANY_OPERAND_RD
:
1502 fields
->f_rd
= value
;
1504 case EPIPHANY_OPERAND_RD6
:
1505 fields
->f_rd6
= value
;
1507 case EPIPHANY_OPERAND_RM
:
1508 fields
->f_rm
= value
;
1510 case EPIPHANY_OPERAND_RM6
:
1511 fields
->f_rm6
= value
;
1513 case EPIPHANY_OPERAND_RN
:
1514 fields
->f_rn
= value
;
1516 case EPIPHANY_OPERAND_RN6
:
1517 fields
->f_rn6
= value
;
1519 case EPIPHANY_OPERAND_SD
:
1520 fields
->f_sd
= value
;
1522 case EPIPHANY_OPERAND_SD6
:
1523 fields
->f_sd6
= value
;
1525 case EPIPHANY_OPERAND_SDDMA
:
1526 fields
->f_sd6
= value
;
1528 case EPIPHANY_OPERAND_SDMEM
:
1529 fields
->f_sd6
= value
;
1531 case EPIPHANY_OPERAND_SDMESH
:
1532 fields
->f_sd6
= value
;
1534 case EPIPHANY_OPERAND_SHIFT
:
1535 fields
->f_shift
= value
;
1537 case EPIPHANY_OPERAND_SIMM11
:
1538 fields
->f_sdisp11
= value
;
1540 case EPIPHANY_OPERAND_SIMM24
:
1541 fields
->f_simm24
= value
;
1543 case EPIPHANY_OPERAND_SIMM3
:
1544 fields
->f_sdisp3
= value
;
1546 case EPIPHANY_OPERAND_SIMM8
:
1547 fields
->f_simm8
= value
;
1549 case EPIPHANY_OPERAND_SN
:
1550 fields
->f_sn
= value
;
1552 case EPIPHANY_OPERAND_SN6
:
1553 fields
->f_sn6
= value
;
1555 case EPIPHANY_OPERAND_SNDMA
:
1556 fields
->f_sn6
= value
;
1558 case EPIPHANY_OPERAND_SNMEM
:
1559 fields
->f_sn6
= value
;
1561 case EPIPHANY_OPERAND_SNMESH
:
1562 fields
->f_sn6
= value
;
1564 case EPIPHANY_OPERAND_SWI_NUM
:
1565 fields
->f_trap_num
= value
;
1567 case EPIPHANY_OPERAND_TRAPNUM6
:
1568 fields
->f_trap_num
= value
;
1572 /* xgettext:c-format */
1573 fprintf (stderr
, _("Unrecognized field %d while setting int operand.\n"),
1580 epiphany_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
1582 CGEN_FIELDS
* fields
,
1587 case EPIPHANY_OPERAND_DIRECTION
:
1588 fields
->f_addsubx
= value
;
1590 case EPIPHANY_OPERAND_DISP11
:
1591 fields
->f_disp11
= value
;
1593 case EPIPHANY_OPERAND_DISP3
:
1594 fields
->f_disp3
= value
;
1596 case EPIPHANY_OPERAND_DPMI
:
1597 fields
->f_subd
= value
;
1599 case EPIPHANY_OPERAND_FRD
:
1600 fields
->f_rd
= value
;
1602 case EPIPHANY_OPERAND_FRD6
:
1603 fields
->f_rd6
= value
;
1605 case EPIPHANY_OPERAND_FRM
:
1606 fields
->f_rm
= value
;
1608 case EPIPHANY_OPERAND_FRM6
:
1609 fields
->f_rm6
= value
;
1611 case EPIPHANY_OPERAND_FRN
:
1612 fields
->f_rn
= value
;
1614 case EPIPHANY_OPERAND_FRN6
:
1615 fields
->f_rn6
= value
;
1617 case EPIPHANY_OPERAND_IMM16
:
1618 fields
->f_imm16
= value
;
1620 case EPIPHANY_OPERAND_IMM8
:
1621 fields
->f_imm8
= value
;
1623 case EPIPHANY_OPERAND_RD
:
1624 fields
->f_rd
= value
;
1626 case EPIPHANY_OPERAND_RD6
:
1627 fields
->f_rd6
= value
;
1629 case EPIPHANY_OPERAND_RM
:
1630 fields
->f_rm
= value
;
1632 case EPIPHANY_OPERAND_RM6
:
1633 fields
->f_rm6
= value
;
1635 case EPIPHANY_OPERAND_RN
:
1636 fields
->f_rn
= value
;
1638 case EPIPHANY_OPERAND_RN6
:
1639 fields
->f_rn6
= value
;
1641 case EPIPHANY_OPERAND_SD
:
1642 fields
->f_sd
= value
;
1644 case EPIPHANY_OPERAND_SD6
:
1645 fields
->f_sd6
= value
;
1647 case EPIPHANY_OPERAND_SDDMA
:
1648 fields
->f_sd6
= value
;
1650 case EPIPHANY_OPERAND_SDMEM
:
1651 fields
->f_sd6
= value
;
1653 case EPIPHANY_OPERAND_SDMESH
:
1654 fields
->f_sd6
= value
;
1656 case EPIPHANY_OPERAND_SHIFT
:
1657 fields
->f_shift
= value
;
1659 case EPIPHANY_OPERAND_SIMM11
:
1660 fields
->f_sdisp11
= value
;
1662 case EPIPHANY_OPERAND_SIMM24
:
1663 fields
->f_simm24
= value
;
1665 case EPIPHANY_OPERAND_SIMM3
:
1666 fields
->f_sdisp3
= value
;
1668 case EPIPHANY_OPERAND_SIMM8
:
1669 fields
->f_simm8
= value
;
1671 case EPIPHANY_OPERAND_SN
:
1672 fields
->f_sn
= value
;
1674 case EPIPHANY_OPERAND_SN6
:
1675 fields
->f_sn6
= value
;
1677 case EPIPHANY_OPERAND_SNDMA
:
1678 fields
->f_sn6
= value
;
1680 case EPIPHANY_OPERAND_SNMEM
:
1681 fields
->f_sn6
= value
;
1683 case EPIPHANY_OPERAND_SNMESH
:
1684 fields
->f_sn6
= value
;
1686 case EPIPHANY_OPERAND_SWI_NUM
:
1687 fields
->f_trap_num
= value
;
1689 case EPIPHANY_OPERAND_TRAPNUM6
:
1690 fields
->f_trap_num
= value
;
1694 /* xgettext:c-format */
1695 fprintf (stderr
, _("Unrecognized field %d while setting vma operand.\n"),
1701 /* Function to call before using the instruction builder tables. */
1704 epiphany_cgen_init_ibld_table (CGEN_CPU_DESC cd
)
1706 cd
->insert_handlers
= & epiphany_cgen_insert_handlers
[0];
1707 cd
->extract_handlers
= & epiphany_cgen_extract_handlers
[0];
1709 cd
->insert_operand
= epiphany_cgen_insert_operand
;
1710 cd
->extract_operand
= epiphany_cgen_extract_operand
;
1712 cd
->get_int_operand
= epiphany_cgen_get_int_operand
;
1713 cd
->set_int_operand
= epiphany_cgen_set_int_operand
;
1714 cd
->get_vma_operand
= epiphany_cgen_get_vma_operand
;
1715 cd
->set_vma_operand
= epiphany_cgen_set_vma_operand
;