1 /* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
4 THIS FILE IS USED TO GENERATE fr30-asm.c.
6 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
8 This file is part of the GNU Binutils and GDB, the GNU debugger.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software Foundation, Inc.,
22 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
34 #define min(a,b) ((a) < (b) ? (a) : (b))
36 #define max(a,b) ((a) > (b) ? (a) : (b))
40 #define INLINE __inline__
45 static const char * insert_normal
46 PARAMS ((CGEN_OPCODE_DESC
, long, unsigned int, int, int, int,
47 CGEN_INSN_BYTES_PTR
));
48 static const char * parse_insn_normal
49 PARAMS ((CGEN_OPCODE_DESC
, const CGEN_INSN
*,
50 const char **, CGEN_FIELDS
*));
51 static const char * insert_insn_normal
52 PARAMS ((CGEN_OPCODE_DESC
, const CGEN_INSN
*,
53 CGEN_FIELDS
*, CGEN_INSN_BYTES_PTR
, bfd_vma
));
55 /* -- assembler routines inserted here */
57 /* Main entry point for operand parsing.
59 This function is basically just a big switch statement. Earlier versions
60 used tables to look up the function to use, but
61 - if the table contains both assembler and disassembler functions then
62 the disassembler contains much of the assembler and vice-versa,
63 - there's a lot of inlining possibilities as things grow,
64 - using a switch statement avoids the function call overhead.
66 This function could be moved into `parse_insn_normal', but keeping it
67 separate makes clear the interface between `parse_insn_normal' and each of
72 fr30_cgen_parse_operand (od
, opindex
, strp
, fields
)
82 case FR30_OPERAND_RI
:
83 errmsg
= cgen_parse_keyword (od
, strp
, & fr30_cgen_opval_h_gr
, & fields
->f_Ri
);
85 case FR30_OPERAND_RJ
:
86 errmsg
= cgen_parse_keyword (od
, strp
, & fr30_cgen_opval_h_gr
, & fields
->f_Rj
);
88 case FR30_OPERAND_RS1
:
89 errmsg
= cgen_parse_keyword (od
, strp
, & fr30_cgen_opval_h_dr
, & fields
->f_Rs1
);
91 case FR30_OPERAND_RS2
:
92 errmsg
= cgen_parse_keyword (od
, strp
, & fr30_cgen_opval_h_dr
, & fields
->f_Rs2
);
94 case FR30_OPERAND_R13
:
95 errmsg
= cgen_parse_keyword (od
, strp
, & fr30_cgen_opval_h_r13
, & fields
->f_nil
);
97 case FR30_OPERAND_R14
:
98 errmsg
= cgen_parse_keyword (od
, strp
, & fr30_cgen_opval_h_r14
, & fields
->f_nil
);
100 case FR30_OPERAND_R15
:
101 errmsg
= cgen_parse_keyword (od
, strp
, & fr30_cgen_opval_h_r15
, & fields
->f_nil
);
103 case FR30_OPERAND_PS
:
104 errmsg
= cgen_parse_keyword (od
, strp
, & fr30_cgen_opval_h_ps
, & fields
->f_nil
);
106 case FR30_OPERAND_U4
:
107 errmsg
= cgen_parse_unsigned_integer (od
, strp
, FR30_OPERAND_U4
, &fields
->f_u4
);
109 case FR30_OPERAND_M4
:
110 errmsg
= cgen_parse_unsigned_integer (od
, strp
, FR30_OPERAND_M4
, &fields
->f_m4
);
112 case FR30_OPERAND_U8
:
113 errmsg
= cgen_parse_unsigned_integer (od
, strp
, FR30_OPERAND_U8
, &fields
->f_u8
);
115 case FR30_OPERAND_I8
:
116 errmsg
= cgen_parse_unsigned_integer (od
, strp
, FR30_OPERAND_I8
, &fields
->f_i8
);
118 case FR30_OPERAND_UDISP6
:
119 errmsg
= cgen_parse_unsigned_integer (od
, strp
, FR30_OPERAND_UDISP6
, &fields
->f_udisp6
);
121 case FR30_OPERAND_DISP8
:
122 errmsg
= cgen_parse_signed_integer (od
, strp
, FR30_OPERAND_DISP8
, &fields
->f_disp8
);
124 case FR30_OPERAND_DISP9
:
125 errmsg
= cgen_parse_signed_integer (od
, strp
, FR30_OPERAND_DISP9
, &fields
->f_disp9
);
127 case FR30_OPERAND_DISP10
:
128 errmsg
= cgen_parse_signed_integer (od
, strp
, FR30_OPERAND_DISP10
, &fields
->f_disp10
);
130 case FR30_OPERAND_S10
:
131 errmsg
= cgen_parse_signed_integer (od
, strp
, FR30_OPERAND_S10
, &fields
->f_s10
);
133 case FR30_OPERAND_U10
:
134 errmsg
= cgen_parse_unsigned_integer (od
, strp
, FR30_OPERAND_U10
, &fields
->f_u10
);
136 case FR30_OPERAND_DIR8
:
137 errmsg
= cgen_parse_unsigned_integer (od
, strp
, FR30_OPERAND_DIR8
, &fields
->f_dir8
);
139 case FR30_OPERAND_DIR9
:
140 errmsg
= cgen_parse_unsigned_integer (od
, strp
, FR30_OPERAND_DIR9
, &fields
->f_dir9
);
142 case FR30_OPERAND_DIR10
:
143 errmsg
= cgen_parse_unsigned_integer (od
, strp
, FR30_OPERAND_DIR10
, &fields
->f_dir10
);
145 case FR30_OPERAND_LABEL9
:
146 errmsg
= cgen_parse_signed_integer (od
, strp
, FR30_OPERAND_LABEL9
, &fields
->f_rel9
);
148 case FR30_OPERAND_LABEL12
:
149 errmsg
= cgen_parse_signed_integer (od
, strp
, FR30_OPERAND_LABEL12
, &fields
->f_rel12
);
151 case FR30_OPERAND_CC
:
152 errmsg
= cgen_parse_unsigned_integer (od
, strp
, FR30_OPERAND_CC
, &fields
->f_cc
);
156 /* xgettext:c-format */
157 fprintf (stderr
, _("Unrecognized field %d while parsing.\n"), opindex
);
164 /* Main entry point for operand insertion.
166 This function is basically just a big switch statement. Earlier versions
167 used tables to look up the function to use, but
168 - if the table contains both assembler and disassembler functions then
169 the disassembler contains much of the assembler and vice-versa,
170 - there's a lot of inlining possibilities as things grow,
171 - using a switch statement avoids the function call overhead.
173 This function could be moved into `parse_insn_normal', but keeping it
174 separate makes clear the interface between `parse_insn_normal' and each of
175 the handlers. It's also needed by GAS to insert operands that couldn't be
176 resolved during parsing.
180 fr30_cgen_insert_operand (od
, opindex
, fields
, buffer
, pc
)
183 CGEN_FIELDS
* fields
;
184 CGEN_INSN_BYTES_PTR buffer
;
191 case FR30_OPERAND_RI
:
192 errmsg
= insert_normal (od
, fields
->f_Ri
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 12, 4, CGEN_FIELDS_BITSIZE (fields
), buffer
);
194 case FR30_OPERAND_RJ
:
195 errmsg
= insert_normal (od
, fields
->f_Rj
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 8, 4, CGEN_FIELDS_BITSIZE (fields
), buffer
);
197 case FR30_OPERAND_RS1
:
198 errmsg
= insert_normal (od
, fields
->f_Rs1
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 8, 4, CGEN_FIELDS_BITSIZE (fields
), buffer
);
200 case FR30_OPERAND_RS2
:
201 errmsg
= insert_normal (od
, fields
->f_Rs2
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 12, 4, CGEN_FIELDS_BITSIZE (fields
), buffer
);
203 case FR30_OPERAND_R13
:
204 errmsg
= insert_normal (od
, fields
->f_nil
, 0, 0, 0, CGEN_FIELDS_BITSIZE (fields
), buffer
);
206 case FR30_OPERAND_R14
:
207 errmsg
= insert_normal (od
, fields
->f_nil
, 0, 0, 0, CGEN_FIELDS_BITSIZE (fields
), buffer
);
209 case FR30_OPERAND_R15
:
210 errmsg
= insert_normal (od
, fields
->f_nil
, 0, 0, 0, CGEN_FIELDS_BITSIZE (fields
), buffer
);
212 case FR30_OPERAND_PS
:
213 errmsg
= insert_normal (od
, fields
->f_nil
, 0, 0, 0, CGEN_FIELDS_BITSIZE (fields
), buffer
);
215 case FR30_OPERAND_U4
:
216 errmsg
= insert_normal (od
, fields
->f_u4
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), 8, 4, CGEN_FIELDS_BITSIZE (fields
), buffer
);
218 case FR30_OPERAND_M4
:
220 long value
= fields
->f_m4
;
221 value
= ((value
) & (15));
222 errmsg
= insert_normal (od
, value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), 8, 4, CGEN_FIELDS_BITSIZE (fields
), buffer
);
225 case FR30_OPERAND_U8
:
226 errmsg
= insert_normal (od
, fields
->f_u8
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), 8, 8, CGEN_FIELDS_BITSIZE (fields
), buffer
);
228 case FR30_OPERAND_I8
:
229 errmsg
= insert_normal (od
, fields
->f_i8
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), 4, 8, CGEN_FIELDS_BITSIZE (fields
), buffer
);
231 case FR30_OPERAND_UDISP6
:
233 long value
= fields
->f_udisp6
;
234 value
= ((unsigned int) (value
) >> (2));
235 errmsg
= insert_normal (od
, value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), 8, 4, CGEN_FIELDS_BITSIZE (fields
), buffer
);
238 case FR30_OPERAND_DISP8
:
239 errmsg
= insert_normal (od
, fields
->f_disp8
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_SIGNED
), 4, 8, CGEN_FIELDS_BITSIZE (fields
), buffer
);
241 case FR30_OPERAND_DISP9
:
243 long value
= fields
->f_disp9
;
244 value
= ((int) (value
) >> (1));
245 errmsg
= insert_normal (od
, value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_SIGNED
), 4, 8, CGEN_FIELDS_BITSIZE (fields
), buffer
);
248 case FR30_OPERAND_DISP10
:
250 long value
= fields
->f_disp10
;
251 value
= ((int) (value
) >> (2));
252 errmsg
= insert_normal (od
, value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_SIGNED
), 4, 8, CGEN_FIELDS_BITSIZE (fields
), buffer
);
255 case FR30_OPERAND_S10
:
257 long value
= fields
->f_s10
;
258 value
= ((int) (value
) >> (2));
259 errmsg
= insert_normal (od
, value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_SIGNED
), 8, 8, CGEN_FIELDS_BITSIZE (fields
), buffer
);
262 case FR30_OPERAND_U10
:
264 long value
= fields
->f_u10
;
265 value
= ((unsigned int) (value
) >> (2));
266 errmsg
= insert_normal (od
, value
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_UNSIGNED
), 8, 8, CGEN_FIELDS_BITSIZE (fields
), buffer
);
269 case FR30_OPERAND_DIR8
:
270 errmsg
= insert_normal (od
, fields
->f_dir8
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 8, 8, CGEN_FIELDS_BITSIZE (fields
), buffer
);
272 case FR30_OPERAND_DIR9
:
274 long value
= fields
->f_dir9
;
275 value
= ((unsigned int) (value
) >> (1));
276 errmsg
= insert_normal (od
, value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 8, 8, CGEN_FIELDS_BITSIZE (fields
), buffer
);
279 case FR30_OPERAND_DIR10
:
281 long value
= fields
->f_dir10
;
282 value
= ((unsigned int) (value
) >> (2));
283 errmsg
= insert_normal (od
, value
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 8, 8, CGEN_FIELDS_BITSIZE (fields
), buffer
);
286 case FR30_OPERAND_LABEL9
:
288 long value
= fields
->f_rel9
;
289 value
= ((int) (((value
) - (((pc
) & (-2))))) >> (1));
290 errmsg
= insert_normal (od
, value
, 0|(1<<CGEN_OPERAND_SIGNED
), 8, 8, CGEN_FIELDS_BITSIZE (fields
), buffer
);
293 case FR30_OPERAND_LABEL12
:
295 long value
= fields
->f_rel12
;
296 value
= ((int) (((value
) - (((pc
) & (-2))))) >> (1));
297 errmsg
= insert_normal (od
, value
, 0|(1<<CGEN_OPERAND_SIGNED
), 5, 11, CGEN_FIELDS_BITSIZE (fields
), buffer
);
300 case FR30_OPERAND_CC
:
301 errmsg
= insert_normal (od
, fields
->f_cc
, 0|(1<<CGEN_OPERAND_UNSIGNED
), 4, 4, CGEN_FIELDS_BITSIZE (fields
), buffer
);
305 /* xgettext:c-format */
306 fprintf (stderr
, _("Unrecognized field %d while building insn.\n"),
314 cgen_parse_fn
* const fr30_cgen_parse_handlers
[] =
320 cgen_insert_fn
* const fr30_cgen_insert_handlers
[] =
327 fr30_cgen_init_asm (od
)
333 #if ! CGEN_INT_INSN_P
335 /* Subroutine of insert_normal. */
338 insert_1 (od
, value
, start
, length
, word_length
, bufp
)
341 int start
,length
,word_length
;
344 unsigned long x
,mask
;
346 int big_p
= CGEN_OPCODE_INSN_ENDIAN (od
) == CGEN_ENDIAN_BIG
;
355 x
= bfd_getb16 (bufp
);
357 x
= bfd_getl16 (bufp
);
360 /* ??? This may need reworking as these cases don't necessarily
361 want the first byte and the last two bytes handled like this. */
363 x
= (bfd_getb8 (bufp
) << 16) | bfd_getb16 (bufp
+ 1);
365 x
= bfd_getl16 (bufp
) | (bfd_getb8 (bufp
+ 2) << 16);
369 x
= bfd_getb32 (bufp
);
371 x
= bfd_getl32 (bufp
);
377 /* Written this way to avoid undefined behaviour. */
378 mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
379 if (CGEN_INSN_LSB0_P
)
382 shift
= (word_length
- (start
+ length
));
383 x
= (x
& ~(mask
<< shift
)) | ((value
& mask
) << shift
);
392 bfd_putb16 (x
, bufp
);
394 bfd_putl16 (x
, bufp
);
397 /* ??? This may need reworking as these cases don't necessarily
398 want the first byte and the last two bytes handled like this. */
401 bfd_putb8 (x
>> 16, bufp
);
402 bfd_putb16 (x
, bufp
+ 1);
406 bfd_putl16 (x
, bufp
);
407 bfd_putb8 (x
>> 16, bufp
+ 2);
412 bfd_putb32 (x
, bufp
);
414 bfd_putl32 (x
, bufp
);
421 #endif /* ! CGEN_INT_INSN_P */
423 /* Default insertion routine.
425 ATTRS is a mask of the boolean attributes.
426 START is the starting bit number, architecture origin.
427 LENGTH is the length of VALUE in bits.
428 TOTAL_LENGTH is the total length of the insn.
430 The result is an error message or NULL if success. */
432 /* ??? May need to know word length in order to properly place values as
433 an insn may be made of multiple words and the current bit number handling
434 may be insufficient. Word length is an architectural attribute and thus
435 methinks the way to go [if needed] is to fetch this value from OD or
436 define a macro in <arch>-opc.h rather than adding an extra argument -
437 after all that's how endianness is handled. */
438 /* ??? This duplicates functionality with bfd's howto table and
439 bfd_install_relocation. */
440 /* ??? For architectures where insns can be representable as ints,
441 store insn in `field' struct and add registers, etc. while parsing? */
442 /* ??? This doesn't handle bfd_vma's. Create another function when
446 insert_normal (od
, value
, attrs
, start
, length
, total_length
, buffer
)
453 CGEN_INSN_BYTES_PTR buffer
;
455 static char errbuf
[100];
456 /* Written this way to avoid undefined behaviour. */
457 unsigned long mask
= (((1L << (length
- 1)) - 1) << 1) | 1;
459 /* If LENGTH is zero, this operand doesn't contribute to the value. */
463 /* Ensure VALUE will fit. */
464 if ((attrs
& CGEN_ATTR_MASK (CGEN_OPERAND_UNSIGNED
)) != 0)
466 unsigned long maxval
= mask
;
467 if ((unsigned long) value
> maxval
)
469 /* xgettext:c-format */
471 _("operand out of range (%lu not between 0 and %lu)"),
478 long minval
= - (1L << (length
- 1));
479 long maxval
= (1L << (length
- 1)) - 1;
480 if (value
< minval
|| value
> maxval
)
483 /* xgettext:c-format */
484 (errbuf
, _("operand out of range (%ld not between %ld and %ld)"),
485 value
, minval
, maxval
);
492 if (total_length
> 32)
497 if (CGEN_INSN_LSB0_P
)
500 shift
= total_length
- (start
+ length
);
501 *buffer
= (*buffer
& ~(mask
<< shift
)) | ((value
& mask
) << shift
);
506 /* FIXME: unfinished and untested */
508 /* ??? To be defined in <arch>-opc.h as necessary. */
509 #ifndef CGEN_WORD_ENDIAN
510 #define CGEN_WORD_ENDIAN(od) CGEN_OPCODE_ENDIAN (od)
512 #ifndef CGEN_INSN_WORD_ENDIAN
513 #define CGEN_INSN_WORD_ENDIAN(od) CGEN_WORD_ENDIAN (od)
516 /* The hard case is probably too slow for the normal cases.
517 It's certainly more difficult to understand than the normal case.
518 Thus this is split into two. Keep it that way. The hard case is defined
519 to be when a field straddles a (loosely defined) word boundary
520 (??? which may require target specific help to determine). */
524 #define HARD_CASE_P 0 /* FIXME:wip */
528 unsigned char *bufp
= (unsigned char *) buffer
;
529 int insn_length_left
= total_length
;
531 if (CGEN_INSN_LSB0_P
)
533 int word_offset
= (CGEN_INSN_WORD_ENDIAN (od
) == CGEN_ENDIAN_BIG
535 : start
/ CGEN_BASE_INSN_BITSIZE
);
536 bufp
+= word_offset
* (CGEN_BASE_INSN_BITSIZE
/ 8);
537 if (CGEN_INSN_WORD_ENDIAN (od
) == CGEN_ENDIAN_BIG
)
539 start
-= word_offset
* CGEN_BASE_INSN_BITSIZE
;
543 int word_offset
= (CGEN_INSN_WORD_ENDIAN (od
) == CGEN_ENDIAN_BIG
544 ? start
/ CGEN_BASE_INSN_BITSIZE
546 bufp
+= word_offset
* (CGEN_BASE_INSN_BITSIZE
/ 8);
547 if (CGEN_INSN_WORD_ENDIAN (od
) == CGEN_ENDIAN_BIG
)
548 start
-= word_offset
* CGEN_BASE_INSN_BITSIZE
;
552 /* Loop so we handle a field straddling an insn word boundary
553 (remember, "insn word boundary" is loosely defined here). */
557 int this_pass_length
= length
;
558 int this_pass_start
= start
;
559 int this_pass_word_length
= min (insn_length_left
,
560 (CGEN_BASE_INSN_BITSIZE
== 8
562 : CGEN_BASE_INSN_BITSIZE
));
564 insert_1 (od
, value
, attrs
,
565 this_pass_start
, this_pass_length
, this_pass_word_length
,
568 length
-= this_pass_length
;
569 insn_length_left
-= this_pass_word_length
;
580 bufp
+= this_pass_word_length
/ 8;
586 unsigned char *bufp
= (unsigned char *) buffer
;
591 /* Adjust start,total_length,bufp to point to the pseudo-word that holds
592 the value. For example in a 48 bit insn where the value to insert
593 (say an immediate value) is the last 16 bits then word_length here
594 would be 16. To handle a 24 bit insn with an 18 bit immediate,
595 insert_1 handles 24 bits (using a combination of bfd_get8,16). */
597 if (total_length
> 32)
599 int needed_width
= start
% 8 + length
;
600 int fetch_length
= (needed_width
<= 8 ? 8
601 : needed_width
<= 16 ? 16
604 if (CGEN_INSN_LSB0_P
)
606 if (CGEN_INSN_WORD_ENDIAN (od
) == CGEN_ENDIAN_BIG
)
612 int offset
= start
& ~7;
616 total_length
-= offset
;
621 if (CGEN_INSN_WORD_ENDIAN (od
) == CGEN_ENDIAN_BIG
)
623 int offset
= start
& ~7;
627 total_length
-= offset
;
636 insert_1 (od
, value
, start
, length
, total_length
, bufp
);
639 #endif /* ! CGEN_INT_INSN_P */
644 /* Default insn parser.
646 The syntax string is scanned and operands are parsed and stored in FIELDS.
647 Relocs are queued as we go via other callbacks.
649 ??? Note that this is currently an all-or-nothing parser. If we fail to
650 parse the instruction, we return 0 and the caller will start over from
651 the beginning. Backtracking will be necessary in parsing subexpressions,
652 but that can be handled there. Not handling backtracking here may get
653 expensive in the case of the m68k. Deal with later.
655 Returns NULL for success, an error message for failure.
659 parse_insn_normal (od
, insn
, strp
, fields
)
661 const CGEN_INSN
* insn
;
663 CGEN_FIELDS
* fields
;
665 const CGEN_SYNTAX
* syntax
= CGEN_INSN_SYNTAX (insn
);
666 const char * str
= *strp
;
669 const unsigned char * syn
;
670 #ifdef CGEN_MNEMONIC_OPERANDS
675 /* For now we assume the mnemonic is first (there are no leading operands).
676 We can parse it without needing to set up operand parsing.
677 GAS's input scrubber will ensure mnemonics are lowercase, but we may
678 not be called from GAS. */
679 p
= CGEN_INSN_MNEMONIC (insn
);
680 while (*p
&& tolower (*p
) == tolower (*str
))
683 if (* p
|| (* str
&& !isspace (* str
)))
684 return _("unrecognized instruction");
686 CGEN_INIT_PARSE (od
);
687 cgen_init_parse_operand (od
);
688 #ifdef CGEN_MNEMONIC_OPERANDS
692 /* We don't check for (*str != '\0') here because we want to parse
693 any trailing fake arguments in the syntax string. */
694 syn
= CGEN_SYNTAX_STRING (syntax
);
696 /* Mnemonics come first for now, ensure valid string. */
697 if (! CGEN_SYNTAX_MNEMONIC_P (* syn
))
704 /* Non operand chars must match exactly. */
705 if (CGEN_SYNTAX_CHAR_P (* syn
))
707 if (*str
== CGEN_SYNTAX_CHAR (* syn
))
709 #ifdef CGEN_MNEMONIC_OPERANDS
718 /* Syntax char didn't match. Can't be this insn. */
719 /* FIXME: would like to return something like
720 "expected char `c'" */
721 return _("syntax error");
726 /* We have an operand of some sort. */
727 errmsg
= fr30_cgen_parse_operand (od
, CGEN_SYNTAX_FIELD (*syn
),
732 /* Done with this operand, continue with next one. */
736 /* If we're at the end of the syntax string, we're done. */
739 /* FIXME: For the moment we assume a valid `str' can only contain
740 blanks now. IE: We needn't try again with a longer version of
741 the insn and it is assumed that longer versions of insns appear
742 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
743 while (isspace (* str
))
747 return _("junk at end of line"); /* FIXME: would like to include `str' */
752 /* We couldn't parse it. */
753 return _("unrecognized instruction");
756 /* Default insn builder (insert handler).
757 The instruction is recorded in CGEN_INT_INSN_P byte order
758 (meaning that if CGEN_INT_INSN_P BUFFER is an int * and thus the value is
759 recorded in host byte order, otherwise BUFFER is an array of bytes and the
760 value is recorded in target byte order).
761 The result is an error message or NULL if success. */
764 insert_insn_normal (od
, insn
, fields
, buffer
, pc
)
766 const CGEN_INSN
* insn
;
767 CGEN_FIELDS
* fields
;
768 CGEN_INSN_BYTES_PTR buffer
;
771 const CGEN_SYNTAX
* syntax
= CGEN_INSN_SYNTAX (insn
);
773 const unsigned char * syn
;
775 CGEN_INIT_INSERT (od
);
776 value
= CGEN_INSN_VALUE (insn
);
778 /* If we're recording insns as numbers (rather than a string of bytes),
779 target byte order handling is deferred until later. */
787 cgen_insn_put_value (od
, buffer
, min (CGEN_BASE_INSN_BITSIZE
,
788 CGEN_FIELDS_BITSIZE (fields
)),
791 #endif /* ! CGEN_INT_INSN_P */
793 /* ??? Rather than scanning the syntax string again, we could store
794 in `fields' a null terminated list of the fields that are present. */
796 for (syn
= CGEN_SYNTAX_STRING (syntax
); * syn
!= '\0'; ++ syn
)
800 if (CGEN_SYNTAX_CHAR_P (* syn
))
803 errmsg
= fr30_cgen_insert_operand (od
, CGEN_SYNTAX_FIELD (*syn
),
813 This routine is called for each instruction to be assembled.
814 STR points to the insn to be assembled.
815 We assume all necessary tables have been initialized.
816 The assembled instruction, less any fixups, is stored in BUF.
817 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
818 still needs to be converted to target byte order, otherwise BUF is an array
819 of bytes in target byte order.
820 The result is a pointer to the insn's entry in the opcode table,
821 or NULL if an error occured (an error message will have already been
824 Note that when processing (non-alias) macro-insns,
825 this function recurses. */
828 fr30_cgen_assemble_insn (od
, str
, fields
, buf
, errmsg
)
831 CGEN_FIELDS
* fields
;
832 CGEN_INSN_BYTES_PTR buf
;
836 CGEN_INSN_LIST
* ilist
;
838 /* Skip leading white space. */
839 while (isspace (* str
))
842 /* The instructions are stored in hashed lists.
843 Get the first in the list. */
844 ilist
= CGEN_ASM_LOOKUP_INSN (od
, str
);
846 /* Keep looking until we find a match. */
849 for ( ; ilist
!= NULL
; ilist
= CGEN_ASM_NEXT_INSN (ilist
))
851 const CGEN_INSN
*insn
= ilist
->insn
;
853 #if 0 /* not needed as unsupported opcodes shouldn't be in the hash lists */
854 /* Is this insn supported by the selected cpu? */
855 if (! fr30_cgen_insn_supported (od
, insn
))
859 /* If the RELAX attribute is set, this is an insn that shouldn't be
860 chosen immediately. Instead, it is used during assembler/linker
861 relaxation if possible. */
862 if (CGEN_INSN_ATTR (insn
, CGEN_INSN_RELAX
) != 0)
867 /* Record a default length for the insn. This will get set to the
868 correct value while parsing. */
870 CGEN_FIELDS_BITSIZE (fields
) = CGEN_INSN_BITSIZE (insn
);
872 if (! CGEN_PARSE_FN (insn
) (od
, insn
, & str
, fields
))
874 /* ??? 0 is passed for `pc' */
875 if (CGEN_INSERT_FN (insn
) (od
, insn
, fields
, buf
, (bfd_vma
) 0) != NULL
)
877 /* It is up to the caller to actually output the insn and any
882 /* Try the next entry. */
885 /* FIXME: We can return a better error message than this.
886 Need to track why it failed and pick the right one. */
888 static char errbuf
[100];
889 if (strlen (start
) > 50)
890 /* xgettext:c-format */
891 sprintf (errbuf
, _("bad instruction `%.50s...'"), start
);
893 /* xgettext:c-format */
894 sprintf (errbuf
, _("bad instruction `%.50s'"), start
);
901 #if 0 /* This calls back to GAS which we can't do without care. */
903 /* Record each member of OPVALS in the assembler's symbol table.
904 This lets GAS parse registers for us.
905 ??? Interesting idea but not currently used. */
907 /* Record each member of OPVALS in the assembler's symbol table.
908 FIXME: Not currently used. */
911 fr30_cgen_asm_hash_keywords (od
, opvals
)
913 CGEN_KEYWORD
* opvals
;
915 CGEN_KEYWORD_SEARCH search
= cgen_keyword_search_init (opvals
, NULL
);
916 const CGEN_KEYWORD_ENTRY
* ke
;
918 while ((ke
= cgen_keyword_search_next (& search
)) != NULL
)
920 #if 0 /* Unnecessary, should be done in the search routine. */
921 if (! fr30_cgen_opval_supported (ke
))
924 cgen_asm_record_register (od
, ke
->name
, ke
->value
);