1 /* Disassemble h8300 instructions.
2 Copyright (C) 1993-2021 Free Software Foundation, Inc.
4 This file is part of the GNU opcodes library.
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 It is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
24 #define h8_opcodes h8ops
25 #include "opcode/h8300.h"
26 #include "disassemble.h"
28 #include "libiberty.h"
33 const struct h8_opcode
*opcode
;
36 struct h8_instruction
*h8_instructions
;
38 /* Run through the opcodes and sort them into order to make them easy
42 bfd_h8_disassemble_init (void)
45 unsigned int nopcodes
;
46 const struct h8_opcode
*p
;
47 struct h8_instruction
*pi
;
49 nopcodes
= sizeof (h8_opcodes
) / sizeof (struct h8_opcode
);
51 h8_instructions
= xmalloc (nopcodes
* sizeof (struct h8_instruction
));
53 for (p
= h8_opcodes
, pi
= h8_instructions
; p
->name
; p
++, pi
++)
55 /* Just make sure there are an even number of nibbles in it, and
56 that the count is the same as the length. */
57 for (i
= 0; p
->data
.nib
[i
] != (op_type
) E
; i
++)
59 OPCODES_ASSERT (!(i
& 1));
65 /* Add entry for the NULL vector terminator. */
71 extract_immediate (FILE *stream
,
77 const struct h8_opcode
*q
)
79 switch (looking_for
& SIZE
)
85 /* DISP2 special treatment. */
86 if ((looking_for
& MODE
) == DISP
)
88 if (OP_KIND (q
->how
) == O_MOVAB
89 || OP_KIND (q
->how
) == O_MOVAW
90 || OP_KIND (q
->how
) == O_MOVAL
)
92 /* Handling for mova insn. */
93 switch (q
->args
.nib
[0] & MODE
)
108 /* Handling for non-mova insn. */
109 switch (OP_SIZE (q
->how
))
129 *cst
= (data
[0] << 8) + data
[1];
131 if ((looking_for
& SIZE
) == L_16
)
132 *cst
= (short) *cst
; /* Sign extend. */
137 *cst
= (((unsigned) data
[0] << 24) + (data
[1] << 16)
138 + (data
[2] << 8) + data
[3]);
143 fprintf (stream
, "DISP bad size\n");
148 static const char *regnames
[] =
150 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
151 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
153 static const char *wregnames
[] =
155 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
156 "e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
158 static const char *lregnames
[] =
160 "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
161 "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
163 static const char *cregnames
[] =
165 "ccr", "exr", "mach", "macl", "", "", "vbr", "sbr"
169 print_one_arg (disassemble_info
*info
,
176 const char **pregnames
,
179 void * stream
= info
->stream
;
180 fprintf_ftype outfn
= info
->fprintf_func
;
182 if ((x
& SIZE
) == L_3
|| (x
& SIZE
) == L_3NZ
)
183 outfn (stream
, "#0x%x", (unsigned) cst
);
184 else if ((x
& MODE
) == IMM
)
185 outfn (stream
, "#0x%x", (unsigned) cst
);
186 else if ((x
& MODE
) == DBIT
|| (x
& MODE
) == KBIT
)
187 outfn (stream
, "#%d", (unsigned) cst
);
188 else if ((x
& MODE
) == CONST_2
)
189 outfn (stream
, "#2");
190 else if ((x
& MODE
) == CONST_4
)
191 outfn (stream
, "#4");
192 else if ((x
& MODE
) == CONST_8
)
193 outfn (stream
, "#8");
194 else if ((x
& MODE
) == CONST_16
)
195 outfn (stream
, "#16");
196 else if ((x
& MODE
) == REG
)
201 outfn (stream
, "%s", regnames
[rn
]);
205 outfn (stream
, "%s", wregnames
[rn
]);
209 outfn (stream
, "%s", lregnames
[rn
]);
213 else if ((x
& MODE
) == LOWREG
)
218 /* Always take low half of reg. */
219 outfn (stream
, "%s.b", regnames
[rn
< 8 ? rn
+ 8 : rn
]);
223 /* Always take low half of reg. */
224 outfn (stream
, "%s.w", wregnames
[rn
< 8 ? rn
: rn
- 8]);
228 outfn (stream
, "%s.l", lregnames
[rn
]);
232 else if ((x
& MODE
) == POSTINC
)
233 outfn (stream
, "@%s+", pregnames
[rn
]);
235 else if ((x
& MODE
) == POSTDEC
)
236 outfn (stream
, "@%s-", pregnames
[rn
]);
238 else if ((x
& MODE
) == PREINC
)
239 outfn (stream
, "@+%s", pregnames
[rn
]);
241 else if ((x
& MODE
) == PREDEC
)
242 outfn (stream
, "@-%s", pregnames
[rn
]);
244 else if ((x
& MODE
) == IND
)
245 outfn (stream
, "@%s", pregnames
[rn
]);
247 else if ((x
& MODE
) == ABS
|| (x
& ABSJMP
))
248 outfn (stream
, "@0x%x:%d", (unsigned) cst
, cstlen
);
250 else if ((x
& MODE
) == MEMIND
)
251 outfn (stream
, "@@%d (0x%x)", cst
, cst
);
253 else if ((x
& MODE
) == VECIND
)
255 /* FIXME Multiplier should be 2 or 4, depending on processor mode,
256 by which is meant "normal" vs. "middle", "advanced", "maximum". */
258 int offset
= (cst
+ 0x80) * 4;
259 outfn (stream
, "@@%d (0x%x)", offset
, offset
);
261 else if ((x
& MODE
) == PCREL
)
263 if ((x
& SIZE
) == L_16
||
266 outfn (stream
, ".%s%d (0x%lx)",
267 (short) cst
> 0 ? "+" : "",
269 (long)(addr
+ (short) cst
+ len
));
273 outfn (stream
, ".%s%d (0x%lx)",
274 (char) cst
> 0 ? "+" : "",
276 (long)(addr
+ (char) cst
+ len
));
279 else if ((x
& MODE
) == DISP
)
280 outfn (stream
, "@(0x%x:%d,%s)", cst
, cstlen
, pregnames
[rdisp_n
]);
282 else if ((x
& MODE
) == INDEXB
)
283 /* Always take low half of reg. */
284 outfn (stream
, "@(0x%x:%d,%s.b)", cst
, cstlen
,
285 regnames
[rdisp_n
< 8 ? rdisp_n
+ 8 : rdisp_n
]);
287 else if ((x
& MODE
) == INDEXW
)
288 /* Always take low half of reg. */
289 outfn (stream
, "@(0x%x:%d,%s.w)", cst
, cstlen
,
290 wregnames
[rdisp_n
< 8 ? rdisp_n
: rdisp_n
- 8]);
292 else if ((x
& MODE
) == INDEXL
)
293 outfn (stream
, "@(0x%x:%d,%s.l)", cst
, cstlen
, lregnames
[rdisp_n
]);
296 outfn (stream
, "%s", cregnames
[rn
]);
298 else if ((x
& MODE
) == CCR
)
299 outfn (stream
, "ccr");
301 else if ((x
& MODE
) == EXR
)
302 outfn (stream
, "exr");
304 else if ((x
& MODE
) == MACREG
)
305 outfn (stream
, "mac%c", cst
? 'l' : 'h');
308 /* xgettext:c-format */
309 outfn (stream
, _("Hmmmm 0x%x"), x
);
313 bfd_h8_disassemble (bfd_vma addr
, disassemble_info
*info
, int mach
)
315 /* Find the first entry in the table for this opcode. */
316 int regno
[3] = { 0, 0, 0 };
317 int dispregno
[3] = { 0, 0, 0 };
318 int cst
[3] = { 0, 0, 0 };
319 int cstlen
[3] = { 0, 0, 0 };
320 static bfd_boolean init
= 0;
321 const struct h8_instruction
*qi
;
322 char const **pregnames
= mach
!= 0 ? lregnames
: wregnames
;
325 unsigned char data
[MAX_CODE_NIBBLES
/ 2];
326 void *stream
= info
->stream
;
327 fprintf_ftype outfn
= info
->fprintf_func
;
331 bfd_h8_disassemble_init ();
335 status
= info
->read_memory_func (addr
, data
, 2, info
);
338 info
->memory_error_func (status
, addr
, info
);
342 for (maxlen
= 2; maxlen
< sizeof (data
); maxlen
+= 2)
344 status
= info
->read_memory_func (addr
+ maxlen
, data
+ maxlen
, 2, info
);
349 /* Find the exact opcode/arg combo. */
350 for (qi
= h8_instructions
; qi
->opcode
->name
; qi
++)
352 const struct h8_opcode
*q
;
357 if (qi
->length
> maxlen
)
363 while ((looking_for
= *nib
) != (op_type
) E
)
368 OPCODES_ASSERT (len
/ 2 < maxlen
);
369 thisnib
= data
[len
/ 2];
370 thisnib
= (len
& 1) ? (thisnib
& 0xf) : ((thisnib
/ 16) & 0xf);
371 opnr
= ((looking_for
& OP3
) == OP3
? 2
372 : (looking_for
& DST
) == DST
? 1 : 0);
374 if (looking_for
< 16 && looking_for
>= 0)
376 if (looking_for
!= thisnib
)
381 if ((int) looking_for
& (int) B31
)
383 if (!((thisnib
& 0x8) != 0))
386 looking_for
= (op_type
) ((int) looking_for
& ~(int) B31
);
389 else if ((int) looking_for
& (int) B30
)
391 if (!((thisnib
& 0x8) == 0))
394 looking_for
= (op_type
) ((int) looking_for
& ~(int) B30
);
397 if ((int) looking_for
& (int) B21
)
399 if (!((thisnib
& 0x4) != 0))
402 looking_for
= (op_type
) ((int) looking_for
& ~(int) B21
);
405 else if ((int) looking_for
& (int) B20
)
407 if (!((thisnib
& 0x4) == 0))
410 looking_for
= (op_type
) ((int) looking_for
& ~(int) B20
);
412 if ((int) looking_for
& (int) B11
)
414 if (!((thisnib
& 0x2) != 0))
417 looking_for
= (op_type
) ((int) looking_for
& ~(int) B11
);
420 else if ((int) looking_for
& (int) B10
)
422 if (!((thisnib
& 0x2) == 0))
425 looking_for
= (op_type
) ((int) looking_for
& ~(int) B10
);
428 if ((int) looking_for
& (int) B01
)
430 if (!((thisnib
& 0x1) != 0))
433 looking_for
= (op_type
) ((int) looking_for
& ~(int) B01
);
436 else if ((int) looking_for
& (int) B00
)
438 if (!((thisnib
& 0x1) == 0))
441 looking_for
= (op_type
) ((int) looking_for
& ~(int) B00
);
444 if (looking_for
& IGNORE
)
446 /* Hitachi has declared that IGNORE must be zero. */
450 else if ((looking_for
& MODE
) == DATA
)
452 ; /* Skip embedded data. */
454 else if ((looking_for
& MODE
) == DBIT
)
456 /* Exclude adds/subs by looking at bit 0 and 2, and
457 make sure the operand size, either w or l,
458 matches by looking at bit 1. */
459 if ((looking_for
& 7) != (thisnib
& 7))
462 cst
[opnr
] = (thisnib
& 0x8) ? 2 : 1;
464 else if ((looking_for
& MODE
) == DISP
465 || (looking_for
& MODE
) == ABS
466 || (looking_for
& MODE
) == PCREL
467 || (looking_for
& MODE
) == INDEXB
468 || (looking_for
& MODE
) == INDEXW
469 || (looking_for
& MODE
) == INDEXL
)
472 switch (looking_for
& SIZE
)
485 OPCODES_ASSERT (len
/ 2 + extra
< maxlen
);
486 extract_immediate (stream
, looking_for
, thisnib
,
487 data
+ len
/ 2, cst
+ opnr
,
489 /* Even address == bra, odd == bra/s. */
490 if (q
->how
== O (O_BRAS
, SB
))
493 else if ((looking_for
& MODE
) == REG
494 || (looking_for
& MODE
) == LOWREG
495 || (looking_for
& MODE
) == IND
496 || (looking_for
& MODE
) == PREINC
497 || (looking_for
& MODE
) == POSTINC
498 || (looking_for
& MODE
) == PREDEC
499 || (looking_for
& MODE
) == POSTDEC
)
501 regno
[opnr
] = thisnib
;
503 else if (looking_for
& CTRL
) /* Control Register. */
506 if (((looking_for
& MODE
) == CCR
&& (thisnib
!= C_CCR
))
507 || ((looking_for
& MODE
) == EXR
&& (thisnib
!= C_EXR
))
508 || ((looking_for
& MODE
) == MACH
&& (thisnib
!= C_MACH
))
509 || ((looking_for
& MODE
) == MACL
&& (thisnib
!= C_MACL
))
510 || ((looking_for
& MODE
) == VBR
&& (thisnib
!= C_VBR
))
511 || ((looking_for
& MODE
) == SBR
&& (thisnib
!= C_SBR
)))
513 if (((looking_for
& MODE
) == CCR_EXR
514 && (thisnib
!= C_CCR
&& thisnib
!= C_EXR
))
515 || ((looking_for
& MODE
) == VBR_SBR
516 && (thisnib
!= C_VBR
&& thisnib
!= C_SBR
))
517 || ((looking_for
& MODE
) == MACREG
518 && (thisnib
!= C_MACH
&& thisnib
!= C_MACL
)))
520 if (((looking_for
& MODE
) == CC_EX_VB_SB
521 && (thisnib
!= C_CCR
&& thisnib
!= C_EXR
522 && thisnib
!= C_VBR
&& thisnib
!= C_SBR
)))
525 regno
[opnr
] = thisnib
;
527 else if ((looking_for
& SIZE
) == L_5
)
529 cst
[opnr
] = data
[len
/ 2] & 31;
532 else if ((looking_for
& SIZE
) == L_4
)
537 else if ((looking_for
& SIZE
) == L_16
538 || (looking_for
& SIZE
) == L_16U
)
540 OPCODES_ASSERT (len
/ 2 + 1 < maxlen
);
541 cst
[opnr
] = (data
[len
/ 2]) * 256 + data
[(len
+ 2) / 2];
544 else if ((looking_for
& MODE
) == MEMIND
)
548 else if ((looking_for
& MODE
) == VECIND
)
550 cst
[opnr
] = data
[1] & 0x7f;
552 else if ((looking_for
& SIZE
) == L_32
)
554 unsigned int i
= len
/ 2;
556 OPCODES_ASSERT (i
+ 3 < maxlen
);
557 cst
[opnr
] = (((unsigned) data
[i
] << 24)
558 | (data
[i
+ 1] << 16)
564 else if ((looking_for
& SIZE
) == L_24
)
566 unsigned int i
= len
/ 2;
568 OPCODES_ASSERT (i
+ 2 < maxlen
);
570 (data
[i
] << 16) | (data
[i
+ 1] << 8) | (data
[i
+ 2]);
573 else if (looking_for
& DISPREG
)
575 dispregno
[opnr
] = thisnib
& 7;
577 else if ((looking_for
& MODE
) == KBIT
)
594 else if ((looking_for
& SIZE
) == L_8
)
597 cst
[opnr
] = data
[len
/ 2];
599 else if ((looking_for
& SIZE
) == L_3
600 || (looking_for
& SIZE
) == L_3NZ
)
602 cst
[opnr
] = thisnib
& 0x7;
603 if (cst
[opnr
] == 0 && (looking_for
& SIZE
) == L_3NZ
)
606 else if ((looking_for
& SIZE
) == L_2
)
609 cst
[opnr
] = thisnib
& 0x3;
611 else if ((looking_for
& MODE
) == MACREG
)
613 cst
[opnr
] = (thisnib
== 3);
616 /* xgettext:c-format */
617 outfn (stream
, _("Don't understand 0x%x \n"), looking_for
);
624 outfn (stream
, "%s\t", q
->name
);
626 /* Gross. Disgusting. */
627 if (strcmp (q
->name
, "ldm.l") == 0)
631 count
= (data
[1] / 16) & 0x3;
634 outfn (stream
, "@sp+,er%d-er%d", high
- count
, high
);
638 if (strcmp (q
->name
, "stm.l") == 0)
642 count
= (data
[1] / 16) & 0x3;
645 outfn (stream
, "er%d-er%d,@-sp", low
, low
+ count
);
648 if (strcmp (q
->name
, "rte/l") == 0
649 || strcmp (q
->name
, "rts/l") == 0)
652 outfn (stream
, "er%d", regno
[1]);
654 outfn (stream
, "er%d-er%d", regno
[1] - regno
[0],
658 if (CONST_STRNEQ (q
->name
, "mova"))
660 const op_type
*args
= q
->args
.nib
;
662 if (args
[1] == (op_type
) E
)
665 print_one_arg (info
, addr
, args
[0], cst
[0],
666 cstlen
[0], dispregno
[0], regno
[0],
667 pregnames
, qi
->length
);
668 outfn (stream
, ",er%d", dispregno
[0]);
672 outfn (stream
, "@(0x%x:%d,", cst
[0], cstlen
[0]);
673 print_one_arg (info
, addr
, args
[1], cst
[1],
674 cstlen
[1], dispregno
[1], regno
[1],
675 pregnames
, qi
->length
);
676 outfn (stream
, ".%c),",
677 (args
[0] & MODE
) == INDEXB
? 'b' : 'w');
678 print_one_arg (info
, addr
, args
[2], cst
[2],
679 cstlen
[2], dispregno
[2], regno
[2],
680 pregnames
, qi
->length
);
684 /* Fill in the args. */
686 const op_type
*args
= q
->args
.nib
;
690 /* Special case handling for the adds and subs instructions
691 since in H8 mode thay can only take the r0-r7 registers
692 but in other (higher) modes they can take the er0-er7
693 registers as well. */
694 if (strcmp (qi
->opcode
->name
, "adds") == 0
695 || strcmp (qi
->opcode
->name
, "subs") == 0)
697 outfn (stream
, "#%d,%s", cst
[0], pregnames
[regno
[1] & 0x7]);
702 nargs
< 3 && args
[nargs
] != (op_type
) E
;
710 print_one_arg (info
, addr
, x
,
711 cst
[nargs
], cstlen
[nargs
],
712 dispregno
[nargs
], regno
[nargs
],
713 pregnames
, qi
->length
);
724 /* Fell off the end. */
725 outfn (stream
, ".word\tH'%x,H'%x", data
[0], data
[1]);
730 print_insn_h8300 (bfd_vma addr
, disassemble_info
*info
)
732 return bfd_h8_disassemble (addr
, info
, 0);
736 print_insn_h8300h (bfd_vma addr
, disassemble_info
*info
)
738 return bfd_h8_disassemble (addr
, info
, 1);
742 print_insn_h8300s (bfd_vma addr
, disassemble_info
*info
)
744 return bfd_h8_disassemble (addr
, info
, 2);
This page took 0.043617 seconds and 4 git commands to generate.