1 /* Disassemble h8300 instructions.
2 Copyright (C) 1993-2019 Free Software Foundation, Inc.
4 This file is part of the GNU opcodes library.
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 It is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
24 #define h8_opcodes h8ops
25 #include "opcode/h8300.h"
26 #include "disassemble.h"
28 #include "libiberty.h"
33 const struct h8_opcode
*opcode
;
36 struct h8_instruction
*h8_instructions
;
38 /* Run through the opcodes and sort them into order to make them easy
42 bfd_h8_disassemble_init (void)
45 unsigned int nopcodes
;
46 const struct h8_opcode
*p
;
47 struct h8_instruction
*pi
;
49 nopcodes
= sizeof (h8_opcodes
) / sizeof (struct h8_opcode
);
51 h8_instructions
= xmalloc (nopcodes
* sizeof (struct h8_instruction
));
53 for (p
= h8_opcodes
, pi
= h8_instructions
; p
->name
; p
++, pi
++)
55 /* Just make sure there are an even number of nibbles in it, and
56 that the count is the same as the length. */
57 for (i
= 0; p
->data
.nib
[i
] != (op_type
) E
; i
++)
62 /* xgettext:c-format */
63 opcodes_error_handler (_("internal error, h8_disassemble_init"));
71 /* Add entry for the NULL vector terminator. */
77 extract_immediate (FILE *stream
,
83 const struct h8_opcode
*q
)
85 switch (looking_for
& SIZE
)
91 /* DISP2 special treatment. */
92 if ((looking_for
& MODE
) == DISP
)
94 if (OP_KIND (q
->how
) == O_MOVAB
95 || OP_KIND (q
->how
) == O_MOVAW
96 || OP_KIND (q
->how
) == O_MOVAL
)
98 /* Handling for mova insn. */
99 switch (q
->args
.nib
[0] & MODE
)
114 /* Handling for non-mova insn. */
115 switch (OP_SIZE (q
->how
))
135 *cst
= (data
[0] << 8) + data
[1];
137 if ((looking_for
& SIZE
) == L_16
)
138 *cst
= (short) *cst
; /* Sign extend. */
143 *cst
= (((unsigned) data
[0] << 24) + (data
[1] << 16)
144 + (data
[2] << 8) + data
[3]);
149 fprintf (stream
, "DISP bad size\n");
154 static const char *regnames
[] =
156 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
157 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
159 static const char *wregnames
[] =
161 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
162 "e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
164 static const char *lregnames
[] =
166 "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
167 "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
169 static const char *cregnames
[] =
171 "ccr", "exr", "mach", "macl", "", "", "vbr", "sbr"
175 print_one_arg (disassemble_info
*info
,
182 const char **pregnames
,
185 void * stream
= info
->stream
;
186 fprintf_ftype outfn
= info
->fprintf_func
;
188 if ((x
& SIZE
) == L_3
|| (x
& SIZE
) == L_3NZ
)
189 outfn (stream
, "#0x%x", (unsigned) cst
);
190 else if ((x
& MODE
) == IMM
)
191 outfn (stream
, "#0x%x", (unsigned) cst
);
192 else if ((x
& MODE
) == DBIT
|| (x
& MODE
) == KBIT
)
193 outfn (stream
, "#%d", (unsigned) cst
);
194 else if ((x
& MODE
) == CONST_2
)
195 outfn (stream
, "#2");
196 else if ((x
& MODE
) == CONST_4
)
197 outfn (stream
, "#4");
198 else if ((x
& MODE
) == CONST_8
)
199 outfn (stream
, "#8");
200 else if ((x
& MODE
) == CONST_16
)
201 outfn (stream
, "#16");
202 else if ((x
& MODE
) == REG
)
207 outfn (stream
, "%s", regnames
[rn
]);
211 outfn (stream
, "%s", wregnames
[rn
]);
215 outfn (stream
, "%s", lregnames
[rn
]);
219 else if ((x
& MODE
) == LOWREG
)
224 /* Always take low half of reg. */
225 outfn (stream
, "%s.b", regnames
[rn
< 8 ? rn
+ 8 : rn
]);
229 /* Always take low half of reg. */
230 outfn (stream
, "%s.w", wregnames
[rn
< 8 ? rn
: rn
- 8]);
234 outfn (stream
, "%s.l", lregnames
[rn
]);
238 else if ((x
& MODE
) == POSTINC
)
239 outfn (stream
, "@%s+", pregnames
[rn
]);
241 else if ((x
& MODE
) == POSTDEC
)
242 outfn (stream
, "@%s-", pregnames
[rn
]);
244 else if ((x
& MODE
) == PREINC
)
245 outfn (stream
, "@+%s", pregnames
[rn
]);
247 else if ((x
& MODE
) == PREDEC
)
248 outfn (stream
, "@-%s", pregnames
[rn
]);
250 else if ((x
& MODE
) == IND
)
251 outfn (stream
, "@%s", pregnames
[rn
]);
253 else if ((x
& MODE
) == ABS
|| (x
& ABSJMP
))
254 outfn (stream
, "@0x%x:%d", (unsigned) cst
, cstlen
);
256 else if ((x
& MODE
) == MEMIND
)
257 outfn (stream
, "@@%d (0x%x)", cst
, cst
);
259 else if ((x
& MODE
) == VECIND
)
261 /* FIXME Multiplier should be 2 or 4, depending on processor mode,
262 by which is meant "normal" vs. "middle", "advanced", "maximum". */
264 int offset
= (cst
+ 0x80) * 4;
265 outfn (stream
, "@@%d (0x%x)", offset
, offset
);
267 else if ((x
& MODE
) == PCREL
)
269 if ((x
& SIZE
) == L_16
||
272 outfn (stream
, ".%s%d (0x%lx)",
273 (short) cst
> 0 ? "+" : "",
275 (long)(addr
+ (short) cst
+ len
));
279 outfn (stream
, ".%s%d (0x%lx)",
280 (char) cst
> 0 ? "+" : "",
282 (long)(addr
+ (char) cst
+ len
));
285 else if ((x
& MODE
) == DISP
)
286 outfn (stream
, "@(0x%x:%d,%s)", cst
, cstlen
, pregnames
[rdisp_n
]);
288 else if ((x
& MODE
) == INDEXB
)
289 /* Always take low half of reg. */
290 outfn (stream
, "@(0x%x:%d,%s.b)", cst
, cstlen
,
291 regnames
[rdisp_n
< 8 ? rdisp_n
+ 8 : rdisp_n
]);
293 else if ((x
& MODE
) == INDEXW
)
294 /* Always take low half of reg. */
295 outfn (stream
, "@(0x%x:%d,%s.w)", cst
, cstlen
,
296 wregnames
[rdisp_n
< 8 ? rdisp_n
: rdisp_n
- 8]);
298 else if ((x
& MODE
) == INDEXL
)
299 outfn (stream
, "@(0x%x:%d,%s.l)", cst
, cstlen
, lregnames
[rdisp_n
]);
302 outfn (stream
, "%s", cregnames
[rn
]);
304 else if ((x
& MODE
) == CCR
)
305 outfn (stream
, "ccr");
307 else if ((x
& MODE
) == EXR
)
308 outfn (stream
, "exr");
310 else if ((x
& MODE
) == MACREG
)
311 outfn (stream
, "mac%c", cst
? 'l' : 'h');
314 /* xgettext:c-format */
315 outfn (stream
, _("Hmmmm 0x%x"), x
);
319 bfd_h8_disassemble (bfd_vma addr
, disassemble_info
*info
, int mach
)
321 /* Find the first entry in the table for this opcode. */
322 int regno
[3] = { 0, 0, 0 };
323 int dispregno
[3] = { 0, 0, 0 };
324 int cst
[3] = { 0, 0, 0 };
325 int cstlen
[3] = { 0, 0, 0 };
326 static bfd_boolean init
= 0;
327 const struct h8_instruction
*qi
;
328 char const **pregnames
= mach
!= 0 ? lregnames
: wregnames
;
331 unsigned char data
[MAX_CODE_NIBBLES
];
332 void *stream
= info
->stream
;
333 fprintf_ftype outfn
= info
->fprintf_func
;
337 bfd_h8_disassemble_init ();
341 status
= info
->read_memory_func (addr
, data
, 2, info
);
344 info
->memory_error_func (status
, addr
, info
);
348 for (l
= 2; status
== 0 && l
< sizeof (data
) / 2; l
+= 2)
349 status
= info
->read_memory_func (addr
+ l
, data
+ l
, 2, info
);
351 /* Find the exact opcode/arg combo. */
352 for (qi
= h8_instructions
; qi
->opcode
->name
; qi
++)
354 const struct h8_opcode
*q
= qi
->opcode
;
355 const op_type
*nib
= q
->data
.nib
;
356 unsigned int len
= 0;
360 op_type looking_for
= *nib
;
361 int thisnib
= data
[len
/ 2];
364 thisnib
= (len
& 1) ? (thisnib
& 0xf) : ((thisnib
/ 16) & 0xf);
365 opnr
= ((looking_for
& OP3
) == OP3
? 2
366 : (looking_for
& DST
) == DST
? 1 : 0);
368 if (looking_for
< 16 && looking_for
>= 0)
370 if (looking_for
!= thisnib
)
375 if ((int) looking_for
& (int) B31
)
377 if (!((thisnib
& 0x8) != 0))
380 looking_for
= (op_type
) ((int) looking_for
& ~(int) B31
);
383 else if ((int) looking_for
& (int) B30
)
385 if (!((thisnib
& 0x8) == 0))
388 looking_for
= (op_type
) ((int) looking_for
& ~(int) B30
);
391 if ((int) looking_for
& (int) B21
)
393 if (!((thisnib
& 0x4) != 0))
396 looking_for
= (op_type
) ((int) looking_for
& ~(int) B21
);
399 else if ((int) looking_for
& (int) B20
)
401 if (!((thisnib
& 0x4) == 0))
404 looking_for
= (op_type
) ((int) looking_for
& ~(int) B20
);
406 if ((int) looking_for
& (int) B11
)
408 if (!((thisnib
& 0x2) != 0))
411 looking_for
= (op_type
) ((int) looking_for
& ~(int) B11
);
414 else if ((int) looking_for
& (int) B10
)
416 if (!((thisnib
& 0x2) == 0))
419 looking_for
= (op_type
) ((int) looking_for
& ~(int) B10
);
422 if ((int) looking_for
& (int) B01
)
424 if (!((thisnib
& 0x1) != 0))
427 looking_for
= (op_type
) ((int) looking_for
& ~(int) B01
);
430 else if ((int) looking_for
& (int) B00
)
432 if (!((thisnib
& 0x1) == 0))
435 looking_for
= (op_type
) ((int) looking_for
& ~(int) B00
);
438 if (looking_for
& IGNORE
)
440 /* Hitachi has declared that IGNORE must be zero. */
444 else if ((looking_for
& MODE
) == DATA
)
446 ; /* Skip embedded data. */
448 else if ((looking_for
& MODE
) == DBIT
)
450 /* Exclude adds/subs by looking at bit 0 and 2, and
451 make sure the operand size, either w or l,
452 matches by looking at bit 1. */
453 if ((looking_for
& 7) != (thisnib
& 7))
456 cst
[opnr
] = (thisnib
& 0x8) ? 2 : 1;
458 else if ((looking_for
& MODE
) == DISP
459 || (looking_for
& MODE
) == ABS
460 || (looking_for
& MODE
) == PCREL
461 || (looking_for
& MODE
) == INDEXB
462 || (looking_for
& MODE
) == INDEXW
463 || (looking_for
& MODE
) == INDEXL
)
465 extract_immediate (stream
, looking_for
, thisnib
,
466 data
+ len
/ 2, cst
+ opnr
,
468 /* Even address == bra, odd == bra/s. */
469 if (q
->how
== O (O_BRAS
, SB
))
472 else if ((looking_for
& MODE
) == REG
473 || (looking_for
& MODE
) == LOWREG
474 || (looking_for
& MODE
) == IND
475 || (looking_for
& MODE
) == PREINC
476 || (looking_for
& MODE
) == POSTINC
477 || (looking_for
& MODE
) == PREDEC
478 || (looking_for
& MODE
) == POSTDEC
)
480 regno
[opnr
] = thisnib
;
482 else if (looking_for
& CTRL
) /* Control Register. */
485 if (((looking_for
& MODE
) == CCR
&& (thisnib
!= C_CCR
))
486 || ((looking_for
& MODE
) == EXR
&& (thisnib
!= C_EXR
))
487 || ((looking_for
& MODE
) == MACH
&& (thisnib
!= C_MACH
))
488 || ((looking_for
& MODE
) == MACL
&& (thisnib
!= C_MACL
))
489 || ((looking_for
& MODE
) == VBR
&& (thisnib
!= C_VBR
))
490 || ((looking_for
& MODE
) == SBR
&& (thisnib
!= C_SBR
)))
492 if (((looking_for
& MODE
) == CCR_EXR
493 && (thisnib
!= C_CCR
&& thisnib
!= C_EXR
))
494 || ((looking_for
& MODE
) == VBR_SBR
495 && (thisnib
!= C_VBR
&& thisnib
!= C_SBR
))
496 || ((looking_for
& MODE
) == MACREG
497 && (thisnib
!= C_MACH
&& thisnib
!= C_MACL
)))
499 if (((looking_for
& MODE
) == CC_EX_VB_SB
500 && (thisnib
!= C_CCR
&& thisnib
!= C_EXR
501 && thisnib
!= C_VBR
&& thisnib
!= C_SBR
)))
504 regno
[opnr
] = thisnib
;
506 else if ((looking_for
& SIZE
) == L_5
)
508 cst
[opnr
] = data
[len
/ 2] & 31;
511 else if ((looking_for
& SIZE
) == L_4
)
516 else if ((looking_for
& SIZE
) == L_16
517 || (looking_for
& SIZE
) == L_16U
)
519 cst
[opnr
] = (data
[len
/ 2]) * 256 + data
[(len
+ 2) / 2];
522 else if ((looking_for
& MODE
) == MEMIND
)
526 else if ((looking_for
& MODE
) == VECIND
)
528 cst
[opnr
] = data
[1] & 0x7f;
530 else if ((looking_for
& SIZE
) == L_32
)
534 cst
[opnr
] = (((unsigned) data
[i
] << 24)
535 | (data
[i
+ 1] << 16)
541 else if ((looking_for
& SIZE
) == L_24
)
546 (data
[i
] << 16) | (data
[i
+ 1] << 8) | (data
[i
+ 2]);
549 else if (looking_for
& DISPREG
)
551 dispregno
[opnr
] = thisnib
& 7;
553 else if ((looking_for
& MODE
) == KBIT
)
570 else if ((looking_for
& SIZE
) == L_8
)
573 cst
[opnr
] = data
[len
/ 2];
575 else if ((looking_for
& SIZE
) == L_3
576 || (looking_for
& SIZE
) == L_3NZ
)
578 cst
[opnr
] = thisnib
& 0x7;
579 if (cst
[opnr
] == 0 && (looking_for
& SIZE
) == L_3NZ
)
582 else if ((looking_for
& SIZE
) == L_2
)
585 cst
[opnr
] = thisnib
& 0x3;
587 else if ((looking_for
& MODE
) == MACREG
)
589 cst
[opnr
] = (thisnib
== 3);
591 else if (looking_for
== (op_type
) E
)
593 outfn (stream
, "%s\t", q
->name
);
595 /* Gross. Disgusting. */
596 if (strcmp (q
->name
, "ldm.l") == 0)
600 count
= (data
[1] / 16) & 0x3;
603 outfn (stream
, "@sp+,er%d-er%d", high
- count
, high
);
607 if (strcmp (q
->name
, "stm.l") == 0)
611 count
= (data
[1] / 16) & 0x3;
614 outfn (stream
, "er%d-er%d,@-sp", low
, low
+ count
);
617 if (strcmp (q
->name
, "rte/l") == 0
618 || strcmp (q
->name
, "rts/l") == 0)
621 outfn (stream
, "er%d", regno
[1]);
623 outfn (stream
, "er%d-er%d", regno
[1] - regno
[0],
627 if (CONST_STRNEQ (q
->name
, "mova"))
629 const op_type
*args
= q
->args
.nib
;
631 if (args
[1] == (op_type
) E
)
634 print_one_arg (info
, addr
, args
[0], cst
[0],
635 cstlen
[0], dispregno
[0], regno
[0],
636 pregnames
, qi
->length
);
637 outfn (stream
, ",er%d", dispregno
[0]);
641 outfn (stream
, "@(0x%x:%d,", cst
[0], cstlen
[0]);
642 print_one_arg (info
, addr
, args
[1], cst
[1],
643 cstlen
[1], dispregno
[1], regno
[1],
644 pregnames
, qi
->length
);
645 outfn (stream
, ".%c),",
646 (args
[0] & MODE
) == INDEXB
? 'b' : 'w');
647 print_one_arg (info
, addr
, args
[2], cst
[2],
648 cstlen
[2], dispregno
[2], regno
[2],
649 pregnames
, qi
->length
);
653 /* Fill in the args. */
655 const op_type
*args
= q
->args
.nib
;
659 /* Special case handling for the adds and subs instructions
660 since in H8 mode thay can only take the r0-r7 registers
661 but in other (higher) modes they can take the er0-er7
662 registers as well. */
663 if (strcmp (qi
->opcode
->name
, "adds") == 0
664 || strcmp (qi
->opcode
->name
, "subs") == 0)
666 outfn (stream
, "#%d,%s", cst
[0], pregnames
[regno
[1] & 0x7]);
671 nargs
< 3 && args
[nargs
] != (op_type
) E
;
679 print_one_arg (info
, addr
, x
,
680 cst
[nargs
], cstlen
[nargs
],
681 dispregno
[nargs
], regno
[nargs
],
682 pregnames
, qi
->length
);
691 /* xgettext:c-format */
692 outfn (stream
, _("Don't understand 0x%x \n"), looking_for
);
703 /* Fell off the end. */
704 outfn (stream
, ".word\tH'%x,H'%x", data
[0], data
[1]);
709 print_insn_h8300 (bfd_vma addr
, disassemble_info
*info
)
711 return bfd_h8_disassemble (addr
, info
, 0);
715 print_insn_h8300h (bfd_vma addr
, disassemble_info
*info
)
717 return bfd_h8_disassemble (addr
, info
, 1);
721 print_insn_h8300s (bfd_vma addr
, disassemble_info
*info
)
723 return bfd_h8_disassemble (addr
, info
, 2);
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