2003-06-03 Michael Snyder <msnyder@redhat.com>
[deliverable/binutils-gdb.git] / opcodes / h8300-dis.c
1 /* Disassemble h8300 instructions.
2 Copyright 1993, 1994, 1996, 1998, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
18
19 #define DEFINE_TABLE
20
21 #include "sysdep.h"
22 #define h8_opcodes h8ops
23 #include "opcode/h8300.h"
24 #include "dis-asm.h"
25 #include "opintl.h"
26 #include "libiberty.h"
27
28 struct h8_instruction
29 {
30 int length;
31 const struct h8_opcode *opcode;
32 };
33
34 struct h8_instruction *h8_instructions;
35
36 static void bfd_h8_disassemble_init PARAMS ((void));
37 static void print_one_arg PARAMS ((disassemble_info *, bfd_vma, op_type,
38 int, int, int, int, const char **, int));
39 static unsigned int bfd_h8_disassemble PARAMS ((bfd_vma,
40 disassemble_info *,
41 int));
42 static void extract_immediate PARAMS ((FILE *,
43 op_type, int,
44 unsigned char *,
45 int *, int *,
46 const struct h8_opcode *));
47
48 static void print_colon_thingie PARAMS ((op_type *));
49
50 static void
51 print_colon_thingie (op_type *nib)
52 {
53 switch (*nib & SIZE) {
54 case L_2: fprintf (stdout, "2"); break;
55 case L_3:
56 case L_3NZ: fprintf (stdout, "3"); break;
57 case L_4: fprintf (stdout, "4"); break;
58 case L_5: fprintf (stdout, "5"); break;
59 case L_8: fprintf (stdout, "8"); break;
60 case L_16:
61 case L_16U: fprintf (stdout, "16"); break;
62 case L_24: fprintf (stdout, "24"); break;
63 case L_32: fprintf (stdout, "32"); break;
64 }
65 }
66
67 /* Run through the opcodes and sort them into order to make them easy
68 to disassemble. */
69
70 static void
71 bfd_h8_disassemble_init ()
72 {
73 unsigned int i;
74 unsigned int nopcodes;
75 const struct h8_opcode *p;
76 struct h8_instruction *pi;
77
78 nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);
79
80 h8_instructions = (struct h8_instruction *)
81 xmalloc (nopcodes * sizeof (struct h8_instruction));
82
83 for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++)
84 {
85 int n1 = 0;
86 int n2 = 0;
87
88 if ((int) p->data.nib[0] < 16)
89 n1 = (int) p->data.nib[0];
90 else
91 n1 = 0;
92
93 if ((int) p->data.nib[1] < 16)
94 n2 = (int) p->data.nib[1];
95 else
96 n2 = 0;
97
98 /* Just make sure there are an even number of nibbles in it, and
99 that the count is the same as the length. */
100 for (i = 0; p->data.nib[i] != (op_type) E; i++)
101 ;
102
103 if (i & 1)
104 {
105 fprintf (stderr, "Internal error, h8_disassemble_init.\n");
106 abort ();
107 }
108
109 pi->length = i / 2;
110 pi->opcode = p;
111 }
112
113 /* Add entry for the NULL vector terminator. */
114 pi->length = 0;
115 pi->opcode = p;
116 }
117
118 static void
119 extract_immediate (stream, looking_for, thisnib, data, cst, len, q)
120 FILE *stream;
121 op_type looking_for;
122 int thisnib;
123 unsigned char *data;
124 int *cst, *len;
125 const struct h8_opcode *q;
126 {
127 switch (looking_for & SIZE)
128 {
129 case L_2:
130 *len = 2;
131 *cst = thisnib & 3;
132
133 /* DISP2 special treatment. */
134 if ((looking_for & MODE) == DISP)
135 {
136 if (OP_KIND (q->how) == O_MOVAB ||
137 OP_KIND (q->how) == O_MOVAW ||
138 OP_KIND (q->how) == O_MOVAL)
139 {
140 /* Handling for mova insn. */
141 switch (q->args.nib[0] & MODE) {
142 case INDEXB:
143 default:
144 break;
145 case INDEXW:
146 *cst *= 2;
147 break;
148 case INDEXL:
149 *cst *= 4;
150 break;
151 }
152 }
153 else
154 {
155 /* Handling for non-mova insn. */
156 switch (OP_SIZE (q->how)) {
157 default: break;
158 case SW:
159 *cst *= 2;
160 break;
161 case SL:
162 *cst *= 4;
163 break;
164 }
165 }
166 }
167 break;
168 case L_8:
169 *len = 8;
170 *cst = data[0];
171 break;
172 case L_16:
173 case L_16U:
174 *len = 16;
175 *cst = (data[0] << 8) + data [1];
176 #if 0
177 if ((looking_for & SIZE) == L_16)
178 *cst = (short) *cst; /* sign extend */
179 #endif
180 break;
181 case L_32:
182 *len = 32;
183 *cst = (data[0] << 24) + (data[1] << 16) + (data[2] << 8) + data[3];
184 break;
185 default:
186 *len = 0;
187 *cst = 0;
188 fprintf (stream, "DISP bad size\n");
189 break;
190 }
191 }
192
193 static const char *regnames[] =
194 {
195 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
196 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l"
197 };
198 static const char *wregnames[] =
199 {
200 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
201 "e0", "e1", "e2", "e3", "e4", "e5", "e6", "e7"
202 };
203 static const char *lregnames[] =
204 {
205 "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7",
206 "er0", "er1", "er2", "er3", "er4", "er5", "er6", "er7"
207 };
208 static const char *cregnames[] =
209 {
210 "ccr", "exr", "mach", "macl", "", "", "vbr", "sbr"
211 };
212
213 static void
214 print_one_arg (info, addr, x, cst, cstlen, rdisp_n, rn, pregnames, len)
215 disassemble_info *info;
216 bfd_vma addr;
217 op_type x;
218 int cst, cstlen, rdisp_n, rn;
219 const char **pregnames;
220 int len;
221 {
222 void *stream = info->stream;
223 fprintf_ftype outfn = info->fprintf_func;
224
225 if ((x & SIZE) == L_3 ||
226 (x & SIZE) == L_3NZ)
227 {
228 outfn (stream, "#0x%x", (unsigned) cst);
229 }
230 else if ((x & MODE) == IMM)
231 {
232 outfn (stream, "#0x%x", (unsigned) cst);
233 }
234 else if ((x & MODE) == DBIT ||
235 (x & MODE) == KBIT)
236 {
237 outfn (stream, "#%d", (unsigned) cst);
238 }
239 else if ((x & MODE) == CONST_2)
240 outfn (stream, "#2");
241 else if ((x & MODE) == CONST_4)
242 outfn (stream, "#4");
243 else if ((x & MODE) == CONST_8)
244 outfn (stream, "#8");
245 else if ((x & MODE) == CONST_16)
246 outfn (stream, "#16");
247 else if ((x & MODE) == REG)
248 {
249 switch (x & SIZE)
250 {
251 case L_8:
252 outfn (stream, "%s", regnames[rn]);
253 break;
254 case L_16:
255 case L_16U:
256 outfn (stream, "%s", wregnames[rn]);
257 break;
258 case L_P:
259 case L_32:
260 outfn (stream, "%s", lregnames[rn]);
261 break;
262 }
263 }
264 else if ((x & MODE) == LOWREG)
265 {
266 switch (x & SIZE)
267 {
268 case L_8:
269 /* Always take low half of reg. */
270 outfn (stream, "%s.b", regnames[rn < 8 ? rn + 8 : rn]);
271 break;
272 case L_16:
273 case L_16U:
274 /* Always take low half of reg. */
275 outfn (stream, "%s.w", wregnames[rn < 8 ? rn : rn - 8]);
276 break;
277 case L_P:
278 case L_32:
279 outfn (stream, "%s.l", lregnames[rn]);
280 break;
281 }
282 }
283 else if ((x & MODE) == POSTINC)
284 {
285 outfn (stream, "@%s+", pregnames[rn]);
286 }
287 else if ((x & MODE) == POSTDEC)
288 {
289 outfn (stream, "@%s-", pregnames[rn]);
290 }
291 else if ((x & MODE) == PREINC)
292 {
293 outfn (stream, "@+%s", pregnames[rn]);
294 }
295 else if ((x & MODE) == PREDEC)
296 {
297 outfn (stream, "@-%s", pregnames[rn]);
298 }
299 else if ((x & MODE) == IND)
300 {
301 outfn (stream, "@%s", pregnames[rn]);
302 }
303 else if ((x & MODE) == ABS || (x & ABSJMP))
304 {
305 outfn (stream, "@0x%x:%d", (unsigned) cst, cstlen);
306 }
307 else if ((x & MODE) == MEMIND)
308 {
309 outfn (stream, "@@%d (0x%x)", cst, cst);
310 }
311 else if ((x & MODE) == VECIND)
312 {
313 /* FIXME Multiplier should be 2 or 4, depending on processor mode,
314 by which is meant "normal" vs. "middle", "advanced", "maximum". */
315
316 int offset = (cst + 0x80) * 4;
317 outfn (stream, "@@%d (0x%x)", offset, offset);
318 }
319 else if ((x & MODE) == PCREL)
320 {
321 if ((x & SIZE) == L_16 ||
322 (x & SIZE) == L_16U)
323 {
324 outfn (stream, ".%s%d (0x%x)",
325 (short) cst > 0 ? "+" : "",
326 (short) cst,
327 addr + (short) cst + len);
328 }
329 else
330 {
331 outfn (stream, ".%s%d (0x%x)",
332 (char) cst > 0 ? "+" : "",
333 (char) cst,
334 addr + (char) cst + len);
335 }
336 }
337 else if ((x & MODE) == DISP)
338 {
339 outfn (stream, "@(0x%x:%d,%s)", cst, cstlen,
340 pregnames[rdisp_n]);
341 }
342 else if ((x & MODE) == INDEXB)
343 {
344 /* Always take low half of reg. */
345 outfn (stream, "@(0x%x:%d,%s.b)", cst, cstlen,
346 regnames[rdisp_n < 8 ? rdisp_n + 8 : rdisp_n]);
347 }
348 else if ((x & MODE) == INDEXW)
349 {
350 /* Always take low half of reg. */
351 outfn (stream, "@(0x%x:%d,%s.w)", cst, cstlen,
352 wregnames[rdisp_n < 8 ? rdisp_n : rdisp_n - 8]);
353 }
354 else if ((x & MODE) == INDEXL)
355 {
356 outfn (stream, "@(0x%x:%d,%s.l)", cst, cstlen,
357 lregnames[rdisp_n]);
358 }
359 else if (x & CTRL)
360 {
361 outfn (stream, cregnames[rn]);
362 }
363 else if ((x & MODE) == CCR)
364 {
365 outfn (stream, "ccr");
366 }
367 else if ((x & MODE) == EXR)
368 {
369 outfn (stream, "exr");
370 }
371 else if ((x & MODE) == MACREG)
372 {
373 outfn (stream, "mac%c", cst ? 'l' : 'h');
374 }
375 else
376 /* xgettext:c-format */
377 outfn (stream, _("Hmmmm 0x%x"), x);
378 }
379
380 static unsigned int
381 bfd_h8_disassemble (addr, info, mach)
382 bfd_vma addr;
383 disassemble_info *info;
384 int mach;
385 {
386 /* Find the first entry in the table for this opcode. */
387 int regno[3] = { 0, 0, 0 };
388 int dispregno[3] = { 0, 0, 0 };
389 int cst[3] = { 0, 0, 0 };
390 int cstlen[3] = { 0, 0, 0 };
391 static bfd_boolean init = 0;
392 const struct h8_instruction *qi;
393 char const **pregnames = mach != 0 ? lregnames : wregnames;
394 int status;
395 unsigned int l;
396 unsigned char data[MAX_CODE_NIBBLES];
397 void *stream = info->stream;
398 fprintf_ftype outfn = info->fprintf_func;
399
400 if (!init)
401 {
402 bfd_h8_disassemble_init ();
403 init = 1;
404 }
405
406 status = info->read_memory_func (addr, data, 2, info);
407 if (status != 0)
408 {
409 info->memory_error_func (status, addr, info);
410 return -1;
411 }
412
413 for (l = 2; status == 0 && l < sizeof (data) / 2; l += 2)
414 status = info->read_memory_func (addr + l, data + l, 2, info);
415
416 /* Find the exact opcode/arg combo. */
417 for (qi = h8_instructions; qi->opcode->name; qi++)
418 {
419 const struct h8_opcode *q = qi->opcode;
420 op_type *nib = q->data.nib;
421 unsigned int len = 0;
422
423 while (1)
424 {
425 op_type looking_for = *nib;
426 int thisnib = data[len / 2];
427 int opnr;
428
429 thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib / 16) & 0xf);
430 opnr = ((looking_for & OP3) == OP3 ? 2
431 : (looking_for & DST) == DST ? 1 : 0);
432
433 if (looking_for < 16 && looking_for >= 0)
434 {
435 if (looking_for != thisnib)
436 goto fail;
437 }
438 else
439 {
440 if ((int) looking_for & (int) B31)
441 {
442 if (!((thisnib & 0x8) != 0))
443 goto fail;
444
445 looking_for = (op_type) ((int) looking_for & ~(int) B31);
446 thisnib &= 0x7;
447 }
448 else if ((int) looking_for & (int) B30)
449 {
450 if (!((thisnib & 0x8) == 0))
451 goto fail;
452
453 looking_for = (op_type) ((int) looking_for & ~(int) B30);
454 }
455
456 if ((int) looking_for & (int) B21)
457 {
458 if (!((thisnib & 0x4) != 0))
459 goto fail;
460
461 looking_for = (op_type) ((int) looking_for & ~(int) B21);
462 thisnib &= 0xb;
463 }
464 else if ((int) looking_for & (int) B20)
465 {
466 if (!((thisnib & 0x4) == 0))
467 goto fail;
468
469 looking_for = (op_type) ((int) looking_for & ~(int) B20);
470 }
471 if ((int) looking_for & (int) B11)
472 {
473 if (!((thisnib & 0x2) != 0))
474 goto fail;
475
476 looking_for = (op_type) ((int) looking_for & ~(int) B11);
477 thisnib &= 0xd;
478 }
479 else if ((int) looking_for & (int) B10)
480 {
481 if (!((thisnib & 0x2) == 0))
482 goto fail;
483
484 looking_for = (op_type) ((int) looking_for & ~(int) B10);
485 }
486
487 if ((int) looking_for & (int) B01)
488 {
489 if (!((thisnib & 0x1) != 0))
490 goto fail;
491
492 looking_for = (op_type) ((int) looking_for & ~(int) B01);
493 thisnib &= 0xe;
494 }
495 else if ((int) looking_for & (int) B00)
496 {
497 if (!((thisnib & 0x1) == 0))
498 goto fail;
499
500 looking_for = (op_type) ((int) looking_for & ~(int) B00);
501 }
502
503 if (looking_for & IGNORE)
504 {
505 /* Hitachi has declared that IGNORE must be zero. */
506 if (thisnib != 0)
507 goto fail;
508 }
509 else if ((looking_for & MODE) == DATA)
510 {
511 ; /* Skip embedded data. */
512 }
513 else if ((looking_for & MODE) == DBIT)
514 {
515 /* Exclude adds/subs by looking at bit 0 and 2, and
516 make sure the operand size, either w or l,
517 matches by looking at bit 1. */
518 if ((looking_for & 7) != (thisnib & 7))
519 goto fail;
520
521 cst[opnr] = (thisnib & 0x8) ? 2 : 1;
522 }
523 else if ((looking_for & MODE) == DISP ||
524 (looking_for & MODE) == ABS ||
525 (looking_for & MODE) == PCREL ||
526 (looking_for & MODE) == INDEXB ||
527 (looking_for & MODE) == INDEXW ||
528 (looking_for & MODE) == INDEXL)
529 {
530 extract_immediate (stream, looking_for, thisnib,
531 data + len / 2, cst + opnr,
532 cstlen + opnr, q);
533 /* Even address == bra, odd == bra/s. */
534 if (q->how == O (O_BRAS, SB))
535 cst[opnr] -= 1;
536 }
537 else if ((looking_for & MODE) == REG ||
538 (looking_for & MODE) == LOWREG ||
539 (looking_for & MODE) == IND ||
540 (looking_for & MODE) == PREINC ||
541 (looking_for & MODE) == POSTINC ||
542 (looking_for & MODE) == PREDEC ||
543 (looking_for & MODE) == POSTDEC)
544 {
545 regno[opnr] = thisnib;
546 }
547 else if (looking_for & CTRL) /* Control Register */
548 {
549 thisnib &= 7;
550 if (((looking_for & MODE) == CCR && (thisnib != C_CCR)) ||
551 ((looking_for & MODE) == EXR && (thisnib != C_EXR)) ||
552 ((looking_for & MODE) == MACH && (thisnib != C_MACH)) ||
553 ((looking_for & MODE) == MACL && (thisnib != C_MACL)) ||
554 ((looking_for & MODE) == VBR && (thisnib != C_VBR)) ||
555 ((looking_for & MODE) == SBR && (thisnib != C_SBR)))
556 goto fail;
557 if (((looking_for & MODE) == CCR_EXR &&
558 (thisnib != C_CCR && thisnib != C_EXR)) ||
559 ((looking_for & MODE) == VBR_SBR &&
560 (thisnib != C_VBR && thisnib != C_SBR)) ||
561 ((looking_for & MODE) == MACREG &&
562 (thisnib != C_MACH && thisnib != C_MACL)))
563 goto fail;
564 if (((looking_for & MODE) == CC_EX_VB_SB &&
565 (thisnib != C_CCR && thisnib != C_EXR &&
566 thisnib != C_VBR && thisnib != C_SBR)))
567 goto fail;
568
569 regno[opnr] = thisnib;
570 }
571 else if ((looking_for & SIZE) == L_5)
572 {
573 cst[opnr] = data[len / 2] & 31;
574 cstlen[opnr] = 5;
575 }
576 else if ((looking_for & SIZE) == L_4)
577 {
578 cst[opnr] = thisnib;
579 cstlen[opnr] = 4;
580 }
581 else if ((looking_for & SIZE) == L_16 ||
582 (looking_for & SIZE) == L_16U)
583 {
584 cst[opnr] = (data[len / 2]) * 256 + data[(len + 2) / 2];
585 cstlen[opnr] = 16;
586 }
587 else if ((looking_for & MODE) == MEMIND)
588 {
589 cst[opnr] = data[1];
590 }
591 else if ((looking_for & MODE) == VECIND)
592 {
593 cst[opnr] = data[1] & 0x7f;
594 }
595 else if ((looking_for & SIZE) == L_32)
596 {
597 int i = len / 2;
598
599 cst[opnr] = ((data[i] << 24)
600 | (data[i + 1] << 16)
601 | (data[i + 2] << 8)
602 | (data[i + 3]));
603
604 cstlen[opnr] = 32;
605 }
606 else if ((looking_for & SIZE) == L_24)
607 {
608 int i = len / 2;
609
610 cst[opnr] =
611 (data[i] << 16) | (data[i + 1] << 8) | (data[i + 2]);
612 cstlen[opnr] = 24;
613 }
614 else if (looking_for & IGNORE)
615 {
616 ;
617 }
618 else if (looking_for & DISPREG)
619 {
620 dispregno[opnr] = thisnib & 7;
621 }
622 else if ((looking_for & MODE) == KBIT)
623 {
624 switch (thisnib)
625 {
626 case 9:
627 cst[opnr] = 4;
628 break;
629 case 8:
630 cst[opnr] = 2;
631 break;
632 case 0:
633 cst[opnr] = 1;
634 break;
635 default:
636 goto fail;
637 }
638 }
639 else if ((looking_for & SIZE) == L_8)
640 {
641 cstlen[opnr] = 8;
642 cst[opnr] = data[len / 2];
643 }
644 else if ((looking_for & SIZE) == L_3 ||
645 (looking_for & SIZE) == L_3NZ)
646 {
647 cst[opnr] = thisnib & 0x7;
648 if (cst[opnr] == 0 && (looking_for & SIZE) == L_3NZ)
649 goto fail;
650 }
651 else if ((looking_for & SIZE) == L_2)
652 {
653 cstlen[opnr] = 2;
654 cst[opnr] = thisnib & 0x3;
655 }
656 else if ((looking_for & MODE) == MACREG)
657 {
658 cst[opnr] = (thisnib == 3);
659 }
660 else if (looking_for == (op_type) E)
661 {
662 int i;
663
664 for (i = 0; i < qi->length; i++)
665 outfn (stream, "%02x ", data[i]);
666
667 for (; i < 6; i++)
668 outfn (stream, " ");
669
670 outfn (stream, "%s\t", q->name);
671
672 /* Gross. Disgusting. */
673 if (strcmp (q->name, "ldm.l") == 0)
674 {
675 int count, high;
676
677 count = (data[1] / 16) & 0x3;
678 high = regno[1];
679
680 outfn (stream, "@sp+,er%d-er%d", high - count, high);
681 return qi->length;
682 }
683
684 if (strcmp (q->name, "stm.l") == 0)
685 {
686 int count, low;
687
688 count = (data[1] / 16) & 0x3;
689 low = regno[0];
690
691 outfn (stream, "er%d-er%d,@-sp", low, low + count);
692 return qi->length;
693 }
694 if (strcmp (q->name, "rte/l") == 0
695 || strcmp (q->name, "rts/l") == 0)
696 {
697 if (regno[0] == 0)
698 outfn (stream, "er%d", regno[1]);
699 else
700 {
701 outfn (stream, "(er%d-er%d)", regno[1] - regno[0],
702 regno[1]);
703 }
704 return qi->length;
705 }
706 if (strncmp (q->name, "mova", 4) == 0)
707 {
708 op_type *args = q->args.nib;
709
710 if (args[1] == (op_type) E)
711 {
712 /* Short form. */
713 print_one_arg (info, addr, args[0], cst[0],
714 cstlen[0], dispregno[0], regno[0],
715 pregnames, qi->length);
716 outfn (stream, ",er%d", dispregno[0]);
717 }
718 else
719 {
720 outfn (stream, "@(0x%x:%d,", cst[0], cstlen[0]);
721 print_one_arg (info, addr, args[1], cst[1],
722 cstlen[1], dispregno[1], regno[1],
723 pregnames, qi->length);
724 outfn (stream, ".%c),",
725 (args[0] & MODE) == INDEXB ? 'b' : 'w');
726 print_one_arg (info, addr, args[2], cst[2],
727 cstlen[2], dispregno[2], regno[2],
728 pregnames, qi->length);
729 }
730 return qi->length;
731 }
732 /* Fill in the args. */
733 {
734 op_type *args = q->args.nib;
735 int hadone = 0;
736 int nargs;
737
738 for (nargs = 0;
739 nargs < 3 && args[nargs] != (op_type) E;
740 nargs++)
741 {
742 int x = args[nargs];
743
744 if (hadone)
745 outfn (stream, ",");
746
747 print_one_arg (info, addr, x,
748 cst[nargs], cstlen[nargs],
749 dispregno[nargs], regno[nargs],
750 pregnames, qi->length);
751
752 hadone = 1;
753 }
754 }
755
756 return qi->length;
757 }
758 else
759 /* xgettext:c-format */
760 outfn (stream, _("Don't understand 0x%x \n"), looking_for);
761 }
762
763 len++;
764 nib++;
765 }
766
767 fail:
768 ;
769 }
770
771 /* Fell off the end. */
772 outfn (stream, "%02x %02x .word\tH'%x,H'%x",
773 data[0], data[1],
774 data[0], data[1]);
775 return 2;
776 }
777
778 int
779 print_insn_h8300 (addr, info)
780 bfd_vma addr;
781 disassemble_info *info;
782 {
783 return bfd_h8_disassemble (addr, info, 0);
784 }
785
786 int
787 print_insn_h8300h (addr, info)
788 bfd_vma addr;
789 disassemble_info *info;
790 {
791 return bfd_h8_disassemble (addr, info, 1);
792 }
793
794 int
795 print_insn_h8300s (addr, info)
796 bfd_vma addr;
797 disassemble_info *info;
798 {
799 return bfd_h8_disassemble (addr, info, 2);
800 }
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