2eb17800b58e359e881ee3d4e37d453493e9c8be
1 /* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
2 Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc.
4 Contributed by the Center for Software Science at the
5 University of Utah (pa-gdb-bugs@cs.utah.edu).
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
24 #include "opcode/hppa.h"
26 /* Initializer for an array of names of registers.
27 There should be NUM_REGS strings in this initializer. */
29 #define REGISTER_NAMES \
30 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
31 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
32 "r20", "r21", "r22", "arg3", "arg2", "arg1", "arg0", "dp", "ret0", "ret1", \
33 "sp", "r31", "sar", "pcoqh", "pcsqh", "pcoqt", "pcsqt", \
34 "eiem", "iir", "isr", "ior", "ipsw", "goto", "sr4", "sr0", "sr1", "sr2", \
35 "sr3", "sr5", "sr6", "sr7", "cr0", "cr8", "cr9", "ccr", "cr12", "cr13", \
36 "cr24", "cr25", "cr26", "mpsfu_high", "mpsfu_low", "mpsfu_ovflo", "pad", \
37 "fpsr", "fpe1", "fpe2", "fpe3", "fpe4", "fpe5", "fpe6", "fpe7", \
38 "fp4", "fp5", "fp6", "fp7", "fp8", \
39 "fp9", "fp10", "fp11", "fp12", "fp13", "fp14", "fp15", \
40 "fp16", "fp17", "fp18", "fp19", "fp20", "fp21", "fp22", "fp23", \
41 "fp24", "fp25", "fp26", "fp27", "fp28", "fp29", "fp30", "fp31"}
43 static const char *const reg_names
[] = REGISTER_NAMES
;
45 typedef unsigned int CORE_ADDR
;
47 /* Get at various relevent fields of an instruction word. */
51 #define MASK_14 0x3fff
52 #define MASK_21 0x1fffff
54 /* This macro gets bit fields using HP's numbering (MSB = 0) */
56 #define GET_FIELD(X, FROM, TO) \
57 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
59 /* Some of these have been converted to 2-d arrays because they
60 consume less storage this way. If the maintenance becomes a
61 problem, convert them back to const 1-d pointer arrays. */
62 static const char control_reg
[][6] = {
63 "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
64 "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
65 "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
66 "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3",
67 "tr4", "tr5", "tr6", "tr7"
70 static const char compare_cond_names
[][5] = {
71 "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv",
72 ",od", ",tr", ",<>", ",>=", ",>", ",>>=",
75 static const char add_cond_names
[][5] = {
76 "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv",
77 ",od", ",tr", ",<>", ",>=", ",>", ",uv",
80 static const char *const logical_cond_names
[] = {
81 "", ",=", ",<", ",<=", 0, 0, 0, ",od",
82 ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"};
83 static const char *const unit_cond_names
[] = {
84 "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc",
85 ",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc"
87 static const char shift_cond_names
[][4] = {
88 "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"
90 static const char index_compl_names
[][4] = {"", ",m", ",s", ",sm"};
91 static const char short_ldst_compl_names
[][4] = {"", ",ma", "", ",mb"};
92 static const char *const short_bytes_compl_names
[] = {
93 "", ",b,m", ",e", ",e,m"
95 static const char *const float_format_names
[] = {",sgl", ",dbl", "", ",quad"};
96 static const char float_comp_names
[][8] =
98 ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
99 ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>",
100 ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<",
101 ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true"
104 /* For a bunch of different instructions form an index into a
105 completer name table. */
106 #define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
107 GET_FIELD (insn, 18, 18) << 1)
109 #define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
110 (GET_FIELD ((insn), 19, 19) ? 8 : 0))
112 /* Utility function to print registers. Put these first, so gcc's function
113 inlining can do its stuff. */
115 #define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR)
120 disassemble_info
*info
;
122 (*info
->fprintf_func
) (info
->stream
, reg
? reg_names
[reg
] : "r0");
126 fput_reg_r (reg
, info
)
128 disassemble_info
*info
;
130 (*info
->fprintf_func
) (info
->stream
, "%sR", reg
? reg_names
[reg
] : "r0");
134 fput_creg (reg
, info
)
136 disassemble_info
*info
;
138 (*info
->fprintf_func
) (info
->stream
, control_reg
[reg
]);
141 /* print constants with sign */
144 fput_const (num
, info
)
146 disassemble_info
*info
;
149 (*info
->fprintf_func
) (info
->stream
, "-%x", -(int)num
);
151 (*info
->fprintf_func
) (info
->stream
, "%x", num
);
154 /* Routines to extract various sized constants out of hppa
157 /* This assumes that no garbage lies outside of the lower bits of
161 sign_extend (val
, bits
)
164 return (int)(val
>> (bits
- 1) ? (-1 << bits
) | val
: val
);
167 /* For many immediate values the sign bit is the low bit! */
170 low_sign_extend (val
, bits
)
173 return (int)((val
& 0x1 ? (-1 << (bits
- 1)) : 0) | val
>> 1);
175 /* extract the immediate field from a ld{bhw}s instruction */
179 get_field (val
, from
, to
)
180 unsigned val
, from
, to
;
182 val
= val
>> (31 - to
);
183 return val
& ((1 << (32 - from
)) - 1);
187 set_field (val
, from
, to
, new_val
)
188 unsigned *val
, from
, to
, new_val
;
190 unsigned mask
= ~((1 << (to
- from
+ 1)) << (31 - from
));
191 return *val
= (*val
& mask
) | (new_val
<< (31 - from
));
195 /* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
200 return GET_FIELD (word
, 18, 18) << 2 | GET_FIELD (word
, 16, 17);
204 extract_5_load (word
)
207 return low_sign_extend (word
>> 16 & MASK_5
, 5);
210 /* extract the immediate field from a st{bhw}s instruction */
212 extract_5_store (word
)
215 return low_sign_extend (word
& MASK_5
, 5);
218 /* extract the immediate field from a break instruction */
220 extract_5r_store (word
)
223 return (word
& MASK_5
);
226 /* extract the immediate field from a {sr}sm instruction */
228 extract_5R_store (word
)
231 return (word
>> 16 & MASK_5
);
234 /* extract the immediate field from a bb instruction */
236 extract_5Q_store (word
)
239 return (word
>> 21 & MASK_5
);
242 /* extract an 11 bit immediate field */
247 return low_sign_extend (word
& MASK_11
, 11);
250 /* extract a 14 bit immediate field */
255 return low_sign_extend (word
& MASK_14
, 14);
259 /* deposit a 14 bit constant in a word */
261 deposit_14 (opnd
, word
)
265 unsigned sign
= (opnd
< 0 ? 1 : 0);
267 return word
| ((unsigned)opnd
<< 1 & MASK_14
) | sign
;
271 /* extract a 21 bit constant */
281 val
= GET_FIELD (word
, 20, 20);
283 val
|= GET_FIELD (word
, 9, 19);
285 val
|= GET_FIELD (word
, 5, 6);
287 val
|= GET_FIELD (word
, 0, 4);
289 val
|= GET_FIELD (word
, 7, 8);
290 return sign_extend (val
, 21) << 11;
294 /* deposit a 21 bit constant in a word. Although 21 bit constants are
295 usually the top 21 bits of a 32 bit constant, we assume that only
296 the low 21 bits of opnd are relevant */
299 deposit_21 (opnd
, word
)
304 val
|= GET_FIELD (opnd
, 11 + 14, 11 + 18);
306 val
|= GET_FIELD (opnd
, 11 + 12, 11 + 13);
308 val
|= GET_FIELD (opnd
, 11 + 19, 11 + 20);
310 val
|= GET_FIELD (opnd
, 11 + 1, 11 + 11);
312 val
|= GET_FIELD (opnd
, 11 + 0, 11 + 0);
317 /* extract a 12 bit constant from branch instructions */
323 return sign_extend (GET_FIELD (word
, 19, 28) |
324 GET_FIELD (word
, 29, 29) << 10 |
325 (word
& 0x1) << 11, 12) << 2;
328 /* extract a 17 bit constant from branch instructions, returning the
329 19 bit signed value. */
335 return sign_extend (GET_FIELD (word
, 19, 28) |
336 GET_FIELD (word
, 29, 29) << 10 |
337 GET_FIELD (word
, 11, 15) << 11 |
338 (word
& 0x1) << 16, 17) << 2;
341 /* Print one instruction. */
343 print_insn_hppa (memaddr
, info
)
345 disassemble_info
*info
;
347 unsigned int insn
, i
, op
;
348 FILE *stream
= info
->stream
;
352 (*info
->read_memory_func
) (memaddr
, (bfd_byte
*) &insn
, sizeof (insn
),
356 (*info
->memory_error_func
) (status
, memaddr
, info
);
361 for (i
= 0; i
< NUMOPCODES
; ++i
)
363 const struct pa_opcode
*opcode
= &pa_opcodes
[i
];
364 if ((insn
& opcode
->mask
) == opcode
->match
)
366 register const char *s
;
368 (*info
->fprintf_func
) (info
->stream
, "%s", opcode
->name
);
370 if (!strchr ("cCY<?!@-+&U>~nZFIMad", opcode
->args
[0]))
371 (*info
->fprintf_func
) (info
->stream
, " ");
372 for (s
= opcode
->args
; *s
!= '\0'; ++s
)
377 fput_reg (GET_FIELD (insn
, 11, 15), info
);
380 if (GET_FIELD (insn
, 25, 25))
381 fput_reg_r (GET_FIELD (insn
, 11, 15), info
);
383 fput_reg (GET_FIELD (insn
, 11, 15), info
);
386 fput_reg (GET_FIELD (insn
, 6, 10), info
);
389 fput_creg (GET_FIELD (insn
, 6, 10), info
);
392 if (GET_FIELD (insn
, 25, 25))
393 fput_reg_r (GET_FIELD (insn
, 6, 10), info
);
395 fput_reg (GET_FIELD (insn
, 6, 10), info
);
398 fput_reg (GET_FIELD (insn
, 27, 31), info
);
401 if (GET_FIELD (insn
, 25, 25))
402 fput_reg_r (GET_FIELD (insn
, 27, 31), info
);
404 fput_reg (GET_FIELD (insn
, 27, 31), info
);
407 fput_creg (GET_FIELD (insn
, 6, 10), info
);
410 fput_reg (GET_FIELD (insn
, 11, 15), info
);
413 fput_reg (GET_FIELD (insn
, 27, 31), info
);
416 fput_reg (GET_FIELD (insn
, 16, 20), info
);
419 fput_reg (GET_FIELD (insn
, 21, 25), info
);
422 fput_const (extract_5_load (insn
), info
);
425 fprintf_filtered (stream
, "sr%d", GET_FIELD (insn
, 16, 17));
428 (*info
->fprintf_func
) (info
->stream
, "sr%d", extract_3 (insn
));
431 (*info
->fprintf_func
) (info
->stream
, "%s ",
432 index_compl_names
[GET_COMPL (insn
)]);
435 (*info
->fprintf_func
) (info
->stream
, "%s ",
436 short_ldst_compl_names
[GET_COMPL (insn
)]);
439 (*info
->fprintf_func
) (info
->stream
, "%s ",
440 short_bytes_compl_names
[GET_COMPL (insn
)]);
442 /* these four conditions are for the set of instructions
443 which distinguish true/false conditions by opcode rather
444 than by the 'f' bit (sigh): comb, comib, addb, addib */
446 fputs_filtered (compare_cond_names
[GET_FIELD (insn
, 16, 18)],
450 fputs_filtered (compare_cond_names
[GET_FIELD (insn
, 16, 18) + 8],
454 fputs_filtered (add_cond_names
[GET_FIELD (insn
, 16, 18) + 8],
458 (*info
->fprintf_func
) (info
->stream
, "%s",
459 compare_cond_names
[GET_COND (insn
)]);
463 (*info
->fprintf_func
) (info
->stream
, "%s",
464 add_cond_names
[GET_FIELD (insn
, 16, 18)]);
468 (*info
->fprintf_func
) (info
->stream
, "%s ",
469 logical_cond_names
[GET_COND (insn
)]);
472 (*info
->fprintf_func
) (info
->stream
, "%s ",
473 unit_cond_names
[GET_COND (insn
)]);
477 (*info
->fprintf_func
) (info
->stream
, "%s ",
478 shift_cond_names
[GET_FIELD (insn
, 16, 18)]);
481 fput_const (extract_5_store (insn
), info
);
484 fput_const (extract_5R_store (insn
), info
);
487 fput_const (extract_5Q_store (insn
), info
);
490 fput_const (extract_11 (insn
), info
);
493 fput_const (extract_14 (insn
), info
);
496 fput_const (extract_21 (insn
), info
);
500 (*info
->fprintf_func
) (info
->stream
, ",n ");
502 (*info
->fprintf_func
) (info
->stream
, " ");
505 (*info
->print_address_func
) (memaddr
+ 8 + extract_12 (insn
),
509 /* don't interpret an address if it's an external branch
511 op
= GET_FIELD (insn
, 0, 5);
512 if (op
!= 0x38 /* be */ && op
!= 0x39 /* ble */)
513 (*info
->print_address_func
) ((memaddr
+ 8
514 + extract_17 (insn
)),
517 fput_const (extract_17 (insn
), info
);
520 (*info
->fprintf_func
) (info
->stream
, "%d",
521 31 - GET_FIELD (insn
, 22, 26));
524 (*info
->fprintf_func
) (info
->stream
, "%d",
525 GET_FIELD (insn
, 22, 26));
528 (*info
->fprintf_func
) (info
->stream
, "%d",
529 32 - GET_FIELD (insn
, 27, 31));
532 fput_const (GET_FIELD (insn
, 6, 18), info
);
535 if (GET_FIELD (insn
, 26, 26))
536 (*info
->fprintf_func
) (info
->stream
, ",m ");
538 (*info
->fprintf_func
) (info
->stream
, " ");
541 fput_const (GET_FIELD (insn
, 6, 31), info
);
544 (*info
->fprintf_func
) (info
->stream
, ",%d", GET_FIELD (insn
, 23, 25));
547 fput_const ((GET_FIELD (insn
, 6,20) << 5 |
548 GET_FIELD (insn
, 27, 31)), info
);
551 fput_const (GET_FIELD (insn
, 6, 20), info
);
554 fput_const ((GET_FIELD (insn
, 6, 22) << 5 |
555 GET_FIELD (insn
, 27, 31)), info
);
558 fput_const ((GET_FIELD (insn
, 11, 20) << 5 |
559 GET_FIELD (insn
, 27, 31)), info
);
562 fput_const ((GET_FIELD (insn
, 16, 20) << 5 |
563 GET_FIELD (insn
, 27, 31)), info
);
566 (*info
->fprintf_func
) (info
->stream
, "%d", GET_FIELD (insn
, 23, 25));
569 /* if no destination completer, need a space here */
570 if (GET_FIELD (insn
, 21, 22) == 1)
571 fputs_filtered (float_format_names
[GET_FIELD (insn
, 19, 20)],
574 (*info
->fprintf_func
) (info
->stream
, "%s ",
575 float_format_names
[GET_FIELD
579 (*info
->fprintf_func
) (info
->stream
, "%s ",
580 float_format_names
[GET_FIELD (insn
,
584 fputs_filtered (float_format_names
[GET_FIELD
585 (insn
, 26, 26)], info
);
588 /* if no destination completer, need a space here */
589 if (GET_FIELD (insn
, 21, 22) == 1)
590 fputs_filtered (float_format_names
[GET_FIELD (insn
, 20, 20)],
593 fprintf_filtered (stream
, "%s ",
594 float_format_names
[GET_FIELD
598 if (GET_FIELD (insn
, 24, 24))
599 fput_reg_r (GET_FIELD (insn
, 6, 10), info
);
601 fput_reg (GET_FIELD (insn
, 6, 10), info
);
605 if (GET_FIELD (insn
, 19, 19))
606 fput_reg_r (GET_FIELD (insn
, 11, 15), info
);
608 fput_reg (GET_FIELD (insn
, 11, 15), info
);
611 fputs_filtered (float_comp_names
[GET_FIELD (insn
, 27, 31)],
615 (*info
->fprintf_func
) (info
->stream
, "%c", *s
);
622 (*info
->fprintf_func
) (info
->stream
, "#%8x", insn
);
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