1 /* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
2 Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc.
4 Contributed by the Center for Software Science at the
5 University of Utah (pa-gdb-bugs@cs.utah.edu).
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 #include "opcode/hppa.h"
27 /* Integer register names, indexed by the numbers which appear in the
29 static const char *const reg_names
[] =
30 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
31 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
32 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1",
35 /* Floating point register names, indexed by the numbers which appear in the
37 static const char *const fp_reg_names
[] =
38 {"fpsr", "fpe2", "fpe4", "fpe6",
39 "fr4", "fr5", "fr6", "fr7", "fr8",
40 "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
41 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
42 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"};
44 typedef unsigned int CORE_ADDR
;
46 /* Get at various relevent fields of an instruction word. */
51 #define MASK_14 0x3fff
52 #define MASK_21 0x1fffff
54 /* This macro gets bit fields using HP's numbering (MSB = 0) */
56 #define GET_FIELD(X, FROM, TO) \
57 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
59 /* Some of these have been converted to 2-d arrays because they
60 consume less storage this way. If the maintenance becomes a
61 problem, convert them back to const 1-d pointer arrays. */
62 static const char control_reg
[][6] = {
63 "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
64 "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
65 "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
66 "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3",
67 "tr4", "tr5", "tr6", "tr7"
70 static const char compare_cond_names
[][5] = {
71 "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv", ",od",
72 ",tr", ",<>", ",>=", ",>", ",>>=", ",>>", ",nsv", ",ev"
74 static const char compare_cond_64_names
[][6] = {
75 "", ",*=", ",*<", ",*<=", ",*<<", ",*<<=", ",*sv", ",*od",
76 ",*tr", ",*<>", ",*>=", ",*>", ",*>>=", ",*>>", ",*nsv", ",*ev"
78 static const char cmpib_cond_64_names
[][6] = {
79 ",*<<", ",*=", ",*<", ",*<=", ",*>>=", ",*<>", ",*>=", ",*>"
81 static const char add_cond_names
[][5] = {
82 "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv", ",od",
83 ",tr", ",<>", ",>=", ",>", ",uv", ",vnz", ",nsv", ",ev"
85 static const char add_cond_64_names
[][6] = {
86 ",*", ",*=", ",*<", ",*<=", ",*nuv", ",*znv", ",*sv", ",*od",
87 ",*tr", ",*<>", ",*>=", ",*>", ",*uv", ",*vnz", ",*nsv", ",*ev"
89 static const char wide_add_cond_names
[][5] = {
90 "", ",=", ",<", ",<=", ",nuv", ",*=", ",*<", ",*<=",
91 ",tr", ",<>", ",>=", ",>", ",uv", ",*<>", ",*>=", ",*>"
93 static const char *const logical_cond_names
[] = {
94 "", ",=", ",<", ",<=", 0, 0, 0, ",od",
95 ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"};
96 static const char *const logical_cond_64_names
[] = {
97 ",*", ",*=", ",*<", ",*<=", 0, 0, 0, ",*od",
98 ",*tr", ",*<>", ",*>=", ",*>", 0, 0, 0, ",*ev"};
99 static const char *const unit_cond_names
[] = {
100 "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc",
101 ",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc"
103 static const char *const unit_cond_64_names
[] = {
104 ",*", ",*swz", ",*sbz", ",*shz", ",*sdc", ",*swc", ",*sbc", ",*shc",
105 ",*tr", ",*nwz", ",*nbz", ",*nhz", ",*ndc", ",*nwc", ",*nbc", ",*nhc"
107 static const char shift_cond_names
[][4] = {
108 "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"
110 static const char shift_cond_64_names
[][5] = {
111 ",*", ",*=", ",*<", ",*od", ",*tr", ",*<>", ",*>=", ",*ev"
113 static const char bb_cond_64_names
[][5] = {
116 static const char index_compl_names
[][4] = {"", ",m", ",s", ",sm"};
117 static const char short_ldst_compl_names
[][4] = {"", ",ma", "", ",mb"};
118 static const char *const short_bytes_compl_names
[] = {
119 "", ",b,m", ",e", ",e,m"
121 static const char *const float_format_names
[] = {",sgl", ",dbl", "", ",quad"};
122 static const char float_comp_names
[][8] =
124 ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
125 ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>",
126 ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<",
127 ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true"
129 static const char *const signed_unsigned_names
[][3] = {",u", ",s"};
130 static const char *const mix_half_names
[][3] = {",l", ",r"};
131 static const char *const saturation_names
[][4] = {",us", ",ss", 0, ""};
132 static const char *const read_write_names
[][3] = {",r", ",w"};
133 static const char *const add_compl_names
[] = {
137 /* For a bunch of different instructions form an index into a
138 completer name table. */
139 #define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
140 GET_FIELD (insn, 18, 18) << 1)
142 #define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
143 (GET_FIELD ((insn), 19, 19) ? 8 : 0))
145 /* Utility function to print registers. Put these first, so gcc's function
146 inlining can do its stuff. */
148 #define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR)
153 disassemble_info
*info
;
155 (*info
->fprintf_func
) (info
->stream
, reg
? reg_names
[reg
] : "r0");
159 fput_fp_reg (reg
, info
)
161 disassemble_info
*info
;
163 (*info
->fprintf_func
) (info
->stream
, reg
? fp_reg_names
[reg
] : "fr0");
167 fput_fp_reg_r (reg
, info
)
169 disassemble_info
*info
;
171 /* Special case floating point exception registers. */
173 (*info
->fprintf_func
) (info
->stream
, "fpe%d", reg
* 2 + 1);
175 (*info
->fprintf_func
) (info
->stream
, "%sR", reg
? fp_reg_names
[reg
]
180 fput_creg (reg
, info
)
182 disassemble_info
*info
;
184 (*info
->fprintf_func
) (info
->stream
, control_reg
[reg
]);
187 /* print constants with sign */
190 fput_const (num
, info
)
192 disassemble_info
*info
;
195 (*info
->fprintf_func
) (info
->stream
, "-%x", -(int)num
);
197 (*info
->fprintf_func
) (info
->stream
, "%x", num
);
200 /* Routines to extract various sized constants out of hppa
203 /* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
208 return GET_FIELD (word
, 18, 18) << 2 | GET_FIELD (word
, 16, 17);
212 extract_5_load (word
)
215 return low_sign_extend (word
>> 16 & MASK_5
, 5);
218 /* extract the immediate field from a st{bhw}s instruction */
220 extract_5_store (word
)
223 return low_sign_extend (word
& MASK_5
, 5);
226 /* extract the immediate field from a break instruction */
228 extract_5r_store (word
)
231 return (word
& MASK_5
);
234 /* extract the immediate field from a {sr}sm instruction */
236 extract_5R_store (word
)
239 return (word
>> 16 & MASK_5
);
242 /* extract the 10 bit immediate field from a {sr}sm instruction */
244 extract_10U_store (word
)
247 return (word
>> 16 & MASK_10
);
250 /* extract the immediate field from a bb instruction */
252 extract_5Q_store (word
)
255 return (word
>> 21 & MASK_5
);
258 /* extract an 11 bit immediate field */
263 return low_sign_extend (word
& MASK_11
, 11);
266 /* extract a 14 bit immediate field */
271 return low_sign_extend (word
& MASK_14
, 14);
274 /* extract a 21 bit constant */
284 val
= GET_FIELD (word
, 20, 20);
286 val
|= GET_FIELD (word
, 9, 19);
288 val
|= GET_FIELD (word
, 5, 6);
290 val
|= GET_FIELD (word
, 0, 4);
292 val
|= GET_FIELD (word
, 7, 8);
293 return sign_extend (val
, 21) << 11;
296 /* extract a 12 bit constant from branch instructions */
302 return sign_extend (GET_FIELD (word
, 19, 28) |
303 GET_FIELD (word
, 29, 29) << 10 |
304 (word
& 0x1) << 11, 12) << 2;
307 /* extract a 17 bit constant from branch instructions, returning the
308 19 bit signed value. */
314 return sign_extend (GET_FIELD (word
, 19, 28) |
315 GET_FIELD (word
, 29, 29) << 10 |
316 GET_FIELD (word
, 11, 15) << 11 |
317 (word
& 0x1) << 16, 17) << 2;
320 /* Print one instruction. */
322 print_insn_hppa (memaddr
, info
)
324 disassemble_info
*info
;
327 unsigned int insn
, i
;
331 (*info
->read_memory_func
) (memaddr
, buffer
, sizeof (buffer
), info
);
334 (*info
->memory_error_func
) (status
, memaddr
, info
);
339 insn
= bfd_getb32 (buffer
);
341 for (i
= 0; i
< NUMOPCODES
; ++i
)
343 const struct pa_opcode
*opcode
= &pa_opcodes
[i
];
344 if ((insn
& opcode
->mask
) == opcode
->match
)
346 register const char *s
;
348 (*info
->fprintf_func
) (info
->stream
, "%s", opcode
->name
);
350 if (!strchr ("cfCY?-+nHNZFIu", opcode
->args
[0]))
351 (*info
->fprintf_func
) (info
->stream
, " ");
352 for (s
= opcode
->args
; *s
!= '\0'; ++s
)
357 fput_reg (GET_FIELD (insn
, 11, 15), info
);
361 fput_reg (GET_FIELD (insn
, 6, 10), info
);
364 fput_creg (GET_FIELD (insn
, 6, 10), info
);
367 fput_reg (GET_FIELD (insn
, 27, 31), info
);
370 /* Handle floating point registers. */
375 fput_fp_reg (GET_FIELD (insn
, 27, 31), info
);
378 if (GET_FIELD (insn
, 25, 25))
379 fput_fp_reg_r (GET_FIELD (insn
, 27, 31), info
);
381 fput_fp_reg (GET_FIELD (insn
, 27, 31), info
);
384 if (GET_FIELD (insn
, 25, 25))
385 fput_fp_reg_r (GET_FIELD (insn
, 6, 10), info
);
387 fput_fp_reg (GET_FIELD (insn
, 6, 10), info
);
390 if (GET_FIELD (insn
, 24, 24))
391 fput_fp_reg_r (GET_FIELD (insn
, 6, 10), info
);
393 fput_fp_reg (GET_FIELD (insn
, 6, 10), info
);
397 if (GET_FIELD (insn
, 25, 25))
398 fput_fp_reg_r (GET_FIELD (insn
, 11, 15), info
);
400 fput_fp_reg (GET_FIELD (insn
, 11, 15), info
);
403 if (GET_FIELD (insn
, 19, 19))
404 fput_fp_reg_r (GET_FIELD (insn
, 11, 15), info
);
406 fput_fp_reg (GET_FIELD (insn
, 11, 15), info
);
410 int reg
= GET_FIELD (insn
, 21, 22);
411 reg
|= GET_FIELD (insn
, 16, 18) << 2;
412 if (GET_FIELD (insn
, 23, 23) != 0)
413 fput_fp_reg_r (reg
, info
);
415 fput_fp_reg (reg
, info
);
420 int reg
= GET_FIELD (insn
, 6, 10);
422 reg
|= (GET_FIELD (insn
, 26, 26) << 4);
423 fput_fp_reg (reg
, info
);
428 int reg
= GET_FIELD (insn
, 11, 15);
430 reg
|= (GET_FIELD (insn
, 26, 26) << 4);
431 fput_fp_reg (reg
, info
);
436 int reg
= GET_FIELD (insn
, 27, 31);
438 reg
|= (GET_FIELD (insn
, 26, 26) << 4);
439 fput_fp_reg (reg
, info
);
444 int reg
= GET_FIELD (insn
, 21, 25);
446 reg
|= (GET_FIELD (insn
, 26, 26) << 4);
447 fput_fp_reg (reg
, info
);
452 int reg
= GET_FIELD (insn
, 16, 20);
454 reg
|= (GET_FIELD (insn
, 26, 26) << 4);
455 fput_fp_reg (reg
, info
);
461 fput_const (extract_5_load (insn
), info
);
464 (*info
->fprintf_func
) (info
->stream
,
465 "sr%d", GET_FIELD (insn
, 16, 17));
469 (*info
->fprintf_func
) (info
->stream
, "sr%d", extract_3 (insn
));
472 /* Handle completers. */
477 (*info
->fprintf_func
) (info
->stream
, "%s ",
478 index_compl_names
[GET_COMPL (insn
)]);
481 (*info
->fprintf_func
) (info
->stream
, "%s ",
482 short_ldst_compl_names
[GET_COMPL (insn
)]);
485 (*info
->fprintf_func
) (info
->stream
, "%s ",
486 short_bytes_compl_names
[GET_COMPL (insn
)]);
489 (*info
->fprintf_func
) (info
->stream
, ",l");
492 (*info
->fprintf_func
) (info
->stream
, "%s ",
493 read_write_names
[GET_FIELD (insn
, 25, 25)]);
496 (*info
->fprintf_func
) (info
->stream
, ",w");
499 if (GET_FIELD (insn
, 23, 26) == 5)
500 (*info
->fprintf_func
) (info
->stream
, ",r");
503 if (GET_FIELD (insn
, 26, 26))
504 (*info
->fprintf_func
) (info
->stream
, ",m ");
506 (*info
->fprintf_func
) (info
->stream
, " ");
509 if (GET_FIELD (insn
, 25, 25))
510 (*info
->fprintf_func
) (info
->stream
, ",i");
513 if (!GET_FIELD (insn
, 21, 21))
514 (*info
->fprintf_func
) (info
->stream
, ",z");
517 (*info
->fprintf_func
)
518 (info
->stream
, "%s", add_compl_names
[GET_FIELD
522 (*info
->fprintf_func
)
523 (info
->stream
, ",dc%s", add_compl_names
[GET_FIELD
527 (*info
->fprintf_func
)
528 (info
->stream
, ",c%s", add_compl_names
[GET_FIELD
532 if (GET_FIELD (insn
, 20, 20))
533 (*info
->fprintf_func
) (info
->stream
, ",tsv");
536 (*info
->fprintf_func
) (info
->stream
, ",tc");
537 if (GET_FIELD (insn
, 20, 20))
538 (*info
->fprintf_func
) (info
->stream
, ",tsv");
541 (*info
->fprintf_func
) (info
->stream
, ",db");
542 if (GET_FIELD (insn
, 20, 20))
543 (*info
->fprintf_func
) (info
->stream
, ",tsv");
546 (*info
->fprintf_func
) (info
->stream
, ",b");
547 if (GET_FIELD (insn
, 20, 20))
548 (*info
->fprintf_func
) (info
->stream
, ",tsv");
551 if (GET_FIELD (insn
, 25, 25))
552 (*info
->fprintf_func
) (info
->stream
, ",tc");
555 /* EXTRD/W has a following condition. */
557 (*info
->fprintf_func
)
558 (info
->stream
, "%s", signed_unsigned_names
[GET_FIELD
561 (*info
->fprintf_func
)
562 (info
->stream
, "%s ", signed_unsigned_names
[GET_FIELD
566 (*info
->fprintf_func
)
567 (info
->stream
, "%s", mix_half_names
[GET_FIELD
571 (*info
->fprintf_func
)
572 (info
->stream
, "%s", saturation_names
[GET_FIELD
576 (*info
->fprintf_func
)
577 (info
->stream
, ",%d%d%d%d ",
578 GET_FIELD (insn
, 17, 18), GET_FIELD (insn
, 20, 21),
579 GET_FIELD (insn
, 22, 23), GET_FIELD (insn
, 24, 25));
584 /* Handle conditions. */
591 (*info
->fprintf_func
) (info
->stream
, "%s ",
592 float_comp_names
[GET_FIELD
596 /* these four conditions are for the set of instructions
597 which distinguish true/false conditions by opcode
598 rather than by the 'f' bit (sigh): comb, comib,
601 fputs_filtered (compare_cond_names
[GET_FIELD (insn
, 16, 18)],
605 fputs_filtered (compare_cond_names
[GET_FIELD (insn
, 16, 18)
609 fputs_filtered (compare_cond_64_names
[GET_FIELD (insn
, 16, 18)],
613 fputs_filtered (compare_cond_64_names
[GET_FIELD (insn
, 16, 18)
617 fputs_filtered (cmpib_cond_64_names
[GET_FIELD (insn
, 16, 18)],
621 fputs_filtered (compare_cond_names
[GET_FIELD (insn
, 16, 18)
622 + GET_FIELD (insn
, 4, 4) * 8], info
);
625 fputs_filtered (add_cond_names
[GET_FIELD (insn
, 16, 18)
626 + GET_FIELD (insn
, 4, 4) * 8], info
);
629 (*info
->fprintf_func
) (info
->stream
, "%s ",
630 compare_cond_names
[GET_COND (insn
)]);
633 (*info
->fprintf_func
) (info
->stream
, "%s ",
634 compare_cond_64_names
[GET_COND (insn
)]);
637 (*info
->fprintf_func
) (info
->stream
, "%s ",
638 add_cond_names
[GET_COND (insn
)]);
641 (*info
->fprintf_func
) (info
->stream
, "%s ",
642 add_cond_64_names
[GET_COND (insn
)]);
645 (*info
->fprintf_func
) (info
->stream
, "%s",
646 add_cond_names
[GET_FIELD (insn
, 16, 18)]);
650 (*info
->fprintf_func
) (info
->stream
, "%s",
651 add_cond_names
[GET_FIELD (insn
, 16, 18)
655 (*info
->fprintf_func
)
657 wide_add_cond_names
[GET_FIELD (insn
, 16, 18)]);
661 (*info
->fprintf_func
)
663 wide_add_cond_names
[GET_FIELD (insn
, 16, 18) + 8]);
667 (*info
->fprintf_func
) (info
->stream
, "%s ",
668 logical_cond_names
[GET_COND (insn
)]);
671 (*info
->fprintf_func
) (info
->stream
, "%s ",
672 logical_cond_64_names
[GET_COND (insn
)]);
675 (*info
->fprintf_func
) (info
->stream
, "%s ",
676 unit_cond_names
[GET_COND (insn
)]);
679 (*info
->fprintf_func
) (info
->stream
, "%s ",
680 unit_cond_64_names
[GET_COND (insn
)]);
685 (*info
->fprintf_func
)
687 shift_cond_names
[GET_FIELD (insn
, 16, 18)]);
689 /* If the next character in args is 'n', it will handle
690 putting out the space. */
692 (*info
->fprintf_func
) (info
->stream
, " ");
695 (*info
->fprintf_func
) (info
->stream
, "%s",
696 shift_cond_64_names
[GET_FIELD (insn
, 16, 18)]);
699 (*info
->fprintf_func
)
701 bb_cond_64_names
[GET_FIELD (insn
, 16, 16)]);
703 /* If the next character in args is 'n', it will handle
704 putting out the space. */
706 (*info
->fprintf_func
) (info
->stream
, " ");
713 fput_const (extract_5_store (insn
), info
);
716 fput_const (extract_5r_store (insn
), info
);
719 fput_const (extract_5R_store (insn
), info
);
722 fput_const (extract_10U_store (insn
), info
);
725 fput_const (extract_5Q_store (insn
), info
);
728 fput_const (extract_11 (insn
), info
);
731 fput_const (extract_14 (insn
), info
);
734 fput_const (extract_21 (insn
), info
);
738 (*info
->fprintf_func
) (info
->stream
, ",n ");
740 (*info
->fprintf_func
) (info
->stream
, " ");
743 if ((insn
& 0x20) && s
[1])
744 (*info
->fprintf_func
) (info
->stream
, ",n ");
745 else if (insn
& 0x20)
746 (*info
->fprintf_func
) (info
->stream
, ",n");
748 (*info
->fprintf_func
) (info
->stream
, " ");
751 (*info
->print_address_func
) (memaddr
+ 8 + extract_12 (insn
),
755 /* 17 bit PC-relative branch. */
756 (*info
->print_address_func
) ((memaddr
+ 8
757 + extract_17 (insn
)),
761 /* 17 bit displacement. This is an offset from a register
762 so it gets disasssembled as just a number, not any sort
764 fput_const (extract_17 (insn
), info
);
767 (*info
->fprintf_func
) (info
->stream
, "%d",
768 GET_FIELD (insn
, 24, 25));
771 (*info
->fprintf_func
) (info
->stream
, "%d",
772 GET_FIELD (insn
, 22, 25));
775 (*info
->fprintf_func
) (info
->stream
, "%sar");
778 (*info
->fprintf_func
) (info
->stream
, "%d",
779 31 - GET_FIELD (insn
, 22, 26));
784 num
= GET_FIELD (insn
, 20, 20) << 5;
785 num
|= GET_FIELD (insn
, 22, 26);
786 (*info
->fprintf_func
) (info
->stream
, "%d", 63 - num
);
790 (*info
->fprintf_func
) (info
->stream
, "%d",
791 GET_FIELD (insn
, 22, 26));
796 num
= GET_FIELD (insn
, 20, 20) << 5;
797 num
|= GET_FIELD (insn
, 22, 26);
798 (*info
->fprintf_func
) (info
->stream
, "%d", num
);
802 (*info
->fprintf_func
) (info
->stream
, "%d",
803 32 - GET_FIELD (insn
, 27, 31));
808 num
= (GET_FIELD (insn
, 23, 23) + 1) * 32;
809 num
-= GET_FIELD (insn
, 27, 31);
810 (*info
->fprintf_func
) (info
->stream
, "%d", num
);
816 num
= (GET_FIELD (insn
, 19, 19) + 1) * 32;
817 num
-= GET_FIELD (insn
, 27, 31);
818 (*info
->fprintf_func
) (info
->stream
, "%d", num
);
822 fput_const (GET_FIELD (insn
, 20, 28), info
);
825 fput_const (GET_FIELD (insn
, 6, 18), info
);
828 fput_const (GET_FIELD (insn
, 6, 31), info
);
831 (*info
->fprintf_func
) (info
->stream
, ",%d", GET_FIELD (insn
, 23, 25));
834 fput_const ((GET_FIELD (insn
, 6,20) << 5 |
835 GET_FIELD (insn
, 27, 31)), info
);
838 fput_const (GET_FIELD (insn
, 6, 20), info
);
841 fput_const ((GET_FIELD (insn
, 6, 22) << 5 |
842 GET_FIELD (insn
, 27, 31)), info
);
845 fput_const ((GET_FIELD (insn
, 11, 20) << 5 |
846 GET_FIELD (insn
, 27, 31)), info
);
849 fput_const ((GET_FIELD (insn
, 16, 20) << 5 |
850 GET_FIELD (insn
, 27, 31)), info
);
853 (*info
->fprintf_func
) (info
->stream
, ",%d", GET_FIELD (insn
, 23, 25));
856 /* if no destination completer and not before a completer
857 for fcmp, need a space here */
858 if (s
[1] == 'G' || s
[1] == '?')
859 fputs_filtered (float_format_names
[GET_FIELD (insn
, 19, 20)],
862 (*info
->fprintf_func
) (info
->stream
, "%s ",
863 float_format_names
[GET_FIELD
867 (*info
->fprintf_func
) (info
->stream
, "%s ",
868 float_format_names
[GET_FIELD (insn
,
872 if (GET_FIELD (insn
, 26, 26) == 1)
873 (*info
->fprintf_func
) (info
->stream
, "%s ",
874 float_format_names
[0]);
876 (*info
->fprintf_func
) (info
->stream
, "%s ",
877 float_format_names
[1]);
880 /* if no destination completer and not before a completer
881 for fcmp, need a space here */
883 fputs_filtered (float_format_names
[GET_FIELD (insn
, 20, 20)],
886 (*info
->fprintf_func
) (info
->stream
, "%s ",
887 float_format_names
[GET_FIELD
891 (*info
->fprintf_func
) (info
->stream
, "%c", *s
);
898 (*info
->fprintf_func
) (info
->stream
, "#%8x", insn
);
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