1 /* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
2 Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc.
4 Contributed by the Center for Software Science at the
5 University of Utah (pa-gdb-bugs@cs.utah.edu).
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 #include "opcode/hppa.h"
27 /* Integer register names, indexed by the numbers which appear in the
29 static const char *const reg_names
[] =
30 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
31 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
32 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1",
35 /* Floating point register names, indexed by the numbers which appear in the
37 static const char *const fp_reg_names
[] =
38 {"fpsr", "fpe2", "fpe4", "fpe6",
39 "fr4", "fr5", "fr6", "fr7", "fr8",
40 "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
41 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
42 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"};
44 typedef unsigned int CORE_ADDR
;
46 /* Get at various relevent fields of an instruction word. */
51 #define MASK_14 0x3fff
52 #define MASK_21 0x1fffff
54 /* This macro gets bit fields using HP's numbering (MSB = 0) */
56 #define GET_FIELD(X, FROM, TO) \
57 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
59 /* Some of these have been converted to 2-d arrays because they
60 consume less storage this way. If the maintenance becomes a
61 problem, convert them back to const 1-d pointer arrays. */
62 static const char *const control_reg
[] = {
63 "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
64 "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
65 "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
66 "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3",
67 "tr4", "tr5", "tr6", "tr7"
70 static const char *const compare_cond_names
[] = {
71 "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv", ",od",
72 ",tr", ",<>", ",>=", ",>", ",>>=", ",>>", ",nsv", ",ev"
74 static const char *const compare_cond_64_names
[] = {
75 "", ",*=", ",*<", ",*<=", ",*<<", ",*<<=", ",*sv", ",*od",
76 ",*tr", ",*<>", ",*>=", ",*>", ",*>>=", ",*>>", ",*nsv", ",*ev"
78 static const char *const cmpib_cond_64_names
[] = {
79 ",*<<", ",*=", ",*<", ",*<=", ",*>>=", ",*<>", ",*>=", ",*>"
81 static const char *const add_cond_names
[] = {
82 "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv", ",od",
83 ",tr", ",<>", ",>=", ",>", ",uv", ",vnz", ",nsv", ",ev"
85 static const char *const add_cond_64_names
[] = {
86 "", ",*=", ",*<", ",*<=", ",*nuv", ",*znv", ",*sv", ",*od",
87 ",*tr", ",*<>", ",*>=", ",*>", ",*uv", ",*vnz", ",*nsv", ",*ev"
89 static const char *const wide_add_cond_names
[] = {
90 "", ",=", ",<", ",<=", ",nuv", ",*=", ",*<", ",*<=",
91 ",tr", ",<>", ",>=", ",>", ",uv", ",*<>", ",*>=", ",*>"
93 static const char *const logical_cond_names
[] = {
94 "", ",=", ",<", ",<=", 0, 0, 0, ",od",
95 ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"};
96 static const char *const logical_cond_64_names
[] = {
97 "", ",*=", ",*<", ",*<=", 0, 0, 0, ",*od",
98 ",*tr", ",*<>", ",*>=", ",*>", 0, 0, 0, ",*ev"};
99 static const char *const unit_cond_names
[] = {
100 "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc",
101 ",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc"
103 static const char *const unit_cond_64_names
[] = {
104 "", ",*swz", ",*sbz", ",*shz", ",*sdc", ",*swc", ",*sbc", ",*shc",
105 ",*tr", ",*nwz", ",*nbz", ",*nhz", ",*ndc", ",*nwc", ",*nbc", ",*nhc"
107 static const char *const shift_cond_names
[] = {
108 "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"
110 static const char *const shift_cond_64_names
[] = {
111 "", ",*=", ",*<", ",*od", ",*tr", ",*<>", ",*>=", ",*ev"
113 static const char *const bb_cond_64_names
[] = {
116 static const char *const index_compl_names
[] = {"", ",m", ",s", ",sm"};
117 static const char *const short_ldst_compl_names
[] = {"", ",ma", "", ",mb"};
118 static const char *const short_bytes_compl_names
[] = {
119 "", ",b,m", ",e", ",e,m"
121 static const char *const float_format_names
[] = {",sgl", ",dbl", "", ",quad"};
122 static const char *const float_comp_names
[] =
124 ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
125 ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>",
126 ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<",
127 ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true"
129 static const char *const signed_unsigned_names
[] = {",u", ",s"};
130 static const char *const mix_half_names
[] = {",l", ",r"};
131 static const char *const saturation_names
[] = {",us", ",ss", 0, ""};
132 static const char *const read_write_names
[] = {",r", ",w"};
133 static const char *const add_compl_names
[] = { 0, "", ",l", ",tsv" };
135 /* For a bunch of different instructions form an index into a
136 completer name table. */
137 #define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
138 GET_FIELD (insn, 18, 18) << 1)
140 #define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
141 (GET_FIELD ((insn), 19, 19) ? 8 : 0))
143 /* Utility function to print registers. Put these first, so gcc's function
144 inlining can do its stuff. */
146 #define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR)
151 disassemble_info
*info
;
153 (*info
->fprintf_func
) (info
->stream
, reg
? reg_names
[reg
] : "r0");
157 fput_fp_reg (reg
, info
)
159 disassemble_info
*info
;
161 (*info
->fprintf_func
) (info
->stream
, reg
? fp_reg_names
[reg
] : "fr0");
165 fput_fp_reg_r (reg
, info
)
167 disassemble_info
*info
;
169 /* Special case floating point exception registers. */
171 (*info
->fprintf_func
) (info
->stream
, "fpe%d", reg
* 2 + 1);
173 (*info
->fprintf_func
) (info
->stream
, "%sR", reg
? fp_reg_names
[reg
]
178 fput_creg (reg
, info
)
180 disassemble_info
*info
;
182 (*info
->fprintf_func
) (info
->stream
, control_reg
[reg
]);
185 /* print constants with sign */
188 fput_const (num
, info
)
190 disassemble_info
*info
;
193 (*info
->fprintf_func
) (info
->stream
, "-%x", -(int)num
);
195 (*info
->fprintf_func
) (info
->stream
, "%x", num
);
198 /* Routines to extract various sized constants out of hppa
201 /* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
206 return GET_FIELD (word
, 18, 18) << 2 | GET_FIELD (word
, 16, 17);
210 extract_5_load (word
)
213 return low_sign_extend (word
>> 16 & MASK_5
, 5);
216 /* extract the immediate field from a st{bhw}s instruction */
218 extract_5_store (word
)
221 return low_sign_extend (word
& MASK_5
, 5);
224 /* extract the immediate field from a break instruction */
226 extract_5r_store (word
)
229 return (word
& MASK_5
);
232 /* extract the immediate field from a {sr}sm instruction */
234 extract_5R_store (word
)
237 return (word
>> 16 & MASK_5
);
240 /* extract the 10 bit immediate field from a {sr}sm instruction */
242 extract_10U_store (word
)
245 return (word
>> 16 & MASK_10
);
248 /* extract the immediate field from a bb instruction */
250 extract_5Q_store (word
)
253 return (word
>> 21 & MASK_5
);
256 /* extract an 11 bit immediate field */
261 return low_sign_extend (word
& MASK_11
, 11);
264 /* extract a 14 bit immediate field */
269 return low_sign_extend (word
& MASK_14
, 14);
272 /* extract a 21 bit constant */
282 val
= GET_FIELD (word
, 20, 20);
284 val
|= GET_FIELD (word
, 9, 19);
286 val
|= GET_FIELD (word
, 5, 6);
288 val
|= GET_FIELD (word
, 0, 4);
290 val
|= GET_FIELD (word
, 7, 8);
291 return sign_extend (val
, 21) << 11;
294 /* extract a 12 bit constant from branch instructions */
300 return sign_extend (GET_FIELD (word
, 19, 28) |
301 GET_FIELD (word
, 29, 29) << 10 |
302 (word
& 0x1) << 11, 12) << 2;
305 /* extract a 17 bit constant from branch instructions, returning the
306 19 bit signed value. */
312 return sign_extend (GET_FIELD (word
, 19, 28) |
313 GET_FIELD (word
, 29, 29) << 10 |
314 GET_FIELD (word
, 11, 15) << 11 |
315 (word
& 0x1) << 16, 17) << 2;
318 /* Print one instruction. */
320 print_insn_hppa (memaddr
, info
)
322 disassemble_info
*info
;
325 unsigned int insn
, i
;
329 (*info
->read_memory_func
) (memaddr
, buffer
, sizeof (buffer
), info
);
332 (*info
->memory_error_func
) (status
, memaddr
, info
);
337 insn
= bfd_getb32 (buffer
);
339 for (i
= 0; i
< NUMOPCODES
; ++i
)
341 const struct pa_opcode
*opcode
= &pa_opcodes
[i
];
342 if ((insn
& opcode
->mask
) == opcode
->match
)
344 register const char *s
;
346 (*info
->fprintf_func
) (info
->stream
, "%s", opcode
->name
);
348 if (!strchr ("cfCY?-+nHNZFIuv", opcode
->args
[0]))
349 (*info
->fprintf_func
) (info
->stream
, " ");
350 for (s
= opcode
->args
; *s
!= '\0'; ++s
)
355 fput_reg (GET_FIELD (insn
, 11, 15), info
);
359 fput_reg (GET_FIELD (insn
, 6, 10), info
);
362 fput_creg (GET_FIELD (insn
, 6, 10), info
);
365 fput_reg (GET_FIELD (insn
, 27, 31), info
);
368 /* Handle floating point registers. */
373 fput_fp_reg (GET_FIELD (insn
, 27, 31), info
);
376 if (GET_FIELD (insn
, 25, 25))
377 fput_fp_reg_r (GET_FIELD (insn
, 27, 31), info
);
379 fput_fp_reg (GET_FIELD (insn
, 27, 31), info
);
382 if (GET_FIELD (insn
, 25, 25))
383 fput_fp_reg_r (GET_FIELD (insn
, 6, 10), info
);
385 fput_fp_reg (GET_FIELD (insn
, 6, 10), info
);
388 /* 'fA' will not generate a space before the regsiter
389 name. Normally that is fine. Except that it
390 causes problems with xmpyu which has no FP format
393 fputs_filtered (" ", info
);
398 if (GET_FIELD (insn
, 24, 24))
399 fput_fp_reg_r (GET_FIELD (insn
, 6, 10), info
);
401 fput_fp_reg (GET_FIELD (insn
, 6, 10), info
);
405 if (GET_FIELD (insn
, 25, 25))
406 fput_fp_reg_r (GET_FIELD (insn
, 11, 15), info
);
408 fput_fp_reg (GET_FIELD (insn
, 11, 15), info
);
411 if (GET_FIELD (insn
, 19, 19))
412 fput_fp_reg_r (GET_FIELD (insn
, 11, 15), info
);
414 fput_fp_reg (GET_FIELD (insn
, 11, 15), info
);
418 int reg
= GET_FIELD (insn
, 21, 22);
419 reg
|= GET_FIELD (insn
, 16, 18) << 2;
420 if (GET_FIELD (insn
, 23, 23) != 0)
421 fput_fp_reg_r (reg
, info
);
423 fput_fp_reg (reg
, info
);
428 int reg
= GET_FIELD (insn
, 6, 10);
430 reg
|= (GET_FIELD (insn
, 26, 26) << 4);
431 fput_fp_reg (reg
, info
);
436 int reg
= GET_FIELD (insn
, 11, 15);
438 reg
|= (GET_FIELD (insn
, 26, 26) << 4);
439 fput_fp_reg (reg
, info
);
444 int reg
= GET_FIELD (insn
, 27, 31);
446 reg
|= (GET_FIELD (insn
, 26, 26) << 4);
447 fput_fp_reg (reg
, info
);
452 int reg
= GET_FIELD (insn
, 21, 25);
454 reg
|= (GET_FIELD (insn
, 26, 26) << 4);
455 fput_fp_reg (reg
, info
);
460 int reg
= GET_FIELD (insn
, 16, 20);
462 reg
|= (GET_FIELD (insn
, 26, 26) << 4);
463 fput_fp_reg (reg
, info
);
467 if (GET_FIELD (insn
, 25, 25))
468 fput_fp_reg_r (GET_FIELD (insn
, 11, 15), info
);
470 fput_fp_reg (GET_FIELD (insn
, 11, 15), info
);
477 fput_const (extract_5_load (insn
), info
);
480 (*info
->fprintf_func
) (info
->stream
,
481 "sr%d", GET_FIELD (insn
, 16, 17));
485 (*info
->fprintf_func
) (info
->stream
, "sr%d", extract_3 (insn
));
488 /* Handle completers. */
493 (*info
->fprintf_func
) (info
->stream
, "%s ",
494 index_compl_names
[GET_COMPL (insn
)]);
497 (*info
->fprintf_func
) (info
->stream
, "%s ",
498 short_ldst_compl_names
[GET_COMPL (insn
)]);
501 (*info
->fprintf_func
)
502 (info
->stream
, "%s ",
503 short_ldst_compl_names
[(GET_FIELD (insn
, 28, 28)
504 | GET_FIELD (insn
, 29, 29))]);
508 (*info
->fprintf_func
) (info
->stream
, ",mb ");
510 (*info
->fprintf_func
) (info
->stream
, ",ma ");
513 (*info
->fprintf_func
) (info
->stream
, "%s ",
514 short_bytes_compl_names
[GET_COMPL (insn
)]);
517 (*info
->fprintf_func
) (info
->stream
, ",l");
520 (*info
->fprintf_func
) (info
->stream
, "%s ",
521 read_write_names
[GET_FIELD (insn
, 25, 25)]);
524 (*info
->fprintf_func
) (info
->stream
, ",w");
527 if (GET_FIELD (insn
, 23, 26) == 5)
528 (*info
->fprintf_func
) (info
->stream
, ",r");
531 if (GET_FIELD (insn
, 26, 26))
532 (*info
->fprintf_func
) (info
->stream
, ",m ");
534 (*info
->fprintf_func
) (info
->stream
, " ");
537 if (GET_FIELD (insn
, 25, 25))
538 (*info
->fprintf_func
) (info
->stream
, ",i");
541 if (!GET_FIELD (insn
, 21, 21))
542 (*info
->fprintf_func
) (info
->stream
, ",z");
545 (*info
->fprintf_func
)
546 (info
->stream
, "%s", add_compl_names
[GET_FIELD
550 (*info
->fprintf_func
)
551 (info
->stream
, ",dc%s", add_compl_names
[GET_FIELD
555 (*info
->fprintf_func
)
556 (info
->stream
, ",c%s", add_compl_names
[GET_FIELD
560 if (GET_FIELD (insn
, 20, 20))
561 (*info
->fprintf_func
) (info
->stream
, ",tsv");
564 (*info
->fprintf_func
) (info
->stream
, ",tc");
565 if (GET_FIELD (insn
, 20, 20))
566 (*info
->fprintf_func
) (info
->stream
, ",tsv");
569 (*info
->fprintf_func
) (info
->stream
, ",db");
570 if (GET_FIELD (insn
, 20, 20))
571 (*info
->fprintf_func
) (info
->stream
, ",tsv");
574 (*info
->fprintf_func
) (info
->stream
, ",b");
575 if (GET_FIELD (insn
, 20, 20))
576 (*info
->fprintf_func
) (info
->stream
, ",tsv");
579 if (GET_FIELD (insn
, 25, 25))
580 (*info
->fprintf_func
) (info
->stream
, ",tc");
583 /* EXTRD/W has a following condition. */
585 (*info
->fprintf_func
)
586 (info
->stream
, "%s", signed_unsigned_names
[GET_FIELD
589 (*info
->fprintf_func
)
590 (info
->stream
, "%s ", signed_unsigned_names
[GET_FIELD
594 (*info
->fprintf_func
)
595 (info
->stream
, "%s", mix_half_names
[GET_FIELD
599 (*info
->fprintf_func
)
600 (info
->stream
, "%s", saturation_names
[GET_FIELD
604 (*info
->fprintf_func
)
605 (info
->stream
, ",%d%d%d%d ",
606 GET_FIELD (insn
, 17, 18), GET_FIELD (insn
, 20, 21),
607 GET_FIELD (insn
, 22, 23), GET_FIELD (insn
, 24, 25));
612 /* Handle conditions. */
619 (*info
->fprintf_func
) (info
->stream
, "%s ",
620 float_comp_names
[GET_FIELD
624 /* these four conditions are for the set of instructions
625 which distinguish true/false conditions by opcode
626 rather than by the 'f' bit (sigh): comb, comib,
629 fputs_filtered (compare_cond_names
[GET_FIELD (insn
, 16, 18)],
633 fputs_filtered (compare_cond_names
[GET_FIELD (insn
, 16, 18)
637 fputs_filtered (compare_cond_64_names
[GET_FIELD (insn
, 16, 18)],
641 fputs_filtered (compare_cond_64_names
[GET_FIELD (insn
, 16, 18)
645 fputs_filtered (cmpib_cond_64_names
[GET_FIELD (insn
, 16, 18)],
649 fputs_filtered (compare_cond_names
[GET_FIELD (insn
, 16, 18)
650 + GET_FIELD (insn
, 4, 4) * 8], info
);
653 fputs_filtered (add_cond_names
[GET_FIELD (insn
, 16, 18)
654 + GET_FIELD (insn
, 4, 4) * 8], info
);
657 (*info
->fprintf_func
) (info
->stream
, "%s ",
658 compare_cond_names
[GET_COND (insn
)]);
661 (*info
->fprintf_func
) (info
->stream
, "%s ",
662 compare_cond_64_names
[GET_COND (insn
)]);
665 (*info
->fprintf_func
) (info
->stream
, "%s ",
666 add_cond_names
[GET_COND (insn
)]);
669 (*info
->fprintf_func
) (info
->stream
, "%s ",
670 add_cond_64_names
[GET_COND (insn
)]);
673 (*info
->fprintf_func
) (info
->stream
, "%s",
674 add_cond_names
[GET_FIELD (insn
, 16, 18)]);
678 (*info
->fprintf_func
) (info
->stream
, "%s",
679 add_cond_names
[GET_FIELD (insn
, 16, 18)
683 (*info
->fprintf_func
)
685 wide_add_cond_names
[GET_FIELD (insn
, 16, 18)]);
689 (*info
->fprintf_func
)
691 wide_add_cond_names
[GET_FIELD (insn
, 16, 18) + 8]);
695 (*info
->fprintf_func
) (info
->stream
, "%s ",
696 logical_cond_names
[GET_COND (insn
)]);
699 (*info
->fprintf_func
) (info
->stream
, "%s ",
700 logical_cond_64_names
[GET_COND (insn
)]);
703 (*info
->fprintf_func
) (info
->stream
, "%s ",
704 unit_cond_names
[GET_COND (insn
)]);
707 (*info
->fprintf_func
) (info
->stream
, "%s ",
708 unit_cond_64_names
[GET_COND (insn
)]);
713 (*info
->fprintf_func
)
715 shift_cond_names
[GET_FIELD (insn
, 16, 18)]);
717 /* If the next character in args is 'n', it will handle
718 putting out the space. */
720 (*info
->fprintf_func
) (info
->stream
, " ");
723 (*info
->fprintf_func
) (info
->stream
, "%s ",
724 shift_cond_64_names
[GET_FIELD (insn
, 16, 18)]);
727 (*info
->fprintf_func
)
729 bb_cond_64_names
[GET_FIELD (insn
, 16, 16)]);
731 /* If the next character in args is 'n', it will handle
732 putting out the space. */
734 (*info
->fprintf_func
) (info
->stream
, " ");
741 fput_const (extract_5_store (insn
), info
);
744 fput_const (extract_5r_store (insn
), info
);
747 fput_const (extract_5R_store (insn
), info
);
750 fput_const (extract_10U_store (insn
), info
);
753 fput_const (extract_5Q_store (insn
), info
);
756 fput_const (extract_11 (insn
), info
);
759 fput_const (extract_14 (insn
), info
);
762 fput_const (extract_21 (insn
), info
);
766 (*info
->fprintf_func
) (info
->stream
, ",n ");
768 (*info
->fprintf_func
) (info
->stream
, " ");
771 if ((insn
& 0x20) && s
[1])
772 (*info
->fprintf_func
) (info
->stream
, ",n ");
773 else if (insn
& 0x20)
774 (*info
->fprintf_func
) (info
->stream
, ",n");
776 (*info
->fprintf_func
) (info
->stream
, " ");
779 (*info
->print_address_func
) (memaddr
+ 8 + extract_12 (insn
),
783 /* 17 bit PC-relative branch. */
784 (*info
->print_address_func
) ((memaddr
+ 8
785 + extract_17 (insn
)),
789 /* 17 bit displacement. This is an offset from a register
790 so it gets disasssembled as just a number, not any sort
792 fput_const (extract_17 (insn
), info
);
796 /* addil %r1 implicit output. */
797 (*info
->fprintf_func
) (info
->stream
, "%%r1");
801 (*info
->fprintf_func
) (info
->stream
, "%d",
802 GET_FIELD (insn
, 24, 25));
805 (*info
->fprintf_func
) (info
->stream
, "%d",
806 GET_FIELD (insn
, 22, 25));
809 (*info
->fprintf_func
) (info
->stream
, "%%sar");
812 (*info
->fprintf_func
) (info
->stream
, "%d",
813 31 - GET_FIELD (insn
, 22, 26));
818 num
= GET_FIELD (insn
, 20, 20) << 5;
819 num
|= GET_FIELD (insn
, 22, 26);
820 (*info
->fprintf_func
) (info
->stream
, "%d", 63 - num
);
824 (*info
->fprintf_func
) (info
->stream
, "%d",
825 GET_FIELD (insn
, 22, 26));
830 num
= GET_FIELD (insn
, 20, 20) << 5;
831 num
|= GET_FIELD (insn
, 22, 26);
832 (*info
->fprintf_func
) (info
->stream
, "%d", num
);
836 (*info
->fprintf_func
) (info
->stream
, "%d",
837 32 - GET_FIELD (insn
, 27, 31));
842 num
= (GET_FIELD (insn
, 23, 23) + 1) * 32;
843 num
-= GET_FIELD (insn
, 27, 31);
844 (*info
->fprintf_func
) (info
->stream
, "%d", num
);
850 num
= (GET_FIELD (insn
, 19, 19) + 1) * 32;
851 num
-= GET_FIELD (insn
, 27, 31);
852 (*info
->fprintf_func
) (info
->stream
, "%d", num
);
856 fput_const (GET_FIELD (insn
, 20, 28), info
);
859 fput_const (GET_FIELD (insn
, 6, 18), info
);
862 fput_const (GET_FIELD (insn
, 6, 31), info
);
865 (*info
->fprintf_func
) (info
->stream
, ",%d", GET_FIELD (insn
, 23, 25));
868 fput_const ((GET_FIELD (insn
, 6,20) << 5 |
869 GET_FIELD (insn
, 27, 31)), info
);
872 fput_const (GET_FIELD (insn
, 6, 20), info
);
875 fput_const ((GET_FIELD (insn
, 6, 22) << 5 |
876 GET_FIELD (insn
, 27, 31)), info
);
879 fput_const ((GET_FIELD (insn
, 11, 20) << 5 |
880 GET_FIELD (insn
, 27, 31)), info
);
883 fput_const ((GET_FIELD (insn
, 16, 20) << 5 |
884 GET_FIELD (insn
, 27, 31)), info
);
887 (*info
->fprintf_func
) (info
->stream
, ",%d", GET_FIELD (insn
, 23, 25));
890 /* if no destination completer and not before a completer
891 for fcmp, need a space here */
892 if (s
[1] == 'G' || s
[1] == '?')
893 fputs_filtered (float_format_names
[GET_FIELD (insn
, 19, 20)],
896 (*info
->fprintf_func
) (info
->stream
, "%s ",
897 float_format_names
[GET_FIELD
901 (*info
->fprintf_func
) (info
->stream
, "%s ",
902 float_format_names
[GET_FIELD (insn
,
906 if (GET_FIELD (insn
, 26, 26) == 1)
907 (*info
->fprintf_func
) (info
->stream
, "%s ",
908 float_format_names
[0]);
910 (*info
->fprintf_func
) (info
->stream
, "%s ",
911 float_format_names
[1]);
914 /* if no destination completer and not before a completer
915 for fcmp, need a space here */
917 fputs_filtered (float_format_names
[GET_FIELD (insn
, 20, 20)],
920 (*info
->fprintf_func
) (info
->stream
, "%s ",
921 float_format_names
[GET_FIELD
926 fput_const (extract_14 (insn
), info
);
932 int sign
= GET_FIELD (insn
, 31, 31);
933 int imm10
= GET_FIELD (insn
, 18, 27);
937 disp
= (-1 << 10) | imm10
;
942 fput_const (disp
, info
);
948 int sign
= GET_FIELD (insn
, 31, 31);
949 int imm11
= GET_FIELD (insn
, 18, 28);
953 disp
= (-1 << 11) | imm11
;
958 fput_const (disp
, info
);
965 fputs_filtered ("Disassembler botch.\n", info
);
970 int y
= GET_FIELD (insn
, 16, 18);
973 fput_const ((y
^ 1) - 1, info
);
981 cbit
= GET_FIELD (insn
, 16, 18);
984 (*info
->fprintf_func
) (info
->stream
, ",%d", cbit
- 1);
990 int cond
= GET_FIELD (insn
, 27, 31);
993 fputs_filtered (" ", info
);
995 fputs_filtered ("acc ", info
);
997 fputs_filtered ("rej ", info
);
999 fputs_filtered ("acc8 ", info
);
1001 fputs_filtered ("rej8 ", info
);
1003 fputs_filtered ("acc6 ", info
);
1004 else if (cond
== 13)
1005 fputs_filtered ("acc4 ", info
);
1006 else if (cond
== 17)
1007 fputs_filtered ("acc2 ", info
);
1012 (*info
->print_address_func
) ((memaddr
+ 8
1013 + extract_22 (insn
)),
1017 fputs_filtered (",pop", info
);
1020 fputs_filtered (",push", info
);
1023 fputs_filtered (",%r2", info
);
1026 fputs_filtered (",gate", info
);
1029 fputs_filtered (",l", info
);
1032 (*info
->fprintf_func
) (info
->stream
, "%c", *s
);
1036 return sizeof(insn
);
1039 (*info
->fprintf_func
) (info
->stream
, "#%8x", insn
);
1040 return sizeof(insn
);
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