1 /* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
2 Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc.
4 Contributed by the Center for Software Science at the
5 University of Utah (pa-gdb-bugs@cs.utah.edu).
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
23 #include "opcode/hppa.h"
25 /* Initializer for an array of names of registers.
26 There should be NUM_REGS strings in this initializer. */
28 #define REGISTER_NAMES \
29 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
30 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
31 "r20", "r21", "r22", "arg3", "arg2", "arg1", "arg0", "dp", "ret0", "ret1", \
32 "sp", "r31", "sar", "pcoqh", "pcsqh", "pcoqt", "pcsqt", \
33 "eiem", "iir", "isr", "ior", "ipsw", "goto", "sr4", "sr0", "sr1", "sr2", \
34 "sr3", "sr5", "sr6", "sr7", "cr0", "cr8", "cr9", "ccr", "cr12", "cr13", \
35 "cr24", "cr25", "cr26", "mpsfu_high", "mpsfu_low", "mpsfu_ovflo", "pad", \
36 "fpsr", "fpe1", "fpe2", "fpe3", "fpe4", "fpe5", "fpe6", "fpe7", \
37 "fp4", "fp5", "fp6", "fp7", "fp8", \
38 "fp9", "fp10", "fp11", "fp12", "fp13", "fp14", "fp15", \
39 "fp16", "fp17", "fp18", "fp19", "fp20", "fp21", "fp22", "fp23", \
40 "fp24", "fp25", "fp26", "fp27", "fp28", "fp29", "fp30", "fp31"}
42 static const char *const reg_names
[] = REGISTER_NAMES
;
44 typedef unsigned int CORE_ADDR
;
46 /* Get at various relevent fields of an instruction word. */
50 #define MASK_14 0x3fff
51 #define MASK_21 0x1fffff
53 /* This macro gets bit fields using HP's numbering (MSB = 0) */
55 #define GET_FIELD(X, FROM, TO) \
56 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
58 /* Some of these have been converted to 2-d arrays because they
59 consume less storage this way. If the maintenance becomes a
60 problem, convert them back to const 1-d pointer arrays. */
61 static const char control_reg
[][6] = {
62 "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
63 "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
64 "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
65 "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3",
66 "tr4", "tr5", "tr6", "tr7"
69 static const char compare_cond_names
[][5] = {
70 "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv",
71 ",od", ",tr", ",<>", ",>=", ",>", ",>>=",
74 static const char add_cond_names
[][5] = {
75 "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv",
76 ",od", ",tr", ",<>", ",>=", ",>", ",uv",
79 static const char *const logical_cond_names
[] = {
80 "", ",=", ",<", ",<=", 0, 0, 0, ",od",
81 ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"};
82 static const char *const unit_cond_names
[] = {
83 "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc",
84 ",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc"
86 static const char shift_cond_names
[][4] = {
87 "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"
89 static const char index_compl_names
[][4] = {"", ",m", ",s", ",sm"};
90 static const char short_ldst_compl_names
[][4] = {"", ",ma", "", ",mb"};
91 static const char *const short_bytes_compl_names
[] = {
92 "", ",b,m", ",e", ",e,m"
94 static const char *const float_format_names
[] = {",sgl", ",dbl", ",quad"};
95 static const char float_comp_names
[][8] =
97 ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
98 ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>",
99 ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<",
100 ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true"
103 /* For a bunch of different instructions form an index into a
104 completer name table. */
105 #define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
106 GET_FIELD (insn, 18, 18) << 1)
108 #define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
109 (GET_FIELD ((insn), 19, 19) ? 8 : 0))
111 /* Utility function to print registers. Put these first, so gcc's function
112 inlining can do its stuff. */
114 #define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR)
119 disassemble_info
*info
;
121 (*info
->fprintf_func
) (info
->stream
, reg
? reg_names
[reg
] : "r0");
125 fput_reg_r (reg
, info
)
127 disassemble_info
*info
;
129 (*info
->fprintf_func
) (info
->stream
, "%sR", reg
? reg_names
[reg
] : "r0");
133 fput_creg (reg
, info
)
135 disassemble_info
*info
;
137 (*info
->fprintf_func
) (info
->stream
, control_reg
[reg
]);
140 /* print constants with sign */
143 fput_const (num
, info
)
145 disassemble_info
*info
;
148 (*info
->fprintf_func
) (info
->stream
, "-%x", -(int)num
);
150 (*info
->fprintf_func
) (info
->stream
, "%x", num
);
153 /* Routines to extract various sized constants out of hppa
156 /* This assumes that no garbage lies outside of the lower bits of
160 sign_extend (val
, bits
)
163 return (int)(val
>> (bits
- 1) ? (-1 << bits
) | val
: val
);
166 /* For many immediate values the sign bit is the low bit! */
169 low_sign_extend (val
, bits
)
172 return (int)((val
& 0x1 ? (-1 << (bits
- 1)) : 0) | val
>> 1);
174 /* extract the immediate field from a ld{bhw}s instruction */
178 get_field (val
, from
, to
)
179 unsigned val
, from
, to
;
181 val
= val
>> (31 - to
);
182 return val
& ((1 << (32 - from
)) - 1);
186 set_field (val
, from
, to
, new_val
)
187 unsigned *val
, from
, to
, new_val
;
189 unsigned mask
= ~((1 << (to
- from
+ 1)) << (31 - from
));
190 return *val
= (*val
& mask
) | (new_val
<< (31 - from
));
194 /* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
199 return GET_FIELD (word
, 18, 18) << 2 | GET_FIELD (word
, 16, 17);
203 extract_5_load (word
)
206 return low_sign_extend (word
>> 16 & MASK_5
, 5);
209 /* extract the immediate field from a st{bhw}s instruction */
211 extract_5_store (word
)
214 return low_sign_extend (word
& MASK_5
, 5);
217 /* extract the immediate field from a break instruction */
219 extract_5r_store (word
)
222 return (word
& MASK_5
);
225 /* extract the immediate field from a {sr}sm instruction */
227 extract_5R_store (word
)
230 return (word
>> 16 & MASK_5
);
233 /* extract the immediate field from a bb instruction */
235 extract_5Q_store (word
)
238 return (word
>> 21 & MASK_5
);
241 /* extract an 11 bit immediate field */
246 return low_sign_extend (word
& MASK_11
, 11);
249 /* extract a 14 bit immediate field */
254 return low_sign_extend (word
& MASK_14
, 14);
258 /* deposit a 14 bit constant in a word */
260 deposit_14 (opnd
, word
)
264 unsigned sign
= (opnd
< 0 ? 1 : 0);
266 return word
| ((unsigned)opnd
<< 1 & MASK_14
) | sign
;
270 /* extract a 21 bit constant */
280 val
= GET_FIELD (word
, 20, 20);
282 val
|= GET_FIELD (word
, 9, 19);
284 val
|= GET_FIELD (word
, 5, 6);
286 val
|= GET_FIELD (word
, 0, 4);
288 val
|= GET_FIELD (word
, 7, 8);
289 return sign_extend (val
, 21) << 11;
293 /* deposit a 21 bit constant in a word. Although 21 bit constants are
294 usually the top 21 bits of a 32 bit constant, we assume that only
295 the low 21 bits of opnd are relevant */
298 deposit_21 (opnd
, word
)
303 val
|= GET_FIELD (opnd
, 11 + 14, 11 + 18);
305 val
|= GET_FIELD (opnd
, 11 + 12, 11 + 13);
307 val
|= GET_FIELD (opnd
, 11 + 19, 11 + 20);
309 val
|= GET_FIELD (opnd
, 11 + 1, 11 + 11);
311 val
|= GET_FIELD (opnd
, 11 + 0, 11 + 0);
316 /* extract a 12 bit constant from branch instructions */
322 return sign_extend (GET_FIELD (word
, 19, 28) |
323 GET_FIELD (word
, 29, 29) << 10 |
324 (word
& 0x1) << 11, 12) << 2;
327 /* extract a 17 bit constant from branch instructions, returning the
328 19 bit signed value. */
334 return sign_extend (GET_FIELD (word
, 19, 28) |
335 GET_FIELD (word
, 29, 29) << 10 |
336 GET_FIELD (word
, 11, 15) << 11 |
337 (word
& 0x1) << 16, 17) << 2;
340 /* Print one instruction. */
342 print_insn_hppa (memaddr
, info
)
344 disassemble_info
*info
;
346 unsigned int insn
, i
, op
;
347 FILE *stream
= info
->stream
;
351 (*info
->read_memory_func
) (memaddr
, (bfd_byte
*) &insn
, sizeof (insn
),
355 (*info
->memory_error_func
) (status
, memaddr
, info
);
360 for (i
= 0; i
< NUMOPCODES
; ++i
)
362 const struct pa_opcode
*opcode
= &pa_opcodes
[i
];
363 if ((insn
& opcode
->mask
) == opcode
->match
)
365 register const char *s
;
367 (*info
->fprintf_func
) (info
->stream
, "%s", opcode
->name
);
369 if (!strchr ("cCY<?!@-+&U>~nZFIM", opcode
->args
[0]))
370 (*info
->fprintf_func
) (info
->stream
, " ");
371 for (s
= opcode
->args
; *s
!= '\0'; ++s
)
376 fput_reg (GET_FIELD (insn
, 11, 15), info
);
379 if (GET_FIELD (insn
, 25, 25))
380 fput_reg_r (GET_FIELD (insn
, 11, 15), info
);
382 fput_reg (GET_FIELD (insn
, 11, 15), info
);
385 fput_reg (GET_FIELD (insn
, 6, 10), info
);
388 fput_creg (GET_FIELD (insn
, 6, 10), info
);
391 if (GET_FIELD (insn
, 25, 25))
392 fput_reg_r (GET_FIELD (insn
, 6, 10), info
);
394 fput_reg (GET_FIELD (insn
, 6, 10), info
);
397 fput_reg (GET_FIELD (insn
, 27, 31), info
);
400 if (GET_FIELD (insn
, 25, 25))
401 fput_reg_r (GET_FIELD (insn
, 27, 31), info
);
403 fput_reg (GET_FIELD (insn
, 27, 31), info
);
406 fput_creg (GET_FIELD (insn
, 6, 10), info
);
409 fput_reg (GET_FIELD (insn
, 11, 15), info
);
412 fput_reg (GET_FIELD (insn
, 27, 31), info
);
415 fput_reg (GET_FIELD (insn
, 16, 20), info
);
418 fput_reg (GET_FIELD (insn
, 21, 25), info
);
421 fput_const (extract_5_load (insn
), info
);
424 fprintf_filtered (stream
, "sr%d", GET_FIELD (insn
, 16, 17));
427 (*info
->fprintf_func
) (info
->stream
, "sr%d", extract_3 (insn
));
430 (*info
->fprintf_func
) (info
->stream
, "%s ",
431 index_compl_names
[GET_COMPL (insn
)]);
434 (*info
->fprintf_func
) (info
->stream
, "%s ",
435 short_ldst_compl_names
[GET_COMPL (insn
)]);
438 (*info
->fprintf_func
) (info
->stream
, "%s ",
439 short_bytes_compl_names
[GET_COMPL (insn
)]);
441 /* these four conditions are for the set of instructions
442 which distinguish true/false conditions by opcode rather
443 than by the 'f' bit (sigh): comb, comib, addb, addib */
445 fputs_filtered (compare_cond_names
[GET_FIELD (insn
, 16, 18)],
449 fputs_filtered (compare_cond_names
[GET_FIELD (insn
, 16, 18) + 8],
453 fputs_filtered (add_cond_names
[GET_FIELD (insn
, 16, 18) + 8],
457 (*info
->fprintf_func
) (info
->stream
, "%s",
458 compare_cond_names
[GET_COND (insn
)]);
462 (*info
->fprintf_func
) (info
->stream
, "%s",
463 add_cond_names
[GET_FIELD (insn
, 16, 18)]);
467 (*info
->fprintf_func
) (info
->stream
, "%s ",
468 logical_cond_names
[GET_COND (insn
)]);
471 (*info
->fprintf_func
) (info
->stream
, "%s ",
472 unit_cond_names
[GET_COND (insn
)]);
476 (*info
->fprintf_func
) (info
->stream
, "%s ",
477 shift_cond_names
[GET_FIELD (insn
, 16, 18)]);
480 fput_const (extract_5_store (insn
), info
);
483 fput_const (extract_5R_store (insn
), info
);
486 fput_const (extract_5Q_store (insn
), info
);
489 fput_const (extract_11 (insn
), info
);
492 fput_const (extract_14 (insn
), info
);
495 fput_const (extract_21 (insn
), info
);
499 (*info
->fprintf_func
) (info
->stream
, ",n ");
501 (*info
->fprintf_func
) (info
->stream
, " ");
504 (*info
->print_address_func
) (memaddr
+ 8 + extract_12 (insn
),
508 /* don't interpret an address if it's an external branch
510 op
= GET_FIELD (insn
, 0, 5);
511 if (op
!= 0x38 /* be */ && op
!= 0x39 /* ble */)
512 (*info
->print_address_func
) ((memaddr
+ 8
513 + extract_17 (insn
)),
516 fput_const (extract_17 (insn
), info
);
519 (*info
->fprintf_func
) (info
->stream
, "%d",
520 31 - GET_FIELD (insn
, 22, 26));
523 (*info
->fprintf_func
) (info
->stream
, "%d",
524 GET_FIELD (insn
, 22, 26));
527 (*info
->fprintf_func
) (info
->stream
, "%d",
528 32 - GET_FIELD (insn
, 27, 31));
531 fput_const (GET_FIELD (insn
, 6, 18), info
);
534 if (GET_FIELD (insn
, 26, 26))
535 (*info
->fprintf_func
) (info
->stream
, ",m ");
537 (*info
->fprintf_func
) (info
->stream
, " ");
540 fput_const (GET_FIELD (insn
, 6, 31), info
);
543 (*info
->fprintf_func
) (info
->stream
, ",%d", GET_FIELD (insn
, 23, 25));
546 fput_const ((GET_FIELD (insn
, 6,20) << 5 |
547 GET_FIELD (insn
, 27, 31)), info
);
550 fput_const (GET_FIELD (insn
, 6, 20), info
);
553 fput_const ((GET_FIELD (insn
, 6, 22) << 5 |
554 GET_FIELD (insn
, 27, 31)), info
);
557 fput_const ((GET_FIELD (insn
, 11, 20) << 5 |
558 GET_FIELD (insn
, 27, 31)), info
);
561 fput_const ((GET_FIELD (insn
, 16, 20) << 5 |
562 GET_FIELD (insn
, 27, 31)), info
);
565 (*info
->fprintf_func
) (info
->stream
, "%d", GET_FIELD (insn
, 23, 25));
568 /* if no destination completer, need a space here */
569 if (GET_FIELD (insn
, 21, 22) == 1)
570 fputs_filtered (float_format_names
[GET_FIELD (insn
, 19, 20)],
573 (*info
->fprintf_func
) (info
->stream
, "%s ",
574 float_format_names
[GET_FIELD
578 (*info
->fprintf_func
) (info
->stream
, "%s ",
579 float_format_names
[GET_FIELD (insn
,
583 fputs_filtered (float_format_names
[GET_FIELD
584 (insn
, 26, 26)], info
);
587 /* if no destination completer, need a space here */
588 if (GET_FIELD (insn
, 21, 22) == 1)
589 fputs_filtered (float_format_names
[GET_FIELD (insn
, 20, 20)],
592 fprintf_filtered (stream
, "%s ",
593 float_format_names
[GET_FIELD
597 if (GET_FIELD (insn
, 24, 24))
598 fput_reg_r (GET_FIELD (insn
, 6, 10), info
);
600 fput_reg (GET_FIELD (insn
, 6, 10), info
);
604 if (GET_FIELD (insn
, 19, 19))
605 fput_reg_r (GET_FIELD (insn
, 11, 15), info
);
607 fput_reg (GET_FIELD (insn
, 11, 15), info
);
610 fputs_filtered (float_comp_names
[GET_FIELD (insn
, 27, 31)],
614 (*info
->fprintf_func
) (info
->stream
, "%c", *s
);
621 (*info
->fprintf_func
) (info
->stream
, "#%8x", insn
);
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