* hppa-dis.c (print_insn_hppa): Add args q, %, !, and |.
[deliverable/binutils-gdb.git] / opcodes / hppa-dis.c
1 /* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
2 Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc.
3
4 Contributed by the Center for Software Science at the
5 University of Utah (pa-gdb-bugs@cs.utah.edu).
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21 #include <ansidecl.h>
22 #include "sysdep.h"
23 #include "dis-asm.h"
24 #include "libhppa.h"
25 #include "opcode/hppa.h"
26
27 /* Integer register names, indexed by the numbers which appear in the
28 opcodes. */
29 static const char *const reg_names[] =
30 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
31 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
32 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1",
33 "sp", "r31"};
34
35 /* Floating point register names, indexed by the numbers which appear in the
36 opcodes. */
37 static const char *const fp_reg_names[] =
38 {"fpsr", "fpe2", "fpe4", "fpe6",
39 "fr4", "fr5", "fr6", "fr7", "fr8",
40 "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
41 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
42 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"};
43
44 typedef unsigned int CORE_ADDR;
45
46 /* Get at various relevent fields of an instruction word. */
47
48 #define MASK_5 0x1f
49 #define MASK_10 0x3ff
50 #define MASK_11 0x7ff
51 #define MASK_14 0x3fff
52 #define MASK_21 0x1fffff
53
54 /* This macro gets bit fields using HP's numbering (MSB = 0) */
55
56 #define GET_FIELD(X, FROM, TO) \
57 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
58
59 /* Some of these have been converted to 2-d arrays because they
60 consume less storage this way. If the maintenance becomes a
61 problem, convert them back to const 1-d pointer arrays. */
62 static const char control_reg[][6] = {
63 "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
64 "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
65 "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
66 "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3",
67 "tr4", "tr5", "tr6", "tr7"
68 };
69
70 static const char compare_cond_names[][5] = {
71 "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv", ",od",
72 ",tr", ",<>", ",>=", ",>", ",>>=", ",>>", ",nsv", ",ev"
73 };
74 static const char compare_cond_64_names[][6] = {
75 "", ",*=", ",*<", ",*<=", ",*<<", ",*<<=", ",*sv", ",*od",
76 ",*tr", ",*<>", ",*>=", ",*>", ",*>>=", ",*>>", ",*nsv", ",*ev"
77 };
78 static const char cmpib_cond_64_names[][6] = {
79 ",*<<", ",*=", ",*<", ",*<=", ",*>>=", ",*<>", ",*>=", ",*>"
80 };
81 static const char add_cond_names[][5] = {
82 "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv", ",od",
83 ",tr", ",<>", ",>=", ",>", ",uv", ",vnz", ",nsv", ",ev"
84 };
85 static const char add_cond_64_names[][6] = {
86 ",*", ",*=", ",*<", ",*<=", ",*nuv", ",*znv", ",*sv", ",*od",
87 ",*tr", ",*<>", ",*>=", ",*>", ",*uv", ",*vnz", ",*nsv", ",*ev"
88 };
89 static const char wide_add_cond_names[][5] = {
90 "", ",=", ",<", ",<=", ",nuv", ",*=", ",*<", ",*<=",
91 ",tr", ",<>", ",>=", ",>", ",uv", ",*<>", ",*>=", ",*>"
92 };
93 static const char *const logical_cond_names[] = {
94 "", ",=", ",<", ",<=", 0, 0, 0, ",od",
95 ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"};
96 static const char *const logical_cond_64_names[] = {
97 ",*", ",*=", ",*<", ",*<=", 0, 0, 0, ",*od",
98 ",*tr", ",*<>", ",*>=", ",*>", 0, 0, 0, ",*ev"};
99 static const char *const unit_cond_names[] = {
100 "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc",
101 ",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc"
102 };
103 static const char *const unit_cond_64_names[] = {
104 ",*", ",*swz", ",*sbz", ",*shz", ",*sdc", ",*swc", ",*sbc", ",*shc",
105 ",*tr", ",*nwz", ",*nbz", ",*nhz", ",*ndc", ",*nwc", ",*nbc", ",*nhc"
106 };
107 static const char shift_cond_names[][4] = {
108 "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"
109 };
110 static const char shift_cond_64_names[][5] = {
111 ",*", ",*=", ",*<", ",*od", ",*tr", ",*<>", ",*>=", ",*ev"
112 };
113 static const char bb_cond_64_names[][5] = {
114 ",*<", ",*>="
115 };
116 static const char index_compl_names[][4] = {"", ",m", ",s", ",sm"};
117 static const char short_ldst_compl_names[][4] = {"", ",ma", "", ",mb"};
118 static const char *const short_bytes_compl_names[] = {
119 "", ",b,m", ",e", ",e,m"
120 };
121 static const char *const float_format_names[] = {",sgl", ",dbl", "", ",quad"};
122 static const char float_comp_names[][8] =
123 {
124 ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
125 ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>",
126 ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<",
127 ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true"
128 };
129 static const char *const signed_unsigned_names[][3] = {",u", ",s"};
130 static const char *const mix_half_names[][3] = {",l", ",r"};
131 static const char *const saturation_names[][4] = {",us", ",ss", 0, ""};
132 static const char *const read_write_names[][3] = {",r", ",w"};
133 static const char *const add_compl_names[] = {
134 0, "", ",l", ",tsv"
135 };
136
137 /* For a bunch of different instructions form an index into a
138 completer name table. */
139 #define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
140 GET_FIELD (insn, 18, 18) << 1)
141
142 #define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
143 (GET_FIELD ((insn), 19, 19) ? 8 : 0))
144
145 /* Utility function to print registers. Put these first, so gcc's function
146 inlining can do its stuff. */
147
148 #define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR)
149
150 static void
151 fput_reg (reg, info)
152 unsigned reg;
153 disassemble_info *info;
154 {
155 (*info->fprintf_func) (info->stream, reg ? reg_names[reg] : "r0");
156 }
157
158 static void
159 fput_fp_reg (reg, info)
160 unsigned reg;
161 disassemble_info *info;
162 {
163 (*info->fprintf_func) (info->stream, reg ? fp_reg_names[reg] : "fr0");
164 }
165
166 static void
167 fput_fp_reg_r (reg, info)
168 unsigned reg;
169 disassemble_info *info;
170 {
171 /* Special case floating point exception registers. */
172 if (reg < 4)
173 (*info->fprintf_func) (info->stream, "fpe%d", reg * 2 + 1);
174 else
175 (*info->fprintf_func) (info->stream, "%sR", reg ? fp_reg_names[reg]
176 : "fr0");
177 }
178
179 static void
180 fput_creg (reg, info)
181 unsigned reg;
182 disassemble_info *info;
183 {
184 (*info->fprintf_func) (info->stream, control_reg[reg]);
185 }
186
187 /* print constants with sign */
188
189 static void
190 fput_const (num, info)
191 unsigned num;
192 disassemble_info *info;
193 {
194 if ((int)num < 0)
195 (*info->fprintf_func) (info->stream, "-%x", -(int)num);
196 else
197 (*info->fprintf_func) (info->stream, "%x", num);
198 }
199
200 /* Routines to extract various sized constants out of hppa
201 instructions. */
202
203 /* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
204 static int
205 extract_3 (word)
206 unsigned word;
207 {
208 return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17);
209 }
210
211 static int
212 extract_5_load (word)
213 unsigned word;
214 {
215 return low_sign_extend (word >> 16 & MASK_5, 5);
216 }
217
218 /* extract the immediate field from a st{bhw}s instruction */
219 static int
220 extract_5_store (word)
221 unsigned word;
222 {
223 return low_sign_extend (word & MASK_5, 5);
224 }
225
226 /* extract the immediate field from a break instruction */
227 static unsigned
228 extract_5r_store (word)
229 unsigned word;
230 {
231 return (word & MASK_5);
232 }
233
234 /* extract the immediate field from a {sr}sm instruction */
235 static unsigned
236 extract_5R_store (word)
237 unsigned word;
238 {
239 return (word >> 16 & MASK_5);
240 }
241
242 /* extract the 10 bit immediate field from a {sr}sm instruction */
243 static unsigned
244 extract_10U_store (word)
245 unsigned word;
246 {
247 return (word >> 16 & MASK_10);
248 }
249
250 /* extract the immediate field from a bb instruction */
251 static unsigned
252 extract_5Q_store (word)
253 unsigned word;
254 {
255 return (word >> 21 & MASK_5);
256 }
257
258 /* extract an 11 bit immediate field */
259 static int
260 extract_11 (word)
261 unsigned word;
262 {
263 return low_sign_extend (word & MASK_11, 11);
264 }
265
266 /* extract a 14 bit immediate field */
267 static int
268 extract_14 (word)
269 unsigned word;
270 {
271 return low_sign_extend (word & MASK_14, 14);
272 }
273
274 /* extract a 21 bit constant */
275
276 static int
277 extract_21 (word)
278 unsigned word;
279 {
280 int val;
281
282 word &= MASK_21;
283 word <<= 11;
284 val = GET_FIELD (word, 20, 20);
285 val <<= 11;
286 val |= GET_FIELD (word, 9, 19);
287 val <<= 2;
288 val |= GET_FIELD (word, 5, 6);
289 val <<= 5;
290 val |= GET_FIELD (word, 0, 4);
291 val <<= 2;
292 val |= GET_FIELD (word, 7, 8);
293 return sign_extend (val, 21) << 11;
294 }
295
296 /* extract a 12 bit constant from branch instructions */
297
298 static int
299 extract_12 (word)
300 unsigned word;
301 {
302 return sign_extend (GET_FIELD (word, 19, 28) |
303 GET_FIELD (word, 29, 29) << 10 |
304 (word & 0x1) << 11, 12) << 2;
305 }
306
307 /* extract a 17 bit constant from branch instructions, returning the
308 19 bit signed value. */
309
310 static int
311 extract_17 (word)
312 unsigned word;
313 {
314 return sign_extend (GET_FIELD (word, 19, 28) |
315 GET_FIELD (word, 29, 29) << 10 |
316 GET_FIELD (word, 11, 15) << 11 |
317 (word & 0x1) << 16, 17) << 2;
318 }
319
320 /* Print one instruction. */
321 int
322 print_insn_hppa (memaddr, info)
323 bfd_vma memaddr;
324 disassemble_info *info;
325 {
326 bfd_byte buffer[4];
327 unsigned int insn, i;
328
329 {
330 int status =
331 (*info->read_memory_func) (memaddr, buffer, sizeof (buffer), info);
332 if (status != 0)
333 {
334 (*info->memory_error_func) (status, memaddr, info);
335 return -1;
336 }
337 }
338
339 insn = bfd_getb32 (buffer);
340
341 for (i = 0; i < NUMOPCODES; ++i)
342 {
343 const struct pa_opcode *opcode = &pa_opcodes[i];
344 if ((insn & opcode->mask) == opcode->match)
345 {
346 register const char *s;
347
348 (*info->fprintf_func) (info->stream, "%s", opcode->name);
349
350 if (!strchr ("cfCY?-+nHNZFIu", opcode->args[0]))
351 (*info->fprintf_func) (info->stream, " ");
352 for (s = opcode->args; *s != '\0'; ++s)
353 {
354 switch (*s)
355 {
356 case 'x':
357 fput_reg (GET_FIELD (insn, 11, 15), info);
358 break;
359 case 'X':
360 if (GET_FIELD (insn, 25, 25))
361 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
362 else
363 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
364 break;
365 case 'a':
366 case 'b':
367 fput_reg (GET_FIELD (insn, 6, 10), info);
368 break;
369 case '^':
370 fput_creg (GET_FIELD (insn, 6, 10), info);
371 break;
372 case 'E':
373 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
374 break;
375 case '!':
376 fput_creg (11, info);
377 break;
378 case 't':
379 fput_reg (GET_FIELD (insn, 27, 31), info);
380 break;
381 case 'v':
382 if (GET_FIELD (insn, 25, 25))
383 fput_fp_reg_r (GET_FIELD (insn, 27, 31), info);
384 else
385 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
386 break;
387 case 'y':
388 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
389 break;
390 case '4':
391 {
392 int reg = GET_FIELD (insn, 6, 10);
393
394 reg |= (GET_FIELD (insn, 26, 26) << 4);
395 fput_fp_reg (reg, info);
396 break;
397 }
398 case '6':
399 {
400 int reg = GET_FIELD (insn, 11, 15);
401
402 reg |= (GET_FIELD (insn, 26, 26) << 4);
403 fput_fp_reg (reg, info);
404 break;
405 }
406 case '7':
407 {
408 int reg = GET_FIELD (insn, 27, 31);
409
410 reg |= (GET_FIELD (insn, 26, 26) << 4);
411 fput_fp_reg (reg, info);
412 break;
413 }
414 case '8':
415 {
416 int reg = GET_FIELD (insn, 16, 20);
417
418 reg |= (GET_FIELD (insn, 26, 26) << 4);
419 fput_fp_reg (reg, info);
420 break;
421 }
422 case '9':
423 {
424 int reg = GET_FIELD (insn, 21, 25);
425
426 reg |= (GET_FIELD (insn, 26, 26) << 4);
427 fput_fp_reg (reg, info);
428 break;
429 }
430 case '5':
431 fput_const (extract_5_load (insn), info);
432 break;
433 case 's':
434 (*info->fprintf_func) (info->stream,
435 "sr%d", GET_FIELD (insn, 16, 17));
436 break;
437
438 case 'S':
439 (*info->fprintf_func) (info->stream, "sr%d", extract_3 (insn));
440 break;
441
442 /* Handle completers. */
443 case 'c':
444 switch (*++s)
445 {
446 case 'x':
447 (*info->fprintf_func) (info->stream, "%s ",
448 index_compl_names[GET_COMPL (insn)]);
449 break;
450 case 'm':
451 (*info->fprintf_func) (info->stream, "%s ",
452 short_ldst_compl_names[GET_COMPL (insn)]);
453 break;
454 case 's':
455 (*info->fprintf_func) (info->stream, "%s ",
456 short_bytes_compl_names[GET_COMPL (insn)]);
457 break;
458 case 'L':
459 (*info->fprintf_func) (info->stream, ",l");
460 break;
461 case 'w':
462 (*info->fprintf_func) (info->stream, "%s ",
463 read_write_names[GET_FIELD (insn, 25, 25)]);
464 break;
465 case 'W':
466 (*info->fprintf_func) (info->stream, ",w");
467 break;
468 case 'r':
469 if (GET_FIELD (insn, 23, 26) == 5)
470 (*info->fprintf_func) (info->stream, ",r");
471 break;
472 case 'Z':
473 if (GET_FIELD (insn, 26, 26))
474 (*info->fprintf_func) (info->stream, ",m ");
475 else
476 (*info->fprintf_func) (info->stream, " ");
477 break;
478 case 'i':
479 if (GET_FIELD (insn, 25, 25))
480 (*info->fprintf_func) (info->stream, ",i");
481 break;
482 case 'z':
483 if (!GET_FIELD (insn, 21, 21))
484 (*info->fprintf_func) (info->stream, ",z");
485 break;
486 case 'a':
487 (*info->fprintf_func)
488 (info->stream, "%s", add_compl_names[GET_FIELD
489 (insn, 20, 21)]);
490 break;
491 case 'Y':
492 (*info->fprintf_func)
493 (info->stream, ",dc%s", add_compl_names[GET_FIELD
494 (insn, 20, 21)]);
495 break;
496 case 'y':
497 (*info->fprintf_func)
498 (info->stream, ",c%s", add_compl_names[GET_FIELD
499 (insn, 20, 21)]);
500 break;
501 case 'v':
502 if (GET_FIELD (insn, 20, 20))
503 (*info->fprintf_func) (info->stream, ",tsv");
504 break;
505 case 't':
506 (*info->fprintf_func) (info->stream, ",tc");
507 if (GET_FIELD (insn, 20, 20))
508 (*info->fprintf_func) (info->stream, ",tsv");
509 break;
510 case 'B':
511 (*info->fprintf_func) (info->stream, ",db");
512 if (GET_FIELD (insn, 20, 20))
513 (*info->fprintf_func) (info->stream, ",tsv");
514 break;
515 case 'b':
516 (*info->fprintf_func) (info->stream, ",b");
517 if (GET_FIELD (insn, 20, 20))
518 (*info->fprintf_func) (info->stream, ",tsv");
519 break;
520 case 'T':
521 if (GET_FIELD (insn, 25, 25))
522 (*info->fprintf_func) (info->stream, ",tc");
523 break;
524 case 'S':
525 /* EXTRD/W has a following condition. */
526 if (*(s + 1) == '?')
527 (*info->fprintf_func)
528 (info->stream, "%s", signed_unsigned_names[GET_FIELD
529 (insn, 21, 21)]);
530 else
531 (*info->fprintf_func)
532 (info->stream, "%s ", signed_unsigned_names[GET_FIELD
533 (insn, 21, 21)]);
534 break;
535 case 'h':
536 (*info->fprintf_func)
537 (info->stream, "%s", mix_half_names[GET_FIELD
538 (insn, 17, 17)]);
539 break;
540 case 'H':
541 (*info->fprintf_func)
542 (info->stream, "%s", saturation_names[GET_FIELD
543 (insn, 24, 25)]);
544 break;
545 case '*':
546 (*info->fprintf_func)
547 (info->stream, ",%d%d%d%d ",
548 GET_FIELD (insn, 17, 18), GET_FIELD (insn, 20, 21),
549 GET_FIELD (insn, 22, 23), GET_FIELD (insn, 24, 25));
550 break;
551 }
552 break;
553
554 /* Handle conditions. */
555 case '?':
556 {
557 s++;
558 switch (*s)
559 {
560 case 'f':
561 (*info->fprintf_func) (info->stream, "%s ",
562 float_comp_names[GET_FIELD
563 (insn, 27, 31)]);
564 break;
565
566 /* these four conditions are for the set of instructions
567 which distinguish true/false conditions by opcode
568 rather than by the 'f' bit (sigh): comb, comib,
569 addb, addib */
570 case 't':
571 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16,
572 18)],
573 info);
574 break;
575 case 'T':
576 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)
577 + 8], info);
578 break;
579 case 'r':
580 fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18)],
581 info);
582 break;
583 case 'R':
584 fputs_filtered (compare_cond_64_names[GET_FIELD (insn, 16, 18)
585 + 8], info);
586 break;
587 case 'Q':
588 fputs_filtered (cmpib_cond_64_names[GET_FIELD (insn, 16, 18)],
589 info);
590 break;
591 case 'n':
592 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16,
593 18)
594 + GET_FIELD (insn, 4, 4) * 8], info);
595 break;
596 case '@':
597 fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18)
598 + GET_FIELD (insn, 4, 4) * 8], info);
599 break;
600 case 's':
601 (*info->fprintf_func) (info->stream, "%s ",
602 compare_cond_names[GET_COND (insn)]);
603 break;
604 case 'S':
605 (*info->fprintf_func) (info->stream, "%s ",
606 compare_cond_64_names[GET_COND (insn)]);
607 break;
608 case 'a':
609 (*info->fprintf_func) (info->stream, "%s ",
610 add_cond_names[GET_COND (insn)]);
611 break;
612 case 'A':
613 (*info->fprintf_func) (info->stream, "%s ",
614 add_cond_64_names[GET_COND (insn)]);
615 break;
616 case 'd':
617 (*info->fprintf_func) (info->stream, "%s",
618 add_cond_names[GET_FIELD (insn,
619 16,
620 18)]);
621 break;
622 case 'D':
623 (*info->fprintf_func) (info->stream, "%s",
624 add_cond_names[GET_FIELD (insn,
625 16, 18)
626 + 8]);
627 break;
628 case 'w':
629 (*info->fprintf_func)
630 (info->stream, "%s",
631 wide_add_cond_names[GET_FIELD (insn, 16, 18)]);
632 break;
633
634 case 'W':
635 (*info->fprintf_func)
636 (info->stream, "%s",
637 wide_add_cond_names[GET_FIELD (insn, 16, 18) + 8]);
638 break;
639
640 case 'l':
641 (*info->fprintf_func) (info->stream, "%s ",
642 logical_cond_names[GET_COND (insn)]);
643 break;
644 case 'L':
645 (*info->fprintf_func) (info->stream, "%s ",
646 logical_cond_64_names[GET_COND (insn)]);
647 break;
648 case 'u':
649 (*info->fprintf_func) (info->stream, "%s ",
650 unit_cond_names[GET_COND (insn)]);
651 break;
652 case 'U':
653 (*info->fprintf_func) (info->stream, "%s ",
654 unit_cond_64_names[GET_COND (insn)]);
655 break;
656 case 'y':
657 case 'x':
658 case 'b':
659 (*info->fprintf_func)
660 (info->stream, "%s",
661 shift_cond_names[GET_FIELD (insn, 16, 18)]);
662
663 /* If the next character in args is 'n', it will handle
664 putting out the space. */
665 if (s[1] != 'n')
666 (*info->fprintf_func) (info->stream, " ");
667 break;
668 case 'X':
669 (*info->fprintf_func) (info->stream, "%s",
670 shift_cond_64_names[GET_FIELD (insn, 16, 18)]);
671 break;
672 case 'B':
673 (*info->fprintf_func)
674 (info->stream, "%s",
675 bb_cond_64_names[GET_FIELD (insn, 16, 16)]);
676
677 /* If the next character in args is 'n', it will handle
678 putting out the space. */
679 if (s[1] != 'n')
680 (*info->fprintf_func) (info->stream, " ");
681 break;
682 }
683 break;
684 }
685
686 case 'V':
687 fput_const (extract_5_store (insn), info);
688 break;
689 case 'r':
690 fput_const (extract_5r_store (insn), info);
691 break;
692 case 'R':
693 fput_const (extract_5R_store (insn), info);
694 break;
695 case 'U':
696 fput_const (extract_10U_store (insn), info);
697 break;
698 case 'Q':
699 fput_const (extract_5Q_store (insn), info);
700 break;
701 case 'i':
702 fput_const (extract_11 (insn), info);
703 break;
704 case 'j':
705 fput_const (extract_14 (insn), info);
706 break;
707 case 'k':
708 fput_const (extract_21 (insn), info);
709 break;
710 case 'n':
711 if (insn & 0x2)
712 (*info->fprintf_func) (info->stream, ",n ");
713 else
714 (*info->fprintf_func) (info->stream, " ");
715 break;
716 case 'N':
717 if ((insn & 0x20) && s[1])
718 (*info->fprintf_func) (info->stream, ",n ");
719 else if (insn & 0x20)
720 (*info->fprintf_func) (info->stream, ",n");
721 else if (s[1])
722 (*info->fprintf_func) (info->stream, " ");
723 break;
724 case 'w':
725 (*info->print_address_func) (memaddr + 8 + extract_12 (insn),
726 info);
727 break;
728 case 'W':
729 /* 17 bit PC-relative branch. */
730 (*info->print_address_func) ((memaddr + 8
731 + extract_17 (insn)),
732 info);
733 break;
734 case 'z':
735 /* 17 bit displacement. This is an offset from a register
736 so it gets disasssembled as just a number, not any sort
737 of address. */
738 fput_const (extract_17 (insn), info);
739 break;
740 case '.':
741 (*info->fprintf_func) (info->stream, "%d",
742 GET_FIELD (insn, 24, 25));
743 break;
744 case '*':
745 (*info->fprintf_func) (info->stream, "%d",
746 GET_FIELD (insn, 22, 25));
747 break;
748 case '!':
749 (*info->fprintf_func) (info->stream, "%sar");
750 break;
751 case 'p':
752 (*info->fprintf_func) (info->stream, "%d",
753 31 - GET_FIELD (insn, 22, 26));
754 break;
755 case '~':
756 {
757 int num;
758 num = GET_FIELD (insn, 20, 20) << 5;
759 num |= GET_FIELD (insn, 22, 26);
760 (*info->fprintf_func) (info->stream, "%d", 63 - num);
761 break;
762 }
763 case 'P':
764 (*info->fprintf_func) (info->stream, "%d",
765 GET_FIELD (insn, 22, 26));
766 break;
767 case 'q':
768 {
769 int num;
770 num = GET_FIELD (insn, 20, 20) << 5;
771 num |= GET_FIELD (insn, 22, 26);
772 (*info->fprintf_func) (info->stream, "%d", num);
773 break;
774 }
775 case 'T':
776 (*info->fprintf_func) (info->stream, "%d",
777 32 - GET_FIELD (insn, 27, 31));
778 break;
779 case '%':
780 {
781 int num;
782 num = (GET_FIELD (insn, 23, 23) + 1) * 32;
783 num -= GET_FIELD (insn, 27, 31);
784 (*info->fprintf_func) (info->stream, "%d", num);
785 break;
786 }
787 case '|':
788 {
789 int num;
790 num = (GET_FIELD (insn, 19, 19) + 1) * 32;
791 num -= GET_FIELD (insn, 27, 31);
792 (*info->fprintf_func) (info->stream, "%d", num);
793 break;
794 }
795 case '$':
796 fput_const (GET_FIELD (insn, 20, 28), info);
797 break;
798 case 'A':
799 fput_const (GET_FIELD (insn, 6, 18), info);
800 break;
801 case 'D':
802 fput_const (GET_FIELD (insn, 6, 31), info);
803 break;
804 case 'f':
805 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
806 break;
807 case 'O':
808 fput_const ((GET_FIELD (insn, 6,20) << 5 |
809 GET_FIELD (insn, 27, 31)), info);
810 break;
811 case 'o':
812 fput_const (GET_FIELD (insn, 6, 20), info);
813 break;
814 case '3':
815 {
816 int reg = GET_FIELD (insn, 21, 22);
817 reg |= GET_FIELD (insn, 16, 18) << 2;
818 if (GET_FIELD (insn, 23, 23) != 0)
819 fput_fp_reg_r (reg, info);
820 else
821 fput_fp_reg (reg, info);
822 break;
823 }
824
825 case '2':
826 fput_const ((GET_FIELD (insn, 6, 22) << 5 |
827 GET_FIELD (insn, 27, 31)), info);
828 break;
829 case '1':
830 fput_const ((GET_FIELD (insn, 11, 20) << 5 |
831 GET_FIELD (insn, 27, 31)), info);
832 break;
833 case '0':
834 fput_const ((GET_FIELD (insn, 16, 20) << 5 |
835 GET_FIELD (insn, 27, 31)), info);
836 break;
837 case 'u':
838 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
839 break;
840 case 'F':
841 /* if no destination completer and not before a completer
842 for fcmp, need a space here */
843 if (s[1] == 'G' || s[1] == '?')
844 fputs_filtered (float_format_names[GET_FIELD (insn, 19, 20)],
845 info);
846 else
847 (*info->fprintf_func) (info->stream, "%s ",
848 float_format_names[GET_FIELD
849 (insn, 19, 20)]);
850 break;
851 case 'G':
852 (*info->fprintf_func) (info->stream, "%s ",
853 float_format_names[GET_FIELD (insn,
854 17, 18)]);
855 break;
856 case 'H':
857 if (GET_FIELD (insn, 26, 26) == 1)
858 (*info->fprintf_func) (info->stream, "%s ",
859 float_format_names[0]);
860 else
861 (*info->fprintf_func) (info->stream, "%s ",
862 float_format_names[1]);
863 break;
864 case 'I':
865 /* if no destination completer and not before a completer
866 for fcmp, need a space here */
867 if (s[1] == '?')
868 fputs_filtered (float_format_names[GET_FIELD (insn, 20, 20)],
869 info);
870 else
871 (*info->fprintf_func) (info->stream, "%s ",
872 float_format_names[GET_FIELD
873 (insn, 20, 20)]);
874 break;
875 case 'J':
876 if (GET_FIELD (insn, 24, 24))
877 fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
878 else
879 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
880
881 break;
882 case 'K':
883 if (GET_FIELD (insn, 19, 19))
884 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
885 else
886 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
887 break;
888 default:
889 (*info->fprintf_func) (info->stream, "%c", *s);
890 break;
891 }
892 }
893 return sizeof(insn);
894 }
895 }
896 (*info->fprintf_func) (info->stream, "#%8x", insn);
897 return sizeof(insn);
898 }
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