btrace, test: fix multi-line btrace tests
[deliverable/binutils-gdb.git] / opcodes / i370-dis.c
1 /* i370-dis.c -- Disassemble Instruction 370 (ESA/390) instructions
2 Copyright 1994, 2000, 2003, 2005, 2007, 2012
3 Free Software Foundation, Inc.
4 PowerPC version written by Ian Lance Taylor, Cygnus Support
5 Rewritten for i370 ESA/390 support by Linas Vepstas <linas@linas.org>
6
7 This file is part of the GNU opcodes library.
8
9 This library is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this file; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
22 MA 02110-1301, USA. */
23
24 #include "sysdep.h"
25 #include <stdio.h>
26 #include "dis-asm.h"
27 #include "opcode/i370.h"
28
29 /* This file provides several disassembler functions, all of which use
30 the disassembler interface defined in dis-asm.h. */
31
32 int
33 print_insn_i370 (bfd_vma memaddr, struct disassemble_info *info)
34 {
35 bfd_byte buffer[8];
36 int status;
37 i370_insn_t insn;
38 const struct i370_opcode *opcode;
39 const struct i370_opcode *opcode_end;
40
41 status = (*info->read_memory_func) (memaddr, buffer, 6, info);
42 if (status != 0)
43 {
44 (*info->memory_error_func) (status, memaddr, info);
45 return -1;
46 }
47
48 /* Cast the bytes into the insn (in a host-endian indep way). */
49 insn.i[0] = (buffer[0] << 24) & 0xff000000;
50 insn.i[0] |= (buffer[1] << 16) & 0xff0000;
51 insn.i[0] |= (buffer[2] << 8) & 0xff00;
52 insn.i[0] |= buffer[3] & 0xff;
53 insn.i[1] = (buffer[4] << 24) & 0xff000000;
54 insn.i[1] |= (buffer[5] << 16) & 0xff0000;
55
56 /* Find the first match in the opcode table. We could speed this up
57 a bit by doing a binary search on the major opcode. */
58 opcode_end = i370_opcodes + i370_num_opcodes;
59 for (opcode = i370_opcodes; opcode < opcode_end; opcode++)
60 {
61 const unsigned char *opindex;
62 const struct i370_operand *operand;
63 i370_insn_t masked;
64 int invalid;
65
66 /* Mask off operands, and look for a match ... */
67 masked = insn;
68 if (2 == opcode->len)
69 {
70 masked.i[0] >>= 16;
71 masked.i[0] &= 0xffff;
72 }
73 masked.i[0] &= opcode->mask.i[0];
74 if (masked.i[0] != opcode->opcode.i[0])
75 continue;
76
77 if (6 == opcode->len)
78 {
79 masked.i[1] &= opcode->mask.i[1];
80 if (masked.i[1] != opcode->opcode.i[1])
81 continue;
82 }
83
84 /* Found a match. adjust a tad. */
85 if (2 == opcode->len)
86 {
87 insn.i[0] >>= 16;
88 insn.i[0] &= 0xffff;
89 }
90
91 /* Make two passes over the operands. First see if any of them
92 have extraction functions, and, if they do, make sure the
93 instruction is valid. */
94 invalid = 0;
95 for (opindex = opcode->operands; *opindex != 0; opindex++)
96 {
97 operand = i370_operands + *opindex;
98 if (operand->extract)
99 (*operand->extract) (insn, &invalid);
100 }
101 if (invalid)
102 continue;
103
104 /* The instruction is valid. */
105 (*info->fprintf_func) (info->stream, "%s", opcode->name);
106 if (opcode->operands[0] != 0)
107 (*info->fprintf_func) (info->stream, "\t");
108
109 /* Now extract and print the operands. */
110 for (opindex = opcode->operands; *opindex != 0; opindex++)
111 {
112 long value;
113
114 operand = i370_operands + *opindex;
115
116 /* Extract the value from the instruction. */
117 if (operand->extract)
118 value = (*operand->extract) (insn, (int *) NULL);
119 else
120 value = (insn.i[0] >> operand->shift) & ((1 << operand->bits) - 1);
121
122 /* Print the operand as directed by the flags. */
123 if ((operand->flags & I370_OPERAND_OPTIONAL) != 0)
124 {
125 if (value)
126 (*info->fprintf_func) (info->stream, "(r%ld)", value);
127 }
128 else if ((operand->flags & I370_OPERAND_SBASE) != 0)
129 {
130 (*info->fprintf_func) (info->stream, "(r%ld)", value);
131 }
132 else if ((operand->flags & I370_OPERAND_INDEX) != 0)
133 {
134 if (value)
135 (*info->fprintf_func) (info->stream, "(r%ld,", value);
136 else
137 (*info->fprintf_func) (info->stream, "(,");
138 }
139 else if ((operand->flags & I370_OPERAND_LENGTH) != 0)
140 {
141 (*info->fprintf_func) (info->stream, "(%ld,", value);
142 }
143 else if ((operand->flags & I370_OPERAND_BASE) != 0)
144 (*info->fprintf_func) (info->stream, "r%ld)", value);
145 else if ((operand->flags & I370_OPERAND_GPR) != 0)
146 (*info->fprintf_func) (info->stream, "r%ld,", value);
147 else if ((operand->flags & I370_OPERAND_FPR) != 0)
148 (*info->fprintf_func) (info->stream, "f%ld,", value);
149 else if ((operand->flags & I370_OPERAND_RELATIVE) != 0)
150 (*info->fprintf_func) (info->stream, "%ld", value);
151 else
152 (*info->fprintf_func) (info->stream, " %ld, ", value);
153 }
154
155 return opcode->len;
156 }
157
158 /* We could not find a match. */
159 (*info->fprintf_func) (info->stream, ".short 0x%02x%02x", buffer[0], buffer[1]);
160
161 return 2;
162 }
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