1 static const struct dis386 evex_len_table
[][3] = {
2 /* EVEX_LEN_0F6E_P_2 */
4 { "vmovK", { XMScalar
, Edq
}, 0 },
7 /* EVEX_LEN_0F7E_P_1 */
9 { VEX_W_TABLE (EVEX_W_0F7E_P_1
) },
12 /* EVEX_LEN_0F7E_P_2 */
14 { "vmovK", { Edq
, XMScalar
}, 0 },
17 /* EVEX_LEN_0FD6_P_2 */
19 { VEX_W_TABLE (EVEX_W_0FD6_P_2
) },
22 /* EVEX_LEN_0F3819_P_2_W_0 */
25 { "vbroadcastf32x2", { XM
, EXxmm_mq
}, 0 },
26 { "vbroadcastf32x2", { XM
, EXxmm_mq
}, 0 },
29 /* EVEX_LEN_0F3819_P_2_W_1 */
32 { "vbroadcastsd", { XM
, EXxmm_mq
}, 0 },
33 { "vbroadcastsd", { XM
, EXxmm_mq
}, 0 },
36 /* EVEX_LEN_0F381A_P_2_W_0 */
39 { "vbroadcastf32x4", { XM
, EXxmm
}, 0 },
40 { "vbroadcastf32x4", { XM
, EXxmm
}, 0 },
43 /* EVEX_LEN_0F381A_P_2_W_1 */
46 { "vbroadcastf64x2", { XM
, EXxmm
}, 0 },
47 { "vbroadcastf64x2", { XM
, EXxmm
}, 0 },
50 /* EVEX_LEN_0F381B_P_2_W_0 */
54 { "vbroadcastf32x8", { XM
, EXxmmq
}, 0 },
57 /* EVEX_LEN_0F381B_P_2_W_1 */
61 { "vbroadcastf64x4", { XM
, EXymm
}, 0 },
64 /* EVEX_LEN_0F385A_P_2_W_0 */
67 { "vbroadcasti32x4", { XM
, EXxmm
}, 0 },
68 { "vbroadcasti32x4", { XM
, EXxmm
}, 0 },
71 /* EVEX_LEN_0F385A_P_2_W_1 */
74 { "vbroadcasti64x2", { XM
, EXxmm
}, 0 },
75 { "vbroadcasti64x2", { XM
, EXxmm
}, 0 },
78 /* EVEX_LEN_0F385B_P_2_W_0 */
82 { "vbroadcasti32x8", { XM
, EXxmmq
}, 0 },
85 /* EVEX_LEN_0F385B_P_2_W_1 */
89 { "vbroadcasti64x4", { XM
, EXymm
}, 0 },
92 /* EVEX_LEN_0F3A18_P_2_W_0 */
95 { "vinsertf32x4", { XM
, Vex
, EXxmm
, Ib
}, 0 },
96 { "vinsertf32x4", { XM
, Vex
, EXxmm
, Ib
}, 0 },
99 /* EVEX_LEN_0F3A18_P_2_W_1 */
102 { "vinsertf64x2", { XM
, Vex
, EXxmm
, Ib
}, 0 },
103 { "vinsertf64x2", { XM
, Vex
, EXxmm
, Ib
}, 0 },
106 /* EVEX_LEN_0F3A19_P_2_W_0 */
109 { "vextractf32x4", { EXxmm
, XM
, Ib
}, 0 },
110 { "vextractf32x4", { EXxmm
, XM
, Ib
}, 0 },
113 /* EVEX_LEN_0F3A19_P_2_W_1 */
116 { "vextractf64x2", { EXxmm
, XM
, Ib
}, 0 },
117 { "vextractf64x2", { EXxmm
, XM
, Ib
}, 0 },
120 /* EVEX_LEN_0F3A1A_P_2_W_0 */
124 { "vinsertf32x8", { XM
, Vex
, EXxmmq
, Ib
}, 0 },
127 /* EVEX_LEN_0F3A1A_P_2_W_1 */
131 { "vinsertf64x4", { XM
, Vex
, EXxmmq
, Ib
}, 0 },
134 /* EVEX_LEN_0F3A1B_P_2_W_0 */
138 { "vextractf32x8", { EXxmmq
, XM
, Ib
}, 0 },
141 /* EVEX_LEN_0F3A1B_P_2_W_1 */
145 { "vextractf64x4", { EXxmmq
, XM
, Ib
}, 0 },
148 /* EVEX_LEN_0F3A23_P_2_W_0 */
151 { "vshuff32x4", { XM
, Vex
, EXx
, Ib
}, 0 },
152 { "vshuff32x4", { XM
, Vex
, EXx
, Ib
}, 0 },
155 /* EVEX_LEN_0F3A23_P_2_W_1 */
158 { "vshuff64x2", { XM
, Vex
, EXx
, Ib
}, 0 },
159 { "vshuff64x2", { XM
, Vex
, EXx
, Ib
}, 0 },
162 /* EVEX_LEN_0F3A38_P_2_W_0 */
165 { "vinserti32x4", { XM
, Vex
, EXxmm
, Ib
}, 0 },
166 { "vinserti32x4", { XM
, Vex
, EXxmm
, Ib
}, 0 },
169 /* EVEX_LEN_0F3A38_P_2_W_1 */
172 { "vinserti64x2", { XM
, Vex
, EXxmm
, Ib
}, 0 },
173 { "vinserti64x2", { XM
, Vex
, EXxmm
, Ib
}, 0 },
176 /* EVEX_LEN_0F3A39_P_2_W_0 */
179 { "vextracti32x4", { EXxmm
, XM
, Ib
}, 0 },
180 { "vextracti32x4", { EXxmm
, XM
, Ib
}, 0 },
183 /* EVEX_LEN_0F3A39_P_2_W_1 */
186 { "vextracti64x2", { EXxmm
, XM
, Ib
}, 0 },
187 { "vextracti64x2", { EXxmm
, XM
, Ib
}, 0 },
190 /* EVEX_LEN_0F3A3A_P_2_W_0 */
193 { "vinserti32x8", { XM
, Vex
, EXxmmq
, Ib
}, 0 },
194 { "vinserti32x8", { XM
, Vex
, EXxmmq
, Ib
}, 0 },
197 /* EVEX_LEN_0F3A3A_P_2_W_1 */
200 { "vinserti64x4", { XM
, Vex
, EXxmmq
, Ib
}, 0 },
201 { "vinserti64x4", { XM
, Vex
, EXxmmq
, Ib
}, 0 },
204 /* EVEX_LEN_0F3A3B_P_2_W_0 */
207 { "vextracti32x8", { EXxmmq
, XM
, Ib
}, 0 },
208 { "vextracti32x8", { EXxmmq
, XM
, Ib
}, 0 },
211 /* EVEX_LEN_0F3A3B_P_2_W_1 */
214 { "vextracti64x4", { EXxmmq
, XM
, Ib
}, 0 },
215 { "vextracti64x4", { EXxmmq
, XM
, Ib
}, 0 },
218 /* EVEX_LEN_0F3A43_P_2_W_0 */
221 { "vshufi32x4", { XM
, Vex
, EXx
, Ib
}, 0 },
222 { "vshufi32x4", { XM
, Vex
, EXx
, Ib
}, 0 },
225 /* EVEX_LEN_0F3A43_P_2_W_1 */
228 { "vshufi64x2", { XM
, Vex
, EXx
, Ib
}, 0 },
229 { "vshufi64x2", { XM
, Vex
, EXx
, Ib
}, 0 },
This page took 0.044238 seconds and 5 git commands to generate.