a9581ee7fe65cc682bde0d33932cb64416deda0d
3 { "vmovupX", { XM
, EXEvexXNoBcst
}, PREFIX_OPCODE
},
4 { VEX_W_TABLE (EVEX_W_0F10_P_1
) },
5 { "vmovupX", { XM
, EXEvexXNoBcst
}, PREFIX_OPCODE
},
6 { VEX_W_TABLE (EVEX_W_0F10_P_3
) },
10 { "vmovupX", { EXxS
, XM
}, PREFIX_OPCODE
},
11 { VEX_W_TABLE (EVEX_W_0F11_P_1
) },
12 { "vmovupX", { EXxS
, XM
}, PREFIX_OPCODE
},
13 { VEX_W_TABLE (EVEX_W_0F11_P_3
) },
15 /* PREFIX_EVEX_0F12 */
17 { MOD_TABLE (MOD_EVEX_0F12_PREFIX_0
) },
18 { VEX_W_TABLE (EVEX_W_0F12_P_1
) },
19 { MOD_TABLE (MOD_EVEX_0F12_PREFIX_2
) },
20 { VEX_W_TABLE (EVEX_W_0F12_P_3
) },
22 /* PREFIX_EVEX_0F16 */
24 { MOD_TABLE (MOD_EVEX_0F16_PREFIX_0
) },
25 { VEX_W_TABLE (EVEX_W_0F16_P_1
) },
26 { MOD_TABLE (MOD_EVEX_0F16_PREFIX_2
) },
28 /* PREFIX_EVEX_0F2A */
31 { "vcvtsi2ss{%LQ|}", { XMScalar
, VexScalar
, EXxEVexR
, Edq
}, 0 },
33 { VEX_W_TABLE (EVEX_W_0F2A_P_3
) },
35 /* PREFIX_EVEX_0F51 */
37 { "vsqrtpX", { XM
, EXx
, EXxEVexR
}, PREFIX_OPCODE
},
38 { VEX_W_TABLE (EVEX_W_0F51_P_1
) },
39 { "vsqrtpX", { XM
, EXx
, EXxEVexR
}, PREFIX_OPCODE
},
40 { VEX_W_TABLE (EVEX_W_0F51_P_3
) },
42 /* PREFIX_EVEX_0F58 */
44 { "vaddpX", { XM
, Vex
, EXx
, EXxEVexR
}, PREFIX_OPCODE
},
45 { VEX_W_TABLE (EVEX_W_0F58_P_1
) },
46 { "vaddpX", { XM
, Vex
, EXx
, EXxEVexR
}, PREFIX_OPCODE
},
47 { VEX_W_TABLE (EVEX_W_0F58_P_3
) },
49 /* PREFIX_EVEX_0F59 */
51 { "vmulpX", { XM
, Vex
, EXx
, EXxEVexR
}, PREFIX_OPCODE
},
52 { VEX_W_TABLE (EVEX_W_0F59_P_1
) },
53 { "vmulpX", { XM
, Vex
, EXx
, EXxEVexR
}, PREFIX_OPCODE
},
54 { VEX_W_TABLE (EVEX_W_0F59_P_3
) },
56 /* PREFIX_EVEX_0F5A */
58 { VEX_W_TABLE (EVEX_W_0F5A_P_0
) },
59 { VEX_W_TABLE (EVEX_W_0F5A_P_1
) },
60 { VEX_W_TABLE (EVEX_W_0F5A_P_2
) },
61 { VEX_W_TABLE (EVEX_W_0F5A_P_3
) },
63 /* PREFIX_EVEX_0F5B */
65 { VEX_W_TABLE (EVEX_W_0F5B_P_0
) },
66 { VEX_W_TABLE (EVEX_W_0F5B_P_1
) },
67 { VEX_W_TABLE (EVEX_W_0F5B_P_2
) },
69 /* PREFIX_EVEX_0F5C */
71 { "vsubpX", { XM
, Vex
, EXx
, EXxEVexR
}, PREFIX_OPCODE
},
72 { VEX_W_TABLE (EVEX_W_0F5C_P_1
) },
73 { "vsubpX", { XM
, Vex
, EXx
, EXxEVexR
}, PREFIX_OPCODE
},
74 { VEX_W_TABLE (EVEX_W_0F5C_P_3
) },
76 /* PREFIX_EVEX_0F5D */
78 { "vminpX", { XM
, Vex
, EXx
, EXxEVexS
}, PREFIX_OPCODE
},
79 { VEX_W_TABLE (EVEX_W_0F5D_P_1
) },
80 { "vminpX", { XM
, Vex
, EXx
, EXxEVexS
}, PREFIX_OPCODE
},
81 { VEX_W_TABLE (EVEX_W_0F5D_P_3
) },
83 /* PREFIX_EVEX_0F5E */
85 { "vdivpX", { XM
, Vex
, EXx
, EXxEVexR
}, PREFIX_OPCODE
},
86 { VEX_W_TABLE (EVEX_W_0F5E_P_1
) },
87 { "vdivpX", { XM
, Vex
, EXx
, EXxEVexR
}, PREFIX_OPCODE
},
88 { VEX_W_TABLE (EVEX_W_0F5E_P_3
) },
90 /* PREFIX_EVEX_0F5F */
92 { "vmaxpX", { XM
, Vex
, EXx
, EXxEVexS
}, PREFIX_OPCODE
},
93 { VEX_W_TABLE (EVEX_W_0F5F_P_1
) },
94 { "vmaxpX", { XM
, Vex
, EXx
, EXxEVexS
}, PREFIX_OPCODE
},
95 { VEX_W_TABLE (EVEX_W_0F5F_P_3
) },
97 /* PREFIX_EVEX_0F6F */
100 { VEX_W_TABLE (EVEX_W_0F6F_P_1
) },
101 { VEX_W_TABLE (EVEX_W_0F6F_P_2
) },
102 { VEX_W_TABLE (EVEX_W_0F6F_P_3
) },
104 /* PREFIX_EVEX_0F70 */
107 { "vpshufhw", { XM
, EXx
, Ib
}, 0 },
108 { VEX_W_TABLE (EVEX_W_0F70_P_2
) },
109 { "vpshuflw", { XM
, EXx
, Ib
}, 0 },
111 /* PREFIX_EVEX_0F78 */
113 { VEX_W_TABLE (EVEX_W_0F78_P_0
) },
114 { "vcvttss2usi", { Gdq
, EXxmm_md
, EXxEVexS
}, 0 },
115 { VEX_W_TABLE (EVEX_W_0F78_P_2
) },
116 { "vcvttsd2usi", { Gdq
, EXxmm_mq
, EXxEVexS
}, 0 },
118 /* PREFIX_EVEX_0F79 */
120 { VEX_W_TABLE (EVEX_W_0F79_P_0
) },
121 { "vcvtss2usi", { Gdq
, EXxmm_md
, EXxEVexR
}, 0 },
122 { VEX_W_TABLE (EVEX_W_0F79_P_2
) },
123 { "vcvtsd2usi", { Gdq
, EXxmm_mq
, EXxEVexR
}, 0 },
125 /* PREFIX_EVEX_0F7A */
128 { VEX_W_TABLE (EVEX_W_0F7A_P_1
) },
129 { VEX_W_TABLE (EVEX_W_0F7A_P_2
) },
130 { VEX_W_TABLE (EVEX_W_0F7A_P_3
) },
132 /* PREFIX_EVEX_0F7B */
135 { "vcvtusi2ss{%LQ|}", { XMScalar
, VexScalar
, EXxEVexR
, Edq
}, 0 },
136 { VEX_W_TABLE (EVEX_W_0F7B_P_2
) },
137 { VEX_W_TABLE (EVEX_W_0F7B_P_3
) },
139 /* PREFIX_EVEX_0F7E */
142 { EVEX_LEN_TABLE (EVEX_LEN_0F7E_P_1
) },
143 { EVEX_LEN_TABLE (EVEX_LEN_0F7E_P_2
) },
145 /* PREFIX_EVEX_0F7F */
148 { VEX_W_TABLE (EVEX_W_0F7F_P_1
) },
149 { VEX_W_TABLE (EVEX_W_0F7F_P_2
) },
150 { VEX_W_TABLE (EVEX_W_0F7F_P_3
) },
152 /* PREFIX_EVEX_0FC2 */
154 { "vcmppX", { XMask
, Vex
, EXx
, EXxEVexS
, CMP
}, PREFIX_OPCODE
},
155 { VEX_W_TABLE (EVEX_W_0FC2_P_1
) },
156 { "vcmppX", { XMask
, Vex
, EXx
, EXxEVexS
, CMP
}, PREFIX_OPCODE
},
157 { VEX_W_TABLE (EVEX_W_0FC2_P_3
) },
159 /* PREFIX_EVEX_0FE6 */
162 { VEX_W_TABLE (EVEX_W_0FE6_P_1
) },
163 { VEX_W_TABLE (EVEX_W_0FE6_P_2
) },
164 { VEX_W_TABLE (EVEX_W_0FE6_P_3
) },
166 /* PREFIX_EVEX_0F3810 */
169 { VEX_W_TABLE (EVEX_W_0F3810_P_1
) },
170 { VEX_W_TABLE (EVEX_W_0F3810_P_2
) },
172 /* PREFIX_EVEX_0F3811 */
175 { VEX_W_TABLE (EVEX_W_0F3811_P_1
) },
176 { VEX_W_TABLE (EVEX_W_0F3811_P_2
) },
178 /* PREFIX_EVEX_0F3812 */
181 { VEX_W_TABLE (EVEX_W_0F3812_P_1
) },
182 { VEX_W_TABLE (EVEX_W_0F3812_P_2
) },
184 /* PREFIX_EVEX_0F3813 */
187 { VEX_W_TABLE (EVEX_W_0F3813_P_1
) },
188 { VEX_W_TABLE (EVEX_W_0F3813_P_2
) },
190 /* PREFIX_EVEX_0F3814 */
193 { VEX_W_TABLE (EVEX_W_0F3814_P_1
) },
194 { "vprorv%DQ", { XM
, Vex
, EXx
}, 0 },
196 /* PREFIX_EVEX_0F3815 */
199 { VEX_W_TABLE (EVEX_W_0F3815_P_1
) },
200 { "vprolv%DQ", { XM
, Vex
, EXx
}, 0 },
202 /* PREFIX_EVEX_0F3820 */
205 { VEX_W_TABLE (EVEX_W_0F3820_P_1
) },
206 { "vpmovsxbw", { XM
, EXxmmq
}, 0 },
208 /* PREFIX_EVEX_0F3821 */
211 { VEX_W_TABLE (EVEX_W_0F3821_P_1
) },
212 { "vpmovsxbd", { XM
, EXxmmqd
}, 0 },
214 /* PREFIX_EVEX_0F3822 */
217 { VEX_W_TABLE (EVEX_W_0F3822_P_1
) },
218 { "vpmovsxbq", { XM
, EXxmmdw
}, 0 },
220 /* PREFIX_EVEX_0F3823 */
223 { VEX_W_TABLE (EVEX_W_0F3823_P_1
) },
224 { "vpmovsxwd", { XM
, EXxmmq
}, 0 },
226 /* PREFIX_EVEX_0F3824 */
229 { VEX_W_TABLE (EVEX_W_0F3824_P_1
) },
230 { "vpmovsxwq", { XM
, EXxmmqd
}, 0 },
232 /* PREFIX_EVEX_0F3825 */
235 { VEX_W_TABLE (EVEX_W_0F3825_P_1
) },
236 { VEX_W_TABLE (EVEX_W_0F3825_P_2
) },
238 /* PREFIX_EVEX_0F3826 */
241 { "vptestnm%BW", { XMask
, Vex
, EXx
}, 0 },
242 { "vptestm%BW", { XMask
, Vex
, EXx
}, 0 },
244 /* PREFIX_EVEX_0F3827 */
247 { "vptestnm%DQ", { XMask
, Vex
, EXx
}, 0 },
248 { "vptestm%DQ", { XMask
, Vex
, EXx
}, 0 },
250 /* PREFIX_EVEX_0F3828 */
253 { "vpmovm2%BW", { XM
, MaskR
}, 0 },
254 { VEX_W_TABLE (EVEX_W_0F3828_P_2
) },
256 /* PREFIX_EVEX_0F3829 */
259 { "vpmov%BW2m", { XMask
, EXx
}, 0 },
260 { VEX_W_TABLE (EVEX_W_0F3829_P_2
) },
262 /* PREFIX_EVEX_0F382A */
265 { VEX_W_TABLE (EVEX_W_0F382A_P_1
) },
266 { VEX_W_TABLE (EVEX_W_0F382A_P_2
) },
268 /* PREFIX_EVEX_0F3830 */
271 { VEX_W_TABLE (EVEX_W_0F3830_P_1
) },
272 { "vpmovzxbw", { XM
, EXxmmq
}, 0 },
274 /* PREFIX_EVEX_0F3831 */
277 { VEX_W_TABLE (EVEX_W_0F3831_P_1
) },
278 { "vpmovzxbd", { XM
, EXxmmqd
}, 0 },
280 /* PREFIX_EVEX_0F3832 */
283 { VEX_W_TABLE (EVEX_W_0F3832_P_1
) },
284 { "vpmovzxbq", { XM
, EXxmmdw
}, 0 },
286 /* PREFIX_EVEX_0F3833 */
289 { VEX_W_TABLE (EVEX_W_0F3833_P_1
) },
290 { "vpmovzxwd", { XM
, EXxmmq
}, 0 },
292 /* PREFIX_EVEX_0F3834 */
295 { VEX_W_TABLE (EVEX_W_0F3834_P_1
) },
296 { "vpmovzxwq", { XM
, EXxmmqd
}, 0 },
298 /* PREFIX_EVEX_0F3835 */
301 { VEX_W_TABLE (EVEX_W_0F3835_P_1
) },
302 { VEX_W_TABLE (EVEX_W_0F3835_P_2
) },
304 /* PREFIX_EVEX_0F3838 */
307 { "vpmovm2%DQ", { XM
, MaskR
}, 0 },
308 { "vpminsb", { XM
, Vex
, EXx
}, 0 },
310 /* PREFIX_EVEX_0F3839 */
313 { "vpmov%DQ2m", { XMask
, EXx
}, 0 },
314 { "vpmins%DQ", { XM
, Vex
, EXx
}, 0 },
316 /* PREFIX_EVEX_0F383A */
319 { VEX_W_TABLE (EVEX_W_0F383A_P_1
) },
320 { "vpminuw", { XM
, Vex
, EXx
}, 0 },
322 /* PREFIX_EVEX_0F3852 */
325 { VEX_W_TABLE (EVEX_W_0F3852_P_1
) },
326 { "vpdpwssd", { XM
, Vex
, EXx
}, 0 },
327 { "vp4dpwssd", { XM
, Vex
, EXxmm
}, 0 },
329 /* PREFIX_EVEX_0F3853 */
333 { "vpdpwssds", { XM
, Vex
, EXx
}, 0 },
334 { "vp4dpwssds", { XM
, Vex
, EXxmm
}, 0 },
336 /* PREFIX_EVEX_0F3868 */
341 { "vp2intersect%DQ", { XMask
, Vex
, EXx
, EXxEVexS
}, 0 },
343 /* PREFIX_EVEX_0F3872 */
346 { VEX_W_TABLE (EVEX_W_0F3872_P_1
) },
347 { VEX_W_TABLE (EVEX_W_0F3872_P_2
) },
348 { VEX_W_TABLE (EVEX_W_0F3872_P_3
) },
350 /* PREFIX_EVEX_0F389A */
354 { "vfmsub132p%XW", { XM
, Vex
, EXx
, EXxEVexR
}, 0 },
355 { "v4fmaddps", { XM
, Vex
, Mxmm
}, 0 },
357 /* PREFIX_EVEX_0F389B */
361 { "vfmsub132s%XW", { XMScalar
, VexScalar
, EXVexWdqScalar
, EXxEVexR
}, 0 },
362 { "v4fmaddss", { XMScalar
, VexScalar
, Mxmm
}, 0 },
364 /* PREFIX_EVEX_0F38AA */
368 { "vfmsub213p%XW", { XM
, Vex
, EXx
, EXxEVexR
}, 0 },
369 { "v4fnmaddps", { XM
, Vex
, Mxmm
}, 0 },
371 /* PREFIX_EVEX_0F38AB */
375 { "vfmsub213s%XW", { XMScalar
, VexScalar
, EXVexWdqScalar
, EXxEVexR
}, 0 },
376 { "v4fnmaddss", { XMScalar
, VexScalar
, Mxmm
}, 0 },
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