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[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21 /*
22 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 * July 1988
24 * modified by John Hassey (hassey@dg-rtp.dg.com)
25 * x86-64 support added by Jan Hubicka (jh@suse.cz)
26 */
27
28 /*
29 * The main tables describing the instructions is essentially a copy
30 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
31 * Programmers Manual. Usually, there is a capital letter, followed
32 * by a small letter. The capital letter tell the addressing mode,
33 * and the small letter tells about the operand size. Refer to
34 * the Intel manual for details.
35 */
36
37 #include "dis-asm.h"
38 #include "sysdep.h"
39 #include "opintl.h"
40
41 #define MAXLEN 20
42
43 #include <setjmp.h>
44
45 #ifndef UNIXWARE_COMPAT
46 /* Set non-zero for broken, compatible instructions. Set to zero for
47 non-broken opcodes. */
48 #define UNIXWARE_COMPAT 1
49 #endif
50
51 static int fetch_data (struct disassemble_info *, bfd_byte *);
52 static void ckprefix (void);
53 static const char *prefix_name (int, int);
54 static int print_insn (bfd_vma, disassemble_info *);
55 static void dofloat (int);
56 static void OP_ST (int, int);
57 static void OP_STi (int, int);
58 static int putop (const char *, int);
59 static void oappend (const char *);
60 static void append_seg (void);
61 static void OP_indirE (int, int);
62 static void print_operand_value (char *, int, bfd_vma);
63 static void OP_E (int, int);
64 static void OP_G (int, int);
65 static bfd_vma get64 (void);
66 static bfd_signed_vma get32 (void);
67 static bfd_signed_vma get32s (void);
68 static int get16 (void);
69 static void set_op (bfd_vma, int);
70 static void OP_REG (int, int);
71 static void OP_IMREG (int, int);
72 static void OP_I (int, int);
73 static void OP_I64 (int, int);
74 static void OP_sI (int, int);
75 static void OP_J (int, int);
76 static void OP_SEG (int, int);
77 static void OP_DIR (int, int);
78 static void OP_OFF (int, int);
79 static void OP_OFF64 (int, int);
80 static void ptr_reg (int, int);
81 static void OP_ESreg (int, int);
82 static void OP_DSreg (int, int);
83 static void OP_C (int, int);
84 static void OP_D (int, int);
85 static void OP_T (int, int);
86 static void OP_Rd (int, int);
87 static void OP_MMX (int, int);
88 static void OP_XMM (int, int);
89 static void OP_EM (int, int);
90 static void OP_EX (int, int);
91 static void OP_MS (int, int);
92 static void OP_XS (int, int);
93 static void OP_3DNowSuffix (int, int);
94 static void OP_SIMD_Suffix (int, int);
95 static void SIMD_Fixup (int, int);
96 static void PNI_Fixup (int, int);
97 static void BadOp (void);
98
99 struct dis_private {
100 /* Points to first byte not fetched. */
101 bfd_byte *max_fetched;
102 bfd_byte the_buffer[MAXLEN];
103 bfd_vma insn_start;
104 int orig_sizeflag;
105 jmp_buf bailout;
106 };
107
108 /* The opcode for the fwait instruction, which we treat as a prefix
109 when we can. */
110 #define FWAIT_OPCODE (0x9b)
111
112 /* Set to 1 for 64bit mode disassembly. */
113 static int mode_64bit;
114
115 /* Flags for the prefixes for the current instruction. See below. */
116 static int prefixes;
117
118 /* REX prefix the current instruction. See below. */
119 static int rex;
120 /* Bits of REX we've already used. */
121 static int rex_used;
122 #define REX_MODE64 8
123 #define REX_EXTX 4
124 #define REX_EXTY 2
125 #define REX_EXTZ 1
126 /* Mark parts used in the REX prefix. When we are testing for
127 empty prefix (for 8bit register REX extension), just mask it
128 out. Otherwise test for REX bit is excuse for existence of REX
129 only in case value is nonzero. */
130 #define USED_REX(value) \
131 { \
132 if (value) \
133 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
134 else \
135 rex_used |= 0x40; \
136 }
137
138 /* Flags for prefixes which we somehow handled when printing the
139 current instruction. */
140 static int used_prefixes;
141
142 /* Flags stored in PREFIXES. */
143 #define PREFIX_REPZ 1
144 #define PREFIX_REPNZ 2
145 #define PREFIX_LOCK 4
146 #define PREFIX_CS 8
147 #define PREFIX_SS 0x10
148 #define PREFIX_DS 0x20
149 #define PREFIX_ES 0x40
150 #define PREFIX_FS 0x80
151 #define PREFIX_GS 0x100
152 #define PREFIX_DATA 0x200
153 #define PREFIX_ADDR 0x400
154 #define PREFIX_FWAIT 0x800
155
156 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
157 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
158 on error. */
159 #define FETCH_DATA(info, addr) \
160 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
161 ? 1 : fetch_data ((info), (addr)))
162
163 static int
164 fetch_data (struct disassemble_info *info, bfd_byte *addr)
165 {
166 int status;
167 struct dis_private *priv = (struct dis_private *) info->private_data;
168 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
169
170 status = (*info->read_memory_func) (start,
171 priv->max_fetched,
172 addr - priv->max_fetched,
173 info);
174 if (status != 0)
175 {
176 /* If we did manage to read at least one byte, then
177 print_insn_i386 will do something sensible. Otherwise, print
178 an error. We do that here because this is where we know
179 STATUS. */
180 if (priv->max_fetched == priv->the_buffer)
181 (*info->memory_error_func) (status, start, info);
182 longjmp (priv->bailout, 1);
183 }
184 else
185 priv->max_fetched = addr;
186 return 1;
187 }
188
189 #define XX NULL, 0
190
191 #define Eb OP_E, b_mode
192 #define Ev OP_E, v_mode
193 #define Ed OP_E, d_mode
194 #define Edq OP_E, dq_mode
195 #define indirEb OP_indirE, b_mode
196 #define indirEv OP_indirE, v_mode
197 #define Ew OP_E, w_mode
198 #define Ma OP_E, v_mode
199 #define M OP_E, 0 /* lea, lgdt, etc. */
200 #define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
201 #define Gb OP_G, b_mode
202 #define Gv OP_G, v_mode
203 #define Gd OP_G, d_mode
204 #define Gw OP_G, w_mode
205 #define Rd OP_Rd, d_mode
206 #define Rm OP_Rd, m_mode
207 #define Ib OP_I, b_mode
208 #define sIb OP_sI, b_mode /* sign extened byte */
209 #define Iv OP_I, v_mode
210 #define Iq OP_I, q_mode
211 #define Iv64 OP_I64, v_mode
212 #define Iw OP_I, w_mode
213 #define Jb OP_J, b_mode
214 #define Jv OP_J, v_mode
215 #define Cm OP_C, m_mode
216 #define Dm OP_D, m_mode
217 #define Td OP_T, d_mode
218
219 #define RMeAX OP_REG, eAX_reg
220 #define RMeBX OP_REG, eBX_reg
221 #define RMeCX OP_REG, eCX_reg
222 #define RMeDX OP_REG, eDX_reg
223 #define RMeSP OP_REG, eSP_reg
224 #define RMeBP OP_REG, eBP_reg
225 #define RMeSI OP_REG, eSI_reg
226 #define RMeDI OP_REG, eDI_reg
227 #define RMrAX OP_REG, rAX_reg
228 #define RMrBX OP_REG, rBX_reg
229 #define RMrCX OP_REG, rCX_reg
230 #define RMrDX OP_REG, rDX_reg
231 #define RMrSP OP_REG, rSP_reg
232 #define RMrBP OP_REG, rBP_reg
233 #define RMrSI OP_REG, rSI_reg
234 #define RMrDI OP_REG, rDI_reg
235 #define RMAL OP_REG, al_reg
236 #define RMAL OP_REG, al_reg
237 #define RMCL OP_REG, cl_reg
238 #define RMDL OP_REG, dl_reg
239 #define RMBL OP_REG, bl_reg
240 #define RMAH OP_REG, ah_reg
241 #define RMCH OP_REG, ch_reg
242 #define RMDH OP_REG, dh_reg
243 #define RMBH OP_REG, bh_reg
244 #define RMAX OP_REG, ax_reg
245 #define RMDX OP_REG, dx_reg
246
247 #define eAX OP_IMREG, eAX_reg
248 #define eBX OP_IMREG, eBX_reg
249 #define eCX OP_IMREG, eCX_reg
250 #define eDX OP_IMREG, eDX_reg
251 #define eSP OP_IMREG, eSP_reg
252 #define eBP OP_IMREG, eBP_reg
253 #define eSI OP_IMREG, eSI_reg
254 #define eDI OP_IMREG, eDI_reg
255 #define AL OP_IMREG, al_reg
256 #define AL OP_IMREG, al_reg
257 #define CL OP_IMREG, cl_reg
258 #define DL OP_IMREG, dl_reg
259 #define BL OP_IMREG, bl_reg
260 #define AH OP_IMREG, ah_reg
261 #define CH OP_IMREG, ch_reg
262 #define DH OP_IMREG, dh_reg
263 #define BH OP_IMREG, bh_reg
264 #define AX OP_IMREG, ax_reg
265 #define DX OP_IMREG, dx_reg
266 #define indirDX OP_IMREG, indir_dx_reg
267
268 #define Sw OP_SEG, w_mode
269 #define Ap OP_DIR, 0
270 #define Ob OP_OFF, b_mode
271 #define Ob64 OP_OFF64, b_mode
272 #define Ov OP_OFF, v_mode
273 #define Ov64 OP_OFF64, v_mode
274 #define Xb OP_DSreg, eSI_reg
275 #define Xv OP_DSreg, eSI_reg
276 #define Yb OP_ESreg, eDI_reg
277 #define Yv OP_ESreg, eDI_reg
278 #define DSBX OP_DSreg, eBX_reg
279
280 #define es OP_REG, es_reg
281 #define ss OP_REG, ss_reg
282 #define cs OP_REG, cs_reg
283 #define ds OP_REG, ds_reg
284 #define fs OP_REG, fs_reg
285 #define gs OP_REG, gs_reg
286
287 #define MX OP_MMX, 0
288 #define XM OP_XMM, 0
289 #define EM OP_EM, v_mode
290 #define EX OP_EX, v_mode
291 #define MS OP_MS, v_mode
292 #define XS OP_XS, v_mode
293 #define None OP_E, 0
294 #define OPSUF OP_3DNowSuffix, 0
295 #define OPSIMD OP_SIMD_Suffix, 0
296
297 #define cond_jump_flag NULL, cond_jump_mode
298 #define loop_jcxz_flag NULL, loop_jcxz_mode
299
300 /* bits in sizeflag */
301 #define SUFFIX_ALWAYS 4
302 #define AFLAG 2
303 #define DFLAG 1
304
305 #define b_mode 1 /* byte operand */
306 #define v_mode 2 /* operand size depends on prefixes */
307 #define w_mode 3 /* word operand */
308 #define d_mode 4 /* double word operand */
309 #define q_mode 5 /* quad word operand */
310 #define x_mode 6
311 #define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */
312 #define cond_jump_mode 8
313 #define loop_jcxz_mode 9
314 #define dq_mode 10 /* operand size depends on REX prefixes. */
315
316 #define es_reg 100
317 #define cs_reg 101
318 #define ss_reg 102
319 #define ds_reg 103
320 #define fs_reg 104
321 #define gs_reg 105
322
323 #define eAX_reg 108
324 #define eCX_reg 109
325 #define eDX_reg 110
326 #define eBX_reg 111
327 #define eSP_reg 112
328 #define eBP_reg 113
329 #define eSI_reg 114
330 #define eDI_reg 115
331
332 #define al_reg 116
333 #define cl_reg 117
334 #define dl_reg 118
335 #define bl_reg 119
336 #define ah_reg 120
337 #define ch_reg 121
338 #define dh_reg 122
339 #define bh_reg 123
340
341 #define ax_reg 124
342 #define cx_reg 125
343 #define dx_reg 126
344 #define bx_reg 127
345 #define sp_reg 128
346 #define bp_reg 129
347 #define si_reg 130
348 #define di_reg 131
349
350 #define rAX_reg 132
351 #define rCX_reg 133
352 #define rDX_reg 134
353 #define rBX_reg 135
354 #define rSP_reg 136
355 #define rBP_reg 137
356 #define rSI_reg 138
357 #define rDI_reg 139
358
359 #define indir_dx_reg 150
360
361 #define FLOATCODE 1
362 #define USE_GROUPS 2
363 #define USE_PREFIX_USER_TABLE 3
364 #define X86_64_SPECIAL 4
365
366 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
367
368 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
369 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
370 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
371 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
372 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
373 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
374 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
375 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
376 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
377 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
378 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
379 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
380 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
381 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
382 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
383 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
384 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
385 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
386 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
387 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
388 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
389 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
390 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
391
392 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
393 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
394 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
395 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
396 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
397 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
398 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
399 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
400 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
401 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
402 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
403 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
404 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
405 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
406 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
407 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
408 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
409 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
410 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
411 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
412 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
413 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
414 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
415 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
416 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
417 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
418 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
419 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
420 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
421 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
422 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
423 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
424 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
425
426 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
427
428 typedef void (*op_rtn) (int bytemode, int sizeflag);
429
430 struct dis386 {
431 const char *name;
432 op_rtn op1;
433 int bytemode1;
434 op_rtn op2;
435 int bytemode2;
436 op_rtn op3;
437 int bytemode3;
438 };
439
440 /* Upper case letters in the instruction names here are macros.
441 'A' => print 'b' if no register operands or suffix_always is true
442 'B' => print 'b' if suffix_always is true
443 'E' => print 'e' if 32-bit form of jcxz
444 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
445 'H' => print ",pt" or ",pn" branch hint
446 'L' => print 'l' if suffix_always is true
447 'N' => print 'n' if instruction has no wait "prefix"
448 'O' => print 'd', or 'o'
449 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
450 . or suffix_always is true. print 'q' if rex prefix is present.
451 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
452 . is true
453 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
454 'S' => print 'w', 'l' or 'q' if suffix_always is true
455 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
456 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
457 'X' => print 's', 'd' depending on data16 prefix (for XMM)
458 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
459 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
460
461 Many of the above letters print nothing in Intel mode. See "putop"
462 for the details.
463
464 Braces '{' and '}', and vertical bars '|', indicate alternative
465 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
466 modes. In cases where there are only two alternatives, the X86_64
467 instruction is reserved, and "(bad)" is printed.
468 */
469
470 static const struct dis386 dis386[] = {
471 /* 00 */
472 { "addB", Eb, Gb, XX },
473 { "addS", Ev, Gv, XX },
474 { "addB", Gb, Eb, XX },
475 { "addS", Gv, Ev, XX },
476 { "addB", AL, Ib, XX },
477 { "addS", eAX, Iv, XX },
478 { "push{T|}", es, XX, XX },
479 { "pop{T|}", es, XX, XX },
480 /* 08 */
481 { "orB", Eb, Gb, XX },
482 { "orS", Ev, Gv, XX },
483 { "orB", Gb, Eb, XX },
484 { "orS", Gv, Ev, XX },
485 { "orB", AL, Ib, XX },
486 { "orS", eAX, Iv, XX },
487 { "push{T|}", cs, XX, XX },
488 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
489 /* 10 */
490 { "adcB", Eb, Gb, XX },
491 { "adcS", Ev, Gv, XX },
492 { "adcB", Gb, Eb, XX },
493 { "adcS", Gv, Ev, XX },
494 { "adcB", AL, Ib, XX },
495 { "adcS", eAX, Iv, XX },
496 { "push{T|}", ss, XX, XX },
497 { "popT|}", ss, XX, XX },
498 /* 18 */
499 { "sbbB", Eb, Gb, XX },
500 { "sbbS", Ev, Gv, XX },
501 { "sbbB", Gb, Eb, XX },
502 { "sbbS", Gv, Ev, XX },
503 { "sbbB", AL, Ib, XX },
504 { "sbbS", eAX, Iv, XX },
505 { "push{T|}", ds, XX, XX },
506 { "pop{T|}", ds, XX, XX },
507 /* 20 */
508 { "andB", Eb, Gb, XX },
509 { "andS", Ev, Gv, XX },
510 { "andB", Gb, Eb, XX },
511 { "andS", Gv, Ev, XX },
512 { "andB", AL, Ib, XX },
513 { "andS", eAX, Iv, XX },
514 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
515 { "daa{|}", XX, XX, XX },
516 /* 28 */
517 { "subB", Eb, Gb, XX },
518 { "subS", Ev, Gv, XX },
519 { "subB", Gb, Eb, XX },
520 { "subS", Gv, Ev, XX },
521 { "subB", AL, Ib, XX },
522 { "subS", eAX, Iv, XX },
523 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
524 { "das{|}", XX, XX, XX },
525 /* 30 */
526 { "xorB", Eb, Gb, XX },
527 { "xorS", Ev, Gv, XX },
528 { "xorB", Gb, Eb, XX },
529 { "xorS", Gv, Ev, XX },
530 { "xorB", AL, Ib, XX },
531 { "xorS", eAX, Iv, XX },
532 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
533 { "aaa{|}", XX, XX, XX },
534 /* 38 */
535 { "cmpB", Eb, Gb, XX },
536 { "cmpS", Ev, Gv, XX },
537 { "cmpB", Gb, Eb, XX },
538 { "cmpS", Gv, Ev, XX },
539 { "cmpB", AL, Ib, XX },
540 { "cmpS", eAX, Iv, XX },
541 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
542 { "aas{|}", XX, XX, XX },
543 /* 40 */
544 { "inc{S|}", RMeAX, XX, XX },
545 { "inc{S|}", RMeCX, XX, XX },
546 { "inc{S|}", RMeDX, XX, XX },
547 { "inc{S|}", RMeBX, XX, XX },
548 { "inc{S|}", RMeSP, XX, XX },
549 { "inc{S|}", RMeBP, XX, XX },
550 { "inc{S|}", RMeSI, XX, XX },
551 { "inc{S|}", RMeDI, XX, XX },
552 /* 48 */
553 { "dec{S|}", RMeAX, XX, XX },
554 { "dec{S|}", RMeCX, XX, XX },
555 { "dec{S|}", RMeDX, XX, XX },
556 { "dec{S|}", RMeBX, XX, XX },
557 { "dec{S|}", RMeSP, XX, XX },
558 { "dec{S|}", RMeBP, XX, XX },
559 { "dec{S|}", RMeSI, XX, XX },
560 { "dec{S|}", RMeDI, XX, XX },
561 /* 50 */
562 { "pushS", RMrAX, XX, XX },
563 { "pushS", RMrCX, XX, XX },
564 { "pushS", RMrDX, XX, XX },
565 { "pushS", RMrBX, XX, XX },
566 { "pushS", RMrSP, XX, XX },
567 { "pushS", RMrBP, XX, XX },
568 { "pushS", RMrSI, XX, XX },
569 { "pushS", RMrDI, XX, XX },
570 /* 58 */
571 { "popS", RMrAX, XX, XX },
572 { "popS", RMrCX, XX, XX },
573 { "popS", RMrDX, XX, XX },
574 { "popS", RMrBX, XX, XX },
575 { "popS", RMrSP, XX, XX },
576 { "popS", RMrBP, XX, XX },
577 { "popS", RMrSI, XX, XX },
578 { "popS", RMrDI, XX, XX },
579 /* 60 */
580 { "pusha{P|}", XX, XX, XX },
581 { "popa{P|}", XX, XX, XX },
582 { "bound{S|}", Gv, Ma, XX },
583 { X86_64_0 },
584 { "(bad)", XX, XX, XX }, /* seg fs */
585 { "(bad)", XX, XX, XX }, /* seg gs */
586 { "(bad)", XX, XX, XX }, /* op size prefix */
587 { "(bad)", XX, XX, XX }, /* adr size prefix */
588 /* 68 */
589 { "pushT", Iq, XX, XX },
590 { "imulS", Gv, Ev, Iv },
591 { "pushT", sIb, XX, XX },
592 { "imulS", Gv, Ev, sIb },
593 { "ins{b||b|}", Yb, indirDX, XX },
594 { "ins{R||R|}", Yv, indirDX, XX },
595 { "outs{b||b|}", indirDX, Xb, XX },
596 { "outs{R||R|}", indirDX, Xv, XX },
597 /* 70 */
598 { "joH", Jb, XX, cond_jump_flag },
599 { "jnoH", Jb, XX, cond_jump_flag },
600 { "jbH", Jb, XX, cond_jump_flag },
601 { "jaeH", Jb, XX, cond_jump_flag },
602 { "jeH", Jb, XX, cond_jump_flag },
603 { "jneH", Jb, XX, cond_jump_flag },
604 { "jbeH", Jb, XX, cond_jump_flag },
605 { "jaH", Jb, XX, cond_jump_flag },
606 /* 78 */
607 { "jsH", Jb, XX, cond_jump_flag },
608 { "jnsH", Jb, XX, cond_jump_flag },
609 { "jpH", Jb, XX, cond_jump_flag },
610 { "jnpH", Jb, XX, cond_jump_flag },
611 { "jlH", Jb, XX, cond_jump_flag },
612 { "jgeH", Jb, XX, cond_jump_flag },
613 { "jleH", Jb, XX, cond_jump_flag },
614 { "jgH", Jb, XX, cond_jump_flag },
615 /* 80 */
616 { GRP1b },
617 { GRP1S },
618 { "(bad)", XX, XX, XX },
619 { GRP1Ss },
620 { "testB", Eb, Gb, XX },
621 { "testS", Ev, Gv, XX },
622 { "xchgB", Eb, Gb, XX },
623 { "xchgS", Ev, Gv, XX },
624 /* 88 */
625 { "movB", Eb, Gb, XX },
626 { "movS", Ev, Gv, XX },
627 { "movB", Gb, Eb, XX },
628 { "movS", Gv, Ev, XX },
629 { "movQ", Ev, Sw, XX },
630 { "leaS", Gv, M, XX },
631 { "movQ", Sw, Ev, XX },
632 { "popU", Ev, XX, XX },
633 /* 90 */
634 { "nop", XX, XX, XX },
635 /* FIXME: NOP with REPz prefix is called PAUSE. */
636 { "xchgS", RMeCX, eAX, XX },
637 { "xchgS", RMeDX, eAX, XX },
638 { "xchgS", RMeBX, eAX, XX },
639 { "xchgS", RMeSP, eAX, XX },
640 { "xchgS", RMeBP, eAX, XX },
641 { "xchgS", RMeSI, eAX, XX },
642 { "xchgS", RMeDI, eAX, XX },
643 /* 98 */
644 { "cW{tR||tR|}", XX, XX, XX },
645 { "cR{tO||tO|}", XX, XX, XX },
646 { "lcall{T|}", Ap, XX, XX },
647 { "(bad)", XX, XX, XX }, /* fwait */
648 { "pushfT", XX, XX, XX },
649 { "popfT", XX, XX, XX },
650 { "sahf{|}", XX, XX, XX },
651 { "lahf{|}", XX, XX, XX },
652 /* a0 */
653 { "movB", AL, Ob64, XX },
654 { "movS", eAX, Ov64, XX },
655 { "movB", Ob64, AL, XX },
656 { "movS", Ov64, eAX, XX },
657 { "movs{b||b|}", Yb, Xb, XX },
658 { "movs{R||R|}", Yv, Xv, XX },
659 { "cmps{b||b|}", Xb, Yb, XX },
660 { "cmps{R||R|}", Xv, Yv, XX },
661 /* a8 */
662 { "testB", AL, Ib, XX },
663 { "testS", eAX, Iv, XX },
664 { "stosB", Yb, AL, XX },
665 { "stosS", Yv, eAX, XX },
666 { "lodsB", AL, Xb, XX },
667 { "lodsS", eAX, Xv, XX },
668 { "scasB", AL, Yb, XX },
669 { "scasS", eAX, Yv, XX },
670 /* b0 */
671 { "movB", RMAL, Ib, XX },
672 { "movB", RMCL, Ib, XX },
673 { "movB", RMDL, Ib, XX },
674 { "movB", RMBL, Ib, XX },
675 { "movB", RMAH, Ib, XX },
676 { "movB", RMCH, Ib, XX },
677 { "movB", RMDH, Ib, XX },
678 { "movB", RMBH, Ib, XX },
679 /* b8 */
680 { "movS", RMeAX, Iv64, XX },
681 { "movS", RMeCX, Iv64, XX },
682 { "movS", RMeDX, Iv64, XX },
683 { "movS", RMeBX, Iv64, XX },
684 { "movS", RMeSP, Iv64, XX },
685 { "movS", RMeBP, Iv64, XX },
686 { "movS", RMeSI, Iv64, XX },
687 { "movS", RMeDI, Iv64, XX },
688 /* c0 */
689 { GRP2b },
690 { GRP2S },
691 { "retT", Iw, XX, XX },
692 { "retT", XX, XX, XX },
693 { "les{S|}", Gv, Mp, XX },
694 { "ldsS", Gv, Mp, XX },
695 { "movA", Eb, Ib, XX },
696 { "movQ", Ev, Iv, XX },
697 /* c8 */
698 { "enterT", Iw, Ib, XX },
699 { "leaveT", XX, XX, XX },
700 { "lretP", Iw, XX, XX },
701 { "lretP", XX, XX, XX },
702 { "int3", XX, XX, XX },
703 { "int", Ib, XX, XX },
704 { "into{|}", XX, XX, XX },
705 { "iretP", XX, XX, XX },
706 /* d0 */
707 { GRP2b_one },
708 { GRP2S_one },
709 { GRP2b_cl },
710 { GRP2S_cl },
711 { "aam{|}", sIb, XX, XX },
712 { "aad{|}", sIb, XX, XX },
713 { "(bad)", XX, XX, XX },
714 { "xlat", DSBX, XX, XX },
715 /* d8 */
716 { FLOAT },
717 { FLOAT },
718 { FLOAT },
719 { FLOAT },
720 { FLOAT },
721 { FLOAT },
722 { FLOAT },
723 { FLOAT },
724 /* e0 */
725 { "loopneFH", Jb, XX, loop_jcxz_flag },
726 { "loopeFH", Jb, XX, loop_jcxz_flag },
727 { "loopFH", Jb, XX, loop_jcxz_flag },
728 { "jEcxzH", Jb, XX, loop_jcxz_flag },
729 { "inB", AL, Ib, XX },
730 { "inS", eAX, Ib, XX },
731 { "outB", Ib, AL, XX },
732 { "outS", Ib, eAX, XX },
733 /* e8 */
734 { "callT", Jv, XX, XX },
735 { "jmpT", Jv, XX, XX },
736 { "ljmp{T|}", Ap, XX, XX },
737 { "jmp", Jb, XX, XX },
738 { "inB", AL, indirDX, XX },
739 { "inS", eAX, indirDX, XX },
740 { "outB", indirDX, AL, XX },
741 { "outS", indirDX, eAX, XX },
742 /* f0 */
743 { "(bad)", XX, XX, XX }, /* lock prefix */
744 { "icebp", XX, XX, XX },
745 { "(bad)", XX, XX, XX }, /* repne */
746 { "(bad)", XX, XX, XX }, /* repz */
747 { "hlt", XX, XX, XX },
748 { "cmc", XX, XX, XX },
749 { GRP3b },
750 { GRP3S },
751 /* f8 */
752 { "clc", XX, XX, XX },
753 { "stc", XX, XX, XX },
754 { "cli", XX, XX, XX },
755 { "sti", XX, XX, XX },
756 { "cld", XX, XX, XX },
757 { "std", XX, XX, XX },
758 { GRP4 },
759 { GRP5 },
760 };
761
762 static const struct dis386 dis386_twobyte[] = {
763 /* 00 */
764 { GRP6 },
765 { GRP7 },
766 { "larS", Gv, Ew, XX },
767 { "lslS", Gv, Ew, XX },
768 { "(bad)", XX, XX, XX },
769 { "syscall", XX, XX, XX },
770 { "clts", XX, XX, XX },
771 { "sysretP", XX, XX, XX },
772 /* 08 */
773 { "invd", XX, XX, XX },
774 { "wbinvd", XX, XX, XX },
775 { "(bad)", XX, XX, XX },
776 { "ud2a", XX, XX, XX },
777 { "(bad)", XX, XX, XX },
778 { GRPAMD },
779 { "femms", XX, XX, XX },
780 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
781 /* 10 */
782 { PREGRP8 },
783 { PREGRP9 },
784 { PREGRP30 },
785 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
786 { "unpcklpX", XM, EX, XX },
787 { "unpckhpX", XM, EX, XX },
788 { PREGRP31 },
789 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
790 /* 18 */
791 { GRP14 },
792 { "(bad)", XX, XX, XX },
793 { "(bad)", XX, XX, XX },
794 { "(bad)", XX, XX, XX },
795 { "(bad)", XX, XX, XX },
796 { "(bad)", XX, XX, XX },
797 { "(bad)", XX, XX, XX },
798 { "(bad)", XX, XX, XX },
799 /* 20 */
800 { "movL", Rm, Cm, XX },
801 { "movL", Rm, Dm, XX },
802 { "movL", Cm, Rm, XX },
803 { "movL", Dm, Rm, XX },
804 { "movL", Rd, Td, XX },
805 { "(bad)", XX, XX, XX },
806 { "movL", Td, Rd, XX },
807 { "(bad)", XX, XX, XX },
808 /* 28 */
809 { "movapX", XM, EX, XX },
810 { "movapX", EX, XM, XX },
811 { PREGRP2 },
812 { "movntpX", Ev, XM, XX },
813 { PREGRP4 },
814 { PREGRP3 },
815 { "ucomisX", XM,EX, XX },
816 { "comisX", XM,EX, XX },
817 /* 30 */
818 { "wrmsr", XX, XX, XX },
819 { "rdtsc", XX, XX, XX },
820 { "rdmsr", XX, XX, XX },
821 { "rdpmc", XX, XX, XX },
822 { "sysenter", XX, XX, XX },
823 { "sysexit", XX, XX, XX },
824 { "(bad)", XX, XX, XX },
825 { "(bad)", XX, XX, XX },
826 /* 38 */
827 { "(bad)", XX, XX, XX },
828 { "(bad)", XX, XX, XX },
829 { "(bad)", XX, XX, XX },
830 { "(bad)", XX, XX, XX },
831 { "(bad)", XX, XX, XX },
832 { "(bad)", XX, XX, XX },
833 { "(bad)", XX, XX, XX },
834 { "(bad)", XX, XX, XX },
835 /* 40 */
836 { "cmovo", Gv, Ev, XX },
837 { "cmovno", Gv, Ev, XX },
838 { "cmovb", Gv, Ev, XX },
839 { "cmovae", Gv, Ev, XX },
840 { "cmove", Gv, Ev, XX },
841 { "cmovne", Gv, Ev, XX },
842 { "cmovbe", Gv, Ev, XX },
843 { "cmova", Gv, Ev, XX },
844 /* 48 */
845 { "cmovs", Gv, Ev, XX },
846 { "cmovns", Gv, Ev, XX },
847 { "cmovp", Gv, Ev, XX },
848 { "cmovnp", Gv, Ev, XX },
849 { "cmovl", Gv, Ev, XX },
850 { "cmovge", Gv, Ev, XX },
851 { "cmovle", Gv, Ev, XX },
852 { "cmovg", Gv, Ev, XX },
853 /* 50 */
854 { "movmskpX", Gd, XS, XX },
855 { PREGRP13 },
856 { PREGRP12 },
857 { PREGRP11 },
858 { "andpX", XM, EX, XX },
859 { "andnpX", XM, EX, XX },
860 { "orpX", XM, EX, XX },
861 { "xorpX", XM, EX, XX },
862 /* 58 */
863 { PREGRP0 },
864 { PREGRP10 },
865 { PREGRP17 },
866 { PREGRP16 },
867 { PREGRP14 },
868 { PREGRP7 },
869 { PREGRP5 },
870 { PREGRP6 },
871 /* 60 */
872 { "punpcklbw", MX, EM, XX },
873 { "punpcklwd", MX, EM, XX },
874 { "punpckldq", MX, EM, XX },
875 { "packsswb", MX, EM, XX },
876 { "pcmpgtb", MX, EM, XX },
877 { "pcmpgtw", MX, EM, XX },
878 { "pcmpgtd", MX, EM, XX },
879 { "packuswb", MX, EM, XX },
880 /* 68 */
881 { "punpckhbw", MX, EM, XX },
882 { "punpckhwd", MX, EM, XX },
883 { "punpckhdq", MX, EM, XX },
884 { "packssdw", MX, EM, XX },
885 { PREGRP26 },
886 { PREGRP24 },
887 { "movd", MX, Edq, XX },
888 { PREGRP19 },
889 /* 70 */
890 { PREGRP22 },
891 { GRP10 },
892 { GRP11 },
893 { GRP12 },
894 { "pcmpeqb", MX, EM, XX },
895 { "pcmpeqw", MX, EM, XX },
896 { "pcmpeqd", MX, EM, XX },
897 { "emms", XX, XX, XX },
898 /* 78 */
899 { "(bad)", XX, XX, XX },
900 { "(bad)", XX, XX, XX },
901 { "(bad)", XX, XX, XX },
902 { "(bad)", XX, XX, XX },
903 { PREGRP28 },
904 { PREGRP29 },
905 { PREGRP23 },
906 { PREGRP20 },
907 /* 80 */
908 { "joH", Jv, XX, cond_jump_flag },
909 { "jnoH", Jv, XX, cond_jump_flag },
910 { "jbH", Jv, XX, cond_jump_flag },
911 { "jaeH", Jv, XX, cond_jump_flag },
912 { "jeH", Jv, XX, cond_jump_flag },
913 { "jneH", Jv, XX, cond_jump_flag },
914 { "jbeH", Jv, XX, cond_jump_flag },
915 { "jaH", Jv, XX, cond_jump_flag },
916 /* 88 */
917 { "jsH", Jv, XX, cond_jump_flag },
918 { "jnsH", Jv, XX, cond_jump_flag },
919 { "jpH", Jv, XX, cond_jump_flag },
920 { "jnpH", Jv, XX, cond_jump_flag },
921 { "jlH", Jv, XX, cond_jump_flag },
922 { "jgeH", Jv, XX, cond_jump_flag },
923 { "jleH", Jv, XX, cond_jump_flag },
924 { "jgH", Jv, XX, cond_jump_flag },
925 /* 90 */
926 { "seto", Eb, XX, XX },
927 { "setno", Eb, XX, XX },
928 { "setb", Eb, XX, XX },
929 { "setae", Eb, XX, XX },
930 { "sete", Eb, XX, XX },
931 { "setne", Eb, XX, XX },
932 { "setbe", Eb, XX, XX },
933 { "seta", Eb, XX, XX },
934 /* 98 */
935 { "sets", Eb, XX, XX },
936 { "setns", Eb, XX, XX },
937 { "setp", Eb, XX, XX },
938 { "setnp", Eb, XX, XX },
939 { "setl", Eb, XX, XX },
940 { "setge", Eb, XX, XX },
941 { "setle", Eb, XX, XX },
942 { "setg", Eb, XX, XX },
943 /* a0 */
944 { "pushT", fs, XX, XX },
945 { "popT", fs, XX, XX },
946 { "cpuid", XX, XX, XX },
947 { "btS", Ev, Gv, XX },
948 { "shldS", Ev, Gv, Ib },
949 { "shldS", Ev, Gv, CL },
950 { "(bad)", XX, XX, XX },
951 { "(bad)", XX, XX, XX },
952 /* a8 */
953 { "pushT", gs, XX, XX },
954 { "popT", gs, XX, XX },
955 { "rsm", XX, XX, XX },
956 { "btsS", Ev, Gv, XX },
957 { "shrdS", Ev, Gv, Ib },
958 { "shrdS", Ev, Gv, CL },
959 { GRP13 },
960 { "imulS", Gv, Ev, XX },
961 /* b0 */
962 { "cmpxchgB", Eb, Gb, XX },
963 { "cmpxchgS", Ev, Gv, XX },
964 { "lssS", Gv, Mp, XX },
965 { "btrS", Ev, Gv, XX },
966 { "lfsS", Gv, Mp, XX },
967 { "lgsS", Gv, Mp, XX },
968 { "movz{bR|x|bR|x}", Gv, Eb, XX },
969 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
970 /* b8 */
971 { "(bad)", XX, XX, XX },
972 { "ud2b", XX, XX, XX },
973 { GRP8 },
974 { "btcS", Ev, Gv, XX },
975 { "bsfS", Gv, Ev, XX },
976 { "bsrS", Gv, Ev, XX },
977 { "movs{bR|x|bR|x}", Gv, Eb, XX },
978 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
979 /* c0 */
980 { "xaddB", Eb, Gb, XX },
981 { "xaddS", Ev, Gv, XX },
982 { PREGRP1 },
983 { "movntiS", Ev, Gv, XX },
984 { "pinsrw", MX, Ed, Ib },
985 { "pextrw", Gd, MS, Ib },
986 { "shufpX", XM, EX, Ib },
987 { GRP9 },
988 /* c8 */
989 { "bswap", RMeAX, XX, XX },
990 { "bswap", RMeCX, XX, XX },
991 { "bswap", RMeDX, XX, XX },
992 { "bswap", RMeBX, XX, XX },
993 { "bswap", RMeSP, XX, XX },
994 { "bswap", RMeBP, XX, XX },
995 { "bswap", RMeSI, XX, XX },
996 { "bswap", RMeDI, XX, XX },
997 /* d0 */
998 { PREGRP27 },
999 { "psrlw", MX, EM, XX },
1000 { "psrld", MX, EM, XX },
1001 { "psrlq", MX, EM, XX },
1002 { "paddq", MX, EM, XX },
1003 { "pmullw", MX, EM, XX },
1004 { PREGRP21 },
1005 { "pmovmskb", Gd, MS, XX },
1006 /* d8 */
1007 { "psubusb", MX, EM, XX },
1008 { "psubusw", MX, EM, XX },
1009 { "pminub", MX, EM, XX },
1010 { "pand", MX, EM, XX },
1011 { "paddusb", MX, EM, XX },
1012 { "paddusw", MX, EM, XX },
1013 { "pmaxub", MX, EM, XX },
1014 { "pandn", MX, EM, XX },
1015 /* e0 */
1016 { "pavgb", MX, EM, XX },
1017 { "psraw", MX, EM, XX },
1018 { "psrad", MX, EM, XX },
1019 { "pavgw", MX, EM, XX },
1020 { "pmulhuw", MX, EM, XX },
1021 { "pmulhw", MX, EM, XX },
1022 { PREGRP15 },
1023 { PREGRP25 },
1024 /* e8 */
1025 { "psubsb", MX, EM, XX },
1026 { "psubsw", MX, EM, XX },
1027 { "pminsw", MX, EM, XX },
1028 { "por", MX, EM, XX },
1029 { "paddsb", MX, EM, XX },
1030 { "paddsw", MX, EM, XX },
1031 { "pmaxsw", MX, EM, XX },
1032 { "pxor", MX, EM, XX },
1033 /* f0 */
1034 { PREGRP32 },
1035 { "psllw", MX, EM, XX },
1036 { "pslld", MX, EM, XX },
1037 { "psllq", MX, EM, XX },
1038 { "pmuludq", MX, EM, XX },
1039 { "pmaddwd", MX, EM, XX },
1040 { "psadbw", MX, EM, XX },
1041 { PREGRP18 },
1042 /* f8 */
1043 { "psubb", MX, EM, XX },
1044 { "psubw", MX, EM, XX },
1045 { "psubd", MX, EM, XX },
1046 { "psubq", MX, EM, XX },
1047 { "paddb", MX, EM, XX },
1048 { "paddw", MX, EM, XX },
1049 { "paddd", MX, EM, XX },
1050 { "(bad)", XX, XX, XX }
1051 };
1052
1053 static const unsigned char onebyte_has_modrm[256] = {
1054 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1055 /* ------------------------------- */
1056 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1057 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1058 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1059 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1060 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1061 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1062 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1063 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1064 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1065 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1066 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1067 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1068 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1069 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1070 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1071 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1072 /* ------------------------------- */
1073 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1074 };
1075
1076 static const unsigned char twobyte_has_modrm[256] = {
1077 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1078 /* ------------------------------- */
1079 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1080 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1081 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1082 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1083 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1084 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1085 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1086 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,1,1,1,1, /* 7f */
1087 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1088 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1089 /* a0 */ 0,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1, /* af */
1090 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1091 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1092 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1093 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1094 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1095 /* ------------------------------- */
1096 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1097 };
1098
1099 static const unsigned char twobyte_uses_SSE_prefix[256] = {
1100 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1101 /* ------------------------------- */
1102 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1103 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1104 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1105 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1106 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1107 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1108 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1109 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
1110 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1111 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1112 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1113 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1114 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1115 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1116 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1117 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1118 /* ------------------------------- */
1119 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1120 };
1121
1122 static char obuf[100];
1123 static char *obufp;
1124 static char scratchbuf[100];
1125 static unsigned char *start_codep;
1126 static unsigned char *insn_codep;
1127 static unsigned char *codep;
1128 static disassemble_info *the_info;
1129 static int mod;
1130 static int rm;
1131 static int reg;
1132 static unsigned char need_modrm;
1133
1134 /* If we are accessing mod/rm/reg without need_modrm set, then the
1135 values are stale. Hitting this abort likely indicates that you
1136 need to update onebyte_has_modrm or twobyte_has_modrm. */
1137 #define MODRM_CHECK if (!need_modrm) abort ()
1138
1139 static const char **names64;
1140 static const char **names32;
1141 static const char **names16;
1142 static const char **names8;
1143 static const char **names8rex;
1144 static const char **names_seg;
1145 static const char **index16;
1146
1147 static const char *intel_names64[] = {
1148 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1149 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1150 };
1151 static const char *intel_names32[] = {
1152 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1153 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1154 };
1155 static const char *intel_names16[] = {
1156 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1157 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1158 };
1159 static const char *intel_names8[] = {
1160 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1161 };
1162 static const char *intel_names8rex[] = {
1163 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1164 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1165 };
1166 static const char *intel_names_seg[] = {
1167 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1168 };
1169 static const char *intel_index16[] = {
1170 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1171 };
1172
1173 static const char *att_names64[] = {
1174 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1175 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1176 };
1177 static const char *att_names32[] = {
1178 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1179 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1180 };
1181 static const char *att_names16[] = {
1182 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1183 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1184 };
1185 static const char *att_names8[] = {
1186 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1187 };
1188 static const char *att_names8rex[] = {
1189 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1190 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1191 };
1192 static const char *att_names_seg[] = {
1193 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1194 };
1195 static const char *att_index16[] = {
1196 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1197 };
1198
1199 static const struct dis386 grps[][8] = {
1200 /* GRP1b */
1201 {
1202 { "addA", Eb, Ib, XX },
1203 { "orA", Eb, Ib, XX },
1204 { "adcA", Eb, Ib, XX },
1205 { "sbbA", Eb, Ib, XX },
1206 { "andA", Eb, Ib, XX },
1207 { "subA", Eb, Ib, XX },
1208 { "xorA", Eb, Ib, XX },
1209 { "cmpA", Eb, Ib, XX }
1210 },
1211 /* GRP1S */
1212 {
1213 { "addQ", Ev, Iv, XX },
1214 { "orQ", Ev, Iv, XX },
1215 { "adcQ", Ev, Iv, XX },
1216 { "sbbQ", Ev, Iv, XX },
1217 { "andQ", Ev, Iv, XX },
1218 { "subQ", Ev, Iv, XX },
1219 { "xorQ", Ev, Iv, XX },
1220 { "cmpQ", Ev, Iv, XX }
1221 },
1222 /* GRP1Ss */
1223 {
1224 { "addQ", Ev, sIb, XX },
1225 { "orQ", Ev, sIb, XX },
1226 { "adcQ", Ev, sIb, XX },
1227 { "sbbQ", Ev, sIb, XX },
1228 { "andQ", Ev, sIb, XX },
1229 { "subQ", Ev, sIb, XX },
1230 { "xorQ", Ev, sIb, XX },
1231 { "cmpQ", Ev, sIb, XX }
1232 },
1233 /* GRP2b */
1234 {
1235 { "rolA", Eb, Ib, XX },
1236 { "rorA", Eb, Ib, XX },
1237 { "rclA", Eb, Ib, XX },
1238 { "rcrA", Eb, Ib, XX },
1239 { "shlA", Eb, Ib, XX },
1240 { "shrA", Eb, Ib, XX },
1241 { "(bad)", XX, XX, XX },
1242 { "sarA", Eb, Ib, XX },
1243 },
1244 /* GRP2S */
1245 {
1246 { "rolQ", Ev, Ib, XX },
1247 { "rorQ", Ev, Ib, XX },
1248 { "rclQ", Ev, Ib, XX },
1249 { "rcrQ", Ev, Ib, XX },
1250 { "shlQ", Ev, Ib, XX },
1251 { "shrQ", Ev, Ib, XX },
1252 { "(bad)", XX, XX, XX },
1253 { "sarQ", Ev, Ib, XX },
1254 },
1255 /* GRP2b_one */
1256 {
1257 { "rolA", Eb, XX, XX },
1258 { "rorA", Eb, XX, XX },
1259 { "rclA", Eb, XX, XX },
1260 { "rcrA", Eb, XX, XX },
1261 { "shlA", Eb, XX, XX },
1262 { "shrA", Eb, XX, XX },
1263 { "(bad)", XX, XX, XX },
1264 { "sarA", Eb, XX, XX },
1265 },
1266 /* GRP2S_one */
1267 {
1268 { "rolQ", Ev, XX, XX },
1269 { "rorQ", Ev, XX, XX },
1270 { "rclQ", Ev, XX, XX },
1271 { "rcrQ", Ev, XX, XX },
1272 { "shlQ", Ev, XX, XX },
1273 { "shrQ", Ev, XX, XX },
1274 { "(bad)", XX, XX, XX},
1275 { "sarQ", Ev, XX, XX },
1276 },
1277 /* GRP2b_cl */
1278 {
1279 { "rolA", Eb, CL, XX },
1280 { "rorA", Eb, CL, XX },
1281 { "rclA", Eb, CL, XX },
1282 { "rcrA", Eb, CL, XX },
1283 { "shlA", Eb, CL, XX },
1284 { "shrA", Eb, CL, XX },
1285 { "(bad)", XX, XX, XX },
1286 { "sarA", Eb, CL, XX },
1287 },
1288 /* GRP2S_cl */
1289 {
1290 { "rolQ", Ev, CL, XX },
1291 { "rorQ", Ev, CL, XX },
1292 { "rclQ", Ev, CL, XX },
1293 { "rcrQ", Ev, CL, XX },
1294 { "shlQ", Ev, CL, XX },
1295 { "shrQ", Ev, CL, XX },
1296 { "(bad)", XX, XX, XX },
1297 { "sarQ", Ev, CL, XX }
1298 },
1299 /* GRP3b */
1300 {
1301 { "testA", Eb, Ib, XX },
1302 { "(bad)", Eb, XX, XX },
1303 { "notA", Eb, XX, XX },
1304 { "negA", Eb, XX, XX },
1305 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1306 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1307 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1308 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
1309 },
1310 /* GRP3S */
1311 {
1312 { "testQ", Ev, Iv, XX },
1313 { "(bad)", XX, XX, XX },
1314 { "notQ", Ev, XX, XX },
1315 { "negQ", Ev, XX, XX },
1316 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1317 { "imulQ", Ev, XX, XX },
1318 { "divQ", Ev, XX, XX },
1319 { "idivQ", Ev, XX, XX },
1320 },
1321 /* GRP4 */
1322 {
1323 { "incA", Eb, XX, XX },
1324 { "decA", Eb, XX, XX },
1325 { "(bad)", XX, XX, XX },
1326 { "(bad)", XX, XX, XX },
1327 { "(bad)", XX, XX, XX },
1328 { "(bad)", XX, XX, XX },
1329 { "(bad)", XX, XX, XX },
1330 { "(bad)", XX, XX, XX },
1331 },
1332 /* GRP5 */
1333 {
1334 { "incQ", Ev, XX, XX },
1335 { "decQ", Ev, XX, XX },
1336 { "callT", indirEv, XX, XX },
1337 { "lcallT", indirEv, XX, XX },
1338 { "jmpT", indirEv, XX, XX },
1339 { "ljmpT", indirEv, XX, XX },
1340 { "pushU", Ev, XX, XX },
1341 { "(bad)", XX, XX, XX },
1342 },
1343 /* GRP6 */
1344 {
1345 { "sldtQ", Ev, XX, XX },
1346 { "strQ", Ev, XX, XX },
1347 { "lldt", Ew, XX, XX },
1348 { "ltr", Ew, XX, XX },
1349 { "verr", Ew, XX, XX },
1350 { "verw", Ew, XX, XX },
1351 { "(bad)", XX, XX, XX },
1352 { "(bad)", XX, XX, XX }
1353 },
1354 /* GRP7 */
1355 {
1356 { "sgdtQ", M, XX, XX },
1357 { "sidtQ", PNI_Fixup, 0, XX, XX },
1358 { "lgdtQ", M, XX, XX },
1359 { "lidtQ", M, XX, XX },
1360 { "smswQ", Ev, XX, XX },
1361 { "(bad)", XX, XX, XX },
1362 { "lmsw", Ew, XX, XX },
1363 { "invlpg", Ew, XX, XX },
1364 },
1365 /* GRP8 */
1366 {
1367 { "(bad)", XX, XX, XX },
1368 { "(bad)", XX, XX, XX },
1369 { "(bad)", XX, XX, XX },
1370 { "(bad)", XX, XX, XX },
1371 { "btQ", Ev, Ib, XX },
1372 { "btsQ", Ev, Ib, XX },
1373 { "btrQ", Ev, Ib, XX },
1374 { "btcQ", Ev, Ib, XX },
1375 },
1376 /* GRP9 */
1377 {
1378 { "(bad)", XX, XX, XX },
1379 { "cmpxchg8b", Ev, XX, XX },
1380 { "(bad)", XX, XX, XX },
1381 { "(bad)", XX, XX, XX },
1382 { "(bad)", XX, XX, XX },
1383 { "(bad)", XX, XX, XX },
1384 { "(bad)", XX, XX, XX },
1385 { "(bad)", XX, XX, XX },
1386 },
1387 /* GRP10 */
1388 {
1389 { "(bad)", XX, XX, XX },
1390 { "(bad)", XX, XX, XX },
1391 { "psrlw", MS, Ib, XX },
1392 { "(bad)", XX, XX, XX },
1393 { "psraw", MS, Ib, XX },
1394 { "(bad)", XX, XX, XX },
1395 { "psllw", MS, Ib, XX },
1396 { "(bad)", XX, XX, XX },
1397 },
1398 /* GRP11 */
1399 {
1400 { "(bad)", XX, XX, XX },
1401 { "(bad)", XX, XX, XX },
1402 { "psrld", MS, Ib, XX },
1403 { "(bad)", XX, XX, XX },
1404 { "psrad", MS, Ib, XX },
1405 { "(bad)", XX, XX, XX },
1406 { "pslld", MS, Ib, XX },
1407 { "(bad)", XX, XX, XX },
1408 },
1409 /* GRP12 */
1410 {
1411 { "(bad)", XX, XX, XX },
1412 { "(bad)", XX, XX, XX },
1413 { "psrlq", MS, Ib, XX },
1414 { "psrldq", MS, Ib, XX },
1415 { "(bad)", XX, XX, XX },
1416 { "(bad)", XX, XX, XX },
1417 { "psllq", MS, Ib, XX },
1418 { "pslldq", MS, Ib, XX },
1419 },
1420 /* GRP13 */
1421 {
1422 { "fxsave", Ev, XX, XX },
1423 { "fxrstor", Ev, XX, XX },
1424 { "ldmxcsr", Ev, XX, XX },
1425 { "stmxcsr", Ev, XX, XX },
1426 { "(bad)", XX, XX, XX },
1427 { "lfence", None, XX, XX },
1428 { "mfence", None, XX, XX },
1429 { "clflush", None, XX, XX },
1430 },
1431 /* GRP14 */
1432 {
1433 { "prefetchnta", Ev, XX, XX },
1434 { "prefetcht0", Ev, XX, XX },
1435 { "prefetcht1", Ev, XX, XX },
1436 { "prefetcht2", Ev, XX, XX },
1437 { "(bad)", XX, XX, XX },
1438 { "(bad)", XX, XX, XX },
1439 { "(bad)", XX, XX, XX },
1440 { "(bad)", XX, XX, XX },
1441 },
1442 /* GRPAMD */
1443 {
1444 { "prefetch", Eb, XX, XX },
1445 { "prefetchw", Eb, XX, XX },
1446 { "(bad)", XX, XX, XX },
1447 { "(bad)", XX, XX, XX },
1448 { "(bad)", XX, XX, XX },
1449 { "(bad)", XX, XX, XX },
1450 { "(bad)", XX, XX, XX },
1451 { "(bad)", XX, XX, XX },
1452 }
1453 };
1454
1455 static const struct dis386 prefix_user_table[][4] = {
1456 /* PREGRP0 */
1457 {
1458 { "addps", XM, EX, XX },
1459 { "addss", XM, EX, XX },
1460 { "addpd", XM, EX, XX },
1461 { "addsd", XM, EX, XX },
1462 },
1463 /* PREGRP1 */
1464 {
1465 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
1466 { "", XM, EX, OPSIMD },
1467 { "", XM, EX, OPSIMD },
1468 { "", XM, EX, OPSIMD },
1469 },
1470 /* PREGRP2 */
1471 {
1472 { "cvtpi2ps", XM, EM, XX },
1473 { "cvtsi2ssY", XM, Ev, XX },
1474 { "cvtpi2pd", XM, EM, XX },
1475 { "cvtsi2sdY", XM, Ev, XX },
1476 },
1477 /* PREGRP3 */
1478 {
1479 { "cvtps2pi", MX, EX, XX },
1480 { "cvtss2siY", Gv, EX, XX },
1481 { "cvtpd2pi", MX, EX, XX },
1482 { "cvtsd2siY", Gv, EX, XX },
1483 },
1484 /* PREGRP4 */
1485 {
1486 { "cvttps2pi", MX, EX, XX },
1487 { "cvttss2siY", Gv, EX, XX },
1488 { "cvttpd2pi", MX, EX, XX },
1489 { "cvttsd2siY", Gv, EX, XX },
1490 },
1491 /* PREGRP5 */
1492 {
1493 { "divps", XM, EX, XX },
1494 { "divss", XM, EX, XX },
1495 { "divpd", XM, EX, XX },
1496 { "divsd", XM, EX, XX },
1497 },
1498 /* PREGRP6 */
1499 {
1500 { "maxps", XM, EX, XX },
1501 { "maxss", XM, EX, XX },
1502 { "maxpd", XM, EX, XX },
1503 { "maxsd", XM, EX, XX },
1504 },
1505 /* PREGRP7 */
1506 {
1507 { "minps", XM, EX, XX },
1508 { "minss", XM, EX, XX },
1509 { "minpd", XM, EX, XX },
1510 { "minsd", XM, EX, XX },
1511 },
1512 /* PREGRP8 */
1513 {
1514 { "movups", XM, EX, XX },
1515 { "movss", XM, EX, XX },
1516 { "movupd", XM, EX, XX },
1517 { "movsd", XM, EX, XX },
1518 },
1519 /* PREGRP9 */
1520 {
1521 { "movups", EX, XM, XX },
1522 { "movss", EX, XM, XX },
1523 { "movupd", EX, XM, XX },
1524 { "movsd", EX, XM, XX },
1525 },
1526 /* PREGRP10 */
1527 {
1528 { "mulps", XM, EX, XX },
1529 { "mulss", XM, EX, XX },
1530 { "mulpd", XM, EX, XX },
1531 { "mulsd", XM, EX, XX },
1532 },
1533 /* PREGRP11 */
1534 {
1535 { "rcpps", XM, EX, XX },
1536 { "rcpss", XM, EX, XX },
1537 { "(bad)", XM, EX, XX },
1538 { "(bad)", XM, EX, XX },
1539 },
1540 /* PREGRP12 */
1541 {
1542 { "rsqrtps", XM, EX, XX },
1543 { "rsqrtss", XM, EX, XX },
1544 { "(bad)", XM, EX, XX },
1545 { "(bad)", XM, EX, XX },
1546 },
1547 /* PREGRP13 */
1548 {
1549 { "sqrtps", XM, EX, XX },
1550 { "sqrtss", XM, EX, XX },
1551 { "sqrtpd", XM, EX, XX },
1552 { "sqrtsd", XM, EX, XX },
1553 },
1554 /* PREGRP14 */
1555 {
1556 { "subps", XM, EX, XX },
1557 { "subss", XM, EX, XX },
1558 { "subpd", XM, EX, XX },
1559 { "subsd", XM, EX, XX },
1560 },
1561 /* PREGRP15 */
1562 {
1563 { "(bad)", XM, EX, XX },
1564 { "cvtdq2pd", XM, EX, XX },
1565 { "cvttpd2dq", XM, EX, XX },
1566 { "cvtpd2dq", XM, EX, XX },
1567 },
1568 /* PREGRP16 */
1569 {
1570 { "cvtdq2ps", XM, EX, XX },
1571 { "cvttps2dq",XM, EX, XX },
1572 { "cvtps2dq",XM, EX, XX },
1573 { "(bad)", XM, EX, XX },
1574 },
1575 /* PREGRP17 */
1576 {
1577 { "cvtps2pd", XM, EX, XX },
1578 { "cvtss2sd", XM, EX, XX },
1579 { "cvtpd2ps", XM, EX, XX },
1580 { "cvtsd2ss", XM, EX, XX },
1581 },
1582 /* PREGRP18 */
1583 {
1584 { "maskmovq", MX, MS, XX },
1585 { "(bad)", XM, EX, XX },
1586 { "maskmovdqu", XM, EX, XX },
1587 { "(bad)", XM, EX, XX },
1588 },
1589 /* PREGRP19 */
1590 {
1591 { "movq", MX, EM, XX },
1592 { "movdqu", XM, EX, XX },
1593 { "movdqa", XM, EX, XX },
1594 { "(bad)", XM, EX, XX },
1595 },
1596 /* PREGRP20 */
1597 {
1598 { "movq", EM, MX, XX },
1599 { "movdqu", EX, XM, XX },
1600 { "movdqa", EX, XM, XX },
1601 { "(bad)", EX, XM, XX },
1602 },
1603 /* PREGRP21 */
1604 {
1605 { "(bad)", EX, XM, XX },
1606 { "movq2dq", XM, MS, XX },
1607 { "movq", EX, XM, XX },
1608 { "movdq2q", MX, XS, XX },
1609 },
1610 /* PREGRP22 */
1611 {
1612 { "pshufw", MX, EM, Ib },
1613 { "pshufhw", XM, EX, Ib },
1614 { "pshufd", XM, EX, Ib },
1615 { "pshuflw", XM, EX, Ib },
1616 },
1617 /* PREGRP23 */
1618 {
1619 { "movd", Edq, MX, XX },
1620 { "movq", XM, EX, XX },
1621 { "movd", Edq, XM, XX },
1622 { "(bad)", Ed, XM, XX },
1623 },
1624 /* PREGRP24 */
1625 {
1626 { "(bad)", MX, EX, XX },
1627 { "(bad)", XM, EX, XX },
1628 { "punpckhqdq", XM, EX, XX },
1629 { "(bad)", XM, EX, XX },
1630 },
1631 /* PREGRP25 */
1632 {
1633 { "movntq", Ev, MX, XX },
1634 { "(bad)", Ev, XM, XX },
1635 { "movntdq", Ev, XM, XX },
1636 { "(bad)", Ev, XM, XX },
1637 },
1638 /* PREGRP26 */
1639 {
1640 { "(bad)", MX, EX, XX },
1641 { "(bad)", XM, EX, XX },
1642 { "punpcklqdq", XM, EX, XX },
1643 { "(bad)", XM, EX, XX },
1644 },
1645 /* PREGRP27 */
1646 {
1647 { "(bad)", MX, EX, XX },
1648 { "(bad)", XM, EX, XX },
1649 { "addsubpd", XM, EX, XX },
1650 { "addsubps", XM, EX, XX },
1651 },
1652 /* PREGRP28 */
1653 {
1654 { "(bad)", MX, EX, XX },
1655 { "(bad)", XM, EX, XX },
1656 { "haddpd", XM, EX, XX },
1657 { "haddps", XM, EX, XX },
1658 },
1659 /* PREGRP29 */
1660 {
1661 { "(bad)", MX, EX, XX },
1662 { "(bad)", XM, EX, XX },
1663 { "hsubpd", XM, EX, XX },
1664 { "hsubps", XM, EX, XX },
1665 },
1666 /* PREGRP30 */
1667 {
1668 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1669 { "movsldup", XM, EX, XX },
1670 { "movlpd", XM, EX, XX },
1671 { "movddup", XM, EX, XX },
1672 },
1673 /* PREGRP31 */
1674 {
1675 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1676 { "movshdup", XM, EX, XX },
1677 { "movhpd", XM, EX, XX },
1678 { "(bad)", XM, EX, XX },
1679 },
1680 /* PREGRP32 */
1681 {
1682 { "(bad)", XM, EX, XX },
1683 { "(bad)", XM, EX, XX },
1684 { "(bad)", XM, EX, XX },
1685 { "lddqu", XM, M, XX },
1686 },
1687 };
1688
1689 static const struct dis386 x86_64_table[][2] = {
1690 {
1691 { "arpl", Ew, Gw, XX },
1692 { "movs{||lq|xd}", Gv, Ed, XX },
1693 },
1694 };
1695
1696 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1697
1698 static void
1699 ckprefix (void)
1700 {
1701 int newrex;
1702 rex = 0;
1703 prefixes = 0;
1704 used_prefixes = 0;
1705 rex_used = 0;
1706 while (1)
1707 {
1708 FETCH_DATA (the_info, codep + 1);
1709 newrex = 0;
1710 switch (*codep)
1711 {
1712 /* REX prefixes family. */
1713 case 0x40:
1714 case 0x41:
1715 case 0x42:
1716 case 0x43:
1717 case 0x44:
1718 case 0x45:
1719 case 0x46:
1720 case 0x47:
1721 case 0x48:
1722 case 0x49:
1723 case 0x4a:
1724 case 0x4b:
1725 case 0x4c:
1726 case 0x4d:
1727 case 0x4e:
1728 case 0x4f:
1729 if (mode_64bit)
1730 newrex = *codep;
1731 else
1732 return;
1733 break;
1734 case 0xf3:
1735 prefixes |= PREFIX_REPZ;
1736 break;
1737 case 0xf2:
1738 prefixes |= PREFIX_REPNZ;
1739 break;
1740 case 0xf0:
1741 prefixes |= PREFIX_LOCK;
1742 break;
1743 case 0x2e:
1744 prefixes |= PREFIX_CS;
1745 break;
1746 case 0x36:
1747 prefixes |= PREFIX_SS;
1748 break;
1749 case 0x3e:
1750 prefixes |= PREFIX_DS;
1751 break;
1752 case 0x26:
1753 prefixes |= PREFIX_ES;
1754 break;
1755 case 0x64:
1756 prefixes |= PREFIX_FS;
1757 break;
1758 case 0x65:
1759 prefixes |= PREFIX_GS;
1760 break;
1761 case 0x66:
1762 prefixes |= PREFIX_DATA;
1763 break;
1764 case 0x67:
1765 prefixes |= PREFIX_ADDR;
1766 break;
1767 case FWAIT_OPCODE:
1768 /* fwait is really an instruction. If there are prefixes
1769 before the fwait, they belong to the fwait, *not* to the
1770 following instruction. */
1771 if (prefixes)
1772 {
1773 prefixes |= PREFIX_FWAIT;
1774 codep++;
1775 return;
1776 }
1777 prefixes = PREFIX_FWAIT;
1778 break;
1779 default:
1780 return;
1781 }
1782 /* Rex is ignored when followed by another prefix. */
1783 if (rex)
1784 {
1785 oappend (prefix_name (rex, 0));
1786 oappend (" ");
1787 }
1788 rex = newrex;
1789 codep++;
1790 }
1791 }
1792
1793 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1794 prefix byte. */
1795
1796 static const char *
1797 prefix_name (int pref, int sizeflag)
1798 {
1799 switch (pref)
1800 {
1801 /* REX prefixes family. */
1802 case 0x40:
1803 return "rex";
1804 case 0x41:
1805 return "rexZ";
1806 case 0x42:
1807 return "rexY";
1808 case 0x43:
1809 return "rexYZ";
1810 case 0x44:
1811 return "rexX";
1812 case 0x45:
1813 return "rexXZ";
1814 case 0x46:
1815 return "rexXY";
1816 case 0x47:
1817 return "rexXYZ";
1818 case 0x48:
1819 return "rex64";
1820 case 0x49:
1821 return "rex64Z";
1822 case 0x4a:
1823 return "rex64Y";
1824 case 0x4b:
1825 return "rex64YZ";
1826 case 0x4c:
1827 return "rex64X";
1828 case 0x4d:
1829 return "rex64XZ";
1830 case 0x4e:
1831 return "rex64XY";
1832 case 0x4f:
1833 return "rex64XYZ";
1834 case 0xf3:
1835 return "repz";
1836 case 0xf2:
1837 return "repnz";
1838 case 0xf0:
1839 return "lock";
1840 case 0x2e:
1841 return "cs";
1842 case 0x36:
1843 return "ss";
1844 case 0x3e:
1845 return "ds";
1846 case 0x26:
1847 return "es";
1848 case 0x64:
1849 return "fs";
1850 case 0x65:
1851 return "gs";
1852 case 0x66:
1853 return (sizeflag & DFLAG) ? "data16" : "data32";
1854 case 0x67:
1855 if (mode_64bit)
1856 return (sizeflag & AFLAG) ? "addr32" : "addr64";
1857 else
1858 return ((sizeflag & AFLAG) && !mode_64bit) ? "addr16" : "addr32";
1859 case FWAIT_OPCODE:
1860 return "fwait";
1861 default:
1862 return NULL;
1863 }
1864 }
1865
1866 static char op1out[100], op2out[100], op3out[100];
1867 static int op_ad, op_index[3];
1868 static bfd_vma op_address[3];
1869 static bfd_vma op_riprel[3];
1870 static bfd_vma start_pc;
1871 \f
1872 /*
1873 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1874 * (see topic "Redundant prefixes" in the "Differences from 8086"
1875 * section of the "Virtual 8086 Mode" chapter.)
1876 * 'pc' should be the address of this instruction, it will
1877 * be used to print the target address if this is a relative jump or call
1878 * The function returns the length of this instruction in bytes.
1879 */
1880
1881 static char intel_syntax;
1882 static char open_char;
1883 static char close_char;
1884 static char separator_char;
1885 static char scale_char;
1886
1887 /* Here for backwards compatibility. When gdb stops using
1888 print_insn_i386_att and print_insn_i386_intel these functions can
1889 disappear, and print_insn_i386 be merged into print_insn. */
1890 int
1891 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
1892 {
1893 intel_syntax = 0;
1894
1895 return print_insn (pc, info);
1896 }
1897
1898 int
1899 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
1900 {
1901 intel_syntax = 1;
1902
1903 return print_insn (pc, info);
1904 }
1905
1906 int
1907 print_insn_i386 (bfd_vma pc, disassemble_info *info)
1908 {
1909 intel_syntax = -1;
1910
1911 return print_insn (pc, info);
1912 }
1913
1914 static int
1915 print_insn (bfd_vma pc, disassemble_info *info)
1916 {
1917 const struct dis386 *dp;
1918 int i;
1919 int two_source_ops;
1920 char *first, *second, *third;
1921 int needcomma;
1922 unsigned char uses_SSE_prefix;
1923 int sizeflag;
1924 const char *p;
1925 struct dis_private priv;
1926
1927 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
1928 || info->mach == bfd_mach_x86_64);
1929
1930 if (intel_syntax == (char) -1)
1931 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
1932 || info->mach == bfd_mach_x86_64_intel_syntax);
1933
1934 if (info->mach == bfd_mach_i386_i386
1935 || info->mach == bfd_mach_x86_64
1936 || info->mach == bfd_mach_i386_i386_intel_syntax
1937 || info->mach == bfd_mach_x86_64_intel_syntax)
1938 priv.orig_sizeflag = AFLAG | DFLAG;
1939 else if (info->mach == bfd_mach_i386_i8086)
1940 priv.orig_sizeflag = 0;
1941 else
1942 abort ();
1943
1944 for (p = info->disassembler_options; p != NULL; )
1945 {
1946 if (strncmp (p, "x86-64", 6) == 0)
1947 {
1948 mode_64bit = 1;
1949 priv.orig_sizeflag = AFLAG | DFLAG;
1950 }
1951 else if (strncmp (p, "i386", 4) == 0)
1952 {
1953 mode_64bit = 0;
1954 priv.orig_sizeflag = AFLAG | DFLAG;
1955 }
1956 else if (strncmp (p, "i8086", 5) == 0)
1957 {
1958 mode_64bit = 0;
1959 priv.orig_sizeflag = 0;
1960 }
1961 else if (strncmp (p, "intel", 5) == 0)
1962 {
1963 intel_syntax = 1;
1964 }
1965 else if (strncmp (p, "att", 3) == 0)
1966 {
1967 intel_syntax = 0;
1968 }
1969 else if (strncmp (p, "addr", 4) == 0)
1970 {
1971 if (p[4] == '1' && p[5] == '6')
1972 priv.orig_sizeflag &= ~AFLAG;
1973 else if (p[4] == '3' && p[5] == '2')
1974 priv.orig_sizeflag |= AFLAG;
1975 }
1976 else if (strncmp (p, "data", 4) == 0)
1977 {
1978 if (p[4] == '1' && p[5] == '6')
1979 priv.orig_sizeflag &= ~DFLAG;
1980 else if (p[4] == '3' && p[5] == '2')
1981 priv.orig_sizeflag |= DFLAG;
1982 }
1983 else if (strncmp (p, "suffix", 6) == 0)
1984 priv.orig_sizeflag |= SUFFIX_ALWAYS;
1985
1986 p = strchr (p, ',');
1987 if (p != NULL)
1988 p++;
1989 }
1990
1991 if (intel_syntax)
1992 {
1993 names64 = intel_names64;
1994 names32 = intel_names32;
1995 names16 = intel_names16;
1996 names8 = intel_names8;
1997 names8rex = intel_names8rex;
1998 names_seg = intel_names_seg;
1999 index16 = intel_index16;
2000 open_char = '[';
2001 close_char = ']';
2002 separator_char = '+';
2003 scale_char = '*';
2004 }
2005 else
2006 {
2007 names64 = att_names64;
2008 names32 = att_names32;
2009 names16 = att_names16;
2010 names8 = att_names8;
2011 names8rex = att_names8rex;
2012 names_seg = att_names_seg;
2013 index16 = att_index16;
2014 open_char = '(';
2015 close_char = ')';
2016 separator_char = ',';
2017 scale_char = ',';
2018 }
2019
2020 /* The output looks better if we put 7 bytes on a line, since that
2021 puts most long word instructions on a single line. */
2022 info->bytes_per_line = 7;
2023
2024 info->private_data = &priv;
2025 priv.max_fetched = priv.the_buffer;
2026 priv.insn_start = pc;
2027
2028 obuf[0] = 0;
2029 op1out[0] = 0;
2030 op2out[0] = 0;
2031 op3out[0] = 0;
2032
2033 op_index[0] = op_index[1] = op_index[2] = -1;
2034
2035 the_info = info;
2036 start_pc = pc;
2037 start_codep = priv.the_buffer;
2038 codep = priv.the_buffer;
2039
2040 if (setjmp (priv.bailout) != 0)
2041 {
2042 const char *name;
2043
2044 /* Getting here means we tried for data but didn't get it. That
2045 means we have an incomplete instruction of some sort. Just
2046 print the first byte as a prefix or a .byte pseudo-op. */
2047 if (codep > priv.the_buffer)
2048 {
2049 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2050 if (name != NULL)
2051 (*info->fprintf_func) (info->stream, "%s", name);
2052 else
2053 {
2054 /* Just print the first byte as a .byte instruction. */
2055 (*info->fprintf_func) (info->stream, ".byte 0x%x",
2056 (unsigned int) priv.the_buffer[0]);
2057 }
2058
2059 return 1;
2060 }
2061
2062 return -1;
2063 }
2064
2065 obufp = obuf;
2066 ckprefix ();
2067
2068 insn_codep = codep;
2069 sizeflag = priv.orig_sizeflag;
2070
2071 FETCH_DATA (info, codep + 1);
2072 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2073
2074 if ((prefixes & PREFIX_FWAIT)
2075 && ((*codep < 0xd8) || (*codep > 0xdf)))
2076 {
2077 const char *name;
2078
2079 /* fwait not followed by floating point instruction. Print the
2080 first prefix, which is probably fwait itself. */
2081 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2082 if (name == NULL)
2083 name = INTERNAL_DISASSEMBLER_ERROR;
2084 (*info->fprintf_func) (info->stream, "%s", name);
2085 return 1;
2086 }
2087
2088 if (*codep == 0x0f)
2089 {
2090 FETCH_DATA (info, codep + 2);
2091 dp = &dis386_twobyte[*++codep];
2092 need_modrm = twobyte_has_modrm[*codep];
2093 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2094 }
2095 else
2096 {
2097 dp = &dis386[*codep];
2098 need_modrm = onebyte_has_modrm[*codep];
2099 uses_SSE_prefix = 0;
2100 }
2101 codep++;
2102
2103 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
2104 {
2105 oappend ("repz ");
2106 used_prefixes |= PREFIX_REPZ;
2107 }
2108 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
2109 {
2110 oappend ("repnz ");
2111 used_prefixes |= PREFIX_REPNZ;
2112 }
2113 if (prefixes & PREFIX_LOCK)
2114 {
2115 oappend ("lock ");
2116 used_prefixes |= PREFIX_LOCK;
2117 }
2118
2119 if (prefixes & PREFIX_ADDR)
2120 {
2121 sizeflag ^= AFLAG;
2122 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2123 {
2124 if ((sizeflag & AFLAG) || mode_64bit)
2125 oappend ("addr32 ");
2126 else
2127 oappend ("addr16 ");
2128 used_prefixes |= PREFIX_ADDR;
2129 }
2130 }
2131
2132 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2133 {
2134 sizeflag ^= DFLAG;
2135 if (dp->bytemode3 == cond_jump_mode
2136 && dp->bytemode1 == v_mode
2137 && !intel_syntax)
2138 {
2139 if (sizeflag & DFLAG)
2140 oappend ("data32 ");
2141 else
2142 oappend ("data16 ");
2143 used_prefixes |= PREFIX_DATA;
2144 }
2145 }
2146
2147 if (need_modrm)
2148 {
2149 FETCH_DATA (info, codep + 1);
2150 mod = (*codep >> 6) & 3;
2151 reg = (*codep >> 3) & 7;
2152 rm = *codep & 7;
2153 }
2154
2155 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2156 {
2157 dofloat (sizeflag);
2158 }
2159 else
2160 {
2161 int index;
2162 if (dp->name == NULL)
2163 {
2164 switch (dp->bytemode1)
2165 {
2166 case USE_GROUPS:
2167 dp = &grps[dp->bytemode2][reg];
2168 break;
2169
2170 case USE_PREFIX_USER_TABLE:
2171 index = 0;
2172 used_prefixes |= (prefixes & PREFIX_REPZ);
2173 if (prefixes & PREFIX_REPZ)
2174 index = 1;
2175 else
2176 {
2177 used_prefixes |= (prefixes & PREFIX_DATA);
2178 if (prefixes & PREFIX_DATA)
2179 index = 2;
2180 else
2181 {
2182 used_prefixes |= (prefixes & PREFIX_REPNZ);
2183 if (prefixes & PREFIX_REPNZ)
2184 index = 3;
2185 }
2186 }
2187 dp = &prefix_user_table[dp->bytemode2][index];
2188 break;
2189
2190 case X86_64_SPECIAL:
2191 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2192 break;
2193
2194 default:
2195 oappend (INTERNAL_DISASSEMBLER_ERROR);
2196 break;
2197 }
2198 }
2199
2200 if (putop (dp->name, sizeflag) == 0)
2201 {
2202 obufp = op1out;
2203 op_ad = 2;
2204 if (dp->op1)
2205 (*dp->op1) (dp->bytemode1, sizeflag);
2206
2207 obufp = op2out;
2208 op_ad = 1;
2209 if (dp->op2)
2210 (*dp->op2) (dp->bytemode2, sizeflag);
2211
2212 obufp = op3out;
2213 op_ad = 0;
2214 if (dp->op3)
2215 (*dp->op3) (dp->bytemode3, sizeflag);
2216 }
2217 }
2218
2219 /* See if any prefixes were not used. If so, print the first one
2220 separately. If we don't do this, we'll wind up printing an
2221 instruction stream which does not precisely correspond to the
2222 bytes we are disassembling. */
2223 if ((prefixes & ~used_prefixes) != 0)
2224 {
2225 const char *name;
2226
2227 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2228 if (name == NULL)
2229 name = INTERNAL_DISASSEMBLER_ERROR;
2230 (*info->fprintf_func) (info->stream, "%s", name);
2231 return 1;
2232 }
2233 if (rex & ~rex_used)
2234 {
2235 const char *name;
2236 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2237 if (name == NULL)
2238 name = INTERNAL_DISASSEMBLER_ERROR;
2239 (*info->fprintf_func) (info->stream, "%s ", name);
2240 }
2241
2242 obufp = obuf + strlen (obuf);
2243 for (i = strlen (obuf); i < 6; i++)
2244 oappend (" ");
2245 oappend (" ");
2246 (*info->fprintf_func) (info->stream, "%s", obuf);
2247
2248 /* The enter and bound instructions are printed with operands in the same
2249 order as the intel book; everything else is printed in reverse order. */
2250 if (intel_syntax || two_source_ops)
2251 {
2252 first = op1out;
2253 second = op2out;
2254 third = op3out;
2255 op_ad = op_index[0];
2256 op_index[0] = op_index[2];
2257 op_index[2] = op_ad;
2258 }
2259 else
2260 {
2261 first = op3out;
2262 second = op2out;
2263 third = op1out;
2264 }
2265 needcomma = 0;
2266 if (*first)
2267 {
2268 if (op_index[0] != -1 && !op_riprel[0])
2269 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2270 else
2271 (*info->fprintf_func) (info->stream, "%s", first);
2272 needcomma = 1;
2273 }
2274 if (*second)
2275 {
2276 if (needcomma)
2277 (*info->fprintf_func) (info->stream, ",");
2278 if (op_index[1] != -1 && !op_riprel[1])
2279 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2280 else
2281 (*info->fprintf_func) (info->stream, "%s", second);
2282 needcomma = 1;
2283 }
2284 if (*third)
2285 {
2286 if (needcomma)
2287 (*info->fprintf_func) (info->stream, ",");
2288 if (op_index[2] != -1 && !op_riprel[2])
2289 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2290 else
2291 (*info->fprintf_func) (info->stream, "%s", third);
2292 }
2293 for (i = 0; i < 3; i++)
2294 if (op_index[i] != -1 && op_riprel[i])
2295 {
2296 (*info->fprintf_func) (info->stream, " # ");
2297 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2298 + op_address[op_index[i]]), info);
2299 }
2300 return codep - priv.the_buffer;
2301 }
2302
2303 static const char *float_mem[] = {
2304 /* d8 */
2305 "fadd{s||s|}",
2306 "fmul{s||s|}",
2307 "fcom{s||s|}",
2308 "fcomp{s||s|}",
2309 "fsub{s||s|}",
2310 "fsubr{s||s|}",
2311 "fdiv{s||s|}",
2312 "fdivr{s||s|}",
2313 /* d9 */
2314 "fld{s||s|}",
2315 "(bad)",
2316 "fst{s||s|}",
2317 "fstp{s||s|}",
2318 "fldenv",
2319 "fldcw",
2320 "fNstenv",
2321 "fNstcw",
2322 /* da */
2323 "fiadd{l||l|}",
2324 "fimul{l||l|}",
2325 "ficom{l||l|}",
2326 "ficomp{l||l|}",
2327 "fisub{l||l|}",
2328 "fisubr{l||l|}",
2329 "fidiv{l||l|}",
2330 "fidivr{l||l|}",
2331 /* db */
2332 "fild{l||l|}",
2333 "fisttp{l||l|}",
2334 "fist{l||l|}",
2335 "fistp{l||l|}",
2336 "(bad)",
2337 "fld{t||t|}",
2338 "(bad)",
2339 "fstp{t||t|}",
2340 /* dc */
2341 "fadd{l||l|}",
2342 "fmul{l||l|}",
2343 "fcom{l||l|}",
2344 "fcomp{l||l|}",
2345 "fsub{l||l|}",
2346 "fsubr{l||l|}",
2347 "fdiv{l||l|}",
2348 "fdivr{l||l|}",
2349 /* dd */
2350 "fld{l||l|}",
2351 "fisttpll",
2352 "fst{l||l|}",
2353 "fstp{l||l|}",
2354 "frstor",
2355 "(bad)",
2356 "fNsave",
2357 "fNstsw",
2358 /* de */
2359 "fiadd",
2360 "fimul",
2361 "ficom",
2362 "ficomp",
2363 "fisub",
2364 "fisubr",
2365 "fidiv",
2366 "fidivr",
2367 /* df */
2368 "fild",
2369 "fisttp",
2370 "fist",
2371 "fistp",
2372 "fbld",
2373 "fild{ll||ll|}",
2374 "fbstp",
2375 "fistpll",
2376 };
2377
2378 #define ST OP_ST, 0
2379 #define STi OP_STi, 0
2380
2381 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2382 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2383 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2384 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2385 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2386 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2387 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2388 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2389 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2390
2391 static const struct dis386 float_reg[][8] = {
2392 /* d8 */
2393 {
2394 { "fadd", ST, STi, XX },
2395 { "fmul", ST, STi, XX },
2396 { "fcom", STi, XX, XX },
2397 { "fcomp", STi, XX, XX },
2398 { "fsub", ST, STi, XX },
2399 { "fsubr", ST, STi, XX },
2400 { "fdiv", ST, STi, XX },
2401 { "fdivr", ST, STi, XX },
2402 },
2403 /* d9 */
2404 {
2405 { "fld", STi, XX, XX },
2406 { "fxch", STi, XX, XX },
2407 { FGRPd9_2 },
2408 { "(bad)", XX, XX, XX },
2409 { FGRPd9_4 },
2410 { FGRPd9_5 },
2411 { FGRPd9_6 },
2412 { FGRPd9_7 },
2413 },
2414 /* da */
2415 {
2416 { "fcmovb", ST, STi, XX },
2417 { "fcmove", ST, STi, XX },
2418 { "fcmovbe",ST, STi, XX },
2419 { "fcmovu", ST, STi, XX },
2420 { "(bad)", XX, XX, XX },
2421 { FGRPda_5 },
2422 { "(bad)", XX, XX, XX },
2423 { "(bad)", XX, XX, XX },
2424 },
2425 /* db */
2426 {
2427 { "fcmovnb",ST, STi, XX },
2428 { "fcmovne",ST, STi, XX },
2429 { "fcmovnbe",ST, STi, XX },
2430 { "fcmovnu",ST, STi, XX },
2431 { FGRPdb_4 },
2432 { "fucomi", ST, STi, XX },
2433 { "fcomi", ST, STi, XX },
2434 { "(bad)", XX, XX, XX },
2435 },
2436 /* dc */
2437 {
2438 { "fadd", STi, ST, XX },
2439 { "fmul", STi, ST, XX },
2440 { "(bad)", XX, XX, XX },
2441 { "(bad)", XX, XX, XX },
2442 #if UNIXWARE_COMPAT
2443 { "fsub", STi, ST, XX },
2444 { "fsubr", STi, ST, XX },
2445 { "fdiv", STi, ST, XX },
2446 { "fdivr", STi, ST, XX },
2447 #else
2448 { "fsubr", STi, ST, XX },
2449 { "fsub", STi, ST, XX },
2450 { "fdivr", STi, ST, XX },
2451 { "fdiv", STi, ST, XX },
2452 #endif
2453 },
2454 /* dd */
2455 {
2456 { "ffree", STi, XX, XX },
2457 { "(bad)", XX, XX, XX },
2458 { "fst", STi, XX, XX },
2459 { "fstp", STi, XX, XX },
2460 { "fucom", STi, XX, XX },
2461 { "fucomp", STi, XX, XX },
2462 { "(bad)", XX, XX, XX },
2463 { "(bad)", XX, XX, XX },
2464 },
2465 /* de */
2466 {
2467 { "faddp", STi, ST, XX },
2468 { "fmulp", STi, ST, XX },
2469 { "(bad)", XX, XX, XX },
2470 { FGRPde_3 },
2471 #if UNIXWARE_COMPAT
2472 { "fsubp", STi, ST, XX },
2473 { "fsubrp", STi, ST, XX },
2474 { "fdivp", STi, ST, XX },
2475 { "fdivrp", STi, ST, XX },
2476 #else
2477 { "fsubrp", STi, ST, XX },
2478 { "fsubp", STi, ST, XX },
2479 { "fdivrp", STi, ST, XX },
2480 { "fdivp", STi, ST, XX },
2481 #endif
2482 },
2483 /* df */
2484 {
2485 { "ffreep", STi, XX, XX },
2486 { "(bad)", XX, XX, XX },
2487 { "(bad)", XX, XX, XX },
2488 { "(bad)", XX, XX, XX },
2489 { FGRPdf_4 },
2490 { "fucomip",ST, STi, XX },
2491 { "fcomip", ST, STi, XX },
2492 { "(bad)", XX, XX, XX },
2493 },
2494 };
2495
2496 static char *fgrps[][8] = {
2497 /* d9_2 0 */
2498 {
2499 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2500 },
2501
2502 /* d9_4 1 */
2503 {
2504 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2505 },
2506
2507 /* d9_5 2 */
2508 {
2509 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2510 },
2511
2512 /* d9_6 3 */
2513 {
2514 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2515 },
2516
2517 /* d9_7 4 */
2518 {
2519 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2520 },
2521
2522 /* da_5 5 */
2523 {
2524 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2525 },
2526
2527 /* db_4 6 */
2528 {
2529 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2530 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2531 },
2532
2533 /* de_3 7 */
2534 {
2535 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2536 },
2537
2538 /* df_4 8 */
2539 {
2540 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2541 },
2542 };
2543
2544 static void
2545 dofloat (int sizeflag)
2546 {
2547 const struct dis386 *dp;
2548 unsigned char floatop;
2549
2550 floatop = codep[-1];
2551
2552 if (mod != 3)
2553 {
2554 putop (float_mem[(floatop - 0xd8) * 8 + reg], sizeflag);
2555 obufp = op1out;
2556 if (floatop == 0xdb)
2557 OP_E (x_mode, sizeflag);
2558 else if (floatop == 0xdd)
2559 OP_E (d_mode, sizeflag);
2560 else
2561 OP_E (v_mode, sizeflag);
2562 return;
2563 }
2564 /* Skip mod/rm byte. */
2565 MODRM_CHECK;
2566 codep++;
2567
2568 dp = &float_reg[floatop - 0xd8][reg];
2569 if (dp->name == NULL)
2570 {
2571 putop (fgrps[dp->bytemode1][rm], sizeflag);
2572
2573 /* Instruction fnstsw is only one with strange arg. */
2574 if (floatop == 0xdf && codep[-1] == 0xe0)
2575 strcpy (op1out, names16[0]);
2576 }
2577 else
2578 {
2579 putop (dp->name, sizeflag);
2580
2581 obufp = op1out;
2582 if (dp->op1)
2583 (*dp->op1) (dp->bytemode1, sizeflag);
2584 obufp = op2out;
2585 if (dp->op2)
2586 (*dp->op2) (dp->bytemode2, sizeflag);
2587 }
2588 }
2589
2590 static void
2591 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2592 {
2593 oappend ("%st");
2594 }
2595
2596 static void
2597 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2598 {
2599 sprintf (scratchbuf, "%%st(%d)", rm);
2600 oappend (scratchbuf + intel_syntax);
2601 }
2602
2603 /* Capital letters in template are macros. */
2604 static int
2605 putop (const char *template, int sizeflag)
2606 {
2607 const char *p;
2608 int alt;
2609
2610 for (p = template; *p; p++)
2611 {
2612 switch (*p)
2613 {
2614 default:
2615 *obufp++ = *p;
2616 break;
2617 case '{':
2618 alt = 0;
2619 if (intel_syntax)
2620 alt += 1;
2621 if (mode_64bit)
2622 alt += 2;
2623 while (alt != 0)
2624 {
2625 while (*++p != '|')
2626 {
2627 if (*p == '}')
2628 {
2629 /* Alternative not valid. */
2630 strcpy (obuf, "(bad)");
2631 obufp = obuf + 5;
2632 return 1;
2633 }
2634 else if (*p == '\0')
2635 abort ();
2636 }
2637 alt--;
2638 }
2639 break;
2640 case '|':
2641 while (*++p != '}')
2642 {
2643 if (*p == '\0')
2644 abort ();
2645 }
2646 break;
2647 case '}':
2648 break;
2649 case 'A':
2650 if (intel_syntax)
2651 break;
2652 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2653 *obufp++ = 'b';
2654 break;
2655 case 'B':
2656 if (intel_syntax)
2657 break;
2658 if (sizeflag & SUFFIX_ALWAYS)
2659 *obufp++ = 'b';
2660 break;
2661 case 'E': /* For jcxz/jecxz */
2662 if (mode_64bit)
2663 {
2664 if (sizeflag & AFLAG)
2665 *obufp++ = 'r';
2666 else
2667 *obufp++ = 'e';
2668 }
2669 else
2670 if (sizeflag & AFLAG)
2671 *obufp++ = 'e';
2672 used_prefixes |= (prefixes & PREFIX_ADDR);
2673 break;
2674 case 'F':
2675 if (intel_syntax)
2676 break;
2677 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
2678 {
2679 if (sizeflag & AFLAG)
2680 *obufp++ = mode_64bit ? 'q' : 'l';
2681 else
2682 *obufp++ = mode_64bit ? 'l' : 'w';
2683 used_prefixes |= (prefixes & PREFIX_ADDR);
2684 }
2685 break;
2686 case 'H':
2687 if (intel_syntax)
2688 break;
2689 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2690 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2691 {
2692 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2693 *obufp++ = ',';
2694 *obufp++ = 'p';
2695 if (prefixes & PREFIX_DS)
2696 *obufp++ = 't';
2697 else
2698 *obufp++ = 'n';
2699 }
2700 break;
2701 case 'L':
2702 if (intel_syntax)
2703 break;
2704 if (sizeflag & SUFFIX_ALWAYS)
2705 *obufp++ = 'l';
2706 break;
2707 case 'N':
2708 if ((prefixes & PREFIX_FWAIT) == 0)
2709 *obufp++ = 'n';
2710 else
2711 used_prefixes |= PREFIX_FWAIT;
2712 break;
2713 case 'O':
2714 USED_REX (REX_MODE64);
2715 if (rex & REX_MODE64)
2716 *obufp++ = 'o';
2717 else
2718 *obufp++ = 'd';
2719 break;
2720 case 'T':
2721 if (intel_syntax)
2722 break;
2723 if (mode_64bit)
2724 {
2725 *obufp++ = 'q';
2726 break;
2727 }
2728 /* Fall through. */
2729 case 'P':
2730 if (intel_syntax)
2731 break;
2732 if ((prefixes & PREFIX_DATA)
2733 || (rex & REX_MODE64)
2734 || (sizeflag & SUFFIX_ALWAYS))
2735 {
2736 USED_REX (REX_MODE64);
2737 if (rex & REX_MODE64)
2738 *obufp++ = 'q';
2739 else
2740 {
2741 if (sizeflag & DFLAG)
2742 *obufp++ = 'l';
2743 else
2744 *obufp++ = 'w';
2745 used_prefixes |= (prefixes & PREFIX_DATA);
2746 }
2747 }
2748 break;
2749 case 'U':
2750 if (intel_syntax)
2751 break;
2752 if (mode_64bit)
2753 {
2754 *obufp++ = 'q';
2755 break;
2756 }
2757 /* Fall through. */
2758 case 'Q':
2759 if (intel_syntax)
2760 break;
2761 USED_REX (REX_MODE64);
2762 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2763 {
2764 if (rex & REX_MODE64)
2765 *obufp++ = 'q';
2766 else
2767 {
2768 if (sizeflag & DFLAG)
2769 *obufp++ = 'l';
2770 else
2771 *obufp++ = 'w';
2772 used_prefixes |= (prefixes & PREFIX_DATA);
2773 }
2774 }
2775 break;
2776 case 'R':
2777 USED_REX (REX_MODE64);
2778 if (intel_syntax)
2779 {
2780 if (rex & REX_MODE64)
2781 {
2782 *obufp++ = 'q';
2783 *obufp++ = 't';
2784 }
2785 else if (sizeflag & DFLAG)
2786 {
2787 *obufp++ = 'd';
2788 *obufp++ = 'q';
2789 }
2790 else
2791 {
2792 *obufp++ = 'w';
2793 *obufp++ = 'd';
2794 }
2795 }
2796 else
2797 {
2798 if (rex & REX_MODE64)
2799 *obufp++ = 'q';
2800 else if (sizeflag & DFLAG)
2801 *obufp++ = 'l';
2802 else
2803 *obufp++ = 'w';
2804 }
2805 if (!(rex & REX_MODE64))
2806 used_prefixes |= (prefixes & PREFIX_DATA);
2807 break;
2808 case 'S':
2809 if (intel_syntax)
2810 break;
2811 if (sizeflag & SUFFIX_ALWAYS)
2812 {
2813 if (rex & REX_MODE64)
2814 *obufp++ = 'q';
2815 else
2816 {
2817 if (sizeflag & DFLAG)
2818 *obufp++ = 'l';
2819 else
2820 *obufp++ = 'w';
2821 used_prefixes |= (prefixes & PREFIX_DATA);
2822 }
2823 }
2824 break;
2825 case 'X':
2826 if (prefixes & PREFIX_DATA)
2827 *obufp++ = 'd';
2828 else
2829 *obufp++ = 's';
2830 used_prefixes |= (prefixes & PREFIX_DATA);
2831 break;
2832 case 'Y':
2833 if (intel_syntax)
2834 break;
2835 if (rex & REX_MODE64)
2836 {
2837 USED_REX (REX_MODE64);
2838 *obufp++ = 'q';
2839 }
2840 break;
2841 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
2842 case 'W':
2843 /* operand size flag for cwtl, cbtw */
2844 USED_REX (0);
2845 if (rex)
2846 *obufp++ = 'l';
2847 else if (sizeflag & DFLAG)
2848 *obufp++ = 'w';
2849 else
2850 *obufp++ = 'b';
2851 if (intel_syntax)
2852 {
2853 if (rex)
2854 {
2855 *obufp++ = 'q';
2856 *obufp++ = 'e';
2857 }
2858 if (sizeflag & DFLAG)
2859 {
2860 *obufp++ = 'd';
2861 *obufp++ = 'e';
2862 }
2863 else
2864 {
2865 *obufp++ = 'w';
2866 }
2867 }
2868 if (!rex)
2869 used_prefixes |= (prefixes & PREFIX_DATA);
2870 break;
2871 }
2872 }
2873 *obufp = 0;
2874 return 0;
2875 }
2876
2877 static void
2878 oappend (const char *s)
2879 {
2880 strcpy (obufp, s);
2881 obufp += strlen (s);
2882 }
2883
2884 static void
2885 append_seg (void)
2886 {
2887 if (prefixes & PREFIX_CS)
2888 {
2889 used_prefixes |= PREFIX_CS;
2890 oappend ("%cs:" + intel_syntax);
2891 }
2892 if (prefixes & PREFIX_DS)
2893 {
2894 used_prefixes |= PREFIX_DS;
2895 oappend ("%ds:" + intel_syntax);
2896 }
2897 if (prefixes & PREFIX_SS)
2898 {
2899 used_prefixes |= PREFIX_SS;
2900 oappend ("%ss:" + intel_syntax);
2901 }
2902 if (prefixes & PREFIX_ES)
2903 {
2904 used_prefixes |= PREFIX_ES;
2905 oappend ("%es:" + intel_syntax);
2906 }
2907 if (prefixes & PREFIX_FS)
2908 {
2909 used_prefixes |= PREFIX_FS;
2910 oappend ("%fs:" + intel_syntax);
2911 }
2912 if (prefixes & PREFIX_GS)
2913 {
2914 used_prefixes |= PREFIX_GS;
2915 oappend ("%gs:" + intel_syntax);
2916 }
2917 }
2918
2919 static void
2920 OP_indirE (int bytemode, int sizeflag)
2921 {
2922 if (!intel_syntax)
2923 oappend ("*");
2924 OP_E (bytemode, sizeflag);
2925 }
2926
2927 static void
2928 print_operand_value (char *buf, int hex, bfd_vma disp)
2929 {
2930 if (mode_64bit)
2931 {
2932 if (hex)
2933 {
2934 char tmp[30];
2935 int i;
2936 buf[0] = '0';
2937 buf[1] = 'x';
2938 sprintf_vma (tmp, disp);
2939 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
2940 strcpy (buf + 2, tmp + i);
2941 }
2942 else
2943 {
2944 bfd_signed_vma v = disp;
2945 char tmp[30];
2946 int i;
2947 if (v < 0)
2948 {
2949 *(buf++) = '-';
2950 v = -disp;
2951 /* Check for possible overflow on 0x8000000000000000. */
2952 if (v < 0)
2953 {
2954 strcpy (buf, "9223372036854775808");
2955 return;
2956 }
2957 }
2958 if (!v)
2959 {
2960 strcpy (buf, "0");
2961 return;
2962 }
2963
2964 i = 0;
2965 tmp[29] = 0;
2966 while (v)
2967 {
2968 tmp[28 - i] = (v % 10) + '0';
2969 v /= 10;
2970 i++;
2971 }
2972 strcpy (buf, tmp + 29 - i);
2973 }
2974 }
2975 else
2976 {
2977 if (hex)
2978 sprintf (buf, "0x%x", (unsigned int) disp);
2979 else
2980 sprintf (buf, "%d", (int) disp);
2981 }
2982 }
2983
2984 static void
2985 OP_E (int bytemode, int sizeflag)
2986 {
2987 bfd_vma disp;
2988 int add = 0;
2989 int riprel = 0;
2990 USED_REX (REX_EXTZ);
2991 if (rex & REX_EXTZ)
2992 add += 8;
2993
2994 /* Skip mod/rm byte. */
2995 MODRM_CHECK;
2996 codep++;
2997
2998 if (mod == 3)
2999 {
3000 switch (bytemode)
3001 {
3002 case b_mode:
3003 USED_REX (0);
3004 if (rex)
3005 oappend (names8rex[rm + add]);
3006 else
3007 oappend (names8[rm + add]);
3008 break;
3009 case w_mode:
3010 oappend (names16[rm + add]);
3011 break;
3012 case d_mode:
3013 oappend (names32[rm + add]);
3014 break;
3015 case q_mode:
3016 oappend (names64[rm + add]);
3017 break;
3018 case m_mode:
3019 if (mode_64bit)
3020 oappend (names64[rm + add]);
3021 else
3022 oappend (names32[rm + add]);
3023 break;
3024 case v_mode:
3025 case dq_mode:
3026 USED_REX (REX_MODE64);
3027 if (rex & REX_MODE64)
3028 oappend (names64[rm + add]);
3029 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
3030 oappend (names32[rm + add]);
3031 else
3032 oappend (names16[rm + add]);
3033 used_prefixes |= (prefixes & PREFIX_DATA);
3034 break;
3035 case 0:
3036 if (codep[-2] == 0xAE && codep[-1] == 0xF8)
3037 /* sfence */
3038 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
3039 else if (codep[-2] == 0xAE && codep[-1] == 0xF0)
3040 /* mfence */
3041 ;
3042 else if (codep[-2] == 0xAE && codep[-1] == 0xe8)
3043 /* lfence */
3044 ;
3045 else
3046 BadOp (); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */
3047 break;
3048 default:
3049 oappend (INTERNAL_DISASSEMBLER_ERROR);
3050 break;
3051 }
3052 return;
3053 }
3054
3055 disp = 0;
3056 append_seg ();
3057
3058 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */
3059 {
3060 int havesib;
3061 int havebase;
3062 int base;
3063 int index = 0;
3064 int scale = 0;
3065
3066 havesib = 0;
3067 havebase = 1;
3068 base = rm;
3069
3070 if (base == 4)
3071 {
3072 havesib = 1;
3073 FETCH_DATA (the_info, codep + 1);
3074 scale = (*codep >> 6) & 3;
3075 index = (*codep >> 3) & 7;
3076 base = *codep & 7;
3077 USED_REX (REX_EXTY);
3078 USED_REX (REX_EXTZ);
3079 if (rex & REX_EXTY)
3080 index += 8;
3081 if (rex & REX_EXTZ)
3082 base += 8;
3083 codep++;
3084 }
3085
3086 switch (mod)
3087 {
3088 case 0:
3089 if ((base & 7) == 5)
3090 {
3091 havebase = 0;
3092 if (mode_64bit && !havesib && (sizeflag & AFLAG))
3093 riprel = 1;
3094 disp = get32s ();
3095 }
3096 break;
3097 case 1:
3098 FETCH_DATA (the_info, codep + 1);
3099 disp = *codep++;
3100 if ((disp & 0x80) != 0)
3101 disp -= 0x100;
3102 break;
3103 case 2:
3104 disp = get32s ();
3105 break;
3106 }
3107
3108 if (!intel_syntax)
3109 if (mod != 0 || (base & 7) == 5)
3110 {
3111 print_operand_value (scratchbuf, !riprel, disp);
3112 oappend (scratchbuf);
3113 if (riprel)
3114 {
3115 set_op (disp, 1);
3116 oappend ("(%rip)");
3117 }
3118 }
3119
3120 if (havebase || (havesib && (index != 4 || scale != 0)))
3121 {
3122 if (intel_syntax)
3123 {
3124 switch (bytemode)
3125 {
3126 case b_mode:
3127 oappend ("BYTE PTR ");
3128 break;
3129 case w_mode:
3130 oappend ("WORD PTR ");
3131 break;
3132 case v_mode:
3133 oappend ("DWORD PTR ");
3134 break;
3135 case d_mode:
3136 oappend ("QWORD PTR ");
3137 break;
3138 case m_mode:
3139 if (mode_64bit)
3140 oappend ("DWORD PTR ");
3141 else
3142 oappend ("QWORD PTR ");
3143 break;
3144 case x_mode:
3145 oappend ("XWORD PTR ");
3146 break;
3147 default:
3148 break;
3149 }
3150 }
3151 *obufp++ = open_char;
3152 if (intel_syntax && riprel)
3153 oappend ("rip + ");
3154 *obufp = '\0';
3155 USED_REX (REX_EXTZ);
3156 if (!havesib && (rex & REX_EXTZ))
3157 base += 8;
3158 if (havebase)
3159 oappend (mode_64bit && (sizeflag & AFLAG)
3160 ? names64[base] : names32[base]);
3161 if (havesib)
3162 {
3163 if (index != 4)
3164 {
3165 if (intel_syntax)
3166 {
3167 if (havebase)
3168 {
3169 *obufp++ = separator_char;
3170 *obufp = '\0';
3171 }
3172 sprintf (scratchbuf, "%s",
3173 mode_64bit && (sizeflag & AFLAG)
3174 ? names64[index] : names32[index]);
3175 }
3176 else
3177 sprintf (scratchbuf, ",%s",
3178 mode_64bit && (sizeflag & AFLAG)
3179 ? names64[index] : names32[index]);
3180 oappend (scratchbuf);
3181 }
3182 if (scale != 0 || (!intel_syntax && index != 4))
3183 {
3184 *obufp++ = scale_char;
3185 *obufp = '\0';
3186 sprintf (scratchbuf, "%d", 1 << scale);
3187 oappend (scratchbuf);
3188 }
3189 }
3190 if (intel_syntax)
3191 if (mod != 0 || (base & 7) == 5)
3192 {
3193 /* Don't print zero displacements. */
3194 if (disp != 0)
3195 {
3196 if ((bfd_signed_vma) disp > 0)
3197 {
3198 *obufp++ = '+';
3199 *obufp = '\0';
3200 }
3201
3202 print_operand_value (scratchbuf, 0, disp);
3203 oappend (scratchbuf);
3204 }
3205 }
3206
3207 *obufp++ = close_char;
3208 *obufp = '\0';
3209 }
3210 else if (intel_syntax)
3211 {
3212 if (mod != 0 || (base & 7) == 5)
3213 {
3214 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3215 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3216 ;
3217 else
3218 {
3219 oappend (names_seg[ds_reg - es_reg]);
3220 oappend (":");
3221 }
3222 print_operand_value (scratchbuf, 1, disp);
3223 oappend (scratchbuf);
3224 }
3225 }
3226 }
3227 else
3228 { /* 16 bit address mode */
3229 switch (mod)
3230 {
3231 case 0:
3232 if ((rm & 7) == 6)
3233 {
3234 disp = get16 ();
3235 if ((disp & 0x8000) != 0)
3236 disp -= 0x10000;
3237 }
3238 break;
3239 case 1:
3240 FETCH_DATA (the_info, codep + 1);
3241 disp = *codep++;
3242 if ((disp & 0x80) != 0)
3243 disp -= 0x100;
3244 break;
3245 case 2:
3246 disp = get16 ();
3247 if ((disp & 0x8000) != 0)
3248 disp -= 0x10000;
3249 break;
3250 }
3251
3252 if (!intel_syntax)
3253 if (mod != 0 || (rm & 7) == 6)
3254 {
3255 print_operand_value (scratchbuf, 0, disp);
3256 oappend (scratchbuf);
3257 }
3258
3259 if (mod != 0 || (rm & 7) != 6)
3260 {
3261 *obufp++ = open_char;
3262 *obufp = '\0';
3263 oappend (index16[rm + add]);
3264 *obufp++ = close_char;
3265 *obufp = '\0';
3266 }
3267 }
3268 }
3269
3270 static void
3271 OP_G (int bytemode, int sizeflag)
3272 {
3273 int add = 0;
3274 USED_REX (REX_EXTX);
3275 if (rex & REX_EXTX)
3276 add += 8;
3277 switch (bytemode)
3278 {
3279 case b_mode:
3280 USED_REX (0);
3281 if (rex)
3282 oappend (names8rex[reg + add]);
3283 else
3284 oappend (names8[reg + add]);
3285 break;
3286 case w_mode:
3287 oappend (names16[reg + add]);
3288 break;
3289 case d_mode:
3290 oappend (names32[reg + add]);
3291 break;
3292 case q_mode:
3293 oappend (names64[reg + add]);
3294 break;
3295 case v_mode:
3296 USED_REX (REX_MODE64);
3297 if (rex & REX_MODE64)
3298 oappend (names64[reg + add]);
3299 else if (sizeflag & DFLAG)
3300 oappend (names32[reg + add]);
3301 else
3302 oappend (names16[reg + add]);
3303 used_prefixes |= (prefixes & PREFIX_DATA);
3304 break;
3305 default:
3306 oappend (INTERNAL_DISASSEMBLER_ERROR);
3307 break;
3308 }
3309 }
3310
3311 static bfd_vma
3312 get64 (void)
3313 {
3314 bfd_vma x;
3315 #ifdef BFD64
3316 unsigned int a;
3317 unsigned int b;
3318
3319 FETCH_DATA (the_info, codep + 8);
3320 a = *codep++ & 0xff;
3321 a |= (*codep++ & 0xff) << 8;
3322 a |= (*codep++ & 0xff) << 16;
3323 a |= (*codep++ & 0xff) << 24;
3324 b = *codep++ & 0xff;
3325 b |= (*codep++ & 0xff) << 8;
3326 b |= (*codep++ & 0xff) << 16;
3327 b |= (*codep++ & 0xff) << 24;
3328 x = a + ((bfd_vma) b << 32);
3329 #else
3330 abort ();
3331 x = 0;
3332 #endif
3333 return x;
3334 }
3335
3336 static bfd_signed_vma
3337 get32 (void)
3338 {
3339 bfd_signed_vma x = 0;
3340
3341 FETCH_DATA (the_info, codep + 4);
3342 x = *codep++ & (bfd_signed_vma) 0xff;
3343 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3344 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3345 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3346 return x;
3347 }
3348
3349 static bfd_signed_vma
3350 get32s (void)
3351 {
3352 bfd_signed_vma x = 0;
3353
3354 FETCH_DATA (the_info, codep + 4);
3355 x = *codep++ & (bfd_signed_vma) 0xff;
3356 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3357 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3358 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3359
3360 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3361
3362 return x;
3363 }
3364
3365 static int
3366 get16 (void)
3367 {
3368 int x = 0;
3369
3370 FETCH_DATA (the_info, codep + 2);
3371 x = *codep++ & 0xff;
3372 x |= (*codep++ & 0xff) << 8;
3373 return x;
3374 }
3375
3376 static void
3377 set_op (bfd_vma op, int riprel)
3378 {
3379 op_index[op_ad] = op_ad;
3380 if (mode_64bit)
3381 {
3382 op_address[op_ad] = op;
3383 op_riprel[op_ad] = riprel;
3384 }
3385 else
3386 {
3387 /* Mask to get a 32-bit address. */
3388 op_address[op_ad] = op & 0xffffffff;
3389 op_riprel[op_ad] = riprel & 0xffffffff;
3390 }
3391 }
3392
3393 static void
3394 OP_REG (int code, int sizeflag)
3395 {
3396 const char *s;
3397 int add = 0;
3398 USED_REX (REX_EXTZ);
3399 if (rex & REX_EXTZ)
3400 add = 8;
3401
3402 switch (code)
3403 {
3404 case indir_dx_reg:
3405 if (intel_syntax)
3406 s = "[dx]";
3407 else
3408 s = "(%dx)";
3409 break;
3410 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3411 case sp_reg: case bp_reg: case si_reg: case di_reg:
3412 s = names16[code - ax_reg + add];
3413 break;
3414 case es_reg: case ss_reg: case cs_reg:
3415 case ds_reg: case fs_reg: case gs_reg:
3416 s = names_seg[code - es_reg + add];
3417 break;
3418 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3419 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3420 USED_REX (0);
3421 if (rex)
3422 s = names8rex[code - al_reg + add];
3423 else
3424 s = names8[code - al_reg];
3425 break;
3426 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3427 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3428 if (mode_64bit)
3429 {
3430 s = names64[code - rAX_reg + add];
3431 break;
3432 }
3433 code += eAX_reg - rAX_reg;
3434 /* Fall through. */
3435 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3436 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3437 USED_REX (REX_MODE64);
3438 if (rex & REX_MODE64)
3439 s = names64[code - eAX_reg + add];
3440 else if (sizeflag & DFLAG)
3441 s = names32[code - eAX_reg + add];
3442 else
3443 s = names16[code - eAX_reg + add];
3444 used_prefixes |= (prefixes & PREFIX_DATA);
3445 break;
3446 default:
3447 s = INTERNAL_DISASSEMBLER_ERROR;
3448 break;
3449 }
3450 oappend (s);
3451 }
3452
3453 static void
3454 OP_IMREG (int code, int sizeflag)
3455 {
3456 const char *s;
3457
3458 switch (code)
3459 {
3460 case indir_dx_reg:
3461 if (intel_syntax)
3462 s = "[dx]";
3463 else
3464 s = "(%dx)";
3465 break;
3466 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3467 case sp_reg: case bp_reg: case si_reg: case di_reg:
3468 s = names16[code - ax_reg];
3469 break;
3470 case es_reg: case ss_reg: case cs_reg:
3471 case ds_reg: case fs_reg: case gs_reg:
3472 s = names_seg[code - es_reg];
3473 break;
3474 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3475 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3476 USED_REX (0);
3477 if (rex)
3478 s = names8rex[code - al_reg];
3479 else
3480 s = names8[code - al_reg];
3481 break;
3482 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3483 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3484 USED_REX (REX_MODE64);
3485 if (rex & REX_MODE64)
3486 s = names64[code - eAX_reg];
3487 else if (sizeflag & DFLAG)
3488 s = names32[code - eAX_reg];
3489 else
3490 s = names16[code - eAX_reg];
3491 used_prefixes |= (prefixes & PREFIX_DATA);
3492 break;
3493 default:
3494 s = INTERNAL_DISASSEMBLER_ERROR;
3495 break;
3496 }
3497 oappend (s);
3498 }
3499
3500 static void
3501 OP_I (int bytemode, int sizeflag)
3502 {
3503 bfd_signed_vma op;
3504 bfd_signed_vma mask = -1;
3505
3506 switch (bytemode)
3507 {
3508 case b_mode:
3509 FETCH_DATA (the_info, codep + 1);
3510 op = *codep++;
3511 mask = 0xff;
3512 break;
3513 case q_mode:
3514 if (mode_64bit)
3515 {
3516 op = get32s ();
3517 break;
3518 }
3519 /* Fall through. */
3520 case v_mode:
3521 USED_REX (REX_MODE64);
3522 if (rex & REX_MODE64)
3523 op = get32s ();
3524 else if (sizeflag & DFLAG)
3525 {
3526 op = get32 ();
3527 mask = 0xffffffff;
3528 }
3529 else
3530 {
3531 op = get16 ();
3532 mask = 0xfffff;
3533 }
3534 used_prefixes |= (prefixes & PREFIX_DATA);
3535 break;
3536 case w_mode:
3537 mask = 0xfffff;
3538 op = get16 ();
3539 break;
3540 default:
3541 oappend (INTERNAL_DISASSEMBLER_ERROR);
3542 return;
3543 }
3544
3545 op &= mask;
3546 scratchbuf[0] = '$';
3547 print_operand_value (scratchbuf + 1, 1, op);
3548 oappend (scratchbuf + intel_syntax);
3549 scratchbuf[0] = '\0';
3550 }
3551
3552 static void
3553 OP_I64 (int bytemode, int sizeflag)
3554 {
3555 bfd_signed_vma op;
3556 bfd_signed_vma mask = -1;
3557
3558 if (!mode_64bit)
3559 {
3560 OP_I (bytemode, sizeflag);
3561 return;
3562 }
3563
3564 switch (bytemode)
3565 {
3566 case b_mode:
3567 FETCH_DATA (the_info, codep + 1);
3568 op = *codep++;
3569 mask = 0xff;
3570 break;
3571 case v_mode:
3572 USED_REX (REX_MODE64);
3573 if (rex & REX_MODE64)
3574 op = get64 ();
3575 else if (sizeflag & DFLAG)
3576 {
3577 op = get32 ();
3578 mask = 0xffffffff;
3579 }
3580 else
3581 {
3582 op = get16 ();
3583 mask = 0xfffff;
3584 }
3585 used_prefixes |= (prefixes & PREFIX_DATA);
3586 break;
3587 case w_mode:
3588 mask = 0xfffff;
3589 op = get16 ();
3590 break;
3591 default:
3592 oappend (INTERNAL_DISASSEMBLER_ERROR);
3593 return;
3594 }
3595
3596 op &= mask;
3597 scratchbuf[0] = '$';
3598 print_operand_value (scratchbuf + 1, 1, op);
3599 oappend (scratchbuf + intel_syntax);
3600 scratchbuf[0] = '\0';
3601 }
3602
3603 static void
3604 OP_sI (int bytemode, int sizeflag)
3605 {
3606 bfd_signed_vma op;
3607 bfd_signed_vma mask = -1;
3608
3609 switch (bytemode)
3610 {
3611 case b_mode:
3612 FETCH_DATA (the_info, codep + 1);
3613 op = *codep++;
3614 if ((op & 0x80) != 0)
3615 op -= 0x100;
3616 mask = 0xffffffff;
3617 break;
3618 case v_mode:
3619 USED_REX (REX_MODE64);
3620 if (rex & REX_MODE64)
3621 op = get32s ();
3622 else if (sizeflag & DFLAG)
3623 {
3624 op = get32s ();
3625 mask = 0xffffffff;
3626 }
3627 else
3628 {
3629 mask = 0xffffffff;
3630 op = get16 ();
3631 if ((op & 0x8000) != 0)
3632 op -= 0x10000;
3633 }
3634 used_prefixes |= (prefixes & PREFIX_DATA);
3635 break;
3636 case w_mode:
3637 op = get16 ();
3638 mask = 0xffffffff;
3639 if ((op & 0x8000) != 0)
3640 op -= 0x10000;
3641 break;
3642 default:
3643 oappend (INTERNAL_DISASSEMBLER_ERROR);
3644 return;
3645 }
3646
3647 scratchbuf[0] = '$';
3648 print_operand_value (scratchbuf + 1, 1, op);
3649 oappend (scratchbuf + intel_syntax);
3650 }
3651
3652 static void
3653 OP_J (int bytemode, int sizeflag)
3654 {
3655 bfd_vma disp;
3656 bfd_vma mask = -1;
3657
3658 switch (bytemode)
3659 {
3660 case b_mode:
3661 FETCH_DATA (the_info, codep + 1);
3662 disp = *codep++;
3663 if ((disp & 0x80) != 0)
3664 disp -= 0x100;
3665 break;
3666 case v_mode:
3667 if (sizeflag & DFLAG)
3668 disp = get32s ();
3669 else
3670 {
3671 disp = get16 ();
3672 /* For some reason, a data16 prefix on a jump instruction
3673 means that the pc is masked to 16 bits after the
3674 displacement is added! */
3675 mask = 0xffff;
3676 }
3677 break;
3678 default:
3679 oappend (INTERNAL_DISASSEMBLER_ERROR);
3680 return;
3681 }
3682 disp = (start_pc + codep - start_codep + disp) & mask;
3683 set_op (disp, 0);
3684 print_operand_value (scratchbuf, 1, disp);
3685 oappend (scratchbuf);
3686 }
3687
3688 static void
3689 OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3690 {
3691 oappend (names_seg[reg]);
3692 }
3693
3694 static void
3695 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
3696 {
3697 int seg, offset;
3698
3699 if (sizeflag & DFLAG)
3700 {
3701 offset = get32 ();
3702 seg = get16 ();
3703 }
3704 else
3705 {
3706 offset = get16 ();
3707 seg = get16 ();
3708 }
3709 used_prefixes |= (prefixes & PREFIX_DATA);
3710 if (intel_syntax)
3711 sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
3712 else
3713 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
3714 oappend (scratchbuf);
3715 }
3716
3717 static void
3718 OP_OFF (int bytemode ATTRIBUTE_UNUSED, int sizeflag)
3719 {
3720 bfd_vma off;
3721
3722 append_seg ();
3723
3724 if ((sizeflag & AFLAG) || mode_64bit)
3725 off = get32 ();
3726 else
3727 off = get16 ();
3728
3729 if (intel_syntax)
3730 {
3731 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3732 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3733 {
3734 oappend (names_seg[ds_reg - es_reg]);
3735 oappend (":");
3736 }
3737 }
3738 print_operand_value (scratchbuf, 1, off);
3739 oappend (scratchbuf);
3740 }
3741
3742 static void
3743 OP_OFF64 (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3744 {
3745 bfd_vma off;
3746
3747 if (!mode_64bit)
3748 {
3749 OP_OFF (bytemode, sizeflag);
3750 return;
3751 }
3752
3753 append_seg ();
3754
3755 off = get64 ();
3756
3757 if (intel_syntax)
3758 {
3759 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3760 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3761 {
3762 oappend (names_seg[ds_reg - es_reg]);
3763 oappend (":");
3764 }
3765 }
3766 print_operand_value (scratchbuf, 1, off);
3767 oappend (scratchbuf);
3768 }
3769
3770 static void
3771 ptr_reg (int code, int sizeflag)
3772 {
3773 const char *s;
3774 if (intel_syntax)
3775 oappend ("[");
3776 else
3777 oappend ("(");
3778
3779 USED_REX (REX_MODE64);
3780 if (rex & REX_MODE64)
3781 {
3782 if (!(sizeflag & AFLAG))
3783 s = names32[code - eAX_reg];
3784 else
3785 s = names64[code - eAX_reg];
3786 }
3787 else if (sizeflag & AFLAG)
3788 s = names32[code - eAX_reg];
3789 else
3790 s = names16[code - eAX_reg];
3791 oappend (s);
3792 if (intel_syntax)
3793 oappend ("]");
3794 else
3795 oappend (")");
3796 }
3797
3798 static void
3799 OP_ESreg (int code, int sizeflag)
3800 {
3801 oappend ("%es:" + intel_syntax);
3802 ptr_reg (code, sizeflag);
3803 }
3804
3805 static void
3806 OP_DSreg (int code, int sizeflag)
3807 {
3808 if ((prefixes
3809 & (PREFIX_CS
3810 | PREFIX_DS
3811 | PREFIX_SS
3812 | PREFIX_ES
3813 | PREFIX_FS
3814 | PREFIX_GS)) == 0)
3815 prefixes |= PREFIX_DS;
3816 append_seg ();
3817 ptr_reg (code, sizeflag);
3818 }
3819
3820 static void
3821 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3822 {
3823 int add = 0;
3824 USED_REX (REX_EXTX);
3825 if (rex & REX_EXTX)
3826 add = 8;
3827 sprintf (scratchbuf, "%%cr%d", reg + add);
3828 oappend (scratchbuf + intel_syntax);
3829 }
3830
3831 static void
3832 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3833 {
3834 int add = 0;
3835 USED_REX (REX_EXTX);
3836 if (rex & REX_EXTX)
3837 add = 8;
3838 if (intel_syntax)
3839 sprintf (scratchbuf, "db%d", reg + add);
3840 else
3841 sprintf (scratchbuf, "%%db%d", reg + add);
3842 oappend (scratchbuf);
3843 }
3844
3845 static void
3846 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3847 {
3848 sprintf (scratchbuf, "%%tr%d", reg);
3849 oappend (scratchbuf + intel_syntax);
3850 }
3851
3852 static void
3853 OP_Rd (int bytemode, int sizeflag)
3854 {
3855 if (mod == 3)
3856 OP_E (bytemode, sizeflag);
3857 else
3858 BadOp ();
3859 }
3860
3861 static void
3862 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3863 {
3864 int add = 0;
3865 USED_REX (REX_EXTX);
3866 if (rex & REX_EXTX)
3867 add = 8;
3868 used_prefixes |= (prefixes & PREFIX_DATA);
3869 if (prefixes & PREFIX_DATA)
3870 sprintf (scratchbuf, "%%xmm%d", reg + add);
3871 else
3872 sprintf (scratchbuf, "%%mm%d", reg + add);
3873 oappend (scratchbuf + intel_syntax);
3874 }
3875
3876 static void
3877 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3878 {
3879 int add = 0;
3880 USED_REX (REX_EXTX);
3881 if (rex & REX_EXTX)
3882 add = 8;
3883 sprintf (scratchbuf, "%%xmm%d", reg + add);
3884 oappend (scratchbuf + intel_syntax);
3885 }
3886
3887 static void
3888 OP_EM (int bytemode, int sizeflag)
3889 {
3890 int add = 0;
3891 if (mod != 3)
3892 {
3893 OP_E (bytemode, sizeflag);
3894 return;
3895 }
3896 USED_REX (REX_EXTZ);
3897 if (rex & REX_EXTZ)
3898 add = 8;
3899
3900 /* Skip mod/rm byte. */
3901 MODRM_CHECK;
3902 codep++;
3903 used_prefixes |= (prefixes & PREFIX_DATA);
3904 if (prefixes & PREFIX_DATA)
3905 sprintf (scratchbuf, "%%xmm%d", rm + add);
3906 else
3907 sprintf (scratchbuf, "%%mm%d", rm + add);
3908 oappend (scratchbuf + intel_syntax);
3909 }
3910
3911 static void
3912 OP_EX (int bytemode, int sizeflag)
3913 {
3914 int add = 0;
3915 if (mod != 3)
3916 {
3917 OP_E (bytemode, sizeflag);
3918 return;
3919 }
3920 USED_REX (REX_EXTZ);
3921 if (rex & REX_EXTZ)
3922 add = 8;
3923
3924 /* Skip mod/rm byte. */
3925 MODRM_CHECK;
3926 codep++;
3927 sprintf (scratchbuf, "%%xmm%d", rm + add);
3928 oappend (scratchbuf + intel_syntax);
3929 }
3930
3931 static void
3932 OP_MS (int bytemode, int sizeflag)
3933 {
3934 if (mod == 3)
3935 OP_EM (bytemode, sizeflag);
3936 else
3937 BadOp ();
3938 }
3939
3940 static void
3941 OP_XS (int bytemode, int sizeflag)
3942 {
3943 if (mod == 3)
3944 OP_EX (bytemode, sizeflag);
3945 else
3946 BadOp ();
3947 }
3948
3949 static const char *const Suffix3DNow[] = {
3950 /* 00 */ NULL, NULL, NULL, NULL,
3951 /* 04 */ NULL, NULL, NULL, NULL,
3952 /* 08 */ NULL, NULL, NULL, NULL,
3953 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
3954 /* 10 */ NULL, NULL, NULL, NULL,
3955 /* 14 */ NULL, NULL, NULL, NULL,
3956 /* 18 */ NULL, NULL, NULL, NULL,
3957 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
3958 /* 20 */ NULL, NULL, NULL, NULL,
3959 /* 24 */ NULL, NULL, NULL, NULL,
3960 /* 28 */ NULL, NULL, NULL, NULL,
3961 /* 2C */ NULL, NULL, NULL, NULL,
3962 /* 30 */ NULL, NULL, NULL, NULL,
3963 /* 34 */ NULL, NULL, NULL, NULL,
3964 /* 38 */ NULL, NULL, NULL, NULL,
3965 /* 3C */ NULL, NULL, NULL, NULL,
3966 /* 40 */ NULL, NULL, NULL, NULL,
3967 /* 44 */ NULL, NULL, NULL, NULL,
3968 /* 48 */ NULL, NULL, NULL, NULL,
3969 /* 4C */ NULL, NULL, NULL, NULL,
3970 /* 50 */ NULL, NULL, NULL, NULL,
3971 /* 54 */ NULL, NULL, NULL, NULL,
3972 /* 58 */ NULL, NULL, NULL, NULL,
3973 /* 5C */ NULL, NULL, NULL, NULL,
3974 /* 60 */ NULL, NULL, NULL, NULL,
3975 /* 64 */ NULL, NULL, NULL, NULL,
3976 /* 68 */ NULL, NULL, NULL, NULL,
3977 /* 6C */ NULL, NULL, NULL, NULL,
3978 /* 70 */ NULL, NULL, NULL, NULL,
3979 /* 74 */ NULL, NULL, NULL, NULL,
3980 /* 78 */ NULL, NULL, NULL, NULL,
3981 /* 7C */ NULL, NULL, NULL, NULL,
3982 /* 80 */ NULL, NULL, NULL, NULL,
3983 /* 84 */ NULL, NULL, NULL, NULL,
3984 /* 88 */ NULL, NULL, "pfnacc", NULL,
3985 /* 8C */ NULL, NULL, "pfpnacc", NULL,
3986 /* 90 */ "pfcmpge", NULL, NULL, NULL,
3987 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
3988 /* 98 */ NULL, NULL, "pfsub", NULL,
3989 /* 9C */ NULL, NULL, "pfadd", NULL,
3990 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
3991 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
3992 /* A8 */ NULL, NULL, "pfsubr", NULL,
3993 /* AC */ NULL, NULL, "pfacc", NULL,
3994 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
3995 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
3996 /* B8 */ NULL, NULL, NULL, "pswapd",
3997 /* BC */ NULL, NULL, NULL, "pavgusb",
3998 /* C0 */ NULL, NULL, NULL, NULL,
3999 /* C4 */ NULL, NULL, NULL, NULL,
4000 /* C8 */ NULL, NULL, NULL, NULL,
4001 /* CC */ NULL, NULL, NULL, NULL,
4002 /* D0 */ NULL, NULL, NULL, NULL,
4003 /* D4 */ NULL, NULL, NULL, NULL,
4004 /* D8 */ NULL, NULL, NULL, NULL,
4005 /* DC */ NULL, NULL, NULL, NULL,
4006 /* E0 */ NULL, NULL, NULL, NULL,
4007 /* E4 */ NULL, NULL, NULL, NULL,
4008 /* E8 */ NULL, NULL, NULL, NULL,
4009 /* EC */ NULL, NULL, NULL, NULL,
4010 /* F0 */ NULL, NULL, NULL, NULL,
4011 /* F4 */ NULL, NULL, NULL, NULL,
4012 /* F8 */ NULL, NULL, NULL, NULL,
4013 /* FC */ NULL, NULL, NULL, NULL,
4014 };
4015
4016 static void
4017 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4018 {
4019 const char *mnemonic;
4020
4021 FETCH_DATA (the_info, codep + 1);
4022 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4023 place where an 8-bit immediate would normally go. ie. the last
4024 byte of the instruction. */
4025 obufp = obuf + strlen (obuf);
4026 mnemonic = Suffix3DNow[*codep++ & 0xff];
4027 if (mnemonic)
4028 oappend (mnemonic);
4029 else
4030 {
4031 /* Since a variable sized modrm/sib chunk is between the start
4032 of the opcode (0x0f0f) and the opcode suffix, we need to do
4033 all the modrm processing first, and don't know until now that
4034 we have a bad opcode. This necessitates some cleaning up. */
4035 op1out[0] = '\0';
4036 op2out[0] = '\0';
4037 BadOp ();
4038 }
4039 }
4040
4041 static const char *simd_cmp_op[] = {
4042 "eq",
4043 "lt",
4044 "le",
4045 "unord",
4046 "neq",
4047 "nlt",
4048 "nle",
4049 "ord"
4050 };
4051
4052 static void
4053 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4054 {
4055 unsigned int cmp_type;
4056
4057 FETCH_DATA (the_info, codep + 1);
4058 obufp = obuf + strlen (obuf);
4059 cmp_type = *codep++ & 0xff;
4060 if (cmp_type < 8)
4061 {
4062 char suffix1 = 'p', suffix2 = 's';
4063 used_prefixes |= (prefixes & PREFIX_REPZ);
4064 if (prefixes & PREFIX_REPZ)
4065 suffix1 = 's';
4066 else
4067 {
4068 used_prefixes |= (prefixes & PREFIX_DATA);
4069 if (prefixes & PREFIX_DATA)
4070 suffix2 = 'd';
4071 else
4072 {
4073 used_prefixes |= (prefixes & PREFIX_REPNZ);
4074 if (prefixes & PREFIX_REPNZ)
4075 suffix1 = 's', suffix2 = 'd';
4076 }
4077 }
4078 sprintf (scratchbuf, "cmp%s%c%c",
4079 simd_cmp_op[cmp_type], suffix1, suffix2);
4080 used_prefixes |= (prefixes & PREFIX_REPZ);
4081 oappend (scratchbuf);
4082 }
4083 else
4084 {
4085 /* We have a bad extension byte. Clean up. */
4086 op1out[0] = '\0';
4087 op2out[0] = '\0';
4088 BadOp ();
4089 }
4090 }
4091
4092 static void
4093 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
4094 {
4095 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4096 forms of these instructions. */
4097 if (mod == 3)
4098 {
4099 char *p = obuf + strlen (obuf);
4100 *(p + 1) = '\0';
4101 *p = *(p - 1);
4102 *(p - 1) = *(p - 2);
4103 *(p - 2) = *(p - 3);
4104 *(p - 3) = extrachar;
4105 }
4106 }
4107
4108 static void
4109 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4110 {
4111 if (mod == 3 && reg == 1)
4112 {
4113 char *p = obuf + strlen (obuf);
4114
4115 /* Override "sidt". */
4116 if (rm)
4117 {
4118 /* mwait %eax,%ecx */
4119 strcpy (p - 4, "mwait %eax,%ecx");
4120 }
4121 else
4122 {
4123 /* monitor %eax,%ecx,%edx" */
4124 strcpy (p - 4, "monitor %eax,%ecx,%edx");
4125 }
4126
4127 codep++;
4128 }
4129 else
4130 OP_E (0, sizeflag);
4131 }
4132
4133 static void
4134 BadOp (void)
4135 {
4136 /* Throw away prefixes and 1st. opcode byte. */
4137 codep = insn_codep + 1;
4138 oappend ("(bad)");
4139 }
GDB Binutils - Deliverables
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