opcodes/i386-dis.c

   1 /* Print i386 instructions for GDB, the GNU debugger.
   2    Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
   3    2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
   4
   5    This file is part of the GNU opcodes library.
   6
   7    This library is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3, or (at your option)
  10    any later version.
  11
  12    It is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  20    MA 02110-1301, USA.  */
  21
  22
  23 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
  24    July 1988
  25     modified by John Hassey (hassey@dg-rtp.dg.com)
  26     x86-64 support added by Jan Hubicka (jh@suse.cz)
  27     VIA PadLock support by Michal Ludvig (mludvig@suse.cz).  */
  28
  29 /* The main tables describing the instructions is essentially a copy
  30    of the "Opcode Map" chapter (Appendix A) of the Intel 80386
  31    Programmers Manual.  Usually, there is a capital letter, followed
  32    by a small letter.  The capital letter tell the addressing mode,
  33    and the small letter tells about the operand size.  Refer to
  34    the Intel manual for details.  */
  35
  36 #include "sysdep.h"
  37 #include "dis-asm.h"
  38 #include "opintl.h"
  39 #include "opcode/i386.h"
  40 #include "libiberty.h"
  41
  42 #include <setjmp.h>
  43
  44 static int fetch_data (struct disassemble_info *, bfd_byte *);
  45 static void ckprefix (void);
  46 static const char *prefix_name (int, int);
  47 static int print_insn (bfd_vma, disassemble_info *);
  48 static void dofloat (int);
  49 static void OP_ST (int, int);
  50 static void OP_STi (int, int);
  51 static int putop (const char *, int);
  52 static void oappend (const char *);
  53 static void append_seg (void);
  54 static void OP_indirE (int, int);
  55 static void print_operand_value (char *, int, bfd_vma);
  56 static void OP_E_extended (int, int, int);
  57 static void print_displacement (char *, bfd_vma);
  58 static void OP_E (int, int);
  59 static void OP_G (int, int);
  60 static bfd_vma get64 (void);
  61 static bfd_signed_vma get32 (void);
  62 static bfd_signed_vma get32s (void);
  63 static int get16 (void);
  64 static void set_op (bfd_vma, int);
  65 static void OP_Skip_MODRM (int, int);
  66 static void OP_REG (int, int);
  67 static void OP_IMREG (int, int);
  68 static void OP_I (int, int);
  69 static void OP_I64 (int, int);
  70 static void OP_sI (int, int);
  71 static void OP_J (int, int);
  72 static void OP_SEG (int, int);
  73 static void OP_DIR (int, int);
  74 static void OP_OFF (int, int);
  75 static void OP_OFF64 (int, int);
  76 static void ptr_reg (int, int);
  77 static void OP_ESreg (int, int);
  78 static void OP_DSreg (int, int);
  79 static void OP_C (int, int);
  80 static void OP_D (int, int);
  81 static void OP_T (int, int);
  82 static void OP_R (int, int);
  83 static void OP_MMX (int, int);
  84 static void OP_XMM (int, int);
  85 static void OP_EM (int, int);
  86 static void OP_EX (int, int);
  87 static void OP_EMC (int,int);
  88 static void OP_MXC (int,int);
  89 static void OP_MS (int, int);
  90 static void OP_XS (int, int);
  91 static void OP_M (int, int);
  92 static void OP_0f07 (int, int);
  93 static void OP_Monitor (int, int);
  94 static void OP_Mwait (int, int);
  95 static void NOP_Fixup1 (int, int);
  96 static void NOP_Fixup2 (int, int);
  97 static void OP_3DNowSuffix (int, int);
  98 static void CMP_Fixup (int, int);
  99 static void BadOp (void);
 100 static void REP_Fixup (int, int);
 101 static void CMPXCHG8B_Fixup (int, int);
 102 static void XMM_Fixup (int, int);
 103 static void CRC32_Fixup (int, int);
 104 static void print_drex_arg (unsigned int, int, int);
 105 static void OP_DREX4 (int, int);
 106 static void OP_DREX3 (int, int);
 107 static void OP_DREX_ICMP (int, int);
 108 static void OP_DREX_FCMP (int, int);
 109
 110 struct dis_private {
 111   /* Points to first byte not fetched.  */
 112   bfd_byte *max_fetched;
 113   bfd_byte the_buffer[MAX_MNEM_SIZE];
 114   bfd_vma insn_start;
 115   int orig_sizeflag;
 116   jmp_buf bailout;
 117 };
 118
 119 enum address_mode
 120 {
 121   mode_16bit,
 122   mode_32bit,
 123   mode_64bit
 124 };
 125
 126 enum address_mode address_mode;
 127
 128 /* Flags for the prefixes for the current instruction.  See below.  */
 129 static int prefixes;
 130
 131 /* REX prefix the current instruction.  See below.  */
 132 static int rex;
 133 /* Bits of REX we've already used.  */
 134 static int rex_used;
 135 /* Mark parts used in the REX prefix.  When we are testing for
 136    empty prefix (for 8bit register REX extension), just mask it
 137    out.  Otherwise test for REX bit is excuse for existence of REX
 138    only in case value is nonzero.  */
 139 #define USED_REX(value)                                 \
 140   {                                                     \
 141     if (value)                                          \
 142       {                                                 \
 143         if ((rex & value))                              \
 144           rex_used |= (value) | REX_OPCODE;             \
 145       }                                                 \
 146     else                                                \
 147       rex_used |= REX_OPCODE;                           \
 148   }
 149
 150 /* Special 'registers' for DREX handling */
 151 #define DREX_REG_UNKNOWN        1000    /* not initialized */
 152 #define DREX_REG_MEMORY         1001    /* use MODRM/SIB/OFFSET memory */
 153
 154 /* The DREX byte has the following fields:
 155    Bits 7-4 -- DREX.Dest, xmm destination register
 156    Bit 3    -- DREX.OC0, operand config bit defines operand order
 157    Bit 2    -- DREX.R, equivalent to REX_R bit, to extend ModRM register
 158    Bit 1    -- DREX.X, equivalent to REX_X bit, to extend SIB index field
 159    Bit 0    -- DREX.W, equivalent to REX_B bit, to extend ModRM r/m field,
 160                SIB base field, or opcode reg field.  */
 161 #define DREX_XMM(drex) ((drex >> 4) & 0xf)
 162 #define DREX_OC0(drex) ((drex >> 3) & 0x1)
 163
 164 /* Flags for prefixes which we somehow handled when printing the
 165    current instruction.  */
 166 static int used_prefixes;
 167
 168 /* Flags stored in PREFIXES.  */
 169 #define PREFIX_REPZ 1
 170 #define PREFIX_REPNZ 2
 171 #define PREFIX_LOCK 4
 172 #define PREFIX_CS 8
 173 #define PREFIX_SS 0x10
 174 #define PREFIX_DS 0x20
 175 #define PREFIX_ES 0x40
 176 #define PREFIX_FS 0x80
 177 #define PREFIX_GS 0x100
 178 #define PREFIX_DATA 0x200
 179 #define PREFIX_ADDR 0x400
 180 #define PREFIX_FWAIT 0x800
 181
 182 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
 183    to ADDR (exclusive) are valid.  Returns 1 for success, longjmps
 184    on error.  */
 185 #define FETCH_DATA(info, addr) \
 186   ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
 187    ? 1 : fetch_data ((info), (addr)))
 188
 189 static int
 190 fetch_data (struct disassemble_info *info, bfd_byte *addr)
 191 {
 192   int status;
 193   struct dis_private *priv = (struct dis_private *) info->private_data;
 194   bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
 195
 196   if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
 197     status = (*info->read_memory_func) (start,
 198                                         priv->max_fetched,
 199                                         addr - priv->max_fetched,
 200                                         info);
 201   else
 202     status = -1;
 203   if (status != 0)
 204     {
 205       /* If we did manage to read at least one byte, then
 206          print_insn_i386 will do something sensible.  Otherwise, print
 207          an error.  We do that here because this is where we know
 208          STATUS.  */
 209       if (priv->max_fetched == priv->the_buffer)
 210         (*info->memory_error_func) (status, start, info);
 211       longjmp (priv->bailout, 1);
 212     }
 213   else
 214     priv->max_fetched = addr;
 215   return 1;
 216 }
 217
 218 #define XX { NULL, 0 }
 219
 220 #define Eb { OP_E, b_mode }
 221 #define Ev { OP_E, v_mode }
 222 #define Ed { OP_E, d_mode }
 223 #define Edq { OP_E, dq_mode }
 224 #define Edqw { OP_E, dqw_mode }
 225 #define Edqb { OP_E, dqb_mode }
 226 #define Edqd { OP_E, dqd_mode }
 227 #define Eq { OP_E, q_mode }
 228 #define indirEv { OP_indirE, stack_v_mode }
 229 #define indirEp { OP_indirE, f_mode }
 230 #define stackEv { OP_E, stack_v_mode }
 231 #define Em { OP_E, m_mode }
 232 #define Ew { OP_E, w_mode }
 233 #define M { OP_M, 0 }           /* lea, lgdt, etc. */
 234 #define Ma { OP_M, v_mode }
 235 #define Mb { OP_M, b_mode }
 236 #define Md { OP_M, d_mode }
 237 #define Mp { OP_M, f_mode }             /* 32 or 48 bit memory operand for LDS, LES etc */
 238 #define Mq { OP_M, q_mode }
 239 #define Mx { OP_M, x_mode }
 240 #define Gb { OP_G, b_mode }
 241 #define Gv { OP_G, v_mode }
 242 #define Gd { OP_G, d_mode }
 243 #define Gdq { OP_G, dq_mode }
 244 #define Gm { OP_G, m_mode }
 245 #define Gw { OP_G, w_mode }
 246 #define Rd { OP_R, d_mode }
 247 #define Rm { OP_R, m_mode }
 248 #define Ib { OP_I, b_mode }
 249 #define sIb { OP_sI, b_mode }   /* sign extened byte */
 250 #define Iv { OP_I, v_mode }
 251 #define Iq { OP_I, q_mode }
 252 #define Iv64 { OP_I64, v_mode }
 253 #define Iw { OP_I, w_mode }
 254 #define I1 { OP_I, const_1_mode }
 255 #define Jb { OP_J, b_mode }
 256 #define Jv { OP_J, v_mode }
 257 #define Cm { OP_C, m_mode }
 258 #define Dm { OP_D, m_mode }
 259 #define Td { OP_T, d_mode }
 260 #define Skip_MODRM { OP_Skip_MODRM, 0 }
 261
 262 #define RMeAX { OP_REG, eAX_reg }
 263 #define RMeBX { OP_REG, eBX_reg }
 264 #define RMeCX { OP_REG, eCX_reg }
 265 #define RMeDX { OP_REG, eDX_reg }
 266 #define RMeSP { OP_REG, eSP_reg }
 267 #define RMeBP { OP_REG, eBP_reg }
 268 #define RMeSI { OP_REG, eSI_reg }
 269 #define RMeDI { OP_REG, eDI_reg }
 270 #define RMrAX { OP_REG, rAX_reg }
 271 #define RMrBX { OP_REG, rBX_reg }
 272 #define RMrCX { OP_REG, rCX_reg }
 273 #define RMrDX { OP_REG, rDX_reg }
 274 #define RMrSP { OP_REG, rSP_reg }
 275 #define RMrBP { OP_REG, rBP_reg }
 276 #define RMrSI { OP_REG, rSI_reg }
 277 #define RMrDI { OP_REG, rDI_reg }
 278 #define RMAL { OP_REG, al_reg }
 279 #define RMAL { OP_REG, al_reg }
 280 #define RMCL { OP_REG, cl_reg }
 281 #define RMDL { OP_REG, dl_reg }
 282 #define RMBL { OP_REG, bl_reg }
 283 #define RMAH { OP_REG, ah_reg }
 284 #define RMCH { OP_REG, ch_reg }
 285 #define RMDH { OP_REG, dh_reg }
 286 #define RMBH { OP_REG, bh_reg }
 287 #define RMAX { OP_REG, ax_reg }
 288 #define RMDX { OP_REG, dx_reg }
 289
 290 #define eAX { OP_IMREG, eAX_reg }
 291 #define eBX { OP_IMREG, eBX_reg }
 292 #define eCX { OP_IMREG, eCX_reg }
 293 #define eDX { OP_IMREG, eDX_reg }
 294 #define eSP { OP_IMREG, eSP_reg }
 295 #define eBP { OP_IMREG, eBP_reg }
 296 #define eSI { OP_IMREG, eSI_reg }
 297 #define eDI { OP_IMREG, eDI_reg }
 298 #define AL { OP_IMREG, al_reg }
 299 #define CL { OP_IMREG, cl_reg }
 300 #define DL { OP_IMREG, dl_reg }
 301 #define BL { OP_IMREG, bl_reg }
 302 #define AH { OP_IMREG, ah_reg }
 303 #define CH { OP_IMREG, ch_reg }
 304 #define DH { OP_IMREG, dh_reg }
 305 #define BH { OP_IMREG, bh_reg }
 306 #define AX { OP_IMREG, ax_reg }
 307 #define DX { OP_IMREG, dx_reg }
 308 #define zAX { OP_IMREG, z_mode_ax_reg }
 309 #define indirDX { OP_IMREG, indir_dx_reg }
 310
 311 #define Sw { OP_SEG, w_mode }
 312 #define Sv { OP_SEG, v_mode }
 313 #define Ap { OP_DIR, 0 }
 314 #define Ob { OP_OFF64, b_mode }
 315 #define Ov { OP_OFF64, v_mode }
 316 #define Xb { OP_DSreg, eSI_reg }
 317 #define Xv { OP_DSreg, eSI_reg }
 318 #define Xz { OP_DSreg, eSI_reg }
 319 #define Yb { OP_ESreg, eDI_reg }
 320 #define Yv { OP_ESreg, eDI_reg }
 321 #define DSBX { OP_DSreg, eBX_reg }
 322
 323 #define es { OP_REG, es_reg }
 324 #define ss { OP_REG, ss_reg }
 325 #define cs { OP_REG, cs_reg }
 326 #define ds { OP_REG, ds_reg }
 327 #define fs { OP_REG, fs_reg }
 328 #define gs { OP_REG, gs_reg }
 329
 330 #define MX { OP_MMX, 0 }
 331 #define XM { OP_XMM, 0 }
 332 #define EM { OP_EM, v_mode }
 333 #define EMd { OP_EM, d_mode }
 334 #define EMx { OP_EM, x_mode }
 335 #define EXw { OP_EX, w_mode }
 336 #define EXd { OP_EX, d_mode }
 337 #define EXq { OP_EX, q_mode }
 338 #define EXx { OP_EX, x_mode }
 339 #define MS { OP_MS, v_mode }
 340 #define XS { OP_XS, v_mode }
 341 #define EMCq { OP_EMC, q_mode }
 342 #define MXC { OP_MXC, 0 }
 343 #define OPSUF { OP_3DNowSuffix, 0 }
 344 #define CMP { CMP_Fixup, 0 }
 345 #define XMM0 { XMM_Fixup, 0 }
 346
 347 /* Used handle "rep" prefix for string instructions.  */
 348 #define Xbr { REP_Fixup, eSI_reg }
 349 #define Xvr { REP_Fixup, eSI_reg }
 350 #define Ybr { REP_Fixup, eDI_reg }
 351 #define Yvr { REP_Fixup, eDI_reg }
 352 #define Yzr { REP_Fixup, eDI_reg }
 353 #define indirDXr { REP_Fixup, indir_dx_reg }
 354 #define ALr { REP_Fixup, al_reg }
 355 #define eAXr { REP_Fixup, eAX_reg }
 356
 357 #define cond_jump_flag { NULL, cond_jump_mode }
 358 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
 359
 360 /* bits in sizeflag */
 361 #define SUFFIX_ALWAYS 4
 362 #define AFLAG 2
 363 #define DFLAG 1
 364
 365 /* byte operand */
 366 #define b_mode                  1
 367 /* operand size depends on prefixes */
 368 #define v_mode                  (b_mode + 1)
 369 /* word operand */
 370 #define w_mode                  (v_mode + 1)
 371 /* double word operand  */
 372 #define d_mode                  (w_mode + 1)
 373 /* quad word operand */
 374 #define q_mode                  (d_mode + 1)
 375 /* ten-byte operand */
 376 #define t_mode                  (q_mode + 1)
 377 /* 16-byte XMM operand */
 378 #define x_mode                  (t_mode + 1)
 379 /* d_mode in 32bit, q_mode in 64bit mode.  */
 380 #define m_mode                  (x_mode + 1)
 381 #define cond_jump_mode          (m_mode + 1)
 382 #define loop_jcxz_mode          (cond_jump_mode + 1)
 383 /* operand size depends on REX prefixes.  */
 384 #define dq_mode                 (loop_jcxz_mode + 1)
 385 /* registers like dq_mode, memory like w_mode.  */
 386 #define dqw_mode                (dq_mode + 1)
 387 /* 4- or 6-byte pointer operand */
 388 #define f_mode                  (dqw_mode + 1)
 389 #define const_1_mode            (f_mode + 1)
 390 /* v_mode for stack-related opcodes.  */
 391 #define stack_v_mode            (const_1_mode + 1)
 392 /* non-quad operand size depends on prefixes */
 393 #define z_mode                  (stack_v_mode + 1)
 394 /* 16-byte operand */
 395 #define o_mode                  (z_mode + 1)
 396 /* registers like dq_mode, memory like b_mode.  */
 397 #define dqb_mode                (o_mode + 1)
 398 /* registers like dq_mode, memory like d_mode.  */
 399 #define dqd_mode                (dqb_mode + 1)
 400
 401 #define es_reg                  (dqd_mode + 1)
 402 #define cs_reg                  (es_reg + 1)
 403 #define ss_reg                  (cs_reg + 1)
 404 #define ds_reg                  (ss_reg + 1)
 405 #define fs_reg                  (ds_reg + 1)
 406 #define gs_reg                  (fs_reg + 1)
 407
 408 #define eAX_reg                 (gs_reg + 1)
 409 #define eCX_reg                 (eAX_reg + 1)
 410 #define eDX_reg                 (eCX_reg + 1)
 411 #define eBX_reg                 (eDX_reg + 1)
 412 #define eSP_reg                 (eBX_reg + 1)
 413 #define eBP_reg                 (eSP_reg + 1)
 414 #define eSI_reg                 (eBP_reg + 1)
 415 #define eDI_reg                 (eSI_reg + 1)
 416
 417 #define al_reg                  (eDI_reg + 1)
 418 #define cl_reg                  (al_reg + 1)
 419 #define dl_reg                  (cl_reg + 1)
 420 #define bl_reg                  (dl_reg + 1)
 421 #define ah_reg                  (bl_reg + 1)
 422 #define ch_reg                  (ah_reg + 1)
 423 #define dh_reg                  (ch_reg + 1)
 424 #define bh_reg                  (dh_reg + 1)
 425
 426 #define ax_reg                  (bh_reg + 1)
 427 #define cx_reg                  (ax_reg + 1)
 428 #define dx_reg                  (cx_reg + 1)
 429 #define bx_reg                  (dx_reg + 1)
 430 #define sp_reg                  (bx_reg + 1)
 431 #define bp_reg                  (sp_reg + 1)
 432 #define si_reg                  (bp_reg + 1)
 433 #define di_reg                  (si_reg + 1)
 434
 435 #define rAX_reg                 (di_reg + 1)
 436 #define rCX_reg                 (rAX_reg + 1)
 437 #define rDX_reg                 (rCX_reg + 1)
 438 #define rBX_reg                 (rDX_reg + 1)
 439 #define rSP_reg                 (rBX_reg + 1)
 440 #define rBP_reg                 (rSP_reg + 1)
 441 #define rSI_reg                 (rBP_reg + 1)
 442 #define rDI_reg                 (rSI_reg + 1)
 443
 444 #define z_mode_ax_reg           (rDI_reg + 1)
 445 #define indir_dx_reg            (z_mode_ax_reg + 1)
 446
 447 #define MAX_BYTEMODE    indir_dx_reg
 448
 449 /* Flags that are OR'ed into the bytemode field to pass extra
 450    information.  */
 451 #define DREX_OC1                0x10000 /* OC1 bit set */
 452 #define DREX_NO_OC0             0x20000 /* OC0 bit not used */
 453 #define DREX_MASK               0x40000 /* mask to delete */
 454
 455 #if MAX_BYTEMODE >= DREX_OC1
 456 #error MAX_BYTEMODE must be less than DREX_OC1
 457 #endif
 458
 459 #define FLOATCODE               1
 460 #define USE_REG_TABLE           (FLOATCODE + 1)
 461 #define USE_MOD_TABLE           (USE_REG_TABLE + 1)
 462 #define USE_RM_TABLE            (USE_MOD_TABLE + 1)
 463 #define USE_PREFIX_TABLE        (USE_RM_TABLE + 1)
 464 #define USE_X86_64_TABLE        (USE_PREFIX_TABLE + 1)
 465 #define USE_3BYTE_TABLE         (USE_X86_64_TABLE + 1)
 466
 467 #define FLOAT                   NULL, { { NULL, FLOATCODE } }
 468
 469 #define DIS386(T, I)            NULL, { { NULL, (T)}, { NULL,  (I) } }
 470 #define REG_TABLE(I)            DIS386 (USE_REG_TABLE, (I))
 471 #define MOD_TABLE(I)            DIS386 (USE_MOD_TABLE, (I))
 472 #define RM_TABLE(I)             DIS386 (USE_RM_TABLE, (I))
 473 #define PREFIX_TABLE(I)         DIS386 (USE_PREFIX_TABLE, (I))
 474 #define X86_64_TABLE(I)         DIS386 (USE_X86_64_TABLE, (I))
 475 #define THREE_BYTE_TABLE(I)     DIS386 (USE_3BYTE_TABLE, (I))
 476
 477 #define REG_80                  0
 478 #define REG_81                  (REG_80 + 1)
 479 #define REG_82                  (REG_81 + 1)
 480 #define REG_8F                  (REG_82 + 1)
 481 #define REG_C0                  (REG_8F + 1)
 482 #define REG_C1                  (REG_C0 + 1)
 483 #define REG_C6                  (REG_C1 + 1)
 484 #define REG_C7                  (REG_C6 + 1)
 485 #define REG_D0                  (REG_C7 + 1)
 486 #define REG_D1                  (REG_D0 + 1)
 487 #define REG_D2                  (REG_D1 + 1)
 488 #define REG_D3                  (REG_D2 + 1)
 489 #define REG_F6                  (REG_D3 + 1)
 490 #define REG_F7                  (REG_F6 + 1)
 491 #define REG_FE                  (REG_F7 + 1)
 492 #define REG_FF                  (REG_FE + 1)
 493 #define REG_0F00                (REG_FF + 1)
 494 #define REG_0F01                (REG_0F00 + 1)
 495 #define REG_0F0D                (REG_0F01 + 1)
 496 #define REG_0F18                (REG_0F0D + 1)
 497 #define REG_0F71                (REG_0F18 + 1)
 498 #define REG_0F72                (REG_0F71 + 1)
 499 #define REG_0F73                (REG_0F72 + 1)
 500 #define REG_0FA6                (REG_0F73 + 1)
 501 #define REG_0FA7                (REG_0FA6 + 1)
 502 #define REG_0FAE                (REG_0FA7 + 1)
 503 #define REG_0FBA                (REG_0FAE + 1)
 504 #define REG_0FC7                (REG_0FBA + 1)
 505
 506 #define MOD_8D                  0
 507 #define MOD_0F01_REG_0          (MOD_8D + 1)
 508 #define MOD_0F01_REG_1          (MOD_0F01_REG_0 + 1)
 509 #define MOD_0F01_REG_2          (MOD_0F01_REG_1 + 1)
 510 #define MOD_0F01_REG_3          (MOD_0F01_REG_2 + 1)
 511 #define MOD_0F01_REG_7          (MOD_0F01_REG_3 + 1)
 512 #define MOD_0F12_PREFIX_0       (MOD_0F01_REG_7 + 1)
 513 #define MOD_0F13                (MOD_0F12_PREFIX_0 + 1)
 514 #define MOD_0F16_PREFIX_0       (MOD_0F13 + 1)
 515 #define MOD_0F17                (MOD_0F16_PREFIX_0 + 1)
 516 #define MOD_0F18_REG_0          (MOD_0F17 + 1)
 517 #define MOD_0F18_REG_1          (MOD_0F18_REG_0 + 1)
 518 #define MOD_0F18_REG_2          (MOD_0F18_REG_1 + 1)
 519 #define MOD_0F18_REG_3          (MOD_0F18_REG_2 + 1)
 520 #define MOD_0F20                (MOD_0F18_REG_3 + 1)
 521 #define MOD_0F21                (MOD_0F20 + 1)
 522 #define MOD_0F22                (MOD_0F21 + 1)
 523 #define MOD_0F23                (MOD_0F22 + 1)
 524 #define MOD_0F24                (MOD_0F23 + 1)
 525 #define MOD_0F26                (MOD_0F24 + 1)
 526 #define MOD_0F2B_PREFIX_0       (MOD_0F26 + 1)
 527 #define MOD_0F2B_PREFIX_1       (MOD_0F2B_PREFIX_0 + 1)
 528 #define MOD_0F2B_PREFIX_2       (MOD_0F2B_PREFIX_1 + 1)
 529 #define MOD_0F2B_PREFIX_3       (MOD_0F2B_PREFIX_2 + 1)
 530 #define MOD_0F51                (MOD_0F2B_PREFIX_3 + 1)
 531 #define MOD_0F71_REG_2          (MOD_0F51 + 1)
 532 #define MOD_0F71_REG_4          (MOD_0F71_REG_2 + 1)
 533 #define MOD_0F71_REG_6          (MOD_0F71_REG_4 + 1)
 534 #define MOD_0F72_REG_2          (MOD_0F71_REG_6 + 1)
 535 #define MOD_0F72_REG_4          (MOD_0F72_REG_2 + 1)
 536 #define MOD_0F72_REG_6          (MOD_0F72_REG_4 + 1)
 537 #define MOD_0F73_REG_2          (MOD_0F72_REG_6 + 1)
 538 #define MOD_0F73_REG_3          (MOD_0F73_REG_2 + 1)
 539 #define MOD_0F73_REG_6          (MOD_0F73_REG_3 + 1)
 540 #define MOD_0F73_REG_7          (MOD_0F73_REG_6 + 1)
 541 #define MOD_0FAE_REG_0          (MOD_0F73_REG_7 + 1)
 542 #define MOD_0FAE_REG_1          (MOD_0FAE_REG_0 + 1)
 543 #define MOD_0FAE_REG_2          (MOD_0FAE_REG_1 + 1)
 544 #define MOD_0FAE_REG_3          (MOD_0FAE_REG_2 + 1)
 545 #define MOD_0FAE_REG_4          (MOD_0FAE_REG_3 + 1)
 546 #define MOD_0FAE_REG_5          (MOD_0FAE_REG_4 + 1)
 547 #define MOD_0FAE_REG_6          (MOD_0FAE_REG_5 + 1)
 548 #define MOD_0FAE_REG_7          (MOD_0FAE_REG_6 + 1)
 549 #define MOD_0FB2                (MOD_0FAE_REG_7 + 1)
 550 #define MOD_0FB4                (MOD_0FB2 + 1)
 551 #define MOD_0FB5                (MOD_0FB4 + 1)
 552 #define MOD_0FC7_REG_6          (MOD_0FB5 + 1)
 553 #define MOD_0FC7_REG_7          (MOD_0FC7_REG_6 + 1)
 554 #define MOD_0FD7                (MOD_0FC7_REG_7 + 1)
 555 #define MOD_0FE7_PREFIX_2       (MOD_0FD7 + 1)
 556 #define MOD_0FF0_PREFIX_3       (MOD_0FE7_PREFIX_2 + 1)
 557 #define MOD_0F382A_PREFIX_2     (MOD_0FF0_PREFIX_3 + 1)
 558 #define MOD_62_32BIT            (MOD_0F382A_PREFIX_2 + 1)
 559 #define MOD_C4_32BIT            (MOD_62_32BIT + 1)
 560 #define MOD_C5_32BIT            (MOD_C4_32BIT + 1)
 561
 562 #define RM_0F01_REG_0           0
 563 #define RM_0F01_REG_1           (RM_0F01_REG_0 + 1)
 564 #define RM_0F01_REG_2           (RM_0F01_REG_1 + 1)
 565 #define RM_0F01_REG_3           (RM_0F01_REG_2 + 1)
 566 #define RM_0F01_REG_7           (RM_0F01_REG_3 + 1)
 567 #define RM_0FAE_REG_5           (RM_0F01_REG_7 + 1)
 568 #define RM_0FAE_REG_6           (RM_0FAE_REG_5 + 1)
 569 #define RM_0FAE_REG_7           (RM_0FAE_REG_6 + 1)
 570
 571 #define PREFIX_90               0
 572 #define PREFIX_0F10             (PREFIX_90 + 1)
 573 #define PREFIX_0F11             (PREFIX_0F10 + 1)
 574 #define PREFIX_0F12             (PREFIX_0F11 + 1)
 575 #define PREFIX_0F16             (PREFIX_0F12 + 1)
 576 #define PREFIX_0F2A             (PREFIX_0F16 + 1)
 577 #define PREFIX_0F2B             (PREFIX_0F2A + 1)
 578 #define PREFIX_0F2C             (PREFIX_0F2B + 1)
 579 #define PREFIX_0F2D             (PREFIX_0F2C + 1)
 580 #define PREFIX_0F2E             (PREFIX_0F2D + 1)
 581 #define PREFIX_0F2F             (PREFIX_0F2E + 1)
 582 #define PREFIX_0F51             (PREFIX_0F2F + 1)
 583 #define PREFIX_0F52             (PREFIX_0F51 + 1)
 584 #define PREFIX_0F53             (PREFIX_0F52 + 1)
 585 #define PREFIX_0F58             (PREFIX_0F53 + 1)
 586 #define PREFIX_0F59             (PREFIX_0F58 + 1)
 587 #define PREFIX_0F5A             (PREFIX_0F59 + 1)
 588 #define PREFIX_0F5B             (PREFIX_0F5A + 1)
 589 #define PREFIX_0F5C             (PREFIX_0F5B + 1)
 590 #define PREFIX_0F5D             (PREFIX_0F5C + 1)
 591 #define PREFIX_0F5E             (PREFIX_0F5D + 1)
 592 #define PREFIX_0F5F             (PREFIX_0F5E + 1)
 593 #define PREFIX_0F60             (PREFIX_0F5F + 1)
 594 #define PREFIX_0F61             (PREFIX_0F60 + 1)
 595 #define PREFIX_0F62             (PREFIX_0F61 + 1)
 596 #define PREFIX_0F6C             (PREFIX_0F62 + 1)
 597 #define PREFIX_0F6D             (PREFIX_0F6C + 1)
 598 #define PREFIX_0F6F             (PREFIX_0F6D + 1)
 599 #define PREFIX_0F70             (PREFIX_0F6F + 1)
 600 #define PREFIX_0F73_REG_3       (PREFIX_0F70 + 1)
 601 #define PREFIX_0F73_REG_7       (PREFIX_0F73_REG_3 + 1)
 602 #define PREFIX_0F78             (PREFIX_0F73_REG_7 + 1)
 603 #define PREFIX_0F79             (PREFIX_0F78 + 1)
 604 #define PREFIX_0F7C             (PREFIX_0F79 + 1)
 605 #define PREFIX_0F7D             (PREFIX_0F7C + 1)
 606 #define PREFIX_0F7E             (PREFIX_0F7D + 1)
 607 #define PREFIX_0F7F             (PREFIX_0F7E + 1)
 608 #define PREFIX_0FB8             (PREFIX_0F7F + 1)
 609 #define PREFIX_0FBD             (PREFIX_0FB8 + 1)
 610 #define PREFIX_0FC2             (PREFIX_0FBD + 1)
 611 #define PREFIX_0FC3             (PREFIX_0FC2 + 1)
 612 #define PREFIX_0FC7_REG_6       (PREFIX_0FC3 + 1)
 613 #define PREFIX_0FD0             (PREFIX_0FC7_REG_6 + 1)
 614 #define PREFIX_0FD6             (PREFIX_0FD0 + 1)
 615 #define PREFIX_0FE6             (PREFIX_0FD6 + 1)
 616 #define PREFIX_0FE7             (PREFIX_0FE6 + 1)
 617 #define PREFIX_0FF0             (PREFIX_0FE7 + 1)
 618 #define PREFIX_0FF7             (PREFIX_0FF0 + 1)
 619 #define PREFIX_0F3810           (PREFIX_0FF7 + 1)
 620 #define PREFIX_0F3814           (PREFIX_0F3810 + 1)
 621 #define PREFIX_0F3815           (PREFIX_0F3814 + 1)
 622 #define PREFIX_0F3817           (PREFIX_0F3815 + 1)
 623 #define PREFIX_0F3820           (PREFIX_0F3817 + 1)
 624 #define PREFIX_0F3821           (PREFIX_0F3820 + 1)
 625 #define PREFIX_0F3822           (PREFIX_0F3821 + 1)
 626 #define PREFIX_0F3823           (PREFIX_0F3822 + 1)
 627 #define PREFIX_0F3824           (PREFIX_0F3823 + 1)
 628 #define PREFIX_0F3825           (PREFIX_0F3824 + 1)
 629 #define PREFIX_0F3828           (PREFIX_0F3825 + 1)
 630 #define PREFIX_0F3829           (PREFIX_0F3828 + 1)
 631 #define PREFIX_0F382A           (PREFIX_0F3829 + 1)
 632 #define PREFIX_0F382B           (PREFIX_0F382A + 1)
 633 #define PREFIX_0F3830           (PREFIX_0F382B + 1)
 634 #define PREFIX_0F3831           (PREFIX_0F3830 + 1)
 635 #define PREFIX_0F3832           (PREFIX_0F3831 + 1)
 636 #define PREFIX_0F3833           (PREFIX_0F3832 + 1)
 637 #define PREFIX_0F3834           (PREFIX_0F3833 + 1)
 638 #define PREFIX_0F3835           (PREFIX_0F3834 + 1)
 639 #define PREFIX_0F3837           (PREFIX_0F3835 + 1)
 640 #define PREFIX_0F3838           (PREFIX_0F3837 + 1)
 641 #define PREFIX_0F3839           (PREFIX_0F3838 + 1)
 642 #define PREFIX_0F383A           (PREFIX_0F3839 + 1)
 643 #define PREFIX_0F383B           (PREFIX_0F383A + 1)
 644 #define PREFIX_0F383C           (PREFIX_0F383B + 1)
 645 #define PREFIX_0F383D           (PREFIX_0F383C + 1)
 646 #define PREFIX_0F383E           (PREFIX_0F383D + 1)
 647 #define PREFIX_0F383F           (PREFIX_0F383E + 1)
 648 #define PREFIX_0F3840           (PREFIX_0F383F + 1)
 649 #define PREFIX_0F3841           (PREFIX_0F3840 + 1)
 650 #define PREFIX_0F38F0           (PREFIX_0F3841 + 1)
 651 #define PREFIX_0F38F1           (PREFIX_0F38F0 + 1)
 652 #define PREFIX_0F3A08           (PREFIX_0F38F1 + 1)
 653 #define PREFIX_0F3A09           (PREFIX_0F3A08 + 1)
 654 #define PREFIX_0F3A0A           (PREFIX_0F3A09 + 1)
 655 #define PREFIX_0F3A0B           (PREFIX_0F3A0A + 1)
 656 #define PREFIX_0F3A0C           (PREFIX_0F3A0B + 1)
 657 #define PREFIX_0F3A0D           (PREFIX_0F3A0C + 1)
 658 #define PREFIX_0F3A0E           (PREFIX_0F3A0D + 1)
 659 #define PREFIX_0F3A14           (PREFIX_0F3A0E + 1)
 660 #define PREFIX_0F3A15           (PREFIX_0F3A14 + 1)
 661 #define PREFIX_0F3A16           (PREFIX_0F3A15 + 1)
 662 #define PREFIX_0F3A17           (PREFIX_0F3A16 + 1)
 663 #define PREFIX_0F3A20           (PREFIX_0F3A17 + 1)
 664 #define PREFIX_0F3A21           (PREFIX_0F3A20 + 1)
 665 #define PREFIX_0F3A22           (PREFIX_0F3A21 + 1)
 666 #define PREFIX_0F3A40           (PREFIX_0F3A22 + 1)
 667 #define PREFIX_0F3A41           (PREFIX_0F3A40 + 1)
 668 #define PREFIX_0F3A42           (PREFIX_0F3A41 + 1)
 669 #define PREFIX_0F3A60           (PREFIX_0F3A42 + 1)
 670 #define PREFIX_0F3A61           (PREFIX_0F3A60 + 1)
 671 #define PREFIX_0F3A62           (PREFIX_0F3A61 + 1)
 672 #define PREFIX_0F3A63           (PREFIX_0F3A62 + 1)
 673
 674 #define X86_64_06               0
 675 #define X86_64_07               (X86_64_06 + 1)
 676 #define X86_64_0D               (X86_64_07 + 1)
 677 #define X86_64_16               (X86_64_0D + 1)
 678 #define X86_64_17               (X86_64_16 + 1)
 679 #define X86_64_1E               (X86_64_17 + 1)
 680 #define X86_64_1F               (X86_64_1E + 1)
 681 #define X86_64_27               (X86_64_1F + 1)
 682 #define X86_64_2F               (X86_64_27 + 1)
 683 #define X86_64_37               (X86_64_2F + 1)
 684 #define X86_64_3F               (X86_64_37 + 1)
 685 #define X86_64_60               (X86_64_3F + 1)
 686 #define X86_64_61               (X86_64_60 + 1)
 687 #define X86_64_62               (X86_64_61 + 1)
 688 #define X86_64_63               (X86_64_62 + 1)
 689 #define X86_64_6D               (X86_64_63 + 1)
 690 #define X86_64_6F               (X86_64_6D + 1)
 691 #define X86_64_9A               (X86_64_6F + 1)
 692 #define X86_64_C4               (X86_64_9A + 1)
 693 #define X86_64_C5               (X86_64_C4 + 1)
 694 #define X86_64_CE               (X86_64_C5 + 1)
 695 #define X86_64_D4               (X86_64_CE + 1)
 696 #define X86_64_D5               (X86_64_D4 + 1)
 697 #define X86_64_EA               (X86_64_D5 + 1)
 698 #define X86_64_0F01_REG_0       (X86_64_EA + 1)
 699 #define X86_64_0F01_REG_1       (X86_64_0F01_REG_0 + 1)
 700 #define X86_64_0F01_REG_2       (X86_64_0F01_REG_1 + 1)
 701 #define X86_64_0F01_REG_3       (X86_64_0F01_REG_2 + 1)
 702
 703 #define THREE_BYTE_0F24         0
 704 #define THREE_BYTE_0F25         (THREE_BYTE_0F24 + 1)
 705 #define THREE_BYTE_0F38         (THREE_BYTE_0F25 + 1)
 706 #define THREE_BYTE_0F3A         (THREE_BYTE_0F38 + 1)
 707 #define THREE_BYTE_0F7A         (THREE_BYTE_0F3A + 1)
 708 #define THREE_BYTE_0F7B         (THREE_BYTE_0F7A + 1)
 709
 710 typedef void (*op_rtn) (int bytemode, int sizeflag);
 711
 712 struct dis386 {
 713   const char *name;
 714   struct
 715     {
 716       op_rtn rtn;
 717       int bytemode;
 718     } op[MAX_OPERANDS];
 719 };
 720
 721 /* Upper case letters in the instruction names here are macros.
 722    'A' => print 'b' if no register operands or suffix_always is true
 723    'B' => print 'b' if suffix_always is true
 724    'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
 725           size prefix
 726    'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
 727           suffix_always is true
 728    'E' => print 'e' if 32-bit form of jcxz
 729    'F' => print 'w' or 'l' depending on address size prefix (loop insns)
 730    'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
 731    'H' => print ",pt" or ",pn" branch hint
 732    'I' => honor following macro letter even in Intel mode (implemented only
 733           for some of the macro letters)
 734    'J' => print 'l'
 735    'K' => print 'd' or 'q' if rex prefix is present.
 736    'L' => print 'l' if suffix_always is true
 737    'M' => print 'r' if intel_mnemonic is false.
 738    'N' => print 'n' if instruction has no wait "prefix"
 739    'O' => print 'd' or 'o' (or 'q' in Intel mode)
 740    'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
 741           or suffix_always is true.  print 'q' if rex prefix is present.
 742    'Q' => print 'w', 'l' or 'q' for memory operand or suffix_always
 743           is true
 744    'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
 745    'S' => print 'w', 'l' or 'q' if suffix_always is true
 746    'T' => print 'q' in 64bit mode and behave as 'P' otherwise
 747    'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
 748    'V' => print 'q' in 64bit mode and behave as 'S' otherwise
 749    'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
 750    'X' => print 's', 'd' depending on data16 prefix (for XMM)
 751    'Y' => 'q' if instruction has an REX 64bit overwrite prefix and
 752           suffix_always is true.
 753    'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
 754    '!' => change condition from true to false or from false to true.
 755    '%' => add 1 upper case letter to the macro.
 756
 757    2 upper case letter macros:
 758    'LQ' => print 'l' ('d' in Intel mode) or 'q' for memory operand
 759            or suffix_always is true
 760
 761    Many of the above letters print nothing in Intel mode.  See "putop"
 762    for the details.
 763
 764    Braces '{' and '}', and vertical bars '|', indicate alternative
 765    mnemonic strings for AT&T and Intel.  */
 766
 767 static const struct dis386 dis386[] = {
 768   /* 00 */
 769   { "addB",             { Eb, Gb } },
 770   { "addS",             { Ev, Gv } },
 771   { "addB",             { Gb, Eb } },
 772   { "addS",             { Gv, Ev } },
 773   { "addB",             { AL, Ib } },
 774   { "addS",             { eAX, Iv } },
 775   { X86_64_TABLE (X86_64_06) },
 776   { X86_64_TABLE (X86_64_07) },
 777   /* 08 */
 778   { "orB",              { Eb, Gb } },
 779   { "orS",              { Ev, Gv } },
 780   { "orB",              { Gb, Eb } },
 781   { "orS",              { Gv, Ev } },
 782   { "orB",              { AL, Ib } },
 783   { "orS",              { eAX, Iv } },
 784   { X86_64_TABLE (X86_64_0D) },
 785   { "(bad)",            { XX } },       /* 0x0f extended opcode escape */
 786   /* 10 */
 787   { "adcB",             { Eb, Gb } },
 788   { "adcS",             { Ev, Gv } },
 789   { "adcB",             { Gb, Eb } },
 790   { "adcS",             { Gv, Ev } },
 791   { "adcB",             { AL, Ib } },
 792   { "adcS",             { eAX, Iv } },
 793   { X86_64_TABLE (X86_64_16) },
 794   { X86_64_TABLE (X86_64_17) },
 795   /* 18 */
 796   { "sbbB",             { Eb, Gb } },
 797   { "sbbS",             { Ev, Gv } },
 798   { "sbbB",             { Gb, Eb } },
 799   { "sbbS",             { Gv, Ev } },
 800   { "sbbB",             { AL, Ib } },
 801   { "sbbS",             { eAX, Iv } },
 802   { X86_64_TABLE (X86_64_1E) },
 803   { X86_64_TABLE (X86_64_1F) },
 804   /* 20 */
 805   { "andB",             { Eb, Gb } },
 806   { "andS",             { Ev, Gv } },
 807   { "andB",             { Gb, Eb } },
 808   { "andS",             { Gv, Ev } },
 809   { "andB",             { AL, Ib } },
 810   { "andS",             { eAX, Iv } },
 811   { "(bad)",            { XX } },       /* SEG ES prefix */
 812   { X86_64_TABLE (X86_64_27) },
 813   /* 28 */
 814   { "subB",             { Eb, Gb } },
 815   { "subS",             { Ev, Gv } },
 816   { "subB",             { Gb, Eb } },
 817   { "subS",             { Gv, Ev } },
 818   { "subB",             { AL, Ib } },
 819   { "subS",             { eAX, Iv } },
 820   { "(bad)",            { XX } },       /* SEG CS prefix */
 821   { X86_64_TABLE (X86_64_2F) },
 822   /* 30 */
 823   { "xorB",             { Eb, Gb } },
 824   { "xorS",             { Ev, Gv } },
 825   { "xorB",             { Gb, Eb } },
 826   { "xorS",             { Gv, Ev } },
 827   { "xorB",             { AL, Ib } },
 828   { "xorS",             { eAX, Iv } },
 829   { "(bad)",            { XX } },       /* SEG SS prefix */
 830   { X86_64_TABLE (X86_64_37) },
 831   /* 38 */
 832   { "cmpB",             { Eb, Gb } },
 833   { "cmpS",             { Ev, Gv } },
 834   { "cmpB",             { Gb, Eb } },
 835   { "cmpS",             { Gv, Ev } },
 836   { "cmpB",             { AL, Ib } },
 837   { "cmpS",             { eAX, Iv } },
 838   { "(bad)",            { XX } },       /* SEG DS prefix */
 839   { X86_64_TABLE (X86_64_3F) },
 840   /* 40 */
 841   { "inc{S|}",          { RMeAX } },
 842   { "inc{S|}",          { RMeCX } },
 843   { "inc{S|}",          { RMeDX } },
 844   { "inc{S|}",          { RMeBX } },
 845   { "inc{S|}",          { RMeSP } },
 846   { "inc{S|}",          { RMeBP } },
 847   { "inc{S|}",          { RMeSI } },
 848   { "inc{S|}",          { RMeDI } },
 849   /* 48 */
 850   { "dec{S|}",          { RMeAX } },
 851   { "dec{S|}",          { RMeCX } },
 852   { "dec{S|}",          { RMeDX } },
 853   { "dec{S|}",          { RMeBX } },
 854   { "dec{S|}",          { RMeSP } },
 855   { "dec{S|}",          { RMeBP } },
 856   { "dec{S|}",          { RMeSI } },
 857   { "dec{S|}",          { RMeDI } },
 858   /* 50 */
 859   { "pushV",            { RMrAX } },
 860   { "pushV",            { RMrCX } },
 861   { "pushV",            { RMrDX } },
 862   { "pushV",            { RMrBX } },
 863   { "pushV",            { RMrSP } },
 864   { "pushV",            { RMrBP } },
 865   { "pushV",            { RMrSI } },
 866   { "pushV",            { RMrDI } },
 867   /* 58 */
 868   { "popV",             { RMrAX } },
 869   { "popV",             { RMrCX } },
 870   { "popV",             { RMrDX } },
 871   { "popV",             { RMrBX } },
 872   { "popV",             { RMrSP } },
 873   { "popV",             { RMrBP } },
 874   { "popV",             { RMrSI } },
 875   { "popV",             { RMrDI } },
 876   /* 60 */
 877   { X86_64_TABLE (X86_64_60) },
 878   { X86_64_TABLE (X86_64_61) },
 879   { X86_64_TABLE (X86_64_62) },
 880   { X86_64_TABLE (X86_64_63) },
 881   { "(bad)",            { XX } },       /* seg fs */
 882   { "(bad)",            { XX } },       /* seg gs */
 883   { "(bad)",            { XX } },       /* op size prefix */
 884   { "(bad)",            { XX } },       /* adr size prefix */
 885   /* 68 */
 886   { "pushT",            { Iq } },
 887   { "imulS",            { Gv, Ev, Iv } },
 888   { "pushT",            { sIb } },
 889   { "imulS",            { Gv, Ev, sIb } },
 890   { "ins{b|}",          { Ybr, indirDX } },
 891   { X86_64_TABLE (X86_64_6D) },
 892   { "outs{b|}",         { indirDXr, Xb } },
 893   { X86_64_TABLE (X86_64_6F) },
 894   /* 70 */
 895   { "joH",              { Jb, XX, cond_jump_flag } },
 896   { "jnoH",             { Jb, XX, cond_jump_flag } },
 897   { "jbH",              { Jb, XX, cond_jump_flag } },
 898   { "jaeH",             { Jb, XX, cond_jump_flag } },
 899   { "jeH",              { Jb, XX, cond_jump_flag } },
 900   { "jneH",             { Jb, XX, cond_jump_flag } },
 901   { "jbeH",             { Jb, XX, cond_jump_flag } },
 902   { "jaH",              { Jb, XX, cond_jump_flag } },
 903   /* 78 */
 904   { "jsH",              { Jb, XX, cond_jump_flag } },
 905   { "jnsH",             { Jb, XX, cond_jump_flag } },
 906   { "jpH",              { Jb, XX, cond_jump_flag } },
 907   { "jnpH",             { Jb, XX, cond_jump_flag } },
 908   { "jlH",              { Jb, XX, cond_jump_flag } },
 909   { "jgeH",             { Jb, XX, cond_jump_flag } },
 910   { "jleH",             { Jb, XX, cond_jump_flag } },
 911   { "jgH",              { Jb, XX, cond_jump_flag } },
 912   /* 80 */
 913   { REG_TABLE (REG_80) },
 914   { REG_TABLE (REG_81) },
 915   { "(bad)",            { XX } },
 916   { REG_TABLE (REG_82) },
 917   { "testB",            { Eb, Gb } },
 918   { "testS",            { Ev, Gv } },
 919   { "xchgB",            { Eb, Gb } },
 920   { "xchgS",            { Ev, Gv } },
 921   /* 88 */
 922   { "movB",             { Eb, Gb } },
 923   { "movS",             { Ev, Gv } },
 924   { "movB",             { Gb, Eb } },
 925   { "movS",             { Gv, Ev } },
 926   { "movD",             { Sv, Sw } },
 927   { MOD_TABLE (MOD_8D) },
 928   { "movD",             { Sw, Sv } },
 929   { REG_TABLE (REG_8F) },
 930   /* 90 */
 931   { PREFIX_TABLE (PREFIX_90) },
 932   { "xchgS",            { RMeCX, eAX } },
 933   { "xchgS",            { RMeDX, eAX } },
 934   { "xchgS",            { RMeBX, eAX } },
 935   { "xchgS",            { RMeSP, eAX } },
 936   { "xchgS",            { RMeBP, eAX } },
 937   { "xchgS",            { RMeSI, eAX } },
 938   { "xchgS",            { RMeDI, eAX } },
 939   /* 98 */
 940   { "cW{t|}R",          { XX } },
 941   { "cR{t|}O",          { XX } },
 942   { X86_64_TABLE (X86_64_9A) },
 943   { "(bad)",            { XX } },       /* fwait */
 944   { "pushfT",           { XX } },
 945   { "popfT",            { XX } },
 946   { "sahf",             { XX } },
 947   { "lahf",             { XX } },
 948   /* a0 */
 949   { "movB",             { AL, Ob } },
 950   { "movS",             { eAX, Ov } },
 951   { "movB",             { Ob, AL } },
 952   { "movS",             { Ov, eAX } },
 953   { "movs{b|}",         { Ybr, Xb } },
 954   { "movs{R|}",         { Yvr, Xv } },
 955   { "cmps{b|}",         { Xb, Yb } },
 956   { "cmps{R|}",         { Xv, Yv } },
 957   /* a8 */
 958   { "testB",            { AL, Ib } },
 959   { "testS",            { eAX, Iv } },
 960   { "stosB",            { Ybr, AL } },
 961   { "stosS",            { Yvr, eAX } },
 962   { "lodsB",            { ALr, Xb } },
 963   { "lodsS",            { eAXr, Xv } },
 964   { "scasB",            { AL, Yb } },
 965   { "scasS",            { eAX, Yv } },
 966   /* b0 */
 967   { "movB",             { RMAL, Ib } },
 968   { "movB",             { RMCL, Ib } },
 969   { "movB",             { RMDL, Ib } },
 970   { "movB",             { RMBL, Ib } },
 971   { "movB",             { RMAH, Ib } },
 972   { "movB",             { RMCH, Ib } },
 973   { "movB",             { RMDH, Ib } },
 974   { "movB",             { RMBH, Ib } },
 975   /* b8 */
 976   { "movS",             { RMeAX, Iv64 } },
 977   { "movS",             { RMeCX, Iv64 } },
 978   { "movS",             { RMeDX, Iv64 } },
 979   { "movS",             { RMeBX, Iv64 } },
 980   { "movS",             { RMeSP, Iv64 } },
 981   { "movS",             { RMeBP, Iv64 } },
 982   { "movS",             { RMeSI, Iv64 } },
 983   { "movS",             { RMeDI, Iv64 } },
 984   /* c0 */
 985   { REG_TABLE (REG_C0) },
 986   { REG_TABLE (REG_C1) },
 987   { "retT",             { Iw } },
 988   { "retT",             { XX } },
 989   { X86_64_TABLE (X86_64_C4) },
 990   { X86_64_TABLE (X86_64_C5) },
 991   { REG_TABLE (REG_C6) },
 992   { REG_TABLE (REG_C7) },
 993   /* c8 */
 994   { "enterT",           { Iw, Ib } },
 995   { "leaveT",           { XX } },
 996   { "lretP",            { Iw } },
 997   { "lretP",            { XX } },
 998   { "int3",             { XX } },
 999   { "int",              { Ib } },
1000   { X86_64_TABLE (X86_64_CE) },
1001   { "iretP",            { XX } },
1002   /* d0 */
1003   { REG_TABLE (REG_D0) },
1004   { REG_TABLE (REG_D1) },
1005   { REG_TABLE (REG_D2) },
1006   { REG_TABLE (REG_D3) },
1007   { X86_64_TABLE (X86_64_D4) },
1008   { X86_64_TABLE (X86_64_D5) },
1009   { "(bad)",            { XX } },
1010   { "xlat",             { DSBX } },
1011   /* d8 */
1012   { FLOAT },
1013   { FLOAT },
1014   { FLOAT },
1015   { FLOAT },
1016   { FLOAT },
1017   { FLOAT },
1018   { FLOAT },
1019   { FLOAT },
1020   /* e0 */
1021   { "loopneFH",         { Jb, XX, loop_jcxz_flag } },
1022   { "loopeFH",          { Jb, XX, loop_jcxz_flag } },
1023   { "loopFH",           { Jb, XX, loop_jcxz_flag } },
1024   { "jEcxzH",           { Jb, XX, loop_jcxz_flag } },
1025   { "inB",              { AL, Ib } },
1026   { "inG",              { zAX, Ib } },
1027   { "outB",             { Ib, AL } },
1028   { "outG",             { Ib, zAX } },
1029   /* e8 */
1030   { "callT",            { Jv } },
1031   { "jmpT",             { Jv } },
1032   { X86_64_TABLE (X86_64_EA) },
1033   { "jmp",              { Jb } },
1034   { "inB",              { AL, indirDX } },
1035   { "inG",              { zAX, indirDX } },
1036   { "outB",             { indirDX, AL } },
1037   { "outG",             { indirDX, zAX } },
1038   /* f0 */
1039   { "(bad)",            { XX } },       /* lock prefix */
1040   { "icebp",            { XX } },
1041   { "(bad)",            { XX } },       /* repne */
1042   { "(bad)",            { XX } },       /* repz */
1043   { "hlt",              { XX } },
1044   { "cmc",              { XX } },
1045   { REG_TABLE (REG_F6) },
1046   { REG_TABLE (REG_F7) },
1047   /* f8 */
1048   { "clc",              { XX } },
1049   { "stc",              { XX } },
1050   { "cli",              { XX } },
1051   { "sti",              { XX } },
1052   { "cld",              { XX } },
1053   { "std",              { XX } },
1054   { REG_TABLE (REG_FE) },
1055   { REG_TABLE (REG_FF) },
1056 };
1057
1058 static const struct dis386 dis386_twobyte[] = {
1059   /* 00 */
1060   { REG_TABLE (REG_0F00 ) },
1061   { REG_TABLE (REG_0F01 ) },
1062   { "larS",             { Gv, Ew } },
1063   { "lslS",             { Gv, Ew } },
1064   { "(bad)",            { XX } },
1065   { "syscall",          { XX } },
1066   { "clts",             { XX } },
1067   { "sysretP",          { XX } },
1068   /* 08 */
1069   { "invd",             { XX } },
1070   { "wbinvd",           { XX } },
1071   { "(bad)",            { XX } },
1072   { "ud2a",             { XX } },
1073   { "(bad)",            { XX } },
1074   { REG_TABLE (REG_0F0D) },
1075   { "femms",            { XX } },
1076   { "",                 { MX, EM, OPSUF } }, /* See OP_3DNowSuffix.  */
1077   /* 10 */
1078   { PREFIX_TABLE (PREFIX_0F10) },
1079   { PREFIX_TABLE (PREFIX_0F11) },
1080   { PREFIX_TABLE (PREFIX_0F12) },
1081   { MOD_TABLE (MOD_0F13) },
1082   { "unpcklpX",         { XM, EXx } },
1083   { "unpckhpX",         { XM, EXx } },
1084   { PREFIX_TABLE (PREFIX_0F16) },
1085   { MOD_TABLE (MOD_0F17) },
1086   /* 18 */
1087   { REG_TABLE (REG_0F18) },
1088   { "nopQ",             { Ev } },
1089   { "nopQ",             { Ev } },
1090   { "nopQ",             { Ev } },
1091   { "nopQ",             { Ev } },
1092   { "nopQ",             { Ev } },
1093   { "nopQ",             { Ev } },
1094   { "nopQ",             { Ev } },
1095   /* 20 */
1096   { MOD_TABLE (MOD_0F20) },
1097   { MOD_TABLE (MOD_0F21) },
1098   { MOD_TABLE (MOD_0F22) },
1099   { MOD_TABLE (MOD_0F23) },
1100   { MOD_TABLE (MOD_0F24) },
1101   { THREE_BYTE_TABLE (THREE_BYTE_0F25) },
1102   { MOD_TABLE (MOD_0F26) },
1103   { "(bad)",            { XX } },
1104   /* 28 */
1105   { "movapX",           { XM, EXx } },
1106   { "movapX",           { EXx, XM } },
1107   { PREFIX_TABLE (PREFIX_0F2A) },
1108   { PREFIX_TABLE (PREFIX_0F2B) },
1109   { PREFIX_TABLE (PREFIX_0F2C) },
1110   { PREFIX_TABLE (PREFIX_0F2D) },
1111   { PREFIX_TABLE (PREFIX_0F2E) },
1112   { PREFIX_TABLE (PREFIX_0F2F) },
1113   /* 30 */
1114   { "wrmsr",            { XX } },
1115   { "rdtsc",            { XX } },
1116   { "rdmsr",            { XX } },
1117   { "rdpmc",            { XX } },
1118   { "sysenter",         { XX } },
1119   { "sysexit",          { XX } },
1120   { "(bad)",            { XX } },
1121   { "getsec",           { XX } },
1122   /* 38 */
1123   { THREE_BYTE_TABLE (THREE_BYTE_0F38) },
1124   { "(bad)",            { XX } },
1125   { THREE_BYTE_TABLE (THREE_BYTE_0F3A) },
1126   { "(bad)",            { XX } },
1127   { "(bad)",            { XX } },
1128   { "(bad)",            { XX } },
1129   { "(bad)",            { XX } },
1130   { "(bad)",            { XX } },
1131   /* 40 */
1132   { "cmovo",            { Gv, Ev } },
1133   { "cmovno",           { Gv, Ev } },
1134   { "cmovb",            { Gv, Ev } },
1135   { "cmovae",           { Gv, Ev } },
1136   { "cmove",            { Gv, Ev } },
1137   { "cmovne",           { Gv, Ev } },
1138   { "cmovbe",           { Gv, Ev } },
1139   { "cmova",            { Gv, Ev } },
1140   /* 48 */
1141   { "cmovs",            { Gv, Ev } },
1142   { "cmovns",           { Gv, Ev } },
1143   { "cmovp",            { Gv, Ev } },
1144   { "cmovnp",           { Gv, Ev } },
1145   { "cmovl",            { Gv, Ev } },
1146   { "cmovge",           { Gv, Ev } },
1147   { "cmovle",           { Gv, Ev } },
1148   { "cmovg",            { Gv, Ev } },
1149   /* 50 */
1150   { MOD_TABLE (MOD_0F51) },
1151   { PREFIX_TABLE (PREFIX_0F51) },
1152   { PREFIX_TABLE (PREFIX_0F52) },
1153   { PREFIX_TABLE (PREFIX_0F53) },
1154   { "andpX",            { XM, EXx } },
1155   { "andnpX",           { XM, EXx } },
1156   { "orpX",             { XM, EXx } },
1157   { "xorpX",            { XM, EXx } },
1158   /* 58 */
1159   { PREFIX_TABLE (PREFIX_0F58) },
1160   { PREFIX_TABLE (PREFIX_0F59) },
1161   { PREFIX_TABLE (PREFIX_0F5A) },
1162   { PREFIX_TABLE (PREFIX_0F5B) },
1163   { PREFIX_TABLE (PREFIX_0F5C) },
1164   { PREFIX_TABLE (PREFIX_0F5D) },
1165   { PREFIX_TABLE (PREFIX_0F5E) },
1166   { PREFIX_TABLE (PREFIX_0F5F) },
1167   /* 60 */
1168   { PREFIX_TABLE (PREFIX_0F60) },
1169   { PREFIX_TABLE (PREFIX_0F61) },
1170   { PREFIX_TABLE (PREFIX_0F62) },
1171   { "packsswb",         { MX, EM } },
1172   { "pcmpgtb",          { MX, EM } },
1173   { "pcmpgtw",          { MX, EM } },
1174   { "pcmpgtd",          { MX, EM } },
1175   { "packuswb",         { MX, EM } },
1176   /* 68 */
1177   { "punpckhbw",        { MX, EM } },
1178   { "punpckhwd",        { MX, EM } },
1179   { "punpckhdq",        { MX, EM } },
1180   { "packssdw",         { MX, EM } },
1181   { PREFIX_TABLE (PREFIX_0F6C) },
1182   { PREFIX_TABLE (PREFIX_0F6D) },
1183   { "movK",             { MX, Edq } },
1184   { PREFIX_TABLE (PREFIX_0F6F) },
1185   /* 70 */
1186   { PREFIX_TABLE (PREFIX_0F70) },
1187   { REG_TABLE (REG_0F71) },
1188   { REG_TABLE (REG_0F72) },
1189   { REG_TABLE (REG_0F73) },
1190   { "pcmpeqb",          { MX, EM } },
1191   { "pcmpeqw",          { MX, EM } },
1192   { "pcmpeqd",          { MX, EM } },
1193   { "emms",             { XX } },
1194   /* 78 */
1195   { PREFIX_TABLE (PREFIX_0F78) },
1196   { PREFIX_TABLE (PREFIX_0F79) },
1197   { THREE_BYTE_TABLE (THREE_BYTE_0F7A) },
1198   { THREE_BYTE_TABLE (THREE_BYTE_0F7B) },
1199   { PREFIX_TABLE (PREFIX_0F7C) },
1200   { PREFIX_TABLE (PREFIX_0F7D) },
1201   { PREFIX_TABLE (PREFIX_0F7E) },
1202   { PREFIX_TABLE (PREFIX_0F7F) },
1203   /* 80 */
1204   { "joH",              { Jv, XX, cond_jump_flag } },
1205   { "jnoH",             { Jv, XX, cond_jump_flag } },
1206   { "jbH",              { Jv, XX, cond_jump_flag } },
1207   { "jaeH",             { Jv, XX, cond_jump_flag } },
1208   { "jeH",              { Jv, XX, cond_jump_flag } },
1209   { "jneH",             { Jv, XX, cond_jump_flag } },
1210   { "jbeH",             { Jv, XX, cond_jump_flag } },
1211   { "jaH",              { Jv, XX, cond_jump_flag } },
1212   /* 88 */
1213   { "jsH",              { Jv, XX, cond_jump_flag } },
1214   { "jnsH",             { Jv, XX, cond_jump_flag } },
1215   { "jpH",              { Jv, XX, cond_jump_flag } },
1216   { "jnpH",             { Jv, XX, cond_jump_flag } },
1217   { "jlH",              { Jv, XX, cond_jump_flag } },
1218   { "jgeH",             { Jv, XX, cond_jump_flag } },
1219   { "jleH",             { Jv, XX, cond_jump_flag } },
1220   { "jgH",              { Jv, XX, cond_jump_flag } },
1221   /* 90 */
1222   { "seto",             { Eb } },
1223   { "setno",            { Eb } },
1224   { "setb",             { Eb } },
1225   { "setae",            { Eb } },
1226   { "sete",             { Eb } },
1227   { "setne",            { Eb } },
1228   { "setbe",            { Eb } },
1229   { "seta",             { Eb } },
1230   /* 98 */
1231   { "sets",             { Eb } },
1232   { "setns",            { Eb } },
1233   { "setp",             { Eb } },
1234   { "setnp",            { Eb } },
1235   { "setl",             { Eb } },
1236   { "setge",            { Eb } },
1237   { "setle",            { Eb } },
1238   { "setg",             { Eb } },
1239   /* a0 */
1240   { "pushT",            { fs } },
1241   { "popT",             { fs } },
1242   { "cpuid",            { XX } },
1243   { "btS",              { Ev, Gv } },
1244   { "shldS",            { Ev, Gv, Ib } },
1245   { "shldS",            { Ev, Gv, CL } },
1246   { REG_TABLE (REG_0FA6) },
1247   { REG_TABLE (REG_0FA7) },
1248   /* a8 */
1249   { "pushT",            { gs } },
1250   { "popT",             { gs } },
1251   { "rsm",              { XX } },
1252   { "btsS",             { Ev, Gv } },
1253   { "shrdS",            { Ev, Gv, Ib } },
1254   { "shrdS",            { Ev, Gv, CL } },
1255   { REG_TABLE (REG_0FAE) },
1256   { "imulS",            { Gv, Ev } },
1257   /* b0 */
1258   { "cmpxchgB",         { Eb, Gb } },
1259   { "cmpxchgS",         { Ev, Gv } },
1260   { MOD_TABLE (MOD_0FB2) },
1261   { "btrS",             { Ev, Gv } },
1262   { MOD_TABLE (MOD_0FB4) },
1263   { MOD_TABLE (MOD_0FB5) },
1264   { "movz{bR|x}",       { Gv, Eb } },
1265   { "movz{wR|x}",       { Gv, Ew } }, /* yes, there really is movzww ! */
1266   /* b8 */
1267   { PREFIX_TABLE (PREFIX_0FB8) },
1268   { "ud2b",             { XX } },
1269   { REG_TABLE (REG_0FBA) },
1270   { "btcS",             { Ev, Gv } },
1271   { "bsfS",             { Gv, Ev } },
1272   { PREFIX_TABLE (PREFIX_0FBD) },
1273   { "movs{bR|x}",       { Gv, Eb } },
1274   { "movs{wR|x}",       { Gv, Ew } }, /* yes, there really is movsww ! */
1275   /* c0 */
1276   { "xaddB",            { Eb, Gb } },
1277   { "xaddS",            { Ev, Gv } },
1278   { PREFIX_TABLE (PREFIX_0FC2) },
1279   { PREFIX_TABLE (PREFIX_0FC3) },
1280   { "pinsrw",           { MX, Edqw, Ib } },
1281   { "pextrw",           { Gdq, MS, Ib } },
1282   { "shufpX",           { XM, EXx, Ib } },
1283   { REG_TABLE (REG_0FC7) },
1284   /* c8 */
1285   { "bswap",            { RMeAX } },
1286   { "bswap",            { RMeCX } },
1287   { "bswap",            { RMeDX } },
1288   { "bswap",            { RMeBX } },
1289   { "bswap",            { RMeSP } },
1290   { "bswap",            { RMeBP } },
1291   { "bswap",            { RMeSI } },
1292   { "bswap",            { RMeDI } },
1293   /* d0 */
1294   { PREFIX_TABLE (PREFIX_0FD0) },
1295   { "psrlw",            { MX, EM } },
1296   { "psrld",            { MX, EM } },
1297   { "psrlq",            { MX, EM } },
1298   { "paddq",            { MX, EM } },
1299   { "pmullw",           { MX, EM } },
1300   { PREFIX_TABLE (PREFIX_0FD6) },
1301   { MOD_TABLE (MOD_0FD7) },
1302   /* d8 */
1303   { "psubusb",          { MX, EM } },
1304   { "psubusw",          { MX, EM } },
1305   { "pminub",           { MX, EM } },
1306   { "pand",             { MX, EM } },
1307   { "paddusb",          { MX, EM } },
1308   { "paddusw",          { MX, EM } },
1309   { "pmaxub",           { MX, EM } },
1310   { "pandn",            { MX, EM } },
1311   /* e0 */
1312   { "pavgb",            { MX, EM } },
1313   { "psraw",            { MX, EM } },
1314   { "psrad",            { MX, EM } },
1315   { "pavgw",            { MX, EM } },
1316   { "pmulhuw",          { MX, EM } },
1317   { "pmulhw",           { MX, EM } },
1318   { PREFIX_TABLE (PREFIX_0FE6) },
1319   { PREFIX_TABLE (PREFIX_0FE7) },
1320   /* e8 */
1321   { "psubsb",           { MX, EM } },
1322   { "psubsw",           { MX, EM } },
1323   { "pminsw",           { MX, EM } },
1324   { "por",              { MX, EM } },
1325   { "paddsb",           { MX, EM } },
1326   { "paddsw",           { MX, EM } },
1327   { "pmaxsw",           { MX, EM } },
1328   { "pxor",             { MX, EM } },
1329   /* f0 */
1330   { PREFIX_TABLE (PREFIX_0FF0) },
1331   { "psllw",            { MX, EM } },
1332   { "pslld",            { MX, EM } },
1333   { "psllq",            { MX, EM } },
1334   { "pmuludq",          { MX, EM } },
1335   { "pmaddwd",          { MX, EM } },
1336   { "psadbw",           { MX, EM } },
1337   { PREFIX_TABLE (PREFIX_0FF7) },
1338   /* f8 */
1339   { "psubb",            { MX, EM } },
1340   { "psubw",            { MX, EM } },
1341   { "psubd",            { MX, EM } },
1342   { "psubq",            { MX, EM } },
1343   { "paddb",            { MX, EM } },
1344   { "paddw",            { MX, EM } },
1345   { "paddd",            { MX, EM } },
1346   { "(bad)",            { XX } },
1347 };
1348
1349 static const unsigned char onebyte_has_modrm[256] = {
1350   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1351   /*       -------------------------------        */
1352   /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1353   /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1354   /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1355   /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1356   /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1357   /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1358   /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1359   /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1360   /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1361   /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1362   /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1363   /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1364   /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1365   /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1366   /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1367   /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1  /* f0 */
1368   /*       -------------------------------        */
1369   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1370 };
1371
1372 static const unsigned char twobyte_has_modrm[256] = {
1373   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1374   /*       -------------------------------        */
1375   /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1376   /* 10 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 1f */
1377   /* 20 */ 1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1, /* 2f */
1378   /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1379   /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1380   /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1381   /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1382   /* 70 */ 1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1, /* 7f */
1383   /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1384   /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1385   /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1386   /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1387   /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1388   /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1389   /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1390   /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0  /* ff */
1391   /*       -------------------------------        */
1392   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1393 };
1394
1395 static char obuf[100];
1396 static char *obufp;
1397 static char scratchbuf[100];
1398 static unsigned char *start_codep;
1399 static unsigned char *insn_codep;
1400 static unsigned char *codep;
1401 static const char *lock_prefix;
1402 static const char *data_prefix;
1403 static const char *addr_prefix;
1404 static const char *repz_prefix;
1405 static const char *repnz_prefix;
1406 static disassemble_info *the_info;
1407 static struct
1408   {
1409     int mod;
1410     int reg;
1411     int rm;
1412   }
1413 modrm;
1414 static unsigned char need_modrm;
1415
1416 /* If we are accessing mod/rm/reg without need_modrm set, then the
1417    values are stale.  Hitting this abort likely indicates that you
1418    need to update onebyte_has_modrm or twobyte_has_modrm.  */
1419 #define MODRM_CHECK  if (!need_modrm) abort ()
1420
1421 static const char **names64;
1422 static const char **names32;
1423 static const char **names16;
1424 static const char **names8;
1425 static const char **names8rex;
1426 static const char **names_seg;
1427 static const char *index64;
1428 static const char *index32;
1429 static const char **index16;
1430
1431 static const char *intel_names64[] = {
1432   "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1433   "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1434 };
1435 static const char *intel_names32[] = {
1436   "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1437   "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1438 };
1439 static const char *intel_names16[] = {
1440   "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1441   "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1442 };
1443 static const char *intel_names8[] = {
1444   "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1445 };
1446 static const char *intel_names8rex[] = {
1447   "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1448   "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1449 };
1450 static const char *intel_names_seg[] = {
1451   "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1452 };
1453 static const char *intel_index64 = "riz";
1454 static const char *intel_index32 = "eiz";
1455 static const char *intel_index16[] = {
1456   "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1457 };
1458
1459 static const char *att_names64[] = {
1460   "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1461   "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1462 };
1463 static const char *att_names32[] = {
1464   "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1465   "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1466 };
1467 static const char *att_names16[] = {
1468   "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1469   "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1470 };
1471 static const char *att_names8[] = {
1472   "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1473 };
1474 static const char *att_names8rex[] = {
1475   "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1476   "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1477 };
1478 static const char *att_names_seg[] = {
1479   "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1480 };
1481 static const char *att_index64 = "%riz";
1482 static const char *att_index32 = "%eiz";
1483 static const char *att_index16[] = {
1484   "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1485 };
1486
1487 static const struct dis386 reg_table[][8] = {
1488   /* REG_80 */
1489   {
1490     { "addA",   { Eb, Ib } },
1491     { "orA",    { Eb, Ib } },
1492     { "adcA",   { Eb, Ib } },
1493     { "sbbA",   { Eb, Ib } },
1494     { "andA",   { Eb, Ib } },
1495     { "subA",   { Eb, Ib } },
1496     { "xorA",   { Eb, Ib } },
1497     { "cmpA",   { Eb, Ib } },
1498   },
1499   /* REG_81 */
1500   {
1501     { "addQ",   { Ev, Iv } },
1502     { "orQ",    { Ev, Iv } },
1503     { "adcQ",   { Ev, Iv } },
1504     { "sbbQ",   { Ev, Iv } },
1505     { "andQ",   { Ev, Iv } },
1506     { "subQ",   { Ev, Iv } },
1507     { "xorQ",   { Ev, Iv } },
1508     { "cmpQ",   { Ev, Iv } },
1509   },
1510   /* REG_82 */
1511   {
1512     { "addQ",   { Ev, sIb } },
1513     { "orQ",    { Ev, sIb } },
1514     { "adcQ",   { Ev, sIb } },
1515     { "sbbQ",   { Ev, sIb } },
1516     { "andQ",   { Ev, sIb } },
1517     { "subQ",   { Ev, sIb } },
1518     { "xorQ",   { Ev, sIb } },
1519     { "cmpQ",   { Ev, sIb } },
1520   },
1521   /* REG_8F */
1522   {
1523     { "popU",   { stackEv } },
1524     { "(bad)",  { XX } },
1525     { "(bad)",  { XX } },
1526     { "(bad)",  { XX } },
1527     { "(bad)",  { XX } },
1528     { "(bad)",  { XX } },
1529     { "(bad)",  { XX } },
1530     { "(bad)",  { XX } },
1531   },
1532   /* REG_C0 */
1533   {
1534     { "rolA",   { Eb, Ib } },
1535     { "rorA",   { Eb, Ib } },
1536     { "rclA",   { Eb, Ib } },
1537     { "rcrA",   { Eb, Ib } },
1538     { "shlA",   { Eb, Ib } },
1539     { "shrA",   { Eb, Ib } },
1540     { "(bad)",  { XX } },
1541     { "sarA",   { Eb, Ib } },
1542   },
1543   /* REG_C1 */
1544   {
1545     { "rolQ",   { Ev, Ib } },
1546     { "rorQ",   { Ev, Ib } },
1547     { "rclQ",   { Ev, Ib } },
1548     { "rcrQ",   { Ev, Ib } },
1549     { "shlQ",   { Ev, Ib } },
1550     { "shrQ",   { Ev, Ib } },
1551     { "(bad)",  { XX } },
1552     { "sarQ",   { Ev, Ib } },
1553   },
1554   /* REG_C6 */
1555   {
1556     { "movA",   { Eb, Ib } },
1557     { "(bad)",  { XX } },
1558     { "(bad)",  { XX } },
1559     { "(bad)",  { XX } },
1560     { "(bad)",  { XX } },
1561     { "(bad)",  { XX } },
1562     { "(bad)",  { XX } },
1563     { "(bad)",  { XX } },
1564   },
1565   /* REG_C7 */
1566   {
1567     { "movQ",   { Ev, Iv } },
1568     { "(bad)",  { XX } },
1569     { "(bad)",  { XX } },
1570     { "(bad)",  { XX } },
1571     { "(bad)",  { XX } },
1572     { "(bad)",  { XX } },
1573     { "(bad)",  { XX } },
1574     { "(bad)",  { XX } },
1575   },
1576   /* REG_D0 */
1577   {
1578     { "rolA",   { Eb, I1 } },
1579     { "rorA",   { Eb, I1 } },
1580     { "rclA",   { Eb, I1 } },
1581     { "rcrA",   { Eb, I1 } },
1582     { "shlA",   { Eb, I1 } },
1583     { "shrA",   { Eb, I1 } },
1584     { "(bad)",  { XX } },
1585     { "sarA",   { Eb, I1 } },
1586   },
1587   /* REG_D1 */
1588   {
1589     { "rolQ",   { Ev, I1 } },
1590     { "rorQ",   { Ev, I1 } },
1591     { "rclQ",   { Ev, I1 } },
1592     { "rcrQ",   { Ev, I1 } },
1593     { "shlQ",   { Ev, I1 } },
1594     { "shrQ",   { Ev, I1 } },
1595     { "(bad)",  { XX } },
1596     { "sarQ",   { Ev, I1 } },
1597   },
1598   /* REG_D2 */
1599   {
1600     { "rolA",   { Eb, CL } },
1601     { "rorA",   { Eb, CL } },
1602     { "rclA",   { Eb, CL } },
1603     { "rcrA",   { Eb, CL } },
1604     { "shlA",   { Eb, CL } },
1605     { "shrA",   { Eb, CL } },
1606     { "(bad)",  { XX } },
1607     { "sarA",   { Eb, CL } },
1608   },
1609   /* REG_D3 */
1610   {
1611     { "rolQ",   { Ev, CL } },
1612     { "rorQ",   { Ev, CL } },
1613     { "rclQ",   { Ev, CL } },
1614     { "rcrQ",   { Ev, CL } },
1615     { "shlQ",   { Ev, CL } },
1616     { "shrQ",   { Ev, CL } },
1617     { "(bad)",  { XX } },
1618     { "sarQ",   { Ev, CL } },
1619   },
1620   /* REG_F6 */
1621   {
1622     { "testA",  { Eb, Ib } },
1623     { "(bad)",  { XX } },
1624     { "notA",   { Eb } },
1625     { "negA",   { Eb } },
1626     { "mulA",   { Eb } },       /* Don't print the implicit %al register,  */
1627     { "imulA",  { Eb } },       /* to distinguish these opcodes from other */
1628     { "divA",   { Eb } },       /* mul/imul opcodes.  Do the same for div  */
1629     { "idivA",  { Eb } },       /* and idiv for consistency.               */
1630   },
1631   /* REG_F7 */
1632   {
1633     { "testQ",  { Ev, Iv } },
1634     { "(bad)",  { XX } },
1635     { "notQ",   { Ev } },
1636     { "negQ",   { Ev } },
1637     { "mulQ",   { Ev } },       /* Don't print the implicit register.  */
1638     { "imulQ",  { Ev } },
1639     { "divQ",   { Ev } },
1640     { "idivQ",  { Ev } },
1641   },
1642   /* REG_FE */
1643   {
1644     { "incA",   { Eb } },
1645     { "decA",   { Eb } },
1646     { "(bad)",  { XX } },
1647     { "(bad)",  { XX } },
1648     { "(bad)",  { XX } },
1649     { "(bad)",  { XX } },
1650     { "(bad)",  { XX } },
1651     { "(bad)",  { XX } },
1652   },
1653   /* REG_FF */
1654   {
1655     { "incQ",   { Ev } },
1656     { "decQ",   { Ev } },
1657     { "callT",  { indirEv } },
1658     { "JcallT", { indirEp } },
1659     { "jmpT",   { indirEv } },
1660     { "JjmpT",  { indirEp } },
1661     { "pushU",  { stackEv } },
1662     { "(bad)",  { XX } },
1663   },
1664   /* REG_0F00 */
1665   {
1666     { "sldtD",  { Sv } },
1667     { "strD",   { Sv } },
1668     { "lldt",   { Ew } },
1669     { "ltr",    { Ew } },
1670     { "verr",   { Ew } },
1671     { "verw",   { Ew } },
1672     { "(bad)",  { XX } },
1673     { "(bad)",  { XX } },
1674   },
1675   /* REG_0F01 */
1676   {
1677     { MOD_TABLE (MOD_0F01_REG_0) },
1678     { MOD_TABLE (MOD_0F01_REG_1) },
1679     { MOD_TABLE (MOD_0F01_REG_2) },
1680     { MOD_TABLE (MOD_0F01_REG_3) },
1681     { "smswD",  { Sv } },
1682     { "(bad)",  { XX } },
1683     { "lmsw",   { Ew } },
1684     { MOD_TABLE (MOD_0F01_REG_7) },
1685   },
1686   /* REG_0F0D */
1687   {
1688     { "prefetch",       { Eb } },
1689     { "prefetchw",      { Eb } },
1690     { "(bad)",          { XX } },
1691     { "(bad)",          { XX } },
1692     { "(bad)",          { XX } },
1693     { "(bad)",          { XX } },
1694     { "(bad)",          { XX } },
1695     { "(bad)",          { XX } },
1696   },
1697   /* REG_0F18 */
1698   {
1699     { MOD_TABLE (MOD_0F18_REG_0) },
1700     { MOD_TABLE (MOD_0F18_REG_1) },
1701     { MOD_TABLE (MOD_0F18_REG_2) },
1702     { MOD_TABLE (MOD_0F18_REG_3) },
1703     { "(bad)",  { XX } },
1704     { "(bad)",  { XX } },
1705     { "(bad)",  { XX } },
1706     { "(bad)",  { XX } },
1707   },
1708   /* REG_0F71 */
1709   {
1710     { "(bad)",  { XX } },
1711     { "(bad)",  { XX } },
1712     { MOD_TABLE (MOD_0F71_REG_2) },
1713     { "(bad)",  { XX } },
1714     { MOD_TABLE (MOD_0F71_REG_4) },
1715     { "(bad)",  { XX } },
1716     { MOD_TABLE (MOD_0F71_REG_6) },
1717     { "(bad)",  { XX } },
1718   },
1719   /* REG_0F72 */
1720   {
1721     { "(bad)",  { XX } },
1722     { "(bad)",  { XX } },
1723     { MOD_TABLE (MOD_0F72_REG_2) },
1724     { "(bad)",  { XX } },
1725     { MOD_TABLE (MOD_0F72_REG_4) },
1726     { "(bad)",  { XX } },
1727     { MOD_TABLE (MOD_0F72_REG_6) },
1728     { "(bad)",  { XX } },
1729   },
1730   /* REG_0F73 */
1731   {
1732     { "(bad)",  { XX } },
1733     { "(bad)",  { XX } },
1734     { MOD_TABLE (MOD_0F73_REG_2) },
1735     { MOD_TABLE (MOD_0F73_REG_3) },
1736     { "(bad)",  { XX } },
1737     { "(bad)",  { XX } },
1738     { MOD_TABLE (MOD_0F73_REG_6) },
1739     { MOD_TABLE (MOD_0F73_REG_7) },
1740   },
1741   /* REG_0FA6 */
1742   {
1743     { "montmul",        { { OP_0f07, 0 } } },
1744     { "xsha1",          { { OP_0f07, 0 } } },
1745     { "xsha256",        { { OP_0f07, 0 } } },
1746     { "(bad)",          { { OP_0f07, 0 } } },
1747     { "(bad)",          { { OP_0f07, 0 } } },
1748     { "(bad)",          { { OP_0f07, 0 } } },
1749     { "(bad)",          { { OP_0f07, 0 } } },
1750     { "(bad)",          { { OP_0f07, 0 } } },
1751   },
1752   /* REG_0FA7 */
1753   {
1754     { "xstore-rng",     { { OP_0f07, 0 } } },
1755     { "xcrypt-ecb",     { { OP_0f07, 0 } } },
1756     { "xcrypt-cbc",     { { OP_0f07, 0 } } },
1757     { "xcrypt-ctr",     { { OP_0f07, 0 } } },
1758     { "xcrypt-cfb",     { { OP_0f07, 0 } } },
1759     { "xcrypt-ofb",     { { OP_0f07, 0 } } },
1760     { "(bad)",          { { OP_0f07, 0 } } },
1761     { "(bad)",          { { OP_0f07, 0 } } },
1762   },
1763   /* REG_0FAE */
1764   {
1765     { MOD_TABLE (MOD_0FAE_REG_0) },
1766     { MOD_TABLE (MOD_0FAE_REG_1) },
1767     { MOD_TABLE (MOD_0FAE_REG_2) },
1768     { MOD_TABLE (MOD_0FAE_REG_3) },
1769     { MOD_TABLE (MOD_0FAE_REG_4) },
1770     { MOD_TABLE (MOD_0FAE_REG_5) },
1771     { MOD_TABLE (MOD_0FAE_REG_6) },
1772     { MOD_TABLE (MOD_0FAE_REG_7) },
1773   },
1774   /* REG_0FBA */
1775   {
1776     { "(bad)",  { XX } },
1777     { "(bad)",  { XX } },
1778     { "(bad)",  { XX } },
1779     { "(bad)",  { XX } },
1780     { "btQ",    { Ev, Ib } },
1781     { "btsQ",   { Ev, Ib } },
1782     { "btrQ",   { Ev, Ib } },
1783     { "btcQ",   { Ev, Ib } },
1784   },
1785   /* REG_0FC7 */
1786   {
1787     { "(bad)",  { XX } },
1788     { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1789     { "(bad)",  { XX } },
1790     { "(bad)",  { XX } },
1791     { "(bad)",  { XX } },
1792     { "(bad)",  { XX } },
1793     { MOD_TABLE (MOD_0FC7_REG_6) },
1794     { MOD_TABLE (MOD_0FC7_REG_7) },
1795   },
1796 };
1797
1798 static const struct dis386 prefix_table[][4] = {
1799   /* PREFIX_90 */
1800   {
1801     { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
1802     { "pause", { XX } },
1803     { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
1804     { "(bad)", { XX } },
1805   },
1806
1807   /* PREFIX_0F10 */
1808   {
1809     { "movups", { XM, EXx } },
1810     { "movss",  { XM, EXd } },
1811     { "movupd", { XM, EXx } },
1812     { "movsd",  { XM, EXq } },
1813   },
1814
1815   /* PREFIX_0F11 */
1816   {
1817     { "movups", { EXx, XM } },
1818     { "movss",  { EXd, XM } },
1819     { "movupd", { EXx, XM } },
1820     { "movsd",  { EXq, XM } },
1821   },
1822
1823   /* PREFIX_0F12 */
1824   {
1825     { MOD_TABLE (MOD_0F12_PREFIX_0) },
1826     { "movsldup", { XM, EXx } },
1827     { "movlpd", { XM, EXq } },
1828     { "movddup", { XM, EXq } },
1829   },
1830
1831   /* PREFIX_0F16 */
1832   {
1833     { MOD_TABLE (MOD_0F16_PREFIX_0) },
1834     { "movshdup", { XM, EXx } },
1835     { "movhpd", { XM, EXq } },
1836     { "(bad)",  { XX } },
1837   },
1838
1839   /* PREFIX_0F2A */
1840   {
1841     { "cvtpi2ps", { XM, EMCq } },
1842     { "cvtsi2ss%LQ", { XM, Ev } },
1843     { "cvtpi2pd", { XM, EMCq } },
1844     { "cvtsi2sd%LQ", { XM, Ev } },
1845   },
1846
1847   /* PREFIX_0F2B */
1848   {
1849     { MOD_TABLE (MOD_0F2B_PREFIX_0) },
1850     { MOD_TABLE (MOD_0F2B_PREFIX_1) },
1851     { MOD_TABLE (MOD_0F2B_PREFIX_2) },
1852     { MOD_TABLE (MOD_0F2B_PREFIX_3) },
1853   },
1854
1855   /* PREFIX_0F2C */
1856   {
1857     { "cvttps2pi", { MXC, EXq } },
1858     { "cvttss2siY", { Gv, EXd } },
1859     { "cvttpd2pi", { MXC, EXx } },
1860     { "cvttsd2siY", { Gv, EXq } },
1861   },
1862
1863   /* PREFIX_0F2D */
1864   {
1865     { "cvtps2pi", { MXC, EXq } },
1866     { "cvtss2siY", { Gv, EXd } },
1867     { "cvtpd2pi", { MXC, EXx } },
1868     { "cvtsd2siY", { Gv, EXq } },
1869   },
1870
1871   /* PREFIX_0F2E */
1872   {
1873     { "ucomiss",{ XM, EXd } },
1874     { "(bad)",  { XX } },
1875     { "ucomisd",{ XM, EXq } },
1876     { "(bad)",  { XX } },
1877   },
1878
1879   /* PREFIX_0F2F */
1880   {
1881     { "comiss", { XM, EXd } },
1882     { "(bad)",  { XX } },
1883     { "comisd", { XM, EXq } },
1884     { "(bad)",  { XX } },
1885   },
1886
1887   /* PREFIX_0F51 */
1888   {
1889     { "sqrtps", { XM, EXx } },
1890     { "sqrtss", { XM, EXd } },
1891     { "sqrtpd", { XM, EXx } },
1892     { "sqrtsd", { XM, EXq } },
1893   },
1894
1895   /* PREFIX_0F52 */
1896   {
1897     { "rsqrtps",{ XM, EXx } },
1898     { "rsqrtss",{ XM, EXd } },
1899     { "(bad)",  { XX } },
1900     { "(bad)",  { XX } },
1901   },
1902
1903   /* PREFIX_0F53 */
1904   {
1905     { "rcpps",  { XM, EXx } },
1906     { "rcpss",  { XM, EXd } },
1907     { "(bad)",  { XX } },
1908     { "(bad)",  { XX } },
1909   },
1910
1911   /* PREFIX_0F58 */
1912   {
1913     { "addps", { XM, EXx } },
1914     { "addss", { XM, EXd } },
1915     { "addpd", { XM, EXx } },
1916     { "addsd", { XM, EXq } },
1917   },
1918
1919   /* PREFIX_0F59 */
1920   {
1921     { "mulps",  { XM, EXx } },
1922     { "mulss",  { XM, EXd } },
1923     { "mulpd",  { XM, EXx } },
1924     { "mulsd",  { XM, EXq } },
1925   },
1926
1927   /* PREFIX_0F5A */
1928   {
1929     { "cvtps2pd", { XM, EXq } },
1930     { "cvtss2sd", { XM, EXd } },
1931     { "cvtpd2ps", { XM, EXx } },
1932     { "cvtsd2ss", { XM, EXq } },
1933   },
1934
1935   /* PREFIX_0F5B */
1936   {
1937     { "cvtdq2ps", { XM, EXx } },
1938     { "cvttps2dq", { XM, EXx } },
1939     { "cvtps2dq", { XM, EXx } },
1940     { "(bad)",  { XX } },
1941   },
1942
1943   /* PREFIX_0F5C */
1944   {
1945     { "subps",  { XM, EXx } },
1946     { "subss",  { XM, EXd } },
1947     { "subpd",  { XM, EXx } },
1948     { "subsd",  { XM, EXq } },
1949   },
1950
1951   /* PREFIX_0F5D */
1952   {
1953     { "minps",  { XM, EXx } },
1954     { "minss",  { XM, EXd } },
1955     { "minpd",  { XM, EXx } },
1956     { "minsd",  { XM, EXq } },
1957   },
1958
1959   /* PREFIX_0F5E */
1960   {
1961     { "divps",  { XM, EXx } },
1962     { "divss",  { XM, EXd } },
1963     { "divpd",  { XM, EXx } },
1964     { "divsd",  { XM, EXq } },
1965   },
1966
1967   /* PREFIX_0F5F */
1968   {
1969     { "maxps",  { XM, EXx } },
1970     { "maxss",  { XM, EXd } },
1971     { "maxpd",  { XM, EXx } },
1972     { "maxsd",  { XM, EXq } },
1973   },
1974
1975   /* PREFIX_0F60 */
1976   {
1977     { "punpcklbw",{ MX, EMd } },
1978     { "(bad)",  { XX } },
1979     { "punpcklbw",{ MX, EMx } },
1980     { "(bad)",  { XX } },
1981   },
1982
1983   /* PREFIX_0F61 */
1984   {
1985     { "punpcklwd",{ MX, EMd } },
1986     { "(bad)",  { XX } },
1987     { "punpcklwd",{ MX, EMx } },
1988     { "(bad)",  { XX } },
1989   },
1990
1991   /* PREFIX_0F62 */
1992   {
1993     { "punpckldq",{ MX, EMd } },
1994     { "(bad)",  { XX } },
1995     { "punpckldq",{ MX, EMx } },
1996     { "(bad)",  { XX } },
1997   },
1998
1999   /* PREFIX_0F6C */
2000   {
2001     { "(bad)",  { XX } },
2002     { "(bad)",  { XX } },
2003     { "punpcklqdq", { XM, EXx } },
2004     { "(bad)",  { XX } },
2005   },
2006
2007   /* PREFIX_0F6D */
2008   {
2009     { "(bad)",  { XX } },
2010     { "(bad)",  { XX } },
2011     { "punpckhqdq", { XM, EXx } },
2012     { "(bad)",  { XX } },
2013   },
2014
2015   /* PREFIX_0F6F */
2016   {
2017     { "movq",   { MX, EM } },
2018     { "movdqu", { XM, EXx } },
2019     { "movdqa", { XM, EXx } },
2020     { "(bad)",  { XX } },
2021   },
2022
2023   /* PREFIX_0F70 */
2024   {
2025     { "pshufw", { MX, EM, Ib } },
2026     { "pshufhw",{ XM, EXx, Ib } },
2027     { "pshufd", { XM, EXx, Ib } },
2028     { "pshuflw",{ XM, EXx, Ib } },
2029   },
2030
2031   /* PREFIX_0F73_REG_3 */
2032   {
2033     { "(bad)",  { XX } },
2034     { "(bad)",  { XX } },
2035     { "psrldq", { XS, Ib } },
2036     { "(bad)",  { XX } },
2037   },
2038
2039   /* PREFIX_0F73_REG_7 */
2040   {
2041     { "(bad)",  { XX } },
2042     { "(bad)",  { XX } },
2043     { "pslldq", { XS, Ib } },
2044     { "(bad)",  { XX } },
2045   },
2046
2047   /* PREFIX_0F78 */
2048   {
2049     {"vmread",  { Em, Gm } },
2050     {"(bad)",   { XX } },
2051     {"extrq",   { XS, Ib, Ib } },
2052     {"insertq", { XM, XS, Ib, Ib } },
2053   },
2054
2055   /* PREFIX_0F79 */
2056   {
2057     {"vmwrite", { Gm, Em } },
2058     {"(bad)",   { XX } },
2059     {"extrq",   { XM, XS } },
2060     {"insertq", { XM, XS } },
2061   },
2062
2063   /* PREFIX_0F7C */
2064   {
2065     { "(bad)",  { XX } },
2066     { "(bad)",  { XX } },
2067     { "haddpd", { XM, EXx } },
2068     { "haddps", { XM, EXx } },
2069   },
2070
2071   /* PREFIX_0F7D */
2072   {
2073     { "(bad)",  { XX } },
2074     { "(bad)",  { XX } },
2075     { "hsubpd", { XM, EXx } },
2076     { "hsubps", { XM, EXx } },
2077   },
2078
2079   /* PREFIX_0F7E */
2080   {
2081     { "movK",   { Edq, MX } },
2082     { "movq",   { XM, EXq } },
2083     { "movK",   { Edq, XM } },
2084     { "(bad)",  { XX } },
2085   },
2086
2087   /* PREFIX_0F7F */
2088   {
2089     { "movq",   { EM, MX } },
2090     { "movdqu", { EXx, XM } },
2091     { "movdqa", { EXx, XM } },
2092     { "(bad)",  { XX } },
2093   },
2094
2095   /* PREFIX_0FB8 */
2096   {
2097     { "(bad)", { XX } },
2098     { "popcntS", { Gv, Ev } },
2099     { "(bad)", { XX } },
2100     { "(bad)", { XX } },
2101   },
2102
2103   /* PREFIX_0FBD */
2104   {
2105     { "bsrS",   { Gv, Ev } },
2106     { "lzcntS", { Gv, Ev } },
2107     { "bsrS",   { Gv, Ev } },
2108     { "(bad)",  { XX } },
2109   },
2110
2111   /* PREFIX_0FC2 */
2112   {
2113     { "cmpps",  { XM, EXx, CMP } },
2114     { "cmpss",  { XM, EXd, CMP } },
2115     { "cmppd",  { XM, EXx, CMP } },
2116     { "cmpsd",  { XM, EXq, CMP } },
2117   },
2118
2119   /* PREFIX_0FC3 */
2120   {
2121     { "movntiS", { Ma, Gv } },
2122     { "(bad)",  { XX } },
2123     { "(bad)",  { XX } },
2124     { "(bad)",  { XX } },
2125   },
2126
2127   /* PREFIX_0FC7_REG_6 */
2128   {
2129     { "vmptrld",{ Mq } },
2130     { "vmxon",  { Mq } },
2131     { "vmclear",{ Mq } },
2132     { "(bad)",  { XX } },
2133   },
2134
2135   /* PREFIX_0FD0 */
2136   {
2137     { "(bad)",  { XX } },
2138     { "(bad)",  { XX } },
2139     { "addsubpd", { XM, EXx } },
2140     { "addsubps", { XM, EXx } },
2141   },
2142
2143   /* PREFIX_0FD6 */
2144   {
2145     { "(bad)",  { XX } },
2146     { "movq2dq",{ XM, MS } },
2147     { "movq",   { EXq, XM } },
2148     { "movdq2q",{ MX, XS } },
2149   },
2150
2151   /* PREFIX_0FE6 */
2152   {
2153     { "(bad)",  { XX } },
2154     { "cvtdq2pd", { XM, EXq } },
2155     { "cvttpd2dq", { XM, EXx } },
2156     { "cvtpd2dq", { XM, EXx } },
2157   },
2158
2159   /* PREFIX_0FE7 */
2160   {
2161     { "movntq", { Mq, MX } },
2162     { "(bad)",  { XX } },
2163     { MOD_TABLE (MOD_0FE7_PREFIX_2) },
2164     { "(bad)",  { XX } },
2165   },
2166
2167   /* PREFIX_0FF0 */
2168   {
2169     { "(bad)",  { XX } },
2170     { "(bad)",  { XX } },
2171     { "(bad)",  { XX } },
2172     { MOD_TABLE (MOD_0FF0_PREFIX_3) },
2173   },
2174
2175   /* PREFIX_0FF7 */
2176   {
2177     { "maskmovq", { MX, MS } },
2178     { "(bad)",  { XX } },
2179     { "maskmovdqu", { XM, XS } },
2180     { "(bad)",  { XX } },
2181   },
2182
2183   /* PREFIX_0F3810 */
2184   {
2185     { "(bad)",  { XX } },
2186     { "(bad)",  { XX } },
2187     { "pblendvb", { XM, EXx, XMM0 } },
2188     { "(bad)",  { XX } },
2189   },
2190
2191   /* PREFIX_0F3814 */
2192   {
2193     { "(bad)",  { XX } },
2194     { "(bad)",  { XX } },
2195     { "blendvps", { XM, EXx, XMM0 } },
2196     { "(bad)",  { XX } },
2197   },
2198
2199   /* PREFIX_0F3815 */
2200   {
2201     { "(bad)",  { XX } },
2202     { "(bad)",  { XX } },
2203     { "blendvpd", { XM, EXx, XMM0 } },
2204     { "(bad)",  { XX } },
2205   },
2206
2207   /* PREFIX_0F3817 */
2208   {
2209     { "(bad)",  { XX } },
2210     { "(bad)",  { XX } },
2211     { "ptest",  { XM, EXx } },
2212     { "(bad)",  { XX } },
2213   },
2214
2215   /* PREFIX_0F3820 */
2216   {
2217     { "(bad)",  { XX } },
2218     { "(bad)",  { XX } },
2219     { "pmovsxbw", { XM, EXq } },
2220     { "(bad)",  { XX } },
2221   },
2222
2223   /* PREFIX_0F3821 */
2224   {
2225     { "(bad)",  { XX } },
2226     { "(bad)",  { XX } },
2227     { "pmovsxbd", { XM, EXd } },
2228     { "(bad)",  { XX } },
2229   },
2230
2231   /* PREFIX_0F3822 */
2232   {
2233     { "(bad)",  { XX } },
2234     { "(bad)",  { XX } },
2235     { "pmovsxbq", { XM, EXw } },
2236     { "(bad)",  { XX } },
2237   },
2238
2239   /* PREFIX_0F3823 */
2240   {
2241     { "(bad)",  { XX } },
2242     { "(bad)",  { XX } },
2243     { "pmovsxwd", { XM, EXq } },
2244     { "(bad)",  { XX } },
2245   },
2246
2247   /* PREFIX_0F3824 */
2248   {
2249     { "(bad)",  { XX } },
2250     { "(bad)",  { XX } },
2251     { "pmovsxwq", { XM, EXd } },
2252     { "(bad)",  { XX } },
2253   },
2254
2255   /* PREFIX_0F3825 */
2256   {
2257     { "(bad)",  { XX } },
2258     { "(bad)",  { XX } },
2259     { "pmovsxdq", { XM, EXq } },
2260     { "(bad)",  { XX } },
2261   },
2262
2263   /* PREFIX_0F3828 */
2264   {
2265     { "(bad)",  { XX } },
2266     { "(bad)",  { XX } },
2267     { "pmuldq", { XM, EXx } },
2268     { "(bad)",  { XX } },
2269   },
2270
2271   /* PREFIX_0F3829 */
2272   {
2273     { "(bad)",  { XX } },
2274     { "(bad)",  { XX } },
2275     { "pcmpeqq", { XM, EXx } },
2276     { "(bad)",  { XX } },
2277   },
2278
2279   /* PREFIX_0F382A */
2280   {
2281     { "(bad)",  { XX } },
2282     { "(bad)",  { XX } },
2283     { MOD_TABLE (MOD_0F382A_PREFIX_2) },
2284     { "(bad)",  { XX } },
2285   },
2286
2287   /* PREFIX_0F382B */
2288   {
2289     { "(bad)",  { XX } },
2290     { "(bad)",  { XX } },
2291     { "packusdw", { XM, EXx } },
2292     { "(bad)",  { XX } },
2293   },
2294
2295   /* PREFIX_0F3830 */
2296   {
2297     { "(bad)",  { XX } },
2298     { "(bad)",  { XX } },
2299     { "pmovzxbw", { XM, EXq } },
2300     { "(bad)",  { XX } },
2301   },
2302
2303   /* PREFIX_0F3831 */
2304   {
2305     { "(bad)",  { XX } },
2306     { "(bad)",  { XX } },
2307     { "pmovzxbd", { XM, EXd } },
2308     { "(bad)",  { XX } },
2309   },
2310
2311   /* PREFIX_0F3832 */
2312   {
2313     { "(bad)",  { XX } },
2314     { "(bad)",  { XX } },
2315     { "pmovzxbq", { XM, EXw } },
2316     { "(bad)",  { XX } },
2317   },
2318
2319   /* PREFIX_0F3833 */
2320   {
2321     { "(bad)",  { XX } },
2322     { "(bad)",  { XX } },
2323     { "pmovzxwd", { XM, EXq } },
2324     { "(bad)",  { XX } },
2325   },
2326
2327   /* PREFIX_0F3834 */
2328   {
2329     { "(bad)",  { XX } },
2330     { "(bad)",  { XX } },
2331     { "pmovzxwq", { XM, EXd } },
2332     { "(bad)",  { XX } },
2333   },
2334
2335   /* PREFIX_0F3835 */
2336   {
2337     { "(bad)",  { XX } },
2338     { "(bad)",  { XX } },
2339     { "pmovzxdq", { XM, EXq } },
2340     { "(bad)",  { XX } },
2341   },
2342
2343   /* PREFIX_0F3837 */
2344   {
2345     { "(bad)",  { XX } },
2346     { "(bad)",  { XX } },
2347     { "pcmpgtq", { XM, EXx } },
2348     { "(bad)",  { XX } },
2349   },
2350
2351   /* PREFIX_0F3838 */
2352   {
2353     { "(bad)",  { XX } },
2354     { "(bad)",  { XX } },
2355     { "pminsb", { XM, EXx } },
2356     { "(bad)",  { XX } },
2357   },
2358
2359   /* PREFIX_0F3839 */
2360   {
2361     { "(bad)",  { XX } },
2362     { "(bad)",  { XX } },
2363     { "pminsd", { XM, EXx } },
2364     { "(bad)",  { XX } },
2365   },
2366
2367   /* PREFIX_0F383A */
2368   {
2369     { "(bad)",  { XX } },
2370     { "(bad)",  { XX } },
2371     { "pminuw", { XM, EXx } },
2372     { "(bad)",  { XX } },
2373   },
2374
2375   /* PREFIX_0F383B */
2376   {
2377     { "(bad)",  { XX } },
2378     { "(bad)",  { XX } },
2379     { "pminud", { XM, EXx } },
2380     { "(bad)",  { XX } },
2381   },
2382
2383   /* PREFIX_0F383C */
2384   {
2385     { "(bad)",  { XX } },
2386     { "(bad)",  { XX } },
2387     { "pmaxsb", { XM, EXx } },
2388     { "(bad)",  { XX } },
2389   },
2390
2391   /* PREFIX_0F383D */
2392   {
2393     { "(bad)",  { XX } },
2394     { "(bad)",  { XX } },
2395     { "pmaxsd", { XM, EXx } },
2396     { "(bad)",  { XX } },
2397   },
2398
2399   /* PREFIX_0F383E */
2400   {
2401     { "(bad)",  { XX } },
2402     { "(bad)",  { XX } },
2403     { "pmaxuw", { XM, EXx } },
2404     { "(bad)",  { XX } },
2405   },
2406
2407   /* PREFIX_0F383F */
2408   {
2409     { "(bad)",  { XX } },
2410     { "(bad)",  { XX } },
2411     { "pmaxud", { XM, EXx } },
2412     { "(bad)",  { XX } },
2413   },
2414
2415   /* PREFIX_0F3840 */
2416   {
2417     { "(bad)",  { XX } },
2418     { "(bad)",  { XX } },
2419     { "pmulld", { XM, EXx } },
2420     { "(bad)",  { XX } },
2421   },
2422
2423   /* PREFIX_0F3841 */
2424   {
2425     { "(bad)",  { XX } },
2426     { "(bad)",  { XX } },
2427     { "phminposuw", { XM, EXx } },
2428     { "(bad)",  { XX } },
2429   },
2430
2431   /* PREFIX_0F38F0 */
2432   {
2433     { "(bad)",  { XX } },
2434     { "(bad)",  { XX } },
2435     { "(bad)",  { XX } },
2436     { "crc32",  { Gdq, { CRC32_Fixup, b_mode } } },
2437   },
2438
2439   /* PREFIX_0F38F1 */
2440   {
2441     { "(bad)",  { XX } },
2442     { "(bad)",  { XX } },
2443     { "(bad)",  { XX } },
2444     { "crc32",  { Gdq, { CRC32_Fixup, v_mode } } },
2445   },
2446
2447   /* PREFIX_0F3A08 */
2448   {
2449     { "(bad)",  { XX } },
2450     { "(bad)",  { XX } },
2451     { "roundps", { XM, EXx, Ib } },
2452     { "(bad)",  { XX } },
2453   },
2454
2455   /* PREFIX_0F3A09 */
2456   {
2457     { "(bad)",  { XX } },
2458     { "(bad)",  { XX } },
2459     { "roundpd", { XM, EXx, Ib } },
2460     { "(bad)",  { XX } },
2461   },
2462
2463   /* PREFIX_0F3A0A */
2464   {
2465     { "(bad)",  { XX } },
2466     { "(bad)",  { XX } },
2467     { "roundss", { XM, EXd, Ib } },
2468     { "(bad)",  { XX } },
2469   },
2470
2471   /* PREFIX_0F3A0B */
2472   {
2473     { "(bad)",  { XX } },
2474     { "(bad)",  { XX } },
2475     { "roundsd", { XM, EXq, Ib } },
2476     { "(bad)",  { XX } },
2477   },
2478
2479   /* PREFIX_0F3A0C */
2480   {
2481     { "(bad)",  { XX } },
2482     { "(bad)",  { XX } },
2483     { "blendps", { XM, EXx, Ib } },
2484     { "(bad)",  { XX } },
2485   },
2486
2487   /* PREFIX_0F3A0D */
2488   {
2489     { "(bad)",  { XX } },
2490     { "(bad)",  { XX } },
2491     { "blendpd", { XM, EXx, Ib } },
2492     { "(bad)",  { XX } },
2493   },
2494
2495   /* PREFIX_0F3A0E */
2496   {
2497     { "(bad)",  { XX } },
2498     { "(bad)",  { XX } },
2499     { "pblendw", { XM, EXx, Ib } },
2500     { "(bad)",  { XX } },
2501   },
2502
2503   /* PREFIX_0F3A14 */
2504   {
2505     { "(bad)",  { XX } },
2506     { "(bad)",  { XX } },
2507     { "pextrb", { Edqb, XM, Ib } },
2508     { "(bad)",  { XX } },
2509   },
2510
2511   /* PREFIX_0F3A15 */
2512   {
2513     { "(bad)",  { XX } },
2514     { "(bad)",  { XX } },
2515     { "pextrw", { Edqw, XM, Ib } },
2516     { "(bad)",  { XX } },
2517   },
2518
2519   /* PREFIX_0F3A16 */
2520   {
2521     { "(bad)",  { XX } },
2522     { "(bad)",  { XX } },
2523     { "pextrK", { Edq, XM, Ib } },
2524     { "(bad)",  { XX } },
2525   },
2526
2527   /* PREFIX_0F3A17 */
2528   {
2529     { "(bad)",  { XX } },
2530     { "(bad)",  { XX } },
2531     { "extractps", { Edqd, XM, Ib } },
2532     { "(bad)",  { XX } },
2533   },
2534
2535   /* PREFIX_0F3A20 */
2536   {
2537     { "(bad)",  { XX } },
2538     { "(bad)",  { XX } },
2539     { "pinsrb", { XM, Edqb, Ib } },
2540     { "(bad)",  { XX } },
2541   },
2542
2543   /* PREFIX_0F3A21 */
2544   {
2545     { "(bad)",  { XX } },
2546     { "(bad)",  { XX } },
2547     { "insertps", { XM, EXd, Ib } },
2548     { "(bad)",  { XX } },
2549   },
2550
2551   /* PREFIX_0F3A22 */
2552   {
2553     { "(bad)",  { XX } },
2554     { "(bad)",  { XX } },
2555     { "pinsrK", { XM, Edq, Ib } },
2556     { "(bad)",  { XX } },
2557   },
2558
2559   /* PREFIX_0F3A40 */
2560   {
2561     { "(bad)",  { XX } },
2562     { "(bad)",  { XX } },
2563     { "dpps",   { XM, EXx, Ib } },
2564     { "(bad)",  { XX } },
2565   },
2566
2567   /* PREFIX_0F3A41 */
2568   {
2569     { "(bad)",  { XX } },
2570     { "(bad)",  { XX } },
2571     { "dppd",   { XM, EXx, Ib } },
2572     { "(bad)",  { XX } },
2573   },
2574
2575   /* PREFIX_0F3A42 */
2576   {
2577     { "(bad)",  { XX } },
2578     { "(bad)",  { XX } },
2579     { "mpsadbw", { XM, EXx, Ib } },
2580     { "(bad)",  { XX } },
2581   },
2582
2583   /* PREFIX_0F3A60 */
2584   {
2585     { "(bad)",  { XX } },
2586     { "(bad)",  { XX } },
2587     { "pcmpestrm", { XM, EXx, Ib } },
2588     { "(bad)",  { XX } },
2589   },
2590
2591   /* PREFIX_0F3A61 */
2592   {
2593     { "(bad)",  { XX } },
2594     { "(bad)",  { XX } },
2595     { "pcmpestri", { XM, EXx, Ib } },
2596     { "(bad)",  { XX } },
2597   },
2598
2599   /* PREFIX_0F3A62 */
2600   {
2601     { "(bad)",  { XX } },
2602     { "(bad)",  { XX } },
2603     { "pcmpistrm", { XM, EXx, Ib } },
2604     { "(bad)",  { XX } },
2605   },
2606
2607   /* PREFIX_0F3A63 */
2608   {
2609     { "(bad)",  { XX } },
2610     { "(bad)",  { XX } },
2611     { "pcmpistri", { XM, EXx, Ib } },
2612     { "(bad)",  { XX } },
2613   },
2614 };
2615
2616 static const struct dis386 x86_64_table[][2] = {
2617   /* X86_64_06 */
2618   {
2619     { "push{T|}", { es } },
2620     { "(bad)", { XX } },
2621   },
2622
2623   /* X86_64_07 */
2624   {
2625     { "pop{T|}", { es } },
2626     { "(bad)", { XX } },
2627   },
2628
2629   /* X86_64_0D */
2630   {
2631     { "push{T|}", { cs } },
2632     { "(bad)", { XX } },
2633   },
2634
2635   /* X86_64_16 */
2636   {
2637     { "push{T|}", { ss } },
2638     { "(bad)", { XX } },
2639   },
2640
2641   /* X86_64_17 */
2642   {
2643     { "pop{T|}", { ss } },
2644     { "(bad)", { XX } },
2645   },
2646
2647   /* X86_64_1E */
2648   {
2649     { "push{T|}", { ds } },
2650     { "(bad)", { XX } },
2651   },
2652
2653   /* X86_64_1F */
2654   {
2655     { "pop{T|}", { ds } },
2656     { "(bad)", { XX } },
2657   },
2658
2659   /* X86_64_27 */
2660   {
2661     { "daa", { XX } },
2662     { "(bad)", { XX } },
2663   },
2664
2665   /* X86_64_2F */
2666   {
2667     { "das", { XX } },
2668     { "(bad)", { XX } },
2669   },
2670
2671   /* X86_64_37 */
2672   {
2673     { "aaa", { XX } },
2674     { "(bad)", { XX } },
2675   },
2676
2677   /* X86_64_3F */
2678   {
2679     { "aas", { XX } },
2680     { "(bad)", { XX } },
2681   },
2682
2683   /* X86_64_60 */
2684   {
2685     { "pusha{P|}", { XX } },
2686     { "(bad)", { XX } },
2687   },
2688
2689   /* X86_64_61 */
2690   {
2691     { "popa{P|}", { XX } },
2692     { "(bad)", { XX } },
2693   },
2694
2695   /* X86_64_62 */
2696   {
2697     { MOD_TABLE (MOD_62_32BIT) },
2698     { "(bad)", { XX } },
2699   },
2700
2701   /* X86_64_63 */
2702   {
2703     { "arpl", { Ew, Gw } },
2704     { "movs{lq|xd}", { Gv, Ed } },
2705   },
2706
2707   /* X86_64_6D */
2708   {
2709     { "ins{R|}", { Yzr, indirDX } },
2710     { "ins{G|}", { Yzr, indirDX } },
2711   },
2712
2713   /* X86_64_6F */
2714   {
2715     { "outs{R|}", { indirDXr, Xz } },
2716     { "outs{G|}", { indirDXr, Xz } },
2717   },
2718
2719   /* X86_64_9A */
2720   {
2721     { "Jcall{T|}", { Ap } },
2722     { "(bad)", { XX } },
2723   },
2724
2725   /* X86_64_C4 */
2726   {
2727     { MOD_TABLE (MOD_C4_32BIT) },
2728     { "(bad)", { XX } },
2729   },
2730
2731   /* X86_64_C5 */
2732   {
2733     { MOD_TABLE (MOD_C5_32BIT) },
2734     { "(bad)", { XX } },
2735   },
2736
2737   /* X86_64_CE */
2738   {
2739     { "into", { XX } },
2740     { "(bad)", { XX } },
2741   },
2742
2743   /* X86_64_D4 */
2744   {
2745     { "aam", { sIb } },
2746     { "(bad)", { XX } },
2747   },
2748
2749   /* X86_64_D5 */
2750   {
2751     { "aad", { sIb } },
2752     { "(bad)", { XX } },
2753   },
2754
2755   /* X86_64_EA */
2756   {
2757     { "Jjmp{T|}", { Ap } },
2758     { "(bad)", { XX } },
2759   },
2760
2761   /* X86_64_0F01_REG_0 */
2762   {
2763     { "sgdt{Q|IQ}", { M } },
2764     { "sgdt", { M } },
2765   },
2766
2767   /* X86_64_0F01_REG_1 */
2768   {
2769     { "sidt{Q|IQ}", { M } },
2770     { "sidt", { M } },
2771   },
2772
2773   /* X86_64_0F01_REG_2 */
2774   {
2775     { "lgdt{Q|Q}", { M } },
2776     { "lgdt", { M } },
2777   },
2778
2779   /* X86_64_0F01_REG_3 */
2780   {
2781     { "lidt{Q|Q}", { M } },
2782     { "lidt", { M } },
2783   },
2784 };
2785
2786 static const struct dis386 three_byte_table[][256] = {
2787   /* THREE_BYTE_0F24 */
2788   {
2789     /* 00 */
2790     { "fmaddps",        { { OP_DREX4, q_mode } } },
2791     { "fmaddpd",        { { OP_DREX4, q_mode } } },
2792     { "fmaddss",        { { OP_DREX4, w_mode } } },
2793     { "fmaddsd",        { { OP_DREX4, d_mode } } },
2794     { "fmaddps",        { { OP_DREX4, DREX_OC1 + q_mode } } },
2795     { "fmaddpd",        { { OP_DREX4, DREX_OC1 + q_mode } } },
2796     { "fmaddss",        { { OP_DREX4, DREX_OC1 + w_mode } } },
2797     { "fmaddsd",        { { OP_DREX4, DREX_OC1 + d_mode } } },
2798     /* 08 */
2799     { "fmsubps",        { { OP_DREX4, q_mode } } },
2800     { "fmsubpd",        { { OP_DREX4, q_mode } } },
2801     { "fmsubss",        { { OP_DREX4, w_mode } } },
2802     { "fmsubsd",        { { OP_DREX4, d_mode } } },
2803     { "fmsubps",        { { OP_DREX4, DREX_OC1 + q_mode } } },
2804     { "fmsubpd",        { { OP_DREX4, DREX_OC1 + q_mode } } },
2805     { "fmsubss",        { { OP_DREX4, DREX_OC1 + w_mode } } },
2806     { "fmsubsd",        { { OP_DREX4, DREX_OC1 + d_mode } } },
2807     /* 10 */
2808     { "fnmaddps",       { { OP_DREX4, q_mode } } },
2809     { "fnmaddpd",       { { OP_DREX4, q_mode } } },
2810     { "fnmaddss",       { { OP_DREX4, w_mode } } },
2811     { "fnmaddsd",       { { OP_DREX4, d_mode } } },
2812     { "fnmaddps",       { { OP_DREX4, DREX_OC1 + q_mode } } },
2813     { "fnmaddpd",       { { OP_DREX4, DREX_OC1 + q_mode } } },
2814     { "fnmaddss",       { { OP_DREX4, DREX_OC1 + w_mode } } },
2815     { "fnmaddsd",       { { OP_DREX4, DREX_OC1 + d_mode } } },
2816     /* 18 */
2817     { "fnmsubps",       { { OP_DREX4, q_mode } } },
2818     { "fnmsubpd",       { { OP_DREX4, q_mode } } },
2819     { "fnmsubss",       { { OP_DREX4, w_mode } } },
2820     { "fnmsubsd",       { { OP_DREX4, d_mode } } },
2821     { "fnmsubps",       { { OP_DREX4, DREX_OC1 + q_mode } } },
2822     { "fnmsubpd",       { { OP_DREX4, DREX_OC1 + q_mode } } },
2823     { "fnmsubss",       { { OP_DREX4, DREX_OC1 + w_mode } } },
2824     { "fnmsubsd",       { { OP_DREX4, DREX_OC1 + d_mode } } },
2825     /* 20 */
2826     { "permps",         { { OP_DREX4, q_mode } } },
2827     { "permpd",         { { OP_DREX4, q_mode } } },
2828     { "pcmov",          { { OP_DREX4, q_mode } } },
2829     { "pperm",          { { OP_DREX4, q_mode } } },
2830     { "permps",         { { OP_DREX4, DREX_OC1 + q_mode } } },
2831     { "permpd",         { { OP_DREX4, DREX_OC1 + q_mode } } },
2832     { "pcmov",          { { OP_DREX4, DREX_OC1 + w_mode } } },
2833     { "pperm",          { { OP_DREX4, DREX_OC1 + d_mode } } },
2834     /* 28 */
2835     { "(bad)",          { XX } },
2836     { "(bad)",          { XX } },
2837     { "(bad)",          { XX } },
2838     { "(bad)",          { XX } },
2839     { "(bad)",          { XX } },
2840     { "(bad)",          { XX } },
2841     { "(bad)",          { XX } },
2842     { "(bad)",          { XX } },
2843     /* 30 */
2844     { "(bad)",          { XX } },
2845     { "(bad)",          { XX } },
2846     { "(bad)",          { XX } },
2847     { "(bad)",          { XX } },
2848     { "(bad)",          { XX } },
2849     { "(bad)",          { XX } },
2850     { "(bad)",          { XX } },
2851     { "(bad)",          { XX } },
2852     /* 38 */
2853     { "(bad)",          { XX } },
2854     { "(bad)",          { XX } },
2855     { "(bad)",          { XX } },
2856     { "(bad)",          { XX } },
2857     { "(bad)",          { XX } },
2858     { "(bad)",          { XX } },
2859     { "(bad)",          { XX } },
2860     { "(bad)",          { XX } },
2861     /* 40 */
2862     { "protb",          { { OP_DREX3, q_mode } } },
2863     { "protw",          { { OP_DREX3, q_mode } } },
2864     { "protd",          { { OP_DREX3, q_mode } } },
2865     { "protq",          { { OP_DREX3, q_mode } } },
2866     { "pshlb",          { { OP_DREX3, q_mode } } },
2867     { "pshlw",          { { OP_DREX3, q_mode } } },
2868     { "pshld",          { { OP_DREX3, q_mode } } },
2869     { "pshlq",          { { OP_DREX3, q_mode } } },
2870     /* 48 */
2871     { "pshab",          { { OP_DREX3, q_mode } } },
2872     { "pshaw",          { { OP_DREX3, q_mode } } },
2873     { "pshad",          { { OP_DREX3, q_mode } } },
2874     { "pshaq",          { { OP_DREX3, q_mode } } },
2875     { "(bad)",          { XX } },
2876     { "(bad)",          { XX } },
2877     { "(bad)",          { XX } },
2878     { "(bad)",          { XX } },
2879     /* 50 */
2880     { "(bad)",          { XX } },
2881     { "(bad)",          { XX } },
2882     { "(bad)",          { XX } },
2883     { "(bad)",          { XX } },
2884     { "(bad)",          { XX } },
2885     { "(bad)",          { XX } },
2886     { "(bad)",          { XX } },
2887     { "(bad)",          { XX } },
2888     /* 58 */
2889     { "(bad)",          { XX } },
2890     { "(bad)",          { XX } },
2891     { "(bad)",          { XX } },
2892     { "(bad)",          { XX } },
2893     { "(bad)",          { XX } },
2894     { "(bad)",          { XX } },
2895     { "(bad)",          { XX } },
2896     { "(bad)",          { XX } },
2897     /* 60 */
2898     { "(bad)",          { XX } },
2899     { "(bad)",          { XX } },
2900     { "(bad)",          { XX } },
2901     { "(bad)",          { XX } },
2902     { "(bad)",          { XX } },
2903     { "(bad)",          { XX } },
2904     { "(bad)",          { XX } },
2905     { "(bad)",          { XX } },
2906     /* 68 */
2907     { "(bad)",          { XX } },
2908     { "(bad)",          { XX } },
2909     { "(bad)",          { XX } },
2910     { "(bad)",          { XX } },
2911     { "(bad)",          { XX } },
2912     { "(bad)",          { XX } },
2913     { "(bad)",          { XX } },
2914     { "(bad)",          { XX } },
2915     /* 70 */
2916     { "(bad)",          { XX } },
2917     { "(bad)",          { XX } },
2918     { "(bad)",          { XX } },
2919     { "(bad)",          { XX } },
2920     { "(bad)",          { XX } },
2921     { "(bad)",          { XX } },
2922     { "(bad)",          { XX } },
2923     { "(bad)",          { XX } },
2924     /* 78 */
2925     { "(bad)",          { XX } },
2926     { "(bad)",          { XX } },
2927     { "(bad)",          { XX } },
2928     { "(bad)",          { XX } },
2929     { "(bad)",          { XX } },
2930     { "(bad)",          { XX } },
2931     { "(bad)",          { XX } },
2932     { "(bad)",          { XX } },
2933     /* 80 */
2934     { "(bad)",          { XX } },
2935     { "(bad)",          { XX } },
2936     { "(bad)",          { XX } },
2937     { "(bad)",          { XX } },
2938     { "(bad)",          { XX } },
2939     { "pmacssww",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2940     { "pmacsswd",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2941     { "pmacssdql",      { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2942     /* 88 */
2943     { "(bad)",          { XX } },
2944     { "(bad)",          { XX } },
2945     { "(bad)",          { XX } },
2946     { "(bad)",          { XX } },
2947     { "(bad)",          { XX } },
2948     { "(bad)",          { XX } },
2949     { "pmacssdd",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2950     { "pmacssdqh",      { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2951     /* 90 */
2952     { "(bad)",          { XX } },
2953     { "(bad)",          { XX } },
2954     { "(bad)",          { XX } },
2955     { "(bad)",          { XX } },
2956     { "(bad)",          { XX } },
2957     { "pmacsww",        { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2958     { "pmacswd",        { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2959     { "pmacsdql",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2960     /* 98 */
2961     { "(bad)",          { XX } },
2962     { "(bad)",          { XX } },
2963     { "(bad)",          { XX } },
2964     { "(bad)",          { XX } },
2965     { "(bad)",          { XX } },
2966     { "(bad)",          { XX } },
2967     { "pmacsdd",        { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2968     { "pmacsdqh",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2969     /* a0 */
2970     { "(bad)",          { XX } },
2971     { "(bad)",          { XX } },
2972     { "(bad)",          { XX } },
2973     { "(bad)",          { XX } },
2974     { "(bad)",          { XX } },
2975     { "(bad)",          { XX } },
2976     { "pmadcsswd",      { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2977     { "(bad)",          { XX } },
2978     /* a8 */
2979     { "(bad)",          { XX } },
2980     { "(bad)",          { XX } },
2981     { "(bad)",          { XX } },
2982     { "(bad)",          { XX } },
2983     { "(bad)",          { XX } },
2984     { "(bad)",          { XX } },
2985     { "(bad)",          { XX } },
2986     { "(bad)",          { XX } },
2987     /* b0 */
2988     { "(bad)",          { XX } },
2989     { "(bad)",          { XX } },
2990     { "(bad)",          { XX } },
2991     { "(bad)",          { XX } },
2992     { "(bad)",          { XX } },
2993     { "(bad)",          { XX } },
2994     { "pmadcswd",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2995     { "(bad)",          { XX } },
2996     /* b8 */
2997     { "(bad)",          { XX } },
2998     { "(bad)",          { XX } },
2999     { "(bad)",          { XX } },
3000     { "(bad)",          { XX } },
3001     { "(bad)",          { XX } },
3002     { "(bad)",          { XX } },
3003     { "(bad)",          { XX } },
3004     { "(bad)",          { XX } },
3005     /* c0 */
3006     { "(bad)",          { XX } },
3007     { "(bad)",          { XX } },
3008     { "(bad)",          { XX } },
3009     { "(bad)",          { XX } },
3010     { "(bad)",          { XX } },
3011     { "(bad)",          { XX } },
3012     { "(bad)",          { XX } },
3013     { "(bad)",          { XX } },
3014     /* c8 */
3015     { "(bad)",          { XX } },
3016     { "(bad)",          { XX } },
3017     { "(bad)",          { XX } },
3018     { "(bad)",          { XX } },
3019     { "(bad)",          { XX } },
3020     { "(bad)",          { XX } },
3021     { "(bad)",          { XX } },
3022     { "(bad)",          { XX } },
3023     /* d0 */
3024     { "(bad)",          { XX } },
3025     { "(bad)",          { XX } },
3026     { "(bad)",          { XX } },
3027     { "(bad)",          { XX } },
3028     { "(bad)",          { XX } },
3029     { "(bad)",          { XX } },
3030     { "(bad)",          { XX } },
3031     { "(bad)",          { XX } },
3032     /* d8 */
3033     { "(bad)",          { XX } },
3034     { "(bad)",          { XX } },
3035     { "(bad)",          { XX } },
3036     { "(bad)",          { XX } },
3037     { "(bad)",          { XX } },
3038     { "(bad)",          { XX } },
3039     { "(bad)",          { XX } },
3040     { "(bad)",          { XX } },
3041     /* e0 */
3042     { "(bad)",          { XX } },
3043     { "(bad)",          { XX } },
3044     { "(bad)",          { XX } },
3045     { "(bad)",          { XX } },
3046     { "(bad)",          { XX } },
3047     { "(bad)",          { XX } },
3048     { "(bad)",          { XX } },
3049     { "(bad)",          { XX } },
3050     /* e8 */
3051     { "(bad)",          { XX } },
3052     { "(bad)",          { XX } },
3053     { "(bad)",          { XX } },
3054     { "(bad)",          { XX } },
3055     { "(bad)",          { XX } },
3056     { "(bad)",          { XX } },
3057     { "(bad)",          { XX } },
3058     { "(bad)",          { XX } },
3059     /* f0 */
3060     { "(bad)",          { XX } },
3061     { "(bad)",          { XX } },
3062     { "(bad)",          { XX } },
3063     { "(bad)",          { XX } },
3064     { "(bad)",          { XX } },
3065     { "(bad)",          { XX } },
3066     { "(bad)",          { XX } },
3067     { "(bad)",          { XX } },
3068     /* f8 */
3069     { "(bad)",          { XX } },
3070     { "(bad)",          { XX } },
3071     { "(bad)",          { XX } },
3072     { "(bad)",          { XX } },
3073     { "(bad)",          { XX } },
3074     { "(bad)",          { XX } },
3075     { "(bad)",          { XX } },
3076     { "(bad)",          { XX } },
3077   },
3078   /* THREE_BYTE_0F25 */
3079   {
3080     /* 00 */
3081     { "(bad)",          { XX } },
3082     { "(bad)",          { XX } },
3083     { "(bad)",          { XX } },
3084     { "(bad)",          { XX } },
3085     { "(bad)",          { XX } },
3086     { "(bad)",          { XX } },
3087     { "(bad)",          { XX } },
3088     { "(bad)",          { XX } },
3089     /* 08 */
3090     { "(bad)",          { XX } },
3091     { "(bad)",          { XX } },
3092     { "(bad)",          { XX } },
3093     { "(bad)",          { XX } },
3094     { "(bad)",          { XX } },
3095     { "(bad)",          { XX } },
3096     { "(bad)",          { XX } },
3097     { "(bad)",          { XX } },
3098     /* 10 */
3099     { "(bad)",          { XX } },
3100     { "(bad)",          { XX } },
3101     { "(bad)",          { XX } },
3102     { "(bad)",          { XX } },
3103     { "(bad)",          { XX } },
3104     { "(bad)",          { XX } },
3105     { "(bad)",          { XX } },
3106     { "(bad)",          { XX } },
3107     /* 18 */
3108     { "(bad)",          { XX } },
3109     { "(bad)",          { XX } },
3110     { "(bad)",          { XX } },
3111     { "(bad)",          { XX } },
3112     { "(bad)",          { XX } },
3113     { "(bad)",          { XX } },
3114     { "(bad)",          { XX } },
3115     { "(bad)",          { XX } },
3116     /* 20 */
3117     { "(bad)",          { XX } },
3118     { "(bad)",          { XX } },
3119     { "(bad)",          { XX } },
3120     { "(bad)",          { XX } },
3121     { "(bad)",          { XX } },
3122     { "(bad)",          { XX } },
3123     { "(bad)",          { XX } },
3124     { "(bad)",          { XX } },
3125     /* 28 */
3126     { "(bad)",          { XX } },
3127     { "(bad)",          { XX } },
3128     { "(bad)",          { XX } },
3129     { "(bad)",          { XX } },
3130     { "comps",          { { OP_DREX3, q_mode }, { OP_DREX_FCMP, b_mode } } },
3131     { "compd",          { { OP_DREX3, q_mode }, { OP_DREX_FCMP, b_mode } } },
3132     { "comss",          { { OP_DREX3, w_mode }, { OP_DREX_FCMP, b_mode } } },
3133     { "comsd",          { { OP_DREX3, d_mode }, { OP_DREX_FCMP, b_mode } } },
3134     /* 30 */
3135     { "(bad)",          { XX } },
3136     { "(bad)",          { XX } },
3137     { "(bad)",          { XX } },
3138     { "(bad)",          { XX } },
3139     { "(bad)",          { XX } },
3140     { "(bad)",          { XX } },
3141     { "(bad)",          { XX } },
3142     { "(bad)",          { XX } },
3143     /* 38 */
3144     { "(bad)",          { XX } },
3145     { "(bad)",          { XX } },
3146     { "(bad)",          { XX } },
3147     { "(bad)",          { XX } },
3148     { "(bad)",          { XX } },
3149     { "(bad)",          { XX } },
3150     { "(bad)",          { XX } },
3151     { "(bad)",          { XX } },
3152     /* 40 */
3153     { "(bad)",          { XX } },
3154     { "(bad)",          { XX } },
3155     { "(bad)",          { XX } },
3156     { "(bad)",          { XX } },
3157     { "(bad)",          { XX } },
3158     { "(bad)",          { XX } },
3159     { "(bad)",          { XX } },
3160     { "(bad)",          { XX } },
3161     /* 48 */
3162     { "(bad)",          { XX } },
3163     { "(bad)",          { XX } },
3164     { "(bad)",          { XX } },
3165     { "(bad)",          { XX } },
3166     { "pcomb",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3167     { "pcomw",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3168     { "pcomd",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3169     { "pcomq",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3170     /* 50 */
3171     { "(bad)",          { XX } },
3172     { "(bad)",          { XX } },
3173     { "(bad)",          { XX } },
3174     { "(bad)",          { XX } },
3175     { "(bad)",          { XX } },
3176     { "(bad)",          { XX } },
3177     { "(bad)",          { XX } },
3178     { "(bad)",          { XX } },
3179     /* 58 */
3180     { "(bad)",          { XX } },
3181     { "(bad)",          { XX } },
3182     { "(bad)",          { XX } },
3183     { "(bad)",          { XX } },
3184     { "(bad)",          { XX } },
3185     { "(bad)",          { XX } },
3186     { "(bad)",          { XX } },
3187     { "(bad)",          { XX } },
3188     /* 60 */
3189     { "(bad)",          { XX } },
3190     { "(bad)",          { XX } },
3191     { "(bad)",          { XX } },
3192     { "(bad)",          { XX } },
3193     { "(bad)",          { XX } },
3194     { "(bad)",          { XX } },
3195     { "(bad)",          { XX } },
3196     { "(bad)",          { XX } },
3197     /* 68 */
3198     { "(bad)",          { XX } },
3199     { "(bad)",          { XX } },
3200     { "(bad)",          { XX } },
3201     { "(bad)",          { XX } },
3202     { "pcomub",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3203     { "pcomuw",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3204     { "pcomud",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3205     { "pcomuq",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3206     /* 70 */
3207     { "(bad)",          { XX } },
3208     { "(bad)",          { XX } },
3209     { "(bad)",          { XX } },
3210     { "(bad)",          { XX } },
3211     { "(bad)",          { XX } },
3212     { "(bad)",          { XX } },
3213     { "(bad)",          { XX } },
3214     { "(bad)",          { XX } },
3215     /* 78 */
3216     { "(bad)",          { XX } },
3217     { "(bad)",          { XX } },
3218     { "(bad)",          { XX } },
3219     { "(bad)",          { XX } },
3220     { "(bad)",          { XX } },
3221     { "(bad)",          { XX } },
3222     { "(bad)",          { XX } },
3223     { "(bad)",          { XX } },
3224     /* 80 */
3225     { "(bad)",          { XX } },
3226     { "(bad)",          { XX } },
3227     { "(bad)",          { XX } },
3228     { "(bad)",          { XX } },
3229     { "(bad)",          { XX } },
3230     { "(bad)",          { XX } },
3231     { "(bad)",          { XX } },
3232     { "(bad)",          { XX } },
3233     /* 88 */
3234     { "(bad)",          { XX } },
3235     { "(bad)",          { XX } },
3236     { "(bad)",          { XX } },
3237     { "(bad)",          { XX } },
3238     { "(bad)",          { XX } },
3239     { "(bad)",          { XX } },
3240     { "(bad)",          { XX } },
3241     { "(bad)",          { XX } },
3242     /* 90 */
3243     { "(bad)",          { XX } },
3244     { "(bad)",          { XX } },
3245     { "(bad)",          { XX } },
3246     { "(bad)",          { XX } },
3247     { "(bad)",          { XX } },
3248     { "(bad)",          { XX } },
3249     { "(bad)",          { XX } },
3250     { "(bad)",          { XX } },
3251     /* 98 */
3252     { "(bad)",          { XX } },
3253     { "(bad)",          { XX } },
3254     { "(bad)",          { XX } },
3255     { "(bad)",          { XX } },
3256     { "(bad)",          { XX } },
3257     { "(bad)",          { XX } },
3258     { "(bad)",          { XX } },
3259     { "(bad)",          { XX } },
3260     /* a0 */
3261     { "(bad)",          { XX } },
3262     { "(bad)",          { XX } },
3263     { "(bad)",          { XX } },
3264     { "(bad)",          { XX } },
3265     { "(bad)",          { XX } },
3266     { "(bad)",          { XX } },
3267     { "(bad)",          { XX } },
3268     { "(bad)",          { XX } },
3269     /* a8 */
3270     { "(bad)",          { XX } },
3271     { "(bad)",          { XX } },
3272     { "(bad)",          { XX } },
3273     { "(bad)",          { XX } },
3274     { "(bad)",          { XX } },
3275     { "(bad)",          { XX } },
3276     { "(bad)",          { XX } },
3277     { "(bad)",          { XX } },
3278     /* b0 */
3279     { "(bad)",          { XX } },
3280     { "(bad)",          { XX } },
3281     { "(bad)",          { XX } },
3282     { "(bad)",          { XX } },
3283     { "(bad)",          { XX } },
3284     { "(bad)",          { XX } },
3285     { "(bad)",          { XX } },
3286     { "(bad)",          { XX } },
3287     /* b8 */
3288     { "(bad)",          { XX } },
3289     { "(bad)",          { XX } },
3290     { "(bad)",          { XX } },
3291     { "(bad)",          { XX } },
3292     { "(bad)",          { XX } },
3293     { "(bad)",          { XX } },
3294     { "(bad)",          { XX } },
3295     { "(bad)",          { XX } },
3296     /* c0 */
3297     { "(bad)",          { XX } },
3298     { "(bad)",          { XX } },
3299     { "(bad)",          { XX } },
3300     { "(bad)",          { XX } },
3301     { "(bad)",          { XX } },
3302     { "(bad)",          { XX } },
3303     { "(bad)",          { XX } },
3304     { "(bad)",          { XX } },
3305     /* c8 */
3306     { "(bad)",          { XX } },
3307     { "(bad)",          { XX } },
3308     { "(bad)",          { XX } },
3309     { "(bad)",          { XX } },
3310     { "(bad)",          { XX } },
3311     { "(bad)",          { XX } },
3312     { "(bad)",          { XX } },
3313     { "(bad)",          { XX } },
3314     /* d0 */
3315     { "(bad)",          { XX } },
3316     { "(bad)",          { XX } },
3317     { "(bad)",          { XX } },
3318     { "(bad)",          { XX } },
3319     { "(bad)",          { XX } },
3320     { "(bad)",          { XX } },
3321     { "(bad)",          { XX } },
3322     { "(bad)",          { XX } },
3323     /* d8 */
3324     { "(bad)",          { XX } },
3325     { "(bad)",          { XX } },
3326     { "(bad)",          { XX } },
3327     { "(bad)",          { XX } },
3328     { "(bad)",          { XX } },
3329     { "(bad)",          { XX } },
3330     { "(bad)",          { XX } },
3331     { "(bad)",          { XX } },
3332     /* e0 */
3333     { "(bad)",          { XX } },
3334     { "(bad)",          { XX } },
3335     { "(bad)",          { XX } },
3336     { "(bad)",          { XX } },
3337     { "(bad)",          { XX } },
3338     { "(bad)",          { XX } },
3339     { "(bad)",          { XX } },
3340     { "(bad)",          { XX } },
3341     /* e8 */
3342     { "(bad)",          { XX } },
3343     { "(bad)",          { XX } },
3344     { "(bad)",          { XX } },
3345     { "(bad)",          { XX } },
3346     { "(bad)",          { XX } },
3347     { "(bad)",          { XX } },
3348     { "(bad)",          { XX } },
3349     { "(bad)",          { XX } },
3350     /* f0 */
3351     { "(bad)",          { XX } },
3352     { "(bad)",          { XX } },
3353     { "(bad)",          { XX } },
3354     { "(bad)",          { XX } },
3355     { "(bad)",          { XX } },
3356     { "(bad)",          { XX } },
3357     { "(bad)",          { XX } },
3358     { "(bad)",          { XX } },
3359     /* f8 */
3360     { "(bad)",          { XX } },
3361     { "(bad)",          { XX } },
3362     { "(bad)",          { XX } },
3363     { "(bad)",          { XX } },
3364     { "(bad)",          { XX } },
3365     { "(bad)",          { XX } },
3366     { "(bad)",          { XX } },
3367     { "(bad)",          { XX } },
3368   },
3369   /* THREE_BYTE_0F38 */
3370   {
3371     /* 00 */
3372     { "pshufb",         { MX, EM } },
3373     { "phaddw",         { MX, EM } },
3374     { "phaddd",         { MX, EM } },
3375     { "phaddsw",        { MX, EM } },
3376     { "pmaddubsw",      { MX, EM } },
3377     { "phsubw",         { MX, EM } },
3378     { "phsubd",         { MX, EM } },
3379     { "phsubsw",        { MX, EM } },
3380     /* 08 */
3381     { "psignb",         { MX, EM } },
3382     { "psignw",         { MX, EM } },
3383     { "psignd",         { MX, EM } },
3384     { "pmulhrsw",       { MX, EM } },
3385     { "(bad)",          { XX } },
3386     { "(bad)",          { XX } },
3387     { "(bad)",          { XX } },
3388     { "(bad)",          { XX } },
3389     /* 10 */
3390     { PREFIX_TABLE (PREFIX_0F3810) },
3391     { "(bad)",          { XX } },
3392     { "(bad)",          { XX } },
3393     { "(bad)",          { XX } },
3394     { PREFIX_TABLE (PREFIX_0F3814) },
3395     { PREFIX_TABLE (PREFIX_0F3815) },
3396     { "(bad)",          { XX } },
3397     { PREFIX_TABLE (PREFIX_0F3817) },
3398     /* 18 */
3399     { "(bad)",          { XX } },
3400     { "(bad)",          { XX } },
3401     { "(bad)",          { XX } },
3402     { "(bad)",          { XX } },
3403     { "pabsb",          { MX, EM } },
3404     { "pabsw",          { MX, EM } },
3405     { "pabsd",          { MX, EM } },
3406     { "(bad)",          { XX } },
3407     /* 20 */
3408     { PREFIX_TABLE (PREFIX_0F3820) },
3409     { PREFIX_TABLE (PREFIX_0F3821) },
3410     { PREFIX_TABLE (PREFIX_0F3822) },
3411     { PREFIX_TABLE (PREFIX_0F3823) },
3412     { PREFIX_TABLE (PREFIX_0F3824) },
3413     { PREFIX_TABLE (PREFIX_0F3825) },
3414     { "(bad)",          { XX } },
3415     { "(bad)",          { XX } },
3416     /* 28 */
3417     { PREFIX_TABLE (PREFIX_0F3828) },
3418     { PREFIX_TABLE (PREFIX_0F3829) },
3419     { PREFIX_TABLE (PREFIX_0F382A) },
3420     { PREFIX_TABLE (PREFIX_0F382B) },
3421     { "(bad)",          { XX } },
3422     { "(bad)",          { XX } },
3423     { "(bad)",          { XX } },
3424     { "(bad)",          { XX } },
3425     /* 30 */
3426     { PREFIX_TABLE (PREFIX_0F3830) },
3427     { PREFIX_TABLE (PREFIX_0F3831) },
3428     { PREFIX_TABLE (PREFIX_0F3832) },
3429     { PREFIX_TABLE (PREFIX_0F3833) },
3430     { PREFIX_TABLE (PREFIX_0F3834) },
3431     { PREFIX_TABLE (PREFIX_0F3835) },
3432     { "(bad)",          { XX } },
3433     { PREFIX_TABLE (PREFIX_0F3837) },
3434     /* 38 */
3435     { PREFIX_TABLE (PREFIX_0F3838) },
3436     { PREFIX_TABLE (PREFIX_0F3839) },
3437     { PREFIX_TABLE (PREFIX_0F383A) },
3438     { PREFIX_TABLE (PREFIX_0F383B) },
3439     { PREFIX_TABLE (PREFIX_0F383C) },
3440     { PREFIX_TABLE (PREFIX_0F383D) },
3441     { PREFIX_TABLE (PREFIX_0F383E) },
3442     { PREFIX_TABLE (PREFIX_0F383F) },
3443     /* 40 */
3444     { PREFIX_TABLE (PREFIX_0F3840) },
3445     { PREFIX_TABLE (PREFIX_0F3841) },
3446     { "(bad)",          { XX } },
3447     { "(bad)",          { XX } },
3448     { "(bad)",          { XX } },
3449     { "(bad)",          { XX } },
3450     { "(bad)",          { XX } },
3451     { "(bad)",          { XX } },
3452     /* 48 */
3453     { "(bad)",          { XX } },
3454     { "(bad)",          { XX } },
3455     { "(bad)",          { XX } },
3456     { "(bad)",          { XX } },
3457     { "(bad)",          { XX } },
3458     { "(bad)",          { XX } },
3459     { "(bad)",          { XX } },
3460     { "(bad)",          { XX } },
3461     /* 50 */
3462     { "(bad)",          { XX } },
3463     { "(bad)",          { XX } },
3464     { "(bad)",          { XX } },
3465     { "(bad)",          { XX } },
3466     { "(bad)",          { XX } },
3467     { "(bad)",          { XX } },
3468     { "(bad)",          { XX } },
3469     { "(bad)",          { XX } },
3470     /* 58 */
3471     { "(bad)",          { XX } },
3472     { "(bad)",          { XX } },
3473     { "(bad)",          { XX } },
3474     { "(bad)",          { XX } },
3475     { "(bad)",          { XX } },
3476     { "(bad)",          { XX } },
3477     { "(bad)",          { XX } },
3478     { "(bad)",          { XX } },
3479     /* 60 */
3480     { "(bad)",          { XX } },
3481     { "(bad)",          { XX } },
3482     { "(bad)",          { XX } },
3483     { "(bad)",          { XX } },
3484     { "(bad)",          { XX } },
3485     { "(bad)",          { XX } },
3486     { "(bad)",          { XX } },
3487     { "(bad)",          { XX } },
3488     /* 68 */
3489     { "(bad)",          { XX } },
3490     { "(bad)",          { XX } },
3491     { "(bad)",          { XX } },
3492     { "(bad)",          { XX } },
3493     { "(bad)",          { XX } },
3494     { "(bad)",          { XX } },
3495     { "(bad)",          { XX } },
3496     { "(bad)",          { XX } },
3497     /* 70 */
3498     { "(bad)",          { XX } },
3499     { "(bad)",          { XX } },
3500     { "(bad)",          { XX } },
3501     { "(bad)",          { XX } },
3502     { "(bad)",          { XX } },
3503     { "(bad)",          { XX } },
3504     { "(bad)",          { XX } },
3505     { "(bad)",          { XX } },
3506     /* 78 */
3507     { "(bad)",          { XX } },
3508     { "(bad)",          { XX } },
3509     { "(bad)",          { XX } },
3510     { "(bad)",          { XX } },
3511     { "(bad)",          { XX } },
3512     { "(bad)",          { XX } },
3513     { "(bad)",          { XX } },
3514     { "(bad)",          { XX } },
3515     /* 80 */
3516     { "(bad)",          { XX } },
3517     { "(bad)",          { XX } },
3518     { "(bad)",          { XX } },
3519     { "(bad)",          { XX } },
3520     { "(bad)",          { XX } },
3521     { "(bad)",          { XX } },
3522     { "(bad)",          { XX } },
3523     { "(bad)",          { XX } },
3524     /* 88 */
3525     { "(bad)",          { XX } },
3526     { "(bad)",          { XX } },
3527     { "(bad)",          { XX } },
3528     { "(bad)",          { XX } },
3529     { "(bad)",          { XX } },
3530     { "(bad)",          { XX } },
3531     { "(bad)",          { XX } },
3532     { "(bad)",          { XX } },
3533     /* 90 */
3534     { "(bad)",          { XX } },
3535     { "(bad)",          { XX } },
3536     { "(bad)",          { XX } },
3537     { "(bad)",          { XX } },
3538     { "(bad)",          { XX } },
3539     { "(bad)",          { XX } },
3540     { "(bad)",          { XX } },
3541     { "(bad)",          { XX } },
3542     /* 98 */
3543     { "(bad)",          { XX } },
3544     { "(bad)",          { XX } },
3545     { "(bad)",          { XX } },
3546     { "(bad)",          { XX } },
3547     { "(bad)",          { XX } },
3548     { "(bad)",          { XX } },
3549     { "(bad)",          { XX } },
3550     { "(bad)",          { XX } },
3551     /* a0 */
3552     { "(bad)",          { XX } },
3553     { "(bad)",          { XX } },
3554     { "(bad)",          { XX } },
3555     { "(bad)",          { XX } },
3556     { "(bad)",          { XX } },
3557     { "(bad)",          { XX } },
3558     { "(bad)",          { XX } },
3559     { "(bad)",          { XX } },
3560     /* a8 */
3561     { "(bad)",          { XX } },
3562     { "(bad)",          { XX } },
3563     { "(bad)",          { XX } },
3564     { "(bad)",          { XX } },
3565     { "(bad)",          { XX } },
3566     { "(bad)",          { XX } },
3567     { "(bad)",          { XX } },
3568     { "(bad)",          { XX } },
3569     /* b0 */
3570     { "(bad)",          { XX } },
3571     { "(bad)",          { XX } },
3572     { "(bad)",          { XX } },
3573     { "(bad)",          { XX } },
3574     { "(bad)",          { XX } },
3575     { "(bad)",          { XX } },
3576     { "(bad)",          { XX } },
3577     { "(bad)",          { XX } },
3578     /* b8 */
3579     { "(bad)",          { XX } },
3580     { "(bad)",          { XX } },
3581     { "(bad)",          { XX } },
3582     { "(bad)",          { XX } },
3583     { "(bad)",          { XX } },
3584     { "(bad)",          { XX } },
3585     { "(bad)",          { XX } },
3586     { "(bad)",          { XX } },
3587     /* c0 */
3588     { "(bad)",          { XX } },
3589     { "(bad)",          { XX } },
3590     { "(bad)",          { XX } },
3591     { "(bad)",          { XX } },
3592     { "(bad)",          { XX } },
3593     { "(bad)",          { XX } },
3594     { "(bad)",          { XX } },
3595     { "(bad)",          { XX } },
3596     /* c8 */
3597     { "(bad)",          { XX } },
3598     { "(bad)",          { XX } },
3599     { "(bad)",          { XX } },
3600     { "(bad)",          { XX } },
3601     { "(bad)",          { XX } },
3602     { "(bad)",          { XX } },
3603     { "(bad)",          { XX } },
3604     { "(bad)",          { XX } },
3605     /* d0 */
3606     { "(bad)",          { XX } },
3607     { "(bad)",          { XX } },
3608     { "(bad)",          { XX } },
3609     { "(bad)",          { XX } },
3610     { "(bad)",          { XX } },
3611     { "(bad)",          { XX } },
3612     { "(bad)",          { XX } },
3613     { "(bad)",          { XX } },
3614     /* d8 */
3615     { "(bad)",          { XX } },
3616     { "(bad)",          { XX } },
3617     { "(bad)",          { XX } },
3618     { "(bad)",          { XX } },
3619     { "(bad)",          { XX } },
3620     { "(bad)",          { XX } },
3621     { "(bad)",          { XX } },
3622     { "(bad)",          { XX } },
3623     /* e0 */
3624     { "(bad)",          { XX } },
3625     { "(bad)",          { XX } },
3626     { "(bad)",          { XX } },
3627     { "(bad)",          { XX } },
3628     { "(bad)",          { XX } },
3629     { "(bad)",          { XX } },
3630     { "(bad)",          { XX } },
3631     { "(bad)",          { XX } },
3632     /* e8 */
3633     { "(bad)",          { XX } },
3634     { "(bad)",          { XX } },
3635     { "(bad)",          { XX } },
3636     { "(bad)",          { XX } },
3637     { "(bad)",          { XX } },
3638     { "(bad)",          { XX } },
3639     { "(bad)",          { XX } },
3640     { "(bad)",          { XX } },
3641     /* f0 */
3642     { PREFIX_TABLE (PREFIX_0F38F0) },
3643     { PREFIX_TABLE (PREFIX_0F38F1) },
3644     { "(bad)",          { XX } },
3645     { "(bad)",          { XX } },
3646     { "(bad)",          { XX } },
3647     { "(bad)",          { XX } },
3648     { "(bad)",          { XX } },
3649     { "(bad)",          { XX } },
3650     /* f8 */
3651     { "(bad)",          { XX } },
3652     { "(bad)",          { XX } },
3653     { "(bad)",          { XX } },
3654     { "(bad)",          { XX } },
3655     { "(bad)",          { XX } },
3656     { "(bad)",          { XX } },
3657     { "(bad)",          { XX } },
3658     { "(bad)",          { XX } },
3659   },
3660   /* THREE_BYTE_0F3A */
3661   {
3662     /* 00 */
3663     { "(bad)",          { XX } },
3664     { "(bad)",          { XX } },
3665     { "(bad)",          { XX } },
3666     { "(bad)",          { XX } },
3667     { "(bad)",          { XX } },
3668     { "(bad)",          { XX } },
3669     { "(bad)",          { XX } },
3670     { "(bad)",          { XX } },
3671     /* 08 */
3672     { PREFIX_TABLE (PREFIX_0F3A08) },
3673     { PREFIX_TABLE (PREFIX_0F3A09) },
3674     { PREFIX_TABLE (PREFIX_0F3A0A) },
3675     { PREFIX_TABLE (PREFIX_0F3A0B) },
3676     { PREFIX_TABLE (PREFIX_0F3A0C) },
3677     { PREFIX_TABLE (PREFIX_0F3A0D) },
3678     { PREFIX_TABLE (PREFIX_0F3A0E) },
3679     { "palignr",        { MX, EM, Ib } },
3680     /* 10 */
3681     { "(bad)",          { XX } },
3682     { "(bad)",          { XX } },
3683     { "(bad)",          { XX } },
3684     { "(bad)",          { XX } },
3685     { PREFIX_TABLE (PREFIX_0F3A14) },
3686     { PREFIX_TABLE (PREFIX_0F3A15) },
3687     { PREFIX_TABLE (PREFIX_0F3A16) },
3688     { PREFIX_TABLE (PREFIX_0F3A17) },
3689     /* 18 */
3690     { "(bad)",          { XX } },
3691     { "(bad)",          { XX } },
3692     { "(bad)",          { XX } },
3693     { "(bad)",          { XX } },
3694     { "(bad)",          { XX } },
3695     { "(bad)",          { XX } },
3696     { "(bad)",          { XX } },
3697     { "(bad)",          { XX } },
3698     /* 20 */
3699     { PREFIX_TABLE (PREFIX_0F3A20) },
3700     { PREFIX_TABLE (PREFIX_0F3A21) },
3701     { PREFIX_TABLE (PREFIX_0F3A22) },
3702     { "(bad)",          { XX } },
3703     { "(bad)",          { XX } },
3704     { "(bad)",          { XX } },
3705     { "(bad)",          { XX } },
3706     { "(bad)",          { XX } },
3707     /* 28 */
3708     { "(bad)",          { XX } },
3709     { "(bad)",          { XX } },
3710     { "(bad)",          { XX } },
3711     { "(bad)",          { XX } },
3712     { "(bad)",          { XX } },
3713     { "(bad)",          { XX } },
3714     { "(bad)",          { XX } },
3715     { "(bad)",          { XX } },
3716     /* 30 */
3717     { "(bad)",          { XX } },
3718     { "(bad)",          { XX } },
3719     { "(bad)",          { XX } },
3720     { "(bad)",          { XX } },
3721     { "(bad)",          { XX } },
3722     { "(bad)",          { XX } },
3723     { "(bad)",          { XX } },
3724     { "(bad)",          { XX } },
3725     /* 38 */
3726     { "(bad)",          { XX } },
3727     { "(bad)",          { XX } },
3728     { "(bad)",          { XX } },
3729     { "(bad)",          { XX } },
3730     { "(bad)",          { XX } },
3731     { "(bad)",          { XX } },
3732     { "(bad)",          { XX } },
3733     { "(bad)",          { XX } },
3734     /* 40 */
3735     { PREFIX_TABLE (PREFIX_0F3A40) },
3736     { PREFIX_TABLE (PREFIX_0F3A41) },
3737     { PREFIX_TABLE (PREFIX_0F3A42) },
3738     { "(bad)",          { XX } },
3739     { "(bad)",          { XX } },
3740     { "(bad)",          { XX } },
3741     { "(bad)",          { XX } },
3742     { "(bad)",          { XX } },
3743     /* 48 */
3744     { "(bad)",          { XX } },
3745     { "(bad)",          { XX } },
3746     { "(bad)",          { XX } },
3747     { "(bad)",          { XX } },
3748     { "(bad)",          { XX } },
3749     { "(bad)",          { XX } },
3750     { "(bad)",          { XX } },
3751     { "(bad)",          { XX } },
3752     /* 50 */
3753     { "(bad)",          { XX } },
3754     { "(bad)",          { XX } },
3755     { "(bad)",          { XX } },
3756     { "(bad)",          { XX } },
3757     { "(bad)",          { XX } },
3758     { "(bad)",          { XX } },
3759     { "(bad)",          { XX } },
3760     { "(bad)",          { XX } },
3761     /* 58 */
3762     { "(bad)",          { XX } },
3763     { "(bad)",          { XX } },
3764     { "(bad)",          { XX } },
3765     { "(bad)",          { XX } },
3766     { "(bad)",          { XX } },
3767     { "(bad)",          { XX } },
3768     { "(bad)",          { XX } },
3769     { "(bad)",          { XX } },
3770     /* 60 */
3771     { PREFIX_TABLE (PREFIX_0F3A60) },
3772     { PREFIX_TABLE (PREFIX_0F3A61) },
3773     { PREFIX_TABLE (PREFIX_0F3A62) },
3774     { PREFIX_TABLE (PREFIX_0F3A63) },
3775     { "(bad)",          { XX } },
3776     { "(bad)",          { XX } },
3777     { "(bad)",          { XX } },
3778     { "(bad)",          { XX } },
3779     /* 68 */
3780     { "(bad)",          { XX } },
3781     { "(bad)",          { XX } },
3782     { "(bad)",          { XX } },
3783     { "(bad)",          { XX } },
3784     { "(bad)",          { XX } },
3785     { "(bad)",          { XX } },
3786     { "(bad)",          { XX } },
3787     { "(bad)",          { XX } },
3788     /* 70 */
3789     { "(bad)",          { XX } },
3790     { "(bad)",          { XX } },
3791     { "(bad)",          { XX } },
3792     { "(bad)",          { XX } },
3793     { "(bad)",          { XX } },
3794     { "(bad)",          { XX } },
3795     { "(bad)",          { XX } },
3796     { "(bad)",          { XX } },
3797     /* 78 */
3798     { "(bad)",          { XX } },
3799     { "(bad)",          { XX } },
3800     { "(bad)",          { XX } },
3801     { "(bad)",          { XX } },
3802     { "(bad)",          { XX } },
3803     { "(bad)",          { XX } },
3804     { "(bad)",          { XX } },
3805     { "(bad)",          { XX } },
3806     /* 80 */
3807     { "(bad)",          { XX } },
3808     { "(bad)",          { XX } },
3809     { "(bad)",          { XX } },
3810     { "(bad)",          { XX } },
3811     { "(bad)",          { XX } },
3812     { "(bad)",          { XX } },
3813     { "(bad)",          { XX } },
3814     { "(bad)",          { XX } },
3815     /* 88 */
3816     { "(bad)",          { XX } },
3817     { "(bad)",          { XX } },
3818     { "(bad)",          { XX } },
3819     { "(bad)",          { XX } },
3820     { "(bad)",          { XX } },
3821     { "(bad)",          { XX } },
3822     { "(bad)",          { XX } },
3823     { "(bad)",          { XX } },
3824     /* 90 */
3825     { "(bad)",          { XX } },
3826     { "(bad)",          { XX } },
3827     { "(bad)",          { XX } },
3828     { "(bad)",          { XX } },
3829     { "(bad)",          { XX } },
3830     { "(bad)",          { XX } },
3831     { "(bad)",          { XX } },
3832     { "(bad)",          { XX } },
3833     /* 98 */
3834     { "(bad)",          { XX } },
3835     { "(bad)",          { XX } },
3836     { "(bad)",          { XX } },
3837     { "(bad)",          { XX } },
3838     { "(bad)",          { XX } },
3839     { "(bad)",          { XX } },
3840     { "(bad)",          { XX } },
3841     { "(bad)",          { XX } },
3842     /* a0 */
3843     { "(bad)",          { XX } },
3844     { "(bad)",          { XX } },
3845     { "(bad)",          { XX } },
3846     { "(bad)",          { XX } },
3847     { "(bad)",          { XX } },
3848     { "(bad)",          { XX } },
3849     { "(bad)",          { XX } },
3850     { "(bad)",          { XX } },
3851     /* a8 */
3852     { "(bad)",          { XX } },
3853     { "(bad)",          { XX } },
3854     { "(bad)",          { XX } },
3855     { "(bad)",          { XX } },
3856     { "(bad)",          { XX } },
3857     { "(bad)",          { XX } },
3858     { "(bad)",          { XX } },
3859     { "(bad)",          { XX } },
3860     /* b0 */
3861     { "(bad)",          { XX } },
3862     { "(bad)",          { XX } },
3863     { "(bad)",          { XX } },
3864     { "(bad)",          { XX } },
3865     { "(bad)",          { XX } },
3866     { "(bad)",          { XX } },
3867     { "(bad)",          { XX } },
3868     { "(bad)",          { XX } },
3869     /* b8 */
3870     { "(bad)",          { XX } },
3871     { "(bad)",          { XX } },
3872     { "(bad)",          { XX } },
3873     { "(bad)",          { XX } },
3874     { "(bad)",          { XX } },
3875     { "(bad)",          { XX } },
3876     { "(bad)",          { XX } },
3877     { "(bad)",          { XX } },
3878     /* c0 */
3879     { "(bad)",          { XX } },
3880     { "(bad)",          { XX } },
3881     { "(bad)",          { XX } },
3882     { "(bad)",          { XX } },
3883     { "(bad)",          { XX } },
3884     { "(bad)",          { XX } },
3885     { "(bad)",          { XX } },
3886     { "(bad)",          { XX } },
3887     /* c8 */
3888     { "(bad)",          { XX } },
3889     { "(bad)",          { XX } },
3890     { "(bad)",          { XX } },
3891     { "(bad)",          { XX } },
3892     { "(bad)",          { XX } },
3893     { "(bad)",          { XX } },
3894     { "(bad)",          { XX } },
3895     { "(bad)",          { XX } },
3896     /* d0 */
3897     { "(bad)",          { XX } },
3898     { "(bad)",          { XX } },
3899     { "(bad)",          { XX } },
3900     { "(bad)",          { XX } },
3901     { "(bad)",          { XX } },
3902     { "(bad)",          { XX } },
3903     { "(bad)",          { XX } },
3904     { "(bad)",          { XX } },
3905     /* d8 */
3906     { "(bad)",          { XX } },
3907     { "(bad)",          { XX } },
3908     { "(bad)",          { XX } },
3909     { "(bad)",          { XX } },
3910     { "(bad)",          { XX } },
3911     { "(bad)",          { XX } },
3912     { "(bad)",          { XX } },
3913     { "(bad)",          { XX } },
3914     /* e0 */
3915     { "(bad)",          { XX } },
3916     { "(bad)",          { XX } },
3917     { "(bad)",          { XX } },
3918     { "(bad)",          { XX } },
3919     { "(bad)",          { XX } },
3920     { "(bad)",          { XX } },
3921     { "(bad)",          { XX } },
3922     { "(bad)",          { XX } },
3923     /* e8 */
3924     { "(bad)",          { XX } },
3925     { "(bad)",          { XX } },
3926     { "(bad)",          { XX } },
3927     { "(bad)",          { XX } },
3928     { "(bad)",          { XX } },
3929     { "(bad)",          { XX } },
3930     { "(bad)",          { XX } },
3931     { "(bad)",          { XX } },
3932     /* f0 */
3933     { "(bad)",          { XX } },
3934     { "(bad)",          { XX } },
3935     { "(bad)",          { XX } },
3936     { "(bad)",          { XX } },
3937     { "(bad)",          { XX } },
3938     { "(bad)",          { XX } },
3939     { "(bad)",          { XX } },
3940     { "(bad)",          { XX } },
3941     /* f8 */
3942     { "(bad)",          { XX } },
3943     { "(bad)",          { XX } },
3944     { "(bad)",          { XX } },
3945     { "(bad)",          { XX } },
3946     { "(bad)",          { XX } },
3947     { "(bad)",          { XX } },
3948     { "(bad)",          { XX } },
3949     { "(bad)",          { XX } },
3950   },
3951   /* THREE_BYTE_0F7A */
3952   {
3953     /* 00 */
3954     { "(bad)",          { XX } },
3955     { "(bad)",          { XX } },
3956     { "(bad)",          { XX } },
3957     { "(bad)",          { XX } },
3958     { "(bad)",          { XX } },
3959     { "(bad)",          { XX } },
3960     { "(bad)",          { XX } },
3961     { "(bad)",          { XX } },
3962     /* 08 */
3963     { "(bad)",          { XX } },
3964     { "(bad)",          { XX } },
3965     { "(bad)",          { XX } },
3966     { "(bad)",          { XX } },
3967     { "(bad)",          { XX } },
3968     { "(bad)",          { XX } },
3969     { "(bad)",          { XX } },
3970     { "(bad)",          { XX } },
3971     /* 10 */
3972     { "frczps",         { XM, EXq } },
3973     { "frczpd",         { XM, EXq } },
3974     { "frczss",         { XM, EXq } },
3975     { "frczsd",         { XM, EXq } },
3976     { "(bad)",          { XX } },
3977     { "(bad)",          { XX } },
3978     { "(bad)",          { XX } },
3979     { "(bad)",          { XX } },
3980     /* 18 */
3981     { "(bad)",          { XX } },
3982     { "(bad)",          { XX } },
3983     { "(bad)",          { XX } },
3984     { "(bad)",          { XX } },
3985     { "(bad)",          { XX } },
3986     { "(bad)",          { XX } },
3987     { "(bad)",          { XX } },
3988     { "(bad)",          { XX } },
3989     /* 20 */
3990     { "ptest",          { XX } },
3991     { "(bad)",          { XX } },
3992     { "(bad)",          { XX } },
3993     { "(bad)",          { XX } },
3994     { "(bad)",          { XX } },
3995     { "(bad)",          { XX } },
3996     { "(bad)",          { XX } },
3997     { "(bad)",          { XX } },
3998     /* 28 */
3999     { "(bad)",          { XX } },
4000     { "(bad)",          { XX } },
4001     { "(bad)",          { XX } },
4002     { "(bad)",          { XX } },
4003     { "(bad)",          { XX } },
4004     { "(bad)",          { XX } },
4005     { "(bad)",          { XX } },
4006     { "(bad)",          { XX } },
4007     /* 30 */
4008     { "cvtph2ps",       { XM, EXd } },
4009     { "cvtps2ph",       { EXd, XM } },
4010     { "(bad)",          { XX } },
4011     { "(bad)",          { XX } },
4012     { "(bad)",          { XX } },
4013     { "(bad)",          { XX } },
4014     { "(bad)",          { XX } },
4015     { "(bad)",          { XX } },
4016     /* 38 */
4017     { "(bad)",          { XX } },
4018     { "(bad)",          { XX } },
4019     { "(bad)",          { XX } },
4020     { "(bad)",          { XX } },
4021     { "(bad)",          { XX } },
4022     { "(bad)",          { XX } },
4023     { "(bad)",          { XX } },
4024     { "(bad)",          { XX } },
4025     /* 40 */
4026     { "(bad)",          { XX } },
4027     { "phaddbw",        { XM, EXq } },
4028     { "phaddbd",        { XM, EXq } },
4029     { "phaddbq",        { XM, EXq } },
4030     { "(bad)",          { XX } },
4031     { "(bad)",          { XX } },
4032     { "phaddwd",        { XM, EXq } },
4033     { "phaddwq",        { XM, EXq } },
4034     /* 48 */
4035     { "(bad)",          { XX } },
4036     { "(bad)",          { XX } },
4037     { "(bad)",          { XX } },
4038     { "phadddq",        { XM, EXq } },
4039     { "(bad)",          { XX } },
4040     { "(bad)",          { XX } },
4041     { "(bad)",          { XX } },
4042     { "(bad)",          { XX } },
4043     /* 50 */
4044     { "(bad)",          { XX } },
4045     { "phaddubw",       { XM, EXq } },
4046     { "phaddubd",       { XM, EXq } },
4047     { "phaddubq",       { XM, EXq } },
4048     { "(bad)",          { XX } },
4049     { "(bad)",          { XX } },
4050     { "phadduwd",       { XM, EXq } },
4051     { "phadduwq",       { XM, EXq } },
4052     /* 58 */
4053     { "(bad)",          { XX } },
4054     { "(bad)",          { XX } },
4055     { "(bad)",          { XX } },
4056     { "phaddudq",       { XM, EXq } },
4057     { "(bad)",          { XX } },
4058     { "(bad)",          { XX } },
4059     { "(bad)",          { XX } },
4060     { "(bad)",          { XX } },
4061     /* 60 */
4062     { "(bad)",          { XX } },
4063     { "phsubbw",        { XM, EXq } },
4064     { "phsubbd",        { XM, EXq } },
4065     { "phsubbq",        { XM, EXq } },
4066     { "(bad)",          { XX } },
4067     { "(bad)",          { XX } },
4068     { "(bad)",          { XX } },
4069     { "(bad)",          { XX } },
4070     /* 68 */
4071     { "(bad)",          { XX } },
4072     { "(bad)",          { XX } },
4073     { "(bad)",          { XX } },
4074     { "(bad)",          { XX } },
4075     { "(bad)",          { XX } },
4076     { "(bad)",          { XX } },
4077     { "(bad)",          { XX } },
4078     { "(bad)",          { XX } },
4079     /* 70 */
4080     { "(bad)",          { XX } },
4081     { "(bad)",          { XX } },
4082     { "(bad)",          { XX } },
4083     { "(bad)",          { XX } },
4084     { "(bad)",          { XX } },
4085     { "(bad)",          { XX } },
4086     { "(bad)",          { XX } },
4087     { "(bad)",          { XX } },
4088     /* 78 */
4089     { "(bad)",          { XX } },
4090     { "(bad)",          { XX } },
4091     { "(bad)",          { XX } },
4092     { "(bad)",          { XX } },
4093     { "(bad)",          { XX } },
4094     { "(bad)",          { XX } },
4095     { "(bad)",          { XX } },
4096     { "(bad)",          { XX } },
4097     /* 80 */
4098     { "(bad)",          { XX } },
4099     { "(bad)",          { XX } },
4100     { "(bad)",          { XX } },
4101     { "(bad)",          { XX } },
4102     { "(bad)",          { XX } },
4103     { "(bad)",          { XX } },
4104     { "(bad)",          { XX } },
4105     { "(bad)",          { XX } },
4106     /* 88 */
4107     { "(bad)",          { XX } },
4108     { "(bad)",          { XX } },
4109     { "(bad)",          { XX } },
4110     { "(bad)",          { XX } },
4111     { "(bad)",          { XX } },
4112     { "(bad)",          { XX } },
4113     { "(bad)",          { XX } },
4114     { "(bad)",          { XX } },
4115     /* 90 */
4116     { "(bad)",          { XX } },
4117     { "(bad)",          { XX } },
4118     { "(bad)",          { XX } },
4119     { "(bad)",          { XX } },
4120     { "(bad)",          { XX } },
4121     { "(bad)",          { XX } },
4122     { "(bad)",          { XX } },
4123     { "(bad)",          { XX } },
4124     /* 98 */
4125     { "(bad)",          { XX } },
4126     { "(bad)",          { XX } },
4127     { "(bad)",          { XX } },
4128     { "(bad)",          { XX } },
4129     { "(bad)",          { XX } },
4130     { "(bad)",          { XX } },
4131     { "(bad)",          { XX } },
4132     { "(bad)",          { XX } },
4133     /* a0 */
4134     { "(bad)",          { XX } },
4135     { "(bad)",          { XX } },
4136     { "(bad)",          { XX } },
4137     { "(bad)",          { XX } },
4138     { "(bad)",          { XX } },
4139     { "(bad)",          { XX } },
4140     { "(bad)",          { XX } },
4141     { "(bad)",          { XX } },
4142     /* a8 */
4143     { "(bad)",          { XX } },
4144     { "(bad)",          { XX } },
4145     { "(bad)",          { XX } },
4146     { "(bad)",          { XX } },
4147     { "(bad)",          { XX } },
4148     { "(bad)",          { XX } },
4149     { "(bad)",          { XX } },
4150     { "(bad)",          { XX } },
4151     /* b0 */
4152     { "(bad)",          { XX } },
4153     { "(bad)",          { XX } },
4154     { "(bad)",          { XX } },
4155     { "(bad)",          { XX } },
4156     { "(bad)",          { XX } },
4157     { "(bad)",          { XX } },
4158     { "(bad)",          { XX } },
4159     { "(bad)",          { XX } },
4160     /* b8 */
4161     { "(bad)",          { XX } },
4162     { "(bad)",          { XX } },
4163     { "(bad)",          { XX } },
4164     { "(bad)",          { XX } },
4165     { "(bad)",          { XX } },
4166     { "(bad)",          { XX } },
4167     { "(bad)",          { XX } },
4168     { "(bad)",          { XX } },
4169     /* c0 */
4170     { "(bad)",          { XX } },
4171     { "(bad)",          { XX } },
4172     { "(bad)",          { XX } },
4173     { "(bad)",          { XX } },
4174     { "(bad)",          { XX } },
4175     { "(bad)",          { XX } },
4176     { "(bad)",          { XX } },
4177     { "(bad)",          { XX } },
4178     /* c8 */
4179     { "(bad)",          { XX } },
4180     { "(bad)",          { XX } },
4181     { "(bad)",          { XX } },
4182     { "(bad)",          { XX } },
4183     { "(bad)",          { XX } },
4184     { "(bad)",          { XX } },
4185     { "(bad)",          { XX } },
4186     { "(bad)",          { XX } },
4187     /* d0 */
4188     { "(bad)",          { XX } },
4189     { "(bad)",          { XX } },
4190     { "(bad)",          { XX } },
4191     { "(bad)",          { XX } },
4192     { "(bad)",          { XX } },
4193     { "(bad)",          { XX } },
4194     { "(bad)",          { XX } },
4195     { "(bad)",          { XX } },
4196     /* d8 */
4197     { "(bad)",          { XX } },
4198     { "(bad)",          { XX } },
4199     { "(bad)",          { XX } },
4200     { "(bad)",          { XX } },
4201     { "(bad)",          { XX } },
4202     { "(bad)",          { XX } },
4203     { "(bad)",          { XX } },
4204     { "(bad)",          { XX } },
4205     /* e0 */
4206     { "(bad)",          { XX } },
4207     { "(bad)",          { XX } },
4208     { "(bad)",          { XX } },
4209     { "(bad)",          { XX } },
4210     { "(bad)",          { XX } },
4211     { "(bad)",          { XX } },
4212     { "(bad)",          { XX } },
4213     { "(bad)",          { XX } },
4214     /* e8 */
4215     { "(bad)",          { XX } },
4216     { "(bad)",          { XX } },
4217     { "(bad)",          { XX } },
4218     { "(bad)",          { XX } },
4219     { "(bad)",          { XX } },
4220     { "(bad)",          { XX } },
4221     { "(bad)",          { XX } },
4222     { "(bad)",          { XX } },
4223     /* f0 */
4224     { "(bad)",          { XX } },
4225     { "(bad)",          { XX } },
4226     { "(bad)",          { XX } },
4227     { "(bad)",          { XX } },
4228     { "(bad)",          { XX } },
4229     { "(bad)",          { XX } },
4230     { "(bad)",          { XX } },
4231     { "(bad)",          { XX } },
4232     /* f8 */
4233     { "(bad)",          { XX } },
4234     { "(bad)",          { XX } },
4235     { "(bad)",          { XX } },
4236     { "(bad)",          { XX } },
4237     { "(bad)",          { XX } },
4238     { "(bad)",          { XX } },
4239     { "(bad)",          { XX } },
4240     { "(bad)",          { XX } },
4241   },
4242   /* THREE_BYTE_0F7B */
4243   {
4244     /* 00 */
4245     { "(bad)",          { XX } },
4246     { "(bad)",          { XX } },
4247     { "(bad)",          { XX } },
4248     { "(bad)",          { XX } },
4249     { "(bad)",          { XX } },
4250     { "(bad)",          { XX } },
4251     { "(bad)",          { XX } },
4252     { "(bad)",          { XX } },
4253     /* 08 */
4254     { "(bad)",          { XX } },
4255     { "(bad)",          { XX } },
4256     { "(bad)",          { XX } },
4257     { "(bad)",          { XX } },
4258     { "(bad)",          { XX } },
4259     { "(bad)",          { XX } },
4260     { "(bad)",          { XX } },
4261     { "(bad)",          { XX } },
4262     /* 10 */
4263     { "(bad)",          { XX } },
4264     { "(bad)",          { XX } },
4265     { "(bad)",          { XX } },
4266     { "(bad)",          { XX } },
4267     { "(bad)",          { XX } },
4268     { "(bad)",          { XX } },
4269     { "(bad)",          { XX } },
4270     { "(bad)",          { XX } },
4271     /* 18 */
4272     { "(bad)",          { XX } },
4273     { "(bad)",          { XX } },
4274     { "(bad)",          { XX } },
4275     { "(bad)",          { XX } },
4276     { "(bad)",          { XX } },
4277     { "(bad)",          { XX } },
4278     { "(bad)",          { XX } },
4279     { "(bad)",          { XX } },
4280     /* 20 */
4281     { "(bad)",          { XX } },
4282     { "(bad)",          { XX } },
4283     { "(bad)",          { XX } },
4284     { "(bad)",          { XX } },
4285     { "(bad)",          { XX } },
4286     { "(bad)",          { XX } },
4287     { "(bad)",          { XX } },
4288     { "(bad)",          { XX } },
4289     /* 28 */
4290     { "(bad)",          { XX } },
4291     { "(bad)",          { XX } },
4292     { "(bad)",          { XX } },
4293     { "(bad)",          { XX } },
4294     { "(bad)",          { XX } },
4295     { "(bad)",          { XX } },
4296     { "(bad)",          { XX } },
4297     { "(bad)",          { XX } },
4298     /* 30 */
4299     { "(bad)",          { XX } },
4300     { "(bad)",          { XX } },
4301     { "(bad)",          { XX } },
4302     { "(bad)",          { XX } },
4303     { "(bad)",          { XX } },
4304     { "(bad)",          { XX } },
4305     { "(bad)",          { XX } },
4306     { "(bad)",          { XX } },
4307     /* 38 */
4308     { "(bad)",          { XX } },
4309     { "(bad)",          { XX } },
4310     { "(bad)",          { XX } },
4311     { "(bad)",          { XX } },
4312     { "(bad)",          { XX } },
4313     { "(bad)",          { XX } },
4314     { "(bad)",          { XX } },
4315     { "(bad)",          { XX } },
4316     /* 40 */
4317     { "protb",          { XM, EXq, Ib } },
4318     { "protw",          { XM, EXq, Ib } },
4319     { "protd",          { XM, EXq, Ib } },
4320     { "protq",          { XM, EXq, Ib } },
4321     { "pshlb",          { XM, EXq, Ib } },
4322     { "pshlw",          { XM, EXq, Ib } },
4323     { "pshld",          { XM, EXq, Ib } },
4324     { "pshlq",          { XM, EXq, Ib } },
4325     /* 48 */
4326     { "pshab",          { XM, EXq, Ib } },
4327     { "pshaw",          { XM, EXq, Ib } },
4328     { "pshad",          { XM, EXq, Ib } },
4329     { "pshaq",          { XM, EXq, Ib } },
4330     { "(bad)",          { XX } },
4331     { "(bad)",          { XX } },
4332     { "(bad)",          { XX } },
4333     { "(bad)",          { XX } },
4334     /* 50 */
4335     { "(bad)",          { XX } },
4336     { "(bad)",          { XX } },
4337     { "(bad)",          { XX } },
4338     { "(bad)",          { XX } },
4339     { "(bad)",          { XX } },
4340     { "(bad)",          { XX } },
4341     { "(bad)",          { XX } },
4342     { "(bad)",          { XX } },
4343     /* 58 */
4344     { "(bad)",          { XX } },
4345     { "(bad)",          { XX } },
4346     { "(bad)",          { XX } },
4347     { "(bad)",          { XX } },
4348     { "(bad)",          { XX } },
4349     { "(bad)",          { XX } },
4350     { "(bad)",          { XX } },
4351     { "(bad)",          { XX } },
4352     /* 60 */
4353     { "(bad)",          { XX } },
4354     { "(bad)",          { XX } },
4355     { "(bad)",          { XX } },
4356     { "(bad)",          { XX } },
4357     { "(bad)",          { XX } },
4358     { "(bad)",          { XX } },
4359     { "(bad)",          { XX } },
4360     { "(bad)",          { XX } },
4361     /* 68 */
4362     { "(bad)",          { XX } },
4363     { "(bad)",          { XX } },
4364     { "(bad)",          { XX } },
4365     { "(bad)",          { XX } },
4366     { "(bad)",          { XX } },
4367     { "(bad)",          { XX } },
4368     { "(bad)",          { XX } },
4369     { "(bad)",          { XX } },
4370     /* 70 */
4371     { "(bad)",          { XX } },
4372     { "(bad)",          { XX } },
4373     { "(bad)",          { XX } },
4374     { "(bad)",          { XX } },
4375     { "(bad)",          { XX } },
4376     { "(bad)",          { XX } },
4377     { "(bad)",          { XX } },
4378     { "(bad)",          { XX } },
4379     /* 78 */
4380     { "(bad)",          { XX } },
4381     { "(bad)",          { XX } },
4382     { "(bad)",          { XX } },
4383     { "(bad)",          { XX } },
4384     { "(bad)",          { XX } },
4385     { "(bad)",          { XX } },
4386     { "(bad)",          { XX } },
4387     { "(bad)",          { XX } },
4388     /* 80 */
4389     { "(bad)",          { XX } },
4390     { "(bad)",          { XX } },
4391     { "(bad)",          { XX } },
4392     { "(bad)",          { XX } },
4393     { "(bad)",          { XX } },
4394     { "(bad)",          { XX } },
4395     { "(bad)",          { XX } },
4396     { "(bad)",          { XX } },
4397     /* 88 */
4398     { "(bad)",          { XX } },
4399     { "(bad)",          { XX } },
4400     { "(bad)",          { XX } },
4401     { "(bad)",          { XX } },
4402     { "(bad)",          { XX } },
4403     { "(bad)",          { XX } },
4404     { "(bad)",          { XX } },
4405     { "(bad)",          { XX } },
4406     /* 90 */
4407     { "(bad)",          { XX } },
4408     { "(bad)",          { XX } },
4409     { "(bad)",          { XX } },
4410     { "(bad)",          { XX } },
4411     { "(bad)",          { XX } },
4412     { "(bad)",          { XX } },
4413     { "(bad)",          { XX } },
4414     { "(bad)",          { XX } },
4415     /* 98 */
4416     { "(bad)",          { XX } },
4417     { "(bad)",          { XX } },
4418     { "(bad)",          { XX } },
4419     { "(bad)",          { XX } },
4420     { "(bad)",          { XX } },
4421     { "(bad)",          { XX } },
4422     { "(bad)",          { XX } },
4423     { "(bad)",          { XX } },
4424     /* a0 */
4425     { "(bad)",          { XX } },
4426     { "(bad)",          { XX } },
4427     { "(bad)",          { XX } },
4428     { "(bad)",          { XX } },
4429     { "(bad)",          { XX } },
4430     { "(bad)",          { XX } },
4431     { "(bad)",          { XX } },
4432     { "(bad)",          { XX } },
4433     /* a8 */
4434     { "(bad)",          { XX } },
4435     { "(bad)",          { XX } },
4436     { "(bad)",          { XX } },
4437     { "(bad)",          { XX } },
4438     { "(bad)",          { XX } },
4439     { "(bad)",          { XX } },
4440     { "(bad)",          { XX } },
4441     { "(bad)",          { XX } },
4442     /* b0 */
4443     { "(bad)",          { XX } },
4444     { "(bad)",          { XX } },
4445     { "(bad)",          { XX } },
4446     { "(bad)",          { XX } },
4447     { "(bad)",          { XX } },
4448     { "(bad)",          { XX } },
4449     { "(bad)",          { XX } },
4450     { "(bad)",          { XX } },
4451     /* b8 */
4452     { "(bad)",          { XX } },
4453     { "(bad)",          { XX } },
4454     { "(bad)",          { XX } },
4455     { "(bad)",          { XX } },
4456     { "(bad)",          { XX } },
4457     { "(bad)",          { XX } },
4458     { "(bad)",          { XX } },
4459     { "(bad)",          { XX } },
4460     /* c0 */
4461     { "(bad)",          { XX } },
4462     { "(bad)",          { XX } },
4463     { "(bad)",          { XX } },
4464     { "(bad)",          { XX } },
4465     { "(bad)",          { XX } },
4466     { "(bad)",          { XX } },
4467     { "(bad)",          { XX } },
4468     { "(bad)",          { XX } },
4469     /* c8 */
4470     { "(bad)",          { XX } },
4471     { "(bad)",          { XX } },
4472     { "(bad)",          { XX } },
4473     { "(bad)",          { XX } },
4474     { "(bad)",          { XX } },
4475     { "(bad)",          { XX } },
4476     { "(bad)",          { XX } },
4477     { "(bad)",          { XX } },
4478     /* d0 */
4479     { "(bad)",          { XX } },
4480     { "(bad)",          { XX } },
4481     { "(bad)",          { XX } },
4482     { "(bad)",          { XX } },
4483     { "(bad)",          { XX } },
4484     { "(bad)",          { XX } },
4485     { "(bad)",          { XX } },
4486     { "(bad)",          { XX } },
4487     /* d8 */
4488     { "(bad)",          { XX } },
4489     { "(bad)",          { XX } },
4490     { "(bad)",          { XX } },
4491     { "(bad)",          { XX } },
4492     { "(bad)",          { XX } },
4493     { "(bad)",          { XX } },
4494     { "(bad)",          { XX } },
4495     { "(bad)",          { XX } },
4496     /* e0 */
4497     { "(bad)",          { XX } },
4498     { "(bad)",          { XX } },
4499     { "(bad)",          { XX } },
4500     { "(bad)",          { XX } },
4501     { "(bad)",          { XX } },
4502     { "(bad)",          { XX } },
4503     { "(bad)",          { XX } },
4504     { "(bad)",          { XX } },
4505     /* e8 */
4506     { "(bad)",          { XX } },
4507     { "(bad)",          { XX } },
4508     { "(bad)",          { XX } },
4509     { "(bad)",          { XX } },
4510     { "(bad)",          { XX } },
4511     { "(bad)",          { XX } },
4512     { "(bad)",          { XX } },
4513     { "(bad)",          { XX } },
4514     /* f0 */
4515     { "(bad)",          { XX } },
4516     { "(bad)",          { XX } },
4517     { "(bad)",          { XX } },
4518     { "(bad)",          { XX } },
4519     { "(bad)",          { XX } },
4520     { "(bad)",          { XX } },
4521     { "(bad)",          { XX } },
4522     { "(bad)",          { XX } },
4523     /* f8 */
4524     { "(bad)",          { XX } },
4525     { "(bad)",          { XX } },
4526     { "(bad)",          { XX } },
4527     { "(bad)",          { XX } },
4528     { "(bad)",          { XX } },
4529     { "(bad)",          { XX } },
4530     { "(bad)",          { XX } },
4531     { "(bad)",          { XX } },
4532   }
4533 };
4534
4535 static const struct dis386 mod_table[][2] = {
4536   {
4537     /* MOD_8D */
4538     { "leaS",           { Gv, M } },
4539     { "(bad)",          { XX } },
4540   },
4541   {
4542     /* MOD_0F01_REG_0 */
4543     { X86_64_TABLE (X86_64_0F01_REG_0) },
4544     { RM_TABLE (RM_0F01_REG_0) },
4545   },
4546   {
4547     /* MOD_0F01_REG_1 */
4548     { X86_64_TABLE (X86_64_0F01_REG_1) },
4549     { RM_TABLE (RM_0F01_REG_1) },
4550   },
4551   {
4552     /* MOD_0F01_REG_2 */
4553     { X86_64_TABLE (X86_64_0F01_REG_2) },
4554     { RM_TABLE (RM_0F01_REG_2) },
4555   },
4556   {
4557     /* MOD_0F01_REG_3 */
4558     { X86_64_TABLE (X86_64_0F01_REG_3) },
4559     { RM_TABLE (RM_0F01_REG_3) },
4560   },
4561   {
4562     /* MOD_0F01_REG_7 */
4563     { "invlpg",         { Mb } },
4564     { RM_TABLE (RM_0F01_REG_7) },
4565   },
4566   {
4567     /* MOD_0F12_PREFIX_0 */
4568     { "movlps",         { XM, EXq } },
4569     { "movhlps",        { XM, EXq } },
4570   },
4571   {
4572     /* MOD_0F13 */
4573     { "movlpX",         { EXq, XM } },
4574     { "(bad)",          { XX } },
4575   },
4576   {
4577     /* MOD_0F16_PREFIX_0 */
4578     { "movhps",         { XM, EXq } },
4579     { "movlhps",        { XM, EXq } },
4580   },
4581   {
4582     /* MOD_0F17 */
4583     { "movhpX",         { EXq, XM } },
4584     { "(bad)",          { XX } },
4585   },
4586   {
4587     /* MOD_0F18_REG_0 */
4588     { "prefetchnta",    { Mb } },
4589     { "(bad)",          { XX } },
4590   },
4591   {
4592     /* MOD_0F18_REG_1 */
4593     { "prefetcht0",     { Mb } },
4594     { "(bad)",          { XX } },
4595   },
4596   {
4597     /* MOD_0F18_REG_2 */
4598     { "prefetcht1",     { Mb } },
4599     { "(bad)",          { XX } },
4600   },
4601   {
4602     /* MOD_0F18_REG_3 */
4603     { "prefetcht2",     { Mb } },
4604     { "(bad)",          { XX } },
4605   },
4606   {
4607     /* MOD_0F20 */
4608     { "(bad)",          { XX } },
4609     { "movZ",           { Rm, Cm } },
4610   },
4611   {
4612     /* MOD_0F21 */
4613     { "(bad)",          { XX } },
4614     { "movZ",           { Rm, Dm } },
4615   },
4616   {
4617     /* MOD_0F22 */
4618     { "(bad)",          { XX } },
4619     { "movZ",           { Cm, Rm } },
4620   },
4621   {
4622     /* MOD_0F23 */
4623     { "(bad)",          { XX } },
4624     { "movZ",           { Dm, Rm } },
4625   },
4626   {
4627     /* MOD_0F24 */
4628     { THREE_BYTE_TABLE (THREE_BYTE_0F24) },
4629     { "movL",           { Rd, Td } },
4630   },
4631   {
4632     /* MOD_0F26 */
4633     { "(bad)",          { XX } },
4634     { "movL",           { Td, Rd } },
4635   },
4636   {
4637     /* MOD_0F2B_PREFIX_0 */
4638     {"movntps",         { Mx, XM } },
4639     { "(bad)",          { XX } },
4640   },
4641   {
4642     /* MOD_0F2B_PREFIX_1 */
4643     {"movntss",         { Md, XM } },
4644     { "(bad)",          { XX } },
4645   },
4646   {
4647     /* MOD_0F2B_PREFIX_2 */
4648     {"movntpd",         { Mx, XM } },
4649     { "(bad)",          { XX } },
4650   },
4651   {
4652     /* MOD_0F2B_PREFIX_3 */
4653     {"movntsd",         { Mq, XM } },
4654     { "(bad)",          { XX } },
4655   },
4656   {
4657     /* MOD_0F51 */
4658     { "(bad)",          { XX } },
4659     { "movmskpX",       { Gdq, XS } },
4660   },
4661   {
4662     /* MOD_0F71_REG_2 */
4663     { "(bad)",          { XX } },
4664     { "psrlw",          { MS, Ib } },
4665   },
4666   {
4667     /* MOD_0F71_REG_4 */
4668     { "(bad)",          { XX } },
4669     { "psraw",          { MS, Ib } },
4670   },
4671   {
4672     /* MOD_0F71_REG_6 */
4673     { "(bad)",          { XX } },
4674     { "psllw",          { MS, Ib } },
4675   },
4676   {
4677     /* MOD_0F72_REG_2 */
4678     { "(bad)",          { XX } },
4679     { "psrld",          { MS, Ib } },
4680   },
4681   {
4682     /* MOD_0F72_REG_4 */
4683     { "(bad)",          { XX } },
4684     { "psrad",          { MS, Ib } },
4685   },
4686   {
4687     /* MOD_0F72_REG_6 */
4688     { "(bad)",          { XX } },
4689     { "pslld",          { MS, Ib } },
4690   },
4691   {
4692     /* MOD_0F73_REG_2 */
4693     { "(bad)",          { XX } },
4694     { "psrlq",          { MS, Ib } },
4695   },
4696   {
4697     /* MOD_0F73_REG_3 */
4698     { "(bad)",          { XX } },
4699     { PREFIX_TABLE (PREFIX_0F73_REG_3) },
4700   },
4701   {
4702     /* MOD_0F73_REG_6 */
4703     { "(bad)",          { XX } },
4704     { "psllq",          { MS, Ib } },
4705   },
4706   {
4707     /* MOD_0F73_REG_7 */
4708     { "(bad)",          { XX } },
4709     { PREFIX_TABLE (PREFIX_0F73_REG_7) },
4710   },
4711   {
4712     /* MOD_0FAE_REG_0 */
4713     { "fxsave",         { M } },
4714     { "(bad)",          { XX } },
4715   },
4716   {
4717     /* MOD_0FAE_REG_1 */
4718     { "fxrstor",        { M } },
4719     { "(bad)",          { XX } },
4720   },
4721   {
4722     /* MOD_0FAE_REG_2 */
4723     { "ldmxcsr",        { Md } },
4724     { "(bad)",          { XX } },
4725   },
4726   {
4727     /* MOD_0FAE_REG_3 */
4728     { "stmxcsr",        { Md } },
4729     { "(bad)",          { XX } },
4730   },
4731   {
4732     /* MOD_0FAE_REG_4 */
4733     { "xsave",          { M } },
4734     { "(bad)",          { XX } },
4735   },
4736   {
4737     /* MOD_0FAE_REG_5 */
4738     { "xrstor",         { M } },
4739     { RM_TABLE (RM_0FAE_REG_5) },
4740   },
4741   {
4742     /* MOD_0FAE_REG_6 */
4743     { "(bad)",          { XX } },
4744     { RM_TABLE (RM_0FAE_REG_6) },
4745   },
4746   {
4747     /* MOD_0FAE_REG_7 */
4748     { "clflush",        { Mb } },
4749     { RM_TABLE (RM_0FAE_REG_7) },
4750   },
4751   {
4752     /* MOD_0FB2 */
4753     { "lssS",           { Gv, Mp } },
4754     { "(bad)",          { XX } },
4755   },
4756   {
4757     /* MOD_0FB4 */
4758     { "lfsS",           { Gv, Mp } },
4759     { "(bad)",          { XX } },
4760   },
4761   {
4762     /* MOD_0FB5 */
4763     { "lgsS",           { Gv, Mp } },
4764     { "(bad)",          { XX } },
4765   },
4766   {
4767     /* MOD_0FC7_REG_6 */
4768     { PREFIX_TABLE (PREFIX_0FC7_REG_6) },
4769     { "(bad)",          { XX } },
4770   },
4771   {
4772     /* MOD_0FC7_REG_7 */
4773     { "vmptrst",        { Mq } },
4774     { "(bad)",          { XX } },
4775   },
4776   {
4777     /* MOD_0FD7 */
4778     { "(bad)",          { XX } },
4779     { "pmovmskb",       { Gdq, MS } },
4780   },
4781   {
4782     /* MOD_0FE7_PREFIX_2 */
4783     { "movntdq",        { Mx, XM } },
4784     { "(bad)",          { XX } },
4785   },
4786   {
4787     /* MOD_0FF0_PREFIX_3 */
4788     { "lddqu",          { XM, M } },
4789     { "(bad)",          { XX } },
4790   },
4791   {
4792     /* MOD_0F382A_PREFIX_2 */
4793     { "movntdqa",       { XM, Mx } },
4794     { "(bad)",          { XX } },
4795   },
4796   {
4797     /* MOD_62_32BIT */
4798     { "bound{S|}",      { Gv, Ma } },
4799     { "(bad)",          { XX } },
4800   },
4801   {
4802     /* MOD_C4_32BIT */
4803     { "lesS",           { Gv, Mp } },
4804     { "(bad)",          { XX } },
4805   },
4806   {
4807     /* MOD_C5_32BIT */
4808     { "ldsS",           { Gv, Mp } },
4809     { "(bad)",          { XX } },
4810   },
4811 };
4812
4813 static const struct dis386 rm_table[][8] = {
4814   {
4815     /* RM_0F01_REG_0 */
4816     { "(bad)",          { XX } },
4817     { "vmcall",         { Skip_MODRM } },
4818     { "vmlaunch",       { Skip_MODRM } },
4819     { "vmresume",       { Skip_MODRM } },
4820     { "vmxoff",         { Skip_MODRM } },
4821     { "(bad)",          { XX } },
4822     { "(bad)",          { XX } },
4823     { "(bad)",          { XX } },
4824   },
4825   {
4826     /* RM_0F01_REG_1 */
4827     { "monitor",        { { OP_Monitor, 0 } } },
4828     { "mwait",          { { OP_Mwait, 0 } } },
4829     { "(bad)",          { XX } },
4830     { "(bad)",          { XX } },
4831     { "(bad)",          { XX } },
4832     { "(bad)",          { XX } },
4833     { "(bad)",          { XX } },
4834     { "(bad)",          { XX } },
4835   },
4836   {
4837     /* RM_0F01_REG_2 */
4838     { "xgetbv",         { Skip_MODRM } },
4839     { "xsetbv",         { Skip_MODRM } },
4840     { "(bad)",          { XX } },
4841     { "(bad)",          { XX } },
4842     { "(bad)",          { XX } },
4843     { "(bad)",          { XX } },
4844     { "(bad)",          { XX } },
4845     { "(bad)",          { XX } },
4846   },
4847   {
4848     /* RM_0F01_REG_3 */
4849     { "vmrun",          { Skip_MODRM } },
4850     { "vmmcall",        { Skip_MODRM } },
4851     { "vmload",         { Skip_MODRM } },
4852     { "vmsave",         { Skip_MODRM } },
4853     { "stgi",           { Skip_MODRM } },
4854     { "clgi",           { Skip_MODRM } },
4855     { "skinit",         { Skip_MODRM } },
4856     { "invlpga",        { Skip_MODRM } },
4857   },
4858   {
4859     /* RM_0F01_REG_7 */
4860     { "swapgs",         { Skip_MODRM } },
4861     { "rdtscp",         { Skip_MODRM } },
4862     { "(bad)",          { XX } },
4863     { "(bad)",          { XX } },
4864     { "(bad)",          { XX } },
4865     { "(bad)",          { XX } },
4866     { "(bad)",          { XX } },
4867     { "(bad)",          { XX } },
4868   },
4869   {
4870     /* RM_0FAE_REG_5 */
4871     { "lfence",         { Skip_MODRM } },
4872     { "(bad)",          { XX } },
4873     { "(bad)",          { XX } },
4874     { "(bad)",          { XX } },
4875     { "(bad)",          { XX } },
4876     { "(bad)",          { XX } },
4877     { "(bad)",          { XX } },
4878     { "(bad)",          { XX } },
4879   },
4880   {
4881     /* RM_0FAE_REG_6 */
4882     { "mfence",         { Skip_MODRM } },
4883     { "(bad)",          { XX } },
4884     { "(bad)",          { XX } },
4885     { "(bad)",          { XX } },
4886     { "(bad)",          { XX } },
4887     { "(bad)",          { XX } },
4888     { "(bad)",          { XX } },
4889     { "(bad)",          { XX } },
4890   },
4891   {
4892     /* RM_0FAE_REG_7 */
4893     { "sfence",         { Skip_MODRM } },
4894     { "(bad)",          { XX } },
4895     { "(bad)",          { XX } },
4896     { "(bad)",          { XX } },
4897     { "(bad)",          { XX } },
4898     { "(bad)",          { XX } },
4899     { "(bad)",          { XX } },
4900     { "(bad)",          { XX } },
4901   },
4902 };
4903
4904 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
4905
4906 static void
4907 ckprefix (void)
4908 {
4909   int newrex;
4910   rex = 0;
4911   prefixes = 0;
4912   used_prefixes = 0;
4913   rex_used = 0;
4914   while (1)
4915     {
4916       FETCH_DATA (the_info, codep + 1);
4917       newrex = 0;
4918       switch (*codep)
4919         {
4920         /* REX prefixes family.  */
4921         case 0x40:
4922         case 0x41:
4923         case 0x42:
4924         case 0x43:
4925         case 0x44:
4926         case 0x45:
4927         case 0x46:
4928         case 0x47:
4929         case 0x48:
4930         case 0x49:
4931         case 0x4a:
4932         case 0x4b:
4933         case 0x4c:
4934         case 0x4d:
4935         case 0x4e:
4936         case 0x4f:
4937             if (address_mode == mode_64bit)
4938               newrex = *codep;
4939             else
4940               return;
4941           break;
4942         case 0xf3:
4943           prefixes |= PREFIX_REPZ;
4944           break;
4945         case 0xf2:
4946           prefixes |= PREFIX_REPNZ;
4947           break;
4948         case 0xf0:
4949           prefixes |= PREFIX_LOCK;
4950           break;
4951         case 0x2e:
4952           prefixes |= PREFIX_CS;
4953           break;
4954         case 0x36:
4955           prefixes |= PREFIX_SS;
4956           break;
4957         case 0x3e:
4958           prefixes |= PREFIX_DS;
4959           break;
4960         case 0x26:
4961           prefixes |= PREFIX_ES;
4962           break;
4963         case 0x64:
4964           prefixes |= PREFIX_FS;
4965           break;
4966         case 0x65:
4967           prefixes |= PREFIX_GS;
4968           break;
4969         case 0x66:
4970           prefixes |= PREFIX_DATA;
4971           break;
4972         case 0x67:
4973           prefixes |= PREFIX_ADDR;
4974           break;
4975         case FWAIT_OPCODE:
4976           /* fwait is really an instruction.  If there are prefixes
4977              before the fwait, they belong to the fwait, *not* to the
4978              following instruction.  */
4979           if (prefixes || rex)
4980             {
4981               prefixes |= PREFIX_FWAIT;
4982               codep++;
4983               return;
4984             }
4985           prefixes = PREFIX_FWAIT;
4986           break;
4987         default:
4988           return;
4989         }
4990       /* Rex is ignored when followed by another prefix.  */
4991       if (rex)
4992         {
4993           rex_used = rex;
4994           return;
4995         }
4996       rex = newrex;
4997       codep++;
4998     }
4999 }
5000
5001 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
5002    prefix byte.  */
5003
5004 static const char *
5005 prefix_name (int pref, int sizeflag)
5006 {
5007   static const char *rexes [16] =
5008     {
5009       "rex",            /* 0x40 */
5010       "rex.B",          /* 0x41 */
5011       "rex.X",          /* 0x42 */
5012       "rex.XB",         /* 0x43 */
5013       "rex.R",          /* 0x44 */
5014       "rex.RB",         /* 0x45 */
5015       "rex.RX",         /* 0x46 */
5016       "rex.RXB",        /* 0x47 */
5017       "rex.W",          /* 0x48 */
5018       "rex.WB",         /* 0x49 */
5019       "rex.WX",         /* 0x4a */
5020       "rex.WXB",        /* 0x4b */
5021       "rex.WR",         /* 0x4c */
5022       "rex.WRB",        /* 0x4d */
5023       "rex.WRX",        /* 0x4e */
5024       "rex.WRXB",       /* 0x4f */
5025     };
5026
5027   switch (pref)
5028     {
5029     /* REX prefixes family.  */
5030     case 0x40:
5031     case 0x41:
5032     case 0x42:
5033     case 0x43:
5034     case 0x44:
5035     case 0x45:
5036     case 0x46:
5037     case 0x47:
5038     case 0x48:
5039     case 0x49:
5040     case 0x4a:
5041     case 0x4b:
5042     case 0x4c:
5043     case 0x4d:
5044     case 0x4e:
5045     case 0x4f:
5046       return rexes [pref - 0x40];
5047     case 0xf3:
5048       return "repz";
5049     case 0xf2:
5050       return "repnz";
5051     case 0xf0:
5052       return "lock";
5053     case 0x2e:
5054       return "cs";
5055     case 0x36:
5056       return "ss";
5057     case 0x3e:
5058       return "ds";
5059     case 0x26:
5060       return "es";
5061     case 0x64:
5062       return "fs";
5063     case 0x65:
5064       return "gs";
5065     case 0x66:
5066       return (sizeflag & DFLAG) ? "data16" : "data32";
5067     case 0x67:
5068       if (address_mode == mode_64bit)
5069         return (sizeflag & AFLAG) ? "addr32" : "addr64";
5070       else
5071         return (sizeflag & AFLAG) ? "addr16" : "addr32";
5072     case FWAIT_OPCODE:
5073       return "fwait";
5074     default:
5075       return NULL;
5076     }
5077 }
5078
5079 static char op_out[MAX_OPERANDS][100];
5080 static int op_ad, op_index[MAX_OPERANDS];
5081 static int two_source_ops;
5082 static bfd_vma op_address[MAX_OPERANDS];
5083 static bfd_vma op_riprel[MAX_OPERANDS];
5084 static bfd_vma start_pc;
5085
5086 /*
5087  *   On the 386's of 1988, the maximum length of an instruction is 15 bytes.
5088  *   (see topic "Redundant prefixes" in the "Differences from 8086"
5089  *   section of the "Virtual 8086 Mode" chapter.)
5090  * 'pc' should be the address of this instruction, it will
5091  *   be used to print the target address if this is a relative jump or call
5092  * The function returns the length of this instruction in bytes.
5093  */
5094
5095 static char intel_syntax;
5096 static char intel_mnemonic = !SYSV386_COMPAT;
5097 static char open_char;
5098 static char close_char;
5099 static char separator_char;
5100 static char scale_char;
5101
5102 /* Here for backwards compatibility.  When gdb stops using
5103    print_insn_i386_att and print_insn_i386_intel these functions can
5104    disappear, and print_insn_i386 be merged into print_insn.  */
5105 int
5106 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
5107 {
5108   intel_syntax = 0;
5109
5110   return print_insn (pc, info);
5111 }
5112
5113 int
5114 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
5115 {
5116   intel_syntax = 1;
5117
5118   return print_insn (pc, info);
5119 }
5120
5121 int
5122 print_insn_i386 (bfd_vma pc, disassemble_info *info)
5123 {
5124   intel_syntax = -1;
5125
5126   return print_insn (pc, info);
5127 }
5128
5129 void
5130 print_i386_disassembler_options (FILE *stream)
5131 {
5132   fprintf (stream, _("\n\
5133 The following i386/x86-64 specific disassembler options are supported for use\n\
5134 with the -M switch (multiple options should be separated by commas):\n"));
5135
5136   fprintf (stream, _("  x86-64      Disassemble in 64bit mode\n"));
5137   fprintf (stream, _("  i386        Disassemble in 32bit mode\n"));
5138   fprintf (stream, _("  i8086       Disassemble in 16bit mode\n"));
5139   fprintf (stream, _("  att         Display instruction in AT&T syntax\n"));
5140   fprintf (stream, _("  intel       Display instruction in Intel syntax\n"));
5141   fprintf (stream, _("  att-mnemonic\n"
5142                      "              Display instruction in AT&T mnemonic\n"));
5143   fprintf (stream, _("  intel-mnemonic\n"
5144                      "              Display instruction in Intel mnemonic\n"));
5145   fprintf (stream, _("  addr64      Assume 64bit address size\n"));
5146   fprintf (stream, _("  addr32      Assume 32bit address size\n"));
5147   fprintf (stream, _("  addr16      Assume 16bit address size\n"));
5148   fprintf (stream, _("  data32      Assume 32bit data size\n"));
5149   fprintf (stream, _("  data16      Assume 16bit data size\n"));
5150   fprintf (stream, _("  suffix      Always display instruction suffix in AT&T syntax\n"));
5151 }
5152
5153 /* Get a pointer to struct dis386 with a valid name.  */
5154
5155 static const struct dis386 *
5156 get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
5157 {
5158   int index;
5159
5160   if (dp->name != NULL)
5161     return dp;
5162
5163   switch (dp->op[0].bytemode)
5164     {
5165     case USE_REG_TABLE:
5166       dp = &reg_table[dp->op[1].bytemode][modrm.reg];
5167       break;
5168
5169     case USE_MOD_TABLE:
5170       index = modrm.mod == 0x3 ? 1 : 0;
5171       dp = &mod_table[dp->op[1].bytemode][index];
5172       break;
5173
5174     case USE_RM_TABLE:
5175       dp = &rm_table[dp->op[1].bytemode][modrm.rm];
5176       break;
5177
5178     case USE_PREFIX_TABLE:
5179       index = 0;
5180       used_prefixes |= (prefixes & PREFIX_REPZ);
5181       if (prefixes & PREFIX_REPZ)
5182         {
5183           index = 1;
5184           repz_prefix = NULL;
5185         }
5186       else
5187         {
5188           /* We should check PREFIX_REPNZ and PREFIX_REPZ before
5189              PREFIX_DATA.  */
5190           used_prefixes |= (prefixes & PREFIX_REPNZ);
5191           if (prefixes & PREFIX_REPNZ)
5192             {
5193               index = 3;
5194               repnz_prefix = NULL;
5195             }
5196           else
5197             {
5198               used_prefixes |= (prefixes & PREFIX_DATA);
5199               if (prefixes & PREFIX_DATA)
5200                 {
5201                   index = 2;
5202                   data_prefix = NULL;
5203                 }
5204             }
5205         }
5206       dp = &prefix_table[dp->op[1].bytemode][index];
5207       break;
5208
5209     case USE_X86_64_TABLE:
5210       index = address_mode == mode_64bit ? 1 : 0;
5211       dp = &x86_64_table[dp->op[1].bytemode][index];
5212       break;
5213
5214     case USE_3BYTE_TABLE:
5215       FETCH_DATA (info, codep + 2);
5216       index = *codep++;
5217       dp = &three_byte_table[dp->op[1].bytemode][index];
5218       modrm.mod = (*codep >> 6) & 3;
5219       modrm.reg = (*codep >> 3) & 7;
5220       modrm.rm = *codep & 7;
5221       break;
5222
5223     default:
5224       oappend (INTERNAL_DISASSEMBLER_ERROR);
5225       return NULL;
5226     }
5227
5228   if (dp->name != NULL)
5229     return dp;
5230   else
5231     return get_valid_dis386 (dp, info);
5232 }
5233
5234 static int
5235 print_insn (bfd_vma pc, disassemble_info *info)
5236 {
5237   const struct dis386 *dp;
5238   int i;
5239   char *op_txt[MAX_OPERANDS];
5240   int needcomma;
5241   int sizeflag;
5242   const char *p;
5243   struct dis_private priv;
5244   unsigned char op;
5245   char prefix_obuf[32];
5246   char *prefix_obufp;
5247
5248   if (info->mach == bfd_mach_x86_64_intel_syntax
5249       || info->mach == bfd_mach_x86_64)
5250     address_mode = mode_64bit;
5251   else
5252     address_mode = mode_32bit;
5253
5254   if (intel_syntax == (char) -1)
5255     intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
5256                     || info->mach == bfd_mach_x86_64_intel_syntax);
5257
5258   if (info->mach == bfd_mach_i386_i386
5259       || info->mach == bfd_mach_x86_64
5260       || info->mach == bfd_mach_i386_i386_intel_syntax
5261       || info->mach == bfd_mach_x86_64_intel_syntax)
5262     priv.orig_sizeflag = AFLAG | DFLAG;
5263   else if (info->mach == bfd_mach_i386_i8086)
5264     priv.orig_sizeflag = 0;
5265   else
5266     abort ();
5267
5268   for (p = info->disassembler_options; p != NULL; )
5269     {
5270       if (CONST_STRNEQ (p, "x86-64"))
5271         {
5272           address_mode = mode_64bit;
5273           priv.orig_sizeflag = AFLAG | DFLAG;
5274         }
5275       else if (CONST_STRNEQ (p, "i386"))
5276         {
5277           address_mode = mode_32bit;
5278           priv.orig_sizeflag = AFLAG | DFLAG;
5279         }
5280       else if (CONST_STRNEQ (p, "i8086"))
5281         {
5282           address_mode = mode_16bit;
5283           priv.orig_sizeflag = 0;
5284         }
5285       else if (CONST_STRNEQ (p, "intel"))
5286         {
5287           intel_syntax = 1;
5288           if (CONST_STRNEQ (p + 5, "-mnemonic"))
5289             intel_mnemonic = 1;
5290         }
5291       else if (CONST_STRNEQ (p, "att"))
5292         {
5293           intel_syntax = 0;
5294           if (CONST_STRNEQ (p + 3, "-mnemonic"))
5295             intel_mnemonic = 0;
5296         }
5297       else if (CONST_STRNEQ (p, "addr"))
5298         {
5299           if (address_mode == mode_64bit)
5300             {
5301               if (p[4] == '3' && p[5] == '2')
5302                 priv.orig_sizeflag &= ~AFLAG;
5303               else if (p[4] == '6' && p[5] == '4')
5304                 priv.orig_sizeflag |= AFLAG;
5305             }
5306           else
5307             {
5308               if (p[4] == '1' && p[5] == '6')
5309                 priv.orig_sizeflag &= ~AFLAG;
5310               else if (p[4] == '3' && p[5] == '2')
5311                 priv.orig_sizeflag |= AFLAG;
5312             }
5313         }
5314       else if (CONST_STRNEQ (p, "data"))
5315         {
5316           if (p[4] == '1' && p[5] == '6')
5317             priv.orig_sizeflag &= ~DFLAG;
5318           else if (p[4] == '3' && p[5] == '2')
5319             priv.orig_sizeflag |= DFLAG;
5320         }
5321       else if (CONST_STRNEQ (p, "suffix"))
5322         priv.orig_sizeflag |= SUFFIX_ALWAYS;
5323
5324       p = strchr (p, ',');
5325       if (p != NULL)
5326         p++;
5327     }
5328
5329   if (intel_syntax)
5330     {
5331       names64 = intel_names64;
5332       names32 = intel_names32;
5333       names16 = intel_names16;
5334       names8 = intel_names8;
5335       names8rex = intel_names8rex;
5336       names_seg = intel_names_seg;
5337       index64 = intel_index64;
5338       index32 = intel_index32;
5339       index16 = intel_index16;
5340       open_char = '[';
5341       close_char = ']';
5342       separator_char = '+';
5343       scale_char = '*';
5344     }
5345   else
5346     {
5347       names64 = att_names64;
5348       names32 = att_names32;
5349       names16 = att_names16;
5350       names8 = att_names8;
5351       names8rex = att_names8rex;
5352       names_seg = att_names_seg;
5353       index64 = att_index64;
5354       index32 = att_index32;
5355       index16 = att_index16;
5356       open_char = '(';
5357       close_char =  ')';
5358       separator_char = ',';
5359       scale_char = ',';
5360     }
5361
5362   /* The output looks better if we put 7 bytes on a line, since that
5363      puts most long word instructions on a single line.  */
5364   info->bytes_per_line = 7;
5365
5366   info->private_data = &priv;
5367   priv.max_fetched = priv.the_buffer;
5368   priv.insn_start = pc;
5369
5370   obuf[0] = 0;
5371   for (i = 0; i < MAX_OPERANDS; ++i)
5372     {
5373       op_out[i][0] = 0;
5374       op_index[i] = -1;
5375     }
5376
5377   the_info = info;
5378   start_pc = pc;
5379   start_codep = priv.the_buffer;
5380   codep = priv.the_buffer;
5381
5382   if (setjmp (priv.bailout) != 0)
5383     {
5384       const char *name;
5385
5386       /* Getting here means we tried for data but didn't get it.  That
5387          means we have an incomplete instruction of some sort.  Just
5388          print the first byte as a prefix or a .byte pseudo-op.  */
5389       if (codep > priv.the_buffer)
5390         {
5391           name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
5392           if (name != NULL)
5393             (*info->fprintf_func) (info->stream, "%s", name);
5394           else
5395             {
5396               /* Just print the first byte as a .byte instruction.  */
5397               (*info->fprintf_func) (info->stream, ".byte 0x%x",
5398                                      (unsigned int) priv.the_buffer[0]);
5399             }
5400
5401           return 1;
5402         }
5403
5404       return -1;
5405     }
5406
5407   obufp = obuf;
5408   ckprefix ();
5409
5410   insn_codep = codep;
5411   sizeflag = priv.orig_sizeflag;
5412
5413   FETCH_DATA (info, codep + 1);
5414   two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
5415
5416   if (((prefixes & PREFIX_FWAIT)
5417        && ((*codep < 0xd8) || (*codep > 0xdf)))
5418       || (rex && rex_used))
5419     {
5420       const char *name;
5421
5422       /* fwait not followed by floating point instruction, or rex followed
5423          by other prefixes.  Print the first prefix.  */
5424       name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
5425       if (name == NULL)
5426         name = INTERNAL_DISASSEMBLER_ERROR;
5427       (*info->fprintf_func) (info->stream, "%s", name);
5428       return 1;
5429     }
5430
5431   op = 0;
5432   if (*codep == 0x0f)
5433     {
5434       unsigned char threebyte;
5435       FETCH_DATA (info, codep + 2);
5436       threebyte = *++codep;
5437       dp = &dis386_twobyte[threebyte];
5438       need_modrm = twobyte_has_modrm[*codep];
5439       codep++;
5440     }
5441   else
5442     {
5443       dp = &dis386[*codep];
5444       need_modrm = onebyte_has_modrm[*codep];
5445       codep++;
5446     }
5447
5448   if ((prefixes & PREFIX_REPZ))
5449     {
5450       repz_prefix = "repz ";
5451       used_prefixes |= PREFIX_REPZ;
5452     }
5453   else
5454     repz_prefix = NULL;
5455
5456   if ((prefixes & PREFIX_REPNZ))
5457     {
5458       repnz_prefix = "repnz ";
5459       used_prefixes |= PREFIX_REPNZ;
5460     }
5461   else
5462     repnz_prefix = NULL;
5463
5464   if ((prefixes & PREFIX_LOCK))
5465     {
5466       lock_prefix = "lock ";
5467       used_prefixes |= PREFIX_LOCK;
5468     }
5469   else
5470     lock_prefix = NULL;
5471
5472   addr_prefix = NULL;
5473   if (prefixes & PREFIX_ADDR)
5474     {
5475       sizeflag ^= AFLAG;
5476       if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
5477         {
5478           if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5479             addr_prefix = "addr32 ";
5480           else
5481             addr_prefix = "addr16 ";
5482           used_prefixes |= PREFIX_ADDR;
5483         }
5484     }
5485
5486   data_prefix = NULL;
5487   if ((prefixes & PREFIX_DATA))
5488     {
5489       sizeflag ^= DFLAG;
5490       if (dp->op[2].bytemode == cond_jump_mode
5491           && dp->op[0].bytemode == v_mode
5492           && !intel_syntax)
5493         {
5494           if (sizeflag & DFLAG)
5495             data_prefix = "data32 ";
5496           else
5497             data_prefix = "data16 ";
5498           used_prefixes |= PREFIX_DATA;
5499         }
5500     }
5501
5502   if (need_modrm)
5503     {
5504       FETCH_DATA (info, codep + 1);
5505       modrm.mod = (*codep >> 6) & 3;
5506       modrm.reg = (*codep >> 3) & 7;
5507       modrm.rm = *codep & 7;
5508     }
5509
5510   if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
5511     {
5512       dofloat (sizeflag);
5513     }
5514   else
5515     {
5516       dp = get_valid_dis386 (dp, info);
5517       if (dp != NULL && putop (dp->name, sizeflag) == 0)
5518         {
5519           for (i = 0; i < MAX_OPERANDS; ++i)
5520             {
5521               obufp = op_out[i];
5522               op_ad = MAX_OPERANDS - 1 - i;
5523               if (dp->op[i].rtn)
5524                 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
5525             }
5526         }
5527     }
5528
5529   /* See if any prefixes were not used.  If so, print the first one
5530      separately.  If we don't do this, we'll wind up printing an
5531      instruction stream which does not precisely correspond to the
5532      bytes we are disassembling.  */
5533   if ((prefixes & ~used_prefixes) != 0)
5534     {
5535       const char *name;
5536
5537       name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
5538       if (name == NULL)
5539         name = INTERNAL_DISASSEMBLER_ERROR;
5540       (*info->fprintf_func) (info->stream, "%s", name);
5541       return 1;
5542     }
5543   if (rex & ~rex_used)
5544     {
5545       const char *name;
5546       name = prefix_name (rex | 0x40, priv.orig_sizeflag);
5547       if (name == NULL)
5548         name = INTERNAL_DISASSEMBLER_ERROR;
5549       (*info->fprintf_func) (info->stream, "%s ", name);
5550     }
5551
5552   prefix_obuf[0] = 0;
5553   prefix_obufp = prefix_obuf;
5554   if (lock_prefix)
5555     prefix_obufp = stpcpy (prefix_obufp, lock_prefix);
5556   if (repz_prefix)
5557     prefix_obufp = stpcpy (prefix_obufp, repz_prefix);
5558   if (repnz_prefix)
5559     prefix_obufp = stpcpy (prefix_obufp, repnz_prefix);
5560   if (addr_prefix)
5561     prefix_obufp = stpcpy (prefix_obufp, addr_prefix);
5562   if (data_prefix)
5563     prefix_obufp = stpcpy (prefix_obufp, data_prefix);
5564
5565   if (prefix_obuf[0] != 0)
5566     (*info->fprintf_func) (info->stream, "%s", prefix_obuf);
5567
5568   obufp = obuf + strlen (obuf);
5569   for (i = strlen (obuf) + strlen (prefix_obuf); i < 6; i++)
5570     oappend (" ");
5571   oappend (" ");
5572   (*info->fprintf_func) (info->stream, "%s", obuf);
5573
5574   /* The enter and bound instructions are printed with operands in the same
5575      order as the intel book; everything else is printed in reverse order.  */
5576   if (intel_syntax || two_source_ops)
5577     {
5578       bfd_vma riprel;
5579
5580       for (i = 0; i < MAX_OPERANDS; ++i)
5581         op_txt[i] = op_out[i];
5582
5583       for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
5584         {
5585           op_ad = op_index[i];
5586           op_index[i] = op_index[MAX_OPERANDS - 1 - i];
5587           op_index[MAX_OPERANDS - 1 - i] = op_ad;
5588           riprel = op_riprel[i];
5589           op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
5590           op_riprel[MAX_OPERANDS - 1 - i] = riprel;
5591         }
5592     }
5593   else
5594     {
5595       for (i = 0; i < MAX_OPERANDS; ++i)
5596         op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
5597     }
5598
5599   needcomma = 0;
5600   for (i = 0; i < MAX_OPERANDS; ++i)
5601     if (*op_txt[i])
5602       {
5603         if (needcomma)
5604           (*info->fprintf_func) (info->stream, ",");
5605         if (op_index[i] != -1 && !op_riprel[i])
5606           (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
5607         else
5608           (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
5609         needcomma = 1;
5610       }
5611
5612   for (i = 0; i < MAX_OPERANDS; i++)
5613     if (op_index[i] != -1 && op_riprel[i])
5614       {
5615         (*info->fprintf_func) (info->stream, "        # ");
5616         (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
5617                                                 + op_address[op_index[i]]), info);
5618         break;
5619       }
5620   return codep - priv.the_buffer;
5621 }
5622
5623 static const char *float_mem[] = {
5624   /* d8 */
5625   "fadd{s|}",
5626   "fmul{s|}",
5627   "fcom{s|}",
5628   "fcomp{s|}",
5629   "fsub{s|}",
5630   "fsubr{s|}",
5631   "fdiv{s|}",
5632   "fdivr{s|}",
5633   /* d9 */
5634   "fld{s|}",
5635   "(bad)",
5636   "fst{s|}",
5637   "fstp{s|}",
5638   "fldenvIC",
5639   "fldcw",
5640   "fNstenvIC",
5641   "fNstcw",
5642   /* da */
5643   "fiadd{l|}",
5644   "fimul{l|}",
5645   "ficom{l|}",
5646   "ficomp{l|}",
5647   "fisub{l|}",
5648   "fisubr{l|}",
5649   "fidiv{l|}",
5650   "fidivr{l|}",
5651   /* db */
5652   "fild{l|}",
5653   "fisttp{l|}",
5654   "fist{l|}",
5655   "fistp{l|}",
5656   "(bad)",
5657   "fld{t||t|}",
5658   "(bad)",
5659   "fstp{t||t|}",
5660   /* dc */
5661   "fadd{l|}",
5662   "fmul{l|}",
5663   "fcom{l|}",
5664   "fcomp{l|}",
5665   "fsub{l|}",
5666   "fsubr{l|}",
5667   "fdiv{l|}",
5668   "fdivr{l|}",
5669   /* dd */
5670   "fld{l|}",
5671   "fisttp{ll|}",
5672   "fst{l||}",
5673   "fstp{l|}",
5674   "frstorIC",
5675   "(bad)",
5676   "fNsaveIC",
5677   "fNstsw",
5678   /* de */
5679   "fiadd",
5680   "fimul",
5681   "ficom",
5682   "ficomp",
5683   "fisub",
5684   "fisubr",
5685   "fidiv",
5686   "fidivr",
5687   /* df */
5688   "fild",
5689   "fisttp",
5690   "fist",
5691   "fistp",
5692   "fbld",
5693   "fild{ll|}",
5694   "fbstp",
5695   "fistp{ll|}",
5696 };
5697
5698 static const unsigned char float_mem_mode[] = {
5699   /* d8 */
5700   d_mode,
5701   d_mode,
5702   d_mode,
5703   d_mode,
5704   d_mode,
5705   d_mode,
5706   d_mode,
5707   d_mode,
5708   /* d9 */
5709   d_mode,
5710   0,
5711   d_mode,
5712   d_mode,
5713   0,
5714   w_mode,
5715   0,
5716   w_mode,
5717   /* da */
5718   d_mode,
5719   d_mode,
5720   d_mode,
5721   d_mode,
5722   d_mode,
5723   d_mode,
5724   d_mode,
5725   d_mode,
5726   /* db */
5727   d_mode,
5728   d_mode,
5729   d_mode,
5730   d_mode,
5731   0,
5732   t_mode,
5733   0,
5734   t_mode,
5735   /* dc */
5736   q_mode,
5737   q_mode,
5738   q_mode,
5739   q_mode,
5740   q_mode,
5741   q_mode,
5742   q_mode,
5743   q_mode,
5744   /* dd */
5745   q_mode,
5746   q_mode,
5747   q_mode,
5748   q_mode,
5749   0,
5750   0,
5751   0,
5752   w_mode,
5753   /* de */
5754   w_mode,
5755   w_mode,
5756   w_mode,
5757   w_mode,
5758   w_mode,
5759   w_mode,
5760   w_mode,
5761   w_mode,
5762   /* df */
5763   w_mode,
5764   w_mode,
5765   w_mode,
5766   w_mode,
5767   t_mode,
5768   q_mode,
5769   t_mode,
5770   q_mode
5771 };
5772
5773 #define ST { OP_ST, 0 }
5774 #define STi { OP_STi, 0 }
5775
5776 #define FGRPd9_2 NULL, { { NULL, 0 } }
5777 #define FGRPd9_4 NULL, { { NULL, 1 } }
5778 #define FGRPd9_5 NULL, { { NULL, 2 } }
5779 #define FGRPd9_6 NULL, { { NULL, 3 } }
5780 #define FGRPd9_7 NULL, { { NULL, 4 } }
5781 #define FGRPda_5 NULL, { { NULL, 5 } }
5782 #define FGRPdb_4 NULL, { { NULL, 6 } }
5783 #define FGRPde_3 NULL, { { NULL, 7 } }
5784 #define FGRPdf_4 NULL, { { NULL, 8 } }
5785
5786 static const struct dis386 float_reg[][8] = {
5787   /* d8 */
5788   {
5789     { "fadd",   { ST, STi } },
5790     { "fmul",   { ST, STi } },
5791     { "fcom",   { STi } },
5792     { "fcomp",  { STi } },
5793     { "fsub",   { ST, STi } },
5794     { "fsubr",  { ST, STi } },
5795     { "fdiv",   { ST, STi } },
5796     { "fdivr",  { ST, STi } },
5797   },
5798   /* d9 */
5799   {
5800     { "fld",    { STi } },
5801     { "fxch",   { STi } },
5802     { FGRPd9_2 },
5803     { "(bad)",  { XX } },
5804     { FGRPd9_4 },
5805     { FGRPd9_5 },
5806     { FGRPd9_6 },
5807     { FGRPd9_7 },
5808   },
5809   /* da */
5810   {
5811     { "fcmovb", { ST, STi } },
5812     { "fcmove", { ST, STi } },
5813     { "fcmovbe",{ ST, STi } },
5814     { "fcmovu", { ST, STi } },
5815     { "(bad)",  { XX } },
5816     { FGRPda_5 },
5817     { "(bad)",  { XX } },
5818     { "(bad)",  { XX } },
5819   },
5820   /* db */
5821   {
5822     { "fcmovnb",{ ST, STi } },
5823     { "fcmovne",{ ST, STi } },
5824     { "fcmovnbe",{ ST, STi } },
5825     { "fcmovnu",{ ST, STi } },
5826     { FGRPdb_4 },
5827     { "fucomi", { ST, STi } },
5828     { "fcomi",  { ST, STi } },
5829     { "(bad)",  { XX } },
5830   },
5831   /* dc */
5832   {
5833     { "fadd",   { STi, ST } },
5834     { "fmul",   { STi, ST } },
5835     { "(bad)",  { XX } },
5836     { "(bad)",  { XX } },
5837     { "fsub!M", { STi, ST } },
5838     { "fsubM",  { STi, ST } },
5839     { "fdiv!M", { STi, ST } },
5840     { "fdivM",  { STi, ST } },
5841   },
5842   /* dd */
5843   {
5844     { "ffree",  { STi } },
5845     { "(bad)",  { XX } },
5846     { "fst",    { STi } },
5847     { "fstp",   { STi } },
5848     { "fucom",  { STi } },
5849     { "fucomp", { STi } },
5850     { "(bad)",  { XX } },
5851     { "(bad)",  { XX } },
5852   },
5853   /* de */
5854   {
5855     { "faddp",  { STi, ST } },
5856     { "fmulp",  { STi, ST } },
5857     { "(bad)",  { XX } },
5858     { FGRPde_3 },
5859     { "fsub!Mp", { STi, ST } },
5860     { "fsubMp", { STi, ST } },
5861     { "fdiv!Mp", { STi, ST } },
5862     { "fdivMp", { STi, ST } },
5863   },
5864   /* df */
5865   {
5866     { "ffreep", { STi } },
5867     { "(bad)",  { XX } },
5868     { "(bad)",  { XX } },
5869     { "(bad)",  { XX } },
5870     { FGRPdf_4 },
5871     { "fucomip", { ST, STi } },
5872     { "fcomip", { ST, STi } },
5873     { "(bad)",  { XX } },
5874   },
5875 };
5876
5877 static char *fgrps[][8] = {
5878   /* d9_2  0 */
5879   {
5880     "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5881   },
5882
5883   /* d9_4  1 */
5884   {
5885     "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
5886   },
5887
5888   /* d9_5  2 */
5889   {
5890     "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
5891   },
5892
5893   /* d9_6  3 */
5894   {
5895     "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
5896   },
5897
5898   /* d9_7  4 */
5899   {
5900     "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
5901   },
5902
5903   /* da_5  5 */
5904   {
5905     "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5906   },
5907
5908   /* db_4  6 */
5909   {
5910     "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
5911     "fNsetpm(287 only)","(bad)","(bad)","(bad)",
5912   },
5913
5914   /* de_3  7 */
5915   {
5916     "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5917   },
5918
5919   /* df_4  8 */
5920   {
5921     "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5922   },
5923 };
5924
5925 static void
5926 OP_Skip_MODRM (int bytemode ATTRIBUTE_UNUSED,
5927                int sizeflag ATTRIBUTE_UNUSED)
5928 {
5929   /* Skip mod/rm byte.  */
5930   MODRM_CHECK;
5931   codep++;
5932 }
5933
5934 static void
5935 dofloat (int sizeflag)
5936 {
5937   const struct dis386 *dp;
5938   unsigned char floatop;
5939
5940   floatop = codep[-1];
5941
5942   if (modrm.mod != 3)
5943     {
5944       int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
5945
5946       putop (float_mem[fp_indx], sizeflag);
5947       obufp = op_out[0];
5948       op_ad = 2;
5949       OP_E (float_mem_mode[fp_indx], sizeflag);
5950       return;
5951     }
5952   /* Skip mod/rm byte.  */
5953   MODRM_CHECK;
5954   codep++;
5955
5956   dp = &float_reg[floatop - 0xd8][modrm.reg];
5957   if (dp->name == NULL)
5958     {
5959       putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
5960
5961       /* Instruction fnstsw is only one with strange arg.  */
5962       if (floatop == 0xdf && codep[-1] == 0xe0)
5963         strcpy (op_out[0], names16[0]);
5964     }
5965   else
5966     {
5967       putop (dp->name, sizeflag);
5968
5969       obufp = op_out[0];
5970       op_ad = 2;
5971       if (dp->op[0].rtn)
5972         (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
5973
5974       obufp = op_out[1];
5975       op_ad = 1;
5976       if (dp->op[1].rtn)
5977         (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
5978     }
5979 }
5980
5981 static void
5982 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5983 {
5984   oappend ("%st" + intel_syntax);
5985 }
5986
5987 static void
5988 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5989 {
5990   sprintf (scratchbuf, "%%st(%d)", modrm.rm);
5991   oappend (scratchbuf + intel_syntax);
5992 }
5993
5994 /* Capital letters in template are macros.  */
5995 static int
5996 putop (const char *template, int sizeflag)
5997 {
5998   const char *p;
5999   int alt = 0;
6000   int cond = 1;
6001   unsigned int l = 0, len = 1;
6002   char last[4];
6003
6004 #define SAVE_LAST(c)                    \
6005   if (l < len && l < sizeof (last))     \
6006     last[l++] = c;                      \
6007   else                                  \
6008     abort ();
6009
6010   for (p = template; *p; p++)
6011     {
6012       switch (*p)
6013         {
6014         default:
6015           *obufp++ = *p;
6016           break;
6017         case '%':
6018           len++;
6019           break;
6020         case '!':
6021           cond = 0;
6022           break;
6023         case '{':
6024           alt = 0;
6025           if (intel_syntax)
6026             {
6027               while (*++p != '|')
6028                 if (*p == '}' || *p == '\0')
6029                   abort ();
6030             }
6031           /* Fall through.  */
6032         case 'I':
6033           alt = 1;
6034           continue;
6035         case '|':
6036           while (*++p != '}')
6037             {
6038               if (*p == '\0')
6039                 abort ();
6040             }
6041           break;
6042         case '}':
6043           break;
6044         case 'A':
6045           if (intel_syntax)
6046             break;
6047           if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
6048             *obufp++ = 'b';
6049           break;
6050         case 'B':
6051           if (intel_syntax)
6052             break;
6053           if (sizeflag & SUFFIX_ALWAYS)
6054             *obufp++ = 'b';
6055           break;
6056         case 'C':
6057           if (intel_syntax && !alt)
6058             break;
6059           if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
6060             {
6061               if (sizeflag & DFLAG)
6062                 *obufp++ = intel_syntax ? 'd' : 'l';
6063               else
6064                 *obufp++ = intel_syntax ? 'w' : 's';
6065               used_prefixes |= (prefixes & PREFIX_DATA);
6066             }
6067           break;
6068         case 'D':
6069           if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
6070             break;
6071           USED_REX (REX_W);
6072           if (modrm.mod == 3)
6073             {
6074               if (rex & REX_W)
6075                 *obufp++ = 'q';
6076               else if (sizeflag & DFLAG)
6077                 *obufp++ = intel_syntax ? 'd' : 'l';
6078               else
6079                 *obufp++ = 'w';
6080               used_prefixes |= (prefixes & PREFIX_DATA);
6081             }
6082           else
6083             *obufp++ = 'w';
6084           break;
6085         case 'E':               /* For jcxz/jecxz */
6086           if (address_mode == mode_64bit)
6087             {
6088               if (sizeflag & AFLAG)
6089                 *obufp++ = 'r';
6090               else
6091                 *obufp++ = 'e';
6092             }
6093           else
6094             if (sizeflag & AFLAG)
6095               *obufp++ = 'e';
6096           used_prefixes |= (prefixes & PREFIX_ADDR);
6097           break;
6098         case 'F':
6099           if (intel_syntax)
6100             break;
6101           if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
6102             {
6103               if (sizeflag & AFLAG)
6104                 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
6105               else
6106                 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
6107               used_prefixes |= (prefixes & PREFIX_ADDR);
6108             }
6109           break;
6110         case 'G':
6111           if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
6112             break;
6113           if ((rex & REX_W) || (sizeflag & DFLAG))
6114             *obufp++ = 'l';
6115           else
6116             *obufp++ = 'w';
6117           if (!(rex & REX_W))
6118             used_prefixes |= (prefixes & PREFIX_DATA);
6119           break;
6120         case 'H':
6121           if (intel_syntax)
6122             break;
6123           if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
6124               || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
6125             {
6126               used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
6127               *obufp++ = ',';
6128               *obufp++ = 'p';
6129               if (prefixes & PREFIX_DS)
6130                 *obufp++ = 't';
6131               else
6132                 *obufp++ = 'n';
6133             }
6134           break;
6135         case 'J':
6136           if (intel_syntax)
6137             break;
6138           *obufp++ = 'l';
6139           break;
6140         case 'K':
6141           USED_REX (REX_W);
6142           if (rex & REX_W)
6143             *obufp++ = 'q';
6144           else
6145             *obufp++ = 'd';
6146           break;
6147         case 'Z':
6148           if (intel_syntax)
6149             break;
6150           if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
6151             {
6152               *obufp++ = 'q';
6153               break;
6154             }
6155           /* Fall through.  */
6156           goto case_L;
6157         case 'L':
6158           if (l != 0 || len != 1)
6159             {
6160               SAVE_LAST (*p);
6161               break;
6162             }
6163 case_L:
6164           if (intel_syntax)
6165             break;
6166           if (sizeflag & SUFFIX_ALWAYS)
6167             *obufp++ = 'l';
6168           break;
6169         case 'M':
6170           if (intel_mnemonic != cond)
6171             *obufp++ = 'r';
6172           break;
6173         case 'N':
6174           if ((prefixes & PREFIX_FWAIT) == 0)
6175             *obufp++ = 'n';
6176           else
6177             used_prefixes |= PREFIX_FWAIT;
6178           break;
6179         case 'O':
6180           USED_REX (REX_W);
6181           if (rex & REX_W)
6182             *obufp++ = 'o';
6183           else if (intel_syntax && (sizeflag & DFLAG))
6184             *obufp++ = 'q';
6185           else
6186             *obufp++ = 'd';
6187           if (!(rex & REX_W))
6188             used_prefixes |= (prefixes & PREFIX_DATA);
6189           break;
6190         case 'T':
6191           if (intel_syntax)
6192             break;
6193           if (address_mode == mode_64bit && (sizeflag & DFLAG))
6194             {
6195               *obufp++ = 'q';
6196               break;
6197             }
6198           /* Fall through.  */
6199         case 'P':
6200           if (intel_syntax)
6201             break;
6202           if ((prefixes & PREFIX_DATA)
6203               || (rex & REX_W)
6204               || (sizeflag & SUFFIX_ALWAYS))
6205             {
6206               USED_REX (REX_W);
6207               if (rex & REX_W)
6208                 *obufp++ = 'q';
6209               else
6210                 {
6211                    if (sizeflag & DFLAG)
6212                       *obufp++ = 'l';
6213                    else
6214                      *obufp++ = 'w';
6215                 }
6216               used_prefixes |= (prefixes & PREFIX_DATA);
6217             }
6218           break;
6219         case 'U':
6220           if (intel_syntax)
6221             break;
6222           if (address_mode == mode_64bit && (sizeflag & DFLAG))
6223             {
6224               if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
6225                 *obufp++ = 'q';
6226               break;
6227             }
6228           /* Fall through.  */
6229           goto case_Q;
6230         case 'Q':
6231           if (l == 0 && len == 1)
6232             {
6233 case_Q:
6234               if (intel_syntax && !alt)
6235                 break;
6236               USED_REX (REX_W);
6237               if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
6238                 {
6239                   if (rex & REX_W)
6240                     *obufp++ = 'q';
6241                   else
6242                     {
6243                       if (sizeflag & DFLAG)
6244                         *obufp++ = intel_syntax ? 'd' : 'l';
6245                       else
6246                         *obufp++ = 'w';
6247                     }
6248                   used_prefixes |= (prefixes & PREFIX_DATA);
6249                 }
6250             }
6251           else
6252             {
6253               if (l != 1 || len != 2 || last[0] != 'L')
6254                 {
6255                   SAVE_LAST (*p);
6256                   break;
6257                 }
6258               if (intel_syntax
6259                   || (modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)))
6260                 break;
6261               if ((rex & REX_W))
6262                 {
6263                   USED_REX (REX_W);
6264                   *obufp++ = 'q';
6265                 }
6266               else
6267                 *obufp++ = 'l';
6268             }
6269           break;
6270         case 'R':
6271           USED_REX (REX_W);
6272           if (rex & REX_W)
6273             *obufp++ = 'q';
6274           else if (sizeflag & DFLAG)
6275             {
6276               if (intel_syntax)
6277                   *obufp++ = 'd';
6278               else
6279                   *obufp++ = 'l';
6280             }
6281           else
6282             *obufp++ = 'w';
6283           if (intel_syntax && !p[1]
6284               && ((rex & REX_W) || (sizeflag & DFLAG)))
6285             *obufp++ = 'e';
6286           if (!(rex & REX_W))
6287             used_prefixes |= (prefixes & PREFIX_DATA);
6288           break;
6289         case 'V':
6290           if (intel_syntax)
6291             break;
6292           if (address_mode == mode_64bit && (sizeflag & DFLAG))
6293             {
6294               if (sizeflag & SUFFIX_ALWAYS)
6295                 *obufp++ = 'q';
6296               break;
6297             }
6298           /* Fall through.  */
6299         case 'S':
6300           if (intel_syntax)
6301             break;
6302           if (sizeflag & SUFFIX_ALWAYS)
6303             {
6304               if (rex & REX_W)
6305                 *obufp++ = 'q';
6306               else
6307                 {
6308                   if (sizeflag & DFLAG)
6309                     *obufp++ = 'l';
6310                   else
6311                     *obufp++ = 'w';
6312                   used_prefixes |= (prefixes & PREFIX_DATA);
6313                 }
6314             }
6315           break;
6316         case 'X':
6317           if (prefixes & PREFIX_DATA)
6318             *obufp++ = 'd';
6319           else
6320             *obufp++ = 's';
6321           used_prefixes |= (prefixes & PREFIX_DATA);
6322           break;
6323         case 'Y':
6324           if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
6325             break;
6326           if (rex & REX_W)
6327             {
6328               USED_REX (REX_W);
6329               *obufp++ = 'q';
6330             }
6331           break;
6332           /* implicit operand size 'l' for i386 or 'q' for x86-64 */
6333         case 'W':
6334           /* operand size flag for cwtl, cbtw */
6335           USED_REX (REX_W);
6336           if (rex & REX_W)
6337             {
6338               if (intel_syntax)
6339                 *obufp++ = 'd';
6340               else
6341                 *obufp++ = 'l';
6342             }
6343           else if (sizeflag & DFLAG)
6344             *obufp++ = 'w';
6345           else
6346             *obufp++ = 'b';
6347           if (!(rex & REX_W))
6348             used_prefixes |= (prefixes & PREFIX_DATA);
6349           break;
6350         }
6351       alt = 0;
6352     }
6353   *obufp = 0;
6354   return 0;
6355 }
6356
6357 static void
6358 oappend (const char *s)
6359 {
6360   strcpy (obufp, s);
6361   obufp += strlen (s);
6362 }
6363
6364 static void
6365 append_seg (void)
6366 {
6367   if (prefixes & PREFIX_CS)
6368     {
6369       used_prefixes |= PREFIX_CS;
6370       oappend ("%cs:" + intel_syntax);
6371     }
6372   if (prefixes & PREFIX_DS)
6373     {
6374       used_prefixes |= PREFIX_DS;
6375       oappend ("%ds:" + intel_syntax);
6376     }
6377   if (prefixes & PREFIX_SS)
6378     {
6379       used_prefixes |= PREFIX_SS;
6380       oappend ("%ss:" + intel_syntax);
6381     }
6382   if (prefixes & PREFIX_ES)
6383     {
6384       used_prefixes |= PREFIX_ES;
6385       oappend ("%es:" + intel_syntax);
6386     }
6387   if (prefixes & PREFIX_FS)
6388     {
6389       used_prefixes |= PREFIX_FS;
6390       oappend ("%fs:" + intel_syntax);
6391     }
6392   if (prefixes & PREFIX_GS)
6393     {
6394       used_prefixes |= PREFIX_GS;
6395       oappend ("%gs:" + intel_syntax);
6396     }
6397 }
6398
6399 static void
6400 OP_indirE (int bytemode, int sizeflag)
6401 {
6402   if (!intel_syntax)
6403     oappend ("*");
6404   OP_E (bytemode, sizeflag);
6405 }
6406
6407 static void
6408 print_operand_value (char *buf, int hex, bfd_vma disp)
6409 {
6410   if (address_mode == mode_64bit)
6411     {
6412       if (hex)
6413         {
6414           char tmp[30];
6415           int i;
6416           buf[0] = '0';
6417           buf[1] = 'x';
6418           sprintf_vma (tmp, disp);
6419           for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
6420           strcpy (buf + 2, tmp + i);
6421         }
6422       else
6423         {
6424           bfd_signed_vma v = disp;
6425           char tmp[30];
6426           int i;
6427           if (v < 0)
6428             {
6429               *(buf++) = '-';
6430               v = -disp;
6431               /* Check for possible overflow on 0x8000000000000000.  */
6432               if (v < 0)
6433                 {
6434                   strcpy (buf, "9223372036854775808");
6435                   return;
6436                 }
6437             }
6438           if (!v)
6439             {
6440               strcpy (buf, "0");
6441               return;
6442             }
6443
6444           i = 0;
6445           tmp[29] = 0;
6446           while (v)
6447             {
6448               tmp[28 - i] = (v % 10) + '0';
6449               v /= 10;
6450               i++;
6451             }
6452           strcpy (buf, tmp + 29 - i);
6453         }
6454     }
6455   else
6456     {
6457       if (hex)
6458         sprintf (buf, "0x%x", (unsigned int) disp);
6459       else
6460         sprintf (buf, "%d", (int) disp);
6461     }
6462 }
6463
6464 /* Put DISP in BUF as signed hex number.  */
6465
6466 static void
6467 print_displacement (char *buf, bfd_vma disp)
6468 {
6469   bfd_signed_vma val = disp;
6470   char tmp[30];
6471   int i, j = 0;
6472
6473   if (val < 0)
6474     {
6475       buf[j++] = '-';
6476       val = -disp;
6477
6478       /* Check for possible overflow.  */
6479       if (val < 0)
6480         {
6481           switch (address_mode)
6482             {
6483             case mode_64bit:
6484               strcpy (buf + j, "0x8000000000000000");
6485               break;
6486             case mode_32bit:
6487               strcpy (buf + j, "0x80000000");
6488               break;
6489             case mode_16bit:
6490               strcpy (buf + j, "0x8000");
6491               break;
6492             }
6493           return;
6494         }
6495     }
6496
6497   buf[j++] = '0';
6498   buf[j++] = 'x';
6499
6500   sprintf_vma (tmp, val);
6501   for (i = 0; tmp[i] == '0'; i++)
6502     continue;
6503   if (tmp[i] == '\0')
6504     i--;
6505   strcpy (buf + j, tmp + i);
6506 }
6507
6508 static void
6509 intel_operand_size (int bytemode, int sizeflag)
6510 {
6511   switch (bytemode)
6512     {
6513     case b_mode:
6514     case dqb_mode:
6515       oappend ("BYTE PTR ");
6516       break;
6517     case w_mode:
6518     case dqw_mode:
6519       oappend ("WORD PTR ");
6520       break;
6521     case stack_v_mode:
6522       if (address_mode == mode_64bit && (sizeflag & DFLAG))
6523         {
6524           oappend ("QWORD PTR ");
6525           used_prefixes |= (prefixes & PREFIX_DATA);
6526           break;
6527         }
6528       /* FALLTHRU */
6529     case v_mode:
6530     case dq_mode:
6531       USED_REX (REX_W);
6532       if (rex & REX_W)
6533         oappend ("QWORD PTR ");
6534       else if ((sizeflag & DFLAG) || bytemode == dq_mode)
6535         oappend ("DWORD PTR ");
6536       else
6537         oappend ("WORD PTR ");
6538       used_prefixes |= (prefixes & PREFIX_DATA);
6539       break;
6540     case z_mode:
6541       if ((rex & REX_W) || (sizeflag & DFLAG))
6542         *obufp++ = 'D';
6543       oappend ("WORD PTR ");
6544       if (!(rex & REX_W))
6545         used_prefixes |= (prefixes & PREFIX_DATA);
6546       break;
6547     case d_mode:
6548     case dqd_mode:
6549       oappend ("DWORD PTR ");
6550       break;
6551     case q_mode:
6552       oappend ("QWORD PTR ");
6553       break;
6554     case m_mode:
6555       if (address_mode == mode_64bit)
6556         oappend ("QWORD PTR ");
6557       else
6558         oappend ("DWORD PTR ");
6559       break;
6560     case f_mode:
6561       if (sizeflag & DFLAG)
6562         oappend ("FWORD PTR ");
6563       else
6564         oappend ("DWORD PTR ");
6565       used_prefixes |= (prefixes & PREFIX_DATA);
6566       break;
6567     case t_mode:
6568       oappend ("TBYTE PTR ");
6569       break;
6570     case x_mode:
6571       oappend ("XMMWORD PTR ");
6572       break;
6573     case o_mode:
6574       oappend ("OWORD PTR ");
6575       break;
6576     default:
6577       break;
6578     }
6579 }
6580
6581 static void
6582 OP_E_extended (int bytemode, int sizeflag, int has_drex)
6583 {
6584   bfd_vma disp;
6585   int add = 0;
6586   int riprel = 0;
6587   USED_REX (REX_B);
6588   if (rex & REX_B)
6589     add += 8;
6590
6591   /* Skip mod/rm byte.  */
6592   MODRM_CHECK;
6593   codep++;
6594
6595   if (modrm.mod == 3)
6596     {
6597       switch (bytemode)
6598         {
6599         case b_mode:
6600           USED_REX (0);
6601           if (rex)
6602             oappend (names8rex[modrm.rm + add]);
6603           else
6604             oappend (names8[modrm.rm + add]);
6605           break;
6606         case w_mode:
6607           oappend (names16[modrm.rm + add]);
6608           break;
6609         case d_mode:
6610           oappend (names32[modrm.rm + add]);
6611           break;
6612         case q_mode:
6613           oappend (names64[modrm.rm + add]);
6614           break;
6615         case m_mode:
6616           if (address_mode == mode_64bit)
6617             oappend (names64[modrm.rm + add]);
6618           else
6619             oappend (names32[modrm.rm + add]);
6620           break;
6621         case stack_v_mode:
6622           if (address_mode == mode_64bit && (sizeflag & DFLAG))
6623             {
6624               oappend (names64[modrm.rm + add]);
6625               used_prefixes |= (prefixes & PREFIX_DATA);
6626               break;
6627             }
6628           bytemode = v_mode;
6629           /* FALLTHRU */
6630         case v_mode:
6631         case dq_mode:
6632         case dqb_mode:
6633         case dqd_mode:
6634         case dqw_mode:
6635           USED_REX (REX_W);
6636           if (rex & REX_W)
6637             oappend (names64[modrm.rm + add]);
6638           else if ((sizeflag & DFLAG) || bytemode != v_mode)
6639             oappend (names32[modrm.rm + add]);
6640           else
6641             oappend (names16[modrm.rm + add]);
6642           used_prefixes |= (prefixes & PREFIX_DATA);
6643           break;
6644         case 0:
6645           break;
6646         default:
6647           oappend (INTERNAL_DISASSEMBLER_ERROR);
6648           break;
6649         }
6650       return;
6651     }
6652
6653   disp = 0;
6654   if (intel_syntax)
6655     intel_operand_size (bytemode, sizeflag);
6656   append_seg ();
6657
6658   if ((sizeflag & AFLAG) || address_mode == mode_64bit)
6659     {
6660       /* 32/64 bit address mode */
6661       int havedisp;
6662       int havesib;
6663       int havebase;
6664       int haveindex;
6665       int needindex;
6666       int base, rbase;
6667       int index = 0;
6668       int scale = 0;
6669
6670       havesib = 0;
6671       havebase = 1;
6672       haveindex = 0;
6673       base = modrm.rm;
6674
6675       if (base == 4)
6676         {
6677           havesib = 1;
6678           FETCH_DATA (the_info, codep + 1);
6679           index = (*codep >> 3) & 7;
6680           scale = (*codep >> 6) & 3;
6681           base = *codep & 7;
6682           USED_REX (REX_X);
6683           if (rex & REX_X)
6684             index += 8;
6685           haveindex = index != 4;
6686           codep++;
6687         }
6688       rbase = base + add;
6689
6690       /* If we have a DREX byte, skip it now
6691          (it has already been handled) */
6692       if (has_drex)
6693         {
6694           FETCH_DATA (the_info, codep + 1);
6695           codep++;
6696         }
6697
6698       switch (modrm.mod)
6699         {
6700         case 0:
6701           if (base == 5)
6702             {
6703               havebase = 0;
6704               if (address_mode == mode_64bit && !havesib)
6705                 riprel = 1;
6706               disp = get32s ();
6707             }
6708           break;
6709         case 1:
6710           FETCH_DATA (the_info, codep + 1);
6711           disp = *codep++;
6712           if ((disp & 0x80) != 0)
6713             disp -= 0x100;
6714           break;
6715         case 2:
6716           disp = get32s ();
6717           break;
6718         }
6719
6720       /* In 32bit mode, we need index register to tell [offset] from
6721          [eiz*1 + offset].  */
6722       needindex = (havesib
6723                    && !havebase
6724                    && !haveindex
6725                    && address_mode == mode_32bit);
6726       havedisp = (havebase
6727                   || needindex
6728                   || (havesib && (haveindex || scale != 0)));
6729
6730       if (!intel_syntax)
6731         if (modrm.mod != 0 || base == 5)
6732           {
6733             if (havedisp || riprel)
6734               print_displacement (scratchbuf, disp);
6735             else
6736               print_operand_value (scratchbuf, 1, disp);
6737             oappend (scratchbuf);
6738             if (riprel)
6739               {
6740                 set_op (disp, 1);
6741                 oappend (sizeflag & AFLAG ? "(%rip)" : "(%eip)");
6742               }
6743           }
6744
6745       if (havebase || haveindex || riprel)
6746         used_prefixes |= PREFIX_ADDR;
6747
6748       if (havedisp || (intel_syntax && riprel))
6749         {
6750           *obufp++ = open_char;
6751           if (intel_syntax && riprel)
6752             {
6753               set_op (disp, 1);
6754               oappend (sizeflag & AFLAG ? "rip" : "eip");
6755             }
6756           *obufp = '\0';
6757           if (havebase)
6758             oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
6759                      ? names64[rbase] : names32[rbase]);
6760           if (havesib)
6761             {
6762               /* ESP/RSP won't allow index.  If base isn't ESP/RSP,
6763                  print index to tell base + index from base.  */
6764               if (scale != 0
6765                   || needindex
6766                   || haveindex
6767                   || (havebase && base != ESP_REG_NUM))
6768                 {
6769                   if (!intel_syntax || havebase)
6770                     {
6771                       *obufp++ = separator_char;
6772                       *obufp = '\0';
6773                     }
6774                   if (haveindex)
6775                     oappend (address_mode == mode_64bit
6776                              && (sizeflag & AFLAG)
6777                              ? names64[index] : names32[index]);
6778                   else
6779                     oappend (address_mode == mode_64bit
6780                              && (sizeflag & AFLAG)
6781                              ? index64 : index32);
6782
6783                   *obufp++ = scale_char;
6784                   *obufp = '\0';
6785                   sprintf (scratchbuf, "%d", 1 << scale);
6786                   oappend (scratchbuf);
6787                 }
6788             }
6789           if (intel_syntax
6790               && (disp || modrm.mod != 0 || base == 5))
6791             {
6792               if (!havedisp || (bfd_signed_vma) disp >= 0)
6793                 {
6794                   *obufp++ = '+';
6795                   *obufp = '\0';
6796                 }
6797               else if (modrm.mod != 1)
6798                 {
6799                   *obufp++ = '-';
6800                   *obufp = '\0';
6801                   disp = - (bfd_signed_vma) disp;
6802                 }
6803
6804               if (havedisp)
6805                 print_displacement (scratchbuf, disp);
6806               else
6807                 print_operand_value (scratchbuf, 1, disp);
6808               oappend (scratchbuf);
6809             }
6810
6811           *obufp++ = close_char;
6812           *obufp = '\0';
6813         }
6814       else if (intel_syntax)
6815         {
6816           if (modrm.mod != 0 || base == 5)
6817             {
6818               if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
6819                               | PREFIX_ES | PREFIX_FS | PREFIX_GS))
6820                 ;
6821               else
6822                 {
6823                   oappend (names_seg[ds_reg - es_reg]);
6824                   oappend (":");
6825                 }
6826               print_operand_value (scratchbuf, 1, disp);
6827               oappend (scratchbuf);
6828             }
6829         }
6830     }
6831   else
6832     { /* 16 bit address mode */
6833       switch (modrm.mod)
6834         {
6835         case 0:
6836           if (modrm.rm == 6)
6837             {
6838               disp = get16 ();
6839               if ((disp & 0x8000) != 0)
6840                 disp -= 0x10000;
6841             }
6842           break;
6843         case 1:
6844           FETCH_DATA (the_info, codep + 1);
6845           disp = *codep++;
6846           if ((disp & 0x80) != 0)
6847             disp -= 0x100;
6848           break;
6849         case 2:
6850           disp = get16 ();
6851           if ((disp & 0x8000) != 0)
6852             disp -= 0x10000;
6853           break;
6854         }
6855
6856       if (!intel_syntax)
6857         if (modrm.mod != 0 || modrm.rm == 6)
6858           {
6859             print_displacement (scratchbuf, disp);
6860             oappend (scratchbuf);
6861           }
6862
6863       if (modrm.mod != 0 || modrm.rm != 6)
6864         {
6865           *obufp++ = open_char;
6866           *obufp = '\0';
6867           oappend (index16[modrm.rm]);
6868           if (intel_syntax
6869               && (disp || modrm.mod != 0 || modrm.rm == 6))
6870             {
6871               if ((bfd_signed_vma) disp >= 0)
6872                 {
6873                   *obufp++ = '+';
6874                   *obufp = '\0';
6875                 }
6876               else if (modrm.mod != 1)
6877                 {
6878                   *obufp++ = '-';
6879                   *obufp = '\0';
6880                   disp = - (bfd_signed_vma) disp;
6881                 }
6882
6883               print_displacement (scratchbuf, disp);
6884               oappend (scratchbuf);
6885             }
6886
6887           *obufp++ = close_char;
6888           *obufp = '\0';
6889         }
6890       else if (intel_syntax)
6891         {
6892           if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
6893                           | PREFIX_ES | PREFIX_FS | PREFIX_GS))
6894             ;
6895           else
6896             {
6897               oappend (names_seg[ds_reg - es_reg]);
6898               oappend (":");
6899             }
6900           print_operand_value (scratchbuf, 1, disp & 0xffff);
6901           oappend (scratchbuf);
6902         }
6903     }
6904 }
6905
6906 static void
6907 OP_E (int bytemode, int sizeflag)
6908 {
6909   OP_E_extended (bytemode, sizeflag, 0);
6910 }
6911
6912
6913 static void
6914 OP_G (int bytemode, int sizeflag)
6915 {
6916   int add = 0;
6917   USED_REX (REX_R);
6918   if (rex & REX_R)
6919     add += 8;
6920   switch (bytemode)
6921     {
6922     case b_mode:
6923       USED_REX (0);
6924       if (rex)
6925         oappend (names8rex[modrm.reg + add]);
6926       else
6927         oappend (names8[modrm.reg + add]);
6928       break;
6929     case w_mode:
6930       oappend (names16[modrm.reg + add]);
6931       break;
6932     case d_mode:
6933       oappend (names32[modrm.reg + add]);
6934       break;
6935     case q_mode:
6936       oappend (names64[modrm.reg + add]);
6937       break;
6938     case v_mode:
6939     case dq_mode:
6940     case dqb_mode:
6941     case dqd_mode:
6942     case dqw_mode:
6943       USED_REX (REX_W);
6944       if (rex & REX_W)
6945         oappend (names64[modrm.reg + add]);
6946       else if ((sizeflag & DFLAG) || bytemode != v_mode)
6947         oappend (names32[modrm.reg + add]);
6948       else
6949         oappend (names16[modrm.reg + add]);
6950       used_prefixes |= (prefixes & PREFIX_DATA);
6951       break;
6952     case m_mode:
6953       if (address_mode == mode_64bit)
6954         oappend (names64[modrm.reg + add]);
6955       else
6956         oappend (names32[modrm.reg + add]);
6957       break;
6958     default:
6959       oappend (INTERNAL_DISASSEMBLER_ERROR);
6960       break;
6961     }
6962 }
6963
6964 static bfd_vma
6965 get64 (void)
6966 {
6967   bfd_vma x;
6968 #ifdef BFD64
6969   unsigned int a;
6970   unsigned int b;
6971
6972   FETCH_DATA (the_info, codep + 8);
6973   a = *codep++ & 0xff;
6974   a |= (*codep++ & 0xff) << 8;
6975   a |= (*codep++ & 0xff) << 16;
6976   a |= (*codep++ & 0xff) << 24;
6977   b = *codep++ & 0xff;
6978   b |= (*codep++ & 0xff) << 8;
6979   b |= (*codep++ & 0xff) << 16;
6980   b |= (*codep++ & 0xff) << 24;
6981   x = a + ((bfd_vma) b << 32);
6982 #else
6983   abort ();
6984   x = 0;
6985 #endif
6986   return x;
6987 }
6988
6989 static bfd_signed_vma
6990 get32 (void)
6991 {
6992   bfd_signed_vma x = 0;
6993
6994   FETCH_DATA (the_info, codep + 4);
6995   x = *codep++ & (bfd_signed_vma) 0xff;
6996   x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
6997   x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
6998   x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
6999   return x;
7000 }
7001
7002 static bfd_signed_vma
7003 get32s (void)
7004 {
7005   bfd_signed_vma x = 0;
7006
7007   FETCH_DATA (the_info, codep + 4);
7008   x = *codep++ & (bfd_signed_vma) 0xff;
7009   x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
7010   x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
7011   x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
7012
7013   x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
7014
7015   return x;
7016 }
7017
7018 static int
7019 get16 (void)
7020 {
7021   int x = 0;
7022
7023   FETCH_DATA (the_info, codep + 2);
7024   x = *codep++ & 0xff;
7025   x |= (*codep++ & 0xff) << 8;
7026   return x;
7027 }
7028
7029 static void
7030 set_op (bfd_vma op, int riprel)
7031 {
7032   op_index[op_ad] = op_ad;
7033   if (address_mode == mode_64bit)
7034     {
7035       op_address[op_ad] = op;
7036       op_riprel[op_ad] = riprel;
7037     }
7038   else
7039     {
7040       /* Mask to get a 32-bit address.  */
7041       op_address[op_ad] = op & 0xffffffff;
7042       op_riprel[op_ad] = riprel & 0xffffffff;
7043     }
7044 }
7045
7046 static void
7047 OP_REG (int code, int sizeflag)
7048 {
7049   const char *s;
7050   int add;
7051   USED_REX (REX_B);
7052   if (rex & REX_B)
7053     add = 8;
7054   else
7055     add = 0;
7056
7057   switch (code)
7058     {
7059     case ax_reg: case cx_reg: case dx_reg: case bx_reg:
7060     case sp_reg: case bp_reg: case si_reg: case di_reg:
7061       s = names16[code - ax_reg + add];
7062       break;
7063     case es_reg: case ss_reg: case cs_reg:
7064     case ds_reg: case fs_reg: case gs_reg:
7065       s = names_seg[code - es_reg + add];
7066       break;
7067     case al_reg: case ah_reg: case cl_reg: case ch_reg:
7068     case dl_reg: case dh_reg: case bl_reg: case bh_reg:
7069       USED_REX (0);
7070       if (rex)
7071         s = names8rex[code - al_reg + add];
7072       else
7073         s = names8[code - al_reg];
7074       break;
7075     case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
7076     case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
7077       if (address_mode == mode_64bit && (sizeflag & DFLAG))
7078         {
7079           s = names64[code - rAX_reg + add];
7080           break;
7081         }
7082       code += eAX_reg - rAX_reg;
7083       /* Fall through.  */
7084     case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
7085     case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
7086       USED_REX (REX_W);
7087       if (rex & REX_W)
7088         s = names64[code - eAX_reg + add];
7089       else if (sizeflag & DFLAG)
7090         s = names32[code - eAX_reg + add];
7091       else
7092         s = names16[code - eAX_reg + add];
7093       used_prefixes |= (prefixes & PREFIX_DATA);
7094       break;
7095     default:
7096       s = INTERNAL_DISASSEMBLER_ERROR;
7097       break;
7098     }
7099   oappend (s);
7100 }
7101
7102 static void
7103 OP_IMREG (int code, int sizeflag)
7104 {
7105   const char *s;
7106
7107   switch (code)
7108     {
7109     case indir_dx_reg:
7110       if (intel_syntax)
7111         s = "dx";
7112       else
7113         s = "(%dx)";
7114       break;
7115     case ax_reg: case cx_reg: case dx_reg: case bx_reg:
7116     case sp_reg: case bp_reg: case si_reg: case di_reg:
7117       s = names16[code - ax_reg];
7118       break;
7119     case es_reg: case ss_reg: case cs_reg:
7120     case ds_reg: case fs_reg: case gs_reg:
7121       s = names_seg[code - es_reg];
7122       break;
7123     case al_reg: case ah_reg: case cl_reg: case ch_reg:
7124     case dl_reg: case dh_reg: case bl_reg: case bh_reg:
7125       USED_REX (0);
7126       if (rex)
7127         s = names8rex[code - al_reg];
7128       else
7129         s = names8[code - al_reg];
7130       break;
7131     case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
7132     case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
7133       USED_REX (REX_W);
7134       if (rex & REX_W)
7135         s = names64[code - eAX_reg];
7136       else if (sizeflag & DFLAG)
7137         s = names32[code - eAX_reg];
7138       else
7139         s = names16[code - eAX_reg];
7140       used_prefixes |= (prefixes & PREFIX_DATA);
7141       break;
7142     case z_mode_ax_reg:
7143       if ((rex & REX_W) || (sizeflag & DFLAG))
7144         s = *names32;
7145       else
7146         s = *names16;
7147       if (!(rex & REX_W))
7148         used_prefixes |= (prefixes & PREFIX_DATA);
7149       break;
7150     default:
7151       s = INTERNAL_DISASSEMBLER_ERROR;
7152       break;
7153     }
7154   oappend (s);
7155 }
7156
7157 static void
7158 OP_I (int bytemode, int sizeflag)
7159 {
7160   bfd_signed_vma op;
7161   bfd_signed_vma mask = -1;
7162
7163   switch (bytemode)
7164     {
7165     case b_mode:
7166       FETCH_DATA (the_info, codep + 1);
7167       op = *codep++;
7168       mask = 0xff;
7169       break;
7170     case q_mode:
7171       if (address_mode == mode_64bit)
7172         {
7173           op = get32s ();
7174           break;
7175         }
7176       /* Fall through.  */
7177     case v_mode:
7178       USED_REX (REX_W);
7179       if (rex & REX_W)
7180         op = get32s ();
7181       else if (sizeflag & DFLAG)
7182         {
7183           op = get32 ();
7184           mask = 0xffffffff;
7185         }
7186       else
7187         {
7188           op = get16 ();
7189           mask = 0xfffff;
7190         }
7191       used_prefixes |= (prefixes & PREFIX_DATA);
7192       break;
7193     case w_mode:
7194       mask = 0xfffff;
7195       op = get16 ();
7196       break;
7197     case const_1_mode:
7198       if (intel_syntax)
7199         oappend ("1");
7200       return;
7201     default:
7202       oappend (INTERNAL_DISASSEMBLER_ERROR);
7203       return;
7204     }
7205
7206   op &= mask;
7207   scratchbuf[0] = '$';
7208   print_operand_value (scratchbuf + 1, 1, op);
7209   oappend (scratchbuf + intel_syntax);
7210   scratchbuf[0] = '\0';
7211 }
7212
7213 static void
7214 OP_I64 (int bytemode, int sizeflag)
7215 {
7216   bfd_signed_vma op;
7217   bfd_signed_vma mask = -1;
7218
7219   if (address_mode != mode_64bit)
7220     {
7221       OP_I (bytemode, sizeflag);
7222       return;
7223     }
7224
7225   switch (bytemode)
7226     {
7227     case b_mode:
7228       FETCH_DATA (the_info, codep + 1);
7229       op = *codep++;
7230       mask = 0xff;
7231       break;
7232     case v_mode:
7233       USED_REX (REX_W);
7234       if (rex & REX_W)
7235         op = get64 ();
7236       else if (sizeflag & DFLAG)
7237         {
7238           op = get32 ();
7239           mask = 0xffffffff;
7240         }
7241       else
7242         {
7243           op = get16 ();
7244           mask = 0xfffff;
7245         }
7246       used_prefixes |= (prefixes & PREFIX_DATA);
7247       break;
7248     case w_mode:
7249       mask = 0xfffff;
7250       op = get16 ();
7251       break;
7252     default:
7253       oappend (INTERNAL_DISASSEMBLER_ERROR);
7254       return;
7255     }
7256
7257   op &= mask;
7258   scratchbuf[0] = '$';
7259   print_operand_value (scratchbuf + 1, 1, op);
7260   oappend (scratchbuf + intel_syntax);
7261   scratchbuf[0] = '\0';
7262 }
7263
7264 static void
7265 OP_sI (int bytemode, int sizeflag)
7266 {
7267   bfd_signed_vma op;
7268   bfd_signed_vma mask = -1;
7269
7270   switch (bytemode)
7271     {
7272     case b_mode:
7273       FETCH_DATA (the_info, codep + 1);
7274       op = *codep++;
7275       if ((op & 0x80) != 0)
7276         op -= 0x100;
7277       mask = 0xffffffff;
7278       break;
7279     case v_mode:
7280       USED_REX (REX_W);
7281       if (rex & REX_W)
7282         op = get32s ();
7283       else if (sizeflag & DFLAG)
7284         {
7285           op = get32s ();
7286           mask = 0xffffffff;
7287         }
7288       else
7289         {
7290           mask = 0xffffffff;
7291           op = get16 ();
7292           if ((op & 0x8000) != 0)
7293             op -= 0x10000;
7294         }
7295       used_prefixes |= (prefixes & PREFIX_DATA);
7296       break;
7297     case w_mode:
7298       op = get16 ();
7299       mask = 0xffffffff;
7300       if ((op & 0x8000) != 0)
7301         op -= 0x10000;
7302       break;
7303     default:
7304       oappend (INTERNAL_DISASSEMBLER_ERROR);
7305       return;
7306     }
7307
7308   scratchbuf[0] = '$';
7309   print_operand_value (scratchbuf + 1, 1, op);
7310   oappend (scratchbuf + intel_syntax);
7311 }
7312
7313 static void
7314 OP_J (int bytemode, int sizeflag)
7315 {
7316   bfd_vma disp;
7317   bfd_vma mask = -1;
7318   bfd_vma segment = 0;
7319
7320   switch (bytemode)
7321     {
7322     case b_mode:
7323       FETCH_DATA (the_info, codep + 1);
7324       disp = *codep++;
7325       if ((disp & 0x80) != 0)
7326         disp -= 0x100;
7327       break;
7328     case v_mode:
7329       if ((sizeflag & DFLAG) || (rex & REX_W))
7330         disp = get32s ();
7331       else
7332         {
7333           disp = get16 ();
7334           if ((disp & 0x8000) != 0)
7335             disp -= 0x10000;
7336           /* In 16bit mode, address is wrapped around at 64k within
7337              the same segment.  Otherwise, a data16 prefix on a jump
7338              instruction means that the pc is masked to 16 bits after
7339              the displacement is added!  */
7340           mask = 0xffff;
7341           if ((prefixes & PREFIX_DATA) == 0)
7342             segment = ((start_pc + codep - start_codep)
7343                        & ~((bfd_vma) 0xffff));
7344         }
7345       used_prefixes |= (prefixes & PREFIX_DATA);
7346       break;
7347     default:
7348       oappend (INTERNAL_DISASSEMBLER_ERROR);
7349       return;
7350     }
7351   disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
7352   set_op (disp, 0);
7353   print_operand_value (scratchbuf, 1, disp);
7354   oappend (scratchbuf);
7355 }
7356
7357 static void
7358 OP_SEG (int bytemode, int sizeflag)
7359 {
7360   if (bytemode == w_mode)
7361     oappend (names_seg[modrm.reg]);
7362   else
7363     OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
7364 }
7365
7366 static void
7367 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
7368 {
7369   int seg, offset;
7370
7371   if (sizeflag & DFLAG)
7372     {
7373       offset = get32 ();
7374       seg = get16 ();
7375     }
7376   else
7377     {
7378       offset = get16 ();
7379       seg = get16 ();
7380     }
7381   used_prefixes |= (prefixes & PREFIX_DATA);
7382   if (intel_syntax)
7383     sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
7384   else
7385     sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
7386   oappend (scratchbuf);
7387 }
7388
7389 static void
7390 OP_OFF (int bytemode, int sizeflag)
7391 {
7392   bfd_vma off;
7393
7394   if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
7395     intel_operand_size (bytemode, sizeflag);
7396   append_seg ();
7397
7398   if ((sizeflag & AFLAG) || address_mode == mode_64bit)
7399     off = get32 ();
7400   else
7401     off = get16 ();
7402
7403   if (intel_syntax)
7404     {
7405       if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
7406                         | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
7407         {
7408           oappend (names_seg[ds_reg - es_reg]);
7409           oappend (":");
7410         }
7411     }
7412   print_operand_value (scratchbuf, 1, off);
7413   oappend (scratchbuf);
7414 }
7415
7416 static void
7417 OP_OFF64 (int bytemode, int sizeflag)
7418 {
7419   bfd_vma off;
7420
7421   if (address_mode != mode_64bit
7422       || (prefixes & PREFIX_ADDR))
7423     {
7424       OP_OFF (bytemode, sizeflag);
7425       return;
7426     }
7427
7428   if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
7429     intel_operand_size (bytemode, sizeflag);
7430   append_seg ();
7431
7432   off = get64 ();
7433
7434   if (intel_syntax)
7435     {
7436       if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
7437                         | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
7438         {
7439           oappend (names_seg[ds_reg - es_reg]);
7440           oappend (":");
7441         }
7442     }
7443   print_operand_value (scratchbuf, 1, off);
7444   oappend (scratchbuf);
7445 }
7446
7447 static void
7448 ptr_reg (int code, int sizeflag)
7449 {
7450   const char *s;
7451
7452   *obufp++ = open_char;
7453   used_prefixes |= (prefixes & PREFIX_ADDR);
7454   if (address_mode == mode_64bit)
7455     {
7456       if (!(sizeflag & AFLAG))
7457         s = names32[code - eAX_reg];
7458       else
7459         s = names64[code - eAX_reg];
7460     }
7461   else if (sizeflag & AFLAG)
7462     s = names32[code - eAX_reg];
7463   else
7464     s = names16[code - eAX_reg];
7465   oappend (s);
7466   *obufp++ = close_char;
7467   *obufp = 0;
7468 }
7469
7470 static void
7471 OP_ESreg (int code, int sizeflag)
7472 {
7473   if (intel_syntax)
7474     {
7475       switch (codep[-1])
7476         {
7477         case 0x6d:      /* insw/insl */
7478           intel_operand_size (z_mode, sizeflag);
7479           break;
7480         case 0xa5:      /* movsw/movsl/movsq */
7481         case 0xa7:      /* cmpsw/cmpsl/cmpsq */
7482         case 0xab:      /* stosw/stosl */
7483         case 0xaf:      /* scasw/scasl */
7484           intel_operand_size (v_mode, sizeflag);
7485           break;
7486         default:
7487           intel_operand_size (b_mode, sizeflag);
7488         }
7489     }
7490   oappend ("%es:" + intel_syntax);
7491   ptr_reg (code, sizeflag);
7492 }
7493
7494 static void
7495 OP_DSreg (int code, int sizeflag)
7496 {
7497   if (intel_syntax)
7498     {
7499       switch (codep[-1])
7500         {
7501         case 0x6f:      /* outsw/outsl */
7502           intel_operand_size (z_mode, sizeflag);
7503           break;
7504         case 0xa5:      /* movsw/movsl/movsq */
7505         case 0xa7:      /* cmpsw/cmpsl/cmpsq */
7506         case 0xad:      /* lodsw/lodsl/lodsq */
7507           intel_operand_size (v_mode, sizeflag);
7508           break;
7509         default:
7510           intel_operand_size (b_mode, sizeflag);
7511         }
7512     }
7513   if ((prefixes
7514        & (PREFIX_CS
7515           | PREFIX_DS
7516           | PREFIX_SS
7517           | PREFIX_ES
7518           | PREFIX_FS
7519           | PREFIX_GS)) == 0)
7520     prefixes |= PREFIX_DS;
7521   append_seg ();
7522   ptr_reg (code, sizeflag);
7523 }
7524
7525 static void
7526 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7527 {
7528   int add;
7529   if (rex & REX_R)
7530     {
7531       USED_REX (REX_R);
7532       add = 8;
7533     }
7534   else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
7535     {
7536       lock_prefix = NULL;
7537       used_prefixes |= PREFIX_LOCK;
7538       add = 8;
7539     }
7540   else
7541     add = 0;
7542   sprintf (scratchbuf, "%%cr%d", modrm.reg + add);
7543   oappend (scratchbuf + intel_syntax);
7544 }
7545
7546 static void
7547 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7548 {
7549   int add;
7550   USED_REX (REX_R);
7551   if (rex & REX_R)
7552     add = 8;
7553   else
7554     add = 0;
7555   if (intel_syntax)
7556     sprintf (scratchbuf, "db%d", modrm.reg + add);
7557   else
7558     sprintf (scratchbuf, "%%db%d", modrm.reg + add);
7559   oappend (scratchbuf);
7560 }
7561
7562 static void
7563 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7564 {
7565   sprintf (scratchbuf, "%%tr%d", modrm.reg);
7566   oappend (scratchbuf + intel_syntax);
7567 }
7568
7569 static void
7570 OP_R (int bytemode, int sizeflag)
7571 {
7572   if (modrm.mod == 3)
7573     OP_E (bytemode, sizeflag);
7574   else
7575     BadOp ();
7576 }
7577
7578 static void
7579 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7580 {
7581   used_prefixes |= (prefixes & PREFIX_DATA);
7582   if (prefixes & PREFIX_DATA)
7583     {
7584       int add;
7585       USED_REX (REX_R);
7586       if (rex & REX_R)
7587         add = 8;
7588       else
7589         add = 0;
7590       sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
7591     }
7592   else
7593     sprintf (scratchbuf, "%%mm%d", modrm.reg);
7594   oappend (scratchbuf + intel_syntax);
7595 }
7596
7597 static void
7598 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7599 {
7600   int add;
7601   USED_REX (REX_R);
7602   if (rex & REX_R)
7603     add = 8;
7604   else
7605     add = 0;
7606   sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
7607   oappend (scratchbuf + intel_syntax);
7608 }
7609
7610 static void
7611 OP_EM (int bytemode, int sizeflag)
7612 {
7613   if (modrm.mod != 3)
7614     {
7615       if (intel_syntax && bytemode == v_mode)
7616         {
7617           bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
7618           used_prefixes |= (prefixes & PREFIX_DATA);
7619         }
7620       OP_E (bytemode, sizeflag);
7621       return;
7622     }
7623
7624   /* Skip mod/rm byte.  */
7625   MODRM_CHECK;
7626   codep++;
7627   used_prefixes |= (prefixes & PREFIX_DATA);
7628   if (prefixes & PREFIX_DATA)
7629     {
7630       int add;
7631
7632       USED_REX (REX_B);
7633       if (rex & REX_B)
7634         add = 8;
7635       else
7636         add = 0;
7637       sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
7638     }
7639   else
7640     sprintf (scratchbuf, "%%mm%d", modrm.rm);
7641   oappend (scratchbuf + intel_syntax);
7642 }
7643
7644 /* cvt* are the only instructions in sse2 which have
7645    both SSE and MMX operands and also have 0x66 prefix
7646    in their opcode. 0x66 was originally used to differentiate
7647    between SSE and MMX instruction(operands). So we have to handle the
7648    cvt* separately using OP_EMC and OP_MXC */
7649 static void
7650 OP_EMC (int bytemode, int sizeflag)
7651 {
7652   if (modrm.mod != 3)
7653     {
7654       if (intel_syntax && bytemode == v_mode)
7655         {
7656           bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
7657           used_prefixes |= (prefixes & PREFIX_DATA);
7658         }
7659       OP_E (bytemode, sizeflag);
7660       return;
7661     }
7662
7663   /* Skip mod/rm byte.  */
7664   MODRM_CHECK;
7665   codep++;
7666   used_prefixes |= (prefixes & PREFIX_DATA);
7667   sprintf (scratchbuf, "%%mm%d", modrm.rm);
7668   oappend (scratchbuf + intel_syntax);
7669 }
7670
7671 static void
7672 OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7673 {
7674   used_prefixes |= (prefixes & PREFIX_DATA);
7675   sprintf (scratchbuf, "%%mm%d", modrm.reg);
7676   oappend (scratchbuf + intel_syntax);
7677 }
7678
7679 static void
7680 OP_EX (int bytemode, int sizeflag)
7681 {
7682   int add;
7683   if (modrm.mod != 3)
7684     {
7685       OP_E (bytemode, sizeflag);
7686       return;
7687     }
7688   USED_REX (REX_B);
7689   if (rex & REX_B)
7690     add = 8;
7691   else
7692     add = 0;
7693
7694   /* Skip mod/rm byte.  */
7695   MODRM_CHECK;
7696   codep++;
7697   sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
7698   oappend (scratchbuf + intel_syntax);
7699 }
7700
7701 static void
7702 OP_MS (int bytemode, int sizeflag)
7703 {
7704   if (modrm.mod == 3)
7705     OP_EM (bytemode, sizeflag);
7706   else
7707     BadOp ();
7708 }
7709
7710 static void
7711 OP_XS (int bytemode, int sizeflag)
7712 {
7713   if (modrm.mod == 3)
7714     OP_EX (bytemode, sizeflag);
7715   else
7716     BadOp ();
7717 }
7718
7719 static void
7720 OP_M (int bytemode, int sizeflag)
7721 {
7722   if (modrm.mod == 3)
7723     /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
7724     BadOp ();
7725   else
7726     OP_E (bytemode, sizeflag);
7727 }
7728
7729 static void
7730 OP_0f07 (int bytemode, int sizeflag)
7731 {
7732   if (modrm.mod != 3 || modrm.rm != 0)
7733     BadOp ();
7734   else
7735     OP_E (bytemode, sizeflag);
7736 }
7737
7738 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
7739    32bit mode and "xchg %rax,%rax" in 64bit mode.  */
7740
7741 static void
7742 NOP_Fixup1 (int bytemode, int sizeflag)
7743 {
7744   if ((prefixes & PREFIX_DATA) != 0
7745       || (rex != 0
7746           && rex != 0x48
7747           && address_mode == mode_64bit))
7748     OP_REG (bytemode, sizeflag);
7749   else
7750     strcpy (obuf, "nop");
7751 }
7752
7753 static void
7754 NOP_Fixup2 (int bytemode, int sizeflag)
7755 {
7756   if ((prefixes & PREFIX_DATA) != 0
7757       || (rex != 0
7758           && rex != 0x48
7759           && address_mode == mode_64bit))
7760     OP_IMREG (bytemode, sizeflag);
7761 }
7762
7763 static const char *const Suffix3DNow[] = {
7764 /* 00 */        NULL,           NULL,           NULL,           NULL,
7765 /* 04 */        NULL,           NULL,           NULL,           NULL,
7766 /* 08 */        NULL,           NULL,           NULL,           NULL,
7767 /* 0C */        "pi2fw",        "pi2fd",        NULL,           NULL,
7768 /* 10 */        NULL,           NULL,           NULL,           NULL,
7769 /* 14 */        NULL,           NULL,           NULL,           NULL,
7770 /* 18 */        NULL,           NULL,           NULL,           NULL,
7771 /* 1C */        "pf2iw",        "pf2id",        NULL,           NULL,
7772 /* 20 */        NULL,           NULL,           NULL,           NULL,
7773 /* 24 */        NULL,           NULL,           NULL,           NULL,
7774 /* 28 */        NULL,           NULL,           NULL,           NULL,
7775 /* 2C */        NULL,           NULL,           NULL,           NULL,
7776 /* 30 */        NULL,           NULL,           NULL,           NULL,
7777 /* 34 */        NULL,           NULL,           NULL,           NULL,
7778 /* 38 */        NULL,           NULL,           NULL,           NULL,
7779 /* 3C */        NULL,           NULL,           NULL,           NULL,
7780 /* 40 */        NULL,           NULL,           NULL,           NULL,
7781 /* 44 */        NULL,           NULL,           NULL,           NULL,
7782 /* 48 */        NULL,           NULL,           NULL,           NULL,
7783 /* 4C */        NULL,           NULL,           NULL,           NULL,
7784 /* 50 */        NULL,           NULL,           NULL,           NULL,
7785 /* 54 */        NULL,           NULL,           NULL,           NULL,
7786 /* 58 */        NULL,           NULL,           NULL,           NULL,
7787 /* 5C */        NULL,           NULL,           NULL,           NULL,
7788 /* 60 */        NULL,           NULL,           NULL,           NULL,
7789 /* 64 */        NULL,           NULL,           NULL,           NULL,
7790 /* 68 */        NULL,           NULL,           NULL,           NULL,
7791 /* 6C */        NULL,           NULL,           NULL,           NULL,
7792 /* 70 */        NULL,           NULL,           NULL,           NULL,
7793 /* 74 */        NULL,           NULL,           NULL,           NULL,
7794 /* 78 */        NULL,           NULL,           NULL,           NULL,
7795 /* 7C */        NULL,           NULL,           NULL,           NULL,
7796 /* 80 */        NULL,           NULL,           NULL,           NULL,
7797 /* 84 */        NULL,           NULL,           NULL,           NULL,
7798 /* 88 */        NULL,           NULL,           "pfnacc",       NULL,
7799 /* 8C */        NULL,           NULL,           "pfpnacc",      NULL,
7800 /* 90 */        "pfcmpge",      NULL,           NULL,           NULL,
7801 /* 94 */        "pfmin",        NULL,           "pfrcp",        "pfrsqrt",
7802 /* 98 */        NULL,           NULL,           "pfsub",        NULL,
7803 /* 9C */        NULL,           NULL,           "pfadd",        NULL,
7804 /* A0 */        "pfcmpgt",      NULL,           NULL,           NULL,
7805 /* A4 */        "pfmax",        NULL,           "pfrcpit1",     "pfrsqit1",
7806 /* A8 */        NULL,           NULL,           "pfsubr",       NULL,
7807 /* AC */        NULL,           NULL,           "pfacc",        NULL,
7808 /* B0 */        "pfcmpeq",      NULL,           NULL,           NULL,
7809 /* B4 */        "pfmul",        NULL,           "pfrcpit2",     "pmulhrw",
7810 /* B8 */        NULL,           NULL,           NULL,           "pswapd",
7811 /* BC */        NULL,           NULL,           NULL,           "pavgusb",
7812 /* C0 */        NULL,           NULL,           NULL,           NULL,
7813 /* C4 */        NULL,           NULL,           NULL,           NULL,
7814 /* C8 */        NULL,           NULL,           NULL,           NULL,
7815 /* CC */        NULL,           NULL,           NULL,           NULL,
7816 /* D0 */        NULL,           NULL,           NULL,           NULL,
7817 /* D4 */        NULL,           NULL,           NULL,           NULL,
7818 /* D8 */        NULL,           NULL,           NULL,           NULL,
7819 /* DC */        NULL,           NULL,           NULL,           NULL,
7820 /* E0 */        NULL,           NULL,           NULL,           NULL,
7821 /* E4 */        NULL,           NULL,           NULL,           NULL,
7822 /* E8 */        NULL,           NULL,           NULL,           NULL,
7823 /* EC */        NULL,           NULL,           NULL,           NULL,
7824 /* F0 */        NULL,           NULL,           NULL,           NULL,
7825 /* F4 */        NULL,           NULL,           NULL,           NULL,
7826 /* F8 */        NULL,           NULL,           NULL,           NULL,
7827 /* FC */        NULL,           NULL,           NULL,           NULL,
7828 };
7829
7830 static void
7831 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7832 {
7833   const char *mnemonic;
7834
7835   FETCH_DATA (the_info, codep + 1);
7836   /* AMD 3DNow! instructions are specified by an opcode suffix in the
7837      place where an 8-bit immediate would normally go.  ie. the last
7838      byte of the instruction.  */
7839   obufp = obuf + strlen (obuf);
7840   mnemonic = Suffix3DNow[*codep++ & 0xff];
7841   if (mnemonic)
7842     oappend (mnemonic);
7843   else
7844     {
7845       /* Since a variable sized modrm/sib chunk is between the start
7846          of the opcode (0x0f0f) and the opcode suffix, we need to do
7847          all the modrm processing first, and don't know until now that
7848          we have a bad opcode.  This necessitates some cleaning up.  */
7849       op_out[0][0] = '\0';
7850       op_out[1][0] = '\0';
7851       BadOp ();
7852     }
7853 }
7854
7855 static const char *simd_cmp_op[] = {
7856   "eq",
7857   "lt",
7858   "le",
7859   "unord",
7860   "neq",
7861   "nlt",
7862   "nle",
7863   "ord"
7864 };
7865
7866 static void
7867 CMP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7868 {
7869   unsigned int cmp_type;
7870
7871   FETCH_DATA (the_info, codep + 1);
7872   cmp_type = *codep++ & 0xff;
7873   if (cmp_type < 8)
7874     {
7875       char suffix [3];
7876       char *p = obuf + strlen (obuf) - 2;
7877       suffix[0] = p[0];
7878       suffix[1] = p[1];
7879       suffix[2] = '\0';
7880       sprintf (p, "%s%s", simd_cmp_op[cmp_type], suffix);
7881     }
7882   else
7883     {
7884       /* We have a reserved extension byte.  Output it directly.  */
7885       scratchbuf[0] = '$';
7886       print_operand_value (scratchbuf + 1, 1, cmp_type);
7887       oappend (scratchbuf + intel_syntax);
7888       scratchbuf[0] = '\0';
7889     }
7890 }
7891
7892 static void
7893 OP_Mwait (int bytemode ATTRIBUTE_UNUSED,
7894           int sizeflag ATTRIBUTE_UNUSED)
7895 {
7896   /* mwait %eax,%ecx  */
7897   if (!intel_syntax)
7898     {
7899       const char **names = (address_mode == mode_64bit
7900                             ? names64 : names32);
7901       strcpy (op_out[0], names[0]);
7902       strcpy (op_out[1], names[1]);
7903       two_source_ops = 1;
7904     }
7905   /* Skip mod/rm byte.  */
7906   MODRM_CHECK;
7907   codep++;
7908 }
7909
7910 static void
7911 OP_Monitor (int bytemode ATTRIBUTE_UNUSED,
7912             int sizeflag ATTRIBUTE_UNUSED)
7913 {
7914   /* monitor %eax,%ecx,%edx"  */
7915   if (!intel_syntax)
7916     {
7917       const char **op1_names;
7918       const char **names = (address_mode == mode_64bit
7919                             ? names64 : names32);
7920
7921       if (!(prefixes & PREFIX_ADDR))
7922         op1_names = (address_mode == mode_16bit
7923                      ? names16 : names);
7924       else
7925         {
7926           /* Remove "addr16/addr32".  */
7927           addr_prefix = NULL;
7928           op1_names = (address_mode != mode_32bit
7929                        ? names32 : names16);
7930           used_prefixes |= PREFIX_ADDR;
7931         }
7932       strcpy (op_out[0], op1_names[0]);
7933       strcpy (op_out[1], names[1]);
7934       strcpy (op_out[2], names[2]);
7935       two_source_ops = 1;
7936     }
7937   /* Skip mod/rm byte.  */
7938   MODRM_CHECK;
7939   codep++;
7940 }
7941
7942 static void
7943 BadOp (void)
7944 {
7945   /* Throw away prefixes and 1st. opcode byte.  */
7946   codep = insn_codep + 1;
7947   oappend ("(bad)");
7948 }
7949
7950 static void
7951 REP_Fixup (int bytemode, int sizeflag)
7952 {
7953   /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
7954      lods and stos.  */
7955   if (prefixes & PREFIX_REPZ)
7956     repz_prefix = "rep ";
7957
7958   switch (bytemode)
7959     {
7960     case al_reg:
7961     case eAX_reg:
7962     case indir_dx_reg:
7963       OP_IMREG (bytemode, sizeflag);
7964       break;
7965     case eDI_reg:
7966       OP_ESreg (bytemode, sizeflag);
7967       break;
7968     case eSI_reg:
7969       OP_DSreg (bytemode, sizeflag);
7970       break;
7971     default:
7972       abort ();
7973       break;
7974     }
7975 }
7976
7977 static void
7978 CMPXCHG8B_Fixup (int bytemode, int sizeflag)
7979 {
7980   USED_REX (REX_W);
7981   if (rex & REX_W)
7982     {
7983       /* Change cmpxchg8b to cmpxchg16b.  */
7984       char *p = obuf + strlen (obuf) - 2;
7985       strcpy (p, "16b");
7986       bytemode = o_mode;
7987     }
7988   OP_M (bytemode, sizeflag);
7989 }
7990
7991 static void
7992 XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
7993 {
7994   sprintf (scratchbuf, "%%xmm%d", reg);
7995   oappend (scratchbuf + intel_syntax);
7996 }
7997
7998 static void
7999 CRC32_Fixup (int bytemode, int sizeflag)
8000 {
8001   /* Add proper suffix to "crc32".  */
8002   char *p = obuf + strlen (obuf);
8003
8004   switch (bytemode)
8005     {
8006     case b_mode:
8007       if (intel_syntax)
8008         break;
8009
8010       *p++ = 'b';
8011       break;
8012     case v_mode:
8013       if (intel_syntax)
8014         break;
8015
8016       USED_REX (REX_W);
8017       if (rex & REX_W)
8018         *p++ = 'q';
8019       else if (sizeflag & DFLAG)
8020         *p++ = 'l';
8021       else
8022         *p++ = 'w';
8023       used_prefixes |= (prefixes & PREFIX_DATA);
8024       break;
8025     default:
8026       oappend (INTERNAL_DISASSEMBLER_ERROR);
8027       break;
8028     }
8029   *p = '\0';
8030
8031   if (modrm.mod == 3)
8032     {
8033       int add;
8034
8035       /* Skip mod/rm byte.  */
8036       MODRM_CHECK;
8037       codep++;
8038
8039       USED_REX (REX_B);
8040       add = (rex & REX_B) ? 8 : 0;
8041       if (bytemode == b_mode)
8042         {
8043           USED_REX (0);
8044           if (rex)
8045             oappend (names8rex[modrm.rm + add]);
8046           else
8047             oappend (names8[modrm.rm + add]);
8048         }
8049       else
8050         {
8051           USED_REX (REX_W);
8052           if (rex & REX_W)
8053             oappend (names64[modrm.rm + add]);
8054           else if ((prefixes & PREFIX_DATA))
8055             oappend (names16[modrm.rm + add]);
8056           else
8057             oappend (names32[modrm.rm + add]);
8058         }
8059     }
8060   else
8061     OP_E (bytemode, sizeflag);
8062 }
8063
8064 /* Print a DREX argument as either a register or memory operation.  */
8065 static void
8066 print_drex_arg (unsigned int reg, int bytemode, int sizeflag)
8067 {
8068   if (reg == DREX_REG_UNKNOWN)
8069     BadOp ();
8070
8071   else if (reg != DREX_REG_MEMORY)
8072     {
8073       sprintf (scratchbuf, "%%xmm%d", reg);
8074       oappend (scratchbuf + intel_syntax);
8075     }
8076
8077   else
8078     OP_E_extended (bytemode, sizeflag, 1);
8079 }
8080
8081 /* SSE5 instructions that have 4 arguments are encoded as:
8082    0f 24 <sub-opcode> <modrm> <optional-sib> <drex> <offset>.
8083
8084    The <sub-opcode> byte has 1 bit (0x4) that is combined with 1 bit in
8085    the DREX field (0x8) to determine how the arguments are laid out.
8086    The destination register must be the same register as one of the
8087    inputs, and it is encoded in the DREX byte.  No REX prefix is used
8088    for these instructions, since the DREX field contains the 3 extension
8089    bits provided by the REX prefix.
8090
8091    The bytemode argument adds 2 extra bits for passing extra information:
8092         DREX_OC1        -- Set the OC1 bit to indicate dest == 1st arg
8093         DREX_NO_OC0     -- OC0 in DREX is invalid
8094         (but pretend it is set).  */
8095
8096 static void
8097 OP_DREX4 (int flag_bytemode, int sizeflag)
8098 {
8099   unsigned int drex_byte;
8100   unsigned int regs[4];
8101   unsigned int modrm_regmem;
8102   unsigned int modrm_reg;
8103   unsigned int drex_reg;
8104   int bytemode;
8105   int rex_save = rex;
8106   int rex_used_save = rex_used;
8107   int has_sib = 0;
8108   int oc1 = (flag_bytemode & DREX_OC1) ? 2 : 0;
8109   int oc0;
8110   int i;
8111
8112   bytemode = flag_bytemode & ~ DREX_MASK;
8113
8114   for (i = 0; i < 4; i++)
8115     regs[i] = DREX_REG_UNKNOWN;
8116
8117   /* Determine if we have a SIB byte in addition to MODRM before the
8118      DREX byte.  */
8119   if (((sizeflag & AFLAG) || address_mode == mode_64bit)
8120       && (modrm.mod != 3)
8121       && (modrm.rm == 4))
8122     has_sib = 1;
8123
8124   /* Get the DREX byte.  */
8125   FETCH_DATA (the_info, codep + 2 + has_sib);
8126   drex_byte = codep[has_sib+1];
8127   drex_reg = DREX_XMM (drex_byte);
8128   modrm_reg = modrm.reg + ((drex_byte & REX_R) ? 8 : 0);
8129
8130   /* Is OC0 legal?  If not, hardwire oc0 == 1.  */
8131   if (flag_bytemode & DREX_NO_OC0)
8132     {
8133       oc0 = 1;
8134       if (DREX_OC0 (drex_byte))
8135         BadOp ();
8136     }
8137   else
8138     oc0 = DREX_OC0 (drex_byte);
8139
8140   if (modrm.mod == 3)
8141     {
8142       /* regmem == register  */
8143       modrm_regmem = modrm.rm + ((drex_byte & REX_B) ? 8 : 0);
8144       rex = rex_used = 0;
8145       /* skip modrm/drex since we don't call OP_E_extended  */
8146       codep += 2;
8147     }
8148   else
8149     {
8150       /* regmem == memory, fill in appropriate REX bits  */
8151       modrm_regmem = DREX_REG_MEMORY;
8152       rex = drex_byte & (REX_B | REX_X | REX_R);
8153       if (rex)
8154         rex |= REX_OPCODE;
8155       rex_used = rex;
8156     }
8157
8158   /* Based on the OC1/OC0 bits, lay out the arguments in the correct
8159      order.  */
8160   switch (oc0 + oc1)
8161     {
8162     default:
8163       BadOp ();
8164       return;
8165
8166     case 0:
8167       regs[0] = modrm_regmem;
8168       regs[1] = modrm_reg;
8169       regs[2] = drex_reg;
8170       regs[3] = drex_reg;
8171       break;
8172
8173     case 1:
8174       regs[0] = modrm_reg;
8175       regs[1] = modrm_regmem;
8176       regs[2] = drex_reg;
8177       regs[3] = drex_reg;
8178       break;
8179
8180     case 2:
8181       regs[0] = drex_reg;
8182       regs[1] = modrm_regmem;
8183       regs[2] = modrm_reg;
8184       regs[3] = drex_reg;
8185       break;
8186
8187     case 3:
8188       regs[0] = drex_reg;
8189       regs[1] = modrm_reg;
8190       regs[2] = modrm_regmem;
8191       regs[3] = drex_reg;
8192       break;
8193     }
8194
8195   /* Print out the arguments.  */
8196   for (i = 0; i < 4; i++)
8197     {
8198       int j = (intel_syntax) ? 3 - i : i;
8199       if (i > 0)
8200         {
8201           *obufp++ = ',';
8202           *obufp = '\0';
8203         }
8204
8205       print_drex_arg (regs[j], bytemode, sizeflag);
8206     }
8207
8208   rex = rex_save;
8209   rex_used = rex_used_save;
8210 }
8211
8212 /* SSE5 instructions that have 3 arguments, and are encoded as:
8213    0f 24 <sub-opcode> <modrm> <optional-sib> <drex> <offset>    (or)
8214    0f 25 <sub-opcode> <modrm> <optional-sib> <drex> <offset> <cmp-byte>
8215
8216    The DREX field has 1 bit (0x8) to determine how the arguments are
8217    laid out. The destination register is encoded in the DREX byte.
8218    No REX prefix is used for these instructions, since the DREX field
8219    contains the 3 extension bits provided by the REX prefix.  */
8220
8221 static void
8222 OP_DREX3 (int flag_bytemode, int sizeflag)
8223 {
8224   unsigned int drex_byte;
8225   unsigned int regs[3];
8226   unsigned int modrm_regmem;
8227   unsigned int modrm_reg;
8228   unsigned int drex_reg;
8229   int bytemode;
8230   int rex_save = rex;
8231   int rex_used_save = rex_used;
8232   int has_sib = 0;
8233   int oc0;
8234   int i;
8235
8236   bytemode = flag_bytemode & ~ DREX_MASK;
8237
8238   for (i = 0; i < 3; i++)
8239     regs[i] = DREX_REG_UNKNOWN;
8240
8241   /* Determine if we have a SIB byte in addition to MODRM before the
8242      DREX byte.  */
8243   if (((sizeflag & AFLAG) || address_mode == mode_64bit)
8244       && (modrm.mod != 3)
8245       && (modrm.rm == 4))
8246     has_sib = 1;
8247
8248   /* Get the DREX byte.  */
8249   FETCH_DATA (the_info, codep + 2 + has_sib);
8250   drex_byte = codep[has_sib+1];
8251   drex_reg = DREX_XMM (drex_byte);
8252   modrm_reg = modrm.reg + ((drex_byte & REX_R) ? 8 : 0);
8253
8254   /* Is OC0 legal?  If not, hardwire oc0 == 0 */
8255   oc0 = DREX_OC0 (drex_byte);
8256   if ((flag_bytemode & DREX_NO_OC0) && oc0)
8257     BadOp ();
8258
8259   if (modrm.mod == 3)
8260     {
8261       /* regmem == register */
8262       modrm_regmem = modrm.rm + ((drex_byte & REX_B) ? 8 : 0);
8263       rex = rex_used = 0;
8264       /* skip modrm/drex since we don't call OP_E_extended.  */
8265       codep += 2;
8266     }
8267   else
8268     {
8269       /* regmem == memory, fill in appropriate REX bits.  */
8270       modrm_regmem = DREX_REG_MEMORY;
8271       rex = drex_byte & (REX_B | REX_X | REX_R);
8272       if (rex)
8273         rex |= REX_OPCODE;
8274       rex_used = rex;
8275     }
8276
8277   /* Based on the OC1/OC0 bits, lay out the arguments in the correct
8278      order.  */
8279   switch (oc0)
8280     {
8281     default:
8282       BadOp ();
8283       return;
8284
8285     case 0:
8286       regs[0] = modrm_regmem;
8287       regs[1] = modrm_reg;
8288       regs[2] = drex_reg;
8289       break;
8290
8291     case 1:
8292       regs[0] = modrm_reg;
8293       regs[1] = modrm_regmem;
8294       regs[2] = drex_reg;
8295       break;
8296     }
8297
8298   /* Print out the arguments.  */
8299   for (i = 0; i < 3; i++)
8300     {
8301       int j = (intel_syntax) ? 2 - i : i;
8302       if (i > 0)
8303         {
8304           *obufp++ = ',';
8305           *obufp = '\0';
8306         }
8307
8308       print_drex_arg (regs[j], bytemode, sizeflag);
8309     }
8310
8311   rex = rex_save;
8312   rex_used = rex_used_save;
8313 }
8314
8315 /* Emit a floating point comparison for comp<xx> instructions.  */
8316
8317 static void
8318 OP_DREX_FCMP (int bytemode ATTRIBUTE_UNUSED,
8319               int sizeflag ATTRIBUTE_UNUSED)
8320 {
8321   unsigned char byte;
8322
8323   static const char *const cmp_test[] = {
8324     "eq",
8325     "lt",
8326     "le",
8327     "unord",
8328     "ne",
8329     "nlt",
8330     "nle",
8331     "ord",
8332     "ueq",
8333     "ult",
8334     "ule",
8335     "false",
8336     "une",
8337     "unlt",
8338     "unle",
8339     "true"
8340   };
8341
8342   FETCH_DATA (the_info, codep + 1);
8343   byte = *codep & 0xff;
8344
8345   if (byte >= ARRAY_SIZE (cmp_test)
8346       || obuf[0] != 'c'
8347       || obuf[1] != 'o'
8348       || obuf[2] != 'm')
8349     {
8350       /* The instruction isn't one we know about, so just append the
8351          extension byte as a numeric value.  */
8352       OP_I (b_mode, 0);
8353     }
8354
8355   else
8356     {
8357       sprintf (scratchbuf, "com%s%s", cmp_test[byte], obuf+3);
8358       strcpy (obuf, scratchbuf);
8359       codep++;
8360     }
8361 }
8362
8363 /* Emit an integer point comparison for pcom<xx> instructions,
8364    rewriting the instruction to have the test inside of it.  */
8365
8366 static void
8367 OP_DREX_ICMP (int bytemode ATTRIBUTE_UNUSED,
8368               int sizeflag ATTRIBUTE_UNUSED)
8369 {
8370   unsigned char byte;
8371
8372   static const char *const cmp_test[] = {
8373     "lt",
8374     "le",
8375     "gt",
8376     "ge",
8377     "eq",
8378     "ne",
8379     "false",
8380     "true"
8381   };
8382
8383   FETCH_DATA (the_info, codep + 1);
8384   byte = *codep & 0xff;
8385
8386   if (byte >= ARRAY_SIZE (cmp_test)
8387       || obuf[0] != 'p'
8388       || obuf[1] != 'c'
8389       || obuf[2] != 'o'
8390       || obuf[3] != 'm')
8391     {
8392       /* The instruction isn't one we know about, so just print the
8393          comparison test byte as a numeric value.  */
8394       OP_I (b_mode, 0);
8395     }
8396
8397   else
8398     {
8399       sprintf (scratchbuf, "pcom%s%s", cmp_test[byte], obuf+4);
8400       strcpy (obuf, scratchbuf);
8401       codep++;
8402     }
8403 }