opcodes/i386-dis.c

   1 /* Print i386 instructions for GDB, the GNU debugger.
   2    Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
   3    2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
   4
   5    This file is part of the GNU opcodes library.
   6
   7    This library is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3, or (at your option)
  10    any later version.
  11
  12    It is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
  20    MA 02110-1301, USA.  */
  21
  22
  23 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
  24    July 1988
  25     modified by John Hassey (hassey@dg-rtp.dg.com)
  26     x86-64 support added by Jan Hubicka (jh@suse.cz)
  27     VIA PadLock support by Michal Ludvig (mludvig@suse.cz).  */
  28
  29 /* The main tables describing the instructions is essentially a copy
  30    of the "Opcode Map" chapter (Appendix A) of the Intel 80386
  31    Programmers Manual.  Usually, there is a capital letter, followed
  32    by a small letter.  The capital letter tell the addressing mode,
  33    and the small letter tells about the operand size.  Refer to
  34    the Intel manual for details.  */
  35
  36 #include "sysdep.h"
  37 #include "dis-asm.h"
  38 #include "opintl.h"
  39 #include "opcode/i386.h"
  40 #include "libiberty.h"
  41
  42 #include <setjmp.h>
  43
  44 static int fetch_data (struct disassemble_info *, bfd_byte *);
  45 static void ckprefix (void);
  46 static const char *prefix_name (int, int);
  47 static int print_insn (bfd_vma, disassemble_info *);
  48 static void dofloat (int);
  49 static void OP_ST (int, int);
  50 static void OP_STi (int, int);
  51 static int putop (const char *, int);
  52 static void oappend (const char *);
  53 static void append_seg (void);
  54 static void OP_indirE (int, int);
  55 static void print_operand_value (char *, int, bfd_vma);
  56 static void OP_E_extended (int, int, int);
  57 static void print_displacement (char *, bfd_vma);
  58 static void OP_E (int, int);
  59 static void OP_G (int, int);
  60 static bfd_vma get64 (void);
  61 static bfd_signed_vma get32 (void);
  62 static bfd_signed_vma get32s (void);
  63 static int get16 (void);
  64 static void set_op (bfd_vma, int);
  65 static void OP_Skip_MODRM (int, int);
  66 static void OP_REG (int, int);
  67 static void OP_IMREG (int, int);
  68 static void OP_I (int, int);
  69 static void OP_I64 (int, int);
  70 static void OP_sI (int, int);
  71 static void OP_J (int, int);
  72 static void OP_SEG (int, int);
  73 static void OP_DIR (int, int);
  74 static void OP_OFF (int, int);
  75 static void OP_OFF64 (int, int);
  76 static void ptr_reg (int, int);
  77 static void OP_ESreg (int, int);
  78 static void OP_DSreg (int, int);
  79 static void OP_C (int, int);
  80 static void OP_D (int, int);
  81 static void OP_T (int, int);
  82 static void OP_R (int, int);
  83 static void OP_MMX (int, int);
  84 static void OP_XMM (int, int);
  85 static void OP_EM (int, int);
  86 static void OP_EX (int, int);
  87 static void OP_EMC (int,int);
  88 static void OP_MXC (int,int);
  89 static void OP_MS (int, int);
  90 static void OP_XS (int, int);
  91 static void OP_M (int, int);
  92 static void OP_0f07 (int, int);
  93 static void OP_Monitor (int, int);
  94 static void OP_Mwait (int, int);
  95 static void NOP_Fixup1 (int, int);
  96 static void NOP_Fixup2 (int, int);
  97 static void OP_3DNowSuffix (int, int);
  98 static void OP_SIMD_Suffix (int, int);
  99 static void BadOp (void);
 100 static void REP_Fixup (int, int);
 101 static void CMPXCHG8B_Fixup (int, int);
 102 static void XMM_Fixup (int, int);
 103 static void CRC32_Fixup (int, int);
 104 static void print_drex_arg (unsigned int, int, int);
 105 static void OP_DREX4 (int, int);
 106 static void OP_DREX3 (int, int);
 107 static void OP_DREX_ICMP (int, int);
 108 static void OP_DREX_FCMP (int, int);
 109
 110 struct dis_private {
 111   /* Points to first byte not fetched.  */
 112   bfd_byte *max_fetched;
 113   bfd_byte the_buffer[MAX_MNEM_SIZE];
 114   bfd_vma insn_start;
 115   int orig_sizeflag;
 116   jmp_buf bailout;
 117 };
 118
 119 enum address_mode
 120 {
 121   mode_16bit,
 122   mode_32bit,
 123   mode_64bit
 124 };
 125
 126 enum address_mode address_mode;
 127
 128 /* Flags for the prefixes for the current instruction.  See below.  */
 129 static int prefixes;
 130
 131 /* REX prefix the current instruction.  See below.  */
 132 static int rex;
 133 /* Bits of REX we've already used.  */
 134 static int rex_used;
 135 /* Mark parts used in the REX prefix.  When we are testing for
 136    empty prefix (for 8bit register REX extension), just mask it
 137    out.  Otherwise test for REX bit is excuse for existence of REX
 138    only in case value is nonzero.  */
 139 #define USED_REX(value)                                 \
 140   {                                                     \
 141     if (value)                                          \
 142       {                                                 \
 143         if ((rex & value))                              \
 144           rex_used |= (value) | REX_OPCODE;             \
 145       }                                                 \
 146     else                                                \
 147       rex_used |= REX_OPCODE;                           \
 148   }
 149
 150 /* Special 'registers' for DREX handling */
 151 #define DREX_REG_UNKNOWN        1000    /* not initialized */
 152 #define DREX_REG_MEMORY         1001    /* use MODRM/SIB/OFFSET memory */
 153
 154 /* The DREX byte has the following fields:
 155    Bits 7-4 -- DREX.Dest, xmm destination register
 156    Bit 3    -- DREX.OC0, operand config bit defines operand order
 157    Bit 2    -- DREX.R, equivalent to REX_R bit, to extend ModRM register
 158    Bit 1    -- DREX.X, equivalent to REX_X bit, to extend SIB index field
 159    Bit 0    -- DREX.W, equivalent to REX_B bit, to extend ModRM r/m field,
 160                SIB base field, or opcode reg field.  */
 161 #define DREX_XMM(drex) ((drex >> 4) & 0xf)
 162 #define DREX_OC0(drex) ((drex >> 3) & 0x1)
 163
 164 /* Flags for prefixes which we somehow handled when printing the
 165    current instruction.  */
 166 static int used_prefixes;
 167
 168 /* Flags stored in PREFIXES.  */
 169 #define PREFIX_REPZ 1
 170 #define PREFIX_REPNZ 2
 171 #define PREFIX_LOCK 4
 172 #define PREFIX_CS 8
 173 #define PREFIX_SS 0x10
 174 #define PREFIX_DS 0x20
 175 #define PREFIX_ES 0x40
 176 #define PREFIX_FS 0x80
 177 #define PREFIX_GS 0x100
 178 #define PREFIX_DATA 0x200
 179 #define PREFIX_ADDR 0x400
 180 #define PREFIX_FWAIT 0x800
 181
 182 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
 183    to ADDR (exclusive) are valid.  Returns 1 for success, longjmps
 184    on error.  */
 185 #define FETCH_DATA(info, addr) \
 186   ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
 187    ? 1 : fetch_data ((info), (addr)))
 188
 189 static int
 190 fetch_data (struct disassemble_info *info, bfd_byte *addr)
 191 {
 192   int status;
 193   struct dis_private *priv = (struct dis_private *) info->private_data;
 194   bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
 195
 196   if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
 197     status = (*info->read_memory_func) (start,
 198                                         priv->max_fetched,
 199                                         addr - priv->max_fetched,
 200                                         info);
 201   else
 202     status = -1;
 203   if (status != 0)
 204     {
 205       /* If we did manage to read at least one byte, then
 206          print_insn_i386 will do something sensible.  Otherwise, print
 207          an error.  We do that here because this is where we know
 208          STATUS.  */
 209       if (priv->max_fetched == priv->the_buffer)
 210         (*info->memory_error_func) (status, start, info);
 211       longjmp (priv->bailout, 1);
 212     }
 213   else
 214     priv->max_fetched = addr;
 215   return 1;
 216 }
 217
 218 #define XX { NULL, 0 }
 219
 220 #define Eb { OP_E, b_mode }
 221 #define Ev { OP_E, v_mode }
 222 #define Ed { OP_E, d_mode }
 223 #define Edq { OP_E, dq_mode }
 224 #define Edqw { OP_E, dqw_mode }
 225 #define Edqb { OP_E, dqb_mode }
 226 #define Edqd { OP_E, dqd_mode }
 227 #define Eq { OP_E, q_mode }
 228 #define indirEv { OP_indirE, stack_v_mode }
 229 #define indirEp { OP_indirE, f_mode }
 230 #define stackEv { OP_E, stack_v_mode }
 231 #define Em { OP_E, m_mode }
 232 #define Ew { OP_E, w_mode }
 233 #define M { OP_M, 0 }           /* lea, lgdt, etc. */
 234 #define Ma { OP_M, v_mode }
 235 #define Mb { OP_M, b_mode }
 236 #define Md { OP_M, d_mode }
 237 #define Mp { OP_M, f_mode }             /* 32 or 48 bit memory operand for LDS, LES etc */
 238 #define Mq { OP_M, q_mode }
 239 #define Gb { OP_G, b_mode }
 240 #define Gv { OP_G, v_mode }
 241 #define Gd { OP_G, d_mode }
 242 #define Gdq { OP_G, dq_mode }
 243 #define Gm { OP_G, m_mode }
 244 #define Gw { OP_G, w_mode }
 245 #define Rd { OP_R, d_mode }
 246 #define Rm { OP_R, m_mode }
 247 #define Ib { OP_I, b_mode }
 248 #define sIb { OP_sI, b_mode }   /* sign extened byte */
 249 #define Iv { OP_I, v_mode }
 250 #define Iq { OP_I, q_mode }
 251 #define Iv64 { OP_I64, v_mode }
 252 #define Iw { OP_I, w_mode }
 253 #define I1 { OP_I, const_1_mode }
 254 #define Jb { OP_J, b_mode }
 255 #define Jv { OP_J, v_mode }
 256 #define Cm { OP_C, m_mode }
 257 #define Dm { OP_D, m_mode }
 258 #define Td { OP_T, d_mode }
 259 #define Skip_MODRM { OP_Skip_MODRM, 0 }
 260
 261 #define RMeAX { OP_REG, eAX_reg }
 262 #define RMeBX { OP_REG, eBX_reg }
 263 #define RMeCX { OP_REG, eCX_reg }
 264 #define RMeDX { OP_REG, eDX_reg }
 265 #define RMeSP { OP_REG, eSP_reg }
 266 #define RMeBP { OP_REG, eBP_reg }
 267 #define RMeSI { OP_REG, eSI_reg }
 268 #define RMeDI { OP_REG, eDI_reg }
 269 #define RMrAX { OP_REG, rAX_reg }
 270 #define RMrBX { OP_REG, rBX_reg }
 271 #define RMrCX { OP_REG, rCX_reg }
 272 #define RMrDX { OP_REG, rDX_reg }
 273 #define RMrSP { OP_REG, rSP_reg }
 274 #define RMrBP { OP_REG, rBP_reg }
 275 #define RMrSI { OP_REG, rSI_reg }
 276 #define RMrDI { OP_REG, rDI_reg }
 277 #define RMAL { OP_REG, al_reg }
 278 #define RMAL { OP_REG, al_reg }
 279 #define RMCL { OP_REG, cl_reg }
 280 #define RMDL { OP_REG, dl_reg }
 281 #define RMBL { OP_REG, bl_reg }
 282 #define RMAH { OP_REG, ah_reg }
 283 #define RMCH { OP_REG, ch_reg }
 284 #define RMDH { OP_REG, dh_reg }
 285 #define RMBH { OP_REG, bh_reg }
 286 #define RMAX { OP_REG, ax_reg }
 287 #define RMDX { OP_REG, dx_reg }
 288
 289 #define eAX { OP_IMREG, eAX_reg }
 290 #define eBX { OP_IMREG, eBX_reg }
 291 #define eCX { OP_IMREG, eCX_reg }
 292 #define eDX { OP_IMREG, eDX_reg }
 293 #define eSP { OP_IMREG, eSP_reg }
 294 #define eBP { OP_IMREG, eBP_reg }
 295 #define eSI { OP_IMREG, eSI_reg }
 296 #define eDI { OP_IMREG, eDI_reg }
 297 #define AL { OP_IMREG, al_reg }
 298 #define CL { OP_IMREG, cl_reg }
 299 #define DL { OP_IMREG, dl_reg }
 300 #define BL { OP_IMREG, bl_reg }
 301 #define AH { OP_IMREG, ah_reg }
 302 #define CH { OP_IMREG, ch_reg }
 303 #define DH { OP_IMREG, dh_reg }
 304 #define BH { OP_IMREG, bh_reg }
 305 #define AX { OP_IMREG, ax_reg }
 306 #define DX { OP_IMREG, dx_reg }
 307 #define zAX { OP_IMREG, z_mode_ax_reg }
 308 #define indirDX { OP_IMREG, indir_dx_reg }
 309
 310 #define Sw { OP_SEG, w_mode }
 311 #define Sv { OP_SEG, v_mode }
 312 #define Ap { OP_DIR, 0 }
 313 #define Ob { OP_OFF64, b_mode }
 314 #define Ov { OP_OFF64, v_mode }
 315 #define Xb { OP_DSreg, eSI_reg }
 316 #define Xv { OP_DSreg, eSI_reg }
 317 #define Xz { OP_DSreg, eSI_reg }
 318 #define Yb { OP_ESreg, eDI_reg }
 319 #define Yv { OP_ESreg, eDI_reg }
 320 #define DSBX { OP_DSreg, eBX_reg }
 321
 322 #define es { OP_REG, es_reg }
 323 #define ss { OP_REG, ss_reg }
 324 #define cs { OP_REG, cs_reg }
 325 #define ds { OP_REG, ds_reg }
 326 #define fs { OP_REG, fs_reg }
 327 #define gs { OP_REG, gs_reg }
 328
 329 #define MX { OP_MMX, 0 }
 330 #define XM { OP_XMM, 0 }
 331 #define EM { OP_EM, v_mode }
 332 #define EMd { OP_EM, d_mode }
 333 #define EMx { OP_EM, x_mode }
 334 #define EXw { OP_EX, w_mode }
 335 #define EXd { OP_EX, d_mode }
 336 #define EXq { OP_EX, q_mode }
 337 #define EXx { OP_EX, x_mode }
 338 #define MS { OP_MS, v_mode }
 339 #define XS { OP_XS, v_mode }
 340 #define EMCq { OP_EMC, q_mode }
 341 #define MXC { OP_MXC, 0 }
 342 #define OPSUF { OP_3DNowSuffix, 0 }
 343 #define OPSIMD { OP_SIMD_Suffix, 0 }
 344 #define XMM0 { XMM_Fixup, 0 }
 345
 346 /* Used handle "rep" prefix for string instructions.  */
 347 #define Xbr { REP_Fixup, eSI_reg }
 348 #define Xvr { REP_Fixup, eSI_reg }
 349 #define Ybr { REP_Fixup, eDI_reg }
 350 #define Yvr { REP_Fixup, eDI_reg }
 351 #define Yzr { REP_Fixup, eDI_reg }
 352 #define indirDXr { REP_Fixup, indir_dx_reg }
 353 #define ALr { REP_Fixup, al_reg }
 354 #define eAXr { REP_Fixup, eAX_reg }
 355
 356 #define cond_jump_flag { NULL, cond_jump_mode }
 357 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
 358
 359 /* bits in sizeflag */
 360 #define SUFFIX_ALWAYS 4
 361 #define AFLAG 2
 362 #define DFLAG 1
 363
 364 /* byte operand */
 365 #define b_mode                  1
 366 /* operand size depends on prefixes */
 367 #define v_mode                  (b_mode + 1)
 368 /* word operand */
 369 #define w_mode                  (v_mode + 1)
 370 /* double word operand  */
 371 #define d_mode                  (w_mode + 1)
 372 /* quad word operand */
 373 #define q_mode                  (d_mode + 1)
 374 /* ten-byte operand */
 375 #define t_mode                  (q_mode + 1)
 376 /* 16-byte XMM operand */
 377 #define x_mode                  (t_mode + 1)
 378 /* d_mode in 32bit, q_mode in 64bit mode.  */
 379 #define m_mode                  (x_mode + 1)
 380 #define cond_jump_mode          (m_mode + 1)
 381 #define loop_jcxz_mode          (cond_jump_mode + 1)
 382 /* operand size depends on REX prefixes.  */
 383 #define dq_mode                 (loop_jcxz_mode + 1)
 384 /* registers like dq_mode, memory like w_mode.  */
 385 #define dqw_mode                (dq_mode + 1)
 386 /* 4- or 6-byte pointer operand */
 387 #define f_mode                  (dqw_mode + 1)
 388 #define const_1_mode            (f_mode + 1)
 389 /* v_mode for stack-related opcodes.  */
 390 #define stack_v_mode            (const_1_mode + 1)
 391 /* non-quad operand size depends on prefixes */
 392 #define z_mode                  (stack_v_mode + 1)
 393 /* 16-byte operand */
 394 #define o_mode                  (z_mode + 1)
 395 /* registers like dq_mode, memory like b_mode.  */
 396 #define dqb_mode                (o_mode + 1)
 397 /* registers like dq_mode, memory like d_mode.  */
 398 #define dqd_mode                (dqb_mode + 1)
 399
 400 #define es_reg                  (dqd_mode + 1)
 401 #define cs_reg                  (es_reg + 1)
 402 #define ss_reg                  (cs_reg + 1)
 403 #define ds_reg                  (ss_reg + 1)
 404 #define fs_reg                  (ds_reg + 1)
 405 #define gs_reg                  (fs_reg + 1)
 406
 407 #define eAX_reg                 (gs_reg + 1)
 408 #define eCX_reg                 (eAX_reg + 1)
 409 #define eDX_reg                 (eCX_reg + 1)
 410 #define eBX_reg                 (eDX_reg + 1)
 411 #define eSP_reg                 (eBX_reg + 1)
 412 #define eBP_reg                 (eSP_reg + 1)
 413 #define eSI_reg                 (eBP_reg + 1)
 414 #define eDI_reg                 (eSI_reg + 1)
 415
 416 #define al_reg                  (eDI_reg + 1)
 417 #define cl_reg                  (al_reg + 1)
 418 #define dl_reg                  (cl_reg + 1)
 419 #define bl_reg                  (dl_reg + 1)
 420 #define ah_reg                  (bl_reg + 1)
 421 #define ch_reg                  (ah_reg + 1)
 422 #define dh_reg                  (ch_reg + 1)
 423 #define bh_reg                  (dh_reg + 1)
 424
 425 #define ax_reg                  (bh_reg + 1)
 426 #define cx_reg                  (ax_reg + 1)
 427 #define dx_reg                  (cx_reg + 1)
 428 #define bx_reg                  (dx_reg + 1)
 429 #define sp_reg                  (bx_reg + 1)
 430 #define bp_reg                  (sp_reg + 1)
 431 #define si_reg                  (bp_reg + 1)
 432 #define di_reg                  (si_reg + 1)
 433
 434 #define rAX_reg                 (di_reg + 1)
 435 #define rCX_reg                 (rAX_reg + 1)
 436 #define rDX_reg                 (rCX_reg + 1)
 437 #define rBX_reg                 (rDX_reg + 1)
 438 #define rSP_reg                 (rBX_reg + 1)
 439 #define rBP_reg                 (rSP_reg + 1)
 440 #define rSI_reg                 (rBP_reg + 1)
 441 #define rDI_reg                 (rSI_reg + 1)
 442
 443 #define z_mode_ax_reg           (rDI_reg + 1)
 444 #define indir_dx_reg            (z_mode_ax_reg + 1)
 445
 446 #define MAX_BYTEMODE    indir_dx_reg
 447
 448 /* Flags that are OR'ed into the bytemode field to pass extra
 449    information.  */
 450 #define DREX_OC1                0x10000 /* OC1 bit set */
 451 #define DREX_NO_OC0             0x20000 /* OC0 bit not used */
 452 #define DREX_MASK               0x40000 /* mask to delete */
 453
 454 #if MAX_BYTEMODE >= DREX_OC1
 455 #error MAX_BYTEMODE must be less than DREX_OC1
 456 #endif
 457
 458 #define FLOATCODE 1
 459 #define USE_REG_TABLE 2
 460 #define USE_MOD_TABLE 3
 461 #define USE_RM_TABLE 4
 462 #define USE_PREFIX_TABLE 5
 463 #define USE_X86_64_TABLE 6
 464 #define USE_3BYTE_TABLE 7
 465
 466 #define FLOAT                   NULL, { { NULL, FLOATCODE } }
 467
 468 #define DIS386(T, I)            NULL, { { NULL, (T)}, { NULL,  (I) } }
 469 #define REG_TABLE(I)            DIS386 (USE_REG_TABLE, (I))
 470 #define MOD_TABLE(I)            DIS386 (USE_MOD_TABLE, (I))
 471 #define RM_TABLE(I)             DIS386 (USE_RM_TABLE, (I))
 472 #define PREFIX_TABLE(I)         DIS386 (USE_PREFIX_TABLE, (I))
 473 #define X86_64_TABLE(I)         DIS386 (USE_X86_64_TABLE, (I))
 474 #define THREE_BYTE_TABLE(I)     DIS386 (USE_3BYTE_TABLE, (I))
 475
 476 #define REG_80                  0
 477 #define REG_81                  (REG_80 + 1)
 478 #define REG_82                  (REG_81 + 1)
 479 #define REG_8F                  (REG_82 + 1)
 480 #define REG_C0                  (REG_8F + 1)
 481 #define REG_C1                  (REG_C0 + 1)
 482 #define REG_C6                  (REG_C1 + 1)
 483 #define REG_C7                  (REG_C6 + 1)
 484 #define REG_D0                  (REG_C7 + 1)
 485 #define REG_D1                  (REG_D0 + 1)
 486 #define REG_D2                  (REG_D1 + 1)
 487 #define REG_D3                  (REG_D2 + 1)
 488 #define REG_F6                  (REG_D3 + 1)
 489 #define REG_F7                  (REG_F6 + 1)
 490 #define REG_FE                  (REG_F7 + 1)
 491 #define REG_FF                  (REG_FE + 1)
 492 #define REG_0F00                (REG_FF + 1)
 493 #define REG_0F01                (REG_0F00 + 1)
 494 #define REG_0F0E                (REG_0F01 + 1)
 495 #define REG_0F18                (REG_0F0E + 1)
 496 #define REG_0F71                (REG_0F18 + 1)
 497 #define REG_0F72                (REG_0F71 + 1)
 498 #define REG_0F73                (REG_0F72 + 1)
 499 #define REG_0FA6                (REG_0F73 + 1)
 500 #define REG_0FA7                (REG_0FA6 + 1)
 501 #define REG_0FAE                (REG_0FA7 + 1)
 502 #define REG_0FBA                (REG_0FAE + 1)
 503 #define REG_0FC7                (REG_0FBA + 1)
 504
 505 #define MOD_8D                  0
 506 #define MOD_0F13                (MOD_8D + 1)
 507 #define MOD_0F17                (MOD_0F13 + 1)
 508 #define MOD_0F20                (MOD_0F17 + 1)
 509 #define MOD_0F21                (MOD_0F20 + 1)
 510 #define MOD_0F22                (MOD_0F21 + 1)
 511 #define MOD_0F23                (MOD_0F22 + 1)
 512 #define MOD_0F24                (MOD_0F23 + 1)
 513 #define MOD_0F26                (MOD_0F24 + 1)
 514 #define MOD_0FB2                (MOD_0F26 + 1)
 515 #define MOD_0FB4                (MOD_0FB2 + 1)
 516 #define MOD_0FB5                (MOD_0FB4 + 1)
 517 #define MOD_0F01_REG_0          (MOD_0FB5 + 1)
 518 #define MOD_0F01_REG_1          (MOD_0F01_REG_0 + 1)
 519 #define MOD_0F01_REG_2          (MOD_0F01_REG_1 + 1)
 520 #define MOD_0F01_REG_3          (MOD_0F01_REG_2 + 1)
 521 #define MOD_0F01_REG_7          (MOD_0F01_REG_3 + 1)
 522 #define MOD_0F18_REG_0          (MOD_0F01_REG_7 + 1)
 523 #define MOD_0F18_REG_1          (MOD_0F18_REG_0 + 1)
 524 #define MOD_0F18_REG_2          (MOD_0F18_REG_1 + 1)
 525 #define MOD_0F18_REG_3          (MOD_0F18_REG_2 + 1)
 526 #define MOD_0F71_REG_2          (MOD_0F18_REG_3 + 1)
 527 #define MOD_0F71_REG_4          (MOD_0F71_REG_2 + 1)
 528 #define MOD_0F71_REG_6          (MOD_0F71_REG_4 + 1)
 529 #define MOD_0F72_REG_2          (MOD_0F71_REG_6 + 1)
 530 #define MOD_0F72_REG_4          (MOD_0F72_REG_2 + 1)
 531 #define MOD_0F72_REG_6          (MOD_0F72_REG_4 + 1)
 532 #define MOD_0F73_REG_2          (MOD_0F72_REG_6 + 1)
 533 #define MOD_0F73_REG_3          (MOD_0F73_REG_2 + 1)
 534 #define MOD_0F73_REG_6          (MOD_0F73_REG_3 + 1)
 535 #define MOD_0F73_REG_7          (MOD_0F73_REG_6 + 1)
 536 #define MOD_0FAE_REG_0          (MOD_0F73_REG_7 + 1)
 537 #define MOD_0FAE_REG_1          (MOD_0FAE_REG_0 + 1)
 538 #define MOD_0FAE_REG_2          (MOD_0FAE_REG_1 + 1)
 539 #define MOD_0FAE_REG_3          (MOD_0FAE_REG_2 + 1)
 540 #define MOD_0FAE_REG_5          (MOD_0FAE_REG_3 + 1)
 541 #define MOD_0FAE_REG_6          (MOD_0FAE_REG_5 + 1)
 542 #define MOD_0FAE_REG_7          (MOD_0FAE_REG_6 + 1)
 543 #define MOD_0FC7_REG_6          (MOD_0FAE_REG_7 + 1)
 544 #define MOD_0FC7_REG_7          (MOD_0FC7_REG_6 + 1)
 545 #define MOD_0F12_PREFIX_0       (MOD_0FC7_REG_7 + 1)
 546 #define MOD_0F16_PREFIX_0       (MOD_0F12_PREFIX_0 + 1)
 547 #define MOD_0FF0_PREFIX_3       (MOD_0F16_PREFIX_0 + 1)
 548 #define MOD_62_32BIT            (MOD_0FF0_PREFIX_3 + 1)
 549 #define MOD_C4_32BIT            (MOD_62_32BIT + 1)
 550 #define MOD_C5_32BIT            (MOD_C4_32BIT + 1)
 551
 552 #define RM_0F01_REG_0           0
 553 #define RM_0F01_REG_1           (RM_0F01_REG_0 + 1)
 554 #define RM_0F01_REG_3           (RM_0F01_REG_1 + 1)
 555 #define RM_0F01_REG_7           (RM_0F01_REG_3 + 1)
 556 #define RM_0FAE_REG_5           (RM_0F01_REG_7 + 1)
 557 #define RM_0FAE_REG_6           (RM_0FAE_REG_5 + 1)
 558 #define RM_0FAE_REG_7           (RM_0FAE_REG_6 + 1)
 559
 560 #define PREFIX_90               0
 561 #define PREFIX_0F10             (PREFIX_90 + 1)
 562 #define PREFIX_0F11             (PREFIX_0F10 + 1)
 563 #define PREFIX_0F12             (PREFIX_0F11 + 1)
 564 #define PREFIX_0F16             (PREFIX_0F12 + 1)
 565 #define PREFIX_0F2A             (PREFIX_0F16 + 1)
 566 #define PREFIX_0F2B             (PREFIX_0F2A + 1)
 567 #define PREFIX_0F2C             (PREFIX_0F2B + 1)
 568 #define PREFIX_0F2D             (PREFIX_0F2C + 1)
 569 #define PREFIX_0F2E             (PREFIX_0F2D + 1)
 570 #define PREFIX_0F2F             (PREFIX_0F2E + 1)
 571 #define PREFIX_0F51             (PREFIX_0F2F + 1)
 572 #define PREFIX_0F52             (PREFIX_0F51 + 1)
 573 #define PREFIX_0F53             (PREFIX_0F52 + 1)
 574 #define PREFIX_0F58             (PREFIX_0F53 + 1)
 575 #define PREFIX_0F59             (PREFIX_0F58 + 1)
 576 #define PREFIX_0F5A             (PREFIX_0F59 + 1)
 577 #define PREFIX_0F5B             (PREFIX_0F5A + 1)
 578 #define PREFIX_0F5C             (PREFIX_0F5B + 1)
 579 #define PREFIX_0F5D             (PREFIX_0F5C + 1)
 580 #define PREFIX_0F5E             (PREFIX_0F5D + 1)
 581 #define PREFIX_0F5F             (PREFIX_0F5E + 1)
 582 #define PREFIX_0F60             (PREFIX_0F5F + 1)
 583 #define PREFIX_0F61             (PREFIX_0F60 + 1)
 584 #define PREFIX_0F62             (PREFIX_0F61 + 1)
 585 #define PREFIX_0F6C             (PREFIX_0F62 + 1)
 586 #define PREFIX_0F6D             (PREFIX_0F6C + 1)
 587 #define PREFIX_0F6F             (PREFIX_0F6D + 1)
 588 #define PREFIX_0F70             (PREFIX_0F6F + 1)
 589 #define PREFIX_0F78             (PREFIX_0F70 + 1)
 590 #define PREFIX_0F79             (PREFIX_0F78 + 1)
 591 #define PREFIX_0F7C             (PREFIX_0F79 + 1)
 592 #define PREFIX_0F7D             (PREFIX_0F7C + 1)
 593 #define PREFIX_0F7E             (PREFIX_0F7D + 1)
 594 #define PREFIX_0F7F             (PREFIX_0F7E + 1)
 595 #define PREFIX_0FB8             (PREFIX_0F7F + 1)
 596 #define PREFIX_0FBD             (PREFIX_0FB8 + 1)
 597 #define PREFIX_0FC2             (PREFIX_0FBD + 1)
 598 #define PREFIX_0FD0             (PREFIX_0FC2 + 1)
 599 #define PREFIX_0FD6             (PREFIX_0FD0 + 1)
 600 #define PREFIX_0FE6             (PREFIX_0FD6 + 1)
 601 #define PREFIX_0FE7             (PREFIX_0FE6 + 1)
 602 #define PREFIX_0FF0             (PREFIX_0FE7 + 1)
 603 #define PREFIX_0FF7             (PREFIX_0FF0 + 1)
 604 #define PREFIX_0F3810           (PREFIX_0FF7 + 1)
 605 #define PREFIX_0F3814           (PREFIX_0F3810 + 1)
 606 #define PREFIX_0F3815           (PREFIX_0F3814 + 1)
 607 #define PREFIX_0F3817           (PREFIX_0F3815 + 1)
 608 #define PREFIX_0F3820           (PREFIX_0F3817 + 1)
 609 #define PREFIX_0F3821           (PREFIX_0F3820 + 1)
 610 #define PREFIX_0F3822           (PREFIX_0F3821 + 1)
 611 #define PREFIX_0F3823           (PREFIX_0F3822 + 1)
 612 #define PREFIX_0F3824           (PREFIX_0F3823 + 1)
 613 #define PREFIX_0F3825           (PREFIX_0F3824 + 1)
 614 #define PREFIX_0F3828           (PREFIX_0F3825 + 1)
 615 #define PREFIX_0F3829           (PREFIX_0F3828 + 1)
 616 #define PREFIX_0F382A           (PREFIX_0F3829 + 1)
 617 #define PREFIX_0F382B           (PREFIX_0F382A + 1)
 618 #define PREFIX_0F3830           (PREFIX_0F382B + 1)
 619 #define PREFIX_0F3831           (PREFIX_0F3830 + 1)
 620 #define PREFIX_0F3832           (PREFIX_0F3831 + 1)
 621 #define PREFIX_0F3833           (PREFIX_0F3832 + 1)
 622 #define PREFIX_0F3834           (PREFIX_0F3833 + 1)
 623 #define PREFIX_0F3835           (PREFIX_0F3834 + 1)
 624 #define PREFIX_0F3837           (PREFIX_0F3835 + 1)
 625 #define PREFIX_0F3838           (PREFIX_0F3837 + 1)
 626 #define PREFIX_0F3839           (PREFIX_0F3838 + 1)
 627 #define PREFIX_0F383A           (PREFIX_0F3839 + 1)
 628 #define PREFIX_0F383B           (PREFIX_0F383A + 1)
 629 #define PREFIX_0F383C           (PREFIX_0F383B + 1)
 630 #define PREFIX_0F383D           (PREFIX_0F383C + 1)
 631 #define PREFIX_0F383E           (PREFIX_0F383D + 1)
 632 #define PREFIX_0F383F           (PREFIX_0F383E + 1)
 633 #define PREFIX_0F3840           (PREFIX_0F383F + 1)
 634 #define PREFIX_0F3841           (PREFIX_0F3840 + 1)
 635 #define PREFIX_0F38F0           (PREFIX_0F3841 + 1)
 636 #define PREFIX_0F38F1           (PREFIX_0F38F0 + 1)
 637 #define PREFIX_0F3A08           (PREFIX_0F38F1 + 1)
 638 #define PREFIX_0F3A09           (PREFIX_0F3A08 + 1)
 639 #define PREFIX_0F3A0A           (PREFIX_0F3A09 + 1)
 640 #define PREFIX_0F3A0B           (PREFIX_0F3A0A + 1)
 641 #define PREFIX_0F3A0C           (PREFIX_0F3A0B + 1)
 642 #define PREFIX_0F3A0D           (PREFIX_0F3A0C + 1)
 643 #define PREFIX_0F3A0E           (PREFIX_0F3A0D + 1)
 644 #define PREFIX_0F3A14           (PREFIX_0F3A0E + 1)
 645 #define PREFIX_0F3A15           (PREFIX_0F3A14 + 1)
 646 #define PREFIX_0F3A16           (PREFIX_0F3A15 + 1)
 647 #define PREFIX_0F3A17           (PREFIX_0F3A16 + 1)
 648 #define PREFIX_0F3A20           (PREFIX_0F3A17 + 1)
 649 #define PREFIX_0F3A21           (PREFIX_0F3A20 + 1)
 650 #define PREFIX_0F3A22           (PREFIX_0F3A21 + 1)
 651 #define PREFIX_0F3A40           (PREFIX_0F3A22 + 1)
 652 #define PREFIX_0F3A41           (PREFIX_0F3A40 + 1)
 653 #define PREFIX_0F3A42           (PREFIX_0F3A41 + 1)
 654 #define PREFIX_0F3A60           (PREFIX_0F3A42 + 1)
 655 #define PREFIX_0F3A61           (PREFIX_0F3A60 + 1)
 656 #define PREFIX_0F3A62           (PREFIX_0F3A61 + 1)
 657 #define PREFIX_0F3A63           (PREFIX_0F3A62 + 1)
 658 #define PREFIX_0F73_REG_3       (PREFIX_0F3A63 + 1)
 659 #define PREFIX_0F73_REG_7       (PREFIX_0F73_REG_3 + 1)
 660 #define PREFIX_0FC7_REG_6       (PREFIX_0F73_REG_7 + 1)
 661
 662 #define X86_64_06               0
 663 #define X86_64_07               (X86_64_06 + 1)
 664 #define X86_64_0D               (X86_64_07 + 1)
 665 #define X86_64_16               (X86_64_0D + 1)
 666 #define X86_64_17               (X86_64_16 + 1)
 667 #define X86_64_1E               (X86_64_17 + 1)
 668 #define X86_64_1F               (X86_64_1E + 1)
 669 #define X86_64_27               (X86_64_1F + 1)
 670 #define X86_64_2F               (X86_64_27 + 1)
 671 #define X86_64_37               (X86_64_2F + 1)
 672 #define X86_64_3F               (X86_64_37 + 1)
 673 #define X86_64_60               (X86_64_3F + 1)
 674 #define X86_64_61               (X86_64_60 + 1)
 675 #define X86_64_62               (X86_64_61 + 1)
 676 #define X86_64_63               (X86_64_62 + 1)
 677 #define X86_64_6D               (X86_64_63 + 1)
 678 #define X86_64_6F               (X86_64_6D + 1)
 679 #define X86_64_9A               (X86_64_6F + 1)
 680 #define X86_64_C4               (X86_64_9A + 1)
 681 #define X86_64_C5               (X86_64_C4 + 1)
 682 #define X86_64_CE               (X86_64_C5 + 1)
 683 #define X86_64_D4               (X86_64_CE + 1)
 684 #define X86_64_D5               (X86_64_D4 + 1)
 685 #define X86_64_EA               (X86_64_D5 + 1)
 686 #define X86_64_0F01_REG_0       (X86_64_EA + 1)
 687 #define X86_64_0F01_REG_1       (X86_64_0F01_REG_0 + 1)
 688 #define X86_64_0F01_REG_2       (X86_64_0F01_REG_1 + 1)
 689 #define X86_64_0F01_REG_3       (X86_64_0F01_REG_2 + 1)
 690
 691 #define THREE_BYTE_0F24         0
 692 #define THREE_BYTE_0F25         (THREE_BYTE_0F24 + 1)
 693 #define THREE_BYTE_0F38         (THREE_BYTE_0F25 + 1)
 694 #define THREE_BYTE_0F3A         (THREE_BYTE_0F38 + 1)
 695 #define THREE_BYTE_0F7A         (THREE_BYTE_0F3A + 1)
 696 #define THREE_BYTE_0F7B         (THREE_BYTE_0F7A + 1)
 697
 698 typedef void (*op_rtn) (int bytemode, int sizeflag);
 699
 700 struct dis386 {
 701   const char *name;
 702   struct
 703     {
 704       op_rtn rtn;
 705       int bytemode;
 706     } op[MAX_OPERANDS];
 707 };
 708
 709 /* Upper case letters in the instruction names here are macros.
 710    'A' => print 'b' if no register operands or suffix_always is true
 711    'B' => print 'b' if suffix_always is true
 712    'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
 713    .      size prefix
 714    'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
 715    .      suffix_always is true
 716    'E' => print 'e' if 32-bit form of jcxz
 717    'F' => print 'w' or 'l' depending on address size prefix (loop insns)
 718    'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
 719    'H' => print ",pt" or ",pn" branch hint
 720    'I' => honor following macro letter even in Intel mode (implemented only
 721    .      for some of the macro letters)
 722    'J' => print 'l'
 723    'K' => print 'd' or 'q' if rex prefix is present.
 724    'L' => print 'l' if suffix_always is true
 725    'N' => print 'n' if instruction has no wait "prefix"
 726    'O' => print 'd' or 'o' (or 'q' in Intel mode)
 727    'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
 728    .      or suffix_always is true.  print 'q' if rex prefix is present.
 729    'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
 730    .      is true
 731    'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
 732    'S' => print 'w', 'l' or 'q' if suffix_always is true
 733    'T' => print 'q' in 64bit mode and behave as 'P' otherwise
 734    'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
 735    'V' => print 'q' in 64bit mode and behave as 'S' otherwise
 736    'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
 737    'X' => print 's', 'd' depending on data16 prefix (for XMM)
 738    'Y' => 'q' if instruction has an REX 64bit overwrite prefix and
 739           suffix_always is true.
 740    'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
 741
 742    Many of the above letters print nothing in Intel mode.  See "putop"
 743    for the details.
 744
 745    Braces '{' and '}', and vertical bars '|', indicate alternative
 746    mnemonic strings for AT&T and Intel.  */
 747
 748 static const struct dis386 dis386[] = {
 749   /* 00 */
 750   { "addB",             { Eb, Gb } },
 751   { "addS",             { Ev, Gv } },
 752   { "addB",             { Gb, Eb } },
 753   { "addS",             { Gv, Ev } },
 754   { "addB",             { AL, Ib } },
 755   { "addS",             { eAX, Iv } },
 756   { X86_64_TABLE (X86_64_06) },
 757   { X86_64_TABLE (X86_64_07) },
 758   /* 08 */
 759   { "orB",              { Eb, Gb } },
 760   { "orS",              { Ev, Gv } },
 761   { "orB",              { Gb, Eb } },
 762   { "orS",              { Gv, Ev } },
 763   { "orB",              { AL, Ib } },
 764   { "orS",              { eAX, Iv } },
 765   { X86_64_TABLE (X86_64_0D) },
 766   { "(bad)",            { XX } },       /* 0x0f extended opcode escape */
 767   /* 10 */
 768   { "adcB",             { Eb, Gb } },
 769   { "adcS",             { Ev, Gv } },
 770   { "adcB",             { Gb, Eb } },
 771   { "adcS",             { Gv, Ev } },
 772   { "adcB",             { AL, Ib } },
 773   { "adcS",             { eAX, Iv } },
 774   { X86_64_TABLE (X86_64_16) },
 775   { X86_64_TABLE (X86_64_17) },
 776   /* 18 */
 777   { "sbbB",             { Eb, Gb } },
 778   { "sbbS",             { Ev, Gv } },
 779   { "sbbB",             { Gb, Eb } },
 780   { "sbbS",             { Gv, Ev } },
 781   { "sbbB",             { AL, Ib } },
 782   { "sbbS",             { eAX, Iv } },
 783   { X86_64_TABLE (X86_64_1E) },
 784   { X86_64_TABLE (X86_64_1F) },
 785   /* 20 */
 786   { "andB",             { Eb, Gb } },
 787   { "andS",             { Ev, Gv } },
 788   { "andB",             { Gb, Eb } },
 789   { "andS",             { Gv, Ev } },
 790   { "andB",             { AL, Ib } },
 791   { "andS",             { eAX, Iv } },
 792   { "(bad)",            { XX } },       /* SEG ES prefix */
 793   { X86_64_TABLE (X86_64_27) },
 794   /* 28 */
 795   { "subB",             { Eb, Gb } },
 796   { "subS",             { Ev, Gv } },
 797   { "subB",             { Gb, Eb } },
 798   { "subS",             { Gv, Ev } },
 799   { "subB",             { AL, Ib } },
 800   { "subS",             { eAX, Iv } },
 801   { "(bad)",            { XX } },       /* SEG CS prefix */
 802   { X86_64_TABLE (X86_64_2F) },
 803   /* 30 */
 804   { "xorB",             { Eb, Gb } },
 805   { "xorS",             { Ev, Gv } },
 806   { "xorB",             { Gb, Eb } },
 807   { "xorS",             { Gv, Ev } },
 808   { "xorB",             { AL, Ib } },
 809   { "xorS",             { eAX, Iv } },
 810   { "(bad)",            { XX } },       /* SEG SS prefix */
 811   { X86_64_TABLE (X86_64_37) },
 812   /* 38 */
 813   { "cmpB",             { Eb, Gb } },
 814   { "cmpS",             { Ev, Gv } },
 815   { "cmpB",             { Gb, Eb } },
 816   { "cmpS",             { Gv, Ev } },
 817   { "cmpB",             { AL, Ib } },
 818   { "cmpS",             { eAX, Iv } },
 819   { "(bad)",            { XX } },       /* SEG DS prefix */
 820   { X86_64_TABLE (X86_64_3F) },
 821   /* 40 */
 822   { "inc{S|}",          { RMeAX } },
 823   { "inc{S|}",          { RMeCX } },
 824   { "inc{S|}",          { RMeDX } },
 825   { "inc{S|}",          { RMeBX } },
 826   { "inc{S|}",          { RMeSP } },
 827   { "inc{S|}",          { RMeBP } },
 828   { "inc{S|}",          { RMeSI } },
 829   { "inc{S|}",          { RMeDI } },
 830   /* 48 */
 831   { "dec{S|}",          { RMeAX } },
 832   { "dec{S|}",          { RMeCX } },
 833   { "dec{S|}",          { RMeDX } },
 834   { "dec{S|}",          { RMeBX } },
 835   { "dec{S|}",          { RMeSP } },
 836   { "dec{S|}",          { RMeBP } },
 837   { "dec{S|}",          { RMeSI } },
 838   { "dec{S|}",          { RMeDI } },
 839   /* 50 */
 840   { "pushV",            { RMrAX } },
 841   { "pushV",            { RMrCX } },
 842   { "pushV",            { RMrDX } },
 843   { "pushV",            { RMrBX } },
 844   { "pushV",            { RMrSP } },
 845   { "pushV",            { RMrBP } },
 846   { "pushV",            { RMrSI } },
 847   { "pushV",            { RMrDI } },
 848   /* 58 */
 849   { "popV",             { RMrAX } },
 850   { "popV",             { RMrCX } },
 851   { "popV",             { RMrDX } },
 852   { "popV",             { RMrBX } },
 853   { "popV",             { RMrSP } },
 854   { "popV",             { RMrBP } },
 855   { "popV",             { RMrSI } },
 856   { "popV",             { RMrDI } },
 857   /* 60 */
 858   { X86_64_TABLE (X86_64_60) },
 859   { X86_64_TABLE (X86_64_61) },
 860   { X86_64_TABLE (X86_64_62) },
 861   { X86_64_TABLE (X86_64_63) },
 862   { "(bad)",            { XX } },       /* seg fs */
 863   { "(bad)",            { XX } },       /* seg gs */
 864   { "(bad)",            { XX } },       /* op size prefix */
 865   { "(bad)",            { XX } },       /* adr size prefix */
 866   /* 68 */
 867   { "pushT",            { Iq } },
 868   { "imulS",            { Gv, Ev, Iv } },
 869   { "pushT",            { sIb } },
 870   { "imulS",            { Gv, Ev, sIb } },
 871   { "ins{b|}",          { Ybr, indirDX } },
 872   { X86_64_TABLE (X86_64_6D) },
 873   { "outs{b|}",         { indirDXr, Xb } },
 874   { X86_64_TABLE (X86_64_6F) },
 875   /* 70 */
 876   { "joH",              { Jb, XX, cond_jump_flag } },
 877   { "jnoH",             { Jb, XX, cond_jump_flag } },
 878   { "jbH",              { Jb, XX, cond_jump_flag } },
 879   { "jaeH",             { Jb, XX, cond_jump_flag } },
 880   { "jeH",              { Jb, XX, cond_jump_flag } },
 881   { "jneH",             { Jb, XX, cond_jump_flag } },
 882   { "jbeH",             { Jb, XX, cond_jump_flag } },
 883   { "jaH",              { Jb, XX, cond_jump_flag } },
 884   /* 78 */
 885   { "jsH",              { Jb, XX, cond_jump_flag } },
 886   { "jnsH",             { Jb, XX, cond_jump_flag } },
 887   { "jpH",              { Jb, XX, cond_jump_flag } },
 888   { "jnpH",             { Jb, XX, cond_jump_flag } },
 889   { "jlH",              { Jb, XX, cond_jump_flag } },
 890   { "jgeH",             { Jb, XX, cond_jump_flag } },
 891   { "jleH",             { Jb, XX, cond_jump_flag } },
 892   { "jgH",              { Jb, XX, cond_jump_flag } },
 893   /* 80 */
 894   { REG_TABLE (REG_80) },
 895   { REG_TABLE (REG_81) },
 896   { "(bad)",            { XX } },
 897   { REG_TABLE (REG_82) },
 898   { "testB",            { Eb, Gb } },
 899   { "testS",            { Ev, Gv } },
 900   { "xchgB",            { Eb, Gb } },
 901   { "xchgS",            { Ev, Gv } },
 902   /* 88 */
 903   { "movB",             { Eb, Gb } },
 904   { "movS",             { Ev, Gv } },
 905   { "movB",             { Gb, Eb } },
 906   { "movS",             { Gv, Ev } },
 907   { "movD",             { Sv, Sw } },
 908   { MOD_TABLE (MOD_8D) },
 909   { "movD",             { Sw, Sv } },
 910   { REG_TABLE (REG_8F) },
 911   /* 90 */
 912   { PREFIX_TABLE (PREFIX_90) },
 913   { "xchgS",            { RMeCX, eAX } },
 914   { "xchgS",            { RMeDX, eAX } },
 915   { "xchgS",            { RMeBX, eAX } },
 916   { "xchgS",            { RMeSP, eAX } },
 917   { "xchgS",            { RMeBP, eAX } },
 918   { "xchgS",            { RMeSI, eAX } },
 919   { "xchgS",            { RMeDI, eAX } },
 920   /* 98 */
 921   { "cW{t|}R",          { XX } },
 922   { "cR{t|}O",          { XX } },
 923   { X86_64_TABLE (X86_64_9A) },
 924   { "(bad)",            { XX } },       /* fwait */
 925   { "pushfT",           { XX } },
 926   { "popfT",            { XX } },
 927   { "sahf",             { XX } },
 928   { "lahf",             { XX } },
 929   /* a0 */
 930   { "movB",             { AL, Ob } },
 931   { "movS",             { eAX, Ov } },
 932   { "movB",             { Ob, AL } },
 933   { "movS",             { Ov, eAX } },
 934   { "movs{b|}",         { Ybr, Xb } },
 935   { "movs{R|}",         { Yvr, Xv } },
 936   { "cmps{b|}",         { Xb, Yb } },
 937   { "cmps{R|}",         { Xv, Yv } },
 938   /* a8 */
 939   { "testB",            { AL, Ib } },
 940   { "testS",            { eAX, Iv } },
 941   { "stosB",            { Ybr, AL } },
 942   { "stosS",            { Yvr, eAX } },
 943   { "lodsB",            { ALr, Xb } },
 944   { "lodsS",            { eAXr, Xv } },
 945   { "scasB",            { AL, Yb } },
 946   { "scasS",            { eAX, Yv } },
 947   /* b0 */
 948   { "movB",             { RMAL, Ib } },
 949   { "movB",             { RMCL, Ib } },
 950   { "movB",             { RMDL, Ib } },
 951   { "movB",             { RMBL, Ib } },
 952   { "movB",             { RMAH, Ib } },
 953   { "movB",             { RMCH, Ib } },
 954   { "movB",             { RMDH, Ib } },
 955   { "movB",             { RMBH, Ib } },
 956   /* b8 */
 957   { "movS",             { RMeAX, Iv64 } },
 958   { "movS",             { RMeCX, Iv64 } },
 959   { "movS",             { RMeDX, Iv64 } },
 960   { "movS",             { RMeBX, Iv64 } },
 961   { "movS",             { RMeSP, Iv64 } },
 962   { "movS",             { RMeBP, Iv64 } },
 963   { "movS",             { RMeSI, Iv64 } },
 964   { "movS",             { RMeDI, Iv64 } },
 965   /* c0 */
 966   { REG_TABLE (REG_C0) },
 967   { REG_TABLE (REG_C1) },
 968   { "retT",             { Iw } },
 969   { "retT",             { XX } },
 970   { X86_64_TABLE (X86_64_C4) },
 971   { X86_64_TABLE (X86_64_C5) },
 972   { REG_TABLE (REG_C6) },
 973   { REG_TABLE (REG_C7) },
 974   /* c8 */
 975   { "enterT",           { Iw, Ib } },
 976   { "leaveT",           { XX } },
 977   { "lretP",            { Iw } },
 978   { "lretP",            { XX } },
 979   { "int3",             { XX } },
 980   { "int",              { Ib } },
 981   { X86_64_TABLE (X86_64_CE) },
 982   { "iretP",            { XX } },
 983   /* d0 */
 984   { REG_TABLE (REG_D0) },
 985   { REG_TABLE (REG_D1) },
 986   { REG_TABLE (REG_D2) },
 987   { REG_TABLE (REG_D3) },
 988   { X86_64_TABLE (X86_64_D4) },
 989   { X86_64_TABLE (X86_64_D5) },
 990   { "(bad)",            { XX } },
 991   { "xlat",             { DSBX } },
 992   /* d8 */
 993   { FLOAT },
 994   { FLOAT },
 995   { FLOAT },
 996   { FLOAT },
 997   { FLOAT },
 998   { FLOAT },
 999   { FLOAT },
1000   { FLOAT },
1001   /* e0 */
1002   { "loopneFH",         { Jb, XX, loop_jcxz_flag } },
1003   { "loopeFH",          { Jb, XX, loop_jcxz_flag } },
1004   { "loopFH",           { Jb, XX, loop_jcxz_flag } },
1005   { "jEcxzH",           { Jb, XX, loop_jcxz_flag } },
1006   { "inB",              { AL, Ib } },
1007   { "inG",              { zAX, Ib } },
1008   { "outB",             { Ib, AL } },
1009   { "outG",             { Ib, zAX } },
1010   /* e8 */
1011   { "callT",            { Jv } },
1012   { "jmpT",             { Jv } },
1013   { X86_64_TABLE (X86_64_EA) },
1014   { "jmp",              { Jb } },
1015   { "inB",              { AL, indirDX } },
1016   { "inG",              { zAX, indirDX } },
1017   { "outB",             { indirDX, AL } },
1018   { "outG",             { indirDX, zAX } },
1019   /* f0 */
1020   { "(bad)",            { XX } },       /* lock prefix */
1021   { "icebp",            { XX } },
1022   { "(bad)",            { XX } },       /* repne */
1023   { "(bad)",            { XX } },       /* repz */
1024   { "hlt",              { XX } },
1025   { "cmc",              { XX } },
1026   { REG_TABLE (REG_F6) },
1027   { REG_TABLE (REG_F7) },
1028   /* f8 */
1029   { "clc",              { XX } },
1030   { "stc",              { XX } },
1031   { "cli",              { XX } },
1032   { "sti",              { XX } },
1033   { "cld",              { XX } },
1034   { "std",              { XX } },
1035   { REG_TABLE (REG_FE) },
1036   { REG_TABLE (REG_FF) },
1037 };
1038
1039 static const struct dis386 dis386_twobyte[] = {
1040   /* 00 */
1041   { REG_TABLE (REG_0F00 ) },
1042   { REG_TABLE (REG_0F01 ) },
1043   { "larS",             { Gv, Ew } },
1044   { "lslS",             { Gv, Ew } },
1045   { "(bad)",            { XX } },
1046   { "syscall",          { XX } },
1047   { "clts",             { XX } },
1048   { "sysretP",          { XX } },
1049   /* 08 */
1050   { "invd",             { XX } },
1051   { "wbinvd",           { XX } },
1052   { "(bad)",            { XX } },
1053   { "ud2a",             { XX } },
1054   { "(bad)",            { XX } },
1055   { REG_TABLE (REG_0F0E) },
1056   { "femms",            { XX } },
1057   { "",                 { MX, EM, OPSUF } }, /* See OP_3DNowSuffix.  */
1058   /* 10 */
1059   { PREFIX_TABLE (PREFIX_0F10) },
1060   { PREFIX_TABLE (PREFIX_0F11) },
1061   { PREFIX_TABLE (PREFIX_0F12) },
1062   { MOD_TABLE (MOD_0F13) },
1063   { "unpcklpX",         { XM, EXx } },
1064   { "unpckhpX",         { XM, EXx } },
1065   { PREFIX_TABLE (PREFIX_0F16) },
1066   { MOD_TABLE (MOD_0F17) },
1067   /* 18 */
1068   { REG_TABLE (REG_0F18) },
1069   { "(bad)",            { XX } },
1070   { "(bad)",            { XX } },
1071   { "(bad)",            { XX } },
1072   { "(bad)",            { XX } },
1073   { "(bad)",            { XX } },
1074   { "(bad)",            { XX } },
1075   { "nopQ",             { Ev } },
1076   /* 20 */
1077   { MOD_TABLE (MOD_0F20) },
1078   { MOD_TABLE (MOD_0F21) },
1079   { MOD_TABLE (MOD_0F22) },
1080   { MOD_TABLE (MOD_0F23) },
1081   { MOD_TABLE (MOD_0F24) },
1082   { THREE_BYTE_TABLE (THREE_BYTE_0F25) },
1083   { MOD_TABLE (MOD_0F26) },
1084   { "(bad)",            { XX } },
1085   /* 28 */
1086   { "movapX",           { XM, EXx } },
1087   { "movapX",           { EXx,  XM } },
1088   { PREFIX_TABLE (PREFIX_0F2A) },
1089   { PREFIX_TABLE (PREFIX_0F2B) },
1090   { PREFIX_TABLE (PREFIX_0F2C) },
1091   { PREFIX_TABLE (PREFIX_0F2D) },
1092   { PREFIX_TABLE (PREFIX_0F2E) },
1093   { PREFIX_TABLE (PREFIX_0F2F) },
1094   /* 30 */
1095   { "wrmsr",            { XX } },
1096   { "rdtsc",            { XX } },
1097   { "rdmsr",            { XX } },
1098   { "rdpmc",            { XX } },
1099   { "sysenter",         { XX } },
1100   { "sysexit",          { XX } },
1101   { "(bad)",            { XX } },
1102   { "getsec",           { XX } },
1103   /* 38 */
1104   { THREE_BYTE_TABLE (THREE_BYTE_0F38) },
1105   { "(bad)",            { XX } },
1106   { THREE_BYTE_TABLE (THREE_BYTE_0F3A) },
1107   { "(bad)",            { XX } },
1108   { "(bad)",            { XX } },
1109   { "(bad)",            { XX } },
1110   { "(bad)",            { XX } },
1111   { "(bad)",            { XX } },
1112   /* 40 */
1113   { "cmovo",            { Gv, Ev } },
1114   { "cmovno",           { Gv, Ev } },
1115   { "cmovb",            { Gv, Ev } },
1116   { "cmovae",           { Gv, Ev } },
1117   { "cmove",            { Gv, Ev } },
1118   { "cmovne",           { Gv, Ev } },
1119   { "cmovbe",           { Gv, Ev } },
1120   { "cmova",            { Gv, Ev } },
1121   /* 48 */
1122   { "cmovs",            { Gv, Ev } },
1123   { "cmovns",           { Gv, Ev } },
1124   { "cmovp",            { Gv, Ev } },
1125   { "cmovnp",           { Gv, Ev } },
1126   { "cmovl",            { Gv, Ev } },
1127   { "cmovge",           { Gv, Ev } },
1128   { "cmovle",           { Gv, Ev } },
1129   { "cmovg",            { Gv, Ev } },
1130   /* 50 */
1131   { "movmskpX",         { Gdq, XS } },
1132   { PREFIX_TABLE (PREFIX_0F51) },
1133   { PREFIX_TABLE (PREFIX_0F52) },
1134   { PREFIX_TABLE (PREFIX_0F53) },
1135   { "andpX",            { XM, EXx } },
1136   { "andnpX",           { XM, EXx } },
1137   { "orpX",             { XM, EXx } },
1138   { "xorpX",            { XM, EXx } },
1139   /* 58 */
1140   { PREFIX_TABLE (PREFIX_0F58) },
1141   { PREFIX_TABLE (PREFIX_0F59) },
1142   { PREFIX_TABLE (PREFIX_0F5A) },
1143   { PREFIX_TABLE (PREFIX_0F5B) },
1144   { PREFIX_TABLE (PREFIX_0F5C) },
1145   { PREFIX_TABLE (PREFIX_0F5D) },
1146   { PREFIX_TABLE (PREFIX_0F5E) },
1147   { PREFIX_TABLE (PREFIX_0F5F) },
1148   /* 60 */
1149   { PREFIX_TABLE (PREFIX_0F60) },
1150   { PREFIX_TABLE (PREFIX_0F61) },
1151   { PREFIX_TABLE (PREFIX_0F62) },
1152   { "packsswb",         { MX, EM } },
1153   { "pcmpgtb",          { MX, EM } },
1154   { "pcmpgtw",          { MX, EM } },
1155   { "pcmpgtd",          { MX, EM } },
1156   { "packuswb",         { MX, EM } },
1157   /* 68 */
1158   { "punpckhbw",        { MX, EM } },
1159   { "punpckhwd",        { MX, EM } },
1160   { "punpckhdq",        { MX, EM } },
1161   { "packssdw",         { MX, EM } },
1162   { PREFIX_TABLE (PREFIX_0F6C) },
1163   { PREFIX_TABLE (PREFIX_0F6D) },
1164   { "movK",             { MX, Edq } },
1165   { PREFIX_TABLE (PREFIX_0F6F) },
1166   /* 70 */
1167   { PREFIX_TABLE (PREFIX_0F70) },
1168   { REG_TABLE (REG_0F71) },
1169   { REG_TABLE (REG_0F72) },
1170   { REG_TABLE (REG_0F73) },
1171   { "pcmpeqb",          { MX, EM } },
1172   { "pcmpeqw",          { MX, EM } },
1173   { "pcmpeqd",          { MX, EM } },
1174   { "emms",             { XX } },
1175   /* 78 */
1176   { PREFIX_TABLE (PREFIX_0F78) },
1177   { PREFIX_TABLE (PREFIX_0F79) },
1178   { THREE_BYTE_TABLE (THREE_BYTE_0F7A) },
1179   { THREE_BYTE_TABLE (THREE_BYTE_0F7B) },
1180   { PREFIX_TABLE (PREFIX_0F7C) },
1181   { PREFIX_TABLE (PREFIX_0F7D) },
1182   { PREFIX_TABLE (PREFIX_0F7E) },
1183   { PREFIX_TABLE (PREFIX_0F7F) },
1184   /* 80 */
1185   { "joH",              { Jv, XX, cond_jump_flag } },
1186   { "jnoH",             { Jv, XX, cond_jump_flag } },
1187   { "jbH",              { Jv, XX, cond_jump_flag } },
1188   { "jaeH",             { Jv, XX, cond_jump_flag } },
1189   { "jeH",              { Jv, XX, cond_jump_flag } },
1190   { "jneH",             { Jv, XX, cond_jump_flag } },
1191   { "jbeH",             { Jv, XX, cond_jump_flag } },
1192   { "jaH",              { Jv, XX, cond_jump_flag } },
1193   /* 88 */
1194   { "jsH",              { Jv, XX, cond_jump_flag } },
1195   { "jnsH",             { Jv, XX, cond_jump_flag } },
1196   { "jpH",              { Jv, XX, cond_jump_flag } },
1197   { "jnpH",             { Jv, XX, cond_jump_flag } },
1198   { "jlH",              { Jv, XX, cond_jump_flag } },
1199   { "jgeH",             { Jv, XX, cond_jump_flag } },
1200   { "jleH",             { Jv, XX, cond_jump_flag } },
1201   { "jgH",              { Jv, XX, cond_jump_flag } },
1202   /* 90 */
1203   { "seto",             { Eb } },
1204   { "setno",            { Eb } },
1205   { "setb",             { Eb } },
1206   { "setae",            { Eb } },
1207   { "sete",             { Eb } },
1208   { "setne",            { Eb } },
1209   { "setbe",            { Eb } },
1210   { "seta",             { Eb } },
1211   /* 98 */
1212   { "sets",             { Eb } },
1213   { "setns",            { Eb } },
1214   { "setp",             { Eb } },
1215   { "setnp",            { Eb } },
1216   { "setl",             { Eb } },
1217   { "setge",            { Eb } },
1218   { "setle",            { Eb } },
1219   { "setg",             { Eb } },
1220   /* a0 */
1221   { "pushT",            { fs } },
1222   { "popT",             { fs } },
1223   { "cpuid",            { XX } },
1224   { "btS",              { Ev, Gv } },
1225   { "shldS",            { Ev, Gv, Ib } },
1226   { "shldS",            { Ev, Gv, CL } },
1227   { REG_TABLE (REG_0FA6) },
1228   { REG_TABLE (REG_0FA7) },
1229   /* a8 */
1230   { "pushT",            { gs } },
1231   { "popT",             { gs } },
1232   { "rsm",              { XX } },
1233   { "btsS",             { Ev, Gv } },
1234   { "shrdS",            { Ev, Gv, Ib } },
1235   { "shrdS",            { Ev, Gv, CL } },
1236   { REG_TABLE (REG_0FAE) },
1237   { "imulS",            { Gv, Ev } },
1238   /* b0 */
1239   { "cmpxchgB",         { Eb, Gb } },
1240   { "cmpxchgS",         { Ev, Gv } },
1241   { MOD_TABLE (MOD_0FB2) },
1242   { "btrS",             { Ev, Gv } },
1243   { MOD_TABLE (MOD_0FB4) },
1244   { MOD_TABLE (MOD_0FB5) },
1245   { "movz{bR|x}",       { Gv, Eb } },
1246   { "movz{wR|x}",       { Gv, Ew } }, /* yes, there really is movzww ! */
1247   /* b8 */
1248   { PREFIX_TABLE (PREFIX_0FB8) },
1249   { "ud2b",             { XX } },
1250   { REG_TABLE (REG_0FBA) },
1251   { "btcS",             { Ev, Gv } },
1252   { "bsfS",             { Gv, Ev } },
1253   { PREFIX_TABLE (PREFIX_0FBD) },
1254   { "movs{bR|x}",       { Gv, Eb } },
1255   { "movs{wR|x}",       { Gv, Ew } }, /* yes, there really is movsww ! */
1256   /* c0 */
1257   { "xaddB",            { Eb, Gb } },
1258   { "xaddS",            { Ev, Gv } },
1259   { PREFIX_TABLE (PREFIX_0FC2) },
1260   { "movntiS",          { Ev, Gv } },
1261   { "pinsrw",           { MX, Edqw, Ib } },
1262   { "pextrw",           { Gdq, MS, Ib } },
1263   { "shufpX",           { XM, EXx, Ib } },
1264   { REG_TABLE (REG_0FC7) },
1265   /* c8 */
1266   { "bswap",            { RMeAX } },
1267   { "bswap",            { RMeCX } },
1268   { "bswap",            { RMeDX } },
1269   { "bswap",            { RMeBX } },
1270   { "bswap",            { RMeSP } },
1271   { "bswap",            { RMeBP } },
1272   { "bswap",            { RMeSI } },
1273   { "bswap",            { RMeDI } },
1274   /* d0 */
1275   { PREFIX_TABLE (PREFIX_0FD0) },
1276   { "psrlw",            { MX, EM } },
1277   { "psrld",            { MX, EM } },
1278   { "psrlq",            { MX, EM } },
1279   { "paddq",            { MX, EM } },
1280   { "pmullw",           { MX, EM } },
1281   { PREFIX_TABLE (PREFIX_0FD6) },
1282   { "pmovmskb",         { Gdq, MS } },
1283   /* d8 */
1284   { "psubusb",          { MX, EM } },
1285   { "psubusw",          { MX, EM } },
1286   { "pminub",           { MX, EM } },
1287   { "pand",             { MX, EM } },
1288   { "paddusb",          { MX, EM } },
1289   { "paddusw",          { MX, EM } },
1290   { "pmaxub",           { MX, EM } },
1291   { "pandn",            { MX, EM } },
1292   /* e0 */
1293   { "pavgb",            { MX, EM } },
1294   { "psraw",            { MX, EM } },
1295   { "psrad",            { MX, EM } },
1296   { "pavgw",            { MX, EM } },
1297   { "pmulhuw",          { MX, EM } },
1298   { "pmulhw",           { MX, EM } },
1299   { PREFIX_TABLE (PREFIX_0FE6) },
1300   { PREFIX_TABLE (PREFIX_0FE7) },
1301   /* e8 */
1302   { "psubsb",           { MX, EM } },
1303   { "psubsw",           { MX, EM } },
1304   { "pminsw",           { MX, EM } },
1305   { "por",              { MX, EM } },
1306   { "paddsb",           { MX, EM } },
1307   { "paddsw",           { MX, EM } },
1308   { "pmaxsw",           { MX, EM } },
1309   { "pxor",             { MX, EM } },
1310   /* f0 */
1311   { PREFIX_TABLE (PREFIX_0FF0) },
1312   { "psllw",            { MX, EM } },
1313   { "pslld",            { MX, EM } },
1314   { "psllq",            { MX, EM } },
1315   { "pmuludq",          { MX, EM } },
1316   { "pmaddwd",          { MX, EM } },
1317   { "psadbw",           { MX, EM } },
1318   { PREFIX_TABLE (PREFIX_0FF7) },
1319   /* f8 */
1320   { "psubb",            { MX, EM } },
1321   { "psubw",            { MX, EM } },
1322   { "psubd",            { MX, EM } },
1323   { "psubq",            { MX, EM } },
1324   { "paddb",            { MX, EM } },
1325   { "paddw",            { MX, EM } },
1326   { "paddd",            { MX, EM } },
1327   { "(bad)",            { XX } },
1328 };
1329
1330 static const unsigned char onebyte_has_modrm[256] = {
1331   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1332   /*       -------------------------------        */
1333   /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1334   /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1335   /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1336   /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1337   /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1338   /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1339   /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1340   /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1341   /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1342   /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1343   /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1344   /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1345   /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1346   /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1347   /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1348   /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1  /* f0 */
1349   /*       -------------------------------        */
1350   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1351 };
1352
1353 static const unsigned char twobyte_has_modrm[256] = {
1354   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1355   /*       -------------------------------        */
1356   /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1357   /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1358   /* 20 */ 1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1, /* 2f */
1359   /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1360   /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1361   /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1362   /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1363   /* 70 */ 1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1, /* 7f */
1364   /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1365   /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1366   /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1367   /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1368   /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1369   /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1370   /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1371   /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0  /* ff */
1372   /*       -------------------------------        */
1373   /*       0 1 2 3 4 5 6 7 8 9 a b c d e f        */
1374 };
1375
1376 static char obuf[100];
1377 static char *obufp;
1378 static char scratchbuf[100];
1379 static unsigned char *start_codep;
1380 static unsigned char *insn_codep;
1381 static unsigned char *codep;
1382 static const char *lock_prefix;
1383 static const char *data_prefix;
1384 static const char *addr_prefix;
1385 static const char *repz_prefix;
1386 static const char *repnz_prefix;
1387 static disassemble_info *the_info;
1388 static struct
1389   {
1390     int mod;
1391     int reg;
1392     int rm;
1393   }
1394 modrm;
1395 static unsigned char need_modrm;
1396
1397 /* If we are accessing mod/rm/reg without need_modrm set, then the
1398    values are stale.  Hitting this abort likely indicates that you
1399    need to update onebyte_has_modrm or twobyte_has_modrm.  */
1400 #define MODRM_CHECK  if (!need_modrm) abort ()
1401
1402 static const char **names64;
1403 static const char **names32;
1404 static const char **names16;
1405 static const char **names8;
1406 static const char **names8rex;
1407 static const char **names_seg;
1408 static const char *index64;
1409 static const char *index32;
1410 static const char **index16;
1411
1412 static const char *intel_names64[] = {
1413   "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1414   "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1415 };
1416 static const char *intel_names32[] = {
1417   "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1418   "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1419 };
1420 static const char *intel_names16[] = {
1421   "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1422   "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1423 };
1424 static const char *intel_names8[] = {
1425   "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1426 };
1427 static const char *intel_names8rex[] = {
1428   "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1429   "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1430 };
1431 static const char *intel_names_seg[] = {
1432   "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1433 };
1434 static const char *intel_index64 = "riz";
1435 static const char *intel_index32 = "eiz";
1436 static const char *intel_index16[] = {
1437   "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1438 };
1439
1440 static const char *att_names64[] = {
1441   "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1442   "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1443 };
1444 static const char *att_names32[] = {
1445   "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1446   "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1447 };
1448 static const char *att_names16[] = {
1449   "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1450   "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1451 };
1452 static const char *att_names8[] = {
1453   "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1454 };
1455 static const char *att_names8rex[] = {
1456   "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1457   "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1458 };
1459 static const char *att_names_seg[] = {
1460   "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1461 };
1462 static const char *att_index64 = "%riz";
1463 static const char *att_index32 = "%eiz";
1464 static const char *att_index16[] = {
1465   "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1466 };
1467
1468 static const struct dis386 reg_table[][8] = {
1469   /* REG_80 */
1470   {
1471     { "addA",   { Eb, Ib } },
1472     { "orA",    { Eb, Ib } },
1473     { "adcA",   { Eb, Ib } },
1474     { "sbbA",   { Eb, Ib } },
1475     { "andA",   { Eb, Ib } },
1476     { "subA",   { Eb, Ib } },
1477     { "xorA",   { Eb, Ib } },
1478     { "cmpA",   { Eb, Ib } },
1479   },
1480   /* REG_81 */
1481   {
1482     { "addQ",   { Ev, Iv } },
1483     { "orQ",    { Ev, Iv } },
1484     { "adcQ",   { Ev, Iv } },
1485     { "sbbQ",   { Ev, Iv } },
1486     { "andQ",   { Ev, Iv } },
1487     { "subQ",   { Ev, Iv } },
1488     { "xorQ",   { Ev, Iv } },
1489     { "cmpQ",   { Ev, Iv } },
1490   },
1491   /* REG_82 */
1492   {
1493     { "addQ",   { Ev, sIb } },
1494     { "orQ",    { Ev, sIb } },
1495     { "adcQ",   { Ev, sIb } },
1496     { "sbbQ",   { Ev, sIb } },
1497     { "andQ",   { Ev, sIb } },
1498     { "subQ",   { Ev, sIb } },
1499     { "xorQ",   { Ev, sIb } },
1500     { "cmpQ",   { Ev, sIb } },
1501   },
1502   /* REG_8F */
1503   {
1504     { "popU",   { stackEv } },
1505     { "(bad)",  { XX } },
1506     { "(bad)",  { XX } },
1507     { "(bad)",  { XX } },
1508     { "(bad)",  { XX } },
1509     { "(bad)",  { XX } },
1510     { "(bad)",  { XX } },
1511     { "(bad)",  { XX } },
1512   },
1513   /* REG_C0 */
1514   {
1515     { "rolA",   { Eb, Ib } },
1516     { "rorA",   { Eb, Ib } },
1517     { "rclA",   { Eb, Ib } },
1518     { "rcrA",   { Eb, Ib } },
1519     { "shlA",   { Eb, Ib } },
1520     { "shrA",   { Eb, Ib } },
1521     { "(bad)",  { XX } },
1522     { "sarA",   { Eb, Ib } },
1523   },
1524   /* REG_C1 */
1525   {
1526     { "rolQ",   { Ev, Ib } },
1527     { "rorQ",   { Ev, Ib } },
1528     { "rclQ",   { Ev, Ib } },
1529     { "rcrQ",   { Ev, Ib } },
1530     { "shlQ",   { Ev, Ib } },
1531     { "shrQ",   { Ev, Ib } },
1532     { "(bad)",  { XX } },
1533     { "sarQ",   { Ev, Ib } },
1534   },
1535   /* REG_C6 */
1536   {
1537     { "movA",   { Eb, Ib } },
1538     { "(bad)",  { XX } },
1539     { "(bad)",  { XX } },
1540     { "(bad)",  { XX } },
1541     { "(bad)",  { XX } },
1542     { "(bad)",  { XX } },
1543     { "(bad)",  { XX } },
1544     { "(bad)",  { XX } },
1545   },
1546   /* REG_C7 */
1547   {
1548     { "movQ",   { Ev, Iv } },
1549     { "(bad)",  { XX } },
1550     { "(bad)",  { XX } },
1551     { "(bad)",  { XX } },
1552     { "(bad)",  { XX } },
1553     { "(bad)",  { XX } },
1554     { "(bad)",  { XX } },
1555     { "(bad)",  { XX } },
1556   },
1557   /* REG_D0 */
1558   {
1559     { "rolA",   { Eb, I1 } },
1560     { "rorA",   { Eb, I1 } },
1561     { "rclA",   { Eb, I1 } },
1562     { "rcrA",   { Eb, I1 } },
1563     { "shlA",   { Eb, I1 } },
1564     { "shrA",   { Eb, I1 } },
1565     { "(bad)",  { XX } },
1566     { "sarA",   { Eb, I1 } },
1567   },
1568   /* REG_D1 */
1569   {
1570     { "rolQ",   { Ev, I1 } },
1571     { "rorQ",   { Ev, I1 } },
1572     { "rclQ",   { Ev, I1 } },
1573     { "rcrQ",   { Ev, I1 } },
1574     { "shlQ",   { Ev, I1 } },
1575     { "shrQ",   { Ev, I1 } },
1576     { "(bad)",  { XX } },
1577     { "sarQ",   { Ev, I1 } },
1578   },
1579   /* REG_D2 */
1580   {
1581     { "rolA",   { Eb, CL } },
1582     { "rorA",   { Eb, CL } },
1583     { "rclA",   { Eb, CL } },
1584     { "rcrA",   { Eb, CL } },
1585     { "shlA",   { Eb, CL } },
1586     { "shrA",   { Eb, CL } },
1587     { "(bad)",  { XX } },
1588     { "sarA",   { Eb, CL } },
1589   },
1590   /* REG_D3 */
1591   {
1592     { "rolQ",   { Ev, CL } },
1593     { "rorQ",   { Ev, CL } },
1594     { "rclQ",   { Ev, CL } },
1595     { "rcrQ",   { Ev, CL } },
1596     { "shlQ",   { Ev, CL } },
1597     { "shrQ",   { Ev, CL } },
1598     { "(bad)",  { XX } },
1599     { "sarQ",   { Ev, CL } },
1600   },
1601   /* REG_F6 */
1602   {
1603     { "testA",  { Eb, Ib } },
1604     { "(bad)",  { XX } },
1605     { "notA",   { Eb } },
1606     { "negA",   { Eb } },
1607     { "mulA",   { Eb } },       /* Don't print the implicit %al register,  */
1608     { "imulA",  { Eb } },       /* to distinguish these opcodes from other */
1609     { "divA",   { Eb } },       /* mul/imul opcodes.  Do the same for div  */
1610     { "idivA",  { Eb } },       /* and idiv for consistency.               */
1611   },
1612   /* REG_F7 */
1613   {
1614     { "testQ",  { Ev, Iv } },
1615     { "(bad)",  { XX } },
1616     { "notQ",   { Ev } },
1617     { "negQ",   { Ev } },
1618     { "mulQ",   { Ev } },       /* Don't print the implicit register.  */
1619     { "imulQ",  { Ev } },
1620     { "divQ",   { Ev } },
1621     { "idivQ",  { Ev } },
1622   },
1623   /* REG_FE */
1624   {
1625     { "incA",   { Eb } },
1626     { "decA",   { Eb } },
1627     { "(bad)",  { XX } },
1628     { "(bad)",  { XX } },
1629     { "(bad)",  { XX } },
1630     { "(bad)",  { XX } },
1631     { "(bad)",  { XX } },
1632     { "(bad)",  { XX } },
1633   },
1634   /* REG_FF */
1635   {
1636     { "incQ",   { Ev } },
1637     { "decQ",   { Ev } },
1638     { "callT",  { indirEv } },
1639     { "JcallT", { indirEp } },
1640     { "jmpT",   { indirEv } },
1641     { "JjmpT",  { indirEp } },
1642     { "pushU",  { stackEv } },
1643     { "(bad)",  { XX } },
1644   },
1645   /* REG_0F00 */
1646   {
1647     { "sldtD",  { Sv } },
1648     { "strD",   { Sv } },
1649     { "lldt",   { Ew } },
1650     { "ltr",    { Ew } },
1651     { "verr",   { Ew } },
1652     { "verw",   { Ew } },
1653     { "(bad)",  { XX } },
1654     { "(bad)",  { XX } },
1655   },
1656   /* REG_0F01 */
1657   {
1658     { MOD_TABLE (MOD_0F01_REG_0) },
1659     { MOD_TABLE (MOD_0F01_REG_1) },
1660     { MOD_TABLE (MOD_0F01_REG_2) },
1661     { MOD_TABLE (MOD_0F01_REG_3) },
1662     { "smswD",  { Sv } },
1663     { "(bad)",  { XX } },
1664     { "lmsw",   { Ew } },
1665     { MOD_TABLE (MOD_0F01_REG_7) },
1666   },
1667   /* REG_0F0E */
1668   {
1669     { "prefetch",       { Eb } },
1670     { "prefetchw",      { Eb } },
1671     { "(bad)",          { XX } },
1672     { "(bad)",          { XX } },
1673     { "(bad)",          { XX } },
1674     { "(bad)",          { XX } },
1675     { "(bad)",          { XX } },
1676     { "(bad)",          { XX } },
1677   },
1678   /* REG_0F18 */
1679   {
1680     { MOD_TABLE (MOD_0F18_REG_0) },
1681     { MOD_TABLE (MOD_0F18_REG_1) },
1682     { MOD_TABLE (MOD_0F18_REG_2) },
1683     { MOD_TABLE (MOD_0F18_REG_3) },
1684     { "(bad)",  { XX } },
1685     { "(bad)",  { XX } },
1686     { "(bad)",  { XX } },
1687     { "(bad)",  { XX } },
1688   },
1689   /* REG_0F71 */
1690   {
1691     { "(bad)",  { XX } },
1692     { "(bad)",  { XX } },
1693     { MOD_TABLE (MOD_0F71_REG_2) },
1694     { "(bad)",  { XX } },
1695     { MOD_TABLE (MOD_0F71_REG_4) },
1696     { "(bad)",  { XX } },
1697     { MOD_TABLE (MOD_0F71_REG_6) },
1698     { "(bad)",  { XX } },
1699   },
1700   /* REG_0F72 */
1701   {
1702     { "(bad)",  { XX } },
1703     { "(bad)",  { XX } },
1704     { MOD_TABLE (MOD_0F72_REG_2) },
1705     { "(bad)",  { XX } },
1706     { MOD_TABLE (MOD_0F72_REG_4) },
1707     { "(bad)",  { XX } },
1708     { MOD_TABLE (MOD_0F72_REG_6) },
1709     { "(bad)",  { XX } },
1710   },
1711   /* REG_0F73 */
1712   {
1713     { "(bad)",  { XX } },
1714     { "(bad)",  { XX } },
1715     { MOD_TABLE (MOD_0F73_REG_2) },
1716     { MOD_TABLE (MOD_0F73_REG_3) },
1717     { "(bad)",  { XX } },
1718     { "(bad)",  { XX } },
1719     { MOD_TABLE (MOD_0F73_REG_6) },
1720     { MOD_TABLE (MOD_0F73_REG_7) },
1721   },
1722   /* REG_0FA6 */
1723   {
1724     { "montmul",        { { OP_0f07, 0 } } },
1725     { "xsha1",          { { OP_0f07, 0 } } },
1726     { "xsha256",        { { OP_0f07, 0 } } },
1727     { "(bad)",          { { OP_0f07, 0 } } },
1728     { "(bad)",          { { OP_0f07, 0 } } },
1729     { "(bad)",          { { OP_0f07, 0 } } },
1730     { "(bad)",          { { OP_0f07, 0 } } },
1731     { "(bad)",          { { OP_0f07, 0 } } },
1732   },
1733   /* REG_0FA7 */
1734   {
1735     { "xstore-rng",     { { OP_0f07, 0 } } },
1736     { "xcrypt-ecb",     { { OP_0f07, 0 } } },
1737     { "xcrypt-cbc",     { { OP_0f07, 0 } } },
1738     { "xcrypt-ctr",     { { OP_0f07, 0 } } },
1739     { "xcrypt-cfb",     { { OP_0f07, 0 } } },
1740     { "xcrypt-ofb",     { { OP_0f07, 0 } } },
1741     { "(bad)",          { { OP_0f07, 0 } } },
1742     { "(bad)",          { { OP_0f07, 0 } } },
1743   },
1744   /* REG_0FAE */
1745   {
1746     { MOD_TABLE (MOD_0FAE_REG_0) },
1747     { MOD_TABLE (MOD_0FAE_REG_1) },
1748     { MOD_TABLE (MOD_0FAE_REG_2) },
1749     { MOD_TABLE (MOD_0FAE_REG_3) },
1750     { "(bad)",  { XX } },
1751     { MOD_TABLE (MOD_0FAE_REG_5) },
1752     { MOD_TABLE (MOD_0FAE_REG_6) },
1753     { MOD_TABLE (MOD_0FAE_REG_7) },
1754   },
1755   /* REG_0FBA */
1756   {
1757     { "(bad)",  { XX } },
1758     { "(bad)",  { XX } },
1759     { "(bad)",  { XX } },
1760     { "(bad)",  { XX } },
1761     { "btQ",    { Ev, Ib } },
1762     { "btsQ",   { Ev, Ib } },
1763     { "btrQ",   { Ev, Ib } },
1764     { "btcQ",   { Ev, Ib } },
1765   },
1766   /* REG_0FC7 */
1767   {
1768     { "(bad)",  { XX } },
1769     { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1770     { "(bad)",  { XX } },
1771     { "(bad)",  { XX } },
1772     { "(bad)",  { XX } },
1773     { "(bad)",  { XX } },
1774     { MOD_TABLE (MOD_0FC7_REG_6) },
1775     { MOD_TABLE (MOD_0FC7_REG_7) },
1776   },
1777 };
1778
1779 static const struct dis386 prefix_table[][4] = {
1780   /* PREFIX_90 */
1781   {
1782     { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
1783     { "pause", { XX } },
1784     { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
1785     { "(bad)", { XX } },
1786   },
1787
1788   /* PREFIX_0F10 */
1789   {
1790     { "movups", { XM, EXx } },
1791     { "movss",  { XM, EXd } },
1792     { "movupd", { XM, EXx } },
1793     { "movsd",  { XM, EXq } },
1794   },
1795
1796   /* PREFIX_0F11 */
1797   {
1798     { "movups", { EXx,  XM } },
1799     { "movss",  { EXd,  XM } },
1800     { "movupd", { EXx,  XM } },
1801     { "movsd",  { EXq,  XM } },
1802   },
1803
1804   /* PREFIX_0F12 */
1805   {
1806     { MOD_TABLE (MOD_0F12_PREFIX_0) },
1807     { "movsldup", { XM, EXx } },
1808     { "movlpd", { XM, EXq } },
1809     { "movddup", { XM, EXq } },
1810   },
1811
1812   /* PREFIX_0F16 */
1813   {
1814     { MOD_TABLE (MOD_0F16_PREFIX_0) },
1815     { "movshdup", { XM, EXx } },
1816     { "movhpd", { XM, EXq } },
1817     { "(bad)",  { XX } },
1818   },
1819
1820   /* PREFIX_0F2A */
1821   {
1822     { "cvtpi2ps", { XM, EMCq } },
1823     { "cvtsi2ssY", { XM, Ev } },
1824     { "cvtpi2pd", { XM, EMCq } },
1825     { "cvtsi2sdY", { XM, Ev } },
1826   },
1827
1828   /* PREFIX_0F2B */
1829   {
1830     {"movntps", { Ev, XM } },
1831     {"movntss", { Ed, XM } },
1832     {"movntpd", { Ev, XM } },
1833     {"movntsd", { Eq, XM } },
1834   },
1835
1836   /* PREFIX_0F2C */
1837   {
1838     { "cvttps2pi", { MXC, EXq } },
1839     { "cvttss2siY", { Gv, EXd } },
1840     { "cvttpd2pi", { MXC, EXx } },
1841     { "cvttsd2siY", { Gv, EXq } },
1842   },
1843
1844   /* PREFIX_0F2D */
1845   {
1846     { "cvtps2pi", { MXC, EXq } },
1847     { "cvtss2siY", { Gv, EXd } },
1848     { "cvtpd2pi", { MXC, EXx } },
1849     { "cvtsd2siY", { Gv, EXq } },
1850   },
1851
1852   /* PREFIX_0F2E */
1853   {
1854     { "ucomiss",{ XM, EXd } },
1855     { "(bad)",  { XX } },
1856     { "ucomisd",{ XM, EXq } },
1857     { "(bad)",  { XX } },
1858   },
1859
1860   /* PREFIX_0F2F */
1861   {
1862     { "comiss", { XM, EXd } },
1863     { "(bad)",  { XX } },
1864     { "comisd", { XM, EXq } },
1865     { "(bad)",  { XX } },
1866   },
1867
1868   /* PREFIX_0F51 */
1869   {
1870     { "sqrtps", { XM, EXx } },
1871     { "sqrtss", { XM, EXd } },
1872     { "sqrtpd", { XM, EXx } },
1873     { "sqrtsd", { XM, EXq } },
1874   },
1875
1876   /* PREFIX_0F52 */
1877   {
1878     { "rsqrtps",{ XM, EXx } },
1879     { "rsqrtss",{ XM, EXd } },
1880     { "(bad)",  { XX } },
1881     { "(bad)",  { XX } },
1882   },
1883
1884   /* PREFIX_0F53 */
1885   {
1886     { "rcpps",  { XM, EXx } },
1887     { "rcpss",  { XM, EXd } },
1888     { "(bad)",  { XX } },
1889     { "(bad)",  { XX } },
1890   },
1891
1892   /* PREFIX_0F58 */
1893   {
1894     { "addps", { XM, EXx } },
1895     { "addss", { XM, EXd } },
1896     { "addpd", { XM, EXx } },
1897     { "addsd", { XM, EXq } },
1898   },
1899
1900   /* PREFIX_0F59 */
1901   {
1902     { "mulps",  { XM, EXx } },
1903     { "mulss",  { XM, EXd } },
1904     { "mulpd",  { XM, EXx } },
1905     { "mulsd",  { XM, EXq } },
1906   },
1907
1908   /* PREFIX_0F5A */
1909   {
1910     { "cvtps2pd", { XM, EXq } },
1911     { "cvtss2sd", { XM, EXd } },
1912     { "cvtpd2ps", { XM, EXx } },
1913     { "cvtsd2ss", { XM, EXq } },
1914   },
1915
1916   /* PREFIX_0F5B */
1917   {
1918     { "cvtdq2ps", { XM, EXx } },
1919     { "cvttps2dq", { XM, EXx } },
1920     { "cvtps2dq", { XM, EXx } },
1921     { "(bad)",  { XX } },
1922   },
1923
1924   /* PREFIX_0F5C */
1925   {
1926     { "subps",  { XM, EXx } },
1927     { "subss",  { XM, EXd } },
1928     { "subpd",  { XM, EXx } },
1929     { "subsd",  { XM, EXq } },
1930   },
1931
1932   /* PREFIX_0F5D */
1933   {
1934     { "minps",  { XM, EXx } },
1935     { "minss",  { XM, EXd } },
1936     { "minpd",  { XM, EXx } },
1937     { "minsd",  { XM, EXq } },
1938   },
1939
1940   /* PREFIX_0F5E */
1941   {
1942     { "divps",  { XM, EXx } },
1943     { "divss",  { XM, EXd } },
1944     { "divpd",  { XM, EXx } },
1945     { "divsd",  { XM, EXq } },
1946   },
1947
1948   /* PREFIX_0F5F */
1949   {
1950     { "maxps",  { XM, EXx } },
1951     { "maxss",  { XM, EXd } },
1952     { "maxpd",  { XM, EXx } },
1953     { "maxsd",  { XM, EXq } },
1954   },
1955
1956   /* PREFIX_0F60 */
1957   {
1958     { "punpcklbw",{ MX, EMd } },
1959     { "(bad)",  { XX } },
1960     { "punpcklbw",{ MX, EMx } },
1961     { "(bad)",  { XX } },
1962   },
1963
1964   /* PREFIX_0F61 */
1965   {
1966     { "punpcklwd",{ MX, EMd } },
1967     { "(bad)",  { XX } },
1968     { "punpcklwd",{ MX, EMx } },
1969     { "(bad)",  { XX } },
1970   },
1971
1972   /* PREFIX_0F62 */
1973   {
1974     { "punpckldq",{ MX, EMd } },
1975     { "(bad)",  { XX } },
1976     { "punpckldq",{ MX, EMx } },
1977     { "(bad)",  { XX } },
1978   },
1979
1980   /* PREFIX_0F6C */
1981   {
1982     { "(bad)",  { XX } },
1983     { "(bad)",  { XX } },
1984     { "punpcklqdq", { XM, EXx } },
1985     { "(bad)",  { XX } },
1986   },
1987
1988   /* PREFIX_0F6D */
1989   {
1990     { "(bad)",  { XX } },
1991     { "(bad)",  { XX } },
1992     { "punpckhqdq", { XM, EXx } },
1993     { "(bad)",  { XX } },
1994   },
1995
1996   /* PREFIX_0F6F */
1997   {
1998     { "movq",   { MX, EM } },
1999     { "movdqu", { XM, EXx } },
2000     { "movdqa", { XM, EXx } },
2001     { "(bad)",  { XX } },
2002   },
2003
2004   /* PREFIX_0F70 */
2005   {
2006     { "pshufw", { MX, EM, Ib } },
2007     { "pshufhw",{ XM, EXx, Ib } },
2008     { "pshufd", { XM, EXx, Ib } },
2009     { "pshuflw",{ XM, EXx, Ib } },
2010   },
2011
2012   /* PREFIX_0F78 */
2013   {
2014     {"vmread",  { Em, Gm } },
2015     {"(bad)",   { XX } },
2016     {"extrq",   { XS, Ib, Ib } },
2017     {"insertq", { XM, XS, Ib, Ib } },
2018   },
2019
2020   /* PREFIX_0F79 */
2021   {
2022     {"vmwrite", { Gm, Em } },
2023     {"(bad)",   { XX } },
2024     {"extrq",   { XM, XS } },
2025     {"insertq", { XM, XS } },
2026   },
2027
2028   /* PREFIX_0F7C */
2029   {
2030     { "(bad)",  { XX } },
2031     { "(bad)",  { XX } },
2032     { "haddpd", { XM, EXx } },
2033     { "haddps", { XM, EXx } },
2034   },
2035
2036   /* PREFIX_0F7D */
2037   {
2038     { "(bad)",  { XX } },
2039     { "(bad)",  { XX } },
2040     { "hsubpd", { XM, EXx } },
2041     { "hsubps", { XM, EXx } },
2042   },
2043
2044   /* PREFIX_0F7E */
2045   {
2046     { "movK",   { Edq, MX } },
2047     { "movq",   { XM, EXq } },
2048     { "movK",   { Edq, XM } },
2049     { "(bad)",  { XX } },
2050   },
2051
2052   /* PREFIX_0F7F */
2053   {
2054     { "movq",   { EM, MX } },
2055     { "movdqu", { EXx,  XM } },
2056     { "movdqa", { EXx,  XM } },
2057     { "(bad)",  { XX } },
2058   },
2059
2060   /* PREFIX_0FB8 */
2061   {
2062     { "(bad)", { XX } },
2063     { "popcntS", { Gv, Ev } },
2064     { "(bad)", { XX } },
2065     { "(bad)", { XX } },
2066   },
2067
2068   /* PREFIX_0FBD */
2069   {
2070     { "bsrS",   { Gv, Ev } },
2071     { "lzcntS", { Gv, Ev } },
2072     { "bsrS",   { Gv, Ev } },
2073     { "(bad)",  { XX } },
2074   },
2075
2076   /* PREFIX_0FC2 */
2077   {
2078     { "", { XM, EXx, OPSIMD } },        /* See OP_SIMD_SUFFIX.  */
2079     { "", { XM, EXd, OPSIMD } },
2080     { "", { XM, EXx, OPSIMD } },
2081     { "", { XM, EXq, OPSIMD } },
2082   },
2083
2084   /* PREFIX_0FD0 */
2085   {
2086     { "(bad)",  { XX } },
2087     { "(bad)",  { XX } },
2088     { "addsubpd", { XM, EXx } },
2089     { "addsubps", { XM, EXx } },
2090   },
2091
2092   /* PREFIX_0FD6 */
2093   {
2094     { "(bad)",  { XX } },
2095     { "movq2dq",{ XM, MS } },
2096     { "movq",   { EXq, XM } },
2097     { "movdq2q",{ MX, XS } },
2098   },
2099
2100   /* PREFIX_0FE6 */
2101   {
2102     { "(bad)",  { XX } },
2103     { "cvtdq2pd", { XM, EXq } },
2104     { "cvttpd2dq", { XM, EXx } },
2105     { "cvtpd2dq", { XM, EXx } },
2106   },
2107
2108   /* PREFIX_0FE7 */
2109   {
2110     { "movntq", { EM, MX } },
2111     { "(bad)",  { XX } },
2112     { "movntdq",{ EM, XM } },
2113     { "(bad)",  { XX } },
2114   },
2115
2116   /* PREFIX_0FF0 */
2117   {
2118     { "(bad)",  { XX } },
2119     { "(bad)",  { XX } },
2120     { "(bad)",  { XX } },
2121     { MOD_TABLE (MOD_0FF0_PREFIX_3) },
2122   },
2123
2124   /* PREFIX_0FF7 */
2125   {
2126     { "maskmovq", { MX, MS } },
2127     { "(bad)",  { XX } },
2128     { "maskmovdqu", { XM, XS } },
2129     { "(bad)",  { XX } },
2130   },
2131
2132   /* PREFIX_0F3810 */
2133   {
2134     { "(bad)",  { XX } },
2135     { "(bad)",  { XX } },
2136     { "pblendvb", {XM, EXx, XMM0 } },
2137     { "(bad)",  { XX } },
2138   },
2139
2140   /* PREFIX_0F3814 */
2141   {
2142     { "(bad)",  { XX } },
2143     { "(bad)",  { XX } },
2144     { "blendvps", {XM, EXx, XMM0 } },
2145     { "(bad)",  { XX } },
2146   },
2147
2148   /* PREFIX_0F3815 */
2149   {
2150     { "(bad)",  { XX } },
2151     { "(bad)",  { XX } },
2152     { "blendvpd", { XM, EXx, XMM0 } },
2153     { "(bad)",  { XX } },
2154   },
2155
2156   /* PREFIX_0F3817 */
2157   {
2158     { "(bad)",  { XX } },
2159     { "(bad)",  { XX } },
2160     { "ptest",  { XM, EXx } },
2161     { "(bad)",  { XX } },
2162   },
2163
2164   /* PREFIX_0F3820 */
2165   {
2166     { "(bad)",  { XX } },
2167     { "(bad)",  { XX } },
2168     { "pmovsxbw", { XM, EXq } },
2169     { "(bad)",  { XX } },
2170   },
2171
2172   /* PREFIX_0F3821 */
2173   {
2174     { "(bad)",  { XX } },
2175     { "(bad)",  { XX } },
2176     { "pmovsxbd", { XM, EXd } },
2177     { "(bad)",  { XX } },
2178   },
2179
2180   /* PREFIX_0F3822 */
2181   {
2182     { "(bad)",  { XX } },
2183     { "(bad)",  { XX } },
2184     { "pmovsxbq", { XM, EXw } },
2185     { "(bad)",  { XX } },
2186   },
2187
2188   /* PREFIX_0F3823 */
2189   {
2190     { "(bad)",  { XX } },
2191     { "(bad)",  { XX } },
2192     { "pmovsxwd", { XM, EXq } },
2193     { "(bad)",  { XX } },
2194   },
2195
2196   /* PREFIX_0F3824 */
2197   {
2198     { "(bad)",  { XX } },
2199     { "(bad)",  { XX } },
2200     { "pmovsxwq", { XM, EXd } },
2201     { "(bad)",  { XX } },
2202   },
2203
2204   /* PREFIX_0F3825 */
2205   {
2206     { "(bad)",  { XX } },
2207     { "(bad)",  { XX } },
2208     { "pmovsxdq", { XM, EXq } },
2209     { "(bad)",  { XX } },
2210   },
2211
2212   /* PREFIX_0F3828 */
2213   {
2214     { "(bad)",  { XX } },
2215     { "(bad)",  { XX } },
2216     { "pmuldq", { XM, EXx } },
2217     { "(bad)",  { XX } },
2218   },
2219
2220   /* PREFIX_0F3829 */
2221   {
2222     { "(bad)",  { XX } },
2223     { "(bad)",  { XX } },
2224     { "pcmpeqq", { XM, EXx } },
2225     { "(bad)",  { XX } },
2226   },
2227
2228   /* PREFIX_0F382A */
2229   {
2230     { "(bad)",  { XX } },
2231     { "(bad)",  { XX } },
2232     { "movntdqa", { XM, EM } },
2233     { "(bad)",  { XX } },
2234   },
2235
2236   /* PREFIX_0F382B */
2237   {
2238     { "(bad)",  { XX } },
2239     { "(bad)",  { XX } },
2240     { "packusdw", { XM, EXx } },
2241     { "(bad)",  { XX } },
2242   },
2243
2244   /* PREFIX_0F3830 */
2245   {
2246     { "(bad)",  { XX } },
2247     { "(bad)",  { XX } },
2248     { "pmovzxbw", { XM, EXq } },
2249     { "(bad)",  { XX } },
2250   },
2251
2252   /* PREFIX_0F3831 */
2253   {
2254     { "(bad)",  { XX } },
2255     { "(bad)",  { XX } },
2256     { "pmovzxbd", { XM, EXd } },
2257     { "(bad)",  { XX } },
2258   },
2259
2260   /* PREFIX_0F3832 */
2261   {
2262     { "(bad)",  { XX } },
2263     { "(bad)",  { XX } },
2264     { "pmovzxbq", { XM, EXw } },
2265     { "(bad)",  { XX } },
2266   },
2267
2268   /* PREFIX_0F3833 */
2269   {
2270     { "(bad)",  { XX } },
2271     { "(bad)",  { XX } },
2272     { "pmovzxwd", { XM, EXq } },
2273     { "(bad)",  { XX } },
2274   },
2275
2276   /* PREFIX_0F3834 */
2277   {
2278     { "(bad)",  { XX } },
2279     { "(bad)",  { XX } },
2280     { "pmovzxwq", { XM, EXd } },
2281     { "(bad)",  { XX } },
2282   },
2283
2284   /* PREFIX_0F3835 */
2285   {
2286     { "(bad)",  { XX } },
2287     { "(bad)",  { XX } },
2288     { "pmovzxdq", { XM, EXq } },
2289     { "(bad)",  { XX } },
2290   },
2291
2292   /* PREFIX_0F3837 */
2293   {
2294     { "(bad)",  { XX } },
2295     { "(bad)",  { XX } },
2296     { "pcmpgtq", { XM, EXx } },
2297     { "(bad)",  { XX } },
2298   },
2299
2300   /* PREFIX_0F3838 */
2301   {
2302     { "(bad)",  { XX } },
2303     { "(bad)",  { XX } },
2304     { "pminsb", { XM, EXx } },
2305     { "(bad)",  { XX } },
2306   },
2307
2308   /* PREFIX_0F3839 */
2309   {
2310     { "(bad)",  { XX } },
2311     { "(bad)",  { XX } },
2312     { "pminsd", { XM, EXx } },
2313     { "(bad)",  { XX } },
2314   },
2315
2316   /* PREFIX_0F383A */
2317   {
2318     { "(bad)",  { XX } },
2319     { "(bad)",  { XX } },
2320     { "pminuw", { XM, EXx } },
2321     { "(bad)",  { XX } },
2322   },
2323
2324   /* PREFIX_0F383B */
2325   {
2326     { "(bad)",  { XX } },
2327     { "(bad)",  { XX } },
2328     { "pminud", { XM, EXx } },
2329     { "(bad)",  { XX } },
2330   },
2331
2332   /* PREFIX_0F383C */
2333   {
2334     { "(bad)",  { XX } },
2335     { "(bad)",  { XX } },
2336     { "pmaxsb", { XM, EXx } },
2337     { "(bad)",  { XX } },
2338   },
2339
2340   /* PREFIX_0F383D */
2341   {
2342     { "(bad)",  { XX } },
2343     { "(bad)",  { XX } },
2344     { "pmaxsd", { XM, EXx } },
2345     { "(bad)",  { XX } },
2346   },
2347
2348   /* PREFIX_0F383E */
2349   {
2350     { "(bad)",  { XX } },
2351     { "(bad)",  { XX } },
2352     { "pmaxuw", { XM, EXx } },
2353     { "(bad)",  { XX } },
2354   },
2355
2356   /* PREFIX_0F383F */
2357   {
2358     { "(bad)",  { XX } },
2359     { "(bad)",  { XX } },
2360     { "pmaxud", { XM, EXx } },
2361     { "(bad)",  { XX } },
2362   },
2363
2364   /* PREFIX_0F3840 */
2365   {
2366     { "(bad)",  { XX } },
2367     { "(bad)",  { XX } },
2368     { "pmulld", { XM, EXx } },
2369     { "(bad)",  { XX } },
2370   },
2371
2372   /* PREFIX_0F3841 */
2373   {
2374     { "(bad)",  { XX } },
2375     { "(bad)",  { XX } },
2376     { "phminposuw", { XM, EXx } },
2377     { "(bad)",  { XX } },
2378   },
2379
2380   /* PREFIX_0F38F0 */
2381   {
2382     { "(bad)",  { XX } },
2383     { "(bad)",  { XX } },
2384     { "(bad)",  { XX } },
2385     { "crc32",  { Gdq, { CRC32_Fixup, b_mode } } },
2386   },
2387
2388   /* PREFIX_0F38F1 */
2389   {
2390     { "(bad)",  { XX } },
2391     { "(bad)",  { XX } },
2392     { "(bad)",  { XX } },
2393     { "crc32",  { Gdq, { CRC32_Fixup, v_mode } } },
2394   },
2395
2396   /* PREFIX_0F3A08 */
2397   {
2398     { "(bad)",  { XX } },
2399     { "(bad)",  { XX } },
2400     { "roundps", { XM, EXx, Ib } },
2401     { "(bad)",  { XX } },
2402   },
2403
2404   /* PREFIX_0F3A09 */
2405   {
2406     { "(bad)",  { XX } },
2407     { "(bad)",  { XX } },
2408     { "roundpd", { XM, EXx, Ib } },
2409     { "(bad)",  { XX } },
2410   },
2411
2412   /* PREFIX_0F3A0A */
2413   {
2414     { "(bad)",  { XX } },
2415     { "(bad)",  { XX } },
2416     { "roundss", { XM, EXd, Ib } },
2417     { "(bad)",  { XX } },
2418   },
2419
2420   /* PREFIX_0F3A0B */
2421   {
2422     { "(bad)",  { XX } },
2423     { "(bad)",  { XX } },
2424     { "roundsd", { XM, EXq, Ib } },
2425     { "(bad)",  { XX } },
2426   },
2427
2428   /* PREFIX_0F3A0C */
2429   {
2430     { "(bad)",  { XX } },
2431     { "(bad)",  { XX } },
2432     { "blendps", { XM, EXx, Ib } },
2433     { "(bad)",  { XX } },
2434   },
2435
2436   /* PREFIX_0F3A0D */
2437   {
2438     { "(bad)",  { XX } },
2439     { "(bad)",  { XX } },
2440     { "blendpd", { XM, EXx, Ib } },
2441     { "(bad)",  { XX } },
2442   },
2443
2444   /* PREFIX_0F3A0E */
2445   {
2446     { "(bad)",  { XX } },
2447     { "(bad)",  { XX } },
2448     { "pblendw", { XM, EXx, Ib } },
2449     { "(bad)",  { XX } },
2450   },
2451
2452   /* PREFIX_0F3A14 */
2453   {
2454     { "(bad)",  { XX } },
2455     { "(bad)",  { XX } },
2456     { "pextrb", { Edqb, XM, Ib } },
2457     { "(bad)",  { XX } },
2458   },
2459
2460   /* PREFIX_0F3A15 */
2461   {
2462     { "(bad)",  { XX } },
2463     { "(bad)",  { XX } },
2464     { "pextrw", { Edqw, XM, Ib } },
2465     { "(bad)",  { XX } },
2466   },
2467
2468   /* PREFIX_0F3A16 */
2469   {
2470     { "(bad)",  { XX } },
2471     { "(bad)",  { XX } },
2472     { "pextrK", { Edq, XM, Ib } },
2473     { "(bad)",  { XX } },
2474   },
2475
2476   /* PREFIX_0F3A17 */
2477   {
2478     { "(bad)",  { XX } },
2479     { "(bad)",  { XX } },
2480     { "extractps", { Edqd, XM, Ib } },
2481     { "(bad)",  { XX } },
2482   },
2483
2484   /* PREFIX_0F3A20 */
2485   {
2486     { "(bad)",  { XX } },
2487     { "(bad)",  { XX } },
2488     { "pinsrb", { XM, Edqb, Ib } },
2489     { "(bad)",  { XX } },
2490   },
2491
2492   /* PREFIX_0F3A21 */
2493   {
2494     { "(bad)",  { XX } },
2495     { "(bad)",  { XX } },
2496     { "insertps", { XM, EXd, Ib } },
2497     { "(bad)",  { XX } },
2498   },
2499
2500   /* PREFIX_0F3A22 */
2501   {
2502     { "(bad)",  { XX } },
2503     { "(bad)",  { XX } },
2504     { "pinsrK", { XM, Edq, Ib } },
2505     { "(bad)",  { XX } },
2506   },
2507
2508   /* PREFIX_0F3A40 */
2509   {
2510     { "(bad)",  { XX } },
2511     { "(bad)",  { XX } },
2512     { "dpps",   { XM, EXx, Ib } },
2513     { "(bad)",  { XX } },
2514   },
2515
2516   /* PREFIX_0F3A41 */
2517   {
2518     { "(bad)",  { XX } },
2519     { "(bad)",  { XX } },
2520     { "dppd",   { XM, EXx, Ib } },
2521     { "(bad)",  { XX } },
2522   },
2523
2524   /* PREFIX_0F3A42 */
2525   {
2526     { "(bad)",  { XX } },
2527     { "(bad)",  { XX } },
2528     { "mpsadbw", { XM, EXx, Ib } },
2529     { "(bad)",  { XX } },
2530   },
2531
2532   /* PREFIX_0F3A60 */
2533   {
2534     { "(bad)",  { XX } },
2535     { "(bad)",  { XX } },
2536     { "pcmpestrm", { XM, EXx, Ib } },
2537     { "(bad)",  { XX } },
2538   },
2539
2540   /* PREFIX_0F3A61 */
2541   {
2542     { "(bad)",  { XX } },
2543     { "(bad)",  { XX } },
2544     { "pcmpestri", { XM, EXx, Ib } },
2545     { "(bad)",  { XX } },
2546   },
2547
2548   /* PREFIX_0F3A62 */
2549   {
2550     { "(bad)",  { XX } },
2551     { "(bad)",  { XX } },
2552     { "pcmpistrm", { XM, EXx, Ib } },
2553     { "(bad)",  { XX } },
2554   },
2555
2556   /* PREFIX_0F3A63 */
2557   {
2558     { "(bad)",  { XX } },
2559     { "(bad)",  { XX } },
2560     { "pcmpistri", { XM, EXx, Ib } },
2561     { "(bad)",  { XX } },
2562   },
2563
2564   /* PREFIX_0F73_REG_3 */
2565   {
2566     { "(bad)",  { XX } },
2567     { "(bad)",  { XX } },
2568     { "psrldq", { MS, Ib } },
2569     { "(bad)",  { XX } },
2570   },
2571
2572   /* PREFIX_0F73_REG_7 */
2573   {
2574     { "(bad)",  { XX } },
2575     { "(bad)",  { XX } },
2576     { "pslldq", { MS, Ib } },
2577     { "(bad)",  { XX } },
2578   },
2579
2580   /* PREFIX_0FC7_REG_6 */
2581   {
2582     { "vmptrld",{ Mq } },
2583     { "vmxon",  { Mq } },
2584     { "vmclear",{ Mq } },
2585     { "(bad)",  { XX } },
2586   },
2587 };
2588
2589 static const struct dis386 x86_64_table[][2] = {
2590   /* X86_64_06 */
2591   {
2592     { "push{T|}", { es } },
2593     { "(bad)", { XX } },
2594   },
2595
2596   /* X86_64_07 */
2597   {
2598     { "pop{T|}", { es } },
2599     { "(bad)", { XX } },
2600   },
2601
2602   /* X86_64_0D */
2603   {
2604     { "push{T|}", { cs } },
2605     { "(bad)", { XX } },
2606   },
2607
2608   /* X86_64_16 */
2609   {
2610     { "push{T|}", { ss } },
2611     { "(bad)", { XX } },
2612   },
2613
2614   /* X86_64_17 */
2615   {
2616     { "pop{T|}", { ss } },
2617     { "(bad)", { XX } },
2618   },
2619
2620   /* X86_64_1E */
2621   {
2622     { "push{T|}", { ds } },
2623     { "(bad)", { XX } },
2624   },
2625
2626   /* X86_64_1F */
2627   {
2628     { "pop{T|}", { ds } },
2629     { "(bad)", { XX } },
2630   },
2631
2632   /* X86_64_27 */
2633   {
2634     { "daa", { XX } },
2635     { "(bad)", { XX } },
2636   },
2637
2638   /* X86_64_2F */
2639   {
2640     { "das", { XX } },
2641     { "(bad)", { XX } },
2642   },
2643
2644   /* X86_64_37 */
2645   {
2646     { "aaa", { XX } },
2647     { "(bad)", { XX } },
2648   },
2649
2650   /* X86_64_3F */
2651   {
2652     { "aas", { XX } },
2653     { "(bad)", { XX } },
2654   },
2655
2656   /* X86_64_60 */
2657   {
2658     { "pusha{P|}", { XX } },
2659     { "(bad)", { XX } },
2660   },
2661
2662   /* X86_64_61 */
2663   {
2664     { "popa{P|}", { XX } },
2665     { "(bad)", { XX } },
2666   },
2667
2668   /* X86_64_62 */
2669   {
2670     { MOD_TABLE (MOD_62_32BIT) },
2671     { "(bad)", { XX } },
2672   },
2673
2674   /* X86_64_63 */
2675   {
2676     { "arpl", { Ew, Gw } },
2677     { "movs{lq|xd}", { Gv, Ed } },
2678   },
2679
2680   /* X86_64_6D */
2681   {
2682     { "ins{R|}", { Yzr, indirDX } },
2683     { "ins{G|}", { Yzr, indirDX } },
2684   },
2685
2686   /* X86_64_6F */
2687   {
2688     { "outs{R|}", { indirDXr, Xz } },
2689     { "outs{G|}", { indirDXr, Xz } },
2690   },
2691
2692   /* X86_64_9A */
2693   {
2694     { "Jcall{T|}", { Ap } },
2695     { "(bad)", { XX } },
2696   },
2697
2698   /* X86_64_C4 */
2699   {
2700     { MOD_TABLE (MOD_C4_32BIT) },
2701     { "(bad)", { XX } },
2702   },
2703
2704   /* X86_64_C5 */
2705   {
2706     { MOD_TABLE (MOD_C5_32BIT) },
2707     { "(bad)", { XX } },
2708   },
2709
2710   /* X86_64_CE */
2711   {
2712     { "into", { XX } },
2713     { "(bad)", { XX } },
2714   },
2715
2716   /* X86_64_D4 */
2717   {
2718     { "aam", { sIb } },
2719     { "(bad)", { XX } },
2720   },
2721
2722   /* X86_64_D5 */
2723   {
2724     { "aad", { sIb } },
2725     { "(bad)", { XX } },
2726   },
2727
2728   /* X86_64_EA */
2729   {
2730     { "Jjmp{T|}", { Ap } },
2731     { "(bad)", { XX } },
2732   },
2733
2734   /* X86_64_0F01_REG_0 */
2735   {
2736     { "sgdt{Q|IQ}", { M } },
2737     { "sgdt", { M } },
2738   },
2739
2740   /* X86_64_0F01_REG_1 */
2741   {
2742     { "sidt{Q|IQ}", { M } },
2743     { "sidt", { M } },
2744   },
2745
2746   /* X86_64_0F01_REG_2 */
2747   {
2748     { "lgdt{Q|Q}", { M } },
2749     { "lgdt", { M } },
2750   },
2751
2752   /* X86_64_0F01_REG_3 */
2753   {
2754     { "lidt{Q|Q}", { M } },
2755     { "lidt", { M } },
2756   },
2757 };
2758
2759 static const struct dis386 three_byte_table[][256] = {
2760   /* THREE_BYTE_0F24 */
2761   {
2762     /* 00 */
2763     { "fmaddps",        { { OP_DREX4, q_mode } } },
2764     { "fmaddpd",        { { OP_DREX4, q_mode } } },
2765     { "fmaddss",        { { OP_DREX4, w_mode } } },
2766     { "fmaddsd",        { { OP_DREX4, d_mode } } },
2767     { "fmaddps",        { { OP_DREX4, DREX_OC1 + q_mode } } },
2768     { "fmaddpd",        { { OP_DREX4, DREX_OC1 + q_mode } } },
2769     { "fmaddss",        { { OP_DREX4, DREX_OC1 + w_mode } } },
2770     { "fmaddsd",        { { OP_DREX4, DREX_OC1 + d_mode } } },
2771     /* 08 */
2772     { "fmsubps",        { { OP_DREX4, q_mode } } },
2773     { "fmsubpd",        { { OP_DREX4, q_mode } } },
2774     { "fmsubss",        { { OP_DREX4, w_mode } } },
2775     { "fmsubsd",        { { OP_DREX4, d_mode } } },
2776     { "fmsubps",        { { OP_DREX4, DREX_OC1 + q_mode } } },
2777     { "fmsubpd",        { { OP_DREX4, DREX_OC1 + q_mode } } },
2778     { "fmsubss",        { { OP_DREX4, DREX_OC1 + w_mode } } },
2779     { "fmsubsd",        { { OP_DREX4, DREX_OC1 + d_mode } } },
2780     /* 10 */
2781     { "fnmaddps",       { { OP_DREX4, q_mode } } },
2782     { "fnmaddpd",       { { OP_DREX4, q_mode } } },
2783     { "fnmaddss",       { { OP_DREX4, w_mode } } },
2784     { "fnmaddsd",       { { OP_DREX4, d_mode } } },
2785     { "fnmaddps",       { { OP_DREX4, DREX_OC1 + q_mode } } },
2786     { "fnmaddpd",       { { OP_DREX4, DREX_OC1 + q_mode } } },
2787     { "fnmaddss",       { { OP_DREX4, DREX_OC1 + w_mode } } },
2788     { "fnmaddsd",       { { OP_DREX4, DREX_OC1 + d_mode } } },
2789     /* 18 */
2790     { "fnmsubps",       { { OP_DREX4, q_mode } } },
2791     { "fnmsubpd",       { { OP_DREX4, q_mode } } },
2792     { "fnmsubss",       { { OP_DREX4, w_mode } } },
2793     { "fnmsubsd",       { { OP_DREX4, d_mode } } },
2794     { "fnmsubps",       { { OP_DREX4, DREX_OC1 + q_mode } } },
2795     { "fnmsubpd",       { { OP_DREX4, DREX_OC1 + q_mode } } },
2796     { "fnmsubss",       { { OP_DREX4, DREX_OC1 + w_mode } } },
2797     { "fnmsubsd",       { { OP_DREX4, DREX_OC1 + d_mode } } },
2798     /* 20 */
2799     { "permps",         { { OP_DREX4, q_mode } } },
2800     { "permpd",         { { OP_DREX4, q_mode } } },
2801     { "pcmov",          { { OP_DREX4, q_mode } } },
2802     { "pperm",          { { OP_DREX4, q_mode } } },
2803     { "permps",         { { OP_DREX4, DREX_OC1 + q_mode } } },
2804     { "permpd",         { { OP_DREX4, DREX_OC1 + q_mode } } },
2805     { "pcmov",          { { OP_DREX4, DREX_OC1 + w_mode } } },
2806     { "pperm",          { { OP_DREX4, DREX_OC1 + d_mode } } },
2807     /* 28 */
2808     { "(bad)",          { XX } },
2809     { "(bad)",          { XX } },
2810     { "(bad)",          { XX } },
2811     { "(bad)",          { XX } },
2812     { "(bad)",          { XX } },
2813     { "(bad)",          { XX } },
2814     { "(bad)",          { XX } },
2815     { "(bad)",          { XX } },
2816     /* 30 */
2817     { "(bad)",          { XX } },
2818     { "(bad)",          { XX } },
2819     { "(bad)",          { XX } },
2820     { "(bad)",          { XX } },
2821     { "(bad)",          { XX } },
2822     { "(bad)",          { XX } },
2823     { "(bad)",          { XX } },
2824     { "(bad)",          { XX } },
2825     /* 38 */
2826     { "(bad)",          { XX } },
2827     { "(bad)",          { XX } },
2828     { "(bad)",          { XX } },
2829     { "(bad)",          { XX } },
2830     { "(bad)",          { XX } },
2831     { "(bad)",          { XX } },
2832     { "(bad)",          { XX } },
2833     { "(bad)",          { XX } },
2834     /* 40 */
2835     { "protb",          { { OP_DREX3, q_mode } } },
2836     { "protw",          { { OP_DREX3, q_mode } } },
2837     { "protd",          { { OP_DREX3, q_mode } } },
2838     { "protq",          { { OP_DREX3, q_mode } } },
2839     { "pshlb",          { { OP_DREX3, q_mode } } },
2840     { "pshlw",          { { OP_DREX3, q_mode } } },
2841     { "pshld",          { { OP_DREX3, q_mode } } },
2842     { "pshlq",          { { OP_DREX3, q_mode } } },
2843     /* 48 */
2844     { "pshab",          { { OP_DREX3, q_mode } } },
2845     { "pshaw",          { { OP_DREX3, q_mode } } },
2846     { "pshad",          { { OP_DREX3, q_mode } } },
2847     { "pshaq",          { { OP_DREX3, q_mode } } },
2848     { "(bad)",          { XX } },
2849     { "(bad)",          { XX } },
2850     { "(bad)",          { XX } },
2851     { "(bad)",          { XX } },
2852     /* 50 */
2853     { "(bad)",          { XX } },
2854     { "(bad)",          { XX } },
2855     { "(bad)",          { XX } },
2856     { "(bad)",          { XX } },
2857     { "(bad)",          { XX } },
2858     { "(bad)",          { XX } },
2859     { "(bad)",          { XX } },
2860     { "(bad)",          { XX } },
2861     /* 58 */
2862     { "(bad)",          { XX } },
2863     { "(bad)",          { XX } },
2864     { "(bad)",          { XX } },
2865     { "(bad)",          { XX } },
2866     { "(bad)",          { XX } },
2867     { "(bad)",          { XX } },
2868     { "(bad)",          { XX } },
2869     { "(bad)",          { XX } },
2870     /* 60 */
2871     { "(bad)",          { XX } },
2872     { "(bad)",          { XX } },
2873     { "(bad)",          { XX } },
2874     { "(bad)",          { XX } },
2875     { "(bad)",          { XX } },
2876     { "(bad)",          { XX } },
2877     { "(bad)",          { XX } },
2878     { "(bad)",          { XX } },
2879     /* 68 */
2880     { "(bad)",          { XX } },
2881     { "(bad)",          { XX } },
2882     { "(bad)",          { XX } },
2883     { "(bad)",          { XX } },
2884     { "(bad)",          { XX } },
2885     { "(bad)",          { XX } },
2886     { "(bad)",          { XX } },
2887     { "(bad)",          { XX } },
2888     /* 70 */
2889     { "(bad)",          { XX } },
2890     { "(bad)",          { XX } },
2891     { "(bad)",          { XX } },
2892     { "(bad)",          { XX } },
2893     { "(bad)",          { XX } },
2894     { "(bad)",          { XX } },
2895     { "(bad)",          { XX } },
2896     { "(bad)",          { XX } },
2897     /* 78 */
2898     { "(bad)",          { XX } },
2899     { "(bad)",          { XX } },
2900     { "(bad)",          { XX } },
2901     { "(bad)",          { XX } },
2902     { "(bad)",          { XX } },
2903     { "(bad)",          { XX } },
2904     { "(bad)",          { XX } },
2905     { "(bad)",          { XX } },
2906     /* 80 */
2907     { "(bad)",          { XX } },
2908     { "(bad)",          { XX } },
2909     { "(bad)",          { XX } },
2910     { "(bad)",          { XX } },
2911     { "(bad)",          { XX } },
2912     { "pmacssww",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2913     { "pmacsswd",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2914     { "pmacssdql",      { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2915     /* 88 */
2916     { "(bad)",          { XX } },
2917     { "(bad)",          { XX } },
2918     { "(bad)",          { XX } },
2919     { "(bad)",          { XX } },
2920     { "(bad)",          { XX } },
2921     { "(bad)",          { XX } },
2922     { "pmacssdd",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2923     { "pmacssdqh",      { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2924     /* 90 */
2925     { "(bad)",          { XX } },
2926     { "(bad)",          { XX } },
2927     { "(bad)",          { XX } },
2928     { "(bad)",          { XX } },
2929     { "(bad)",          { XX } },
2930     { "pmacsww",        { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2931     { "pmacswd",        { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2932     { "pmacsdql",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2933     /* 98 */
2934     { "(bad)",          { XX } },
2935     { "(bad)",          { XX } },
2936     { "(bad)",          { XX } },
2937     { "(bad)",          { XX } },
2938     { "(bad)",          { XX } },
2939     { "(bad)",          { XX } },
2940     { "pmacsdd",        { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2941     { "pmacsdqh",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2942     /* a0 */
2943     { "(bad)",          { XX } },
2944     { "(bad)",          { XX } },
2945     { "(bad)",          { XX } },
2946     { "(bad)",          { XX } },
2947     { "(bad)",          { XX } },
2948     { "(bad)",          { XX } },
2949     { "pmadcsswd",      { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2950     { "(bad)",          { XX } },
2951     /* a8 */
2952     { "(bad)",          { XX } },
2953     { "(bad)",          { XX } },
2954     { "(bad)",          { XX } },
2955     { "(bad)",          { XX } },
2956     { "(bad)",          { XX } },
2957     { "(bad)",          { XX } },
2958     { "(bad)",          { XX } },
2959     { "(bad)",          { XX } },
2960     /* b0 */
2961     { "(bad)",          { XX } },
2962     { "(bad)",          { XX } },
2963     { "(bad)",          { XX } },
2964     { "(bad)",          { XX } },
2965     { "(bad)",          { XX } },
2966     { "(bad)",          { XX } },
2967     { "pmadcswd",       { { OP_DREX4, DREX_OC1 + DREX_NO_OC0 + q_mode } } },
2968     { "(bad)",          { XX } },
2969     /* b8 */
2970     { "(bad)",          { XX } },
2971     { "(bad)",          { XX } },
2972     { "(bad)",          { XX } },
2973     { "(bad)",          { XX } },
2974     { "(bad)",          { XX } },
2975     { "(bad)",          { XX } },
2976     { "(bad)",          { XX } },
2977     { "(bad)",          { XX } },
2978     /* c0 */
2979     { "(bad)",          { XX } },
2980     { "(bad)",          { XX } },
2981     { "(bad)",          { XX } },
2982     { "(bad)",          { XX } },
2983     { "(bad)",          { XX } },
2984     { "(bad)",          { XX } },
2985     { "(bad)",          { XX } },
2986     { "(bad)",          { XX } },
2987     /* c8 */
2988     { "(bad)",          { XX } },
2989     { "(bad)",          { XX } },
2990     { "(bad)",          { XX } },
2991     { "(bad)",          { XX } },
2992     { "(bad)",          { XX } },
2993     { "(bad)",          { XX } },
2994     { "(bad)",          { XX } },
2995     { "(bad)",          { XX } },
2996     /* d0 */
2997     { "(bad)",          { XX } },
2998     { "(bad)",          { XX } },
2999     { "(bad)",          { XX } },
3000     { "(bad)",          { XX } },
3001     { "(bad)",          { XX } },
3002     { "(bad)",          { XX } },
3003     { "(bad)",          { XX } },
3004     { "(bad)",          { XX } },
3005     /* d8 */
3006     { "(bad)",          { XX } },
3007     { "(bad)",          { XX } },
3008     { "(bad)",          { XX } },
3009     { "(bad)",          { XX } },
3010     { "(bad)",          { XX } },
3011     { "(bad)",          { XX } },
3012     { "(bad)",          { XX } },
3013     { "(bad)",          { XX } },
3014     /* e0 */
3015     { "(bad)",          { XX } },
3016     { "(bad)",          { XX } },
3017     { "(bad)",          { XX } },
3018     { "(bad)",          { XX } },
3019     { "(bad)",          { XX } },
3020     { "(bad)",          { XX } },
3021     { "(bad)",          { XX } },
3022     { "(bad)",          { XX } },
3023     /* e8 */
3024     { "(bad)",          { XX } },
3025     { "(bad)",          { XX } },
3026     { "(bad)",          { XX } },
3027     { "(bad)",          { XX } },
3028     { "(bad)",          { XX } },
3029     { "(bad)",          { XX } },
3030     { "(bad)",          { XX } },
3031     { "(bad)",          { XX } },
3032     /* f0 */
3033     { "(bad)",          { XX } },
3034     { "(bad)",          { XX } },
3035     { "(bad)",          { XX } },
3036     { "(bad)",          { XX } },
3037     { "(bad)",          { XX } },
3038     { "(bad)",          { XX } },
3039     { "(bad)",          { XX } },
3040     { "(bad)",          { XX } },
3041     /* f8 */
3042     { "(bad)",          { XX } },
3043     { "(bad)",          { XX } },
3044     { "(bad)",          { XX } },
3045     { "(bad)",          { XX } },
3046     { "(bad)",          { XX } },
3047     { "(bad)",          { XX } },
3048     { "(bad)",          { XX } },
3049     { "(bad)",          { XX } },
3050   },
3051   /* THREE_BYTE_0F25 */
3052   {
3053     /* 00 */
3054     { "(bad)",          { XX } },
3055     { "(bad)",          { XX } },
3056     { "(bad)",          { XX } },
3057     { "(bad)",          { XX } },
3058     { "(bad)",          { XX } },
3059     { "(bad)",          { XX } },
3060     { "(bad)",          { XX } },
3061     { "(bad)",          { XX } },
3062     /* 08 */
3063     { "(bad)",          { XX } },
3064     { "(bad)",          { XX } },
3065     { "(bad)",          { XX } },
3066     { "(bad)",          { XX } },
3067     { "(bad)",          { XX } },
3068     { "(bad)",          { XX } },
3069     { "(bad)",          { XX } },
3070     { "(bad)",          { XX } },
3071     /* 10 */
3072     { "(bad)",          { XX } },
3073     { "(bad)",          { XX } },
3074     { "(bad)",          { XX } },
3075     { "(bad)",          { XX } },
3076     { "(bad)",          { XX } },
3077     { "(bad)",          { XX } },
3078     { "(bad)",          { XX } },
3079     { "(bad)",          { XX } },
3080     /* 18 */
3081     { "(bad)",          { XX } },
3082     { "(bad)",          { XX } },
3083     { "(bad)",          { XX } },
3084     { "(bad)",          { XX } },
3085     { "(bad)",          { XX } },
3086     { "(bad)",          { XX } },
3087     { "(bad)",          { XX } },
3088     { "(bad)",          { XX } },
3089     /* 20 */
3090     { "(bad)",          { XX } },
3091     { "(bad)",          { XX } },
3092     { "(bad)",          { XX } },
3093     { "(bad)",          { XX } },
3094     { "(bad)",          { XX } },
3095     { "(bad)",          { XX } },
3096     { "(bad)",          { XX } },
3097     { "(bad)",          { XX } },
3098     /* 28 */
3099     { "(bad)",          { XX } },
3100     { "(bad)",          { XX } },
3101     { "(bad)",          { XX } },
3102     { "(bad)",          { XX } },
3103     { "comps",          { { OP_DREX3, q_mode }, { OP_DREX_FCMP, b_mode } } },
3104     { "compd",          { { OP_DREX3, q_mode }, { OP_DREX_FCMP, b_mode } } },
3105     { "comss",          { { OP_DREX3, w_mode }, { OP_DREX_FCMP, b_mode } } },
3106     { "comsd",          { { OP_DREX3, d_mode }, { OP_DREX_FCMP, b_mode } } },
3107     /* 30 */
3108     { "(bad)",          { XX } },
3109     { "(bad)",          { XX } },
3110     { "(bad)",          { XX } },
3111     { "(bad)",          { XX } },
3112     { "(bad)",          { XX } },
3113     { "(bad)",          { XX } },
3114     { "(bad)",          { XX } },
3115     { "(bad)",          { XX } },
3116     /* 38 */
3117     { "(bad)",          { XX } },
3118     { "(bad)",          { XX } },
3119     { "(bad)",          { XX } },
3120     { "(bad)",          { XX } },
3121     { "(bad)",          { XX } },
3122     { "(bad)",          { XX } },
3123     { "(bad)",          { XX } },
3124     { "(bad)",          { XX } },
3125     /* 40 */
3126     { "(bad)",          { XX } },
3127     { "(bad)",          { XX } },
3128     { "(bad)",          { XX } },
3129     { "(bad)",          { XX } },
3130     { "(bad)",          { XX } },
3131     { "(bad)",          { XX } },
3132     { "(bad)",          { XX } },
3133     { "(bad)",          { XX } },
3134     /* 48 */
3135     { "(bad)",          { XX } },
3136     { "(bad)",          { XX } },
3137     { "(bad)",          { XX } },
3138     { "(bad)",          { XX } },
3139     { "pcomb",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3140     { "pcomw",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3141     { "pcomd",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3142     { "pcomq",          { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3143     /* 50 */
3144     { "(bad)",          { XX } },
3145     { "(bad)",          { XX } },
3146     { "(bad)",          { XX } },
3147     { "(bad)",          { XX } },
3148     { "(bad)",          { XX } },
3149     { "(bad)",          { XX } },
3150     { "(bad)",          { XX } },
3151     { "(bad)",          { XX } },
3152     /* 58 */
3153     { "(bad)",          { XX } },
3154     { "(bad)",          { XX } },
3155     { "(bad)",          { XX } },
3156     { "(bad)",          { XX } },
3157     { "(bad)",          { XX } },
3158     { "(bad)",          { XX } },
3159     { "(bad)",          { XX } },
3160     { "(bad)",          { XX } },
3161     /* 60 */
3162     { "(bad)",          { XX } },
3163     { "(bad)",          { XX } },
3164     { "(bad)",          { XX } },
3165     { "(bad)",          { XX } },
3166     { "(bad)",          { XX } },
3167     { "(bad)",          { XX } },
3168     { "(bad)",          { XX } },
3169     { "(bad)",          { XX } },
3170     /* 68 */
3171     { "(bad)",          { XX } },
3172     { "(bad)",          { XX } },
3173     { "(bad)",          { XX } },
3174     { "(bad)",          { XX } },
3175     { "pcomub",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3176     { "pcomuw",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3177     { "pcomud",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3178     { "pcomuq",         { { OP_DREX3, q_mode }, { OP_DREX_ICMP, b_mode } } },
3179     /* 70 */
3180     { "(bad)",          { XX } },
3181     { "(bad)",          { XX } },
3182     { "(bad)",          { XX } },
3183     { "(bad)",          { XX } },
3184     { "(bad)",          { XX } },
3185     { "(bad)",          { XX } },
3186     { "(bad)",          { XX } },
3187     { "(bad)",          { XX } },
3188     /* 78 */
3189     { "(bad)",          { XX } },
3190     { "(bad)",          { XX } },
3191     { "(bad)",          { XX } },
3192     { "(bad)",          { XX } },
3193     { "(bad)",          { XX } },
3194     { "(bad)",          { XX } },
3195     { "(bad)",          { XX } },
3196     { "(bad)",          { XX } },
3197     /* 80 */
3198     { "(bad)",          { XX } },
3199     { "(bad)",          { XX } },
3200     { "(bad)",          { XX } },
3201     { "(bad)",          { XX } },
3202     { "(bad)",          { XX } },
3203     { "(bad)",          { XX } },
3204     { "(bad)",          { XX } },
3205     { "(bad)",          { XX } },
3206     /* 88 */
3207     { "(bad)",          { XX } },
3208     { "(bad)",          { XX } },
3209     { "(bad)",          { XX } },
3210     { "(bad)",          { XX } },
3211     { "(bad)",          { XX } },
3212     { "(bad)",          { XX } },
3213     { "(bad)",          { XX } },
3214     { "(bad)",          { XX } },
3215     /* 90 */
3216     { "(bad)",          { XX } },
3217     { "(bad)",          { XX } },
3218     { "(bad)",          { XX } },
3219     { "(bad)",          { XX } },
3220     { "(bad)",          { XX } },
3221     { "(bad)",          { XX } },
3222     { "(bad)",          { XX } },
3223     { "(bad)",          { XX } },
3224     /* 98 */
3225     { "(bad)",          { XX } },
3226     { "(bad)",          { XX } },
3227     { "(bad)",          { XX } },
3228     { "(bad)",          { XX } },
3229     { "(bad)",          { XX } },
3230     { "(bad)",          { XX } },
3231     { "(bad)",          { XX } },
3232     { "(bad)",          { XX } },
3233     /* a0 */
3234     { "(bad)",          { XX } },
3235     { "(bad)",          { XX } },
3236     { "(bad)",          { XX } },
3237     { "(bad)",          { XX } },
3238     { "(bad)",          { XX } },
3239     { "(bad)",          { XX } },
3240     { "(bad)",          { XX } },
3241     { "(bad)",          { XX } },
3242     /* a8 */
3243     { "(bad)",          { XX } },
3244     { "(bad)",          { XX } },
3245     { "(bad)",          { XX } },
3246     { "(bad)",          { XX } },
3247     { "(bad)",          { XX } },
3248     { "(bad)",          { XX } },
3249     { "(bad)",          { XX } },
3250     { "(bad)",          { XX } },
3251     /* b0 */
3252     { "(bad)",          { XX } },
3253     { "(bad)",          { XX } },
3254     { "(bad)",          { XX } },
3255     { "(bad)",          { XX } },
3256     { "(bad)",          { XX } },
3257     { "(bad)",          { XX } },
3258     { "(bad)",          { XX } },
3259     { "(bad)",          { XX } },
3260     /* b8 */
3261     { "(bad)",          { XX } },
3262     { "(bad)",          { XX } },
3263     { "(bad)",          { XX } },
3264     { "(bad)",          { XX } },
3265     { "(bad)",          { XX } },
3266     { "(bad)",          { XX } },
3267     { "(bad)",          { XX } },
3268     { "(bad)",          { XX } },
3269     /* c0 */
3270     { "(bad)",          { XX } },
3271     { "(bad)",          { XX } },
3272     { "(bad)",          { XX } },
3273     { "(bad)",          { XX } },
3274     { "(bad)",          { XX } },
3275     { "(bad)",          { XX } },
3276     { "(bad)",          { XX } },
3277     { "(bad)",          { XX } },
3278     /* c8 */
3279     { "(bad)",          { XX } },
3280     { "(bad)",          { XX } },
3281     { "(bad)",          { XX } },
3282     { "(bad)",          { XX } },
3283     { "(bad)",          { XX } },
3284     { "(bad)",          { XX } },
3285     { "(bad)",          { XX } },
3286     { "(bad)",          { XX } },
3287     /* d0 */
3288     { "(bad)",          { XX } },
3289     { "(bad)",          { XX } },
3290     { "(bad)",          { XX } },
3291     { "(bad)",          { XX } },
3292     { "(bad)",          { XX } },
3293     { "(bad)",          { XX } },
3294     { "(bad)",          { XX } },
3295     { "(bad)",          { XX } },
3296     /* d8 */
3297     { "(bad)",          { XX } },
3298     { "(bad)",          { XX } },
3299     { "(bad)",          { XX } },
3300     { "(bad)",          { XX } },
3301     { "(bad)",          { XX } },
3302     { "(bad)",          { XX } },
3303     { "(bad)",          { XX } },
3304     { "(bad)",          { XX } },
3305     /* e0 */
3306     { "(bad)",          { XX } },
3307     { "(bad)",          { XX } },
3308     { "(bad)",          { XX } },
3309     { "(bad)",          { XX } },
3310     { "(bad)",          { XX } },
3311     { "(bad)",          { XX } },
3312     { "(bad)",          { XX } },
3313     { "(bad)",          { XX } },
3314     /* e8 */
3315     { "(bad)",          { XX } },
3316     { "(bad)",          { XX } },
3317     { "(bad)",          { XX } },
3318     { "(bad)",          { XX } },
3319     { "(bad)",          { XX } },
3320     { "(bad)",          { XX } },
3321     { "(bad)",          { XX } },
3322     { "(bad)",          { XX } },
3323     /* f0 */
3324     { "(bad)",          { XX } },
3325     { "(bad)",          { XX } },
3326     { "(bad)",          { XX } },
3327     { "(bad)",          { XX } },
3328     { "(bad)",          { XX } },
3329     { "(bad)",          { XX } },
3330     { "(bad)",          { XX } },
3331     { "(bad)",          { XX } },
3332     /* f8 */
3333     { "(bad)",          { XX } },
3334     { "(bad)",          { XX } },
3335     { "(bad)",          { XX } },
3336     { "(bad)",          { XX } },
3337     { "(bad)",          { XX } },
3338     { "(bad)",          { XX } },
3339     { "(bad)",          { XX } },
3340     { "(bad)",          { XX } },
3341   },
3342   /* THREE_BYTE_0F38 */
3343   {
3344     /* 00 */
3345     { "pshufb", { MX, EM } },
3346     { "phaddw", { MX, EM } },
3347     { "phaddd", { MX, EM } },
3348     { "phaddsw", { MX, EM } },
3349     { "pmaddubsw", { MX, EM } },
3350     { "phsubw", { MX, EM } },
3351     { "phsubd", { MX, EM } },
3352     { "phsubsw", { MX, EM } },
3353     /* 08 */
3354     { "psignb", { MX, EM } },
3355     { "psignw", { MX, EM } },
3356     { "psignd", { MX, EM } },
3357     { "pmulhrsw", { MX, EM } },
3358     { "(bad)", { XX } },
3359     { "(bad)", { XX } },
3360     { "(bad)", { XX } },
3361     { "(bad)", { XX } },
3362     /* 10 */
3363     { PREFIX_TABLE (PREFIX_0F3810) },
3364     { "(bad)", { XX } },
3365     { "(bad)", { XX } },
3366     { "(bad)", { XX } },
3367     { PREFIX_TABLE (PREFIX_0F3814) },
3368     { PREFIX_TABLE (PREFIX_0F3815) },
3369     { "(bad)", { XX } },
3370     { PREFIX_TABLE (PREFIX_0F3817) },
3371     /* 18 */
3372     { "(bad)", { XX } },
3373     { "(bad)", { XX } },
3374     { "(bad)", { XX } },
3375     { "(bad)", { XX } },
3376     { "pabsb", { MX, EM } },
3377     { "pabsw", { MX, EM } },
3378     { "pabsd", { MX, EM } },
3379     { "(bad)", { XX } },
3380     /* 20 */
3381     { PREFIX_TABLE (PREFIX_0F3820) },
3382     { PREFIX_TABLE (PREFIX_0F3821) },
3383     { PREFIX_TABLE (PREFIX_0F3822) },
3384     { PREFIX_TABLE (PREFIX_0F3823) },
3385     { PREFIX_TABLE (PREFIX_0F3824) },
3386     { PREFIX_TABLE (PREFIX_0F3825) },
3387     { "(bad)", { XX } },
3388     { "(bad)", { XX } },
3389     /* 28 */
3390     { PREFIX_TABLE (PREFIX_0F3828) },
3391     { PREFIX_TABLE (PREFIX_0F3829) },
3392     { PREFIX_TABLE (PREFIX_0F382A) },
3393     { PREFIX_TABLE (PREFIX_0F382B) },
3394     { "(bad)", { XX } },
3395     { "(bad)", { XX } },
3396     { "(bad)", { XX } },
3397     { "(bad)", { XX } },
3398     /* 30 */
3399     { PREFIX_TABLE (PREFIX_0F3830) },
3400     { PREFIX_TABLE (PREFIX_0F3831) },
3401     { PREFIX_TABLE (PREFIX_0F3832) },
3402     { PREFIX_TABLE (PREFIX_0F3833) },
3403     { PREFIX_TABLE (PREFIX_0F3834) },
3404     { PREFIX_TABLE (PREFIX_0F3835) },
3405     { "(bad)", { XX } },
3406     { PREFIX_TABLE (PREFIX_0F3837) },
3407     /* 38 */
3408     { PREFIX_TABLE (PREFIX_0F3838) },
3409     { PREFIX_TABLE (PREFIX_0F3839) },
3410     { PREFIX_TABLE (PREFIX_0F383A) },
3411     { PREFIX_TABLE (PREFIX_0F383B) },
3412     { PREFIX_TABLE (PREFIX_0F383C) },
3413     { PREFIX_TABLE (PREFIX_0F383D) },
3414     { PREFIX_TABLE (PREFIX_0F383E) },
3415     { PREFIX_TABLE (PREFIX_0F383F) },
3416     /* 40 */
3417     { PREFIX_TABLE (PREFIX_0F3840) },
3418     { PREFIX_TABLE (PREFIX_0F3841) },
3419     { "(bad)", { XX } },
3420     { "(bad)", { XX } },
3421     { "(bad)", { XX } },
3422     { "(bad)", { XX } },
3423     { "(bad)", { XX } },
3424     { "(bad)", { XX } },
3425     /* 48 */
3426     { "(bad)", { XX } },
3427     { "(bad)", { XX } },
3428     { "(bad)", { XX } },
3429     { "(bad)", { XX } },
3430     { "(bad)", { XX } },
3431     { "(bad)", { XX } },
3432     { "(bad)", { XX } },
3433     { "(bad)", { XX } },
3434     /* 50 */
3435     { "(bad)", { XX } },
3436     { "(bad)", { XX } },
3437     { "(bad)", { XX } },
3438     { "(bad)", { XX } },
3439     { "(bad)", { XX } },
3440     { "(bad)", { XX } },
3441     { "(bad)", { XX } },
3442     { "(bad)", { XX } },
3443     /* 58 */
3444     { "(bad)", { XX } },
3445     { "(bad)", { XX } },
3446     { "(bad)", { XX } },
3447     { "(bad)", { XX } },
3448     { "(bad)", { XX } },
3449     { "(bad)", { XX } },
3450     { "(bad)", { XX } },
3451     { "(bad)", { XX } },
3452     /* 60 */
3453     { "(bad)", { XX } },
3454     { "(bad)", { XX } },
3455     { "(bad)", { XX } },
3456     { "(bad)", { XX } },
3457     { "(bad)", { XX } },
3458     { "(bad)", { XX } },
3459     { "(bad)", { XX } },
3460     { "(bad)", { XX } },
3461     /* 68 */
3462     { "(bad)", { XX } },
3463     { "(bad)", { XX } },
3464     { "(bad)", { XX } },
3465     { "(bad)", { XX } },
3466     { "(bad)", { XX } },
3467     { "(bad)", { XX } },
3468     { "(bad)", { XX } },
3469     { "(bad)", { XX } },
3470     /* 70 */
3471     { "(bad)", { XX } },
3472     { "(bad)", { XX } },
3473     { "(bad)", { XX } },
3474     { "(bad)", { XX } },
3475     { "(bad)", { XX } },
3476     { "(bad)", { XX } },
3477     { "(bad)", { XX } },
3478     { "(bad)", { XX } },
3479     /* 78 */
3480     { "(bad)", { XX } },
3481     { "(bad)", { XX } },
3482     { "(bad)", { XX } },
3483     { "(bad)", { XX } },
3484     { "(bad)", { XX } },
3485     { "(bad)", { XX } },
3486     { "(bad)", { XX } },
3487     { "(bad)", { XX } },
3488     /* 80 */
3489     { "(bad)", { XX } },
3490     { "(bad)", { XX } },
3491     { "(bad)", { XX } },
3492     { "(bad)", { XX } },
3493     { "(bad)", { XX } },
3494     { "(bad)", { XX } },
3495     { "(bad)", { XX } },
3496     { "(bad)", { XX } },
3497     /* 88 */
3498     { "(bad)", { XX } },
3499     { "(bad)", { XX } },
3500     { "(bad)", { XX } },
3501     { "(bad)", { XX } },
3502     { "(bad)", { XX } },
3503     { "(bad)", { XX } },
3504     { "(bad)", { XX } },
3505     { "(bad)", { XX } },
3506     /* 90 */
3507     { "(bad)", { XX } },
3508     { "(bad)", { XX } },
3509     { "(bad)", { XX } },
3510     { "(bad)", { XX } },
3511     { "(bad)", { XX } },
3512     { "(bad)", { XX } },
3513     { "(bad)", { XX } },
3514     { "(bad)", { XX } },
3515     /* 98 */
3516     { "(bad)", { XX } },
3517     { "(bad)", { XX } },
3518     { "(bad)", { XX } },
3519     { "(bad)", { XX } },
3520     { "(bad)", { XX } },
3521     { "(bad)", { XX } },
3522     { "(bad)", { XX } },
3523     { "(bad)", { XX } },
3524     /* a0 */
3525     { "(bad)", { XX } },
3526     { "(bad)", { XX } },
3527     { "(bad)", { XX } },
3528     { "(bad)", { XX } },
3529     { "(bad)", { XX } },
3530     { "(bad)", { XX } },
3531     { "(bad)", { XX } },
3532     { "(bad)", { XX } },
3533     /* a8 */
3534     { "(bad)", { XX } },
3535     { "(bad)", { XX } },
3536     { "(bad)", { XX } },
3537     { "(bad)", { XX } },
3538     { "(bad)", { XX } },
3539     { "(bad)", { XX } },
3540     { "(bad)", { XX } },
3541     { "(bad)", { XX } },
3542     /* b0 */
3543     { "(bad)", { XX } },
3544     { "(bad)", { XX } },
3545     { "(bad)", { XX } },
3546     { "(bad)", { XX } },
3547     { "(bad)", { XX } },
3548     { "(bad)", { XX } },
3549     { "(bad)", { XX } },
3550     { "(bad)", { XX } },
3551     /* b8 */
3552     { "(bad)", { XX } },
3553     { "(bad)", { XX } },
3554     { "(bad)", { XX } },
3555     { "(bad)", { XX } },
3556     { "(bad)", { XX } },
3557     { "(bad)", { XX } },
3558     { "(bad)", { XX } },
3559     { "(bad)", { XX } },
3560     /* c0 */
3561     { "(bad)", { XX } },
3562     { "(bad)", { XX } },
3563     { "(bad)", { XX } },
3564     { "(bad)", { XX } },
3565     { "(bad)", { XX } },
3566     { "(bad)", { XX } },
3567     { "(bad)", { XX } },
3568     { "(bad)", { XX } },
3569     /* c8 */
3570     { "(bad)", { XX } },
3571     { "(bad)", { XX } },
3572     { "(bad)", { XX } },
3573     { "(bad)", { XX } },
3574     { "(bad)", { XX } },
3575     { "(bad)", { XX } },
3576     { "(bad)", { XX } },
3577     { "(bad)", { XX } },
3578     /* d0 */
3579     { "(bad)", { XX } },
3580     { "(bad)", { XX } },
3581     { "(bad)", { XX } },
3582     { "(bad)", { XX } },
3583     { "(bad)", { XX } },
3584     { "(bad)", { XX } },
3585     { "(bad)", { XX } },
3586     { "(bad)", { XX } },
3587     /* d8 */
3588     { "(bad)", { XX } },
3589     { "(bad)", { XX } },
3590     { "(bad)", { XX } },
3591     { "(bad)", { XX } },
3592     { "(bad)", { XX } },
3593     { "(bad)", { XX } },
3594     { "(bad)", { XX } },
3595     { "(bad)", { XX } },
3596     /* e0 */
3597     { "(bad)", { XX } },
3598     { "(bad)", { XX } },
3599     { "(bad)", { XX } },
3600     { "(bad)", { XX } },
3601     { "(bad)", { XX } },
3602     { "(bad)", { XX } },
3603     { "(bad)", { XX } },
3604     { "(bad)", { XX } },
3605     /* e8 */
3606     { "(bad)", { XX } },
3607     { "(bad)", { XX } },
3608     { "(bad)", { XX } },
3609     { "(bad)", { XX } },
3610     { "(bad)", { XX } },
3611     { "(bad)", { XX } },
3612     { "(bad)", { XX } },
3613     { "(bad)", { XX } },
3614     /* f0 */
3615     { PREFIX_TABLE (PREFIX_0F38F0) },
3616     { PREFIX_TABLE (PREFIX_0F38F1) },
3617     { "(bad)", { XX } },
3618     { "(bad)", { XX } },
3619     { "(bad)", { XX } },
3620     { "(bad)", { XX } },
3621     { "(bad)", { XX } },
3622     { "(bad)", { XX } },
3623     /* f8 */
3624     { "(bad)", { XX } },
3625     { "(bad)", { XX } },
3626     { "(bad)", { XX } },
3627     { "(bad)", { XX } },
3628     { "(bad)", { XX } },
3629     { "(bad)", { XX } },
3630     { "(bad)", { XX } },
3631     { "(bad)", { XX } },
3632   },
3633   /* THREE_BYTE_0F3A */
3634   {
3635     /* 00 */
3636     { "(bad)", { XX } },
3637     { "(bad)", { XX } },
3638     { "(bad)", { XX } },
3639     { "(bad)", { XX } },
3640     { "(bad)", { XX } },
3641     { "(bad)", { XX } },
3642     { "(bad)", { XX } },
3643     { "(bad)", { XX } },
3644     /* 08 */
3645     { PREFIX_TABLE (PREFIX_0F3A08) },
3646     { PREFIX_TABLE (PREFIX_0F3A09) },
3647     { PREFIX_TABLE (PREFIX_0F3A0A) },
3648     { PREFIX_TABLE (PREFIX_0F3A0B) },
3649     { PREFIX_TABLE (PREFIX_0F3A0C) },
3650     { PREFIX_TABLE (PREFIX_0F3A0D) },
3651     { PREFIX_TABLE (PREFIX_0F3A0E) },
3652     { "palignr", { MX, EM, Ib } },
3653     /* 10 */
3654     { "(bad)", { XX } },
3655     { "(bad)", { XX } },
3656     { "(bad)", { XX } },
3657     { "(bad)", { XX } },
3658     { PREFIX_TABLE (PREFIX_0F3A14) },
3659     { PREFIX_TABLE (PREFIX_0F3A15) },
3660     { PREFIX_TABLE (PREFIX_0F3A16) },
3661     { PREFIX_TABLE (PREFIX_0F3A17) },
3662     /* 18 */
3663     { "(bad)", { XX } },
3664     { "(bad)", { XX } },
3665     { "(bad)", { XX } },
3666     { "(bad)", { XX } },
3667     { "(bad)", { XX } },
3668     { "(bad)", { XX } },
3669     { "(bad)", { XX } },
3670     { "(bad)", { XX } },
3671     /* 20 */
3672     { PREFIX_TABLE (PREFIX_0F3A20) },
3673     { PREFIX_TABLE (PREFIX_0F3A21) },
3674     { PREFIX_TABLE (PREFIX_0F3A22) },
3675     { "(bad)", { XX } },
3676     { "(bad)", { XX } },
3677     { "(bad)", { XX } },
3678     { "(bad)", { XX } },
3679     { "(bad)", { XX } },
3680     /* 28 */
3681     { "(bad)", { XX } },
3682     { "(bad)", { XX } },
3683     { "(bad)", { XX } },
3684     { "(bad)", { XX } },
3685     { "(bad)", { XX } },
3686     { "(bad)", { XX } },
3687     { "(bad)", { XX } },
3688     { "(bad)", { XX } },
3689     /* 30 */
3690     { "(bad)", { XX } },
3691     { "(bad)", { XX } },
3692     { "(bad)", { XX } },
3693     { "(bad)", { XX } },
3694     { "(bad)", { XX } },
3695     { "(bad)", { XX } },
3696     { "(bad)", { XX } },
3697     { "(bad)", { XX } },
3698     /* 38 */
3699     { "(bad)", { XX } },
3700     { "(bad)", { XX } },
3701     { "(bad)", { XX } },
3702     { "(bad)", { XX } },
3703     { "(bad)", { XX } },
3704     { "(bad)", { XX } },
3705     { "(bad)", { XX } },
3706     { "(bad)", { XX } },
3707     /* 40 */
3708     { PREFIX_TABLE (PREFIX_0F3A40) },
3709     { PREFIX_TABLE (PREFIX_0F3A41) },
3710     { PREFIX_TABLE (PREFIX_0F3A42) },
3711     { "(bad)", { XX } },
3712     { "(bad)", { XX } },
3713     { "(bad)", { XX } },
3714     { "(bad)", { XX } },
3715     { "(bad)", { XX } },
3716     /* 48 */
3717     { "(bad)", { XX } },
3718     { "(bad)", { XX } },
3719     { "(bad)", { XX } },
3720     { "(bad)", { XX } },
3721     { "(bad)", { XX } },
3722     { "(bad)", { XX } },
3723     { "(bad)", { XX } },
3724     { "(bad)", { XX } },
3725     /* 50 */
3726     { "(bad)", { XX } },
3727     { "(bad)", { XX } },
3728     { "(bad)", { XX } },
3729     { "(bad)", { XX } },
3730     { "(bad)", { XX } },
3731     { "(bad)", { XX } },
3732     { "(bad)", { XX } },
3733     { "(bad)", { XX } },
3734     /* 58 */
3735     { "(bad)", { XX } },
3736     { "(bad)", { XX } },
3737     { "(bad)", { XX } },
3738     { "(bad)", { XX } },
3739     { "(bad)", { XX } },
3740     { "(bad)", { XX } },
3741     { "(bad)", { XX } },
3742     { "(bad)", { XX } },
3743     /* 60 */
3744     { PREFIX_TABLE (PREFIX_0F3A60) },
3745     { PREFIX_TABLE (PREFIX_0F3A61) },
3746     { PREFIX_TABLE (PREFIX_0F3A62) },
3747     { PREFIX_TABLE (PREFIX_0F3A63) },
3748     { "(bad)", { XX } },
3749     { "(bad)", { XX } },
3750     { "(bad)", { XX } },
3751     { "(bad)", { XX } },
3752     /* 68 */
3753     { "(bad)", { XX } },
3754     { "(bad)", { XX } },
3755     { "(bad)", { XX } },
3756     { "(bad)", { XX } },
3757     { "(bad)", { XX } },
3758     { "(bad)", { XX } },
3759     { "(bad)", { XX } },
3760     { "(bad)", { XX } },
3761     /* 70 */
3762     { "(bad)", { XX } },
3763     { "(bad)", { XX } },
3764     { "(bad)", { XX } },
3765     { "(bad)", { XX } },
3766     { "(bad)", { XX } },
3767     { "(bad)", { XX } },
3768     { "(bad)", { XX } },
3769     { "(bad)", { XX } },
3770     /* 78 */
3771     { "(bad)", { XX } },
3772     { "(bad)", { XX } },
3773     { "(bad)", { XX } },
3774     { "(bad)", { XX } },
3775     { "(bad)", { XX } },
3776     { "(bad)", { XX } },
3777     { "(bad)", { XX } },
3778     { "(bad)", { XX } },
3779     /* 80 */
3780     { "(bad)", { XX } },
3781     { "(bad)", { XX } },
3782     { "(bad)", { XX } },
3783     { "(bad)", { XX } },
3784     { "(bad)", { XX } },
3785     { "(bad)", { XX } },
3786     { "(bad)", { XX } },
3787     { "(bad)", { XX } },
3788     /* 88 */
3789     { "(bad)", { XX } },
3790     { "(bad)", { XX } },
3791     { "(bad)", { XX } },
3792     { "(bad)", { XX } },
3793     { "(bad)", { XX } },
3794     { "(bad)", { XX } },
3795     { "(bad)", { XX } },
3796     { "(bad)", { XX } },
3797     /* 90 */
3798     { "(bad)", { XX } },
3799     { "(bad)", { XX } },
3800     { "(bad)", { XX } },
3801     { "(bad)", { XX } },
3802     { "(bad)", { XX } },
3803     { "(bad)", { XX } },
3804     { "(bad)", { XX } },
3805     { "(bad)", { XX } },
3806     /* 98 */
3807     { "(bad)", { XX } },
3808     { "(bad)", { XX } },
3809     { "(bad)", { XX } },
3810     { "(bad)", { XX } },
3811     { "(bad)", { XX } },
3812     { "(bad)", { XX } },
3813     { "(bad)", { XX } },
3814     { "(bad)", { XX } },
3815     /* a0 */
3816     { "(bad)", { XX } },
3817     { "(bad)", { XX } },
3818     { "(bad)", { XX } },
3819     { "(bad)", { XX } },
3820     { "(bad)", { XX } },
3821     { "(bad)", { XX } },
3822     { "(bad)", { XX } },
3823     { "(bad)", { XX } },
3824     /* a8 */
3825     { "(bad)", { XX } },
3826     { "(bad)", { XX } },
3827     { "(bad)", { XX } },
3828     { "(bad)", { XX } },
3829     { "(bad)", { XX } },
3830     { "(bad)", { XX } },
3831     { "(bad)", { XX } },
3832     { "(bad)", { XX } },
3833     /* b0 */
3834     { "(bad)", { XX } },
3835     { "(bad)", { XX } },
3836     { "(bad)", { XX } },
3837     { "(bad)", { XX } },
3838     { "(bad)", { XX } },
3839     { "(bad)", { XX } },
3840     { "(bad)", { XX } },
3841     { "(bad)", { XX } },
3842     /* b8 */
3843     { "(bad)", { XX } },
3844     { "(bad)", { XX } },
3845     { "(bad)", { XX } },
3846     { "(bad)", { XX } },
3847     { "(bad)", { XX } },
3848     { "(bad)", { XX } },
3849     { "(bad)", { XX } },
3850     { "(bad)", { XX } },
3851     /* c0 */
3852     { "(bad)", { XX } },
3853     { "(bad)", { XX } },
3854     { "(bad)", { XX } },
3855     { "(bad)", { XX } },
3856     { "(bad)", { XX } },
3857     { "(bad)", { XX } },
3858     { "(bad)", { XX } },
3859     { "(bad)", { XX } },
3860     /* c8 */
3861     { "(bad)", { XX } },
3862     { "(bad)", { XX } },
3863     { "(bad)", { XX } },
3864     { "(bad)", { XX } },
3865     { "(bad)", { XX } },
3866     { "(bad)", { XX } },
3867     { "(bad)", { XX } },
3868     { "(bad)", { XX } },
3869     /* d0 */
3870     { "(bad)", { XX } },
3871     { "(bad)", { XX } },
3872     { "(bad)", { XX } },
3873     { "(bad)", { XX } },
3874     { "(bad)", { XX } },
3875     { "(bad)", { XX } },
3876     { "(bad)", { XX } },
3877     { "(bad)", { XX } },
3878     /* d8 */
3879     { "(bad)", { XX } },
3880     { "(bad)", { XX } },
3881     { "(bad)", { XX } },
3882     { "(bad)", { XX } },
3883     { "(bad)", { XX } },
3884     { "(bad)", { XX } },
3885     { "(bad)", { XX } },
3886     { "(bad)", { XX } },
3887     /* e0 */
3888     { "(bad)", { XX } },
3889     { "(bad)", { XX } },
3890     { "(bad)", { XX } },
3891     { "(bad)", { XX } },
3892     { "(bad)", { XX } },
3893     { "(bad)", { XX } },
3894     { "(bad)", { XX } },
3895     { "(bad)", { XX } },
3896     /* e8 */
3897     { "(bad)", { XX } },
3898     { "(bad)", { XX } },
3899     { "(bad)", { XX } },
3900     { "(bad)", { XX } },
3901     { "(bad)", { XX } },
3902     { "(bad)", { XX } },
3903     { "(bad)", { XX } },
3904     { "(bad)", { XX } },
3905     /* f0 */
3906     { "(bad)", { XX } },
3907     { "(bad)", { XX } },
3908     { "(bad)", { XX } },
3909     { "(bad)", { XX } },
3910     { "(bad)", { XX } },
3911     { "(bad)", { XX } },
3912     { "(bad)", { XX } },
3913     { "(bad)", { XX } },
3914     /* f8 */
3915     { "(bad)", { XX } },
3916     { "(bad)", { XX } },
3917     { "(bad)", { XX } },
3918     { "(bad)", { XX } },
3919     { "(bad)", { XX } },
3920     { "(bad)", { XX } },
3921     { "(bad)", { XX } },
3922     { "(bad)", { XX } },
3923   },
3924   /* THREE_BYTE_0F7A */
3925   {
3926     /* 00 */
3927     { "(bad)",          { XX } },
3928     { "(bad)",          { XX } },
3929     { "(bad)",          { XX } },
3930     { "(bad)",          { XX } },
3931     { "(bad)",          { XX } },
3932     { "(bad)",          { XX } },
3933     { "(bad)",          { XX } },
3934     { "(bad)",          { XX } },
3935     /* 08 */
3936     { "(bad)",          { XX } },
3937     { "(bad)",          { XX } },
3938     { "(bad)",          { XX } },
3939     { "(bad)",          { XX } },
3940     { "(bad)",          { XX } },
3941     { "(bad)",          { XX } },
3942     { "(bad)",          { XX } },
3943     { "(bad)",          { XX } },
3944     /* 10 */
3945     { "frczps",         { XM, EXq } },
3946     { "frczpd",         { XM, EXq } },
3947     { "frczss",         { XM, EXq } },
3948     { "frczsd",         { XM, EXq } },
3949     { "(bad)",          { XX } },
3950     { "(bad)",          { XX } },
3951     { "(bad)",          { XX } },
3952     { "(bad)",          { XX } },
3953     /* 18 */
3954     { "(bad)",          { XX } },
3955     { "(bad)",          { XX } },
3956     { "(bad)",          { XX } },
3957     { "(bad)",          { XX } },
3958     { "(bad)",          { XX } },
3959     { "(bad)",          { XX } },
3960     { "(bad)",          { XX } },
3961     { "(bad)",          { XX } },
3962     /* 20 */
3963     { "ptest",          { XX } },
3964     { "(bad)",          { XX } },
3965     { "(bad)",          { XX } },
3966     { "(bad)",          { XX } },
3967     { "(bad)",          { XX } },
3968     { "(bad)",          { XX } },
3969     { "(bad)",          { XX } },
3970     { "(bad)",          { XX } },
3971     /* 28 */
3972     { "(bad)",          { XX } },
3973     { "(bad)",          { XX } },
3974     { "(bad)",          { XX } },
3975     { "(bad)",          { XX } },
3976     { "(bad)", { XX } },
3977     { "(bad)", { XX } },
3978     { "(bad)", { XX } },
3979     { "(bad)", { XX } },
3980     /* 30 */
3981     { "cvtph2ps",       { XM, EXd } },
3982     { "cvtps2ph",       { EXd, XM } },
3983     { "(bad)", { XX } },
3984     { "(bad)", { XX } },
3985     { "(bad)", { XX } },
3986     { "(bad)", { XX } },
3987     { "(bad)", { XX } },
3988     { "(bad)", { XX } },
3989     /* 38 */
3990     { "(bad)", { XX } },
3991     { "(bad)", { XX } },
3992     { "(bad)", { XX } },
3993     { "(bad)", { XX } },
3994     { "(bad)", { XX } },
3995     { "(bad)", { XX } },
3996     { "(bad)", { XX } },
3997     { "(bad)", { XX } },
3998     /* 40 */
3999     { "(bad)", { XX } },
4000     { "phaddbw",        { XM, EXq } },
4001     { "phaddbd",        { XM, EXq } },
4002     { "phaddbq",        { XM, EXq } },
4003     { "(bad)", { XX } },
4004     { "(bad)", { XX } },
4005     { "phaddwd",        { XM, EXq } },
4006     { "phaddwq",        { XM, EXq } },
4007     /* 48 */
4008     { "(bad)", { XX } },
4009     { "(bad)", { XX } },
4010     { "(bad)", { XX } },
4011     { "phadddq",        { XM, EXq } },
4012     { "(bad)", { XX } },
4013     { "(bad)", { XX } },
4014     { "(bad)", { XX } },
4015     { "(bad)", { XX } },
4016     /* 50 */
4017     { "(bad)", { XX } },
4018     { "phaddubw",       { XM, EXq } },
4019     { "phaddubd",       { XM, EXq } },
4020     { "phaddubq",       { XM, EXq } },
4021     { "(bad)", { XX } },
4022     { "(bad)", { XX } },
4023     { "phadduwd",       { XM, EXq } },
4024     { "phadduwq",       { XM, EXq } },
4025     /* 58 */
4026     { "(bad)", { XX } },
4027     { "(bad)", { XX } },
4028     { "(bad)", { XX } },
4029     { "phaddudq",       { XM, EXq } },
4030     { "(bad)", { XX } },
4031     { "(bad)", { XX } },
4032     { "(bad)", { XX } },
4033     { "(bad)", { XX } },
4034     /* 60 */
4035     { "(bad)", { XX } },
4036     { "phsubbw",        { XM, EXq } },
4037     { "phsubbd",        { XM, EXq } },
4038     { "phsubbq",        { XM, EXq } },
4039     { "(bad)", { XX } },
4040     { "(bad)", { XX } },
4041     { "(bad)", { XX } },
4042     { "(bad)", { XX } },
4043     /* 68 */
4044     { "(bad)", { XX } },
4045     { "(bad)", { XX } },
4046     { "(bad)", { XX } },
4047     { "(bad)", { XX } },
4048     { "(bad)", { XX } },
4049     { "(bad)", { XX } },
4050     { "(bad)", { XX } },
4051     { "(bad)", { XX } },
4052     /* 70 */
4053     { "(bad)", { XX } },
4054     { "(bad)", { XX } },
4055     { "(bad)", { XX } },
4056     { "(bad)", { XX } },
4057     { "(bad)", { XX } },
4058     { "(bad)", { XX } },
4059     { "(bad)", { XX } },
4060     { "(bad)", { XX } },
4061     /* 78 */
4062     { "(bad)", { XX } },
4063     { "(bad)", { XX } },
4064     { "(bad)", { XX } },
4065     { "(bad)", { XX } },
4066     { "(bad)", { XX } },
4067     { "(bad)", { XX } },
4068     { "(bad)", { XX } },
4069     { "(bad)", { XX } },
4070     /* 80 */
4071     { "(bad)", { XX } },
4072     { "(bad)", { XX } },
4073     { "(bad)", { XX } },
4074     { "(bad)", { XX } },
4075     { "(bad)", { XX } },
4076     { "(bad)", { XX } },
4077     { "(bad)", { XX } },
4078     { "(bad)", { XX } },
4079     /* 88 */
4080     { "(bad)", { XX } },
4081     { "(bad)", { XX } },
4082     { "(bad)", { XX } },
4083     { "(bad)", { XX } },
4084     { "(bad)", { XX } },
4085     { "(bad)", { XX } },
4086     { "(bad)", { XX } },
4087     { "(bad)", { XX } },
4088     /* 90 */
4089     { "(bad)", { XX } },
4090     { "(bad)", { XX } },
4091     { "(bad)", { XX } },
4092     { "(bad)", { XX } },
4093     { "(bad)", { XX } },
4094     { "(bad)", { XX } },
4095     { "(bad)", { XX } },
4096     { "(bad)", { XX } },
4097     /* 98 */
4098     { "(bad)", { XX } },
4099     { "(bad)", { XX } },
4100     { "(bad)", { XX } },
4101     { "(bad)", { XX } },
4102     { "(bad)", { XX } },
4103     { "(bad)", { XX } },
4104     { "(bad)", { XX } },
4105     { "(bad)", { XX } },
4106     /* a0 */
4107     { "(bad)", { XX } },
4108     { "(bad)", { XX } },
4109     { "(bad)", { XX } },
4110     { "(bad)", { XX } },
4111     { "(bad)", { XX } },
4112     { "(bad)", { XX } },
4113     { "(bad)", { XX } },
4114     { "(bad)", { XX } },
4115     /* a8 */
4116     { "(bad)", { XX } },
4117     { "(bad)", { XX } },
4118     { "(bad)", { XX } },
4119     { "(bad)", { XX } },
4120     { "(bad)", { XX } },
4121     { "(bad)", { XX } },
4122     { "(bad)", { XX } },
4123     { "(bad)", { XX } },
4124     /* b0 */
4125     { "(bad)", { XX } },
4126     { "(bad)", { XX } },
4127     { "(bad)", { XX } },
4128     { "(bad)", { XX } },
4129     { "(bad)", { XX } },
4130     { "(bad)", { XX } },
4131     { "(bad)", { XX } },
4132     { "(bad)", { XX } },
4133     /* b8 */
4134     { "(bad)", { XX } },
4135     { "(bad)", { XX } },
4136     { "(bad)", { XX } },
4137     { "(bad)", { XX } },
4138     { "(bad)", { XX } },
4139     { "(bad)", { XX } },
4140     { "(bad)", { XX } },
4141     { "(bad)", { XX } },
4142     /* c0 */
4143     { "(bad)", { XX } },
4144     { "(bad)", { XX } },
4145     { "(bad)", { XX } },
4146     { "(bad)", { XX } },
4147     { "(bad)", { XX } },
4148     { "(bad)", { XX } },
4149     { "(bad)", { XX } },
4150     { "(bad)", { XX } },
4151     /* c8 */
4152     { "(bad)", { XX } },
4153     { "(bad)", { XX } },
4154     { "(bad)", { XX } },
4155     { "(bad)", { XX } },
4156     { "(bad)", { XX } },
4157     { "(bad)", { XX } },
4158     { "(bad)", { XX } },
4159     { "(bad)", { XX } },
4160     /* d0 */
4161     { "(bad)", { XX } },
4162     { "(bad)", { XX } },
4163     { "(bad)", { XX } },
4164     { "(bad)", { XX } },
4165     { "(bad)", { XX } },
4166     { "(bad)", { XX } },
4167     { "(bad)", { XX } },
4168     { "(bad)", { XX } },
4169     /* d8 */
4170     { "(bad)", { XX } },
4171     { "(bad)", { XX } },
4172     { "(bad)", { XX } },
4173     { "(bad)", { XX } },
4174     { "(bad)", { XX } },
4175     { "(bad)", { XX } },
4176     { "(bad)", { XX } },
4177     { "(bad)", { XX } },
4178     /* e0 */
4179     { "(bad)", { XX } },
4180     { "(bad)", { XX } },
4181     { "(bad)", { XX } },
4182     { "(bad)", { XX } },
4183     { "(bad)", { XX } },
4184     { "(bad)", { XX } },
4185     { "(bad)", { XX } },
4186     { "(bad)", { XX } },
4187     /* e8 */
4188     { "(bad)", { XX } },
4189     { "(bad)", { XX } },
4190     { "(bad)", { XX } },
4191     { "(bad)", { XX } },
4192     { "(bad)", { XX } },
4193     { "(bad)", { XX } },
4194     { "(bad)", { XX } },
4195     { "(bad)", { XX } },
4196     /* f0 */
4197     { "(bad)",          { XX } },
4198     { "(bad)",          { XX } },
4199     { "(bad)", { XX } },
4200     { "(bad)", { XX } },
4201     { "(bad)", { XX } },
4202     { "(bad)", { XX } },
4203     { "(bad)", { XX } },
4204     { "(bad)", { XX } },
4205     /* f8 */
4206     { "(bad)", { XX } },
4207     { "(bad)", { XX } },
4208     { "(bad)", { XX } },
4209     { "(bad)", { XX } },
4210     { "(bad)", { XX } },
4211     { "(bad)", { XX } },
4212     { "(bad)", { XX } },
4213     { "(bad)", { XX } },
4214   },
4215   /* THREE_BYTE_0F7B */
4216   {
4217     /* 00 */
4218     { "(bad)", { XX } },
4219     { "(bad)", { XX } },
4220     { "(bad)", { XX } },
4221     { "(bad)", { XX } },
4222     { "(bad)", { XX } },
4223     { "(bad)", { XX } },
4224     { "(bad)", { XX } },
4225     { "(bad)", { XX } },
4226     /* 08 */
4227     { "(bad)", { XX } },
4228     { "(bad)", { XX } },
4229     { "(bad)", { XX } },
4230     { "(bad)", { XX } },
4231     { "(bad)", { XX } },
4232     { "(bad)", { XX } },
4233     { "(bad)", { XX } },
4234     { "(bad)", { XX } },
4235     /* 10 */
4236     { "(bad)", { XX } },
4237     { "(bad)", { XX } },
4238     { "(bad)", { XX } },
4239     { "(bad)", { XX } },
4240     { "(bad)", { XX } },
4241     { "(bad)", { XX } },
4242     { "(bad)", { XX } },
4243     { "(bad)", { XX } },
4244     /* 18 */
4245     { "(bad)", { XX } },
4246     { "(bad)", { XX } },
4247     { "(bad)", { XX } },
4248     { "(bad)", { XX } },
4249     { "(bad)", { XX } },
4250     { "(bad)", { XX } },
4251     { "(bad)", { XX } },
4252     { "(bad)", { XX } },
4253     /* 20 */
4254     { "(bad)", { XX } },
4255     { "(bad)", { XX } },
4256     { "(bad)", { XX } },
4257     { "(bad)", { XX } },
4258     { "(bad)", { XX } },
4259     { "(bad)", { XX } },
4260     { "(bad)", { XX } },
4261     { "(bad)", { XX } },
4262     /* 28 */
4263     { "(bad)", { XX } },
4264     { "(bad)", { XX } },
4265     { "(bad)", { XX } },
4266     { "(bad)", { XX } },
4267     { "(bad)", { XX } },
4268     { "(bad)", { XX } },
4269     { "(bad)", { XX } },
4270     { "(bad)", { XX } },
4271     /* 30 */
4272     { "(bad)", { XX } },
4273     { "(bad)", { XX } },
4274     { "(bad)", { XX } },
4275     { "(bad)", { XX } },
4276     { "(bad)", { XX } },
4277     { "(bad)", { XX } },
4278     { "(bad)",          { XX } },
4279     { "(bad)",          { XX } },
4280     /* 38 */
4281     { "(bad)",          { XX } },
4282     { "(bad)",          { XX } },
4283     { "(bad)",          { XX } },
4284     { "(bad)", { XX } },
4285     { "(bad)", { XX } },
4286     { "(bad)", { XX } },
4287     { "(bad)", { XX } },
4288     { "(bad)", { XX } },
4289     /* 40 */
4290     { "protb",          { XM, EXq, Ib } },
4291     { "protw",          { XM, EXq, Ib } },
4292     { "protd",          { XM, EXq, Ib } },
4293     { "protq",          { XM, EXq, Ib } },
4294     { "pshlb",          { XM, EXq, Ib } },
4295     { "pshlw",          { XM, EXq, Ib } },
4296     { "pshld",          { XM, EXq, Ib } },
4297     { "pshlq",          { XM, EXq, Ib } },
4298     /* 48 */
4299     { "pshab",          { XM, EXq, Ib } },
4300     { "pshaw",          { XM, EXq, Ib } },
4301     { "pshad",          { XM, EXq, Ib } },
4302     { "pshaq",          { XM, EXq, Ib } },
4303     { "(bad)",          { XX } },
4304     { "(bad)", { XX } },
4305     { "(bad)", { XX } },
4306     { "(bad)", { XX } },
4307     /* 50 */
4308     { "(bad)", { XX } },
4309     { "(bad)", { XX } },
4310     { "(bad)", { XX } },
4311     { "(bad)", { XX } },
4312     { "(bad)", { XX } },
4313     { "(bad)", { XX } },
4314     { "(bad)", { XX } },
4315     { "(bad)", { XX } },
4316     /* 58 */
4317     { "(bad)", { XX } },
4318     { "(bad)", { XX } },
4319     { "(bad)", { XX } },
4320     { "(bad)", { XX } },
4321     { "(bad)", { XX } },
4322     { "(bad)", { XX } },
4323     { "(bad)", { XX } },
4324     { "(bad)", { XX } },
4325     /* 60 */
4326     { "(bad)",          { XX } },
4327     { "(bad)",          { XX } },
4328     { "(bad)",          { XX } },
4329     { "(bad)",          { XX } },
4330     { "(bad)", { XX } },
4331     { "(bad)", { XX } },
4332     { "(bad)", { XX } },
4333     { "(bad)", { XX } },
4334     /* 68 */
4335     { "(bad)", { XX } },
4336     { "(bad)", { XX } },
4337     { "(bad)", { XX } },
4338     { "(bad)", { XX } },
4339     { "(bad)", { XX } },
4340     { "(bad)", { XX } },
4341     { "(bad)", { XX } },
4342     { "(bad)", { XX } },
4343     /* 70 */
4344     { "(bad)", { XX } },
4345     { "(bad)", { XX } },
4346     { "(bad)", { XX } },
4347     { "(bad)", { XX } },
4348     { "(bad)", { XX } },
4349     { "(bad)", { XX } },
4350     { "(bad)", { XX } },
4351     { "(bad)", { XX } },
4352     /* 78 */
4353     { "(bad)", { XX } },
4354     { "(bad)", { XX } },
4355     { "(bad)", { XX } },
4356     { "(bad)", { XX } },
4357     { "(bad)", { XX } },
4358     { "(bad)", { XX } },
4359     { "(bad)", { XX } },
4360     { "(bad)", { XX } },
4361     /* 80 */
4362     { "(bad)", { XX } },
4363     { "(bad)", { XX } },
4364     { "(bad)", { XX } },
4365     { "(bad)", { XX } },
4366     { "(bad)", { XX } },
4367     { "(bad)", { XX } },
4368     { "(bad)", { XX } },
4369     { "(bad)", { XX } },
4370     /* 88 */
4371     { "(bad)", { XX } },
4372     { "(bad)", { XX } },
4373     { "(bad)", { XX } },
4374     { "(bad)", { XX } },
4375     { "(bad)", { XX } },
4376     { "(bad)", { XX } },
4377     { "(bad)", { XX } },
4378     { "(bad)", { XX } },
4379     /* 90 */
4380     { "(bad)", { XX } },
4381     { "(bad)", { XX } },
4382     { "(bad)", { XX } },
4383     { "(bad)", { XX } },
4384     { "(bad)", { XX } },
4385     { "(bad)", { XX } },
4386     { "(bad)", { XX } },
4387     { "(bad)", { XX } },
4388     /* 98 */
4389     { "(bad)", { XX } },
4390     { "(bad)", { XX } },
4391     { "(bad)", { XX } },
4392     { "(bad)", { XX } },
4393     { "(bad)", { XX } },
4394     { "(bad)", { XX } },
4395     { "(bad)", { XX } },
4396     { "(bad)", { XX } },
4397     /* a0 */
4398     { "(bad)", { XX } },
4399     { "(bad)", { XX } },
4400     { "(bad)", { XX } },
4401     { "(bad)", { XX } },
4402     { "(bad)", { XX } },
4403     { "(bad)", { XX } },
4404     { "(bad)", { XX } },
4405     { "(bad)", { XX } },
4406     /* a8 */
4407     { "(bad)", { XX } },
4408     { "(bad)", { XX } },
4409     { "(bad)", { XX } },
4410     { "(bad)", { XX } },
4411     { "(bad)", { XX } },
4412     { "(bad)", { XX } },
4413     { "(bad)", { XX } },
4414     { "(bad)", { XX } },
4415     /* b0 */
4416     { "(bad)", { XX } },
4417     { "(bad)", { XX } },
4418     { "(bad)", { XX } },
4419     { "(bad)", { XX } },
4420     { "(bad)", { XX } },
4421     { "(bad)", { XX } },
4422     { "(bad)", { XX } },
4423     { "(bad)", { XX } },
4424     /* b8 */
4425     { "(bad)", { XX } },
4426     { "(bad)", { XX } },
4427     { "(bad)", { XX } },
4428     { "(bad)", { XX } },
4429     { "(bad)", { XX } },
4430     { "(bad)", { XX } },
4431     { "(bad)", { XX } },
4432     { "(bad)", { XX } },
4433     /* c0 */
4434     { "(bad)", { XX } },
4435     { "(bad)", { XX } },
4436     { "(bad)", { XX } },
4437     { "(bad)", { XX } },
4438     { "(bad)", { XX } },
4439     { "(bad)", { XX } },
4440     { "(bad)", { XX } },
4441     { "(bad)", { XX } },
4442     /* c8 */
4443     { "(bad)", { XX } },
4444     { "(bad)", { XX } },
4445     { "(bad)", { XX } },
4446     { "(bad)", { XX } },
4447     { "(bad)", { XX } },
4448     { "(bad)", { XX } },
4449     { "(bad)", { XX } },
4450     { "(bad)", { XX } },
4451     /* d0 */
4452     { "(bad)", { XX } },
4453     { "(bad)", { XX } },
4454     { "(bad)", { XX } },
4455     { "(bad)", { XX } },
4456     { "(bad)", { XX } },
4457     { "(bad)", { XX } },
4458     { "(bad)", { XX } },
4459     { "(bad)", { XX } },
4460     /* d8 */
4461     { "(bad)", { XX } },
4462     { "(bad)", { XX } },
4463     { "(bad)", { XX } },
4464     { "(bad)", { XX } },
4465     { "(bad)", { XX } },
4466     { "(bad)", { XX } },
4467     { "(bad)", { XX } },
4468     { "(bad)", { XX } },
4469     /* e0 */
4470     { "(bad)", { XX } },
4471     { "(bad)", { XX } },
4472     { "(bad)", { XX } },
4473     { "(bad)", { XX } },
4474     { "(bad)", { XX } },
4475     { "(bad)", { XX } },
4476     { "(bad)", { XX } },
4477     { "(bad)", { XX } },
4478     /* e8 */
4479     { "(bad)", { XX } },
4480     { "(bad)", { XX } },
4481     { "(bad)", { XX } },
4482     { "(bad)", { XX } },
4483     { "(bad)", { XX } },
4484     { "(bad)", { XX } },
4485     { "(bad)", { XX } },
4486     { "(bad)", { XX } },
4487     /* f0 */
4488     { "(bad)", { XX } },
4489     { "(bad)", { XX } },
4490     { "(bad)", { XX } },
4491     { "(bad)", { XX } },
4492     { "(bad)", { XX } },
4493     { "(bad)", { XX } },
4494     { "(bad)", { XX } },
4495     { "(bad)", { XX } },
4496     /* f8 */
4497     { "(bad)", { XX } },
4498     { "(bad)", { XX } },
4499     { "(bad)", { XX } },
4500     { "(bad)", { XX } },
4501     { "(bad)", { XX } },
4502     { "(bad)", { XX } },
4503     { "(bad)", { XX } },
4504     { "(bad)", { XX } },
4505   }
4506 };
4507
4508 static const struct dis386 mod_table[][2] = {
4509   {
4510     /* MOD_8D */
4511     { "leaS",           { Gv, M } },
4512     { "(bad)",          { XX } },
4513   },
4514   {
4515     /* MOD_0F13 */
4516     { "movlpX",         { EXq, XM } },
4517     { "(bad)",          { XX } },
4518   },
4519   {
4520     /* MOD_0F17 */
4521     { "movhpX",         { EXq, XM } },
4522     { "(bad)",          { XX } },
4523   },
4524   {
4525     /* MOD_0F20 */
4526     { "(bad)",          { XX } },
4527     { "movZ",           { Rm, Cm } },
4528   },
4529   {
4530     /* MOD_0F21 */
4531     { "(bad)",          { XX } },
4532     { "movZ",           { Rm, Dm } },
4533   },
4534   {
4535     /* MOD_0F22 */
4536     { "(bad)",          { XX } },
4537     { "movZ",           { Cm, Rm } },
4538   },
4539   {
4540     /* MOD_0F23 */
4541     { "(bad)",          { XX } },
4542     { "movZ",           { Dm, Rm } },
4543   },
4544   {
4545     /* MOD_0F24 */
4546     { THREE_BYTE_TABLE (THREE_BYTE_0F24) },
4547     { "movL",           { Rd, Td } },
4548   },
4549   {
4550     /* MOD_0F26 */
4551     { "(bad)",          { XX } },
4552     { "movL",           { Td, Rd } },
4553   },
4554   {
4555     /* MOD_0FB2 */
4556     { "lssS",           { Gv, Mp } },
4557     { "(bad)",          { XX } },
4558   },
4559   {
4560     /* MOD_0FB4 */
4561     { "lfsS",           { Gv, Mp } },
4562     { "(bad)",          { XX } },
4563   },
4564   {
4565     /* MOD_0FB5 */
4566     { "lgsS",           { Gv, Mp } },
4567     { "(bad)",          { XX } },
4568   },
4569   {
4570     /* MOD_0F01_REG_0 */
4571     { X86_64_TABLE (X86_64_0F01_REG_0) },
4572     { RM_TABLE (RM_0F01_REG_0) },
4573   },
4574   {
4575     /* MOD_0F01_REG_1 */
4576     { X86_64_TABLE (X86_64_0F01_REG_1) },
4577     { RM_TABLE (RM_0F01_REG_1) },
4578   },
4579   {
4580     /* MOD_0F01_REG_2 */
4581     { X86_64_TABLE (X86_64_0F01_REG_2) },
4582     { "(bad)",          { XX } },
4583   },
4584   {
4585     /* MOD_0F01_REG_3 */
4586     { X86_64_TABLE (X86_64_0F01_REG_3) },
4587     { RM_TABLE (RM_0F01_REG_3) },
4588   },
4589   {
4590     /* MOD_0F01_REG_7 */
4591     { "invlpg",         { Mb } },
4592     { RM_TABLE (RM_0F01_REG_7) },
4593   },
4594   {
4595     /* MOD_0F18_REG_0 */
4596     { "prefetchnta",    { Mb } },
4597     { "(bad)",          { XX } },
4598   },
4599   {
4600     /* MOD_0F18_REG_1 */
4601     { "prefetcht0",     { Mb } },
4602     { "(bad)",          { XX } },
4603   },
4604   {
4605     /* MOD_0F18_REG_2 */
4606     { "prefetcht1",     { Mb } },
4607     { "(bad)",          { XX } },
4608   },
4609   {
4610     /* MOD_0F18_REG_3 */
4611     { "prefetcht2",     { Mb } },
4612     { "(bad)",          { XX } },
4613   },
4614   {
4615     /* MOD_0F71_REG_2 */
4616     { "(bad)",          { XX } },
4617     { "psrlw",          { MS, Ib } },
4618   },
4619   {
4620     /* MOD_0F71_REG_4 */
4621     { "(bad)",          { XX } },
4622     { "psraw",          { MS, Ib } },
4623   },
4624   {
4625     /* MOD_0F71_REG_6 */
4626     { "(bad)",          { XX } },
4627     { "psllw",          { MS, Ib } },
4628   },
4629   {
4630     /* MOD_0F72_REG_2 */
4631     { "(bad)",          { XX } },
4632     { "psrld",          { MS, Ib } },
4633   },
4634   {
4635     /* MOD_0F72_REG_4 */
4636     { "(bad)",          { XX } },
4637     { "psrad",          { MS, Ib } },
4638   },
4639   {
4640     /* MOD_0F72_REG_6 */
4641     { "(bad)",          { XX } },
4642     { "pslld",          { MS, Ib } },
4643   },
4644   {
4645     /* MOD_0F73_REG_2 */
4646     { "(bad)",          { XX } },
4647     { "psrlq",          { MS, Ib } },
4648   },
4649   {
4650     /* MOD_0F73_REG_3 */
4651     { "(bad)",          { XX } },
4652     { PREFIX_TABLE (PREFIX_0F73_REG_3) },
4653   },
4654   {
4655     /* MOD_0F73_REG_6 */
4656     { "(bad)",          { XX } },
4657     { "psllq",          { MS, Ib } },
4658   },
4659   {
4660     /* MOD_0F73_REG_7 */
4661     { "(bad)",          { XX } },
4662     { PREFIX_TABLE (PREFIX_0F73_REG_7) },
4663   },
4664   {
4665     /* MOD_0FAE_REG_0 */
4666     { "fxsave",         { M } },
4667     { "(bad)",          { XX } },
4668   },
4669   {
4670     /* MOD_0FAE_REG_1 */
4671     { "fxrstor",        { M } },
4672     { "(bad)",          { XX } },
4673   },
4674   {
4675     /* MOD_0FAE_REG_2 */
4676     { "ldmxcsr",        { Md } },
4677     { "(bad)",          { XX } },
4678   },
4679   {
4680     /* MOD_0FAE_REG_3 */
4681     { "stmxcsr",        { Md } },
4682     { "(bad)",          { XX } },
4683   },
4684   {
4685     /* MOD_0FAE_REG_5 */
4686     { "(bad)",          { XX } },
4687     { RM_TABLE (RM_0FAE_REG_5) },
4688   },
4689   {
4690     /* MOD_0FAE_REG_6 */
4691     { "(bad)",          { XX } },
4692     { RM_TABLE (RM_0FAE_REG_6) },
4693   },
4694   {
4695     /* MOD_0FAE_REG_7 */
4696     { "clflush",        { Mb } },
4697     { RM_TABLE (RM_0FAE_REG_7) },
4698   },
4699   {
4700     /* MOD_0FC7_REG_6 */
4701     { PREFIX_TABLE (PREFIX_0FC7_REG_6) },
4702     { "(bad)",          { XX } },
4703   },
4704   {
4705     /* MOD_0FC7_REG_7 */
4706     { "vmptrst",        { Mq } },
4707     { "(bad)",          { XX } },
4708   },
4709   {
4710     /* MOD_0F12_PREFIX_0 */
4711     { "movlps",         { XM, EXq } },
4712     { "movhlps",        { XM, EXq } },
4713   },
4714   {
4715     /* MOD_0F16_PREFIX_0 */
4716     { "movhps",         { XM, EXq } },
4717     { "movlhps",        { XM, EXq } },
4718   },
4719   {
4720     /* MOD_0FF0_PREFIX_3 */
4721     { "lddqu",          { XM, M } },
4722     { "(bad)",          { XX } },
4723   },
4724   {
4725     /* MOD_62_32BIT */
4726     { "bound{S|}",      { Gv, Ma } },
4727     { "(bad)",          { XX } },
4728   },
4729   {
4730     /* MOD_C4_32BIT */
4731     { "lesS",           { Gv, Mp } },
4732     { "(bad)",          { XX } },
4733   },
4734   {
4735     /* MOD_C5_32BIT */
4736     { "ldsS",           { Gv, Mp } },
4737     { "(bad)",          { XX } },
4738   },
4739 };
4740
4741 static const struct dis386 rm_table[][8] = {
4742   {
4743     /* RM_0F01_REG_0 */
4744     { "(bad)",          { XX } },
4745     { "vmcall",         { Skip_MODRM } },
4746     { "vmlaunch",       { Skip_MODRM } },
4747     { "vmresume",       { Skip_MODRM } },
4748     { "vmxoff",         { Skip_MODRM } },
4749     { "(bad)",          { XX } },
4750     { "(bad)",          { XX } },
4751     { "(bad)",          { XX } },
4752   },
4753   {
4754     /* RM_0F01_REG_1 */
4755     { "monitor",        { { OP_Monitor, 0 } } },
4756     { "mwait",          { { OP_Mwait, 0 } } },
4757     { "(bad)",          { XX } },
4758     { "(bad)",          { XX } },
4759     { "(bad)",          { XX } },
4760     { "(bad)",          { XX } },
4761     { "(bad)",          { XX } },
4762     { "(bad)",          { XX } },
4763   },
4764   {
4765     /* RM_0F01_REG_3 */
4766     { "vmrun",          { Skip_MODRM } },
4767     { "vmmcall",        { Skip_MODRM } },
4768     { "vmload",         { Skip_MODRM } },
4769     { "vmsave",         { Skip_MODRM } },
4770     { "stgi",           { Skip_MODRM } },
4771     { "clgi",           { Skip_MODRM } },
4772     { "skinit",         { Skip_MODRM } },
4773     { "invlpga",        { Skip_MODRM } },
4774   },
4775   {
4776     /* RM_0F01_REG_7 */
4777     { "swapgs",         { Skip_MODRM } },
4778     { "rdtscp",         { Skip_MODRM } },
4779     { "(bad)",          { XX } },
4780     { "(bad)",          { XX } },
4781     { "(bad)",          { XX } },
4782     { "(bad)",          { XX } },
4783     { "(bad)",          { XX } },
4784     { "(bad)",          { XX } },
4785   },
4786   {
4787     /* RM_0FAE_REG_5 */
4788     { "lfence",         { Skip_MODRM } },
4789     { "(bad)",          { XX } },
4790     { "(bad)",          { XX } },
4791     { "(bad)",          { XX } },
4792     { "(bad)",          { XX } },
4793     { "(bad)",          { XX } },
4794     { "(bad)",          { XX } },
4795     { "(bad)",          { XX } },
4796   },
4797   {
4798     /* RM_0FAE_REG_6 */
4799     { "mfence",         { Skip_MODRM } },
4800     { "(bad)",          { XX } },
4801     { "(bad)",          { XX } },
4802     { "(bad)",          { XX } },
4803     { "(bad)",          { XX } },
4804     { "(bad)",          { XX } },
4805     { "(bad)",          { XX } },
4806     { "(bad)",          { XX } },
4807   },
4808   {
4809     /* RM_0FAE_REG_7 */
4810     { "sfence",         { Skip_MODRM } },
4811     { "(bad)",          { XX } },
4812     { "(bad)",          { XX } },
4813     { "(bad)",          { XX } },
4814     { "(bad)",          { XX } },
4815     { "(bad)",          { XX } },
4816     { "(bad)",          { XX } },
4817     { "(bad)",          { XX } },
4818   },
4819 };
4820
4821 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
4822
4823 static void
4824 ckprefix (void)
4825 {
4826   int newrex;
4827   rex = 0;
4828   prefixes = 0;
4829   used_prefixes = 0;
4830   rex_used = 0;
4831   while (1)
4832     {
4833       FETCH_DATA (the_info, codep + 1);
4834       newrex = 0;
4835       switch (*codep)
4836         {
4837         /* REX prefixes family.  */
4838         case 0x40:
4839         case 0x41:
4840         case 0x42:
4841         case 0x43:
4842         case 0x44:
4843         case 0x45:
4844         case 0x46:
4845         case 0x47:
4846         case 0x48:
4847         case 0x49:
4848         case 0x4a:
4849         case 0x4b:
4850         case 0x4c:
4851         case 0x4d:
4852         case 0x4e:
4853         case 0x4f:
4854             if (address_mode == mode_64bit)
4855               newrex = *codep;
4856             else
4857               return;
4858           break;
4859         case 0xf3:
4860           prefixes |= PREFIX_REPZ;
4861           break;
4862         case 0xf2:
4863           prefixes |= PREFIX_REPNZ;
4864           break;
4865         case 0xf0:
4866           prefixes |= PREFIX_LOCK;
4867           break;
4868         case 0x2e:
4869           prefixes |= PREFIX_CS;
4870           break;
4871         case 0x36:
4872           prefixes |= PREFIX_SS;
4873           break;
4874         case 0x3e:
4875           prefixes |= PREFIX_DS;
4876           break;
4877         case 0x26:
4878           prefixes |= PREFIX_ES;
4879           break;
4880         case 0x64:
4881           prefixes |= PREFIX_FS;
4882           break;
4883         case 0x65:
4884           prefixes |= PREFIX_GS;
4885           break;
4886         case 0x66:
4887           prefixes |= PREFIX_DATA;
4888           break;
4889         case 0x67:
4890           prefixes |= PREFIX_ADDR;
4891           break;
4892         case FWAIT_OPCODE:
4893           /* fwait is really an instruction.  If there are prefixes
4894              before the fwait, they belong to the fwait, *not* to the
4895              following instruction.  */
4896           if (prefixes || rex)
4897             {
4898               prefixes |= PREFIX_FWAIT;
4899               codep++;
4900               return;
4901             }
4902           prefixes = PREFIX_FWAIT;
4903           break;
4904         default:
4905           return;
4906         }
4907       /* Rex is ignored when followed by another prefix.  */
4908       if (rex)
4909         {
4910           rex_used = rex;
4911           return;
4912         }
4913       rex = newrex;
4914       codep++;
4915     }
4916 }
4917
4918 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
4919    prefix byte.  */
4920
4921 static const char *
4922 prefix_name (int pref, int sizeflag)
4923 {
4924   static const char *rexes [16] =
4925     {
4926       "rex",            /* 0x40 */
4927       "rex.B",          /* 0x41 */
4928       "rex.X",          /* 0x42 */
4929       "rex.XB",         /* 0x43 */
4930       "rex.R",          /* 0x44 */
4931       "rex.RB",         /* 0x45 */
4932       "rex.RX",         /* 0x46 */
4933       "rex.RXB",        /* 0x47 */
4934       "rex.W",          /* 0x48 */
4935       "rex.WB",         /* 0x49 */
4936       "rex.WX",         /* 0x4a */
4937       "rex.WXB",        /* 0x4b */
4938       "rex.WR",         /* 0x4c */
4939       "rex.WRB",        /* 0x4d */
4940       "rex.WRX",        /* 0x4e */
4941       "rex.WRXB",       /* 0x4f */
4942     };
4943
4944   switch (pref)
4945     {
4946     /* REX prefixes family.  */
4947     case 0x40:
4948     case 0x41:
4949     case 0x42:
4950     case 0x43:
4951     case 0x44:
4952     case 0x45:
4953     case 0x46:
4954     case 0x47:
4955     case 0x48:
4956     case 0x49:
4957     case 0x4a:
4958     case 0x4b:
4959     case 0x4c:
4960     case 0x4d:
4961     case 0x4e:
4962     case 0x4f:
4963       return rexes [pref - 0x40];
4964     case 0xf3:
4965       return "repz";
4966     case 0xf2:
4967       return "repnz";
4968     case 0xf0:
4969       return "lock";
4970     case 0x2e:
4971       return "cs";
4972     case 0x36:
4973       return "ss";
4974     case 0x3e:
4975       return "ds";
4976     case 0x26:
4977       return "es";
4978     case 0x64:
4979       return "fs";
4980     case 0x65:
4981       return "gs";
4982     case 0x66:
4983       return (sizeflag & DFLAG) ? "data16" : "data32";
4984     case 0x67:
4985       if (address_mode == mode_64bit)
4986         return (sizeflag & AFLAG) ? "addr32" : "addr64";
4987       else
4988         return (sizeflag & AFLAG) ? "addr16" : "addr32";
4989     case FWAIT_OPCODE:
4990       return "fwait";
4991     default:
4992       return NULL;
4993     }
4994 }
4995
4996 static char op_out[MAX_OPERANDS][100];
4997 static int op_ad, op_index[MAX_OPERANDS];
4998 static int two_source_ops;
4999 static bfd_vma op_address[MAX_OPERANDS];
5000 static bfd_vma op_riprel[MAX_OPERANDS];
5001 static bfd_vma start_pc;
5002
5003 /*
5004  *   On the 386's of 1988, the maximum length of an instruction is 15 bytes.
5005  *   (see topic "Redundant prefixes" in the "Differences from 8086"
5006  *   section of the "Virtual 8086 Mode" chapter.)
5007  * 'pc' should be the address of this instruction, it will
5008  *   be used to print the target address if this is a relative jump or call
5009  * The function returns the length of this instruction in bytes.
5010  */
5011
5012 static char intel_syntax;
5013 static char open_char;
5014 static char close_char;
5015 static char separator_char;
5016 static char scale_char;
5017
5018 /* Here for backwards compatibility.  When gdb stops using
5019    print_insn_i386_att and print_insn_i386_intel these functions can
5020    disappear, and print_insn_i386 be merged into print_insn.  */
5021 int
5022 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
5023 {
5024   intel_syntax = 0;
5025
5026   return print_insn (pc, info);
5027 }
5028
5029 int
5030 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
5031 {
5032   intel_syntax = 1;
5033
5034   return print_insn (pc, info);
5035 }
5036
5037 int
5038 print_insn_i386 (bfd_vma pc, disassemble_info *info)
5039 {
5040   intel_syntax = -1;
5041
5042   return print_insn (pc, info);
5043 }
5044
5045 void
5046 print_i386_disassembler_options (FILE *stream)
5047 {
5048   fprintf (stream, _("\n\
5049 The following i386/x86-64 specific disassembler options are supported for use\n\
5050 with the -M switch (multiple options should be separated by commas):\n"));
5051
5052   fprintf (stream, _("  x86-64      Disassemble in 64bit mode\n"));
5053   fprintf (stream, _("  i386        Disassemble in 32bit mode\n"));
5054   fprintf (stream, _("  i8086       Disassemble in 16bit mode\n"));
5055   fprintf (stream, _("  att         Display instruction in AT&T syntax\n"));
5056   fprintf (stream, _("  intel       Display instruction in Intel syntax\n"));
5057   fprintf (stream, _("  addr64      Assume 64bit address size\n"));
5058   fprintf (stream, _("  addr32      Assume 32bit address size\n"));
5059   fprintf (stream, _("  addr16      Assume 16bit address size\n"));
5060   fprintf (stream, _("  data32      Assume 32bit data size\n"));
5061   fprintf (stream, _("  data16      Assume 16bit data size\n"));
5062   fprintf (stream, _("  suffix      Always display instruction suffix in AT&T syntax\n"));
5063 }
5064
5065 /* Get a pointer to struct dis386 with a valid name.  */
5066
5067 static const struct dis386 *
5068 get_valid_dis386 (const struct dis386 *dp, disassemble_info *info)
5069 {
5070   int index;
5071
5072   if (dp->name != NULL)
5073     return dp;
5074
5075   switch (dp->op[0].bytemode)
5076     {
5077     case USE_REG_TABLE:
5078       dp = &reg_table[dp->op[1].bytemode][modrm.reg];
5079       break;
5080
5081     case USE_MOD_TABLE:
5082       index = modrm.mod == 0x3 ? 1 : 0;
5083       dp = &mod_table[dp->op[1].bytemode][index];
5084       break;
5085
5086     case USE_RM_TABLE:
5087       dp = &rm_table[dp->op[1].bytemode][modrm.rm];
5088       break;
5089
5090     case USE_PREFIX_TABLE:
5091       index = 0;
5092       used_prefixes |= (prefixes & PREFIX_REPZ);
5093       if (prefixes & PREFIX_REPZ)
5094         {
5095           index = 1;
5096           repz_prefix = NULL;
5097         }
5098       else
5099         {
5100           /* We should check PREFIX_REPNZ and PREFIX_REPZ before
5101              PREFIX_DATA.  */
5102           used_prefixes |= (prefixes & PREFIX_REPNZ);
5103           if (prefixes & PREFIX_REPNZ)
5104             {
5105               index = 3;
5106               repnz_prefix = NULL;
5107             }
5108           else
5109             {
5110               used_prefixes |= (prefixes & PREFIX_DATA);
5111               if (prefixes & PREFIX_DATA)
5112                 {
5113                   index = 2;
5114                   data_prefix = NULL;
5115                 }
5116             }
5117         }
5118       dp = &prefix_table[dp->op[1].bytemode][index];
5119       break;
5120
5121     case USE_X86_64_TABLE:
5122       index = address_mode == mode_64bit ? 1 : 0;
5123       dp = &x86_64_table[dp->op[1].bytemode][index];
5124       break;
5125
5126     case USE_3BYTE_TABLE:
5127       FETCH_DATA (info, codep + 2);
5128       index = *codep++;
5129       dp = &three_byte_table[dp->op[1].bytemode][index];
5130       modrm.mod = (*codep >> 6) & 3;
5131       modrm.reg = (*codep >> 3) & 7;
5132       modrm.rm = *codep & 7;
5133       break;
5134
5135     default:
5136       oappend (INTERNAL_DISASSEMBLER_ERROR);
5137       return NULL;
5138     }
5139
5140   if (dp->name != NULL)
5141     return dp;
5142   else
5143     return get_valid_dis386 (dp, info);
5144 }
5145
5146 static int
5147 print_insn (bfd_vma pc, disassemble_info *info)
5148 {
5149   const struct dis386 *dp;
5150   int i;
5151   char *op_txt[MAX_OPERANDS];
5152   int needcomma;
5153   int sizeflag;
5154   const char *p;
5155   struct dis_private priv;
5156   unsigned char op;
5157   char prefix_obuf[32];
5158   char *prefix_obufp;
5159
5160   if (info->mach == bfd_mach_x86_64_intel_syntax
5161       || info->mach == bfd_mach_x86_64)
5162     address_mode = mode_64bit;
5163   else
5164     address_mode = mode_32bit;
5165
5166   if (intel_syntax == (char) -1)
5167     intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
5168                     || info->mach == bfd_mach_x86_64_intel_syntax);
5169
5170   if (info->mach == bfd_mach_i386_i386
5171       || info->mach == bfd_mach_x86_64
5172       || info->mach == bfd_mach_i386_i386_intel_syntax
5173       || info->mach == bfd_mach_x86_64_intel_syntax)
5174     priv.orig_sizeflag = AFLAG | DFLAG;
5175   else if (info->mach == bfd_mach_i386_i8086)
5176     priv.orig_sizeflag = 0;
5177   else
5178     abort ();
5179
5180   for (p = info->disassembler_options; p != NULL; )
5181     {
5182       if (CONST_STRNEQ (p, "x86-64"))
5183         {
5184           address_mode = mode_64bit;
5185           priv.orig_sizeflag = AFLAG | DFLAG;
5186         }
5187       else if (CONST_STRNEQ (p, "i386"))
5188         {
5189           address_mode = mode_32bit;
5190           priv.orig_sizeflag = AFLAG | DFLAG;
5191         }
5192       else if (CONST_STRNEQ (p, "i8086"))
5193         {
5194           address_mode = mode_16bit;
5195           priv.orig_sizeflag = 0;
5196         }
5197       else if (CONST_STRNEQ (p, "intel"))
5198         {
5199           intel_syntax = 1;
5200         }
5201       else if (CONST_STRNEQ (p, "att"))
5202         {
5203           intel_syntax = 0;
5204         }
5205       else if (CONST_STRNEQ (p, "addr"))
5206         {
5207           if (address_mode == mode_64bit)
5208             {
5209               if (p[4] == '3' && p[5] == '2')
5210                 priv.orig_sizeflag &= ~AFLAG;
5211               else if (p[4] == '6' && p[5] == '4')
5212                 priv.orig_sizeflag |= AFLAG;
5213             }
5214           else
5215             {
5216               if (p[4] == '1' && p[5] == '6')
5217                 priv.orig_sizeflag &= ~AFLAG;
5218               else if (p[4] == '3' && p[5] == '2')
5219                 priv.orig_sizeflag |= AFLAG;
5220             }
5221         }
5222       else if (CONST_STRNEQ (p, "data"))
5223         {
5224           if (p[4] == '1' && p[5] == '6')
5225             priv.orig_sizeflag &= ~DFLAG;
5226           else if (p[4] == '3' && p[5] == '2')
5227             priv.orig_sizeflag |= DFLAG;
5228         }
5229       else if (CONST_STRNEQ (p, "suffix"))
5230         priv.orig_sizeflag |= SUFFIX_ALWAYS;
5231
5232       p = strchr (p, ',');
5233       if (p != NULL)
5234         p++;
5235     }
5236
5237   if (intel_syntax)
5238     {
5239       names64 = intel_names64;
5240       names32 = intel_names32;
5241       names16 = intel_names16;
5242       names8 = intel_names8;
5243       names8rex = intel_names8rex;
5244       names_seg = intel_names_seg;
5245       index64 = intel_index64;
5246       index32 = intel_index32;
5247       index16 = intel_index16;
5248       open_char = '[';
5249       close_char = ']';
5250       separator_char = '+';
5251       scale_char = '*';
5252     }
5253   else
5254     {
5255       names64 = att_names64;
5256       names32 = att_names32;
5257       names16 = att_names16;
5258       names8 = att_names8;
5259       names8rex = att_names8rex;
5260       names_seg = att_names_seg;
5261       index64 = att_index64;
5262       index32 = att_index32;
5263       index16 = att_index16;
5264       open_char = '(';
5265       close_char =  ')';
5266       separator_char = ',';
5267       scale_char = ',';
5268     }
5269
5270   /* The output looks better if we put 7 bytes on a line, since that
5271      puts most long word instructions on a single line.  */
5272   info->bytes_per_line = 7;
5273
5274   info->private_data = &priv;
5275   priv.max_fetched = priv.the_buffer;
5276   priv.insn_start = pc;
5277
5278   obuf[0] = 0;
5279   for (i = 0; i < MAX_OPERANDS; ++i)
5280     {
5281       op_out[i][0] = 0;
5282       op_index[i] = -1;
5283     }
5284
5285   the_info = info;
5286   start_pc = pc;
5287   start_codep = priv.the_buffer;
5288   codep = priv.the_buffer;
5289
5290   if (setjmp (priv.bailout) != 0)
5291     {
5292       const char *name;
5293
5294       /* Getting here means we tried for data but didn't get it.  That
5295          means we have an incomplete instruction of some sort.  Just
5296          print the first byte as a prefix or a .byte pseudo-op.  */
5297       if (codep > priv.the_buffer)
5298         {
5299           name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
5300           if (name != NULL)
5301             (*info->fprintf_func) (info->stream, "%s", name);
5302           else
5303             {
5304               /* Just print the first byte as a .byte instruction.  */
5305               (*info->fprintf_func) (info->stream, ".byte 0x%x",
5306                                      (unsigned int) priv.the_buffer[0]);
5307             }
5308
5309           return 1;
5310         }
5311
5312       return -1;
5313     }
5314
5315   obufp = obuf;
5316   ckprefix ();
5317
5318   insn_codep = codep;
5319   sizeflag = priv.orig_sizeflag;
5320
5321   FETCH_DATA (info, codep + 1);
5322   two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
5323
5324   if (((prefixes & PREFIX_FWAIT)
5325        && ((*codep < 0xd8) || (*codep > 0xdf)))
5326       || (rex && rex_used))
5327     {
5328       const char *name;
5329
5330       /* fwait not followed by floating point instruction, or rex followed
5331          by other prefixes.  Print the first prefix.  */
5332       name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
5333       if (name == NULL)
5334         name = INTERNAL_DISASSEMBLER_ERROR;
5335       (*info->fprintf_func) (info->stream, "%s", name);
5336       return 1;
5337     }
5338
5339   op = 0;
5340   if (*codep == 0x0f)
5341     {
5342       unsigned char threebyte;
5343       FETCH_DATA (info, codep + 2);
5344       threebyte = *++codep;
5345       dp = &dis386_twobyte[threebyte];
5346       need_modrm = twobyte_has_modrm[*codep];
5347       codep++;
5348     }
5349   else
5350     {
5351       dp = &dis386[*codep];
5352       need_modrm = onebyte_has_modrm[*codep];
5353       codep++;
5354     }
5355
5356   if ((prefixes & PREFIX_REPZ))
5357     {
5358       repz_prefix = "repz ";
5359       used_prefixes |= PREFIX_REPZ;
5360     }
5361   else
5362     repz_prefix = NULL;
5363
5364   if ((prefixes & PREFIX_REPNZ))
5365     {
5366       repnz_prefix = "repnz ";
5367       used_prefixes |= PREFIX_REPNZ;
5368     }
5369   else
5370     repnz_prefix = NULL;
5371
5372   if ((prefixes & PREFIX_LOCK))
5373     {
5374       lock_prefix = "lock ";
5375       used_prefixes |= PREFIX_LOCK;
5376     }
5377   else
5378     lock_prefix = NULL;
5379
5380   addr_prefix = NULL;
5381   if (prefixes & PREFIX_ADDR)
5382     {
5383       sizeflag ^= AFLAG;
5384       if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
5385         {
5386           if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5387             addr_prefix = "addr32 ";
5388           else
5389             addr_prefix = "addr16 ";
5390           used_prefixes |= PREFIX_ADDR;
5391         }
5392     }
5393
5394   data_prefix = NULL;
5395   if ((prefixes & PREFIX_DATA))
5396     {
5397       sizeflag ^= DFLAG;
5398       if (dp->op[2].bytemode == cond_jump_mode
5399           && dp->op[0].bytemode == v_mode
5400           && !intel_syntax)
5401         {
5402           if (sizeflag & DFLAG)
5403             data_prefix = "data32 ";
5404           else
5405             data_prefix = "data16 ";
5406           used_prefixes |= PREFIX_DATA;
5407         }
5408     }
5409
5410   if (need_modrm)
5411     {
5412       FETCH_DATA (info, codep + 1);
5413       modrm.mod = (*codep >> 6) & 3;
5414       modrm.reg = (*codep >> 3) & 7;
5415       modrm.rm = *codep & 7;
5416     }
5417
5418   if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
5419     {
5420       dofloat (sizeflag);
5421     }
5422   else
5423     {
5424       dp = get_valid_dis386 (dp, info);
5425       if (dp != NULL && putop (dp->name, sizeflag) == 0)
5426         {
5427           for (i = 0; i < MAX_OPERANDS; ++i)
5428             {
5429               obufp = op_out[i];
5430               op_ad = MAX_OPERANDS - 1 - i;
5431               if (dp->op[i].rtn)
5432                 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
5433             }
5434         }
5435     }
5436
5437   /* See if any prefixes were not used.  If so, print the first one
5438      separately.  If we don't do this, we'll wind up printing an
5439      instruction stream which does not precisely correspond to the
5440      bytes we are disassembling.  */
5441   if ((prefixes & ~used_prefixes) != 0)
5442     {
5443       const char *name;
5444
5445       name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
5446       if (name == NULL)
5447         name = INTERNAL_DISASSEMBLER_ERROR;
5448       (*info->fprintf_func) (info->stream, "%s", name);
5449       return 1;
5450     }
5451   if (rex & ~rex_used)
5452     {
5453       const char *name;
5454       name = prefix_name (rex | 0x40, priv.orig_sizeflag);
5455       if (name == NULL)
5456         name = INTERNAL_DISASSEMBLER_ERROR;
5457       (*info->fprintf_func) (info->stream, "%s ", name);
5458     }
5459
5460   prefix_obuf[0] = 0;
5461   prefix_obufp = prefix_obuf;
5462   if (lock_prefix)
5463     prefix_obufp = stpcpy (prefix_obufp, lock_prefix);
5464   if (repz_prefix)
5465     prefix_obufp = stpcpy (prefix_obufp, repz_prefix);
5466   if (repnz_prefix)
5467     prefix_obufp = stpcpy (prefix_obufp, repnz_prefix);
5468   if (addr_prefix)
5469     prefix_obufp = stpcpy (prefix_obufp, addr_prefix);
5470   if (data_prefix)
5471     prefix_obufp = stpcpy (prefix_obufp, data_prefix);
5472
5473   if (prefix_obuf[0] != 0)
5474     (*info->fprintf_func) (info->stream, "%s", prefix_obuf);
5475
5476   obufp = obuf + strlen (obuf);
5477   for (i = strlen (obuf) + strlen (prefix_obuf); i < 6; i++)
5478     oappend (" ");
5479   oappend (" ");
5480   (*info->fprintf_func) (info->stream, "%s", obuf);
5481
5482   /* The enter and bound instructions are printed with operands in the same
5483      order as the intel book; everything else is printed in reverse order.  */
5484   if (intel_syntax || two_source_ops)
5485     {
5486       bfd_vma riprel;
5487
5488       for (i = 0; i < MAX_OPERANDS; ++i)
5489         op_txt[i] = op_out[i];
5490
5491       for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
5492         {
5493           op_ad = op_index[i];
5494           op_index[i] = op_index[MAX_OPERANDS - 1 - i];
5495           op_index[MAX_OPERANDS - 1 - i] = op_ad;
5496           riprel = op_riprel[i];
5497           op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
5498           op_riprel[MAX_OPERANDS - 1 - i] = riprel;
5499         }
5500     }
5501   else
5502     {
5503       for (i = 0; i < MAX_OPERANDS; ++i)
5504         op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
5505     }
5506
5507   needcomma = 0;
5508   for (i = 0; i < MAX_OPERANDS; ++i)
5509     if (*op_txt[i])
5510       {
5511         if (needcomma)
5512           (*info->fprintf_func) (info->stream, ",");
5513         if (op_index[i] != -1 && !op_riprel[i])
5514           (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
5515         else
5516           (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
5517         needcomma = 1;
5518       }
5519
5520   for (i = 0; i < MAX_OPERANDS; i++)
5521     if (op_index[i] != -1 && op_riprel[i])
5522       {
5523         (*info->fprintf_func) (info->stream, "        # ");
5524         (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
5525                                                 + op_address[op_index[i]]), info);
5526         break;
5527       }
5528   return codep - priv.the_buffer;
5529 }
5530
5531 static const char *float_mem[] = {
5532   /* d8 */
5533   "fadd{s|}",
5534   "fmul{s|}",
5535   "fcom{s|}",
5536   "fcomp{s|}",
5537   "fsub{s|}",
5538   "fsubr{s|}",
5539   "fdiv{s|}",
5540   "fdivr{s|}",
5541   /* d9 */
5542   "fld{s|}",
5543   "(bad)",
5544   "fst{s|}",
5545   "fstp{s|}",
5546   "fldenvIC",
5547   "fldcw",
5548   "fNstenvIC",
5549   "fNstcw",
5550   /* da */
5551   "fiadd{l|}",
5552   "fimul{l|}",
5553   "ficom{l|}",
5554   "ficomp{l|}",
5555   "fisub{l|}",
5556   "fisubr{l|}",
5557   "fidiv{l|}",
5558   "fidivr{l|}",
5559   /* db */
5560   "fild{l|}",
5561   "fisttp{l|}",
5562   "fist{l|}",
5563   "fistp{l|}",
5564   "(bad)",
5565   "fld{t||t|}",
5566   "(bad)",
5567   "fstp{t||t|}",
5568   /* dc */
5569   "fadd{l|}",
5570   "fmul{l|}",
5571   "fcom{l|}",
5572   "fcomp{l|}",
5573   "fsub{l|}",
5574   "fsubr{l|}",
5575   "fdiv{l|}",
5576   "fdivr{l|}",
5577   /* dd */
5578   "fld{l|}",
5579   "fisttp{ll|}",
5580   "fst{l||}",
5581   "fstp{l|}",
5582   "frstorIC",
5583   "(bad)",
5584   "fNsaveIC",
5585   "fNstsw",
5586   /* de */
5587   "fiadd",
5588   "fimul",
5589   "ficom",
5590   "ficomp",
5591   "fisub",
5592   "fisubr",
5593   "fidiv",
5594   "fidivr",
5595   /* df */
5596   "fild",
5597   "fisttp",
5598   "fist",
5599   "fistp",
5600   "fbld",
5601   "fild{ll|}",
5602   "fbstp",
5603   "fistp{ll|}",
5604 };
5605
5606 static const unsigned char float_mem_mode[] = {
5607   /* d8 */
5608   d_mode,
5609   d_mode,
5610   d_mode,
5611   d_mode,
5612   d_mode,
5613   d_mode,
5614   d_mode,
5615   d_mode,
5616   /* d9 */
5617   d_mode,
5618   0,
5619   d_mode,
5620   d_mode,
5621   0,
5622   w_mode,
5623   0,
5624   w_mode,
5625   /* da */
5626   d_mode,
5627   d_mode,
5628   d_mode,
5629   d_mode,
5630   d_mode,
5631   d_mode,
5632   d_mode,
5633   d_mode,
5634   /* db */
5635   d_mode,
5636   d_mode,
5637   d_mode,
5638   d_mode,
5639   0,
5640   t_mode,
5641   0,
5642   t_mode,
5643   /* dc */
5644   q_mode,
5645   q_mode,
5646   q_mode,
5647   q_mode,
5648   q_mode,
5649   q_mode,
5650   q_mode,
5651   q_mode,
5652   /* dd */
5653   q_mode,
5654   q_mode,
5655   q_mode,
5656   q_mode,
5657   0,
5658   0,
5659   0,
5660   w_mode,
5661   /* de */
5662   w_mode,
5663   w_mode,
5664   w_mode,
5665   w_mode,
5666   w_mode,
5667   w_mode,
5668   w_mode,
5669   w_mode,
5670   /* df */
5671   w_mode,
5672   w_mode,
5673   w_mode,
5674   w_mode,
5675   t_mode,
5676   q_mode,
5677   t_mode,
5678   q_mode
5679 };
5680
5681 #define ST { OP_ST, 0 }
5682 #define STi { OP_STi, 0 }
5683
5684 #define FGRPd9_2 NULL, { { NULL, 0 } }
5685 #define FGRPd9_4 NULL, { { NULL, 1 } }
5686 #define FGRPd9_5 NULL, { { NULL, 2 } }
5687 #define FGRPd9_6 NULL, { { NULL, 3 } }
5688 #define FGRPd9_7 NULL, { { NULL, 4 } }
5689 #define FGRPda_5 NULL, { { NULL, 5 } }
5690 #define FGRPdb_4 NULL, { { NULL, 6 } }
5691 #define FGRPde_3 NULL, { { NULL, 7 } }
5692 #define FGRPdf_4 NULL, { { NULL, 8 } }
5693
5694 static const struct dis386 float_reg[][8] = {
5695   /* d8 */
5696   {
5697     { "fadd",   { ST, STi } },
5698     { "fmul",   { ST, STi } },
5699     { "fcom",   { STi } },
5700     { "fcomp",  { STi } },
5701     { "fsub",   { ST, STi } },
5702     { "fsubr",  { ST, STi } },
5703     { "fdiv",   { ST, STi } },
5704     { "fdivr",  { ST, STi } },
5705   },
5706   /* d9 */
5707   {
5708     { "fld",    { STi } },
5709     { "fxch",   { STi } },
5710     { FGRPd9_2 },
5711     { "(bad)",  { XX } },
5712     { FGRPd9_4 },
5713     { FGRPd9_5 },
5714     { FGRPd9_6 },
5715     { FGRPd9_7 },
5716   },
5717   /* da */
5718   {
5719     { "fcmovb", { ST, STi } },
5720     { "fcmove", { ST, STi } },
5721     { "fcmovbe",{ ST, STi } },
5722     { "fcmovu", { ST, STi } },
5723     { "(bad)",  { XX } },
5724     { FGRPda_5 },
5725     { "(bad)",  { XX } },
5726     { "(bad)",  { XX } },
5727   },
5728   /* db */
5729   {
5730     { "fcmovnb",{ ST, STi } },
5731     { "fcmovne",{ ST, STi } },
5732     { "fcmovnbe",{ ST, STi } },
5733     { "fcmovnu",{ ST, STi } },
5734     { FGRPdb_4 },
5735     { "fucomi", { ST, STi } },
5736     { "fcomi",  { ST, STi } },
5737     { "(bad)",  { XX } },
5738   },
5739   /* dc */
5740   {
5741     { "fadd",   { STi, ST } },
5742     { "fmul",   { STi, ST } },
5743     { "(bad)",  { XX } },
5744     { "(bad)",  { XX } },
5745 #if SYSV386_COMPAT
5746     { "fsub",   { STi, ST } },
5747     { "fsubr",  { STi, ST } },
5748     { "fdiv",   { STi, ST } },
5749     { "fdivr",  { STi, ST } },
5750 #else
5751     { "fsubr",  { STi, ST } },
5752     { "fsub",   { STi, ST } },
5753     { "fdivr",  { STi, ST } },
5754     { "fdiv",   { STi, ST } },
5755 #endif
5756   },
5757   /* dd */
5758   {
5759     { "ffree",  { STi } },
5760     { "(bad)",  { XX } },
5761     { "fst",    { STi } },
5762     { "fstp",   { STi } },
5763     { "fucom",  { STi } },
5764     { "fucomp", { STi } },
5765     { "(bad)",  { XX } },
5766     { "(bad)",  { XX } },
5767   },
5768   /* de */
5769   {
5770     { "faddp",  { STi, ST } },
5771     { "fmulp",  { STi, ST } },
5772     { "(bad)",  { XX } },
5773     { FGRPde_3 },
5774 #if SYSV386_COMPAT
5775     { "fsubp",  { STi, ST } },
5776     { "fsubrp", { STi, ST } },
5777     { "fdivp",  { STi, ST } },
5778     { "fdivrp", { STi, ST } },
5779 #else
5780     { "fsubrp", { STi, ST } },
5781     { "fsubp",  { STi, ST } },
5782     { "fdivrp", { STi, ST } },
5783     { "fdivp",  { STi, ST } },
5784 #endif
5785   },
5786   /* df */
5787   {
5788     { "ffreep", { STi } },
5789     { "(bad)",  { XX } },
5790     { "(bad)",  { XX } },
5791     { "(bad)",  { XX } },
5792     { FGRPdf_4 },
5793     { "fucomip", { ST, STi } },
5794     { "fcomip", { ST, STi } },
5795     { "(bad)",  { XX } },
5796   },
5797 };
5798
5799 static char *fgrps[][8] = {
5800   /* d9_2  0 */
5801   {
5802     "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5803   },
5804
5805   /* d9_4  1 */
5806   {
5807     "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
5808   },
5809
5810   /* d9_5  2 */
5811   {
5812     "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
5813   },
5814
5815   /* d9_6  3 */
5816   {
5817     "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
5818   },
5819
5820   /* d9_7  4 */
5821   {
5822     "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
5823   },
5824
5825   /* da_5  5 */
5826   {
5827     "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5828   },
5829
5830   /* db_4  6 */
5831   {
5832     "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
5833     "fNsetpm(287 only)","(bad)","(bad)","(bad)",
5834   },
5835
5836   /* de_3  7 */
5837   {
5838     "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5839   },
5840
5841   /* df_4  8 */
5842   {
5843     "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
5844   },
5845 };
5846
5847 static void
5848 OP_Skip_MODRM (int bytemode ATTRIBUTE_UNUSED,
5849                int sizeflag ATTRIBUTE_UNUSED)
5850 {
5851   /* Skip mod/rm byte.  */
5852   MODRM_CHECK;
5853   codep++;
5854 }
5855
5856 static void
5857 dofloat (int sizeflag)
5858 {
5859   const struct dis386 *dp;
5860   unsigned char floatop;
5861
5862   floatop = codep[-1];
5863
5864   if (modrm.mod != 3)
5865     {
5866       int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
5867
5868       putop (float_mem[fp_indx], sizeflag);
5869       obufp = op_out[0];
5870       op_ad = 2;
5871       OP_E (float_mem_mode[fp_indx], sizeflag);
5872       return;
5873     }
5874   /* Skip mod/rm byte.  */
5875   MODRM_CHECK;
5876   codep++;
5877
5878   dp = &float_reg[floatop - 0xd8][modrm.reg];
5879   if (dp->name == NULL)
5880     {
5881       putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
5882
5883       /* Instruction fnstsw is only one with strange arg.  */
5884       if (floatop == 0xdf && codep[-1] == 0xe0)
5885         strcpy (op_out[0], names16[0]);
5886     }
5887   else
5888     {
5889       putop (dp->name, sizeflag);
5890
5891       obufp = op_out[0];
5892       op_ad = 2;
5893       if (dp->op[0].rtn)
5894         (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
5895
5896       obufp = op_out[1];
5897       op_ad = 1;
5898       if (dp->op[1].rtn)
5899         (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
5900     }
5901 }
5902
5903 static void
5904 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5905 {
5906   oappend ("%st" + intel_syntax);
5907 }
5908
5909 static void
5910 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5911 {
5912   sprintf (scratchbuf, "%%st(%d)", modrm.rm);
5913   oappend (scratchbuf + intel_syntax);
5914 }
5915
5916 /* Capital letters in template are macros.  */
5917 static int
5918 putop (const char *template, int sizeflag)
5919 {
5920   const char *p;
5921   int alt = 0;
5922
5923   for (p = template; *p; p++)
5924     {
5925       switch (*p)
5926         {
5927         default:
5928           *obufp++ = *p;
5929           break;
5930         case '{':
5931           alt = 0;
5932           if (intel_syntax)
5933             {
5934               while (*++p != '|')
5935                 if (*p == '}' || *p == '\0')
5936                   abort ();
5937             }
5938           /* Fall through.  */
5939         case 'I':
5940           alt = 1;
5941           continue;
5942         case '|':
5943           while (*++p != '}')
5944             {
5945               if (*p == '\0')
5946                 abort ();
5947             }
5948           break;
5949         case '}':
5950           break;
5951         case 'A':
5952           if (intel_syntax)
5953             break;
5954           if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
5955             *obufp++ = 'b';
5956           break;
5957         case 'B':
5958           if (intel_syntax)
5959             break;
5960           if (sizeflag & SUFFIX_ALWAYS)
5961             *obufp++ = 'b';
5962           break;
5963         case 'C':
5964           if (intel_syntax && !alt)
5965             break;
5966           if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
5967             {
5968               if (sizeflag & DFLAG)
5969                 *obufp++ = intel_syntax ? 'd' : 'l';
5970               else
5971                 *obufp++ = intel_syntax ? 'w' : 's';
5972               used_prefixes |= (prefixes & PREFIX_DATA);
5973             }
5974           break;
5975         case 'D':
5976           if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
5977             break;
5978           USED_REX (REX_W);
5979           if (modrm.mod == 3)
5980             {
5981               if (rex & REX_W)
5982                 *obufp++ = 'q';
5983               else if (sizeflag & DFLAG)
5984                 *obufp++ = intel_syntax ? 'd' : 'l';
5985               else
5986                 *obufp++ = 'w';
5987               used_prefixes |= (prefixes & PREFIX_DATA);
5988             }
5989           else
5990             *obufp++ = 'w';
5991           break;
5992         case 'E':               /* For jcxz/jecxz */
5993           if (address_mode == mode_64bit)
5994             {
5995               if (sizeflag & AFLAG)
5996                 *obufp++ = 'r';
5997               else
5998                 *obufp++ = 'e';
5999             }
6000           else
6001             if (sizeflag & AFLAG)
6002               *obufp++ = 'e';
6003           used_prefixes |= (prefixes & PREFIX_ADDR);
6004           break;
6005         case 'F':
6006           if (intel_syntax)
6007             break;
6008           if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
6009             {
6010               if (sizeflag & AFLAG)
6011                 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
6012               else
6013                 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
6014               used_prefixes |= (prefixes & PREFIX_ADDR);
6015             }
6016           break;
6017         case 'G':
6018           if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
6019             break;
6020           if ((rex & REX_W) || (sizeflag & DFLAG))
6021             *obufp++ = 'l';
6022           else
6023             *obufp++ = 'w';
6024           if (!(rex & REX_W))
6025             used_prefixes |= (prefixes & PREFIX_DATA);
6026           break;
6027         case 'H':
6028           if (intel_syntax)
6029             break;
6030           if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
6031               || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
6032             {
6033               used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
6034               *obufp++ = ',';
6035               *obufp++ = 'p';
6036               if (prefixes & PREFIX_DS)
6037                 *obufp++ = 't';
6038               else
6039                 *obufp++ = 'n';
6040             }
6041           break;
6042         case 'J':
6043           if (intel_syntax)
6044             break;
6045           *obufp++ = 'l';
6046           break;
6047         case 'K':
6048           USED_REX (REX_W);
6049           if (rex & REX_W)
6050             *obufp++ = 'q';
6051           else
6052             *obufp++ = 'd';
6053           break;
6054         case 'Z':
6055           if (intel_syntax)
6056             break;
6057           if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
6058             {
6059               *obufp++ = 'q';
6060               break;
6061             }
6062           /* Fall through.  */
6063         case 'L':
6064           if (intel_syntax)
6065             break;
6066           if (sizeflag & SUFFIX_ALWAYS)
6067             *obufp++ = 'l';
6068           break;
6069         case 'N':
6070           if ((prefixes & PREFIX_FWAIT) == 0)
6071             *obufp++ = 'n';
6072           else
6073             used_prefixes |= PREFIX_FWAIT;
6074           break;
6075         case 'O':
6076           USED_REX (REX_W);
6077           if (rex & REX_W)
6078             *obufp++ = 'o';
6079           else if (intel_syntax && (sizeflag & DFLAG))
6080             *obufp++ = 'q';
6081           else
6082             *obufp++ = 'd';
6083           if (!(rex & REX_W))
6084             used_prefixes |= (prefixes & PREFIX_DATA);
6085           break;
6086         case 'T':
6087           if (intel_syntax)
6088             break;
6089           if (address_mode == mode_64bit && (sizeflag & DFLAG))
6090             {
6091               *obufp++ = 'q';
6092               break;
6093             }
6094           /* Fall through.  */
6095         case 'P':
6096           if (intel_syntax)
6097             break;
6098           if ((prefixes & PREFIX_DATA)
6099               || (rex & REX_W)
6100               || (sizeflag & SUFFIX_ALWAYS))
6101             {
6102               USED_REX (REX_W);
6103               if (rex & REX_W)
6104                 *obufp++ = 'q';
6105               else
6106                 {
6107                    if (sizeflag & DFLAG)
6108                       *obufp++ = 'l';
6109                    else
6110                      *obufp++ = 'w';
6111                 }
6112               used_prefixes |= (prefixes & PREFIX_DATA);
6113             }
6114           break;
6115         case 'U':
6116           if (intel_syntax)
6117             break;
6118           if (address_mode == mode_64bit && (sizeflag & DFLAG))
6119             {
6120               if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
6121                 *obufp++ = 'q';
6122               break;
6123             }
6124           /* Fall through.  */
6125         case 'Q':
6126           if (intel_syntax && !alt)
6127             break;
6128           USED_REX (REX_W);
6129           if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
6130             {
6131               if (rex & REX_W)
6132                 *obufp++ = 'q';
6133               else
6134                 {
6135                   if (sizeflag & DFLAG)
6136                     *obufp++ = intel_syntax ? 'd' : 'l';
6137                   else
6138                     *obufp++ = 'w';
6139                 }
6140               used_prefixes |= (prefixes & PREFIX_DATA);
6141             }
6142           break;
6143         case 'R':
6144           USED_REX (REX_W);
6145           if (rex & REX_W)
6146             *obufp++ = 'q';
6147           else if (sizeflag & DFLAG)
6148             {
6149               if (intel_syntax)
6150                   *obufp++ = 'd';
6151               else
6152                   *obufp++ = 'l';
6153             }
6154           else
6155             *obufp++ = 'w';
6156           if (intel_syntax && !p[1]
6157               && ((rex & REX_W) || (sizeflag & DFLAG)))
6158             *obufp++ = 'e';
6159           if (!(rex & REX_W))
6160             used_prefixes |= (prefixes & PREFIX_DATA);
6161           break;
6162         case 'V':
6163           if (intel_syntax)
6164             break;
6165           if (address_mode == mode_64bit && (sizeflag & DFLAG))
6166             {
6167               if (sizeflag & SUFFIX_ALWAYS)
6168                 *obufp++ = 'q';
6169               break;
6170             }
6171           /* Fall through.  */
6172         case 'S':
6173           if (intel_syntax)
6174             break;
6175           if (sizeflag & SUFFIX_ALWAYS)
6176             {
6177               if (rex & REX_W)
6178                 *obufp++ = 'q';
6179               else
6180                 {
6181                   if (sizeflag & DFLAG)
6182                     *obufp++ = 'l';
6183                   else
6184                     *obufp++ = 'w';
6185                   used_prefixes |= (prefixes & PREFIX_DATA);
6186                 }
6187             }
6188           break;
6189         case 'X':
6190           if (prefixes & PREFIX_DATA)
6191             *obufp++ = 'd';
6192           else
6193             *obufp++ = 's';
6194           used_prefixes |= (prefixes & PREFIX_DATA);
6195           break;
6196         case 'Y':
6197           if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
6198             break;
6199           if (rex & REX_W)
6200             {
6201               USED_REX (REX_W);
6202               *obufp++ = 'q';
6203             }
6204           break;
6205           /* implicit operand size 'l' for i386 or 'q' for x86-64 */
6206         case 'W':
6207           /* operand size flag for cwtl, cbtw */
6208           USED_REX (REX_W);
6209           if (rex & REX_W)
6210             {
6211               if (intel_syntax)
6212                 *obufp++ = 'd';
6213               else
6214                 *obufp++ = 'l';
6215             }
6216           else if (sizeflag & DFLAG)
6217             *obufp++ = 'w';
6218           else
6219             *obufp++ = 'b';
6220           if (!(rex & REX_W))
6221             used_prefixes |= (prefixes & PREFIX_DATA);
6222           break;
6223         }
6224       alt = 0;
6225     }
6226   *obufp = 0;
6227   return 0;
6228 }
6229
6230 static void
6231 oappend (const char *s)
6232 {
6233   strcpy (obufp, s);
6234   obufp += strlen (s);
6235 }
6236
6237 static void
6238 append_seg (void)
6239 {
6240   if (prefixes & PREFIX_CS)
6241     {
6242       used_prefixes |= PREFIX_CS;
6243       oappend ("%cs:" + intel_syntax);
6244     }
6245   if (prefixes & PREFIX_DS)
6246     {
6247       used_prefixes |= PREFIX_DS;
6248       oappend ("%ds:" + intel_syntax);
6249     }
6250   if (prefixes & PREFIX_SS)
6251     {
6252       used_prefixes |= PREFIX_SS;
6253       oappend ("%ss:" + intel_syntax);
6254     }
6255   if (prefixes & PREFIX_ES)
6256     {
6257       used_prefixes |= PREFIX_ES;
6258       oappend ("%es:" + intel_syntax);
6259     }
6260   if (prefixes & PREFIX_FS)
6261     {
6262       used_prefixes |= PREFIX_FS;
6263       oappend ("%fs:" + intel_syntax);
6264     }
6265   if (prefixes & PREFIX_GS)
6266     {
6267       used_prefixes |= PREFIX_GS;
6268       oappend ("%gs:" + intel_syntax);
6269     }
6270 }
6271
6272 static void
6273 OP_indirE (int bytemode, int sizeflag)
6274 {
6275   if (!intel_syntax)
6276     oappend ("*");
6277   OP_E (bytemode, sizeflag);
6278 }
6279
6280 static void
6281 print_operand_value (char *buf, int hex, bfd_vma disp)
6282 {
6283   if (address_mode == mode_64bit)
6284     {
6285       if (hex)
6286         {
6287           char tmp[30];
6288           int i;
6289           buf[0] = '0';
6290           buf[1] = 'x';
6291           sprintf_vma (tmp, disp);
6292           for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
6293           strcpy (buf + 2, tmp + i);
6294         }
6295       else
6296         {
6297           bfd_signed_vma v = disp;
6298           char tmp[30];
6299           int i;
6300           if (v < 0)
6301             {
6302               *(buf++) = '-';
6303               v = -disp;
6304               /* Check for possible overflow on 0x8000000000000000.  */
6305               if (v < 0)
6306                 {
6307                   strcpy (buf, "9223372036854775808");
6308                   return;
6309                 }
6310             }
6311           if (!v)
6312             {
6313               strcpy (buf, "0");
6314               return;
6315             }
6316
6317           i = 0;
6318           tmp[29] = 0;
6319           while (v)
6320             {
6321               tmp[28 - i] = (v % 10) + '0';
6322               v /= 10;
6323               i++;
6324             }
6325           strcpy (buf, tmp + 29 - i);
6326         }
6327     }
6328   else
6329     {
6330       if (hex)
6331         sprintf (buf, "0x%x", (unsigned int) disp);
6332       else
6333         sprintf (buf, "%d", (int) disp);
6334     }
6335 }
6336
6337 /* Put DISP in BUF as signed hex number.  */
6338
6339 static void
6340 print_displacement (char *buf, bfd_vma disp)
6341 {
6342   bfd_signed_vma val = disp;
6343   char tmp[30];
6344   int i, j = 0;
6345
6346   if (val < 0)
6347     {
6348       buf[j++] = '-';
6349       val = -disp;
6350
6351       /* Check for possible overflow.  */
6352       if (val < 0)
6353         {
6354           switch (address_mode)
6355             {
6356             case mode_64bit:
6357               strcpy (buf + j, "0x8000000000000000");
6358               break;
6359             case mode_32bit:
6360               strcpy (buf + j, "0x80000000");
6361               break;
6362             case mode_16bit:
6363               strcpy (buf + j, "0x8000");
6364               break;
6365             }
6366           return;
6367         }
6368     }
6369
6370   buf[j++] = '0';
6371   buf[j++] = 'x';
6372
6373   sprintf_vma (tmp, val);
6374   for (i = 0; tmp[i] == '0'; i++)
6375     continue;
6376   if (tmp[i] == '\0')
6377     i--;
6378   strcpy (buf + j, tmp + i);
6379 }
6380
6381 static void
6382 intel_operand_size (int bytemode, int sizeflag)
6383 {
6384   switch (bytemode)
6385     {
6386     case b_mode:
6387     case dqb_mode:
6388       oappend ("BYTE PTR ");
6389       break;
6390     case w_mode:
6391     case dqw_mode:
6392       oappend ("WORD PTR ");
6393       break;
6394     case stack_v_mode:
6395       if (address_mode == mode_64bit && (sizeflag & DFLAG))
6396         {
6397           oappend ("QWORD PTR ");
6398           used_prefixes |= (prefixes & PREFIX_DATA);
6399           break;
6400         }
6401       /* FALLTHRU */
6402     case v_mode:
6403     case dq_mode:
6404       USED_REX (REX_W);
6405       if (rex & REX_W)
6406         oappend ("QWORD PTR ");
6407       else if ((sizeflag & DFLAG) || bytemode == dq_mode)
6408         oappend ("DWORD PTR ");
6409       else
6410         oappend ("WORD PTR ");
6411       used_prefixes |= (prefixes & PREFIX_DATA);
6412       break;
6413     case z_mode:
6414       if ((rex & REX_W) || (sizeflag & DFLAG))
6415         *obufp++ = 'D';
6416       oappend ("WORD PTR ");
6417       if (!(rex & REX_W))
6418         used_prefixes |= (prefixes & PREFIX_DATA);
6419       break;
6420     case d_mode:
6421     case dqd_mode:
6422       oappend ("DWORD PTR ");
6423       break;
6424     case q_mode:
6425       oappend ("QWORD PTR ");
6426       break;
6427     case m_mode:
6428       if (address_mode == mode_64bit)
6429         oappend ("QWORD PTR ");
6430       else
6431         oappend ("DWORD PTR ");
6432       break;
6433     case f_mode:
6434       if (sizeflag & DFLAG)
6435         oappend ("FWORD PTR ");
6436       else
6437         oappend ("DWORD PTR ");
6438       used_prefixes |= (prefixes & PREFIX_DATA);
6439       break;
6440     case t_mode:
6441       oappend ("TBYTE PTR ");
6442       break;
6443     case x_mode:
6444       oappend ("XMMWORD PTR ");
6445       break;
6446     case o_mode:
6447       oappend ("OWORD PTR ");
6448       break;
6449     default:
6450       break;
6451     }
6452 }
6453
6454 static void
6455 OP_E_extended (int bytemode, int sizeflag, int has_drex)
6456 {
6457   bfd_vma disp;
6458   int add = 0;
6459   int riprel = 0;
6460   USED_REX (REX_B);
6461   if (rex & REX_B)
6462     add += 8;
6463
6464   /* Skip mod/rm byte.  */
6465   MODRM_CHECK;
6466   codep++;
6467
6468   if (modrm.mod == 3)
6469     {
6470       switch (bytemode)
6471         {
6472         case b_mode:
6473           USED_REX (0);
6474           if (rex)
6475             oappend (names8rex[modrm.rm + add]);
6476           else
6477             oappend (names8[modrm.rm + add]);
6478           break;
6479         case w_mode:
6480           oappend (names16[modrm.rm + add]);
6481           break;
6482         case d_mode:
6483           oappend (names32[modrm.rm + add]);
6484           break;
6485         case q_mode:
6486           oappend (names64[modrm.rm + add]);
6487           break;
6488         case m_mode:
6489           if (address_mode == mode_64bit)
6490             oappend (names64[modrm.rm + add]);
6491           else
6492             oappend (names32[modrm.rm + add]);
6493           break;
6494         case stack_v_mode:
6495           if (address_mode == mode_64bit && (sizeflag & DFLAG))
6496             {
6497               oappend (names64[modrm.rm + add]);
6498               used_prefixes |= (prefixes & PREFIX_DATA);
6499               break;
6500             }
6501           bytemode = v_mode;
6502           /* FALLTHRU */
6503         case v_mode:
6504         case dq_mode:
6505         case dqb_mode:
6506         case dqd_mode:
6507         case dqw_mode:
6508           USED_REX (REX_W);
6509           if (rex & REX_W)
6510             oappend (names64[modrm.rm + add]);
6511           else if ((sizeflag & DFLAG) || bytemode != v_mode)
6512             oappend (names32[modrm.rm + add]);
6513           else
6514             oappend (names16[modrm.rm + add]);
6515           used_prefixes |= (prefixes & PREFIX_DATA);
6516           break;
6517         case 0:
6518           break;
6519         default:
6520           oappend (INTERNAL_DISASSEMBLER_ERROR);
6521           break;
6522         }
6523       return;
6524     }
6525
6526   disp = 0;
6527   if (intel_syntax)
6528     intel_operand_size (bytemode, sizeflag);
6529   append_seg ();
6530
6531   if ((sizeflag & AFLAG) || address_mode == mode_64bit)
6532     {
6533       /* 32/64 bit address mode */
6534       int havedisp;
6535       int havesib;
6536       int havebase;
6537       int haveindex;
6538       int needindex;
6539       int base;
6540       int index = 0;
6541       int scale = 0;
6542
6543       havesib = 0;
6544       havebase = 1;
6545       haveindex = 0;
6546       base = modrm.rm;
6547
6548       if (base == 4)
6549         {
6550           havesib = 1;
6551           FETCH_DATA (the_info, codep + 1);
6552           index = (*codep >> 3) & 7;
6553           scale = (*codep >> 6) & 3;
6554           base = *codep & 7;
6555           USED_REX (REX_X);
6556           if (rex & REX_X)
6557             index += 8;
6558           haveindex = index != 4;
6559           codep++;
6560         }
6561       base += add;
6562
6563       /* If we have a DREX byte, skip it now
6564          (it has already been handled) */
6565       if (has_drex)
6566         {
6567           FETCH_DATA (the_info, codep + 1);
6568           codep++;
6569         }
6570
6571       switch (modrm.mod)
6572         {
6573         case 0:
6574           if ((base & 7) == 5)
6575             {
6576               havebase = 0;
6577               if (address_mode == mode_64bit && !havesib)
6578                 riprel = 1;
6579               disp = get32s ();
6580             }
6581           break;
6582         case 1:
6583           FETCH_DATA (the_info, codep + 1);
6584           disp = *codep++;
6585           if ((disp & 0x80) != 0)
6586             disp -= 0x100;
6587           break;
6588         case 2:
6589           disp = get32s ();
6590           break;
6591         }
6592
6593       /* In 32bit mode, we need index register to tell [offset] from
6594          [eiz*1 + offset].  */
6595       needindex = (havesib
6596                    && !havebase
6597                    && !haveindex
6598                    && address_mode == mode_32bit);
6599       havedisp = (havebase
6600                   || needindex
6601                   || (havesib && (haveindex || scale != 0)));
6602
6603       if (!intel_syntax)
6604         if (modrm.mod != 0 || (base & 7) == 5)
6605           {
6606             if (havedisp || riprel)
6607               print_displacement (scratchbuf, disp);
6608             else
6609               print_operand_value (scratchbuf, 1, disp);
6610             oappend (scratchbuf);
6611             if (riprel)
6612               {
6613                 set_op (disp, 1);
6614                 oappend (sizeflag & AFLAG ? "(%rip)" : "(%eip)");
6615               }
6616           }
6617
6618       if (havebase || haveindex || riprel)
6619         used_prefixes |= PREFIX_ADDR;
6620
6621       if (havedisp || (intel_syntax && riprel))
6622         {
6623           *obufp++ = open_char;
6624           if (intel_syntax && riprel)
6625             {
6626               set_op (disp, 1);
6627               oappend (sizeflag & AFLAG ? "rip" : "eip");
6628             }
6629           *obufp = '\0';
6630           if (havebase)
6631             oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
6632                      ? names64[base] : names32[base]);
6633           if (havesib)
6634             {
6635               /* ESP/RSP won't allow index.  If base isn't ESP/RSP,
6636                  print index to tell base + index from base.  */
6637               if (scale != 0
6638                   || needindex
6639                   || haveindex
6640                   || (havebase && base != ESP_REG_NUM))
6641                 {
6642                   if (!intel_syntax || havebase)
6643                     {
6644                       *obufp++ = separator_char;
6645                       *obufp = '\0';
6646                     }
6647                   if (haveindex)
6648                     oappend (address_mode == mode_64bit
6649                              && (sizeflag & AFLAG)
6650                              ? names64[index] : names32[index]);
6651                   else
6652                     oappend (address_mode == mode_64bit
6653                              && (sizeflag & AFLAG)
6654                              ? index64 : index32);
6655
6656                   *obufp++ = scale_char;
6657                   *obufp = '\0';
6658                   sprintf (scratchbuf, "%d", 1 << scale);
6659                   oappend (scratchbuf);
6660                 }
6661             }
6662           if (intel_syntax
6663               && (disp || modrm.mod != 0 || (base & 7) == 5))
6664             {
6665               if (!havedisp || (bfd_signed_vma) disp >= 0)
6666                 {
6667                   *obufp++ = '+';
6668                   *obufp = '\0';
6669                 }
6670               else if (modrm.mod != 1)
6671                 {
6672                   *obufp++ = '-';
6673                   *obufp = '\0';
6674                   disp = - (bfd_signed_vma) disp;
6675                 }
6676
6677               if (havedisp)
6678                 print_displacement (scratchbuf, disp);
6679               else
6680                 print_operand_value (scratchbuf, 1, disp);
6681               oappend (scratchbuf);
6682             }
6683
6684           *obufp++ = close_char;
6685           *obufp = '\0';
6686         }
6687       else if (intel_syntax)
6688         {
6689           if (modrm.mod != 0 || (base & 7) == 5)
6690             {
6691               if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
6692                               | PREFIX_ES | PREFIX_FS | PREFIX_GS))
6693                 ;
6694               else
6695                 {
6696                   oappend (names_seg[ds_reg - es_reg]);
6697                   oappend (":");
6698                 }
6699               print_operand_value (scratchbuf, 1, disp);
6700               oappend (scratchbuf);
6701             }
6702         }
6703     }
6704   else
6705     { /* 16 bit address mode */
6706       switch (modrm.mod)
6707         {
6708         case 0:
6709           if (modrm.rm == 6)
6710             {
6711               disp = get16 ();
6712               if ((disp & 0x8000) != 0)
6713                 disp -= 0x10000;
6714             }
6715           break;
6716         case 1:
6717           FETCH_DATA (the_info, codep + 1);
6718           disp = *codep++;
6719           if ((disp & 0x80) != 0)
6720             disp -= 0x100;
6721           break;
6722         case 2:
6723           disp = get16 ();
6724           if ((disp & 0x8000) != 0)
6725             disp -= 0x10000;
6726           break;
6727         }
6728
6729       if (!intel_syntax)
6730         if (modrm.mod != 0 || modrm.rm == 6)
6731           {
6732             print_displacement (scratchbuf, disp);
6733             oappend (scratchbuf);
6734           }
6735
6736       if (modrm.mod != 0 || modrm.rm != 6)
6737         {
6738           *obufp++ = open_char;
6739           *obufp = '\0';
6740           oappend (index16[modrm.rm]);
6741           if (intel_syntax
6742               && (disp || modrm.mod != 0 || modrm.rm == 6))
6743             {
6744               if ((bfd_signed_vma) disp >= 0)
6745                 {
6746                   *obufp++ = '+';
6747                   *obufp = '\0';
6748                 }
6749               else if (modrm.mod != 1)
6750                 {
6751                   *obufp++ = '-';
6752                   *obufp = '\0';
6753                   disp = - (bfd_signed_vma) disp;
6754                 }
6755
6756               print_displacement (scratchbuf, disp);
6757               oappend (scratchbuf);
6758             }
6759
6760           *obufp++ = close_char;
6761           *obufp = '\0';
6762         }
6763       else if (intel_syntax)
6764         {
6765           if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
6766                           | PREFIX_ES | PREFIX_FS | PREFIX_GS))
6767             ;
6768           else
6769             {
6770               oappend (names_seg[ds_reg - es_reg]);
6771               oappend (":");
6772             }
6773           print_operand_value (scratchbuf, 1, disp & 0xffff);
6774           oappend (scratchbuf);
6775         }
6776     }
6777 }
6778
6779 static void
6780 OP_E (int bytemode, int sizeflag)
6781 {
6782   OP_E_extended (bytemode, sizeflag, 0);
6783 }
6784
6785
6786 static void
6787 OP_G (int bytemode, int sizeflag)
6788 {
6789   int add = 0;
6790   USED_REX (REX_R);
6791   if (rex & REX_R)
6792     add += 8;
6793   switch (bytemode)
6794     {
6795     case b_mode:
6796       USED_REX (0);
6797       if (rex)
6798         oappend (names8rex[modrm.reg + add]);
6799       else
6800         oappend (names8[modrm.reg + add]);
6801       break;
6802     case w_mode:
6803       oappend (names16[modrm.reg + add]);
6804       break;
6805     case d_mode:
6806       oappend (names32[modrm.reg + add]);
6807       break;
6808     case q_mode:
6809       oappend (names64[modrm.reg + add]);
6810       break;
6811     case v_mode:
6812     case dq_mode:
6813     case dqb_mode:
6814     case dqd_mode:
6815     case dqw_mode:
6816       USED_REX (REX_W);
6817       if (rex & REX_W)
6818         oappend (names64[modrm.reg + add]);
6819       else if ((sizeflag & DFLAG) || bytemode != v_mode)
6820         oappend (names32[modrm.reg + add]);
6821       else
6822         oappend (names16[modrm.reg + add]);
6823       used_prefixes |= (prefixes & PREFIX_DATA);
6824       break;
6825     case m_mode:
6826       if (address_mode == mode_64bit)
6827         oappend (names64[modrm.reg + add]);
6828       else
6829         oappend (names32[modrm.reg + add]);
6830       break;
6831     default:
6832       oappend (INTERNAL_DISASSEMBLER_ERROR);
6833       break;
6834     }
6835 }
6836
6837 static bfd_vma
6838 get64 (void)
6839 {
6840   bfd_vma x;
6841 #ifdef BFD64
6842   unsigned int a;
6843   unsigned int b;
6844
6845   FETCH_DATA (the_info, codep + 8);
6846   a = *codep++ & 0xff;
6847   a |= (*codep++ & 0xff) << 8;
6848   a |= (*codep++ & 0xff) << 16;
6849   a |= (*codep++ & 0xff) << 24;
6850   b = *codep++ & 0xff;
6851   b |= (*codep++ & 0xff) << 8;
6852   b |= (*codep++ & 0xff) << 16;
6853   b |= (*codep++ & 0xff) << 24;
6854   x = a + ((bfd_vma) b << 32);
6855 #else
6856   abort ();
6857   x = 0;
6858 #endif
6859   return x;
6860 }
6861
6862 static bfd_signed_vma
6863 get32 (void)
6864 {
6865   bfd_signed_vma x = 0;
6866
6867   FETCH_DATA (the_info, codep + 4);
6868   x = *codep++ & (bfd_signed_vma) 0xff;
6869   x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
6870   x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
6871   x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
6872   return x;
6873 }
6874
6875 static bfd_signed_vma
6876 get32s (void)
6877 {
6878   bfd_signed_vma x = 0;
6879
6880   FETCH_DATA (the_info, codep + 4);
6881   x = *codep++ & (bfd_signed_vma) 0xff;
6882   x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
6883   x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
6884   x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
6885
6886   x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
6887
6888   return x;
6889 }
6890
6891 static int
6892 get16 (void)
6893 {
6894   int x = 0;
6895
6896   FETCH_DATA (the_info, codep + 2);
6897   x = *codep++ & 0xff;
6898   x |= (*codep++ & 0xff) << 8;
6899   return x;
6900 }
6901
6902 static void
6903 set_op (bfd_vma op, int riprel)
6904 {
6905   op_index[op_ad] = op_ad;
6906   if (address_mode == mode_64bit)
6907     {
6908       op_address[op_ad] = op;
6909       op_riprel[op_ad] = riprel;
6910     }
6911   else
6912     {
6913       /* Mask to get a 32-bit address.  */
6914       op_address[op_ad] = op & 0xffffffff;
6915       op_riprel[op_ad] = riprel & 0xffffffff;
6916     }
6917 }
6918
6919 static void
6920 OP_REG (int code, int sizeflag)
6921 {
6922   const char *s;
6923   int add;
6924   USED_REX (REX_B);
6925   if (rex & REX_B)
6926     add = 8;
6927   else
6928     add = 0;
6929
6930   switch (code)
6931     {
6932     case ax_reg: case cx_reg: case dx_reg: case bx_reg:
6933     case sp_reg: case bp_reg: case si_reg: case di_reg:
6934       s = names16[code - ax_reg + add];
6935       break;
6936     case es_reg: case ss_reg: case cs_reg:
6937     case ds_reg: case fs_reg: case gs_reg:
6938       s = names_seg[code - es_reg + add];
6939       break;
6940     case al_reg: case ah_reg: case cl_reg: case ch_reg:
6941     case dl_reg: case dh_reg: case bl_reg: case bh_reg:
6942       USED_REX (0);
6943       if (rex)
6944         s = names8rex[code - al_reg + add];
6945       else
6946         s = names8[code - al_reg];
6947       break;
6948     case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
6949     case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
6950       if (address_mode == mode_64bit && (sizeflag & DFLAG))
6951         {
6952           s = names64[code - rAX_reg + add];
6953           break;
6954         }
6955       code += eAX_reg - rAX_reg;
6956       /* Fall through.  */
6957     case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
6958     case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
6959       USED_REX (REX_W);
6960       if (rex & REX_W)
6961         s = names64[code - eAX_reg + add];
6962       else if (sizeflag & DFLAG)
6963         s = names32[code - eAX_reg + add];
6964       else
6965         s = names16[code - eAX_reg + add];
6966       used_prefixes |= (prefixes & PREFIX_DATA);
6967       break;
6968     default:
6969       s = INTERNAL_DISASSEMBLER_ERROR;
6970       break;
6971     }
6972   oappend (s);
6973 }
6974
6975 static void
6976 OP_IMREG (int code, int sizeflag)
6977 {
6978   const char *s;
6979
6980   switch (code)
6981     {
6982     case indir_dx_reg:
6983       if (intel_syntax)
6984         s = "dx";
6985       else
6986         s = "(%dx)";
6987       break;
6988     case ax_reg: case cx_reg: case dx_reg: case bx_reg:
6989     case sp_reg: case bp_reg: case si_reg: case di_reg:
6990       s = names16[code - ax_reg];
6991       break;
6992     case es_reg: case ss_reg: case cs_reg:
6993     case ds_reg: case fs_reg: case gs_reg:
6994       s = names_seg[code - es_reg];
6995       break;
6996     case al_reg: case ah_reg: case cl_reg: case ch_reg:
6997     case dl_reg: case dh_reg: case bl_reg: case bh_reg:
6998       USED_REX (0);
6999       if (rex)
7000         s = names8rex[code - al_reg];
7001       else
7002         s = names8[code - al_reg];
7003       break;
7004     case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
7005     case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
7006       USED_REX (REX_W);
7007       if (rex & REX_W)
7008         s = names64[code - eAX_reg];
7009       else if (sizeflag & DFLAG)
7010         s = names32[code - eAX_reg];
7011       else
7012         s = names16[code - eAX_reg];
7013       used_prefixes |= (prefixes & PREFIX_DATA);
7014       break;
7015     case z_mode_ax_reg:
7016       if ((rex & REX_W) || (sizeflag & DFLAG))
7017         s = *names32;
7018       else
7019         s = *names16;
7020       if (!(rex & REX_W))
7021         used_prefixes |= (prefixes & PREFIX_DATA);
7022       break;
7023     default:
7024       s = INTERNAL_DISASSEMBLER_ERROR;
7025       break;
7026     }
7027   oappend (s);
7028 }
7029
7030 static void
7031 OP_I (int bytemode, int sizeflag)
7032 {
7033   bfd_signed_vma op;
7034   bfd_signed_vma mask = -1;
7035
7036   switch (bytemode)
7037     {
7038     case b_mode:
7039       FETCH_DATA (the_info, codep + 1);
7040       op = *codep++;
7041       mask = 0xff;
7042       break;
7043     case q_mode:
7044       if (address_mode == mode_64bit)
7045         {
7046           op = get32s ();
7047           break;
7048         }
7049       /* Fall through.  */
7050     case v_mode:
7051       USED_REX (REX_W);
7052       if (rex & REX_W)
7053         op = get32s ();
7054       else if (sizeflag & DFLAG)
7055         {
7056           op = get32 ();
7057           mask = 0xffffffff;
7058         }
7059       else
7060         {
7061           op = get16 ();
7062           mask = 0xfffff;
7063         }
7064       used_prefixes |= (prefixes & PREFIX_DATA);
7065       break;
7066     case w_mode:
7067       mask = 0xfffff;
7068       op = get16 ();
7069       break;
7070     case const_1_mode:
7071       if (intel_syntax)
7072         oappend ("1");
7073       return;
7074     default:
7075       oappend (INTERNAL_DISASSEMBLER_ERROR);
7076       return;
7077     }
7078
7079   op &= mask;
7080   scratchbuf[0] = '$';
7081   print_operand_value (scratchbuf + 1, 1, op);
7082   oappend (scratchbuf + intel_syntax);
7083   scratchbuf[0] = '\0';
7084 }
7085
7086 static void
7087 OP_I64 (int bytemode, int sizeflag)
7088 {
7089   bfd_signed_vma op;
7090   bfd_signed_vma mask = -1;
7091
7092   if (address_mode != mode_64bit)
7093     {
7094       OP_I (bytemode, sizeflag);
7095       return;
7096     }
7097
7098   switch (bytemode)
7099     {
7100     case b_mode:
7101       FETCH_DATA (the_info, codep + 1);
7102       op = *codep++;
7103       mask = 0xff;
7104       break;
7105     case v_mode:
7106       USED_REX (REX_W);
7107       if (rex & REX_W)
7108         op = get64 ();
7109       else if (sizeflag & DFLAG)
7110         {
7111           op = get32 ();
7112           mask = 0xffffffff;
7113         }
7114       else
7115         {
7116           op = get16 ();
7117           mask = 0xfffff;
7118         }
7119       used_prefixes |= (prefixes & PREFIX_DATA);
7120       break;
7121     case w_mode:
7122       mask = 0xfffff;
7123       op = get16 ();
7124       break;
7125     default:
7126       oappend (INTERNAL_DISASSEMBLER_ERROR);
7127       return;
7128     }
7129
7130   op &= mask;
7131   scratchbuf[0] = '$';
7132   print_operand_value (scratchbuf + 1, 1, op);
7133   oappend (scratchbuf + intel_syntax);
7134   scratchbuf[0] = '\0';
7135 }
7136
7137 static void
7138 OP_sI (int bytemode, int sizeflag)
7139 {
7140   bfd_signed_vma op;
7141   bfd_signed_vma mask = -1;
7142
7143   switch (bytemode)
7144     {
7145     case b_mode:
7146       FETCH_DATA (the_info, codep + 1);
7147       op = *codep++;
7148       if ((op & 0x80) != 0)
7149         op -= 0x100;
7150       mask = 0xffffffff;
7151       break;
7152     case v_mode:
7153       USED_REX (REX_W);
7154       if (rex & REX_W)
7155         op = get32s ();
7156       else if (sizeflag & DFLAG)
7157         {
7158           op = get32s ();
7159           mask = 0xffffffff;
7160         }
7161       else
7162         {
7163           mask = 0xffffffff;
7164           op = get16 ();
7165           if ((op & 0x8000) != 0)
7166             op -= 0x10000;
7167         }
7168       used_prefixes |= (prefixes & PREFIX_DATA);
7169       break;
7170     case w_mode:
7171       op = get16 ();
7172       mask = 0xffffffff;
7173       if ((op & 0x8000) != 0)
7174         op -= 0x10000;
7175       break;
7176     default:
7177       oappend (INTERNAL_DISASSEMBLER_ERROR);
7178       return;
7179     }
7180
7181   scratchbuf[0] = '$';
7182   print_operand_value (scratchbuf + 1, 1, op);
7183   oappend (scratchbuf + intel_syntax);
7184 }
7185
7186 static void
7187 OP_J (int bytemode, int sizeflag)
7188 {
7189   bfd_vma disp;
7190   bfd_vma mask = -1;
7191   bfd_vma segment = 0;
7192
7193   switch (bytemode)
7194     {
7195     case b_mode:
7196       FETCH_DATA (the_info, codep + 1);
7197       disp = *codep++;
7198       if ((disp & 0x80) != 0)
7199         disp -= 0x100;
7200       break;
7201     case v_mode:
7202       if ((sizeflag & DFLAG) || (rex & REX_W))
7203         disp = get32s ();
7204       else
7205         {
7206           disp = get16 ();
7207           if ((disp & 0x8000) != 0)
7208             disp -= 0x10000;
7209           /* In 16bit mode, address is wrapped around at 64k within
7210              the same segment.  Otherwise, a data16 prefix on a jump
7211              instruction means that the pc is masked to 16 bits after
7212              the displacement is added!  */
7213           mask = 0xffff;
7214           if ((prefixes & PREFIX_DATA) == 0)
7215             segment = ((start_pc + codep - start_codep)
7216                        & ~((bfd_vma) 0xffff));
7217         }
7218       used_prefixes |= (prefixes & PREFIX_DATA);
7219       break;
7220     default:
7221       oappend (INTERNAL_DISASSEMBLER_ERROR);
7222       return;
7223     }
7224   disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
7225   set_op (disp, 0);
7226   print_operand_value (scratchbuf, 1, disp);
7227   oappend (scratchbuf);
7228 }
7229
7230 static void
7231 OP_SEG (int bytemode, int sizeflag)
7232 {
7233   if (bytemode == w_mode)
7234     oappend (names_seg[modrm.reg]);
7235   else
7236     OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
7237 }
7238
7239 static void
7240 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
7241 {
7242   int seg, offset;
7243
7244   if (sizeflag & DFLAG)
7245     {
7246       offset = get32 ();
7247       seg = get16 ();
7248     }
7249   else
7250     {
7251       offset = get16 ();
7252       seg = get16 ();
7253     }
7254   used_prefixes |= (prefixes & PREFIX_DATA);
7255   if (intel_syntax)
7256     sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
7257   else
7258     sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
7259   oappend (scratchbuf);
7260 }
7261
7262 static void
7263 OP_OFF (int bytemode, int sizeflag)
7264 {
7265   bfd_vma off;
7266
7267   if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
7268     intel_operand_size (bytemode, sizeflag);
7269   append_seg ();
7270
7271   if ((sizeflag & AFLAG) || address_mode == mode_64bit)
7272     off = get32 ();
7273   else
7274     off = get16 ();
7275
7276   if (intel_syntax)
7277     {
7278       if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
7279                         | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
7280         {
7281           oappend (names_seg[ds_reg - es_reg]);
7282           oappend (":");
7283         }
7284     }
7285   print_operand_value (scratchbuf, 1, off);
7286   oappend (scratchbuf);
7287 }
7288
7289 static void
7290 OP_OFF64 (int bytemode, int sizeflag)
7291 {
7292   bfd_vma off;
7293
7294   if (address_mode != mode_64bit
7295       || (prefixes & PREFIX_ADDR))
7296     {
7297       OP_OFF (bytemode, sizeflag);
7298       return;
7299     }
7300
7301   if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
7302     intel_operand_size (bytemode, sizeflag);
7303   append_seg ();
7304
7305   off = get64 ();
7306
7307   if (intel_syntax)
7308     {
7309       if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
7310                         | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
7311         {
7312           oappend (names_seg[ds_reg - es_reg]);
7313           oappend (":");
7314         }
7315     }
7316   print_operand_value (scratchbuf, 1, off);
7317   oappend (scratchbuf);
7318 }
7319
7320 static void
7321 ptr_reg (int code, int sizeflag)
7322 {
7323   const char *s;
7324
7325   *obufp++ = open_char;
7326   used_prefixes |= (prefixes & PREFIX_ADDR);
7327   if (address_mode == mode_64bit)
7328     {
7329       if (!(sizeflag & AFLAG))
7330         s = names32[code - eAX_reg];
7331       else
7332         s = names64[code - eAX_reg];
7333     }
7334   else if (sizeflag & AFLAG)
7335     s = names32[code - eAX_reg];
7336   else
7337     s = names16[code - eAX_reg];
7338   oappend (s);
7339   *obufp++ = close_char;
7340   *obufp = 0;
7341 }
7342
7343 static void
7344 OP_ESreg (int code, int sizeflag)
7345 {
7346   if (intel_syntax)
7347     {
7348       switch (codep[-1])
7349         {
7350         case 0x6d:      /* insw/insl */
7351           intel_operand_size (z_mode, sizeflag);
7352           break;
7353         case 0xa5:      /* movsw/movsl/movsq */
7354         case 0xa7:      /* cmpsw/cmpsl/cmpsq */
7355         case 0xab:      /* stosw/stosl */
7356         case 0xaf:      /* scasw/scasl */
7357           intel_operand_size (v_mode, sizeflag);
7358           break;
7359         default:
7360           intel_operand_size (b_mode, sizeflag);
7361         }
7362     }
7363   oappend ("%es:" + intel_syntax);
7364   ptr_reg (code, sizeflag);
7365 }
7366
7367 static void
7368 OP_DSreg (int code, int sizeflag)
7369 {
7370   if (intel_syntax)
7371     {
7372       switch (codep[-1])
7373         {
7374         case 0x6f:      /* outsw/outsl */
7375           intel_operand_size (z_mode, sizeflag);
7376           break;
7377         case 0xa5:      /* movsw/movsl/movsq */
7378         case 0xa7:      /* cmpsw/cmpsl/cmpsq */
7379         case 0xad:      /* lodsw/lodsl/lodsq */
7380           intel_operand_size (v_mode, sizeflag);
7381           break;
7382         default:
7383           intel_operand_size (b_mode, sizeflag);
7384         }
7385     }
7386   if ((prefixes
7387        & (PREFIX_CS
7388           | PREFIX_DS
7389           | PREFIX_SS
7390           | PREFIX_ES
7391           | PREFIX_FS
7392           | PREFIX_GS)) == 0)
7393     prefixes |= PREFIX_DS;
7394   append_seg ();
7395   ptr_reg (code, sizeflag);
7396 }
7397
7398 static void
7399 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7400 {
7401   int add;
7402   if (rex & REX_R)
7403     {
7404       USED_REX (REX_R);
7405       add = 8;
7406     }
7407   else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
7408     {
7409       lock_prefix = NULL;
7410       used_prefixes |= PREFIX_LOCK;
7411       add = 8;
7412     }
7413   else
7414     add = 0;
7415   sprintf (scratchbuf, "%%cr%d", modrm.reg + add);
7416   oappend (scratchbuf + intel_syntax);
7417 }
7418
7419 static void
7420 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7421 {
7422   int add;
7423   USED_REX (REX_R);
7424   if (rex & REX_R)
7425     add = 8;
7426   else
7427     add = 0;
7428   if (intel_syntax)
7429     sprintf (scratchbuf, "db%d", modrm.reg + add);
7430   else
7431     sprintf (scratchbuf, "%%db%d", modrm.reg + add);
7432   oappend (scratchbuf);
7433 }
7434
7435 static void
7436 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7437 {
7438   sprintf (scratchbuf, "%%tr%d", modrm.reg);
7439   oappend (scratchbuf + intel_syntax);
7440 }
7441
7442 static void
7443 OP_R (int bytemode, int sizeflag)
7444 {
7445   if (modrm.mod == 3)
7446     OP_E (bytemode, sizeflag);
7447   else
7448     BadOp ();
7449 }
7450
7451 static void
7452 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7453 {
7454   used_prefixes |= (prefixes & PREFIX_DATA);
7455   if (prefixes & PREFIX_DATA)
7456     {
7457       int add;
7458       USED_REX (REX_R);
7459       if (rex & REX_R)
7460         add = 8;
7461       else
7462         add = 0;
7463       sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
7464     }
7465   else
7466     sprintf (scratchbuf, "%%mm%d", modrm.reg);
7467   oappend (scratchbuf + intel_syntax);
7468 }
7469
7470 static void
7471 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7472 {
7473   int add;
7474   USED_REX (REX_R);
7475   if (rex & REX_R)
7476     add = 8;
7477   else
7478     add = 0;
7479   sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
7480   oappend (scratchbuf + intel_syntax);
7481 }
7482
7483 static void
7484 OP_EM (int bytemode, int sizeflag)
7485 {
7486   if (modrm.mod != 3)
7487     {
7488       if (intel_syntax && bytemode == v_mode)
7489         {
7490           bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
7491           used_prefixes |= (prefixes & PREFIX_DATA);
7492         }
7493       OP_E (bytemode, sizeflag);
7494       return;
7495     }
7496
7497   /* Skip mod/rm byte.  */
7498   MODRM_CHECK;
7499   codep++;
7500   used_prefixes |= (prefixes & PREFIX_DATA);
7501   if (prefixes & PREFIX_DATA)
7502     {
7503       int add;
7504
7505       USED_REX (REX_B);
7506       if (rex & REX_B)
7507         add = 8;
7508       else
7509         add = 0;
7510       sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
7511     }
7512   else
7513     sprintf (scratchbuf, "%%mm%d", modrm.rm);
7514   oappend (scratchbuf + intel_syntax);
7515 }
7516
7517 /* cvt* are the only instructions in sse2 which have
7518    both SSE and MMX operands and also have 0x66 prefix
7519    in their opcode. 0x66 was originally used to differentiate
7520    between SSE and MMX instruction(operands). So we have to handle the
7521    cvt* separately using OP_EMC and OP_MXC */
7522 static void
7523 OP_EMC (int bytemode, int sizeflag)
7524 {
7525   if (modrm.mod != 3)
7526     {
7527       if (intel_syntax && bytemode == v_mode)
7528         {
7529           bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
7530           used_prefixes |= (prefixes & PREFIX_DATA);
7531         }
7532       OP_E (bytemode, sizeflag);
7533       return;
7534     }
7535
7536   /* Skip mod/rm byte.  */
7537   MODRM_CHECK;
7538   codep++;
7539   used_prefixes |= (prefixes & PREFIX_DATA);
7540   sprintf (scratchbuf, "%%mm%d", modrm.rm);
7541   oappend (scratchbuf + intel_syntax);
7542 }
7543
7544 static void
7545 OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7546 {
7547   used_prefixes |= (prefixes & PREFIX_DATA);
7548   sprintf (scratchbuf, "%%mm%d", modrm.reg);
7549   oappend (scratchbuf + intel_syntax);
7550 }
7551
7552 static void
7553 OP_EX (int bytemode, int sizeflag)
7554 {
7555   int add;
7556   if (modrm.mod != 3)
7557     {
7558       OP_E (bytemode, sizeflag);
7559       return;
7560     }
7561   USED_REX (REX_B);
7562   if (rex & REX_B)
7563     add = 8;
7564   else
7565     add = 0;
7566
7567   /* Skip mod/rm byte.  */
7568   MODRM_CHECK;
7569   codep++;
7570   sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
7571   oappend (scratchbuf + intel_syntax);
7572 }
7573
7574 static void
7575 OP_MS (int bytemode, int sizeflag)
7576 {
7577   if (modrm.mod == 3)
7578     OP_EM (bytemode, sizeflag);
7579   else
7580     BadOp ();
7581 }
7582
7583 static void
7584 OP_XS (int bytemode, int sizeflag)
7585 {
7586   if (modrm.mod == 3)
7587     OP_EX (bytemode, sizeflag);
7588   else
7589     BadOp ();
7590 }
7591
7592 static void
7593 OP_M (int bytemode, int sizeflag)
7594 {
7595   if (modrm.mod == 3)
7596     /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
7597     BadOp ();
7598   else
7599     OP_E (bytemode, sizeflag);
7600 }
7601
7602 static void
7603 OP_0f07 (int bytemode, int sizeflag)
7604 {
7605   if (modrm.mod != 3 || modrm.rm != 0)
7606     BadOp ();
7607   else
7608     OP_E (bytemode, sizeflag);
7609 }
7610
7611 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
7612    32bit mode and "xchg %rax,%rax" in 64bit mode.  */
7613
7614 static void
7615 NOP_Fixup1 (int bytemode, int sizeflag)
7616 {
7617   if ((prefixes & PREFIX_DATA) != 0
7618       || (rex != 0
7619           && rex != 0x48
7620           && address_mode == mode_64bit))
7621     OP_REG (bytemode, sizeflag);
7622   else
7623     strcpy (obuf, "nop");
7624 }
7625
7626 static void
7627 NOP_Fixup2 (int bytemode, int sizeflag)
7628 {
7629   if ((prefixes & PREFIX_DATA) != 0
7630       || (rex != 0
7631           && rex != 0x48
7632           && address_mode == mode_64bit))
7633     OP_IMREG (bytemode, sizeflag);
7634 }
7635
7636 static const char *const Suffix3DNow[] = {
7637 /* 00 */        NULL,           NULL,           NULL,           NULL,
7638 /* 04 */        NULL,           NULL,           NULL,           NULL,
7639 /* 08 */        NULL,           NULL,           NULL,           NULL,
7640 /* 0C */        "pi2fw",        "pi2fd",        NULL,           NULL,
7641 /* 10 */        NULL,           NULL,           NULL,           NULL,
7642 /* 14 */        NULL,           NULL,           NULL,           NULL,
7643 /* 18 */        NULL,           NULL,           NULL,           NULL,
7644 /* 1C */        "pf2iw",        "pf2id",        NULL,           NULL,
7645 /* 20 */        NULL,           NULL,           NULL,           NULL,
7646 /* 24 */        NULL,           NULL,           NULL,           NULL,
7647 /* 28 */        NULL,           NULL,           NULL,           NULL,
7648 /* 2C */        NULL,           NULL,           NULL,           NULL,
7649 /* 30 */        NULL,           NULL,           NULL,           NULL,
7650 /* 34 */        NULL,           NULL,           NULL,           NULL,
7651 /* 38 */        NULL,           NULL,           NULL,           NULL,
7652 /* 3C */        NULL,           NULL,           NULL,           NULL,
7653 /* 40 */        NULL,           NULL,           NULL,           NULL,
7654 /* 44 */        NULL,           NULL,           NULL,           NULL,
7655 /* 48 */        NULL,           NULL,           NULL,           NULL,
7656 /* 4C */        NULL,           NULL,           NULL,           NULL,
7657 /* 50 */        NULL,           NULL,           NULL,           NULL,
7658 /* 54 */        NULL,           NULL,           NULL,           NULL,
7659 /* 58 */        NULL,           NULL,           NULL,           NULL,
7660 /* 5C */        NULL,           NULL,           NULL,           NULL,
7661 /* 60 */        NULL,           NULL,           NULL,           NULL,
7662 /* 64 */        NULL,           NULL,           NULL,           NULL,
7663 /* 68 */        NULL,           NULL,           NULL,           NULL,
7664 /* 6C */        NULL,           NULL,           NULL,           NULL,
7665 /* 70 */        NULL,           NULL,           NULL,           NULL,
7666 /* 74 */        NULL,           NULL,           NULL,           NULL,
7667 /* 78 */        NULL,           NULL,           NULL,           NULL,
7668 /* 7C */        NULL,           NULL,           NULL,           NULL,
7669 /* 80 */        NULL,           NULL,           NULL,           NULL,
7670 /* 84 */        NULL,           NULL,           NULL,           NULL,
7671 /* 88 */        NULL,           NULL,           "pfnacc",       NULL,
7672 /* 8C */        NULL,           NULL,           "pfpnacc",      NULL,
7673 /* 90 */        "pfcmpge",      NULL,           NULL,           NULL,
7674 /* 94 */        "pfmin",        NULL,           "pfrcp",        "pfrsqrt",
7675 /* 98 */        NULL,           NULL,           "pfsub",        NULL,
7676 /* 9C */        NULL,           NULL,           "pfadd",        NULL,
7677 /* A0 */        "pfcmpgt",      NULL,           NULL,           NULL,
7678 /* A4 */        "pfmax",        NULL,           "pfrcpit1",     "pfrsqit1",
7679 /* A8 */        NULL,           NULL,           "pfsubr",       NULL,
7680 /* AC */        NULL,           NULL,           "pfacc",        NULL,
7681 /* B0 */        "pfcmpeq",      NULL,           NULL,           NULL,
7682 /* B4 */        "pfmul",        NULL,           "pfrcpit2",     "pmulhrw",
7683 /* B8 */        NULL,           NULL,           NULL,           "pswapd",
7684 /* BC */        NULL,           NULL,           NULL,           "pavgusb",
7685 /* C0 */        NULL,           NULL,           NULL,           NULL,
7686 /* C4 */        NULL,           NULL,           NULL,           NULL,
7687 /* C8 */        NULL,           NULL,           NULL,           NULL,
7688 /* CC */        NULL,           NULL,           NULL,           NULL,
7689 /* D0 */        NULL,           NULL,           NULL,           NULL,
7690 /* D4 */        NULL,           NULL,           NULL,           NULL,
7691 /* D8 */        NULL,           NULL,           NULL,           NULL,
7692 /* DC */        NULL,           NULL,           NULL,           NULL,
7693 /* E0 */        NULL,           NULL,           NULL,           NULL,
7694 /* E4 */        NULL,           NULL,           NULL,           NULL,
7695 /* E8 */        NULL,           NULL,           NULL,           NULL,
7696 /* EC */        NULL,           NULL,           NULL,           NULL,
7697 /* F0 */        NULL,           NULL,           NULL,           NULL,
7698 /* F4 */        NULL,           NULL,           NULL,           NULL,
7699 /* F8 */        NULL,           NULL,           NULL,           NULL,
7700 /* FC */        NULL,           NULL,           NULL,           NULL,
7701 };
7702
7703 static void
7704 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7705 {
7706   const char *mnemonic;
7707
7708   FETCH_DATA (the_info, codep + 1);
7709   /* AMD 3DNow! instructions are specified by an opcode suffix in the
7710      place where an 8-bit immediate would normally go.  ie. the last
7711      byte of the instruction.  */
7712   obufp = obuf + strlen (obuf);
7713   mnemonic = Suffix3DNow[*codep++ & 0xff];
7714   if (mnemonic)
7715     oappend (mnemonic);
7716   else
7717     {
7718       /* Since a variable sized modrm/sib chunk is between the start
7719          of the opcode (0x0f0f) and the opcode suffix, we need to do
7720          all the modrm processing first, and don't know until now that
7721          we have a bad opcode.  This necessitates some cleaning up.  */
7722       op_out[0][0] = '\0';
7723       op_out[1][0] = '\0';
7724       BadOp ();
7725     }
7726 }
7727
7728 static const char *simd_cmp_op[] = {
7729   "eq",
7730   "lt",
7731   "le",
7732   "unord",
7733   "neq",
7734   "nlt",
7735   "nle",
7736   "ord"
7737 };
7738
7739 static void
7740 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
7741 {
7742   unsigned int cmp_type;
7743
7744   FETCH_DATA (the_info, codep + 1);
7745   obufp = obuf + strlen (obuf);
7746   cmp_type = *codep++ & 0xff;
7747   if (cmp_type < 8)
7748     {
7749       char suffix1 = 'p', suffix2 = 's';
7750       used_prefixes |= (prefixes & PREFIX_REPZ);
7751       if (prefixes & PREFIX_REPZ)
7752         suffix1 = 's';
7753       else
7754         {
7755           used_prefixes |= (prefixes & PREFIX_DATA);
7756           if (prefixes & PREFIX_DATA)
7757             suffix2 = 'd';
7758           else
7759             {
7760               used_prefixes |= (prefixes & PREFIX_REPNZ);
7761               if (prefixes & PREFIX_REPNZ)
7762                 suffix1 = 's', suffix2 = 'd';
7763             }
7764         }
7765       sprintf (scratchbuf, "cmp%s%c%c",
7766                simd_cmp_op[cmp_type], suffix1, suffix2);
7767       used_prefixes |= (prefixes & PREFIX_REPZ);
7768       oappend (scratchbuf);
7769     }
7770   else
7771     {
7772       /* We have a bad extension byte.  Clean up.  */
7773       op_out[0][0] = '\0';
7774       op_out[1][0] = '\0';
7775       BadOp ();
7776     }
7777 }
7778
7779 static void
7780 OP_Mwait (int bytemode ATTRIBUTE_UNUSED,
7781           int sizeflag ATTRIBUTE_UNUSED)
7782 {
7783   /* mwait %eax,%ecx  */
7784   if (!intel_syntax)
7785     {
7786       const char **names = (address_mode == mode_64bit
7787                             ? names64 : names32);
7788       strcpy (op_out[0], names[0]);
7789       strcpy (op_out[1], names[1]);
7790       two_source_ops = 1;
7791     }
7792   /* Skip mod/rm byte.  */
7793   MODRM_CHECK;
7794   codep++;
7795 }
7796
7797 static void
7798 OP_Monitor (int bytemode ATTRIBUTE_UNUSED,
7799             int sizeflag ATTRIBUTE_UNUSED)
7800 {
7801   /* monitor %eax,%ecx,%edx"  */
7802   if (!intel_syntax)
7803     {
7804       const char **op1_names;
7805       const char **names = (address_mode == mode_64bit
7806                             ? names64 : names32);
7807
7808       if (!(prefixes & PREFIX_ADDR))
7809         op1_names = (address_mode == mode_16bit
7810                      ? names16 : names);
7811       else
7812         {
7813           /* Remove "addr16/addr32".  */
7814           addr_prefix = NULL;
7815           op1_names = (address_mode != mode_32bit
7816                        ? names32 : names16);
7817           used_prefixes |= PREFIX_ADDR;
7818         }
7819       strcpy (op_out[0], op1_names[0]);
7820       strcpy (op_out[1], names[1]);
7821       strcpy (op_out[2], names[2]);
7822       two_source_ops = 1;
7823     }
7824   /* Skip mod/rm byte.  */
7825   MODRM_CHECK;
7826   codep++;
7827 }
7828
7829 static void
7830 BadOp (void)
7831 {
7832   /* Throw away prefixes and 1st. opcode byte.  */
7833   codep = insn_codep + 1;
7834   oappend ("(bad)");
7835 }
7836
7837 static void
7838 REP_Fixup (int bytemode, int sizeflag)
7839 {
7840   /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
7841      lods and stos.  */
7842   if (prefixes & PREFIX_REPZ)
7843     repz_prefix = "rep ";
7844
7845   switch (bytemode)
7846     {
7847     case al_reg:
7848     case eAX_reg:
7849     case indir_dx_reg:
7850       OP_IMREG (bytemode, sizeflag);
7851       break;
7852     case eDI_reg:
7853       OP_ESreg (bytemode, sizeflag);
7854       break;
7855     case eSI_reg:
7856       OP_DSreg (bytemode, sizeflag);
7857       break;
7858     default:
7859       abort ();
7860       break;
7861     }
7862 }
7863
7864 static void
7865 CMPXCHG8B_Fixup (int bytemode, int sizeflag)
7866 {
7867   USED_REX (REX_W);
7868   if (rex & REX_W)
7869     {
7870       /* Change cmpxchg8b to cmpxchg16b.  */
7871       char *p = obuf + strlen (obuf) - 2;
7872       strcpy (p, "16b");
7873       bytemode = o_mode;
7874     }
7875   OP_M (bytemode, sizeflag);
7876 }
7877
7878 static void
7879 XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
7880 {
7881   sprintf (scratchbuf, "%%xmm%d", reg);
7882   oappend (scratchbuf + intel_syntax);
7883 }
7884
7885 static void
7886 CRC32_Fixup (int bytemode, int sizeflag)
7887 {
7888   /* Add proper suffix to "crc32".  */
7889   char *p = obuf + strlen (obuf);
7890
7891   switch (bytemode)
7892     {
7893     case b_mode:
7894       if (intel_syntax)
7895         break;
7896
7897       *p++ = 'b';
7898       break;
7899     case v_mode:
7900       if (intel_syntax)
7901         break;
7902
7903       USED_REX (REX_W);
7904       if (rex & REX_W)
7905         *p++ = 'q';
7906       else if (sizeflag & DFLAG)
7907         *p++ = 'l';
7908       else
7909         *p++ = 'w';
7910       used_prefixes |= (prefixes & PREFIX_DATA);
7911       break;
7912     default:
7913       oappend (INTERNAL_DISASSEMBLER_ERROR);
7914       break;
7915     }
7916   *p = '\0';
7917
7918   if (modrm.mod == 3)
7919     {
7920       int add;
7921
7922       /* Skip mod/rm byte.  */
7923       MODRM_CHECK;
7924       codep++;
7925
7926       USED_REX (REX_B);
7927       add = (rex & REX_B) ? 8 : 0;
7928       if (bytemode == b_mode)
7929         {
7930           USED_REX (0);
7931           if (rex)
7932             oappend (names8rex[modrm.rm + add]);
7933           else
7934             oappend (names8[modrm.rm + add]);
7935         }
7936       else
7937         {
7938           USED_REX (REX_W);
7939           if (rex & REX_W)
7940             oappend (names64[modrm.rm + add]);
7941           else if ((prefixes & PREFIX_DATA))
7942             oappend (names16[modrm.rm + add]);
7943           else
7944             oappend (names32[modrm.rm + add]);
7945         }
7946     }
7947   else
7948     OP_E (bytemode, sizeflag);
7949 }
7950
7951 /* Print a DREX argument as either a register or memory operation.  */
7952 static void
7953 print_drex_arg (unsigned int reg, int bytemode, int sizeflag)
7954 {
7955   if (reg == DREX_REG_UNKNOWN)
7956     BadOp ();
7957
7958   else if (reg != DREX_REG_MEMORY)
7959     {
7960       sprintf (scratchbuf, "%%xmm%d", reg);
7961       oappend (scratchbuf + intel_syntax);
7962     }
7963
7964   else
7965     OP_E_extended (bytemode, sizeflag, 1);
7966 }
7967
7968 /* SSE5 instructions that have 4 arguments are encoded as:
7969    0f 24 <sub-opcode> <modrm> <optional-sib> <drex> <offset>.
7970
7971    The <sub-opcode> byte has 1 bit (0x4) that is combined with 1 bit in
7972    the DREX field (0x8) to determine how the arguments are laid out.
7973    The destination register must be the same register as one of the
7974    inputs, and it is encoded in the DREX byte.  No REX prefix is used
7975    for these instructions, since the DREX field contains the 3 extension
7976    bits provided by the REX prefix.
7977
7978    The bytemode argument adds 2 extra bits for passing extra information:
7979         DREX_OC1        -- Set the OC1 bit to indicate dest == 1st arg
7980         DREX_NO_OC0     -- OC0 in DREX is invalid
7981         (but pretend it is set).  */
7982
7983 static void
7984 OP_DREX4 (int flag_bytemode, int sizeflag)
7985 {
7986   unsigned int drex_byte;
7987   unsigned int regs[4];
7988   unsigned int modrm_regmem;
7989   unsigned int modrm_reg;
7990   unsigned int drex_reg;
7991   int bytemode;
7992   int rex_save = rex;
7993   int rex_used_save = rex_used;
7994   int has_sib = 0;
7995   int oc1 = (flag_bytemode & DREX_OC1) ? 2 : 0;
7996   int oc0;
7997   int i;
7998
7999   bytemode = flag_bytemode & ~ DREX_MASK;
8000
8001   for (i = 0; i < 4; i++)
8002     regs[i] = DREX_REG_UNKNOWN;
8003
8004   /* Determine if we have a SIB byte in addition to MODRM before the
8005      DREX byte.  */
8006   if (((sizeflag & AFLAG) || address_mode == mode_64bit)
8007       && (modrm.mod != 3)
8008       && (modrm.rm == 4))
8009     has_sib = 1;
8010
8011   /* Get the DREX byte.  */
8012   FETCH_DATA (the_info, codep + 2 + has_sib);
8013   drex_byte = codep[has_sib+1];
8014   drex_reg = DREX_XMM (drex_byte);
8015   modrm_reg = modrm.reg + ((drex_byte & REX_R) ? 8 : 0);
8016
8017   /* Is OC0 legal?  If not, hardwire oc0 == 1.  */
8018   if (flag_bytemode & DREX_NO_OC0)
8019     {
8020       oc0 = 1;
8021       if (DREX_OC0 (drex_byte))
8022         BadOp ();
8023     }
8024   else
8025     oc0 = DREX_OC0 (drex_byte);
8026
8027   if (modrm.mod == 3)
8028     {
8029       /* regmem == register  */
8030       modrm_regmem = modrm.rm + ((drex_byte & REX_B) ? 8 : 0);
8031       rex = rex_used = 0;
8032       /* skip modrm/drex since we don't call OP_E_extended  */
8033       codep += 2;
8034     }
8035   else
8036     {
8037       /* regmem == memory, fill in appropriate REX bits  */
8038       modrm_regmem = DREX_REG_MEMORY;
8039       rex = drex_byte & (REX_B | REX_X | REX_R);
8040       if (rex)
8041         rex |= REX_OPCODE;
8042       rex_used = rex;
8043     }
8044
8045   /* Based on the OC1/OC0 bits, lay out the arguments in the correct
8046      order.  */
8047   switch (oc0 + oc1)
8048     {
8049     default:
8050       BadOp ();
8051       return;
8052
8053     case 0:
8054       regs[0] = modrm_regmem;
8055       regs[1] = modrm_reg;
8056       regs[2] = drex_reg;
8057       regs[3] = drex_reg;
8058       break;
8059
8060     case 1:
8061       regs[0] = modrm_reg;
8062       regs[1] = modrm_regmem;
8063       regs[2] = drex_reg;
8064       regs[3] = drex_reg;
8065       break;
8066
8067     case 2:
8068       regs[0] = drex_reg;
8069       regs[1] = modrm_regmem;
8070       regs[2] = modrm_reg;
8071       regs[3] = drex_reg;
8072       break;
8073
8074     case 3:
8075       regs[0] = drex_reg;
8076       regs[1] = modrm_reg;
8077       regs[2] = modrm_regmem;
8078       regs[3] = drex_reg;
8079       break;
8080     }
8081
8082   /* Print out the arguments.  */
8083   for (i = 0; i < 4; i++)
8084     {
8085       int j = (intel_syntax) ? 3 - i : i;
8086       if (i > 0)
8087         {
8088           *obufp++ = ',';
8089           *obufp = '\0';
8090         }
8091
8092       print_drex_arg (regs[j], bytemode, sizeflag);
8093     }
8094
8095   rex = rex_save;
8096   rex_used = rex_used_save;
8097 }
8098
8099 /* SSE5 instructions that have 3 arguments, and are encoded as:
8100    0f 24 <sub-opcode> <modrm> <optional-sib> <drex> <offset>    (or)
8101    0f 25 <sub-opcode> <modrm> <optional-sib> <drex> <offset> <cmp-byte>
8102
8103    The DREX field has 1 bit (0x8) to determine how the arguments are
8104    laid out. The destination register is encoded in the DREX byte.
8105    No REX prefix is used for these instructions, since the DREX field
8106    contains the 3 extension bits provided by the REX prefix.  */
8107
8108 static void
8109 OP_DREX3 (int flag_bytemode, int sizeflag)
8110 {
8111   unsigned int drex_byte;
8112   unsigned int regs[3];
8113   unsigned int modrm_regmem;
8114   unsigned int modrm_reg;
8115   unsigned int drex_reg;
8116   int bytemode;
8117   int rex_save = rex;
8118   int rex_used_save = rex_used;
8119   int has_sib = 0;
8120   int oc0;
8121   int i;
8122
8123   bytemode = flag_bytemode & ~ DREX_MASK;
8124
8125   for (i = 0; i < 3; i++)
8126     regs[i] = DREX_REG_UNKNOWN;
8127
8128   /* Determine if we have a SIB byte in addition to MODRM before the
8129      DREX byte.  */
8130   if (((sizeflag & AFLAG) || address_mode == mode_64bit)
8131       && (modrm.mod != 3)
8132       && (modrm.rm == 4))
8133     has_sib = 1;
8134
8135   /* Get the DREX byte.  */
8136   FETCH_DATA (the_info, codep + 2 + has_sib);
8137   drex_byte = codep[has_sib+1];
8138   drex_reg = DREX_XMM (drex_byte);
8139   modrm_reg = modrm.reg + ((drex_byte & REX_R) ? 8 : 0);
8140
8141   /* Is OC0 legal?  If not, hardwire oc0 == 0 */
8142   oc0 = DREX_OC0 (drex_byte);
8143   if ((flag_bytemode & DREX_NO_OC0) && oc0)
8144     BadOp ();
8145
8146   if (modrm.mod == 3)
8147     {
8148       /* regmem == register */
8149       modrm_regmem = modrm.rm + ((drex_byte & REX_B) ? 8 : 0);
8150       rex = rex_used = 0;
8151       /* skip modrm/drex since we don't call OP_E_extended.  */
8152       codep += 2;
8153     }
8154   else
8155     {
8156       /* regmem == memory, fill in appropriate REX bits.  */
8157       modrm_regmem = DREX_REG_MEMORY;
8158       rex = drex_byte & (REX_B | REX_X | REX_R);
8159       if (rex)
8160         rex |= REX_OPCODE;
8161       rex_used = rex;
8162     }
8163
8164   /* Based on the OC1/OC0 bits, lay out the arguments in the correct
8165      order.  */
8166   switch (oc0)
8167     {
8168     default:
8169       BadOp ();
8170       return;
8171
8172     case 0:
8173       regs[0] = modrm_regmem;
8174       regs[1] = modrm_reg;
8175       regs[2] = drex_reg;
8176       break;
8177
8178     case 1:
8179       regs[0] = modrm_reg;
8180       regs[1] = modrm_regmem;
8181       regs[2] = drex_reg;
8182       break;
8183     }
8184
8185   /* Print out the arguments.  */
8186   for (i = 0; i < 3; i++)
8187     {
8188       int j = (intel_syntax) ? 2 - i : i;
8189       if (i > 0)
8190         {
8191           *obufp++ = ',';
8192           *obufp = '\0';
8193         }
8194
8195       print_drex_arg (regs[j], bytemode, sizeflag);
8196     }
8197
8198   rex = rex_save;
8199   rex_used = rex_used_save;
8200 }
8201
8202 /* Emit a floating point comparison for comp<xx> instructions.  */
8203
8204 static void
8205 OP_DREX_FCMP (int bytemode ATTRIBUTE_UNUSED,
8206               int sizeflag ATTRIBUTE_UNUSED)
8207 {
8208   unsigned char byte;
8209
8210   static const char *const cmp_test[] = {
8211     "eq",
8212     "lt",
8213     "le",
8214     "unord",
8215     "ne",
8216     "nlt",
8217     "nle",
8218     "ord",
8219     "ueq",
8220     "ult",
8221     "ule",
8222     "false",
8223     "une",
8224     "unlt",
8225     "unle",
8226     "true"
8227   };
8228
8229   FETCH_DATA (the_info, codep + 1);
8230   byte = *codep & 0xff;
8231
8232   if (byte >= ARRAY_SIZE (cmp_test)
8233       || obuf[0] != 'c'
8234       || obuf[1] != 'o'
8235       || obuf[2] != 'm')
8236     {
8237       /* The instruction isn't one we know about, so just append the
8238          extension byte as a numeric value.  */
8239       OP_I (b_mode, 0);
8240     }
8241
8242   else
8243     {
8244       sprintf (scratchbuf, "com%s%s", cmp_test[byte], obuf+3);
8245       strcpy (obuf, scratchbuf);
8246       codep++;
8247     }
8248 }
8249
8250 /* Emit an integer point comparison for pcom<xx> instructions,
8251    rewriting the instruction to have the test inside of it.  */
8252
8253 static void
8254 OP_DREX_ICMP (int bytemode ATTRIBUTE_UNUSED,
8255               int sizeflag ATTRIBUTE_UNUSED)
8256 {
8257   unsigned char byte;
8258
8259   static const char *const cmp_test[] = {
8260     "lt",
8261     "le",
8262     "gt",
8263     "ge",
8264     "eq",
8265     "ne",
8266     "false",
8267     "true"
8268   };
8269
8270   FETCH_DATA (the_info, codep + 1);
8271   byte = *codep & 0xff;
8272
8273   if (byte >= ARRAY_SIZE (cmp_test)
8274       || obuf[0] != 'p'
8275       || obuf[1] != 'c'
8276       || obuf[2] != 'o'
8277       || obuf[3] != 'm')
8278     {
8279       /* The instruction isn't one we know about, so just print the
8280          comparison test byte as a numeric value.  */
8281       OP_I (b_mode, 0);
8282     }
8283
8284   else
8285     {
8286       sprintf (scratchbuf, "pcom%s%s", cmp_test[byte], obuf+4);
8287       strcpy (obuf, scratchbuf);
8288       codep++;
8289     }
8290 }