1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright (C) 1988, 89, 91, 93, 94, 95, 96, 1997
3 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
24 * modified by John Hassey (hassey@dg-rtp.dg.com)
28 * The main tables describing the instructions is essentially a copy
29 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
30 * Programmers Manual. Usually, there is a capital letter, followed
31 * by a small letter. The capital letter tell the addressing mode,
32 * and the small letter tells about the operand size. Refer to
33 * the Intel manual for details.
43 static int fetch_data
PARAMS ((struct disassemble_info
*, bfd_byte
*));
47 /* Points to first byte not fetched. */
48 bfd_byte
*max_fetched
;
49 bfd_byte the_buffer
[MAXLEN
];
54 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
55 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
57 #define FETCH_DATA(info, addr) \
58 ((addr) <= ((struct dis_private *)(info->private_data))->max_fetched \
59 ? 1 : fetch_data ((info), (addr)))
62 fetch_data (info
, addr
)
63 struct disassemble_info
*info
;
67 struct dis_private
*priv
= (struct dis_private
*)info
->private_data
;
68 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
70 status
= (*info
->read_memory_func
) (start
,
72 addr
- priv
->max_fetched
,
76 (*info
->memory_error_func
) (status
, start
, info
);
77 longjmp (priv
->bailout
, 1);
80 priv
->max_fetched
= addr
;
84 #define Eb OP_E, b_mode
85 #define indirEb OP_indirE, b_mode
86 #define Gb OP_G, b_mode
87 #define Ev OP_E, v_mode
88 #define indirEv OP_indirE, v_mode
89 #define Ew OP_E, w_mode
90 #define Ma OP_E, v_mode
92 #define Mp OP_E, 0 /* ? */
93 #define Gv OP_G, v_mode
94 #define Gw OP_G, w_mode
95 #define Rw OP_rm, w_mode
96 #define Rd OP_rm, d_mode
97 #define Ib OP_I, b_mode
98 #define sIb OP_sI, b_mode /* sign extened byte */
99 #define Iv OP_I, v_mode
100 #define Iw OP_I, w_mode
101 #define Jb OP_J, b_mode
102 #define Jv OP_J, v_mode
104 #define ONE OP_ONE, 0
106 #define Cd OP_C, d_mode
107 #define Dd OP_D, d_mode
108 #define Td OP_T, d_mode
110 #define eAX OP_REG, eAX_reg
111 #define eBX OP_REG, eBX_reg
112 #define eCX OP_REG, eCX_reg
113 #define eDX OP_REG, eDX_reg
114 #define eSP OP_REG, eSP_reg
115 #define eBP OP_REG, eBP_reg
116 #define eSI OP_REG, eSI_reg
117 #define eDI OP_REG, eDI_reg
118 #define AL OP_REG, al_reg
119 #define CL OP_REG, cl_reg
120 #define DL OP_REG, dl_reg
121 #define BL OP_REG, bl_reg
122 #define AH OP_REG, ah_reg
123 #define CH OP_REG, ch_reg
124 #define DH OP_REG, dh_reg
125 #define BH OP_REG, bh_reg
126 #define AX OP_REG, ax_reg
127 #define DX OP_REG, dx_reg
128 #define indirDX OP_REG, indir_dx_reg
130 #define Sw OP_SEG, w_mode
131 #define Ap OP_DIR, lptr
132 #define Av OP_DIR, v_mode
133 #define Ob OP_OFF, b_mode
134 #define Ov OP_OFF, v_mode
135 #define Xb OP_DSSI, b_mode
136 #define Xv OP_DSSI, v_mode
137 #define Yb OP_ESDI, b_mode
138 #define Yv OP_ESDI, v_mode
140 #define es OP_REG, es_reg
141 #define ss OP_REG, ss_reg
142 #define cs OP_REG, cs_reg
143 #define ds OP_REG, ds_reg
144 #define fs OP_REG, fs_reg
145 #define gs OP_REG, gs_reg
148 #define EM OP_EM, v_mode
149 #define MS OP_MS, b_mode
151 typedef int (*op_rtn
) PARAMS ((int bytemode
, int aflag
, int dflag
));
153 static int OP_E
PARAMS ((int, int, int));
154 static int OP_G
PARAMS ((int, int, int));
155 static int OP_I
PARAMS ((int, int, int));
156 static int OP_indirE
PARAMS ((int, int, int));
157 static int OP_sI
PARAMS ((int, int, int));
158 static int OP_REG
PARAMS ((int, int, int));
159 static int OP_J
PARAMS ((int, int, int));
160 static int OP_DIR
PARAMS ((int, int, int));
161 static int OP_OFF
PARAMS ((int, int, int));
162 static int OP_ESDI
PARAMS ((int, int, int));
163 static int OP_DSSI
PARAMS ((int, int, int));
164 static int OP_SEG
PARAMS ((int, int, int));
165 static int OP_C
PARAMS ((int, int, int));
166 static int OP_D
PARAMS ((int, int, int));
167 static int OP_T
PARAMS ((int, int, int));
168 static int OP_rm
PARAMS ((int, int, int));
169 static int OP_ST
PARAMS ((int, int, int));
170 static int OP_STi
PARAMS ((int, int, int));
172 static int OP_ONE
PARAMS ((int, int, int));
174 static int OP_MMX
PARAMS ((int, int, int));
175 static int OP_EM
PARAMS ((int, int, int));
176 static int OP_MS
PARAMS ((int, int, int));
178 static void append_prefix
PARAMS ((void));
179 static void set_op
PARAMS ((int op
));
180 static void putop
PARAMS ((char *template, int aflag
, int dflag
));
181 static void dofloat
PARAMS ((int aflag
, int dflag
));
182 static int get16
PARAMS ((void));
183 static int get32
PARAMS ((void));
184 static void ckprefix
PARAMS ((void));
226 #define indir_dx_reg 150
228 #define GRP1b NULL, NULL, 0
229 #define GRP1S NULL, NULL, 1
230 #define GRP1Ss NULL, NULL, 2
231 #define GRP2b NULL, NULL, 3
232 #define GRP2S NULL, NULL, 4
233 #define GRP2b_one NULL, NULL, 5
234 #define GRP2S_one NULL, NULL, 6
235 #define GRP2b_cl NULL, NULL, 7
236 #define GRP2S_cl NULL, NULL, 8
237 #define GRP3b NULL, NULL, 9
238 #define GRP3S NULL, NULL, 10
239 #define GRP4 NULL, NULL, 11
240 #define GRP5 NULL, NULL, 12
241 #define GRP6 NULL, NULL, 13
242 #define GRP7 NULL, NULL, 14
243 #define GRP8 NULL, NULL, 15
244 #define GRP9 NULL, NULL, 16
245 #define GRP10 NULL, NULL, 17
246 #define GRP11 NULL, NULL, 18
247 #define GRP12 NULL, NULL, 19
250 #define FLOAT NULL, NULL, FLOATCODE
262 static struct dis386 dis386
[] = {
280 { "(bad)" }, /* 0x0f extended opcode escape */
306 { "(bad)" }, /* SEG ES prefix */
315 { "(bad)" }, /* SEG CS prefix */
324 { "(bad)" }, /* SEG SS prefix */
333 { "(bad)" }, /* SEG DS prefix */
374 { "boundS", Gv
, Ma
},
376 { "(bad)" }, /* seg fs */
377 { "(bad)" }, /* seg gs */
378 { "(bad)" }, /* op size prefix */
379 { "(bad)" }, /* adr size prefix */
381 { "pushS", Iv
}, /* 386 book wrong */
382 { "imulS", Gv
, Ev
, Iv
},
383 { "pushS", sIb
}, /* push of byte really pushes 2 or 4 bytes */
384 { "imulS", Gv
, Ev
, Ib
},
385 { "insb", Yb
, indirDX
},
386 { "insS", Yv
, indirDX
},
387 { "outsb", indirDX
, Xb
},
388 { "outsS", indirDX
, Xv
},
427 { "xchgS", eCX
, eAX
},
428 { "xchgS", eDX
, eAX
},
429 { "xchgS", eBX
, eAX
},
430 { "xchgS", eSP
, eAX
},
431 { "xchgS", eBP
, eAX
},
432 { "xchgS", eSI
, eAX
},
433 { "xchgS", eDI
, eAX
},
438 { "(bad)" }, /* fwait */
454 { "testS", eAX
, Iv
},
456 { "stosS", Yv
, eAX
},
458 { "lodsS", eAX
, Xv
},
460 { "scasS", eAX
, Yv
},
529 { "inb", AL
, indirDX
},
530 { "inS", eAX
, indirDX
},
531 { "outb", indirDX
, AL
},
532 { "outS", indirDX
, eAX
},
534 { "(bad)" }, /* lock prefix */
536 { "(bad)" }, /* repne */
537 { "(bad)" }, /* repz */
553 static struct dis386 dis386_twobyte
[] = {
566 { "(bad)" }, { "ud2a" },
567 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
569 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
570 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
572 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
573 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
575 /* these are all backward in appendix A of the intel book */
585 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
586 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
588 { "wrmsr" }, { "rdtsc" }, { "rdmsr" }, { "rdpmc" },
589 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
591 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
592 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
594 { "cmovo", Gv
,Ev
}, { "cmovno", Gv
,Ev
}, { "cmovb", Gv
,Ev
}, { "cmovae", Gv
,Ev
},
595 { "cmove", Gv
,Ev
}, { "cmovne", Gv
,Ev
}, { "cmovbe", Gv
,Ev
}, { "cmova", Gv
,Ev
},
597 { "cmovs", Gv
,Ev
}, { "cmovns", Gv
,Ev
}, { "cmovp", Gv
,Ev
}, { "cmovnp", Gv
,Ev
},
598 { "cmovl", Gv
,Ev
}, { "cmovge", Gv
,Ev
}, { "cmovle", Gv
,Ev
}, { "cmovg", Gv
,Ev
},
600 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
601 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
603 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
604 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
606 { "punpcklbw", MX
, EM
},
607 { "punpcklwd", MX
, EM
},
608 { "punpckldq", MX
, EM
},
609 { "packsswb", MX
, EM
},
610 { "pcmpgtb", MX
, EM
},
611 { "pcmpgtw", MX
, EM
},
612 { "pcmpgtd", MX
, EM
},
613 { "packuswb", MX
, EM
},
615 { "punpckhbw", MX
, EM
},
616 { "punpckhwd", MX
, EM
},
617 { "punpckhdq", MX
, EM
},
618 { "packssdw", MX
, EM
},
619 { "(bad)" }, { "(bad)" },
627 { "pcmpeqb", MX
, EM
},
628 { "pcmpeqw", MX
, EM
},
629 { "pcmpeqd", MX
, EM
},
632 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
633 { "(bad)" }, { "(bad)" },
677 { "shldS", Ev
, Gv
, Ib
},
678 { "shldS", Ev
, Gv
, CL
},
686 { "shrdS", Ev
, Gv
, Ib
},
687 { "shrdS", Ev
, Gv
, CL
},
691 { "cmpxchgb", Eb
, Gb
},
692 { "cmpxchgS", Ev
, Gv
},
693 { "lssS", Gv
, Mp
}, /* 386 lists only Mp */
695 { "lfsS", Gv
, Mp
}, /* 386 lists only Mp */
696 { "lgsS", Gv
, Mp
}, /* 386 lists only Mp */
697 { "movzbS", Gv
, Eb
},
698 { "movzwS", Gv
, Ew
},
706 { "movsbS", Gv
, Eb
},
707 { "movswS", Gv
, Ew
},
732 { "pmullw", MX
, EM
},
733 { "(bad)" }, { "(bad)" },
735 { "psubusb", MX
, EM
},
736 { "psubusw", MX
, EM
},
739 { "paddusb", MX
, EM
},
740 { "paddusw", MX
, EM
},
749 { "pmulhw", MX
, EM
},
750 { "(bad)" }, { "(bad)" },
752 { "psubsb", MX
, EM
},
753 { "psubsw", MX
, EM
},
756 { "paddsb", MX
, EM
},
757 { "paddsw", MX
, EM
},
766 { "pmaddwd", MX
, EM
},
767 { "(bad)" }, { "(bad)" },
779 static const unsigned char onebyte_has_modrm
[256] = {
780 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
781 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
782 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
783 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
784 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
785 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
786 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0,
787 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
788 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
789 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
790 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
791 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
792 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0,
793 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1,
794 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
795 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1
798 static const unsigned char twobyte_has_modrm
[256] = {
799 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
800 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
801 /* 20 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* 2f */
802 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
803 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
804 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
805 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1, /* 6f */
806 /* 70 */ 0,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
807 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
808 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
809 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
810 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
811 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
812 /* d0 */ 0,1,1,1,0,1,0,0,1,1,1,0,1,1,0,1, /* df */
813 /* e0 */ 0,1,1,0,0,1,0,0,1,1,0,1,1,1,0,1, /* ef */
814 /* f0 */ 0,1,1,1,0,1,0,0,1,1,1,0,1,1,1,0 /* ff */
817 static char obuf
[100];
819 static char scratchbuf
[100];
820 static unsigned char *start_codep
;
821 static unsigned char *codep
;
822 static disassemble_info
*the_info
;
826 static void oappend
PARAMS ((char *s
));
828 static char *names32
[]={
829 "%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi",
831 static char *names16
[] = {
832 "%ax","%cx","%dx","%bx","%sp","%bp","%si","%di",
834 static char *names8
[] = {
835 "%al","%cl","%dl","%bl","%ah","%ch","%dh","%bh",
837 static char *names_seg
[] = {
838 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
840 static char *index16
[] = {
841 "bx+si","bx+di","bp+si","bp+di","si","di","bp","bx"
844 static struct dis386 grps
[][8] = {
962 { "imulS", eAX
, Ev
},
964 { "idivS", eAX
, Ev
},
982 { "lcall", indirEv
},
1024 { "cmpxchg8b", Ev
},
1036 { "psrlw", MS
, Ib
},
1038 { "psraw", MS
, Ib
},
1040 { "psllw", MS
, Ib
},
1047 { "psrld", MS
, Ib
},
1049 { "psrad", MS
, Ib
},
1051 { "pslld", MS
, Ib
},
1058 { "psrlq", MS
, Ib
},
1062 { "psllq", MS
, Ib
},
1067 #define PREFIX_REPZ 1
1068 #define PREFIX_REPNZ 2
1069 #define PREFIX_LOCK 4
1071 #define PREFIX_SS 0x10
1072 #define PREFIX_DS 0x20
1073 #define PREFIX_ES 0x40
1074 #define PREFIX_FS 0x80
1075 #define PREFIX_GS 0x100
1076 #define PREFIX_DATA 0x200
1077 #define PREFIX_ADR 0x400
1078 #define PREFIX_FWAIT 0x800
1080 static int prefixes
;
1088 FETCH_DATA (the_info
, codep
+ 1);
1092 prefixes
|= PREFIX_REPZ
;
1095 prefixes
|= PREFIX_REPNZ
;
1098 prefixes
|= PREFIX_LOCK
;
1101 prefixes
|= PREFIX_CS
;
1104 prefixes
|= PREFIX_SS
;
1107 prefixes
|= PREFIX_DS
;
1110 prefixes
|= PREFIX_ES
;
1113 prefixes
|= PREFIX_FS
;
1116 prefixes
|= PREFIX_GS
;
1119 prefixes
|= PREFIX_DATA
;
1122 prefixes
|= PREFIX_ADR
;
1125 prefixes
|= PREFIX_FWAIT
;
1134 static char op1out
[100], op2out
[100], op3out
[100];
1135 static int op_address
[3], op_ad
, op_index
[3];
1136 static int start_pc
;
1140 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1141 * (see topic "Redundant prefixes" in the "Differences from 8086"
1142 * section of the "Virtual 8086 Mode" chapter.)
1143 * 'pc' should be the address of this instruction, it will
1144 * be used to print the target address if this is a relative jump or call
1145 * The function returns the length of this instruction in bytes.
1148 int print_insn_x86
PARAMS ((bfd_vma pc
, disassemble_info
*info
, int aflag
,
1151 print_insn_i386 (pc
, info
)
1153 disassemble_info
*info
;
1155 if (info
->mach
== bfd_mach_i386_i386
)
1156 return print_insn_x86 (pc
, info
, 1, 1);
1157 else if (info
->mach
== bfd_mach_i386_i8086
)
1158 return print_insn_x86 (pc
, info
, 0, 0);
1164 print_insn_x86 (pc
, info
, aflag
, dflag
)
1166 disassemble_info
*info
;
1170 int enter_instruction
;
1171 char *first
, *second
, *third
;
1173 unsigned char need_modrm
;
1175 struct dis_private priv
;
1176 bfd_byte
*inbuf
= priv
.the_buffer
;
1178 /* The output looks better if we put 5 bytes on a line, since that
1179 puts long word instructions on a single line. */
1180 info
->bytes_per_line
= 5;
1182 info
->private_data
= (PTR
) &priv
;
1183 priv
.max_fetched
= priv
.the_buffer
;
1184 priv
.insn_start
= pc
;
1185 if (setjmp (priv
.bailout
) != 0)
1194 op_index
[0] = op_index
[1] = op_index
[2] = -1;
1198 start_codep
= inbuf
;
1203 FETCH_DATA (info
, codep
+ 1);
1205 enter_instruction
= 1;
1207 enter_instruction
= 0;
1211 if (prefixes
& PREFIX_REPZ
)
1213 if (prefixes
& PREFIX_REPNZ
)
1215 if (prefixes
& PREFIX_LOCK
)
1218 if ((prefixes
& PREFIX_FWAIT
)
1219 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
1221 /* fwait not followed by floating point instruction */
1222 (*info
->fprintf_func
) (info
->stream
, "fwait");
1226 if (prefixes
& PREFIX_DATA
)
1229 if (prefixes
& PREFIX_ADR
)
1233 oappend ("addr32 ");
1235 oappend ("addr16 ");
1240 FETCH_DATA (info
, codep
+ 2);
1241 dp
= &dis386_twobyte
[*++codep
];
1242 need_modrm
= twobyte_has_modrm
[*codep
];
1246 dp
= &dis386
[*codep
];
1247 need_modrm
= onebyte_has_modrm
[*codep
];
1253 FETCH_DATA (info
, codep
+ 1);
1254 mod
= (*codep
>> 6) & 3;
1255 reg
= (*codep
>> 3) & 7;
1259 if (dp
->name
== NULL
&& dp
->bytemode1
== FLOATCODE
)
1261 dofloat (aflag
, dflag
);
1265 if (dp
->name
== NULL
)
1266 dp
= &grps
[dp
->bytemode1
][reg
];
1268 putop (dp
->name
, aflag
, dflag
);
1273 (*dp
->op1
)(dp
->bytemode1
, aflag
, dflag
);
1278 (*dp
->op2
)(dp
->bytemode2
, aflag
, dflag
);
1283 (*dp
->op3
)(dp
->bytemode3
, aflag
, dflag
);
1286 obufp
= obuf
+ strlen (obuf
);
1287 for (i
= strlen (obuf
); i
< 6; i
++)
1290 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
1292 /* enter instruction is printed with operands in the
1293 * same order as the intel book; everything else
1294 * is printed in reverse order
1296 if (enter_instruction
)
1301 op_ad
= op_index
[0];
1302 op_index
[0] = op_index
[2];
1303 op_index
[2] = op_ad
;
1314 if (op_index
[0] != -1)
1315 (*info
->print_address_func
) (op_address
[op_index
[0]], info
);
1317 (*info
->fprintf_func
) (info
->stream
, "%s", first
);
1323 (*info
->fprintf_func
) (info
->stream
, ",");
1324 if (op_index
[1] != -1)
1325 (*info
->print_address_func
) (op_address
[op_index
[1]], info
);
1327 (*info
->fprintf_func
) (info
->stream
, "%s", second
);
1333 (*info
->fprintf_func
) (info
->stream
, ",");
1334 if (op_index
[2] != -1)
1335 (*info
->print_address_func
) (op_address
[op_index
[2]], info
);
1337 (*info
->fprintf_func
) (info
->stream
, "%s", third
);
1339 return (codep
- inbuf
);
1342 static char *float_mem
[] = {
1418 #define STi OP_STi, 0
1420 #define FGRPd9_2 NULL, NULL, 0
1421 #define FGRPd9_4 NULL, NULL, 1
1422 #define FGRPd9_5 NULL, NULL, 2
1423 #define FGRPd9_6 NULL, NULL, 3
1424 #define FGRPd9_7 NULL, NULL, 4
1425 #define FGRPda_5 NULL, NULL, 5
1426 #define FGRPdb_4 NULL, NULL, 6
1427 #define FGRPde_3 NULL, NULL, 7
1428 #define FGRPdf_4 NULL, NULL, 8
1430 static struct dis386 float_reg
[][8] = {
1433 { "fadd", ST
, STi
},
1434 { "fmul", ST
, STi
},
1437 { "fsub", ST
, STi
},
1438 { "fsubr", ST
, STi
},
1439 { "fdiv", ST
, STi
},
1440 { "fdivr", ST
, STi
},
1455 { "fcmovb", ST
, STi
},
1456 { "fcmove", ST
, STi
},
1457 { "fcmovbe",ST
, STi
},
1458 { "fcmovu", ST
, STi
},
1466 { "fcmovnb",ST
, STi
},
1467 { "fcmovne",ST
, STi
},
1468 { "fcmovnbe",ST
, STi
},
1469 { "fcmovnu",ST
, STi
},
1471 { "fucomi", ST
, STi
},
1472 { "fcomi", ST
, STi
},
1477 { "fadd", STi
, ST
},
1478 { "fmul", STi
, ST
},
1481 { "fsub", STi
, ST
},
1482 { "fsubr", STi
, ST
},
1483 { "fdiv", STi
, ST
},
1484 { "fdivr", STi
, ST
},
1499 { "faddp", STi
, ST
},
1500 { "fmulp", STi
, ST
},
1503 { "fsubp", STi
, ST
},
1504 { "fsubrp", STi
, ST
},
1505 { "fdivp", STi
, ST
},
1506 { "fdivrp", STi
, ST
},
1515 { "fucomip",ST
, STi
},
1516 { "fcomip", ST
, STi
},
1522 static char *fgrps
[][8] = {
1525 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1530 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
1535 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
1540 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
1545 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
1550 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1555 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
1556 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
1561 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1566 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1571 dofloat (aflag
, dflag
)
1576 unsigned char floatop
;
1578 floatop
= codep
[-1];
1582 putop (float_mem
[(floatop
- 0xd8) * 8 + reg
], aflag
, dflag
);
1584 OP_E (v_mode
, aflag
, dflag
);
1589 dp
= &float_reg
[floatop
- 0xd8][reg
];
1590 if (dp
->name
== NULL
)
1592 putop (fgrps
[dp
->bytemode1
][rm
], aflag
, dflag
);
1593 /* instruction fnstsw is only one with strange arg */
1595 && FETCH_DATA (the_info
, codep
+ 1)
1597 strcpy (op1out
, "%eax");
1601 putop (dp
->name
, aflag
, dflag
);
1604 (*dp
->op1
)(dp
->bytemode1
, aflag
, dflag
);
1607 (*dp
->op2
)(dp
->bytemode2
, aflag
, dflag
);
1613 OP_ST (ignore
, aflag
, dflag
)
1624 OP_STi (ignore
, aflag
, dflag
)
1629 sprintf (scratchbuf
, "%%st(%d)", rm
);
1630 oappend (scratchbuf
);
1635 /* capital letters in template are macros */
1637 putop (template, aflag
, dflag
)
1644 for (p
= template; *p
; p
++)
1651 case 'C': /* For jcxz/jecxz */
1656 if ((prefixes
& PREFIX_FWAIT
) == 0)
1660 /* operand size flag */
1667 /* operand size flag for cwtl, cbtw */
1683 obufp
+= strlen (s
);
1690 if (prefixes
& PREFIX_CS
)
1692 if (prefixes
& PREFIX_DS
)
1694 if (prefixes
& PREFIX_SS
)
1696 if (prefixes
& PREFIX_ES
)
1698 if (prefixes
& PREFIX_FS
)
1700 if (prefixes
& PREFIX_GS
)
1705 OP_indirE (bytemode
, aflag
, dflag
)
1711 return OP_E (bytemode
, aflag
, dflag
);
1715 OP_E (bytemode
, aflag
, dflag
)
1722 /* skip mod/rm byte */
1730 oappend (names8
[rm
]);
1733 oappend (names16
[rm
]);
1737 oappend (names32
[rm
]);
1739 oappend (names16
[rm
]);
1742 oappend ("<bad dis table>");
1751 if (aflag
) /* 32 bit address mode */
1766 FETCH_DATA (the_info
, codep
+ 1);
1767 scale
= (*codep
>> 6) & 3;
1768 index
= (*codep
>> 3) & 7;
1783 FETCH_DATA (the_info
, codep
+ 1);
1784 disp
= *(char *)codep
++;
1791 if (mod
!= 0 || base
== 5)
1793 sprintf (scratchbuf
, "0x%x", disp
);
1794 oappend (scratchbuf
);
1797 if (havebase
|| (havesib
&& (index
!= 4 || scale
!= 0)))
1801 oappend (names32
[base
]);
1806 sprintf (scratchbuf
, ",%s", names32
[index
]);
1807 oappend (scratchbuf
);
1809 sprintf (scratchbuf
, ",%d", 1 << scale
);
1810 oappend (scratchbuf
);
1816 { /* 16 bit address mode */
1821 disp
= (short) get16 ();
1824 FETCH_DATA (the_info
, codep
+ 1);
1825 disp
= *(char *)codep
++;
1828 disp
= (short) get16 ();
1832 if (mod
!= 0 || rm
== 6)
1834 sprintf (scratchbuf
, "0x%x", disp
);
1835 oappend (scratchbuf
);
1838 if (mod
!= 0 || rm
!= 6)
1841 oappend (index16
[rm
]);
1849 OP_G (bytemode
, aflag
, dflag
)
1857 oappend (names8
[reg
]);
1860 oappend (names16
[reg
]);
1863 oappend (names32
[reg
]);
1867 oappend (names32
[reg
]);
1869 oappend (names16
[reg
]);
1872 oappend ("<internal disassembler error>");
1883 FETCH_DATA (the_info
, codep
+ 4);
1884 x
= *codep
++ & 0xff;
1885 x
|= (*codep
++ & 0xff) << 8;
1886 x
|= (*codep
++ & 0xff) << 16;
1887 x
|= (*codep
++ & 0xff) << 24;
1896 FETCH_DATA (the_info
, codep
+ 2);
1897 x
= *codep
++ & 0xff;
1898 x
|= (*codep
++ & 0xff) << 8;
1906 op_index
[op_ad
] = op_ad
;
1907 op_address
[op_ad
] = op
;
1911 OP_REG (code
, aflag
, dflag
)
1920 case indir_dx_reg
: s
= "(%dx)"; break;
1921 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
1922 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
1923 s
= names16
[code
- ax_reg
];
1925 case es_reg
: case ss_reg
: case cs_reg
:
1926 case ds_reg
: case fs_reg
: case gs_reg
:
1927 s
= names_seg
[code
- es_reg
];
1929 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
1930 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
1931 s
= names8
[code
- al_reg
];
1933 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
1934 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
1936 s
= names32
[code
- eAX_reg
];
1938 s
= names16
[code
- eAX_reg
];
1941 s
= "<internal disassembler error>";
1949 OP_I (bytemode
, aflag
, dflag
)
1959 FETCH_DATA (the_info
, codep
+ 1);
1960 op
= *codep
++ & 0xff;
1972 oappend ("<internal disassembler error>");
1975 sprintf (scratchbuf
, "$0x%x", op
);
1976 oappend (scratchbuf
);
1981 OP_sI (bytemode
, aflag
, dflag
)
1991 FETCH_DATA (the_info
, codep
+ 1);
1992 op
= *(char *)codep
++;
1998 op
= (short)get16();
2001 op
= (short)get16 ();
2004 oappend ("<internal disassembler error>");
2007 sprintf (scratchbuf
, "$0x%x", op
);
2008 oappend (scratchbuf
);
2013 OP_J (bytemode
, aflag
, dflag
)
2024 FETCH_DATA (the_info
, codep
+ 1);
2025 disp
= *(char *)codep
++;
2032 disp
= (short)get16 ();
2033 /* for some reason, a data16 prefix on a jump instruction
2034 means that the pc is masked to 16 bits after the
2035 displacement is added! */
2040 oappend ("<internal disassembler error>");
2043 disp
= (start_pc
+ codep
- start_codep
+ disp
) & mask
;
2045 sprintf (scratchbuf
, "0x%x", disp
);
2046 oappend (scratchbuf
);
2052 OP_SEG (dummy
, aflag
, dflag
)
2057 static char *sreg
[] = {
2058 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
2061 oappend (sreg
[reg
]);
2066 OP_DIR (size
, aflag
, dflag
)
2086 sprintf (scratchbuf
, "0x%x,0x%x", seg
, offset
);
2087 oappend (scratchbuf
);
2093 offset
= (short)get16 ();
2095 offset
= start_pc
+ codep
- start_codep
+ offset
;
2097 sprintf (scratchbuf
, "0x%x", offset
);
2098 oappend (scratchbuf
);
2101 oappend ("<internal disassembler error>");
2109 OP_OFF (bytemode
, aflag
, dflag
)
2123 sprintf (scratchbuf
, "0x%x", off
);
2124 oappend (scratchbuf
);
2130 OP_ESDI (dummy
, aflag
, dflag
)
2136 oappend (aflag
? "%edi" : "%di");
2143 OP_DSSI (dummy
, aflag
, dflag
)
2149 oappend (aflag
? "%esi" : "%si");
2159 OP_ONE (dummy
, aflag
, dflag
)
2172 OP_C (dummy
, aflag
, dflag
)
2177 codep
++; /* skip mod/rm */
2178 sprintf (scratchbuf
, "%%cr%d", reg
);
2179 oappend (scratchbuf
);
2185 OP_D (dummy
, aflag
, dflag
)
2190 codep
++; /* skip mod/rm */
2191 sprintf (scratchbuf
, "%%db%d", reg
);
2192 oappend (scratchbuf
);
2198 OP_T (dummy
, aflag
, dflag
)
2203 codep
++; /* skip mod/rm */
2204 sprintf (scratchbuf
, "%%tr%d", reg
);
2205 oappend (scratchbuf
);
2210 OP_rm (bytemode
, aflag
, dflag
)
2218 oappend (names32
[rm
]);
2221 oappend (names16
[rm
]);
2228 OP_MMX (bytemode
, aflag
, dflag
)
2233 sprintf (scratchbuf
, "%%mm%d", reg
);
2234 oappend (scratchbuf
);
2239 OP_EM (bytemode
, aflag
, dflag
)
2245 return OP_E (bytemode
, aflag
, dflag
);
2248 sprintf (scratchbuf
, "%%mm%d", rm
);
2249 oappend (scratchbuf
);
2254 OP_MS (bytemode
, aflag
, dflag
)
2260 sprintf (scratchbuf
, "%%mm%d", rm
);
2261 oappend (scratchbuf
);
This page took 0.075322 seconds and 4 git commands to generate.