1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
24 * modified by John Hassey (hassey@dg-rtp.dg.com)
25 * x86-64 support added by Jan Hubicka (jh@suse.cz)
29 * The main tables describing the instructions is essentially a copy
30 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
31 * Programmers Manual. Usually, there is a capital letter, followed
32 * by a small letter. The capital letter tell the addressing mode,
33 * and the small letter tells about the operand size. Refer to
34 * the Intel manual for details.
45 #ifndef UNIXWARE_COMPAT
46 /* Set non-zero for broken, compatible instructions. Set to zero for
47 non-broken opcodes. */
48 #define UNIXWARE_COMPAT 1
51 static int fetch_data
PARAMS ((struct disassemble_info
*, bfd_byte
*));
52 static void ckprefix
PARAMS ((void));
53 static const char *prefix_name
PARAMS ((int, int));
54 static int print_insn
PARAMS ((bfd_vma
, disassemble_info
*));
55 static void dofloat
PARAMS ((int));
56 static void OP_ST
PARAMS ((int, int));
57 static void OP_STi
PARAMS ((int, int));
58 static int putop
PARAMS ((const char *, int));
59 static void oappend
PARAMS ((const char *));
60 static void append_seg
PARAMS ((void));
61 static void OP_indirE
PARAMS ((int, int));
62 static void print_operand_value
PARAMS ((char *, int, bfd_vma
));
63 static void OP_E
PARAMS ((int, int));
64 static void OP_G
PARAMS ((int, int));
65 static bfd_vma get64
PARAMS ((void));
66 static bfd_signed_vma get32
PARAMS ((void));
67 static bfd_signed_vma get32s
PARAMS ((void));
68 static int get16
PARAMS ((void));
69 static void set_op
PARAMS ((bfd_vma
, int));
70 static void OP_REG
PARAMS ((int, int));
71 static void OP_IMREG
PARAMS ((int, int));
72 static void OP_I
PARAMS ((int, int));
73 static void OP_I64
PARAMS ((int, int));
74 static void OP_sI
PARAMS ((int, int));
75 static void OP_J
PARAMS ((int, int));
76 static void OP_SEG
PARAMS ((int, int));
77 static void OP_DIR
PARAMS ((int, int));
78 static void OP_OFF
PARAMS ((int, int));
79 static void OP_OFF64
PARAMS ((int, int));
80 static void ptr_reg
PARAMS ((int, int));
81 static void OP_ESreg
PARAMS ((int, int));
82 static void OP_DSreg
PARAMS ((int, int));
83 static void OP_C
PARAMS ((int, int));
84 static void OP_D
PARAMS ((int, int));
85 static void OP_T
PARAMS ((int, int));
86 static void OP_Rd
PARAMS ((int, int));
87 static void OP_MMX
PARAMS ((int, int));
88 static void OP_XMM
PARAMS ((int, int));
89 static void OP_EM
PARAMS ((int, int));
90 static void OP_EX
PARAMS ((int, int));
91 static void OP_MS
PARAMS ((int, int));
92 static void OP_XS
PARAMS ((int, int));
93 static void OP_3DNowSuffix
PARAMS ((int, int));
94 static void OP_SIMD_Suffix
PARAMS ((int, int));
95 static void SIMD_Fixup
PARAMS ((int, int));
96 static void PNI_Fixup
PARAMS ((int, int));
97 static void BadOp
PARAMS ((void));
100 /* Points to first byte not fetched. */
101 bfd_byte
*max_fetched
;
102 bfd_byte the_buffer
[MAXLEN
];
108 /* The opcode for the fwait instruction, which we treat as a prefix
110 #define FWAIT_OPCODE (0x9b)
112 /* Set to 1 for 64bit mode disassembly. */
113 static int mode_64bit
;
115 /* Flags for the prefixes for the current instruction. See below. */
118 /* REX prefix the current instruction. See below. */
120 /* Bits of REX we've already used. */
126 /* Mark parts used in the REX prefix. When we are testing for
127 empty prefix (for 8bit register REX extension), just mask it
128 out. Otherwise test for REX bit is excuse for existence of REX
129 only in case value is nonzero. */
130 #define USED_REX(value) \
133 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
138 /* Flags for prefixes which we somehow handled when printing the
139 current instruction. */
140 static int used_prefixes
;
142 /* Flags stored in PREFIXES. */
143 #define PREFIX_REPZ 1
144 #define PREFIX_REPNZ 2
145 #define PREFIX_LOCK 4
147 #define PREFIX_SS 0x10
148 #define PREFIX_DS 0x20
149 #define PREFIX_ES 0x40
150 #define PREFIX_FS 0x80
151 #define PREFIX_GS 0x100
152 #define PREFIX_DATA 0x200
153 #define PREFIX_ADDR 0x400
154 #define PREFIX_FWAIT 0x800
156 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
157 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
159 #define FETCH_DATA(info, addr) \
160 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
161 ? 1 : fetch_data ((info), (addr)))
164 fetch_data (info
, addr
)
165 struct disassemble_info
*info
;
169 struct dis_private
*priv
= (struct dis_private
*) info
->private_data
;
170 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
172 status
= (*info
->read_memory_func
) (start
,
174 addr
- priv
->max_fetched
,
178 /* If we did manage to read at least one byte, then
179 print_insn_i386 will do something sensible. Otherwise, print
180 an error. We do that here because this is where we know
182 if (priv
->max_fetched
== priv
->the_buffer
)
183 (*info
->memory_error_func
) (status
, start
, info
);
184 longjmp (priv
->bailout
, 1);
187 priv
->max_fetched
= addr
;
193 #define Eb OP_E, b_mode
194 #define Ev OP_E, v_mode
195 #define Ed OP_E, d_mode
196 #define Edq OP_E, dq_mode
197 #define indirEb OP_indirE, b_mode
198 #define indirEv OP_indirE, v_mode
199 #define Ew OP_E, w_mode
200 #define Ma OP_E, v_mode
201 #define M OP_E, 0 /* lea, lgdt, etc. */
202 #define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
203 #define Gb OP_G, b_mode
204 #define Gv OP_G, v_mode
205 #define Gd OP_G, d_mode
206 #define Gw OP_G, w_mode
207 #define Rd OP_Rd, d_mode
208 #define Rm OP_Rd, m_mode
209 #define Ib OP_I, b_mode
210 #define sIb OP_sI, b_mode /* sign extened byte */
211 #define Iv OP_I, v_mode
212 #define Iq OP_I, q_mode
213 #define Iv64 OP_I64, v_mode
214 #define Iw OP_I, w_mode
215 #define Jb OP_J, b_mode
216 #define Jv OP_J, v_mode
217 #define Cm OP_C, m_mode
218 #define Dm OP_D, m_mode
219 #define Td OP_T, d_mode
221 #define RMeAX OP_REG, eAX_reg
222 #define RMeBX OP_REG, eBX_reg
223 #define RMeCX OP_REG, eCX_reg
224 #define RMeDX OP_REG, eDX_reg
225 #define RMeSP OP_REG, eSP_reg
226 #define RMeBP OP_REG, eBP_reg
227 #define RMeSI OP_REG, eSI_reg
228 #define RMeDI OP_REG, eDI_reg
229 #define RMrAX OP_REG, rAX_reg
230 #define RMrBX OP_REG, rBX_reg
231 #define RMrCX OP_REG, rCX_reg
232 #define RMrDX OP_REG, rDX_reg
233 #define RMrSP OP_REG, rSP_reg
234 #define RMrBP OP_REG, rBP_reg
235 #define RMrSI OP_REG, rSI_reg
236 #define RMrDI OP_REG, rDI_reg
237 #define RMAL OP_REG, al_reg
238 #define RMAL OP_REG, al_reg
239 #define RMCL OP_REG, cl_reg
240 #define RMDL OP_REG, dl_reg
241 #define RMBL OP_REG, bl_reg
242 #define RMAH OP_REG, ah_reg
243 #define RMCH OP_REG, ch_reg
244 #define RMDH OP_REG, dh_reg
245 #define RMBH OP_REG, bh_reg
246 #define RMAX OP_REG, ax_reg
247 #define RMDX OP_REG, dx_reg
249 #define eAX OP_IMREG, eAX_reg
250 #define eBX OP_IMREG, eBX_reg
251 #define eCX OP_IMREG, eCX_reg
252 #define eDX OP_IMREG, eDX_reg
253 #define eSP OP_IMREG, eSP_reg
254 #define eBP OP_IMREG, eBP_reg
255 #define eSI OP_IMREG, eSI_reg
256 #define eDI OP_IMREG, eDI_reg
257 #define AL OP_IMREG, al_reg
258 #define AL OP_IMREG, al_reg
259 #define CL OP_IMREG, cl_reg
260 #define DL OP_IMREG, dl_reg
261 #define BL OP_IMREG, bl_reg
262 #define AH OP_IMREG, ah_reg
263 #define CH OP_IMREG, ch_reg
264 #define DH OP_IMREG, dh_reg
265 #define BH OP_IMREG, bh_reg
266 #define AX OP_IMREG, ax_reg
267 #define DX OP_IMREG, dx_reg
268 #define indirDX OP_IMREG, indir_dx_reg
270 #define Sw OP_SEG, w_mode
272 #define Ob OP_OFF, b_mode
273 #define Ob64 OP_OFF64, b_mode
274 #define Ov OP_OFF, v_mode
275 #define Ov64 OP_OFF64, v_mode
276 #define Xb OP_DSreg, eSI_reg
277 #define Xv OP_DSreg, eSI_reg
278 #define Yb OP_ESreg, eDI_reg
279 #define Yv OP_ESreg, eDI_reg
280 #define DSBX OP_DSreg, eBX_reg
282 #define es OP_REG, es_reg
283 #define ss OP_REG, ss_reg
284 #define cs OP_REG, cs_reg
285 #define ds OP_REG, ds_reg
286 #define fs OP_REG, fs_reg
287 #define gs OP_REG, gs_reg
291 #define EM OP_EM, v_mode
292 #define EX OP_EX, v_mode
293 #define MS OP_MS, v_mode
294 #define XS OP_XS, v_mode
296 #define OPSUF OP_3DNowSuffix, 0
297 #define OPSIMD OP_SIMD_Suffix, 0
299 #define cond_jump_flag NULL, cond_jump_mode
300 #define loop_jcxz_flag NULL, loop_jcxz_mode
302 /* bits in sizeflag */
303 #define SUFFIX_ALWAYS 4
307 #define b_mode 1 /* byte operand */
308 #define v_mode 2 /* operand size depends on prefixes */
309 #define w_mode 3 /* word operand */
310 #define d_mode 4 /* double word operand */
311 #define q_mode 5 /* quad word operand */
313 #define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */
314 #define cond_jump_mode 8
315 #define loop_jcxz_mode 9
316 #define dq_mode 10 /* operand size depends on REX prefixes. */
361 #define indir_dx_reg 150
365 #define USE_PREFIX_USER_TABLE 3
366 #define X86_64_SPECIAL 4
368 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
370 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
371 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
372 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
373 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
374 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
375 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
376 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
377 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
378 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
379 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
380 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
381 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
382 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
383 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
384 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
385 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
386 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
387 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
388 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
389 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
390 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
391 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
392 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
394 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
395 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
396 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
397 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
398 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
399 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
400 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
401 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
402 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
403 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
404 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
405 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
406 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
407 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
408 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
409 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
410 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
411 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
412 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
413 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
414 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
415 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
416 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
417 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
418 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
419 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
420 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
421 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
422 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
423 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
424 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
425 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
426 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
428 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
430 typedef void (*op_rtn
) PARAMS ((int bytemode
, int sizeflag
));
442 /* Upper case letters in the instruction names here are macros.
443 'A' => print 'b' if no register operands or suffix_always is true
444 'B' => print 'b' if suffix_always is true
445 'E' => print 'e' if 32-bit form of jcxz
446 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
447 'H' => print ",pt" or ",pn" branch hint
448 'L' => print 'l' if suffix_always is true
449 'N' => print 'n' if instruction has no wait "prefix"
450 'O' => print 'd', or 'o'
451 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
452 . or suffix_always is true. print 'q' if rex prefix is present.
453 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
455 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
456 'S' => print 'w', 'l' or 'q' if suffix_always is true
457 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
458 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
459 'X' => print 's', 'd' depending on data16 prefix (for XMM)
460 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
461 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
463 Many of the above letters print nothing in Intel mode. See "putop"
466 Braces '{' and '}', and vertical bars '|', indicate alternative
467 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
468 modes. In cases where there are only two alternatives, the X86_64
469 instruction is reserved, and "(bad)" is printed.
472 static const struct dis386 dis386
[] = {
474 { "addB", Eb
, Gb
, XX
},
475 { "addS", Ev
, Gv
, XX
},
476 { "addB", Gb
, Eb
, XX
},
477 { "addS", Gv
, Ev
, XX
},
478 { "addB", AL
, Ib
, XX
},
479 { "addS", eAX
, Iv
, XX
},
480 { "push{T|}", es
, XX
, XX
},
481 { "pop{T|}", es
, XX
, XX
},
483 { "orB", Eb
, Gb
, XX
},
484 { "orS", Ev
, Gv
, XX
},
485 { "orB", Gb
, Eb
, XX
},
486 { "orS", Gv
, Ev
, XX
},
487 { "orB", AL
, Ib
, XX
},
488 { "orS", eAX
, Iv
, XX
},
489 { "push{T|}", cs
, XX
, XX
},
490 { "(bad)", XX
, XX
, XX
}, /* 0x0f extended opcode escape */
492 { "adcB", Eb
, Gb
, XX
},
493 { "adcS", Ev
, Gv
, XX
},
494 { "adcB", Gb
, Eb
, XX
},
495 { "adcS", Gv
, Ev
, XX
},
496 { "adcB", AL
, Ib
, XX
},
497 { "adcS", eAX
, Iv
, XX
},
498 { "push{T|}", ss
, XX
, XX
},
499 { "popT|}", ss
, XX
, XX
},
501 { "sbbB", Eb
, Gb
, XX
},
502 { "sbbS", Ev
, Gv
, XX
},
503 { "sbbB", Gb
, Eb
, XX
},
504 { "sbbS", Gv
, Ev
, XX
},
505 { "sbbB", AL
, Ib
, XX
},
506 { "sbbS", eAX
, Iv
, XX
},
507 { "push{T|}", ds
, XX
, XX
},
508 { "pop{T|}", ds
, XX
, XX
},
510 { "andB", Eb
, Gb
, XX
},
511 { "andS", Ev
, Gv
, XX
},
512 { "andB", Gb
, Eb
, XX
},
513 { "andS", Gv
, Ev
, XX
},
514 { "andB", AL
, Ib
, XX
},
515 { "andS", eAX
, Iv
, XX
},
516 { "(bad)", XX
, XX
, XX
}, /* SEG ES prefix */
517 { "daa{|}", XX
, XX
, XX
},
519 { "subB", Eb
, Gb
, XX
},
520 { "subS", Ev
, Gv
, XX
},
521 { "subB", Gb
, Eb
, XX
},
522 { "subS", Gv
, Ev
, XX
},
523 { "subB", AL
, Ib
, XX
},
524 { "subS", eAX
, Iv
, XX
},
525 { "(bad)", XX
, XX
, XX
}, /* SEG CS prefix */
526 { "das{|}", XX
, XX
, XX
},
528 { "xorB", Eb
, Gb
, XX
},
529 { "xorS", Ev
, Gv
, XX
},
530 { "xorB", Gb
, Eb
, XX
},
531 { "xorS", Gv
, Ev
, XX
},
532 { "xorB", AL
, Ib
, XX
},
533 { "xorS", eAX
, Iv
, XX
},
534 { "(bad)", XX
, XX
, XX
}, /* SEG SS prefix */
535 { "aaa{|}", XX
, XX
, XX
},
537 { "cmpB", Eb
, Gb
, XX
},
538 { "cmpS", Ev
, Gv
, XX
},
539 { "cmpB", Gb
, Eb
, XX
},
540 { "cmpS", Gv
, Ev
, XX
},
541 { "cmpB", AL
, Ib
, XX
},
542 { "cmpS", eAX
, Iv
, XX
},
543 { "(bad)", XX
, XX
, XX
}, /* SEG DS prefix */
544 { "aas{|}", XX
, XX
, XX
},
546 { "inc{S|}", RMeAX
, XX
, XX
},
547 { "inc{S|}", RMeCX
, XX
, XX
},
548 { "inc{S|}", RMeDX
, XX
, XX
},
549 { "inc{S|}", RMeBX
, XX
, XX
},
550 { "inc{S|}", RMeSP
, XX
, XX
},
551 { "inc{S|}", RMeBP
, XX
, XX
},
552 { "inc{S|}", RMeSI
, XX
, XX
},
553 { "inc{S|}", RMeDI
, XX
, XX
},
555 { "dec{S|}", RMeAX
, XX
, XX
},
556 { "dec{S|}", RMeCX
, XX
, XX
},
557 { "dec{S|}", RMeDX
, XX
, XX
},
558 { "dec{S|}", RMeBX
, XX
, XX
},
559 { "dec{S|}", RMeSP
, XX
, XX
},
560 { "dec{S|}", RMeBP
, XX
, XX
},
561 { "dec{S|}", RMeSI
, XX
, XX
},
562 { "dec{S|}", RMeDI
, XX
, XX
},
564 { "pushS", RMrAX
, XX
, XX
},
565 { "pushS", RMrCX
, XX
, XX
},
566 { "pushS", RMrDX
, XX
, XX
},
567 { "pushS", RMrBX
, XX
, XX
},
568 { "pushS", RMrSP
, XX
, XX
},
569 { "pushS", RMrBP
, XX
, XX
},
570 { "pushS", RMrSI
, XX
, XX
},
571 { "pushS", RMrDI
, XX
, XX
},
573 { "popS", RMrAX
, XX
, XX
},
574 { "popS", RMrCX
, XX
, XX
},
575 { "popS", RMrDX
, XX
, XX
},
576 { "popS", RMrBX
, XX
, XX
},
577 { "popS", RMrSP
, XX
, XX
},
578 { "popS", RMrBP
, XX
, XX
},
579 { "popS", RMrSI
, XX
, XX
},
580 { "popS", RMrDI
, XX
, XX
},
582 { "pusha{P|}", XX
, XX
, XX
},
583 { "popa{P|}", XX
, XX
, XX
},
584 { "bound{S|}", Gv
, Ma
, XX
},
586 { "(bad)", XX
, XX
, XX
}, /* seg fs */
587 { "(bad)", XX
, XX
, XX
}, /* seg gs */
588 { "(bad)", XX
, XX
, XX
}, /* op size prefix */
589 { "(bad)", XX
, XX
, XX
}, /* adr size prefix */
591 { "pushT", Iq
, XX
, XX
},
592 { "imulS", Gv
, Ev
, Iv
},
593 { "pushT", sIb
, XX
, XX
},
594 { "imulS", Gv
, Ev
, sIb
},
595 { "ins{b||b|}", Yb
, indirDX
, XX
},
596 { "ins{R||R|}", Yv
, indirDX
, XX
},
597 { "outs{b||b|}", indirDX
, Xb
, XX
},
598 { "outs{R||R|}", indirDX
, Xv
, XX
},
600 { "joH", Jb
, XX
, cond_jump_flag
},
601 { "jnoH", Jb
, XX
, cond_jump_flag
},
602 { "jbH", Jb
, XX
, cond_jump_flag
},
603 { "jaeH", Jb
, XX
, cond_jump_flag
},
604 { "jeH", Jb
, XX
, cond_jump_flag
},
605 { "jneH", Jb
, XX
, cond_jump_flag
},
606 { "jbeH", Jb
, XX
, cond_jump_flag
},
607 { "jaH", Jb
, XX
, cond_jump_flag
},
609 { "jsH", Jb
, XX
, cond_jump_flag
},
610 { "jnsH", Jb
, XX
, cond_jump_flag
},
611 { "jpH", Jb
, XX
, cond_jump_flag
},
612 { "jnpH", Jb
, XX
, cond_jump_flag
},
613 { "jlH", Jb
, XX
, cond_jump_flag
},
614 { "jgeH", Jb
, XX
, cond_jump_flag
},
615 { "jleH", Jb
, XX
, cond_jump_flag
},
616 { "jgH", Jb
, XX
, cond_jump_flag
},
620 { "(bad)", XX
, XX
, XX
},
622 { "testB", Eb
, Gb
, XX
},
623 { "testS", Ev
, Gv
, XX
},
624 { "xchgB", Eb
, Gb
, XX
},
625 { "xchgS", Ev
, Gv
, XX
},
627 { "movB", Eb
, Gb
, XX
},
628 { "movS", Ev
, Gv
, XX
},
629 { "movB", Gb
, Eb
, XX
},
630 { "movS", Gv
, Ev
, XX
},
631 { "movQ", Ev
, Sw
, XX
},
632 { "leaS", Gv
, M
, XX
},
633 { "movQ", Sw
, Ev
, XX
},
634 { "popU", Ev
, XX
, XX
},
636 { "nop", XX
, XX
, XX
},
637 /* FIXME: NOP with REPz prefix is called PAUSE. */
638 { "xchgS", RMeCX
, eAX
, XX
},
639 { "xchgS", RMeDX
, eAX
, XX
},
640 { "xchgS", RMeBX
, eAX
, XX
},
641 { "xchgS", RMeSP
, eAX
, XX
},
642 { "xchgS", RMeBP
, eAX
, XX
},
643 { "xchgS", RMeSI
, eAX
, XX
},
644 { "xchgS", RMeDI
, eAX
, XX
},
646 { "cW{tR||tR|}", XX
, XX
, XX
},
647 { "cR{tO||tO|}", XX
, XX
, XX
},
648 { "lcall{T|}", Ap
, XX
, XX
},
649 { "(bad)", XX
, XX
, XX
}, /* fwait */
650 { "pushfT", XX
, XX
, XX
},
651 { "popfT", XX
, XX
, XX
},
652 { "sahf{|}", XX
, XX
, XX
},
653 { "lahf{|}", XX
, XX
, XX
},
655 { "movB", AL
, Ob64
, XX
},
656 { "movS", eAX
, Ov64
, XX
},
657 { "movB", Ob64
, AL
, XX
},
658 { "movS", Ov64
, eAX
, XX
},
659 { "movs{b||b|}", Yb
, Xb
, XX
},
660 { "movs{R||R|}", Yv
, Xv
, XX
},
661 { "cmps{b||b|}", Xb
, Yb
, XX
},
662 { "cmps{R||R|}", Xv
, Yv
, XX
},
664 { "testB", AL
, Ib
, XX
},
665 { "testS", eAX
, Iv
, XX
},
666 { "stosB", Yb
, AL
, XX
},
667 { "stosS", Yv
, eAX
, XX
},
668 { "lodsB", AL
, Xb
, XX
},
669 { "lodsS", eAX
, Xv
, XX
},
670 { "scasB", AL
, Yb
, XX
},
671 { "scasS", eAX
, Yv
, XX
},
673 { "movB", RMAL
, Ib
, XX
},
674 { "movB", RMCL
, Ib
, XX
},
675 { "movB", RMDL
, Ib
, XX
},
676 { "movB", RMBL
, Ib
, XX
},
677 { "movB", RMAH
, Ib
, XX
},
678 { "movB", RMCH
, Ib
, XX
},
679 { "movB", RMDH
, Ib
, XX
},
680 { "movB", RMBH
, Ib
, XX
},
682 { "movS", RMeAX
, Iv64
, XX
},
683 { "movS", RMeCX
, Iv64
, XX
},
684 { "movS", RMeDX
, Iv64
, XX
},
685 { "movS", RMeBX
, Iv64
, XX
},
686 { "movS", RMeSP
, Iv64
, XX
},
687 { "movS", RMeBP
, Iv64
, XX
},
688 { "movS", RMeSI
, Iv64
, XX
},
689 { "movS", RMeDI
, Iv64
, XX
},
693 { "retT", Iw
, XX
, XX
},
694 { "retT", XX
, XX
, XX
},
695 { "les{S|}", Gv
, Mp
, XX
},
696 { "ldsS", Gv
, Mp
, XX
},
697 { "movA", Eb
, Ib
, XX
},
698 { "movQ", Ev
, Iv
, XX
},
700 { "enterT", Iw
, Ib
, XX
},
701 { "leaveT", XX
, XX
, XX
},
702 { "lretP", Iw
, XX
, XX
},
703 { "lretP", XX
, XX
, XX
},
704 { "int3", XX
, XX
, XX
},
705 { "int", Ib
, XX
, XX
},
706 { "into{|}", XX
, XX
, XX
},
707 { "iretP", XX
, XX
, XX
},
713 { "aam{|}", sIb
, XX
, XX
},
714 { "aad{|}", sIb
, XX
, XX
},
715 { "(bad)", XX
, XX
, XX
},
716 { "xlat", DSBX
, XX
, XX
},
727 { "loopneFH", Jb
, XX
, loop_jcxz_flag
},
728 { "loopeFH", Jb
, XX
, loop_jcxz_flag
},
729 { "loopFH", Jb
, XX
, loop_jcxz_flag
},
730 { "jEcxzH", Jb
, XX
, loop_jcxz_flag
},
731 { "inB", AL
, Ib
, XX
},
732 { "inS", eAX
, Ib
, XX
},
733 { "outB", Ib
, AL
, XX
},
734 { "outS", Ib
, eAX
, XX
},
736 { "callT", Jv
, XX
, XX
},
737 { "jmpT", Jv
, XX
, XX
},
738 { "ljmp{T|}", Ap
, XX
, XX
},
739 { "jmp", Jb
, XX
, XX
},
740 { "inB", AL
, indirDX
, XX
},
741 { "inS", eAX
, indirDX
, XX
},
742 { "outB", indirDX
, AL
, XX
},
743 { "outS", indirDX
, eAX
, XX
},
745 { "(bad)", XX
, XX
, XX
}, /* lock prefix */
746 { "icebp", XX
, XX
, XX
},
747 { "(bad)", XX
, XX
, XX
}, /* repne */
748 { "(bad)", XX
, XX
, XX
}, /* repz */
749 { "hlt", XX
, XX
, XX
},
750 { "cmc", XX
, XX
, XX
},
754 { "clc", XX
, XX
, XX
},
755 { "stc", XX
, XX
, XX
},
756 { "cli", XX
, XX
, XX
},
757 { "sti", XX
, XX
, XX
},
758 { "cld", XX
, XX
, XX
},
759 { "std", XX
, XX
, XX
},
764 static const struct dis386 dis386_twobyte
[] = {
768 { "larS", Gv
, Ew
, XX
},
769 { "lslS", Gv
, Ew
, XX
},
770 { "(bad)", XX
, XX
, XX
},
771 { "syscall", XX
, XX
, XX
},
772 { "clts", XX
, XX
, XX
},
773 { "sysretP", XX
, XX
, XX
},
775 { "invd", XX
, XX
, XX
},
776 { "wbinvd", XX
, XX
, XX
},
777 { "(bad)", XX
, XX
, XX
},
778 { "ud2a", XX
, XX
, XX
},
779 { "(bad)", XX
, XX
, XX
},
781 { "femms", XX
, XX
, XX
},
782 { "", MX
, EM
, OPSUF
}, /* See OP_3DNowSuffix. */
787 { "movlpX", EX
, XM
, SIMD_Fixup
, 'h' },
788 { "unpcklpX", XM
, EX
, XX
},
789 { "unpckhpX", XM
, EX
, XX
},
791 { "movhpX", EX
, XM
, SIMD_Fixup
, 'l' },
794 { "(bad)", XX
, XX
, XX
},
795 { "(bad)", XX
, XX
, XX
},
796 { "(bad)", XX
, XX
, XX
},
797 { "(bad)", XX
, XX
, XX
},
798 { "(bad)", XX
, XX
, XX
},
799 { "(bad)", XX
, XX
, XX
},
800 { "(bad)", XX
, XX
, XX
},
802 { "movL", Rm
, Cm
, XX
},
803 { "movL", Rm
, Dm
, XX
},
804 { "movL", Cm
, Rm
, XX
},
805 { "movL", Dm
, Rm
, XX
},
806 { "movL", Rd
, Td
, XX
},
807 { "(bad)", XX
, XX
, XX
},
808 { "movL", Td
, Rd
, XX
},
809 { "(bad)", XX
, XX
, XX
},
811 { "movapX", XM
, EX
, XX
},
812 { "movapX", EX
, XM
, XX
},
814 { "movntpX", Ev
, XM
, XX
},
817 { "ucomisX", XM
,EX
, XX
},
818 { "comisX", XM
,EX
, XX
},
820 { "wrmsr", XX
, XX
, XX
},
821 { "rdtsc", XX
, XX
, XX
},
822 { "rdmsr", XX
, XX
, XX
},
823 { "rdpmc", XX
, XX
, XX
},
824 { "sysenter", XX
, XX
, XX
},
825 { "sysexit", XX
, XX
, XX
},
826 { "(bad)", XX
, XX
, XX
},
827 { "(bad)", XX
, XX
, XX
},
829 { "(bad)", XX
, XX
, XX
},
830 { "(bad)", XX
, XX
, XX
},
831 { "(bad)", XX
, XX
, XX
},
832 { "(bad)", XX
, XX
, XX
},
833 { "(bad)", XX
, XX
, XX
},
834 { "(bad)", XX
, XX
, XX
},
835 { "(bad)", XX
, XX
, XX
},
836 { "(bad)", XX
, XX
, XX
},
838 { "cmovo", Gv
, Ev
, XX
},
839 { "cmovno", Gv
, Ev
, XX
},
840 { "cmovb", Gv
, Ev
, XX
},
841 { "cmovae", Gv
, Ev
, XX
},
842 { "cmove", Gv
, Ev
, XX
},
843 { "cmovne", Gv
, Ev
, XX
},
844 { "cmovbe", Gv
, Ev
, XX
},
845 { "cmova", Gv
, Ev
, XX
},
847 { "cmovs", Gv
, Ev
, XX
},
848 { "cmovns", Gv
, Ev
, XX
},
849 { "cmovp", Gv
, Ev
, XX
},
850 { "cmovnp", Gv
, Ev
, XX
},
851 { "cmovl", Gv
, Ev
, XX
},
852 { "cmovge", Gv
, Ev
, XX
},
853 { "cmovle", Gv
, Ev
, XX
},
854 { "cmovg", Gv
, Ev
, XX
},
856 { "movmskpX", Gd
, XS
, XX
},
860 { "andpX", XM
, EX
, XX
},
861 { "andnpX", XM
, EX
, XX
},
862 { "orpX", XM
, EX
, XX
},
863 { "xorpX", XM
, EX
, XX
},
874 { "punpcklbw", MX
, EM
, XX
},
875 { "punpcklwd", MX
, EM
, XX
},
876 { "punpckldq", MX
, EM
, XX
},
877 { "packsswb", MX
, EM
, XX
},
878 { "pcmpgtb", MX
, EM
, XX
},
879 { "pcmpgtw", MX
, EM
, XX
},
880 { "pcmpgtd", MX
, EM
, XX
},
881 { "packuswb", MX
, EM
, XX
},
883 { "punpckhbw", MX
, EM
, XX
},
884 { "punpckhwd", MX
, EM
, XX
},
885 { "punpckhdq", MX
, EM
, XX
},
886 { "packssdw", MX
, EM
, XX
},
889 { "movd", MX
, Edq
, XX
},
896 { "pcmpeqb", MX
, EM
, XX
},
897 { "pcmpeqw", MX
, EM
, XX
},
898 { "pcmpeqd", MX
, EM
, XX
},
899 { "emms", XX
, XX
, XX
},
901 { "(bad)", XX
, XX
, XX
},
902 { "(bad)", XX
, XX
, XX
},
903 { "(bad)", XX
, XX
, XX
},
904 { "(bad)", XX
, XX
, XX
},
910 { "joH", Jv
, XX
, cond_jump_flag
},
911 { "jnoH", Jv
, XX
, cond_jump_flag
},
912 { "jbH", Jv
, XX
, cond_jump_flag
},
913 { "jaeH", Jv
, XX
, cond_jump_flag
},
914 { "jeH", Jv
, XX
, cond_jump_flag
},
915 { "jneH", Jv
, XX
, cond_jump_flag
},
916 { "jbeH", Jv
, XX
, cond_jump_flag
},
917 { "jaH", Jv
, XX
, cond_jump_flag
},
919 { "jsH", Jv
, XX
, cond_jump_flag
},
920 { "jnsH", Jv
, XX
, cond_jump_flag
},
921 { "jpH", Jv
, XX
, cond_jump_flag
},
922 { "jnpH", Jv
, XX
, cond_jump_flag
},
923 { "jlH", Jv
, XX
, cond_jump_flag
},
924 { "jgeH", Jv
, XX
, cond_jump_flag
},
925 { "jleH", Jv
, XX
, cond_jump_flag
},
926 { "jgH", Jv
, XX
, cond_jump_flag
},
928 { "seto", Eb
, XX
, XX
},
929 { "setno", Eb
, XX
, XX
},
930 { "setb", Eb
, XX
, XX
},
931 { "setae", Eb
, XX
, XX
},
932 { "sete", Eb
, XX
, XX
},
933 { "setne", Eb
, XX
, XX
},
934 { "setbe", Eb
, XX
, XX
},
935 { "seta", Eb
, XX
, XX
},
937 { "sets", Eb
, XX
, XX
},
938 { "setns", Eb
, XX
, XX
},
939 { "setp", Eb
, XX
, XX
},
940 { "setnp", Eb
, XX
, XX
},
941 { "setl", Eb
, XX
, XX
},
942 { "setge", Eb
, XX
, XX
},
943 { "setle", Eb
, XX
, XX
},
944 { "setg", Eb
, XX
, XX
},
946 { "pushT", fs
, XX
, XX
},
947 { "popT", fs
, XX
, XX
},
948 { "cpuid", XX
, XX
, XX
},
949 { "btS", Ev
, Gv
, XX
},
950 { "shldS", Ev
, Gv
, Ib
},
951 { "shldS", Ev
, Gv
, CL
},
952 { "(bad)", XX
, XX
, XX
},
953 { "(bad)", XX
, XX
, XX
},
955 { "pushT", gs
, XX
, XX
},
956 { "popT", gs
, XX
, XX
},
957 { "rsm", XX
, XX
, XX
},
958 { "btsS", Ev
, Gv
, XX
},
959 { "shrdS", Ev
, Gv
, Ib
},
960 { "shrdS", Ev
, Gv
, CL
},
962 { "imulS", Gv
, Ev
, XX
},
964 { "cmpxchgB", Eb
, Gb
, XX
},
965 { "cmpxchgS", Ev
, Gv
, XX
},
966 { "lssS", Gv
, Mp
, XX
},
967 { "btrS", Ev
, Gv
, XX
},
968 { "lfsS", Gv
, Mp
, XX
},
969 { "lgsS", Gv
, Mp
, XX
},
970 { "movz{bR|x|bR|x}", Gv
, Eb
, XX
},
971 { "movz{wR|x|wR|x}", Gv
, Ew
, XX
}, /* yes, there really is movzww ! */
973 { "(bad)", XX
, XX
, XX
},
974 { "ud2b", XX
, XX
, XX
},
976 { "btcS", Ev
, Gv
, XX
},
977 { "bsfS", Gv
, Ev
, XX
},
978 { "bsrS", Gv
, Ev
, XX
},
979 { "movs{bR|x|bR|x}", Gv
, Eb
, XX
},
980 { "movs{wR|x|wR|x}", Gv
, Ew
, XX
}, /* yes, there really is movsww ! */
982 { "xaddB", Eb
, Gb
, XX
},
983 { "xaddS", Ev
, Gv
, XX
},
985 { "movntiS", Ev
, Gv
, XX
},
986 { "pinsrw", MX
, Ed
, Ib
},
987 { "pextrw", Gd
, MS
, Ib
},
988 { "shufpX", XM
, EX
, Ib
},
991 { "bswap", RMeAX
, XX
, XX
},
992 { "bswap", RMeCX
, XX
, XX
},
993 { "bswap", RMeDX
, XX
, XX
},
994 { "bswap", RMeBX
, XX
, XX
},
995 { "bswap", RMeSP
, XX
, XX
},
996 { "bswap", RMeBP
, XX
, XX
},
997 { "bswap", RMeSI
, XX
, XX
},
998 { "bswap", RMeDI
, XX
, XX
},
1001 { "psrlw", MX
, EM
, XX
},
1002 { "psrld", MX
, EM
, XX
},
1003 { "psrlq", MX
, EM
, XX
},
1004 { "paddq", MX
, EM
, XX
},
1005 { "pmullw", MX
, EM
, XX
},
1007 { "pmovmskb", Gd
, MS
, XX
},
1009 { "psubusb", MX
, EM
, XX
},
1010 { "psubusw", MX
, EM
, XX
},
1011 { "pminub", MX
, EM
, XX
},
1012 { "pand", MX
, EM
, XX
},
1013 { "paddusb", MX
, EM
, XX
},
1014 { "paddusw", MX
, EM
, XX
},
1015 { "pmaxub", MX
, EM
, XX
},
1016 { "pandn", MX
, EM
, XX
},
1018 { "pavgb", MX
, EM
, XX
},
1019 { "psraw", MX
, EM
, XX
},
1020 { "psrad", MX
, EM
, XX
},
1021 { "pavgw", MX
, EM
, XX
},
1022 { "pmulhuw", MX
, EM
, XX
},
1023 { "pmulhw", MX
, EM
, XX
},
1027 { "psubsb", MX
, EM
, XX
},
1028 { "psubsw", MX
, EM
, XX
},
1029 { "pminsw", MX
, EM
, XX
},
1030 { "por", MX
, EM
, XX
},
1031 { "paddsb", MX
, EM
, XX
},
1032 { "paddsw", MX
, EM
, XX
},
1033 { "pmaxsw", MX
, EM
, XX
},
1034 { "pxor", MX
, EM
, XX
},
1037 { "psllw", MX
, EM
, XX
},
1038 { "pslld", MX
, EM
, XX
},
1039 { "psllq", MX
, EM
, XX
},
1040 { "pmuludq", MX
, EM
, XX
},
1041 { "pmaddwd", MX
, EM
, XX
},
1042 { "psadbw", MX
, EM
, XX
},
1045 { "psubb", MX
, EM
, XX
},
1046 { "psubw", MX
, EM
, XX
},
1047 { "psubd", MX
, EM
, XX
},
1048 { "psubq", MX
, EM
, XX
},
1049 { "paddb", MX
, EM
, XX
},
1050 { "paddw", MX
, EM
, XX
},
1051 { "paddd", MX
, EM
, XX
},
1052 { "(bad)", XX
, XX
, XX
}
1055 static const unsigned char onebyte_has_modrm
[256] = {
1056 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1057 /* ------------------------------- */
1058 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1059 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1060 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1061 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1062 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1063 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1064 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1065 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1066 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1067 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1068 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1069 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1070 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1071 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1072 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1073 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1074 /* ------------------------------- */
1075 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1078 static const unsigned char twobyte_has_modrm
[256] = {
1079 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1080 /* ------------------------------- */
1081 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1082 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1083 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1084 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1085 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1086 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1087 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1088 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,1,1,1,1, /* 7f */
1089 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1090 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1091 /* a0 */ 0,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1, /* af */
1092 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1093 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1094 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1095 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1096 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1097 /* ------------------------------- */
1098 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1101 static const unsigned char twobyte_uses_SSE_prefix
[256] = {
1102 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1103 /* ------------------------------- */
1104 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1105 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1106 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1107 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1108 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1109 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1110 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1111 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
1112 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1113 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1114 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1115 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1116 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1117 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1118 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1119 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1120 /* ------------------------------- */
1121 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1124 static char obuf
[100];
1126 static char scratchbuf
[100];
1127 static unsigned char *start_codep
;
1128 static unsigned char *insn_codep
;
1129 static unsigned char *codep
;
1130 static disassemble_info
*the_info
;
1134 static unsigned char need_modrm
;
1136 /* If we are accessing mod/rm/reg without need_modrm set, then the
1137 values are stale. Hitting this abort likely indicates that you
1138 need to update onebyte_has_modrm or twobyte_has_modrm. */
1139 #define MODRM_CHECK if (!need_modrm) abort ()
1141 static const char **names64
;
1142 static const char **names32
;
1143 static const char **names16
;
1144 static const char **names8
;
1145 static const char **names8rex
;
1146 static const char **names_seg
;
1147 static const char **index16
;
1149 static const char *intel_names64
[] = {
1150 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1151 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1153 static const char *intel_names32
[] = {
1154 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1155 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1157 static const char *intel_names16
[] = {
1158 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1159 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1161 static const char *intel_names8
[] = {
1162 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1164 static const char *intel_names8rex
[] = {
1165 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1166 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1168 static const char *intel_names_seg
[] = {
1169 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1171 static const char *intel_index16
[] = {
1172 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1175 static const char *att_names64
[] = {
1176 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1177 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1179 static const char *att_names32
[] = {
1180 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1181 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1183 static const char *att_names16
[] = {
1184 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1185 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1187 static const char *att_names8
[] = {
1188 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1190 static const char *att_names8rex
[] = {
1191 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1192 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1194 static const char *att_names_seg
[] = {
1195 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1197 static const char *att_index16
[] = {
1198 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1201 static const struct dis386 grps
[][8] = {
1204 { "addA", Eb
, Ib
, XX
},
1205 { "orA", Eb
, Ib
, XX
},
1206 { "adcA", Eb
, Ib
, XX
},
1207 { "sbbA", Eb
, Ib
, XX
},
1208 { "andA", Eb
, Ib
, XX
},
1209 { "subA", Eb
, Ib
, XX
},
1210 { "xorA", Eb
, Ib
, XX
},
1211 { "cmpA", Eb
, Ib
, XX
}
1215 { "addQ", Ev
, Iv
, XX
},
1216 { "orQ", Ev
, Iv
, XX
},
1217 { "adcQ", Ev
, Iv
, XX
},
1218 { "sbbQ", Ev
, Iv
, XX
},
1219 { "andQ", Ev
, Iv
, XX
},
1220 { "subQ", Ev
, Iv
, XX
},
1221 { "xorQ", Ev
, Iv
, XX
},
1222 { "cmpQ", Ev
, Iv
, XX
}
1226 { "addQ", Ev
, sIb
, XX
},
1227 { "orQ", Ev
, sIb
, XX
},
1228 { "adcQ", Ev
, sIb
, XX
},
1229 { "sbbQ", Ev
, sIb
, XX
},
1230 { "andQ", Ev
, sIb
, XX
},
1231 { "subQ", Ev
, sIb
, XX
},
1232 { "xorQ", Ev
, sIb
, XX
},
1233 { "cmpQ", Ev
, sIb
, XX
}
1237 { "rolA", Eb
, Ib
, XX
},
1238 { "rorA", Eb
, Ib
, XX
},
1239 { "rclA", Eb
, Ib
, XX
},
1240 { "rcrA", Eb
, Ib
, XX
},
1241 { "shlA", Eb
, Ib
, XX
},
1242 { "shrA", Eb
, Ib
, XX
},
1243 { "(bad)", XX
, XX
, XX
},
1244 { "sarA", Eb
, Ib
, XX
},
1248 { "rolQ", Ev
, Ib
, XX
},
1249 { "rorQ", Ev
, Ib
, XX
},
1250 { "rclQ", Ev
, Ib
, XX
},
1251 { "rcrQ", Ev
, Ib
, XX
},
1252 { "shlQ", Ev
, Ib
, XX
},
1253 { "shrQ", Ev
, Ib
, XX
},
1254 { "(bad)", XX
, XX
, XX
},
1255 { "sarQ", Ev
, Ib
, XX
},
1259 { "rolA", Eb
, XX
, XX
},
1260 { "rorA", Eb
, XX
, XX
},
1261 { "rclA", Eb
, XX
, XX
},
1262 { "rcrA", Eb
, XX
, XX
},
1263 { "shlA", Eb
, XX
, XX
},
1264 { "shrA", Eb
, XX
, XX
},
1265 { "(bad)", XX
, XX
, XX
},
1266 { "sarA", Eb
, XX
, XX
},
1270 { "rolQ", Ev
, XX
, XX
},
1271 { "rorQ", Ev
, XX
, XX
},
1272 { "rclQ", Ev
, XX
, XX
},
1273 { "rcrQ", Ev
, XX
, XX
},
1274 { "shlQ", Ev
, XX
, XX
},
1275 { "shrQ", Ev
, XX
, XX
},
1276 { "(bad)", XX
, XX
, XX
},
1277 { "sarQ", Ev
, XX
, XX
},
1281 { "rolA", Eb
, CL
, XX
},
1282 { "rorA", Eb
, CL
, XX
},
1283 { "rclA", Eb
, CL
, XX
},
1284 { "rcrA", Eb
, CL
, XX
},
1285 { "shlA", Eb
, CL
, XX
},
1286 { "shrA", Eb
, CL
, XX
},
1287 { "(bad)", XX
, XX
, XX
},
1288 { "sarA", Eb
, CL
, XX
},
1292 { "rolQ", Ev
, CL
, XX
},
1293 { "rorQ", Ev
, CL
, XX
},
1294 { "rclQ", Ev
, CL
, XX
},
1295 { "rcrQ", Ev
, CL
, XX
},
1296 { "shlQ", Ev
, CL
, XX
},
1297 { "shrQ", Ev
, CL
, XX
},
1298 { "(bad)", XX
, XX
, XX
},
1299 { "sarQ", Ev
, CL
, XX
}
1303 { "testA", Eb
, Ib
, XX
},
1304 { "(bad)", Eb
, XX
, XX
},
1305 { "notA", Eb
, XX
, XX
},
1306 { "negA", Eb
, XX
, XX
},
1307 { "mulA", Eb
, XX
, XX
}, /* Don't print the implicit %al register, */
1308 { "imulA", Eb
, XX
, XX
}, /* to distinguish these opcodes from other */
1309 { "divA", Eb
, XX
, XX
}, /* mul/imul opcodes. Do the same for div */
1310 { "idivA", Eb
, XX
, XX
} /* and idiv for consistency. */
1314 { "testQ", Ev
, Iv
, XX
},
1315 { "(bad)", XX
, XX
, XX
},
1316 { "notQ", Ev
, XX
, XX
},
1317 { "negQ", Ev
, XX
, XX
},
1318 { "mulQ", Ev
, XX
, XX
}, /* Don't print the implicit register. */
1319 { "imulQ", Ev
, XX
, XX
},
1320 { "divQ", Ev
, XX
, XX
},
1321 { "idivQ", Ev
, XX
, XX
},
1325 { "incA", Eb
, XX
, XX
},
1326 { "decA", Eb
, XX
, XX
},
1327 { "(bad)", XX
, XX
, XX
},
1328 { "(bad)", XX
, XX
, XX
},
1329 { "(bad)", XX
, XX
, XX
},
1330 { "(bad)", XX
, XX
, XX
},
1331 { "(bad)", XX
, XX
, XX
},
1332 { "(bad)", XX
, XX
, XX
},
1336 { "incQ", Ev
, XX
, XX
},
1337 { "decQ", Ev
, XX
, XX
},
1338 { "callT", indirEv
, XX
, XX
},
1339 { "lcallT", indirEv
, XX
, XX
},
1340 { "jmpT", indirEv
, XX
, XX
},
1341 { "ljmpT", indirEv
, XX
, XX
},
1342 { "pushU", Ev
, XX
, XX
},
1343 { "(bad)", XX
, XX
, XX
},
1347 { "sldtQ", Ev
, XX
, XX
},
1348 { "strQ", Ev
, XX
, XX
},
1349 { "lldt", Ew
, XX
, XX
},
1350 { "ltr", Ew
, XX
, XX
},
1351 { "verr", Ew
, XX
, XX
},
1352 { "verw", Ew
, XX
, XX
},
1353 { "(bad)", XX
, XX
, XX
},
1354 { "(bad)", XX
, XX
, XX
}
1358 { "sgdtQ", M
, XX
, XX
},
1359 { "sidtQ", PNI_Fixup
, 0, XX
, XX
},
1360 { "lgdtQ", M
, XX
, XX
},
1361 { "lidtQ", M
, XX
, XX
},
1362 { "smswQ", Ev
, XX
, XX
},
1363 { "(bad)", XX
, XX
, XX
},
1364 { "lmsw", Ew
, XX
, XX
},
1365 { "invlpg", Ew
, XX
, XX
},
1369 { "(bad)", XX
, XX
, XX
},
1370 { "(bad)", XX
, XX
, XX
},
1371 { "(bad)", XX
, XX
, XX
},
1372 { "(bad)", XX
, XX
, XX
},
1373 { "btQ", Ev
, Ib
, XX
},
1374 { "btsQ", Ev
, Ib
, XX
},
1375 { "btrQ", Ev
, Ib
, XX
},
1376 { "btcQ", Ev
, Ib
, XX
},
1380 { "(bad)", XX
, XX
, XX
},
1381 { "cmpxchg8b", Ev
, XX
, XX
},
1382 { "(bad)", XX
, XX
, XX
},
1383 { "(bad)", XX
, XX
, XX
},
1384 { "(bad)", XX
, XX
, XX
},
1385 { "(bad)", XX
, XX
, XX
},
1386 { "(bad)", XX
, XX
, XX
},
1387 { "(bad)", XX
, XX
, XX
},
1391 { "(bad)", XX
, XX
, XX
},
1392 { "(bad)", XX
, XX
, XX
},
1393 { "psrlw", MS
, Ib
, XX
},
1394 { "(bad)", XX
, XX
, XX
},
1395 { "psraw", MS
, Ib
, XX
},
1396 { "(bad)", XX
, XX
, XX
},
1397 { "psllw", MS
, Ib
, XX
},
1398 { "(bad)", XX
, XX
, XX
},
1402 { "(bad)", XX
, XX
, XX
},
1403 { "(bad)", XX
, XX
, XX
},
1404 { "psrld", MS
, Ib
, XX
},
1405 { "(bad)", XX
, XX
, XX
},
1406 { "psrad", MS
, Ib
, XX
},
1407 { "(bad)", XX
, XX
, XX
},
1408 { "pslld", MS
, Ib
, XX
},
1409 { "(bad)", XX
, XX
, XX
},
1413 { "(bad)", XX
, XX
, XX
},
1414 { "(bad)", XX
, XX
, XX
},
1415 { "psrlq", MS
, Ib
, XX
},
1416 { "psrldq", MS
, Ib
, XX
},
1417 { "(bad)", XX
, XX
, XX
},
1418 { "(bad)", XX
, XX
, XX
},
1419 { "psllq", MS
, Ib
, XX
},
1420 { "pslldq", MS
, Ib
, XX
},
1424 { "fxsave", Ev
, XX
, XX
},
1425 { "fxrstor", Ev
, XX
, XX
},
1426 { "ldmxcsr", Ev
, XX
, XX
},
1427 { "stmxcsr", Ev
, XX
, XX
},
1428 { "(bad)", XX
, XX
, XX
},
1429 { "lfence", None
, XX
, XX
},
1430 { "mfence", None
, XX
, XX
},
1431 { "sfence", None
, XX
, XX
},
1432 /* FIXME: the sfence with memory operand is clflush! */
1436 { "prefetchnta", Ev
, XX
, XX
},
1437 { "prefetcht0", Ev
, XX
, XX
},
1438 { "prefetcht1", Ev
, XX
, XX
},
1439 { "prefetcht2", Ev
, XX
, XX
},
1440 { "(bad)", XX
, XX
, XX
},
1441 { "(bad)", XX
, XX
, XX
},
1442 { "(bad)", XX
, XX
, XX
},
1443 { "(bad)", XX
, XX
, XX
},
1447 { "prefetch", Eb
, XX
, XX
},
1448 { "prefetchw", Eb
, XX
, XX
},
1449 { "(bad)", XX
, XX
, XX
},
1450 { "(bad)", XX
, XX
, XX
},
1451 { "(bad)", XX
, XX
, XX
},
1452 { "(bad)", XX
, XX
, XX
},
1453 { "(bad)", XX
, XX
, XX
},
1454 { "(bad)", XX
, XX
, XX
},
1458 static const struct dis386 prefix_user_table
[][4] = {
1461 { "addps", XM
, EX
, XX
},
1462 { "addss", XM
, EX
, XX
},
1463 { "addpd", XM
, EX
, XX
},
1464 { "addsd", XM
, EX
, XX
},
1468 { "", XM
, EX
, OPSIMD
}, /* See OP_SIMD_SUFFIX. */
1469 { "", XM
, EX
, OPSIMD
},
1470 { "", XM
, EX
, OPSIMD
},
1471 { "", XM
, EX
, OPSIMD
},
1475 { "cvtpi2ps", XM
, EM
, XX
},
1476 { "cvtsi2ssY", XM
, Ev
, XX
},
1477 { "cvtpi2pd", XM
, EM
, XX
},
1478 { "cvtsi2sdY", XM
, Ev
, XX
},
1482 { "cvtps2pi", MX
, EX
, XX
},
1483 { "cvtss2siY", Gv
, EX
, XX
},
1484 { "cvtpd2pi", MX
, EX
, XX
},
1485 { "cvtsd2siY", Gv
, EX
, XX
},
1489 { "cvttps2pi", MX
, EX
, XX
},
1490 { "cvttss2siY", Gv
, EX
, XX
},
1491 { "cvttpd2pi", MX
, EX
, XX
},
1492 { "cvttsd2siY", Gv
, EX
, XX
},
1496 { "divps", XM
, EX
, XX
},
1497 { "divss", XM
, EX
, XX
},
1498 { "divpd", XM
, EX
, XX
},
1499 { "divsd", XM
, EX
, XX
},
1503 { "maxps", XM
, EX
, XX
},
1504 { "maxss", XM
, EX
, XX
},
1505 { "maxpd", XM
, EX
, XX
},
1506 { "maxsd", XM
, EX
, XX
},
1510 { "minps", XM
, EX
, XX
},
1511 { "minss", XM
, EX
, XX
},
1512 { "minpd", XM
, EX
, XX
},
1513 { "minsd", XM
, EX
, XX
},
1517 { "movups", XM
, EX
, XX
},
1518 { "movss", XM
, EX
, XX
},
1519 { "movupd", XM
, EX
, XX
},
1520 { "movsd", XM
, EX
, XX
},
1524 { "movups", EX
, XM
, XX
},
1525 { "movss", EX
, XM
, XX
},
1526 { "movupd", EX
, XM
, XX
},
1527 { "movsd", EX
, XM
, XX
},
1531 { "mulps", XM
, EX
, XX
},
1532 { "mulss", XM
, EX
, XX
},
1533 { "mulpd", XM
, EX
, XX
},
1534 { "mulsd", XM
, EX
, XX
},
1538 { "rcpps", XM
, EX
, XX
},
1539 { "rcpss", XM
, EX
, XX
},
1540 { "(bad)", XM
, EX
, XX
},
1541 { "(bad)", XM
, EX
, XX
},
1545 { "rsqrtps", XM
, EX
, XX
},
1546 { "rsqrtss", XM
, EX
, XX
},
1547 { "(bad)", XM
, EX
, XX
},
1548 { "(bad)", XM
, EX
, XX
},
1552 { "sqrtps", XM
, EX
, XX
},
1553 { "sqrtss", XM
, EX
, XX
},
1554 { "sqrtpd", XM
, EX
, XX
},
1555 { "sqrtsd", XM
, EX
, XX
},
1559 { "subps", XM
, EX
, XX
},
1560 { "subss", XM
, EX
, XX
},
1561 { "subpd", XM
, EX
, XX
},
1562 { "subsd", XM
, EX
, XX
},
1566 { "(bad)", XM
, EX
, XX
},
1567 { "cvtdq2pd", XM
, EX
, XX
},
1568 { "cvttpd2dq", XM
, EX
, XX
},
1569 { "cvtpd2dq", XM
, EX
, XX
},
1573 { "cvtdq2ps", XM
, EX
, XX
},
1574 { "cvttps2dq",XM
, EX
, XX
},
1575 { "cvtps2dq",XM
, EX
, XX
},
1576 { "(bad)", XM
, EX
, XX
},
1580 { "cvtps2pd", XM
, EX
, XX
},
1581 { "cvtss2sd", XM
, EX
, XX
},
1582 { "cvtpd2ps", XM
, EX
, XX
},
1583 { "cvtsd2ss", XM
, EX
, XX
},
1587 { "maskmovq", MX
, MS
, XX
},
1588 { "(bad)", XM
, EX
, XX
},
1589 { "maskmovdqu", XM
, EX
, XX
},
1590 { "(bad)", XM
, EX
, XX
},
1594 { "movq", MX
, EM
, XX
},
1595 { "movdqu", XM
, EX
, XX
},
1596 { "movdqa", XM
, EX
, XX
},
1597 { "(bad)", XM
, EX
, XX
},
1601 { "movq", EM
, MX
, XX
},
1602 { "movdqu", EX
, XM
, XX
},
1603 { "movdqa", EX
, XM
, XX
},
1604 { "(bad)", EX
, XM
, XX
},
1608 { "(bad)", EX
, XM
, XX
},
1609 { "movq2dq", XM
, MS
, XX
},
1610 { "movq", EX
, XM
, XX
},
1611 { "movdq2q", MX
, XS
, XX
},
1615 { "pshufw", MX
, EM
, Ib
},
1616 { "pshufhw", XM
, EX
, Ib
},
1617 { "pshufd", XM
, EX
, Ib
},
1618 { "pshuflw", XM
, EX
, Ib
},
1622 { "movd", Edq
, MX
, XX
},
1623 { "movq", XM
, EX
, XX
},
1624 { "movd", Edq
, XM
, XX
},
1625 { "(bad)", Ed
, XM
, XX
},
1629 { "(bad)", MX
, EX
, XX
},
1630 { "(bad)", XM
, EX
, XX
},
1631 { "punpckhqdq", XM
, EX
, XX
},
1632 { "(bad)", XM
, EX
, XX
},
1636 { "movntq", Ev
, MX
, XX
},
1637 { "(bad)", Ev
, XM
, XX
},
1638 { "movntdq", Ev
, XM
, XX
},
1639 { "(bad)", Ev
, XM
, XX
},
1643 { "(bad)", MX
, EX
, XX
},
1644 { "(bad)", XM
, EX
, XX
},
1645 { "punpcklqdq", XM
, EX
, XX
},
1646 { "(bad)", XM
, EX
, XX
},
1650 { "(bad)", MX
, EX
, XX
},
1651 { "(bad)", XM
, EX
, XX
},
1652 { "addsubpd", XM
, EX
, XX
},
1653 { "addsubps", XM
, EX
, XX
},
1657 { "(bad)", MX
, EX
, XX
},
1658 { "(bad)", XM
, EX
, XX
},
1659 { "haddpd", XM
, EX
, XX
},
1660 { "haddps", XM
, EX
, XX
},
1664 { "(bad)", MX
, EX
, XX
},
1665 { "(bad)", XM
, EX
, XX
},
1666 { "hsubpd", XM
, EX
, XX
},
1667 { "hsubps", XM
, EX
, XX
},
1671 { "movlpX", XM
, EX
, SIMD_Fixup
, 'h' }, /* really only 2 operands */
1672 { "movsldup", XM
, EX
, XX
},
1673 { "movlpd", XM
, EX
, XX
},
1674 { "movddup", XM
, EX
, XX
},
1678 { "movhpX", XM
, EX
, SIMD_Fixup
, 'l' },
1679 { "movshdup", XM
, EX
, XX
},
1680 { "movhpd", XM
, EX
, XX
},
1681 { "(bad)", XM
, EX
, XX
},
1685 { "(bad)", XM
, EX
, XX
},
1686 { "(bad)", XM
, EX
, XX
},
1687 { "(bad)", XM
, EX
, XX
},
1688 { "lddqu", XM
, M
, XX
},
1692 static const struct dis386 x86_64_table
[][2] = {
1694 { "arpl", Ew
, Gw
, XX
},
1695 { "movs{||lq|xd}", Gv
, Ed
, XX
},
1699 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1711 FETCH_DATA (the_info
, codep
+ 1);
1715 /* REX prefixes family. */
1738 prefixes
|= PREFIX_REPZ
;
1741 prefixes
|= PREFIX_REPNZ
;
1744 prefixes
|= PREFIX_LOCK
;
1747 prefixes
|= PREFIX_CS
;
1750 prefixes
|= PREFIX_SS
;
1753 prefixes
|= PREFIX_DS
;
1756 prefixes
|= PREFIX_ES
;
1759 prefixes
|= PREFIX_FS
;
1762 prefixes
|= PREFIX_GS
;
1765 prefixes
|= PREFIX_DATA
;
1768 prefixes
|= PREFIX_ADDR
;
1771 /* fwait is really an instruction. If there are prefixes
1772 before the fwait, they belong to the fwait, *not* to the
1773 following instruction. */
1776 prefixes
|= PREFIX_FWAIT
;
1780 prefixes
= PREFIX_FWAIT
;
1785 /* Rex is ignored when followed by another prefix. */
1788 oappend (prefix_name (rex
, 0));
1796 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1800 prefix_name (pref
, sizeflag
)
1806 /* REX prefixes family. */
1858 return (sizeflag
& DFLAG
) ? "data16" : "data32";
1861 return (sizeflag
& AFLAG
) ? "addr32" : "addr64";
1863 return ((sizeflag
& AFLAG
) && !mode_64bit
) ? "addr16" : "addr32";
1871 static char op1out
[100], op2out
[100], op3out
[100];
1872 static int op_ad
, op_index
[3];
1873 static bfd_vma op_address
[3];
1874 static bfd_vma op_riprel
[3];
1875 static bfd_vma start_pc
;
1878 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1879 * (see topic "Redundant prefixes" in the "Differences from 8086"
1880 * section of the "Virtual 8086 Mode" chapter.)
1881 * 'pc' should be the address of this instruction, it will
1882 * be used to print the target address if this is a relative jump or call
1883 * The function returns the length of this instruction in bytes.
1886 static char intel_syntax
;
1887 static char open_char
;
1888 static char close_char
;
1889 static char separator_char
;
1890 static char scale_char
;
1892 /* Here for backwards compatibility. When gdb stops using
1893 print_insn_i386_att and print_insn_i386_intel these functions can
1894 disappear, and print_insn_i386 be merged into print_insn. */
1896 print_insn_i386_att (pc
, info
)
1898 disassemble_info
*info
;
1902 return print_insn (pc
, info
);
1906 print_insn_i386_intel (pc
, info
)
1908 disassemble_info
*info
;
1912 return print_insn (pc
, info
);
1916 print_insn_i386 (pc
, info
)
1918 disassemble_info
*info
;
1922 return print_insn (pc
, info
);
1926 print_insn (pc
, info
)
1928 disassemble_info
*info
;
1930 const struct dis386
*dp
;
1933 char *first
, *second
, *third
;
1935 unsigned char uses_SSE_prefix
;
1938 struct dis_private priv
;
1940 mode_64bit
= (info
->mach
== bfd_mach_x86_64_intel_syntax
1941 || info
->mach
== bfd_mach_x86_64
);
1943 if (intel_syntax
== (char) -1)
1944 intel_syntax
= (info
->mach
== bfd_mach_i386_i386_intel_syntax
1945 || info
->mach
== bfd_mach_x86_64_intel_syntax
);
1947 if (info
->mach
== bfd_mach_i386_i386
1948 || info
->mach
== bfd_mach_x86_64
1949 || info
->mach
== bfd_mach_i386_i386_intel_syntax
1950 || info
->mach
== bfd_mach_x86_64_intel_syntax
)
1951 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
1952 else if (info
->mach
== bfd_mach_i386_i8086
)
1953 priv
.orig_sizeflag
= 0;
1957 for (p
= info
->disassembler_options
; p
!= NULL
; )
1959 if (strncmp (p
, "x86-64", 6) == 0)
1962 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
1964 else if (strncmp (p
, "i386", 4) == 0)
1967 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
1969 else if (strncmp (p
, "i8086", 5) == 0)
1972 priv
.orig_sizeflag
= 0;
1974 else if (strncmp (p
, "intel", 5) == 0)
1978 else if (strncmp (p
, "att", 3) == 0)
1982 else if (strncmp (p
, "addr", 4) == 0)
1984 if (p
[4] == '1' && p
[5] == '6')
1985 priv
.orig_sizeflag
&= ~AFLAG
;
1986 else if (p
[4] == '3' && p
[5] == '2')
1987 priv
.orig_sizeflag
|= AFLAG
;
1989 else if (strncmp (p
, "data", 4) == 0)
1991 if (p
[4] == '1' && p
[5] == '6')
1992 priv
.orig_sizeflag
&= ~DFLAG
;
1993 else if (p
[4] == '3' && p
[5] == '2')
1994 priv
.orig_sizeflag
|= DFLAG
;
1996 else if (strncmp (p
, "suffix", 6) == 0)
1997 priv
.orig_sizeflag
|= SUFFIX_ALWAYS
;
1999 p
= strchr (p
, ',');
2006 names64
= intel_names64
;
2007 names32
= intel_names32
;
2008 names16
= intel_names16
;
2009 names8
= intel_names8
;
2010 names8rex
= intel_names8rex
;
2011 names_seg
= intel_names_seg
;
2012 index16
= intel_index16
;
2015 separator_char
= '+';
2020 names64
= att_names64
;
2021 names32
= att_names32
;
2022 names16
= att_names16
;
2023 names8
= att_names8
;
2024 names8rex
= att_names8rex
;
2025 names_seg
= att_names_seg
;
2026 index16
= att_index16
;
2029 separator_char
= ',';
2033 /* The output looks better if we put 7 bytes on a line, since that
2034 puts most long word instructions on a single line. */
2035 info
->bytes_per_line
= 7;
2037 info
->private_data
= (PTR
) &priv
;
2038 priv
.max_fetched
= priv
.the_buffer
;
2039 priv
.insn_start
= pc
;
2046 op_index
[0] = op_index
[1] = op_index
[2] = -1;
2050 start_codep
= priv
.the_buffer
;
2051 codep
= priv
.the_buffer
;
2053 if (setjmp (priv
.bailout
) != 0)
2057 /* Getting here means we tried for data but didn't get it. That
2058 means we have an incomplete instruction of some sort. Just
2059 print the first byte as a prefix or a .byte pseudo-op. */
2060 if (codep
> priv
.the_buffer
)
2062 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
2064 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
2067 /* Just print the first byte as a .byte instruction. */
2068 (*info
->fprintf_func
) (info
->stream
, ".byte 0x%x",
2069 (unsigned int) priv
.the_buffer
[0]);
2082 sizeflag
= priv
.orig_sizeflag
;
2084 FETCH_DATA (info
, codep
+ 1);
2085 two_source_ops
= (*codep
== 0x62) || (*codep
== 0xc8);
2087 if ((prefixes
& PREFIX_FWAIT
)
2088 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
2092 /* fwait not followed by floating point instruction. Print the
2093 first prefix, which is probably fwait itself. */
2094 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
2096 name
= INTERNAL_DISASSEMBLER_ERROR
;
2097 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
2103 FETCH_DATA (info
, codep
+ 2);
2104 dp
= &dis386_twobyte
[*++codep
];
2105 need_modrm
= twobyte_has_modrm
[*codep
];
2106 uses_SSE_prefix
= twobyte_uses_SSE_prefix
[*codep
];
2110 dp
= &dis386
[*codep
];
2111 need_modrm
= onebyte_has_modrm
[*codep
];
2112 uses_SSE_prefix
= 0;
2116 if (!uses_SSE_prefix
&& (prefixes
& PREFIX_REPZ
))
2119 used_prefixes
|= PREFIX_REPZ
;
2121 if (!uses_SSE_prefix
&& (prefixes
& PREFIX_REPNZ
))
2124 used_prefixes
|= PREFIX_REPNZ
;
2126 if (prefixes
& PREFIX_LOCK
)
2129 used_prefixes
|= PREFIX_LOCK
;
2132 if (prefixes
& PREFIX_ADDR
)
2135 if (dp
->bytemode3
!= loop_jcxz_mode
|| intel_syntax
)
2137 if ((sizeflag
& AFLAG
) || mode_64bit
)
2138 oappend ("addr32 ");
2140 oappend ("addr16 ");
2141 used_prefixes
|= PREFIX_ADDR
;
2145 if (!uses_SSE_prefix
&& (prefixes
& PREFIX_DATA
))
2148 if (dp
->bytemode3
== cond_jump_mode
2149 && dp
->bytemode1
== v_mode
2152 if (sizeflag
& DFLAG
)
2153 oappend ("data32 ");
2155 oappend ("data16 ");
2156 used_prefixes
|= PREFIX_DATA
;
2162 FETCH_DATA (info
, codep
+ 1);
2163 mod
= (*codep
>> 6) & 3;
2164 reg
= (*codep
>> 3) & 7;
2168 if (dp
->name
== NULL
&& dp
->bytemode1
== FLOATCODE
)
2175 if (dp
->name
== NULL
)
2177 switch (dp
->bytemode1
)
2180 dp
= &grps
[dp
->bytemode2
][reg
];
2183 case USE_PREFIX_USER_TABLE
:
2185 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
2186 if (prefixes
& PREFIX_REPZ
)
2190 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2191 if (prefixes
& PREFIX_DATA
)
2195 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
2196 if (prefixes
& PREFIX_REPNZ
)
2200 dp
= &prefix_user_table
[dp
->bytemode2
][index
];
2203 case X86_64_SPECIAL
:
2204 dp
= &x86_64_table
[dp
->bytemode2
][mode_64bit
];
2208 oappend (INTERNAL_DISASSEMBLER_ERROR
);
2213 if (putop (dp
->name
, sizeflag
) == 0)
2218 (*dp
->op1
) (dp
->bytemode1
, sizeflag
);
2223 (*dp
->op2
) (dp
->bytemode2
, sizeflag
);
2228 (*dp
->op3
) (dp
->bytemode3
, sizeflag
);
2232 /* See if any prefixes were not used. If so, print the first one
2233 separately. If we don't do this, we'll wind up printing an
2234 instruction stream which does not precisely correspond to the
2235 bytes we are disassembling. */
2236 if ((prefixes
& ~used_prefixes
) != 0)
2240 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
2242 name
= INTERNAL_DISASSEMBLER_ERROR
;
2243 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
2246 if (rex
& ~rex_used
)
2249 name
= prefix_name (rex
| 0x40, priv
.orig_sizeflag
);
2251 name
= INTERNAL_DISASSEMBLER_ERROR
;
2252 (*info
->fprintf_func
) (info
->stream
, "%s ", name
);
2255 obufp
= obuf
+ strlen (obuf
);
2256 for (i
= strlen (obuf
); i
< 6; i
++)
2259 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
2261 /* The enter and bound instructions are printed with operands in the same
2262 order as the intel book; everything else is printed in reverse order. */
2263 if (intel_syntax
|| two_source_ops
)
2268 op_ad
= op_index
[0];
2269 op_index
[0] = op_index
[2];
2270 op_index
[2] = op_ad
;
2281 if (op_index
[0] != -1 && !op_riprel
[0])
2282 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[0]], info
);
2284 (*info
->fprintf_func
) (info
->stream
, "%s", first
);
2290 (*info
->fprintf_func
) (info
->stream
, ",");
2291 if (op_index
[1] != -1 && !op_riprel
[1])
2292 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[1]], info
);
2294 (*info
->fprintf_func
) (info
->stream
, "%s", second
);
2300 (*info
->fprintf_func
) (info
->stream
, ",");
2301 if (op_index
[2] != -1 && !op_riprel
[2])
2302 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[2]], info
);
2304 (*info
->fprintf_func
) (info
->stream
, "%s", third
);
2306 for (i
= 0; i
< 3; i
++)
2307 if (op_index
[i
] != -1 && op_riprel
[i
])
2309 (*info
->fprintf_func
) (info
->stream
, " # ");
2310 (*info
->print_address_func
) ((bfd_vma
) (start_pc
+ codep
- start_codep
2311 + op_address
[op_index
[i
]]), info
);
2313 return codep
- priv
.the_buffer
;
2316 static const char *float_mem
[] = {
2392 #define STi OP_STi, 0
2394 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2395 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2396 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2397 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2398 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2399 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2400 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2401 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2402 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2404 static const struct dis386 float_reg
[][8] = {
2407 { "fadd", ST
, STi
, XX
},
2408 { "fmul", ST
, STi
, XX
},
2409 { "fcom", STi
, XX
, XX
},
2410 { "fcomp", STi
, XX
, XX
},
2411 { "fsub", ST
, STi
, XX
},
2412 { "fsubr", ST
, STi
, XX
},
2413 { "fdiv", ST
, STi
, XX
},
2414 { "fdivr", ST
, STi
, XX
},
2418 { "fld", STi
, XX
, XX
},
2419 { "fxch", STi
, XX
, XX
},
2421 { "(bad)", XX
, XX
, XX
},
2429 { "fcmovb", ST
, STi
, XX
},
2430 { "fcmove", ST
, STi
, XX
},
2431 { "fcmovbe",ST
, STi
, XX
},
2432 { "fcmovu", ST
, STi
, XX
},
2433 { "(bad)", XX
, XX
, XX
},
2435 { "(bad)", XX
, XX
, XX
},
2436 { "(bad)", XX
, XX
, XX
},
2440 { "fcmovnb",ST
, STi
, XX
},
2441 { "fcmovne",ST
, STi
, XX
},
2442 { "fcmovnbe",ST
, STi
, XX
},
2443 { "fcmovnu",ST
, STi
, XX
},
2445 { "fucomi", ST
, STi
, XX
},
2446 { "fcomi", ST
, STi
, XX
},
2447 { "(bad)", XX
, XX
, XX
},
2451 { "fadd", STi
, ST
, XX
},
2452 { "fmul", STi
, ST
, XX
},
2453 { "(bad)", XX
, XX
, XX
},
2454 { "(bad)", XX
, XX
, XX
},
2456 { "fsub", STi
, ST
, XX
},
2457 { "fsubr", STi
, ST
, XX
},
2458 { "fdiv", STi
, ST
, XX
},
2459 { "fdivr", STi
, ST
, XX
},
2461 { "fsubr", STi
, ST
, XX
},
2462 { "fsub", STi
, ST
, XX
},
2463 { "fdivr", STi
, ST
, XX
},
2464 { "fdiv", STi
, ST
, XX
},
2469 { "ffree", STi
, XX
, XX
},
2470 { "(bad)", XX
, XX
, XX
},
2471 { "fst", STi
, XX
, XX
},
2472 { "fstp", STi
, XX
, XX
},
2473 { "fucom", STi
, XX
, XX
},
2474 { "fucomp", STi
, XX
, XX
},
2475 { "(bad)", XX
, XX
, XX
},
2476 { "(bad)", XX
, XX
, XX
},
2480 { "faddp", STi
, ST
, XX
},
2481 { "fmulp", STi
, ST
, XX
},
2482 { "(bad)", XX
, XX
, XX
},
2485 { "fsubp", STi
, ST
, XX
},
2486 { "fsubrp", STi
, ST
, XX
},
2487 { "fdivp", STi
, ST
, XX
},
2488 { "fdivrp", STi
, ST
, XX
},
2490 { "fsubrp", STi
, ST
, XX
},
2491 { "fsubp", STi
, ST
, XX
},
2492 { "fdivrp", STi
, ST
, XX
},
2493 { "fdivp", STi
, ST
, XX
},
2498 { "ffreep", STi
, XX
, XX
},
2499 { "(bad)", XX
, XX
, XX
},
2500 { "(bad)", XX
, XX
, XX
},
2501 { "(bad)", XX
, XX
, XX
},
2503 { "fucomip",ST
, STi
, XX
},
2504 { "fcomip", ST
, STi
, XX
},
2505 { "(bad)", XX
, XX
, XX
},
2509 static char *fgrps
[][8] = {
2512 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2517 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2522 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2527 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2532 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2537 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2542 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2543 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2548 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2553 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2561 const struct dis386
*dp
;
2562 unsigned char floatop
;
2564 floatop
= codep
[-1];
2568 putop (float_mem
[(floatop
- 0xd8) * 8 + reg
], sizeflag
);
2570 if (floatop
== 0xdb)
2571 OP_E (x_mode
, sizeflag
);
2572 else if (floatop
== 0xdd)
2573 OP_E (d_mode
, sizeflag
);
2575 OP_E (v_mode
, sizeflag
);
2578 /* Skip mod/rm byte. */
2582 dp
= &float_reg
[floatop
- 0xd8][reg
];
2583 if (dp
->name
== NULL
)
2585 putop (fgrps
[dp
->bytemode1
][rm
], sizeflag
);
2587 /* Instruction fnstsw is only one with strange arg. */
2588 if (floatop
== 0xdf && codep
[-1] == 0xe0)
2589 strcpy (op1out
, names16
[0]);
2593 putop (dp
->name
, sizeflag
);
2597 (*dp
->op1
) (dp
->bytemode1
, sizeflag
);
2600 (*dp
->op2
) (dp
->bytemode2
, sizeflag
);
2605 OP_ST (bytemode
, sizeflag
)
2606 int bytemode ATTRIBUTE_UNUSED
;
2607 int sizeflag ATTRIBUTE_UNUSED
;
2613 OP_STi (bytemode
, sizeflag
)
2614 int bytemode ATTRIBUTE_UNUSED
;
2615 int sizeflag ATTRIBUTE_UNUSED
;
2617 sprintf (scratchbuf
, "%%st(%d)", rm
);
2618 oappend (scratchbuf
+ intel_syntax
);
2621 /* Capital letters in template are macros. */
2623 putop (template, sizeflag
)
2624 const char *template;
2630 for (p
= template; *p
; p
++)
2649 /* Alternative not valid. */
2650 strcpy (obuf
, "(bad)");
2654 else if (*p
== '\0')
2672 if (mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
2678 if (sizeflag
& SUFFIX_ALWAYS
)
2681 case 'E': /* For jcxz/jecxz */
2684 if (sizeflag
& AFLAG
)
2690 if (sizeflag
& AFLAG
)
2692 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
2697 if ((prefixes
& PREFIX_ADDR
) || (sizeflag
& SUFFIX_ALWAYS
))
2699 if (sizeflag
& AFLAG
)
2700 *obufp
++ = mode_64bit
? 'q' : 'l';
2702 *obufp
++ = mode_64bit
? 'l' : 'w';
2703 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
2709 if ((prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_CS
2710 || (prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_DS
)
2712 used_prefixes
|= prefixes
& (PREFIX_CS
| PREFIX_DS
);
2715 if (prefixes
& PREFIX_DS
)
2724 if (sizeflag
& SUFFIX_ALWAYS
)
2728 if ((prefixes
& PREFIX_FWAIT
) == 0)
2731 used_prefixes
|= PREFIX_FWAIT
;
2734 USED_REX (REX_MODE64
);
2735 if (rex
& REX_MODE64
)
2752 if ((prefixes
& PREFIX_DATA
)
2753 || (rex
& REX_MODE64
)
2754 || (sizeflag
& SUFFIX_ALWAYS
))
2756 USED_REX (REX_MODE64
);
2757 if (rex
& REX_MODE64
)
2761 if (sizeflag
& DFLAG
)
2765 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2781 USED_REX (REX_MODE64
);
2782 if (mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
2784 if (rex
& REX_MODE64
)
2788 if (sizeflag
& DFLAG
)
2792 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2797 USED_REX (REX_MODE64
);
2800 if (rex
& REX_MODE64
)
2805 else if (sizeflag
& DFLAG
)
2818 if (rex
& REX_MODE64
)
2820 else if (sizeflag
& DFLAG
)
2825 if (!(rex
& REX_MODE64
))
2826 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2831 if (sizeflag
& SUFFIX_ALWAYS
)
2833 if (rex
& REX_MODE64
)
2837 if (sizeflag
& DFLAG
)
2841 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2846 if (prefixes
& PREFIX_DATA
)
2850 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2855 if (rex
& REX_MODE64
)
2857 USED_REX (REX_MODE64
);
2861 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
2863 /* operand size flag for cwtl, cbtw */
2867 else if (sizeflag
& DFLAG
)
2878 if (sizeflag
& DFLAG
)
2889 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2902 obufp
+= strlen (s
);
2908 if (prefixes
& PREFIX_CS
)
2910 used_prefixes
|= PREFIX_CS
;
2911 oappend ("%cs:" + intel_syntax
);
2913 if (prefixes
& PREFIX_DS
)
2915 used_prefixes
|= PREFIX_DS
;
2916 oappend ("%ds:" + intel_syntax
);
2918 if (prefixes
& PREFIX_SS
)
2920 used_prefixes
|= PREFIX_SS
;
2921 oappend ("%ss:" + intel_syntax
);
2923 if (prefixes
& PREFIX_ES
)
2925 used_prefixes
|= PREFIX_ES
;
2926 oappend ("%es:" + intel_syntax
);
2928 if (prefixes
& PREFIX_FS
)
2930 used_prefixes
|= PREFIX_FS
;
2931 oappend ("%fs:" + intel_syntax
);
2933 if (prefixes
& PREFIX_GS
)
2935 used_prefixes
|= PREFIX_GS
;
2936 oappend ("%gs:" + intel_syntax
);
2941 OP_indirE (bytemode
, sizeflag
)
2947 OP_E (bytemode
, sizeflag
);
2951 print_operand_value (buf
, hex
, disp
)
2964 sprintf_vma (tmp
, disp
);
2965 for (i
= 0; tmp
[i
] == '0' && tmp
[i
+ 1]; i
++);
2966 strcpy (buf
+ 2, tmp
+ i
);
2970 bfd_signed_vma v
= disp
;
2977 /* Check for possible overflow on 0x8000000000000000. */
2980 strcpy (buf
, "9223372036854775808");
2994 tmp
[28 - i
] = (v
% 10) + '0';
2998 strcpy (buf
, tmp
+ 29 - i
);
3004 sprintf (buf
, "0x%x", (unsigned int) disp
);
3006 sprintf (buf
, "%d", (int) disp
);
3011 OP_E (bytemode
, sizeflag
)
3018 USED_REX (REX_EXTZ
);
3022 /* Skip mod/rm byte. */
3033 oappend (names8rex
[rm
+ add
]);
3035 oappend (names8
[rm
+ add
]);
3038 oappend (names16
[rm
+ add
]);
3041 oappend (names32
[rm
+ add
]);
3044 oappend (names64
[rm
+ add
]);
3048 oappend (names64
[rm
+ add
]);
3050 oappend (names32
[rm
+ add
]);
3054 USED_REX (REX_MODE64
);
3055 if (rex
& REX_MODE64
)
3056 oappend (names64
[rm
+ add
]);
3057 else if ((sizeflag
& DFLAG
) || bytemode
== dq_mode
)
3058 oappend (names32
[rm
+ add
]);
3060 oappend (names16
[rm
+ add
]);
3061 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3064 if (!(codep
[-2] == 0xAE && codep
[-1] == 0xF8 /* sfence */)
3065 && !(codep
[-2] == 0xAE && codep
[-1] == 0xF0 /* mfence */)
3066 && !(codep
[-2] == 0xAE && codep
[-1] == 0xe8 /* lfence */))
3067 BadOp (); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */
3070 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3079 if ((sizeflag
& AFLAG
) || mode_64bit
) /* 32 bit address mode */
3094 FETCH_DATA (the_info
, codep
+ 1);
3095 scale
= (*codep
>> 6) & 3;
3096 index
= (*codep
>> 3) & 7;
3098 USED_REX (REX_EXTY
);
3099 USED_REX (REX_EXTZ
);
3110 if ((base
& 7) == 5)
3113 if (mode_64bit
&& !havesib
&& (sizeflag
& AFLAG
))
3119 FETCH_DATA (the_info
, codep
+ 1);
3121 if ((disp
& 0x80) != 0)
3130 if (mod
!= 0 || (base
& 7) == 5)
3132 print_operand_value (scratchbuf
, !riprel
, disp
);
3133 oappend (scratchbuf
);
3141 if (havebase
|| (havesib
&& (index
!= 4 || scale
!= 0)))
3148 oappend ("BYTE PTR ");
3151 oappend ("WORD PTR ");
3154 oappend ("DWORD PTR ");
3157 oappend ("QWORD PTR ");
3161 oappend ("DWORD PTR ");
3163 oappend ("QWORD PTR ");
3166 oappend ("XWORD PTR ");
3172 *obufp
++ = open_char
;
3173 if (intel_syntax
&& riprel
)
3176 USED_REX (REX_EXTZ
);
3177 if (!havesib
&& (rex
& REX_EXTZ
))
3180 oappend (mode_64bit
&& (sizeflag
& AFLAG
)
3181 ? names64
[base
] : names32
[base
]);
3190 *obufp
++ = separator_char
;
3193 sprintf (scratchbuf
, "%s",
3194 mode_64bit
&& (sizeflag
& AFLAG
)
3195 ? names64
[index
] : names32
[index
]);
3198 sprintf (scratchbuf
, ",%s",
3199 mode_64bit
&& (sizeflag
& AFLAG
)
3200 ? names64
[index
] : names32
[index
]);
3201 oappend (scratchbuf
);
3205 && bytemode
!= b_mode
3206 && bytemode
!= w_mode
3207 && bytemode
!= v_mode
))
3209 *obufp
++ = scale_char
;
3211 sprintf (scratchbuf
, "%d", 1 << scale
);
3212 oappend (scratchbuf
);
3216 if (mod
!= 0 || (base
& 7) == 5)
3218 /* Don't print zero displacements. */
3221 if ((bfd_signed_vma
) disp
> 0)
3227 print_operand_value (scratchbuf
, 0, disp
);
3228 oappend (scratchbuf
);
3232 *obufp
++ = close_char
;
3235 else if (intel_syntax
)
3237 if (mod
!= 0 || (base
& 7) == 5)
3239 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
3240 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
3244 oappend (names_seg
[ds_reg
- es_reg
]);
3247 print_operand_value (scratchbuf
, 1, disp
);
3248 oappend (scratchbuf
);
3253 { /* 16 bit address mode */
3260 if ((disp
& 0x8000) != 0)
3265 FETCH_DATA (the_info
, codep
+ 1);
3267 if ((disp
& 0x80) != 0)
3272 if ((disp
& 0x8000) != 0)
3278 if (mod
!= 0 || (rm
& 7) == 6)
3280 print_operand_value (scratchbuf
, 0, disp
);
3281 oappend (scratchbuf
);
3284 if (mod
!= 0 || (rm
& 7) != 6)
3286 *obufp
++ = open_char
;
3288 oappend (index16
[rm
+ add
]);
3289 *obufp
++ = close_char
;
3296 OP_G (bytemode
, sizeflag
)
3301 USED_REX (REX_EXTX
);
3309 oappend (names8rex
[reg
+ add
]);
3311 oappend (names8
[reg
+ add
]);
3314 oappend (names16
[reg
+ add
]);
3317 oappend (names32
[reg
+ add
]);
3320 oappend (names64
[reg
+ add
]);
3323 USED_REX (REX_MODE64
);
3324 if (rex
& REX_MODE64
)
3325 oappend (names64
[reg
+ add
]);
3326 else if (sizeflag
& DFLAG
)
3327 oappend (names32
[reg
+ add
]);
3329 oappend (names16
[reg
+ add
]);
3330 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3333 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3346 FETCH_DATA (the_info
, codep
+ 8);
3347 a
= *codep
++ & 0xff;
3348 a
|= (*codep
++ & 0xff) << 8;
3349 a
|= (*codep
++ & 0xff) << 16;
3350 a
|= (*codep
++ & 0xff) << 24;
3351 b
= *codep
++ & 0xff;
3352 b
|= (*codep
++ & 0xff) << 8;
3353 b
|= (*codep
++ & 0xff) << 16;
3354 b
|= (*codep
++ & 0xff) << 24;
3355 x
= a
+ ((bfd_vma
) b
<< 32);
3363 static bfd_signed_vma
3366 bfd_signed_vma x
= 0;
3368 FETCH_DATA (the_info
, codep
+ 4);
3369 x
= *codep
++ & (bfd_signed_vma
) 0xff;
3370 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
3371 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
3372 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
3376 static bfd_signed_vma
3379 bfd_signed_vma x
= 0;
3381 FETCH_DATA (the_info
, codep
+ 4);
3382 x
= *codep
++ & (bfd_signed_vma
) 0xff;
3383 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
3384 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
3385 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
3387 x
= (x
^ ((bfd_signed_vma
) 1 << 31)) - ((bfd_signed_vma
) 1 << 31);
3397 FETCH_DATA (the_info
, codep
+ 2);
3398 x
= *codep
++ & 0xff;
3399 x
|= (*codep
++ & 0xff) << 8;
3408 op_index
[op_ad
] = op_ad
;
3411 op_address
[op_ad
] = op
;
3412 op_riprel
[op_ad
] = riprel
;
3416 /* Mask to get a 32-bit address. */
3417 op_address
[op_ad
] = op
& 0xffffffff;
3418 op_riprel
[op_ad
] = riprel
& 0xffffffff;
3423 OP_REG (code
, sizeflag
)
3429 USED_REX (REX_EXTZ
);
3441 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
3442 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
3443 s
= names16
[code
- ax_reg
+ add
];
3445 case es_reg
: case ss_reg
: case cs_reg
:
3446 case ds_reg
: case fs_reg
: case gs_reg
:
3447 s
= names_seg
[code
- es_reg
+ add
];
3449 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
3450 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
3453 s
= names8rex
[code
- al_reg
+ add
];
3455 s
= names8
[code
- al_reg
];
3457 case rAX_reg
: case rCX_reg
: case rDX_reg
: case rBX_reg
:
3458 case rSP_reg
: case rBP_reg
: case rSI_reg
: case rDI_reg
:
3461 s
= names64
[code
- rAX_reg
+ add
];
3464 code
+= eAX_reg
- rAX_reg
;
3466 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
3467 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
3468 USED_REX (REX_MODE64
);
3469 if (rex
& REX_MODE64
)
3470 s
= names64
[code
- eAX_reg
+ add
];
3471 else if (sizeflag
& DFLAG
)
3472 s
= names32
[code
- eAX_reg
+ add
];
3474 s
= names16
[code
- eAX_reg
+ add
];
3475 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3478 s
= INTERNAL_DISASSEMBLER_ERROR
;
3485 OP_IMREG (code
, sizeflag
)
3499 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
3500 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
3501 s
= names16
[code
- ax_reg
];
3503 case es_reg
: case ss_reg
: case cs_reg
:
3504 case ds_reg
: case fs_reg
: case gs_reg
:
3505 s
= names_seg
[code
- es_reg
];
3507 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
3508 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
3511 s
= names8rex
[code
- al_reg
];
3513 s
= names8
[code
- al_reg
];
3515 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
3516 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
3517 USED_REX (REX_MODE64
);
3518 if (rex
& REX_MODE64
)
3519 s
= names64
[code
- eAX_reg
];
3520 else if (sizeflag
& DFLAG
)
3521 s
= names32
[code
- eAX_reg
];
3523 s
= names16
[code
- eAX_reg
];
3524 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3527 s
= INTERNAL_DISASSEMBLER_ERROR
;
3534 OP_I (bytemode
, sizeflag
)
3539 bfd_signed_vma mask
= -1;
3544 FETCH_DATA (the_info
, codep
+ 1);
3556 USED_REX (REX_MODE64
);
3557 if (rex
& REX_MODE64
)
3559 else if (sizeflag
& DFLAG
)
3569 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3576 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3581 scratchbuf
[0] = '$';
3582 print_operand_value (scratchbuf
+ 1, 1, op
);
3583 oappend (scratchbuf
+ intel_syntax
);
3584 scratchbuf
[0] = '\0';
3588 OP_I64 (bytemode
, sizeflag
)
3593 bfd_signed_vma mask
= -1;
3597 OP_I (bytemode
, sizeflag
);
3604 FETCH_DATA (the_info
, codep
+ 1);
3609 USED_REX (REX_MODE64
);
3610 if (rex
& REX_MODE64
)
3612 else if (sizeflag
& DFLAG
)
3622 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3629 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3634 scratchbuf
[0] = '$';
3635 print_operand_value (scratchbuf
+ 1, 1, op
);
3636 oappend (scratchbuf
+ intel_syntax
);
3637 scratchbuf
[0] = '\0';
3641 OP_sI (bytemode
, sizeflag
)
3646 bfd_signed_vma mask
= -1;
3651 FETCH_DATA (the_info
, codep
+ 1);
3653 if ((op
& 0x80) != 0)
3658 USED_REX (REX_MODE64
);
3659 if (rex
& REX_MODE64
)
3661 else if (sizeflag
& DFLAG
)
3670 if ((op
& 0x8000) != 0)
3673 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3678 if ((op
& 0x8000) != 0)
3682 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3686 scratchbuf
[0] = '$';
3687 print_operand_value (scratchbuf
+ 1, 1, op
);
3688 oappend (scratchbuf
+ intel_syntax
);
3692 OP_J (bytemode
, sizeflag
)
3702 FETCH_DATA (the_info
, codep
+ 1);
3704 if ((disp
& 0x80) != 0)
3708 if (sizeflag
& DFLAG
)
3713 /* For some reason, a data16 prefix on a jump instruction
3714 means that the pc is masked to 16 bits after the
3715 displacement is added! */
3720 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3723 disp
= (start_pc
+ codep
- start_codep
+ disp
) & mask
;
3725 print_operand_value (scratchbuf
, 1, disp
);
3726 oappend (scratchbuf
);
3730 OP_SEG (dummy
, sizeflag
)
3731 int dummy ATTRIBUTE_UNUSED
;
3732 int sizeflag ATTRIBUTE_UNUSED
;
3734 oappend (names_seg
[reg
]);
3738 OP_DIR (dummy
, sizeflag
)
3739 int dummy ATTRIBUTE_UNUSED
;
3744 if (sizeflag
& DFLAG
)
3754 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3756 sprintf (scratchbuf
, "0x%x,0x%x", seg
, offset
);
3758 sprintf (scratchbuf
, "$0x%x,$0x%x", seg
, offset
);
3759 oappend (scratchbuf
);
3763 OP_OFF (bytemode
, sizeflag
)
3764 int bytemode ATTRIBUTE_UNUSED
;
3771 if ((sizeflag
& AFLAG
) || mode_64bit
)
3778 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
3779 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
3781 oappend (names_seg
[ds_reg
- es_reg
]);
3785 print_operand_value (scratchbuf
, 1, off
);
3786 oappend (scratchbuf
);
3790 OP_OFF64 (bytemode
, sizeflag
)
3791 int bytemode ATTRIBUTE_UNUSED
;
3792 int sizeflag ATTRIBUTE_UNUSED
;
3798 OP_OFF (bytemode
, sizeflag
);
3808 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
3809 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
3811 oappend (names_seg
[ds_reg
- es_reg
]);
3815 print_operand_value (scratchbuf
, 1, off
);
3816 oappend (scratchbuf
);
3820 ptr_reg (code
, sizeflag
)
3830 USED_REX (REX_MODE64
);
3831 if (rex
& REX_MODE64
)
3833 if (!(sizeflag
& AFLAG
))
3834 s
= names32
[code
- eAX_reg
];
3836 s
= names64
[code
- eAX_reg
];
3838 else if (sizeflag
& AFLAG
)
3839 s
= names32
[code
- eAX_reg
];
3841 s
= names16
[code
- eAX_reg
];
3850 OP_ESreg (code
, sizeflag
)
3854 oappend ("%es:" + intel_syntax
);
3855 ptr_reg (code
, sizeflag
);
3859 OP_DSreg (code
, sizeflag
)
3870 prefixes
|= PREFIX_DS
;
3872 ptr_reg (code
, sizeflag
);
3876 OP_C (dummy
, sizeflag
)
3877 int dummy ATTRIBUTE_UNUSED
;
3878 int sizeflag ATTRIBUTE_UNUSED
;
3881 USED_REX (REX_EXTX
);
3884 sprintf (scratchbuf
, "%%cr%d", reg
+ add
);
3885 oappend (scratchbuf
+ intel_syntax
);
3889 OP_D (dummy
, sizeflag
)
3890 int dummy ATTRIBUTE_UNUSED
;
3891 int sizeflag ATTRIBUTE_UNUSED
;
3894 USED_REX (REX_EXTX
);
3898 sprintf (scratchbuf
, "db%d", reg
+ add
);
3900 sprintf (scratchbuf
, "%%db%d", reg
+ add
);
3901 oappend (scratchbuf
);
3905 OP_T (dummy
, sizeflag
)
3906 int dummy ATTRIBUTE_UNUSED
;
3907 int sizeflag ATTRIBUTE_UNUSED
;
3909 sprintf (scratchbuf
, "%%tr%d", reg
);
3910 oappend (scratchbuf
+ intel_syntax
);
3914 OP_Rd (bytemode
, sizeflag
)
3919 OP_E (bytemode
, sizeflag
);
3925 OP_MMX (bytemode
, sizeflag
)
3926 int bytemode ATTRIBUTE_UNUSED
;
3927 int sizeflag ATTRIBUTE_UNUSED
;
3930 USED_REX (REX_EXTX
);
3933 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3934 if (prefixes
& PREFIX_DATA
)
3935 sprintf (scratchbuf
, "%%xmm%d", reg
+ add
);
3937 sprintf (scratchbuf
, "%%mm%d", reg
+ add
);
3938 oappend (scratchbuf
+ intel_syntax
);
3942 OP_XMM (bytemode
, sizeflag
)
3943 int bytemode ATTRIBUTE_UNUSED
;
3944 int sizeflag ATTRIBUTE_UNUSED
;
3947 USED_REX (REX_EXTX
);
3950 sprintf (scratchbuf
, "%%xmm%d", reg
+ add
);
3951 oappend (scratchbuf
+ intel_syntax
);
3955 OP_EM (bytemode
, sizeflag
)
3962 OP_E (bytemode
, sizeflag
);
3965 USED_REX (REX_EXTZ
);
3969 /* Skip mod/rm byte. */
3972 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3973 if (prefixes
& PREFIX_DATA
)
3974 sprintf (scratchbuf
, "%%xmm%d", rm
+ add
);
3976 sprintf (scratchbuf
, "%%mm%d", rm
+ add
);
3977 oappend (scratchbuf
+ intel_syntax
);
3981 OP_EX (bytemode
, sizeflag
)
3988 OP_E (bytemode
, sizeflag
);
3991 USED_REX (REX_EXTZ
);
3995 /* Skip mod/rm byte. */
3998 sprintf (scratchbuf
, "%%xmm%d", rm
+ add
);
3999 oappend (scratchbuf
+ intel_syntax
);
4003 OP_MS (bytemode
, sizeflag
)
4008 OP_EM (bytemode
, sizeflag
);
4014 OP_XS (bytemode
, sizeflag
)
4019 OP_EX (bytemode
, sizeflag
);
4024 static const char *const Suffix3DNow
[] = {
4025 /* 00 */ NULL
, NULL
, NULL
, NULL
,
4026 /* 04 */ NULL
, NULL
, NULL
, NULL
,
4027 /* 08 */ NULL
, NULL
, NULL
, NULL
,
4028 /* 0C */ "pi2fw", "pi2fd", NULL
, NULL
,
4029 /* 10 */ NULL
, NULL
, NULL
, NULL
,
4030 /* 14 */ NULL
, NULL
, NULL
, NULL
,
4031 /* 18 */ NULL
, NULL
, NULL
, NULL
,
4032 /* 1C */ "pf2iw", "pf2id", NULL
, NULL
,
4033 /* 20 */ NULL
, NULL
, NULL
, NULL
,
4034 /* 24 */ NULL
, NULL
, NULL
, NULL
,
4035 /* 28 */ NULL
, NULL
, NULL
, NULL
,
4036 /* 2C */ NULL
, NULL
, NULL
, NULL
,
4037 /* 30 */ NULL
, NULL
, NULL
, NULL
,
4038 /* 34 */ NULL
, NULL
, NULL
, NULL
,
4039 /* 38 */ NULL
, NULL
, NULL
, NULL
,
4040 /* 3C */ NULL
, NULL
, NULL
, NULL
,
4041 /* 40 */ NULL
, NULL
, NULL
, NULL
,
4042 /* 44 */ NULL
, NULL
, NULL
, NULL
,
4043 /* 48 */ NULL
, NULL
, NULL
, NULL
,
4044 /* 4C */ NULL
, NULL
, NULL
, NULL
,
4045 /* 50 */ NULL
, NULL
, NULL
, NULL
,
4046 /* 54 */ NULL
, NULL
, NULL
, NULL
,
4047 /* 58 */ NULL
, NULL
, NULL
, NULL
,
4048 /* 5C */ NULL
, NULL
, NULL
, NULL
,
4049 /* 60 */ NULL
, NULL
, NULL
, NULL
,
4050 /* 64 */ NULL
, NULL
, NULL
, NULL
,
4051 /* 68 */ NULL
, NULL
, NULL
, NULL
,
4052 /* 6C */ NULL
, NULL
, NULL
, NULL
,
4053 /* 70 */ NULL
, NULL
, NULL
, NULL
,
4054 /* 74 */ NULL
, NULL
, NULL
, NULL
,
4055 /* 78 */ NULL
, NULL
, NULL
, NULL
,
4056 /* 7C */ NULL
, NULL
, NULL
, NULL
,
4057 /* 80 */ NULL
, NULL
, NULL
, NULL
,
4058 /* 84 */ NULL
, NULL
, NULL
, NULL
,
4059 /* 88 */ NULL
, NULL
, "pfnacc", NULL
,
4060 /* 8C */ NULL
, NULL
, "pfpnacc", NULL
,
4061 /* 90 */ "pfcmpge", NULL
, NULL
, NULL
,
4062 /* 94 */ "pfmin", NULL
, "pfrcp", "pfrsqrt",
4063 /* 98 */ NULL
, NULL
, "pfsub", NULL
,
4064 /* 9C */ NULL
, NULL
, "pfadd", NULL
,
4065 /* A0 */ "pfcmpgt", NULL
, NULL
, NULL
,
4066 /* A4 */ "pfmax", NULL
, "pfrcpit1", "pfrsqit1",
4067 /* A8 */ NULL
, NULL
, "pfsubr", NULL
,
4068 /* AC */ NULL
, NULL
, "pfacc", NULL
,
4069 /* B0 */ "pfcmpeq", NULL
, NULL
, NULL
,
4070 /* B4 */ "pfmul", NULL
, "pfrcpit2", "pfmulhrw",
4071 /* B8 */ NULL
, NULL
, NULL
, "pswapd",
4072 /* BC */ NULL
, NULL
, NULL
, "pavgusb",
4073 /* C0 */ NULL
, NULL
, NULL
, NULL
,
4074 /* C4 */ NULL
, NULL
, NULL
, NULL
,
4075 /* C8 */ NULL
, NULL
, NULL
, NULL
,
4076 /* CC */ NULL
, NULL
, NULL
, NULL
,
4077 /* D0 */ NULL
, NULL
, NULL
, NULL
,
4078 /* D4 */ NULL
, NULL
, NULL
, NULL
,
4079 /* D8 */ NULL
, NULL
, NULL
, NULL
,
4080 /* DC */ NULL
, NULL
, NULL
, NULL
,
4081 /* E0 */ NULL
, NULL
, NULL
, NULL
,
4082 /* E4 */ NULL
, NULL
, NULL
, NULL
,
4083 /* E8 */ NULL
, NULL
, NULL
, NULL
,
4084 /* EC */ NULL
, NULL
, NULL
, NULL
,
4085 /* F0 */ NULL
, NULL
, NULL
, NULL
,
4086 /* F4 */ NULL
, NULL
, NULL
, NULL
,
4087 /* F8 */ NULL
, NULL
, NULL
, NULL
,
4088 /* FC */ NULL
, NULL
, NULL
, NULL
,
4092 OP_3DNowSuffix (bytemode
, sizeflag
)
4093 int bytemode ATTRIBUTE_UNUSED
;
4094 int sizeflag ATTRIBUTE_UNUSED
;
4096 const char *mnemonic
;
4098 FETCH_DATA (the_info
, codep
+ 1);
4099 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4100 place where an 8-bit immediate would normally go. ie. the last
4101 byte of the instruction. */
4102 obufp
= obuf
+ strlen (obuf
);
4103 mnemonic
= Suffix3DNow
[*codep
++ & 0xff];
4108 /* Since a variable sized modrm/sib chunk is between the start
4109 of the opcode (0x0f0f) and the opcode suffix, we need to do
4110 all the modrm processing first, and don't know until now that
4111 we have a bad opcode. This necessitates some cleaning up. */
4118 static const char *simd_cmp_op
[] = {
4130 OP_SIMD_Suffix (bytemode
, sizeflag
)
4131 int bytemode ATTRIBUTE_UNUSED
;
4132 int sizeflag ATTRIBUTE_UNUSED
;
4134 unsigned int cmp_type
;
4136 FETCH_DATA (the_info
, codep
+ 1);
4137 obufp
= obuf
+ strlen (obuf
);
4138 cmp_type
= *codep
++ & 0xff;
4141 char suffix1
= 'p', suffix2
= 's';
4142 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
4143 if (prefixes
& PREFIX_REPZ
)
4147 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4148 if (prefixes
& PREFIX_DATA
)
4152 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
4153 if (prefixes
& PREFIX_REPNZ
)
4154 suffix1
= 's', suffix2
= 'd';
4157 sprintf (scratchbuf
, "cmp%s%c%c",
4158 simd_cmp_op
[cmp_type
], suffix1
, suffix2
);
4159 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
4160 oappend (scratchbuf
);
4164 /* We have a bad extension byte. Clean up. */
4172 SIMD_Fixup (extrachar
, sizeflag
)
4174 int sizeflag ATTRIBUTE_UNUSED
;
4176 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4177 forms of these instructions. */
4180 char *p
= obuf
+ strlen (obuf
);
4183 *(p
- 1) = *(p
- 2);
4184 *(p
- 2) = *(p
- 3);
4185 *(p
- 3) = extrachar
;
4190 PNI_Fixup (extrachar
, sizeflag
)
4191 int extrachar ATTRIBUTE_UNUSED
;
4192 int sizeflag ATTRIBUTE_UNUSED
;
4194 if (mod
== 3 && reg
== 1)
4196 char *p
= obuf
+ strlen (obuf
);
4198 /* Override "sidt". */
4201 /* mwait %eax,%ecx */
4202 strcpy (p
- 4, "mwait %eax,%ecx");
4206 /* monitor %eax,%ecx,%edx" */
4207 strcpy (p
- 4, "monitor %eax,%ecx,%edx");
4219 /* Throw away prefixes and 1st. opcode byte. */
4220 codep
= insn_codep
+ 1;