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[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
26
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
33
34 #include "dis-asm.h"
35 #include "sysdep.h"
36 #include "opintl.h"
37 #include "opcode/i386.h"
38
39 #include <setjmp.h>
40
41 static int fetch_data (struct disassemble_info *, bfd_byte *);
42 static void ckprefix (void);
43 static const char *prefix_name (int, int);
44 static int print_insn (bfd_vma, disassemble_info *);
45 static void dofloat (int);
46 static void OP_ST (int, int);
47 static void OP_STi (int, int);
48 static int putop (const char *, int);
49 static void oappend (const char *);
50 static void append_seg (void);
51 static void OP_indirE (int, int);
52 static void print_operand_value (char *, int, bfd_vma);
53 static void OP_E (int, int);
54 static void OP_G (int, int);
55 static bfd_vma get64 (void);
56 static bfd_signed_vma get32 (void);
57 static bfd_signed_vma get32s (void);
58 static int get16 (void);
59 static void set_op (bfd_vma, int);
60 static void OP_REG (int, int);
61 static void OP_IMREG (int, int);
62 static void OP_I (int, int);
63 static void OP_I64 (int, int);
64 static void OP_sI (int, int);
65 static void OP_J (int, int);
66 static void OP_SEG (int, int);
67 static void OP_DIR (int, int);
68 static void OP_OFF (int, int);
69 static void OP_OFF64 (int, int);
70 static void ptr_reg (int, int);
71 static void OP_ESreg (int, int);
72 static void OP_DSreg (int, int);
73 static void OP_C (int, int);
74 static void OP_D (int, int);
75 static void OP_T (int, int);
76 static void OP_R (int, int);
77 static void OP_MMX (int, int);
78 static void OP_XMM (int, int);
79 static void OP_EM (int, int);
80 static void OP_EX (int, int);
81 static void OP_EMC (int,int);
82 static void OP_MXC (int,int);
83 static void OP_MS (int, int);
84 static void OP_XS (int, int);
85 static void OP_M (int, int);
86 static void OP_VMX (int, int);
87 static void OP_0fae (int, int);
88 static void OP_0f07 (int, int);
89 static void NOP_Fixup1 (int, int);
90 static void NOP_Fixup2 (int, int);
91 static void OP_3DNowSuffix (int, int);
92 static void OP_SIMD_Suffix (int, int);
93 static void SIMD_Fixup (int, int);
94 static void PNI_Fixup (int, int);
95 static void SVME_Fixup (int, int);
96 static void INVLPG_Fixup (int, int);
97 static void BadOp (void);
98 static void VMX_Fixup (int, int);
99 static void REP_Fixup (int, int);
100 static void CMPXCHG8B_Fixup (int, int);
101 static void XMM_Fixup (int, int);
102
103 struct dis_private {
104 /* Points to first byte not fetched. */
105 bfd_byte *max_fetched;
106 bfd_byte the_buffer[MAX_MNEM_SIZE];
107 bfd_vma insn_start;
108 int orig_sizeflag;
109 jmp_buf bailout;
110 };
111
112 enum address_mode
113 {
114 mode_16bit,
115 mode_32bit,
116 mode_64bit
117 };
118
119 enum address_mode address_mode;
120
121 /* Flags for the prefixes for the current instruction. See below. */
122 static int prefixes;
123
124 /* REX prefix the current instruction. See below. */
125 static int rex;
126 /* Bits of REX we've already used. */
127 static int rex_used;
128 /* Mark parts used in the REX prefix. When we are testing for
129 empty prefix (for 8bit register REX extension), just mask it
130 out. Otherwise test for REX bit is excuse for existence of REX
131 only in case value is nonzero. */
132 #define USED_REX(value) \
133 { \
134 if (value) \
135 { \
136 if ((rex & value)) \
137 rex_used |= (value) | REX_OPCODE; \
138 } \
139 else \
140 rex_used |= REX_OPCODE; \
141 }
142
143 /* Flags for prefixes which we somehow handled when printing the
144 current instruction. */
145 static int used_prefixes;
146
147 /* Flags stored in PREFIXES. */
148 #define PREFIX_REPZ 1
149 #define PREFIX_REPNZ 2
150 #define PREFIX_LOCK 4
151 #define PREFIX_CS 8
152 #define PREFIX_SS 0x10
153 #define PREFIX_DS 0x20
154 #define PREFIX_ES 0x40
155 #define PREFIX_FS 0x80
156 #define PREFIX_GS 0x100
157 #define PREFIX_DATA 0x200
158 #define PREFIX_ADDR 0x400
159 #define PREFIX_FWAIT 0x800
160
161 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
162 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
163 on error. */
164 #define FETCH_DATA(info, addr) \
165 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
166 ? 1 : fetch_data ((info), (addr)))
167
168 static int
169 fetch_data (struct disassemble_info *info, bfd_byte *addr)
170 {
171 int status;
172 struct dis_private *priv = (struct dis_private *) info->private_data;
173 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
174
175 if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
176 status = (*info->read_memory_func) (start,
177 priv->max_fetched,
178 addr - priv->max_fetched,
179 info);
180 else
181 status = -1;
182 if (status != 0)
183 {
184 /* If we did manage to read at least one byte, then
185 print_insn_i386 will do something sensible. Otherwise, print
186 an error. We do that here because this is where we know
187 STATUS. */
188 if (priv->max_fetched == priv->the_buffer)
189 (*info->memory_error_func) (status, start, info);
190 longjmp (priv->bailout, 1);
191 }
192 else
193 priv->max_fetched = addr;
194 return 1;
195 }
196
197 #define XX { NULL, 0 }
198
199 #define Eb { OP_E, b_mode }
200 #define Ev { OP_E, v_mode }
201 #define Ed { OP_E, d_mode }
202 #define Edq { OP_E, dq_mode }
203 #define Edqw { OP_E, dqw_mode }
204 #define Edqb { OP_E, dqb_mode }
205 #define Edqd { OP_E, dqd_mode }
206 #define indirEv { OP_indirE, stack_v_mode }
207 #define indirEp { OP_indirE, f_mode }
208 #define stackEv { OP_E, stack_v_mode }
209 #define Em { OP_E, m_mode }
210 #define Ew { OP_E, w_mode }
211 #define M { OP_M, 0 } /* lea, lgdt, etc. */
212 #define Ma { OP_M, v_mode }
213 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
214 #define Mq { OP_M, q_mode }
215 #define Gb { OP_G, b_mode }
216 #define Gv { OP_G, v_mode }
217 #define Gd { OP_G, d_mode }
218 #define Gdq { OP_G, dq_mode }
219 #define Gm { OP_G, m_mode }
220 #define Gw { OP_G, w_mode }
221 #define Rd { OP_R, d_mode }
222 #define Rm { OP_R, m_mode }
223 #define Ib { OP_I, b_mode }
224 #define sIb { OP_sI, b_mode } /* sign extened byte */
225 #define Iv { OP_I, v_mode }
226 #define Iq { OP_I, q_mode }
227 #define Iv64 { OP_I64, v_mode }
228 #define Iw { OP_I, w_mode }
229 #define I1 { OP_I, const_1_mode }
230 #define Jb { OP_J, b_mode }
231 #define Jv { OP_J, v_mode }
232 #define Cm { OP_C, m_mode }
233 #define Dm { OP_D, m_mode }
234 #define Td { OP_T, d_mode }
235
236 #define RMeAX { OP_REG, eAX_reg }
237 #define RMeBX { OP_REG, eBX_reg }
238 #define RMeCX { OP_REG, eCX_reg }
239 #define RMeDX { OP_REG, eDX_reg }
240 #define RMeSP { OP_REG, eSP_reg }
241 #define RMeBP { OP_REG, eBP_reg }
242 #define RMeSI { OP_REG, eSI_reg }
243 #define RMeDI { OP_REG, eDI_reg }
244 #define RMrAX { OP_REG, rAX_reg }
245 #define RMrBX { OP_REG, rBX_reg }
246 #define RMrCX { OP_REG, rCX_reg }
247 #define RMrDX { OP_REG, rDX_reg }
248 #define RMrSP { OP_REG, rSP_reg }
249 #define RMrBP { OP_REG, rBP_reg }
250 #define RMrSI { OP_REG, rSI_reg }
251 #define RMrDI { OP_REG, rDI_reg }
252 #define RMAL { OP_REG, al_reg }
253 #define RMAL { OP_REG, al_reg }
254 #define RMCL { OP_REG, cl_reg }
255 #define RMDL { OP_REG, dl_reg }
256 #define RMBL { OP_REG, bl_reg }
257 #define RMAH { OP_REG, ah_reg }
258 #define RMCH { OP_REG, ch_reg }
259 #define RMDH { OP_REG, dh_reg }
260 #define RMBH { OP_REG, bh_reg }
261 #define RMAX { OP_REG, ax_reg }
262 #define RMDX { OP_REG, dx_reg }
263
264 #define eAX { OP_IMREG, eAX_reg }
265 #define eBX { OP_IMREG, eBX_reg }
266 #define eCX { OP_IMREG, eCX_reg }
267 #define eDX { OP_IMREG, eDX_reg }
268 #define eSP { OP_IMREG, eSP_reg }
269 #define eBP { OP_IMREG, eBP_reg }
270 #define eSI { OP_IMREG, eSI_reg }
271 #define eDI { OP_IMREG, eDI_reg }
272 #define AL { OP_IMREG, al_reg }
273 #define CL { OP_IMREG, cl_reg }
274 #define DL { OP_IMREG, dl_reg }
275 #define BL { OP_IMREG, bl_reg }
276 #define AH { OP_IMREG, ah_reg }
277 #define CH { OP_IMREG, ch_reg }
278 #define DH { OP_IMREG, dh_reg }
279 #define BH { OP_IMREG, bh_reg }
280 #define AX { OP_IMREG, ax_reg }
281 #define DX { OP_IMREG, dx_reg }
282 #define zAX { OP_IMREG, z_mode_ax_reg }
283 #define indirDX { OP_IMREG, indir_dx_reg }
284
285 #define Sw { OP_SEG, w_mode }
286 #define Sv { OP_SEG, v_mode }
287 #define Ap { OP_DIR, 0 }
288 #define Ob { OP_OFF64, b_mode }
289 #define Ov { OP_OFF64, v_mode }
290 #define Xb { OP_DSreg, eSI_reg }
291 #define Xv { OP_DSreg, eSI_reg }
292 #define Xz { OP_DSreg, eSI_reg }
293 #define Yb { OP_ESreg, eDI_reg }
294 #define Yv { OP_ESreg, eDI_reg }
295 #define DSBX { OP_DSreg, eBX_reg }
296
297 #define es { OP_REG, es_reg }
298 #define ss { OP_REG, ss_reg }
299 #define cs { OP_REG, cs_reg }
300 #define ds { OP_REG, ds_reg }
301 #define fs { OP_REG, fs_reg }
302 #define gs { OP_REG, gs_reg }
303
304 #define MX { OP_MMX, 0 }
305 #define XM { OP_XMM, 0 }
306 #define EM { OP_EM, v_mode }
307 #define EX { OP_EX, v_mode }
308 #define MS { OP_MS, v_mode }
309 #define XS { OP_XS, v_mode }
310 #define EMC { OP_EMC, v_mode }
311 #define MXC { OP_MXC, 0 }
312 #define VM { OP_VMX, q_mode }
313 #define OPSUF { OP_3DNowSuffix, 0 }
314 #define OPSIMD { OP_SIMD_Suffix, 0 }
315 #define XMM0 { XMM_Fixup, 0 }
316
317 /* Used handle "rep" prefix for string instructions. */
318 #define Xbr { REP_Fixup, eSI_reg }
319 #define Xvr { REP_Fixup, eSI_reg }
320 #define Ybr { REP_Fixup, eDI_reg }
321 #define Yvr { REP_Fixup, eDI_reg }
322 #define Yzr { REP_Fixup, eDI_reg }
323 #define indirDXr { REP_Fixup, indir_dx_reg }
324 #define ALr { REP_Fixup, al_reg }
325 #define eAXr { REP_Fixup, eAX_reg }
326
327 #define cond_jump_flag { NULL, cond_jump_mode }
328 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
329
330 /* bits in sizeflag */
331 #define SUFFIX_ALWAYS 4
332 #define AFLAG 2
333 #define DFLAG 1
334
335 #define b_mode 1 /* byte operand */
336 #define v_mode 2 /* operand size depends on prefixes */
337 #define w_mode 3 /* word operand */
338 #define d_mode 4 /* double word operand */
339 #define q_mode 5 /* quad word operand */
340 #define t_mode 6 /* ten-byte operand */
341 #define x_mode 7 /* 16-byte XMM operand */
342 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
343 #define cond_jump_mode 9
344 #define loop_jcxz_mode 10
345 #define dq_mode 11 /* operand size depends on REX prefixes. */
346 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
347 #define f_mode 13 /* 4- or 6-byte pointer operand */
348 #define const_1_mode 14
349 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
350 #define z_mode 16 /* non-quad operand size depends on prefixes */
351 #define o_mode 17 /* 16-byte operand */
352 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
353 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
354
355 #define es_reg 100
356 #define cs_reg 101
357 #define ss_reg 102
358 #define ds_reg 103
359 #define fs_reg 104
360 #define gs_reg 105
361
362 #define eAX_reg 108
363 #define eCX_reg 109
364 #define eDX_reg 110
365 #define eBX_reg 111
366 #define eSP_reg 112
367 #define eBP_reg 113
368 #define eSI_reg 114
369 #define eDI_reg 115
370
371 #define al_reg 116
372 #define cl_reg 117
373 #define dl_reg 118
374 #define bl_reg 119
375 #define ah_reg 120
376 #define ch_reg 121
377 #define dh_reg 122
378 #define bh_reg 123
379
380 #define ax_reg 124
381 #define cx_reg 125
382 #define dx_reg 126
383 #define bx_reg 127
384 #define sp_reg 128
385 #define bp_reg 129
386 #define si_reg 130
387 #define di_reg 131
388
389 #define rAX_reg 132
390 #define rCX_reg 133
391 #define rDX_reg 134
392 #define rBX_reg 135
393 #define rSP_reg 136
394 #define rBP_reg 137
395 #define rSI_reg 138
396 #define rDI_reg 139
397
398 #define z_mode_ax_reg 149
399 #define indir_dx_reg 150
400
401 #define FLOATCODE 1
402 #define USE_GROUPS 2
403 #define USE_PREFIX_USER_TABLE 3
404 #define X86_64_SPECIAL 4
405 #define IS_3BYTE_OPCODE 5
406
407 #define FLOAT NULL, { { NULL, FLOATCODE } }
408
409 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
410 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
411 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
412 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
413 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
414 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
415 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
416 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
417 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
418 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
419 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
420 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
421 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
422 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
423 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
424 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
425 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
426 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
427 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
428 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
429 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
430 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
431 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
432 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
433 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
434 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
435 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
436 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
437
438 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
439 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
440 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
441 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
442 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
443 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
444 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
445 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
446 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
447 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
448 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
449 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
450 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
451 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
452 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
453 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
454 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
455 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
456 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
457 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
458 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
459 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
460 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
461 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
462 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
463 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
464 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
465 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
466 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
467 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
468 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
469 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
470 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
471 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
472 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
473 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
474 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
475 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
476 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
477 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
478 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
479 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
480 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
481 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
482 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
483 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
484 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
485 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
486 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
487 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
488 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
489 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
490 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
491 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
492 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
493 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
494 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
495 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
496 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
497 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
498 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
499 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
500 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
501 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
502 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
503 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
504 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
505 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
506 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
507 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
508 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
509 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
510 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
511 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
512 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
513 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
514 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
515 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
516 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
517 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
518 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
519 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
520 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
521 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
522 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
523 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
524
525
526 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
527 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
528 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
529 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
530
531 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
532 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
533
534 typedef void (*op_rtn) (int bytemode, int sizeflag);
535
536 struct dis386 {
537 const char *name;
538 struct
539 {
540 op_rtn rtn;
541 int bytemode;
542 } op[MAX_OPERANDS];
543 };
544
545 /* Upper case letters in the instruction names here are macros.
546 'A' => print 'b' if no register operands or suffix_always is true
547 'B' => print 'b' if suffix_always is true
548 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
549 . size prefix
550 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
551 . suffix_always is true
552 'E' => print 'e' if 32-bit form of jcxz
553 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
554 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
555 'H' => print ",pt" or ",pn" branch hint
556 'I' => honor following macro letter even in Intel mode (implemented only
557 . for some of the macro letters)
558 'J' => print 'l'
559 'K' => print 'd' or 'q' if rex prefix is present.
560 'L' => print 'l' if suffix_always is true
561 'N' => print 'n' if instruction has no wait "prefix"
562 'O' => print 'd' or 'o' (or 'q' in Intel mode)
563 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
564 . or suffix_always is true. print 'q' if rex prefix is present.
565 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
566 . is true
567 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
568 'S' => print 'w', 'l' or 'q' if suffix_always is true
569 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
570 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
571 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
572 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
573 'X' => print 's', 'd' depending on data16 prefix (for XMM)
574 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
575 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
576
577 Many of the above letters print nothing in Intel mode. See "putop"
578 for the details.
579
580 Braces '{' and '}', and vertical bars '|', indicate alternative
581 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
582 modes. In cases where there are only two alternatives, the X86_64
583 instruction is reserved, and "(bad)" is printed.
584 */
585
586 static const struct dis386 dis386[] = {
587 /* 00 */
588 { "addB", { Eb, Gb } },
589 { "addS", { Ev, Gv } },
590 { "addB", { Gb, Eb } },
591 { "addS", { Gv, Ev } },
592 { "addB", { AL, Ib } },
593 { "addS", { eAX, Iv } },
594 { "push{T|}", { es } },
595 { "pop{T|}", { es } },
596 /* 08 */
597 { "orB", { Eb, Gb } },
598 { "orS", { Ev, Gv } },
599 { "orB", { Gb, Eb } },
600 { "orS", { Gv, Ev } },
601 { "orB", { AL, Ib } },
602 { "orS", { eAX, Iv } },
603 { "push{T|}", { cs } },
604 { "(bad)", { XX } }, /* 0x0f extended opcode escape */
605 /* 10 */
606 { "adcB", { Eb, Gb } },
607 { "adcS", { Ev, Gv } },
608 { "adcB", { Gb, Eb } },
609 { "adcS", { Gv, Ev } },
610 { "adcB", { AL, Ib } },
611 { "adcS", { eAX, Iv } },
612 { "push{T|}", { ss } },
613 { "pop{T|}", { ss } },
614 /* 18 */
615 { "sbbB", { Eb, Gb } },
616 { "sbbS", { Ev, Gv } },
617 { "sbbB", { Gb, Eb } },
618 { "sbbS", { Gv, Ev } },
619 { "sbbB", { AL, Ib } },
620 { "sbbS", { eAX, Iv } },
621 { "push{T|}", { ds } },
622 { "pop{T|}", { ds } },
623 /* 20 */
624 { "andB", { Eb, Gb } },
625 { "andS", { Ev, Gv } },
626 { "andB", { Gb, Eb } },
627 { "andS", { Gv, Ev } },
628 { "andB", { AL, Ib } },
629 { "andS", { eAX, Iv } },
630 { "(bad)", { XX } }, /* SEG ES prefix */
631 { "daa{|}", { XX } },
632 /* 28 */
633 { "subB", { Eb, Gb } },
634 { "subS", { Ev, Gv } },
635 { "subB", { Gb, Eb } },
636 { "subS", { Gv, Ev } },
637 { "subB", { AL, Ib } },
638 { "subS", { eAX, Iv } },
639 { "(bad)", { XX } }, /* SEG CS prefix */
640 { "das{|}", { XX } },
641 /* 30 */
642 { "xorB", { Eb, Gb } },
643 { "xorS", { Ev, Gv } },
644 { "xorB", { Gb, Eb } },
645 { "xorS", { Gv, Ev } },
646 { "xorB", { AL, Ib } },
647 { "xorS", { eAX, Iv } },
648 { "(bad)", { XX } }, /* SEG SS prefix */
649 { "aaa{|}", { XX } },
650 /* 38 */
651 { "cmpB", { Eb, Gb } },
652 { "cmpS", { Ev, Gv } },
653 { "cmpB", { Gb, Eb } },
654 { "cmpS", { Gv, Ev } },
655 { "cmpB", { AL, Ib } },
656 { "cmpS", { eAX, Iv } },
657 { "(bad)", { XX } }, /* SEG DS prefix */
658 { "aas{|}", { XX } },
659 /* 40 */
660 { "inc{S|}", { RMeAX } },
661 { "inc{S|}", { RMeCX } },
662 { "inc{S|}", { RMeDX } },
663 { "inc{S|}", { RMeBX } },
664 { "inc{S|}", { RMeSP } },
665 { "inc{S|}", { RMeBP } },
666 { "inc{S|}", { RMeSI } },
667 { "inc{S|}", { RMeDI } },
668 /* 48 */
669 { "dec{S|}", { RMeAX } },
670 { "dec{S|}", { RMeCX } },
671 { "dec{S|}", { RMeDX } },
672 { "dec{S|}", { RMeBX } },
673 { "dec{S|}", { RMeSP } },
674 { "dec{S|}", { RMeBP } },
675 { "dec{S|}", { RMeSI } },
676 { "dec{S|}", { RMeDI } },
677 /* 50 */
678 { "pushV", { RMrAX } },
679 { "pushV", { RMrCX } },
680 { "pushV", { RMrDX } },
681 { "pushV", { RMrBX } },
682 { "pushV", { RMrSP } },
683 { "pushV", { RMrBP } },
684 { "pushV", { RMrSI } },
685 { "pushV", { RMrDI } },
686 /* 58 */
687 { "popV", { RMrAX } },
688 { "popV", { RMrCX } },
689 { "popV", { RMrDX } },
690 { "popV", { RMrBX } },
691 { "popV", { RMrSP } },
692 { "popV", { RMrBP } },
693 { "popV", { RMrSI } },
694 { "popV", { RMrDI } },
695 /* 60 */
696 { X86_64_0 },
697 { X86_64_1 },
698 { X86_64_2 },
699 { X86_64_3 },
700 { "(bad)", { XX } }, /* seg fs */
701 { "(bad)", { XX } }, /* seg gs */
702 { "(bad)", { XX } }, /* op size prefix */
703 { "(bad)", { XX } }, /* adr size prefix */
704 /* 68 */
705 { "pushT", { Iq } },
706 { "imulS", { Gv, Ev, Iv } },
707 { "pushT", { sIb } },
708 { "imulS", { Gv, Ev, sIb } },
709 { "ins{b||b|}", { Ybr, indirDX } },
710 { "ins{R||G|}", { Yzr, indirDX } },
711 { "outs{b||b|}", { indirDXr, Xb } },
712 { "outs{R||G|}", { indirDXr, Xz } },
713 /* 70 */
714 { "joH", { Jb, XX, cond_jump_flag } },
715 { "jnoH", { Jb, XX, cond_jump_flag } },
716 { "jbH", { Jb, XX, cond_jump_flag } },
717 { "jaeH", { Jb, XX, cond_jump_flag } },
718 { "jeH", { Jb, XX, cond_jump_flag } },
719 { "jneH", { Jb, XX, cond_jump_flag } },
720 { "jbeH", { Jb, XX, cond_jump_flag } },
721 { "jaH", { Jb, XX, cond_jump_flag } },
722 /* 78 */
723 { "jsH", { Jb, XX, cond_jump_flag } },
724 { "jnsH", { Jb, XX, cond_jump_flag } },
725 { "jpH", { Jb, XX, cond_jump_flag } },
726 { "jnpH", { Jb, XX, cond_jump_flag } },
727 { "jlH", { Jb, XX, cond_jump_flag } },
728 { "jgeH", { Jb, XX, cond_jump_flag } },
729 { "jleH", { Jb, XX, cond_jump_flag } },
730 { "jgH", { Jb, XX, cond_jump_flag } },
731 /* 80 */
732 { GRP1b },
733 { GRP1S },
734 { "(bad)", { XX } },
735 { GRP1Ss },
736 { "testB", { Eb, Gb } },
737 { "testS", { Ev, Gv } },
738 { "xchgB", { Eb, Gb } },
739 { "xchgS", { Ev, Gv } },
740 /* 88 */
741 { "movB", { Eb, Gb } },
742 { "movS", { Ev, Gv } },
743 { "movB", { Gb, Eb } },
744 { "movS", { Gv, Ev } },
745 { "movD", { Sv, Sw } },
746 { "leaS", { Gv, M } },
747 { "movD", { Sw, Sv } },
748 { GRP1a },
749 /* 90 */
750 { PREGRP38 },
751 { "xchgS", { RMeCX, eAX } },
752 { "xchgS", { RMeDX, eAX } },
753 { "xchgS", { RMeBX, eAX } },
754 { "xchgS", { RMeSP, eAX } },
755 { "xchgS", { RMeBP, eAX } },
756 { "xchgS", { RMeSI, eAX } },
757 { "xchgS", { RMeDI, eAX } },
758 /* 98 */
759 { "cW{t||t|}R", { XX } },
760 { "cR{t||t|}O", { XX } },
761 { "Jcall{T|}", { Ap } },
762 { "(bad)", { XX } }, /* fwait */
763 { "pushfT", { XX } },
764 { "popfT", { XX } },
765 { "sahf{|}", { XX } },
766 { "lahf{|}", { XX } },
767 /* a0 */
768 { "movB", { AL, Ob } },
769 { "movS", { eAX, Ov } },
770 { "movB", { Ob, AL } },
771 { "movS", { Ov, eAX } },
772 { "movs{b||b|}", { Ybr, Xb } },
773 { "movs{R||R|}", { Yvr, Xv } },
774 { "cmps{b||b|}", { Xb, Yb } },
775 { "cmps{R||R|}", { Xv, Yv } },
776 /* a8 */
777 { "testB", { AL, Ib } },
778 { "testS", { eAX, Iv } },
779 { "stosB", { Ybr, AL } },
780 { "stosS", { Yvr, eAX } },
781 { "lodsB", { ALr, Xb } },
782 { "lodsS", { eAXr, Xv } },
783 { "scasB", { AL, Yb } },
784 { "scasS", { eAX, Yv } },
785 /* b0 */
786 { "movB", { RMAL, Ib } },
787 { "movB", { RMCL, Ib } },
788 { "movB", { RMDL, Ib } },
789 { "movB", { RMBL, Ib } },
790 { "movB", { RMAH, Ib } },
791 { "movB", { RMCH, Ib } },
792 { "movB", { RMDH, Ib } },
793 { "movB", { RMBH, Ib } },
794 /* b8 */
795 { "movS", { RMeAX, Iv64 } },
796 { "movS", { RMeCX, Iv64 } },
797 { "movS", { RMeDX, Iv64 } },
798 { "movS", { RMeBX, Iv64 } },
799 { "movS", { RMeSP, Iv64 } },
800 { "movS", { RMeBP, Iv64 } },
801 { "movS", { RMeSI, Iv64 } },
802 { "movS", { RMeDI, Iv64 } },
803 /* c0 */
804 { GRP2b },
805 { GRP2S },
806 { "retT", { Iw } },
807 { "retT", { XX } },
808 { "les{S|}", { Gv, Mp } },
809 { "ldsS", { Gv, Mp } },
810 { GRP11_C6 },
811 { GRP11_C7 },
812 /* c8 */
813 { "enterT", { Iw, Ib } },
814 { "leaveT", { XX } },
815 { "lretP", { Iw } },
816 { "lretP", { XX } },
817 { "int3", { XX } },
818 { "int", { Ib } },
819 { "into{|}", { XX } },
820 { "iretP", { XX } },
821 /* d0 */
822 { GRP2b_one },
823 { GRP2S_one },
824 { GRP2b_cl },
825 { GRP2S_cl },
826 { "aam{|}", { sIb } },
827 { "aad{|}", { sIb } },
828 { "(bad)", { XX } },
829 { "xlat", { DSBX } },
830 /* d8 */
831 { FLOAT },
832 { FLOAT },
833 { FLOAT },
834 { FLOAT },
835 { FLOAT },
836 { FLOAT },
837 { FLOAT },
838 { FLOAT },
839 /* e0 */
840 { "loopneFH", { Jb, XX, loop_jcxz_flag } },
841 { "loopeFH", { Jb, XX, loop_jcxz_flag } },
842 { "loopFH", { Jb, XX, loop_jcxz_flag } },
843 { "jEcxzH", { Jb, XX, loop_jcxz_flag } },
844 { "inB", { AL, Ib } },
845 { "inG", { zAX, Ib } },
846 { "outB", { Ib, AL } },
847 { "outG", { Ib, zAX } },
848 /* e8 */
849 { "callT", { Jv } },
850 { "jmpT", { Jv } },
851 { "Jjmp{T|}", { Ap } },
852 { "jmp", { Jb } },
853 { "inB", { AL, indirDX } },
854 { "inG", { zAX, indirDX } },
855 { "outB", { indirDX, AL } },
856 { "outG", { indirDX, zAX } },
857 /* f0 */
858 { "(bad)", { XX } }, /* lock prefix */
859 { "icebp", { XX } },
860 { "(bad)", { XX } }, /* repne */
861 { "(bad)", { XX } }, /* repz */
862 { "hlt", { XX } },
863 { "cmc", { XX } },
864 { GRP3b },
865 { GRP3S },
866 /* f8 */
867 { "clc", { XX } },
868 { "stc", { XX } },
869 { "cli", { XX } },
870 { "sti", { XX } },
871 { "cld", { XX } },
872 { "std", { XX } },
873 { GRP4 },
874 { GRP5 },
875 };
876
877 static const struct dis386 dis386_twobyte[] = {
878 /* 00 */
879 { GRP6 },
880 { GRP7 },
881 { "larS", { Gv, Ew } },
882 { "lslS", { Gv, Ew } },
883 { "(bad)", { XX } },
884 { "syscall", { XX } },
885 { "clts", { XX } },
886 { "sysretP", { XX } },
887 /* 08 */
888 { "invd", { XX } },
889 { "wbinvd", { XX } },
890 { "(bad)", { XX } },
891 { "ud2a", { XX } },
892 { "(bad)", { XX } },
893 { GRPAMD },
894 { "femms", { XX } },
895 { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */
896 /* 10 */
897 { PREGRP8 },
898 { PREGRP9 },
899 { PREGRP30 },
900 { "movlpX", { EX, XM, { SIMD_Fixup, 'h' } } },
901 { "unpcklpX", { XM, EX } },
902 { "unpckhpX", { XM, EX } },
903 { PREGRP31 },
904 { "movhpX", { EX, XM, { SIMD_Fixup, 'l' } } },
905 /* 18 */
906 { GRP16 },
907 { "(bad)", { XX } },
908 { "(bad)", { XX } },
909 { "(bad)", { XX } },
910 { "(bad)", { XX } },
911 { "(bad)", { XX } },
912 { "(bad)", { XX } },
913 { "nopQ", { Ev } },
914 /* 20 */
915 { "movZ", { Rm, Cm } },
916 { "movZ", { Rm, Dm } },
917 { "movZ", { Cm, Rm } },
918 { "movZ", { Dm, Rm } },
919 { "movL", { Rd, Td } },
920 { "(bad)", { XX } },
921 { "movL", { Td, Rd } },
922 { "(bad)", { XX } },
923 /* 28 */
924 { "movapX", { XM, EX } },
925 { "movapX", { EX, XM } },
926 { PREGRP2 },
927 { PREGRP33 },
928 { PREGRP4 },
929 { PREGRP3 },
930 { "ucomisX", { XM,EX } },
931 { "comisX", { XM,EX } },
932 /* 30 */
933 { "wrmsr", { XX } },
934 { "rdtsc", { XX } },
935 { "rdmsr", { XX } },
936 { "rdpmc", { XX } },
937 { "sysenter", { XX } },
938 { "sysexit", { XX } },
939 { "(bad)", { XX } },
940 { "(bad)", { XX } },
941 /* 38 */
942 { THREE_BYTE_0 },
943 { "(bad)", { XX } },
944 { THREE_BYTE_1 },
945 { "(bad)", { XX } },
946 { "(bad)", { XX } },
947 { "(bad)", { XX } },
948 { "(bad)", { XX } },
949 { "(bad)", { XX } },
950 /* 40 */
951 { "cmovo", { Gv, Ev } },
952 { "cmovno", { Gv, Ev } },
953 { "cmovb", { Gv, Ev } },
954 { "cmovae", { Gv, Ev } },
955 { "cmove", { Gv, Ev } },
956 { "cmovne", { Gv, Ev } },
957 { "cmovbe", { Gv, Ev } },
958 { "cmova", { Gv, Ev } },
959 /* 48 */
960 { "cmovs", { Gv, Ev } },
961 { "cmovns", { Gv, Ev } },
962 { "cmovp", { Gv, Ev } },
963 { "cmovnp", { Gv, Ev } },
964 { "cmovl", { Gv, Ev } },
965 { "cmovge", { Gv, Ev } },
966 { "cmovle", { Gv, Ev } },
967 { "cmovg", { Gv, Ev } },
968 /* 50 */
969 { "movmskpX", { Gdq, XS } },
970 { PREGRP13 },
971 { PREGRP12 },
972 { PREGRP11 },
973 { "andpX", { XM, EX } },
974 { "andnpX", { XM, EX } },
975 { "orpX", { XM, EX } },
976 { "xorpX", { XM, EX } },
977 /* 58 */
978 { PREGRP0 },
979 { PREGRP10 },
980 { PREGRP17 },
981 { PREGRP16 },
982 { PREGRP14 },
983 { PREGRP7 },
984 { PREGRP5 },
985 { PREGRP6 },
986 /* 60 */
987 { "punpcklbw", { MX, EM } },
988 { "punpcklwd", { MX, EM } },
989 { "punpckldq", { MX, EM } },
990 { "packsswb", { MX, EM } },
991 { "pcmpgtb", { MX, EM } },
992 { "pcmpgtw", { MX, EM } },
993 { "pcmpgtd", { MX, EM } },
994 { "packuswb", { MX, EM } },
995 /* 68 */
996 { "punpckhbw", { MX, EM } },
997 { "punpckhwd", { MX, EM } },
998 { "punpckhdq", { MX, EM } },
999 { "packssdw", { MX, EM } },
1000 { PREGRP26 },
1001 { PREGRP24 },
1002 { "movd", { MX, Edq } },
1003 { PREGRP19 },
1004 /* 70 */
1005 { PREGRP22 },
1006 { GRP12 },
1007 { GRP13 },
1008 { GRP14 },
1009 { "pcmpeqb", { MX, EM } },
1010 { "pcmpeqw", { MX, EM } },
1011 { "pcmpeqd", { MX, EM } },
1012 { "emms", { XX } },
1013 /* 78 */
1014 { PREGRP34 },
1015 { PREGRP35 },
1016 { "(bad)", { XX } },
1017 { "(bad)", { XX } },
1018 { PREGRP28 },
1019 { PREGRP29 },
1020 { PREGRP23 },
1021 { PREGRP20 },
1022 /* 80 */
1023 { "joH", { Jv, XX, cond_jump_flag } },
1024 { "jnoH", { Jv, XX, cond_jump_flag } },
1025 { "jbH", { Jv, XX, cond_jump_flag } },
1026 { "jaeH", { Jv, XX, cond_jump_flag } },
1027 { "jeH", { Jv, XX, cond_jump_flag } },
1028 { "jneH", { Jv, XX, cond_jump_flag } },
1029 { "jbeH", { Jv, XX, cond_jump_flag } },
1030 { "jaH", { Jv, XX, cond_jump_flag } },
1031 /* 88 */
1032 { "jsH", { Jv, XX, cond_jump_flag } },
1033 { "jnsH", { Jv, XX, cond_jump_flag } },
1034 { "jpH", { Jv, XX, cond_jump_flag } },
1035 { "jnpH", { Jv, XX, cond_jump_flag } },
1036 { "jlH", { Jv, XX, cond_jump_flag } },
1037 { "jgeH", { Jv, XX, cond_jump_flag } },
1038 { "jleH", { Jv, XX, cond_jump_flag } },
1039 { "jgH", { Jv, XX, cond_jump_flag } },
1040 /* 90 */
1041 { "seto", { Eb } },
1042 { "setno", { Eb } },
1043 { "setb", { Eb } },
1044 { "setae", { Eb } },
1045 { "sete", { Eb } },
1046 { "setne", { Eb } },
1047 { "setbe", { Eb } },
1048 { "seta", { Eb } },
1049 /* 98 */
1050 { "sets", { Eb } },
1051 { "setns", { Eb } },
1052 { "setp", { Eb } },
1053 { "setnp", { Eb } },
1054 { "setl", { Eb } },
1055 { "setge", { Eb } },
1056 { "setle", { Eb } },
1057 { "setg", { Eb } },
1058 /* a0 */
1059 { "pushT", { fs } },
1060 { "popT", { fs } },
1061 { "cpuid", { XX } },
1062 { "btS", { Ev, Gv } },
1063 { "shldS", { Ev, Gv, Ib } },
1064 { "shldS", { Ev, Gv, CL } },
1065 { GRPPADLCK2 },
1066 { GRPPADLCK1 },
1067 /* a8 */
1068 { "pushT", { gs } },
1069 { "popT", { gs } },
1070 { "rsm", { XX } },
1071 { "btsS", { Ev, Gv } },
1072 { "shrdS", { Ev, Gv, Ib } },
1073 { "shrdS", { Ev, Gv, CL } },
1074 { GRP15 },
1075 { "imulS", { Gv, Ev } },
1076 /* b0 */
1077 { "cmpxchgB", { Eb, Gb } },
1078 { "cmpxchgS", { Ev, Gv } },
1079 { "lssS", { Gv, Mp } },
1080 { "btrS", { Ev, Gv } },
1081 { "lfsS", { Gv, Mp } },
1082 { "lgsS", { Gv, Mp } },
1083 { "movz{bR|x|bR|x}", { Gv, Eb } },
1084 { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
1085 /* b8 */
1086 { PREGRP37 },
1087 { "ud2b", { XX } },
1088 { GRP8 },
1089 { "btcS", { Ev, Gv } },
1090 { "bsfS", { Gv, Ev } },
1091 { PREGRP36 },
1092 { "movs{bR|x|bR|x}", { Gv, Eb } },
1093 { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */
1094 /* c0 */
1095 { "xaddB", { Eb, Gb } },
1096 { "xaddS", { Ev, Gv } },
1097 { PREGRP1 },
1098 { "movntiS", { Ev, Gv } },
1099 { "pinsrw", { MX, Edqw, Ib } },
1100 { "pextrw", { Gdq, MS, Ib } },
1101 { "shufpX", { XM, EX, Ib } },
1102 { GRP9 },
1103 /* c8 */
1104 { "bswap", { RMeAX } },
1105 { "bswap", { RMeCX } },
1106 { "bswap", { RMeDX } },
1107 { "bswap", { RMeBX } },
1108 { "bswap", { RMeSP } },
1109 { "bswap", { RMeBP } },
1110 { "bswap", { RMeSI } },
1111 { "bswap", { RMeDI } },
1112 /* d0 */
1113 { PREGRP27 },
1114 { "psrlw", { MX, EM } },
1115 { "psrld", { MX, EM } },
1116 { "psrlq", { MX, EM } },
1117 { "paddq", { MX, EM } },
1118 { "pmullw", { MX, EM } },
1119 { PREGRP21 },
1120 { "pmovmskb", { Gdq, MS } },
1121 /* d8 */
1122 { "psubusb", { MX, EM } },
1123 { "psubusw", { MX, EM } },
1124 { "pminub", { MX, EM } },
1125 { "pand", { MX, EM } },
1126 { "paddusb", { MX, EM } },
1127 { "paddusw", { MX, EM } },
1128 { "pmaxub", { MX, EM } },
1129 { "pandn", { MX, EM } },
1130 /* e0 */
1131 { "pavgb", { MX, EM } },
1132 { "psraw", { MX, EM } },
1133 { "psrad", { MX, EM } },
1134 { "pavgw", { MX, EM } },
1135 { "pmulhuw", { MX, EM } },
1136 { "pmulhw", { MX, EM } },
1137 { PREGRP15 },
1138 { PREGRP25 },
1139 /* e8 */
1140 { "psubsb", { MX, EM } },
1141 { "psubsw", { MX, EM } },
1142 { "pminsw", { MX, EM } },
1143 { "por", { MX, EM } },
1144 { "paddsb", { MX, EM } },
1145 { "paddsw", { MX, EM } },
1146 { "pmaxsw", { MX, EM } },
1147 { "pxor", { MX, EM } },
1148 /* f0 */
1149 { PREGRP32 },
1150 { "psllw", { MX, EM } },
1151 { "pslld", { MX, EM } },
1152 { "psllq", { MX, EM } },
1153 { "pmuludq", { MX, EM } },
1154 { "pmaddwd", { MX, EM } },
1155 { "psadbw", { MX, EM } },
1156 { PREGRP18 },
1157 /* f8 */
1158 { "psubb", { MX, EM } },
1159 { "psubw", { MX, EM } },
1160 { "psubd", { MX, EM } },
1161 { "psubq", { MX, EM } },
1162 { "paddb", { MX, EM } },
1163 { "paddw", { MX, EM } },
1164 { "paddd", { MX, EM } },
1165 { "(bad)", { XX } },
1166 };
1167
1168 static const unsigned char onebyte_has_modrm[256] = {
1169 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1170 /* ------------------------------- */
1171 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1172 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1173 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1174 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1175 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1176 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1177 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1178 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1179 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1180 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1181 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1182 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1183 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1184 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1185 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1186 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1187 /* ------------------------------- */
1188 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1189 };
1190
1191 static const unsigned char twobyte_has_modrm[256] = {
1192 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1193 /* ------------------------------- */
1194 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1195 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1196 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1197 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1198 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1199 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1200 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1201 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1202 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1203 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1204 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1205 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1206 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1207 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1208 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1209 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1210 /* ------------------------------- */
1211 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1212 };
1213
1214 static const unsigned char twobyte_uses_DATA_prefix[256] = {
1215 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1216 /* ------------------------------- */
1217 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1218 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1219 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1220 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1221 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1222 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1223 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1224 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1225 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1226 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1227 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1228 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1229 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1230 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1231 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1232 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1233 /* ------------------------------- */
1234 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1235 };
1236
1237 static const unsigned char twobyte_uses_REPNZ_prefix[256] = {
1238 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1239 /* ------------------------------- */
1240 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1241 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1242 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1243 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1244 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1245 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1246 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1247 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1248 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1249 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1250 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1251 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1252 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1253 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1254 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1255 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1256 /* ------------------------------- */
1257 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1258 };
1259
1260 static const unsigned char twobyte_uses_REPZ_prefix[256] = {
1261 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1262 /* ------------------------------- */
1263 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1264 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1265 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1266 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1267 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1268 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1269 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1270 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1271 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1272 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1273 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1274 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1275 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1276 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1277 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1278 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1279 /* ------------------------------- */
1280 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1281 };
1282
1283 /* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1284 static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = {
1285 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1286 /* ------------------------------- */
1287 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1288 /* 10 */ 0,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
1289 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
1290 /* 30 */ 1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1, /* 3f */
1291 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1292 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1293 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1294 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1295 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1296 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1297 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1298 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1299 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1300 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1301 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1302 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1303 /* ------------------------------- */
1304 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1305 };
1306
1307 /* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1308 static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = {
1309 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1310 /* ------------------------------- */
1311 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1312 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1313 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1314 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1315 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1316 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1317 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1318 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1319 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1320 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1321 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1322 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1323 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1324 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1325 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1326 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1327 /* ------------------------------- */
1328 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1329 };
1330
1331 /* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1332 static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = {
1333 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1334 /* ------------------------------- */
1335 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1336 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1337 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1338 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1339 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1340 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1341 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1342 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1343 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1344 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1345 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1346 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1347 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1348 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1349 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1350 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1351 /* ------------------------------- */
1352 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1353 };
1354
1355 /* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1356 static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
1357 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1358 /* ------------------------------- */
1359 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1360 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1361 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1362 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1363 /* 40 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1364 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1365 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1366 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1367 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1368 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1369 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1370 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1371 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1372 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1373 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1374 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1375 /* ------------------------------- */
1376 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1377 };
1378
1379 /* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1380 static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = {
1381 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1382 /* ------------------------------- */
1383 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1384 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1385 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1386 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1387 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1388 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1389 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1390 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1391 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1392 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1393 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1394 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1395 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1396 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1397 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1398 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1399 /* ------------------------------- */
1400 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1401 };
1402
1403 /* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1404 static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = {
1405 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1406 /* ------------------------------- */
1407 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1408 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1409 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1410 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1411 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1412 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1413 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1414 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1415 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1416 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1417 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1418 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1419 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1420 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1421 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1422 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1423 /* ------------------------------- */
1424 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1425 };
1426
1427 static char obuf[100];
1428 static char *obufp;
1429 static char scratchbuf[100];
1430 static unsigned char *start_codep;
1431 static unsigned char *insn_codep;
1432 static unsigned char *codep;
1433 static disassemble_info *the_info;
1434 static struct
1435 {
1436 int mod;
1437 int rm;
1438 int reg;
1439 }
1440 modrm;
1441 static unsigned char need_modrm;
1442
1443 /* If we are accessing mod/rm/reg without need_modrm set, then the
1444 values are stale. Hitting this abort likely indicates that you
1445 need to update onebyte_has_modrm or twobyte_has_modrm. */
1446 #define MODRM_CHECK if (!need_modrm) abort ()
1447
1448 static const char **names64;
1449 static const char **names32;
1450 static const char **names16;
1451 static const char **names8;
1452 static const char **names8rex;
1453 static const char **names_seg;
1454 static const char **index16;
1455
1456 static const char *intel_names64[] = {
1457 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1458 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1459 };
1460 static const char *intel_names32[] = {
1461 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1462 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1463 };
1464 static const char *intel_names16[] = {
1465 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1466 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1467 };
1468 static const char *intel_names8[] = {
1469 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1470 };
1471 static const char *intel_names8rex[] = {
1472 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1473 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1474 };
1475 static const char *intel_names_seg[] = {
1476 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1477 };
1478 static const char *intel_index16[] = {
1479 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1480 };
1481
1482 static const char *att_names64[] = {
1483 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1484 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1485 };
1486 static const char *att_names32[] = {
1487 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1488 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1489 };
1490 static const char *att_names16[] = {
1491 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1492 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1493 };
1494 static const char *att_names8[] = {
1495 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1496 };
1497 static const char *att_names8rex[] = {
1498 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1499 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1500 };
1501 static const char *att_names_seg[] = {
1502 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1503 };
1504 static const char *att_index16[] = {
1505 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1506 };
1507
1508 static const struct dis386 grps[][8] = {
1509 /* GRP1a */
1510 {
1511 { "popU", { stackEv } },
1512 { "(bad)", { XX } },
1513 { "(bad)", { XX } },
1514 { "(bad)", { XX } },
1515 { "(bad)", { XX } },
1516 { "(bad)", { XX } },
1517 { "(bad)", { XX } },
1518 { "(bad)", { XX } },
1519 },
1520 /* GRP1b */
1521 {
1522 { "addA", { Eb, Ib } },
1523 { "orA", { Eb, Ib } },
1524 { "adcA", { Eb, Ib } },
1525 { "sbbA", { Eb, Ib } },
1526 { "andA", { Eb, Ib } },
1527 { "subA", { Eb, Ib } },
1528 { "xorA", { Eb, Ib } },
1529 { "cmpA", { Eb, Ib } },
1530 },
1531 /* GRP1S */
1532 {
1533 { "addQ", { Ev, Iv } },
1534 { "orQ", { Ev, Iv } },
1535 { "adcQ", { Ev, Iv } },
1536 { "sbbQ", { Ev, Iv } },
1537 { "andQ", { Ev, Iv } },
1538 { "subQ", { Ev, Iv } },
1539 { "xorQ", { Ev, Iv } },
1540 { "cmpQ", { Ev, Iv } },
1541 },
1542 /* GRP1Ss */
1543 {
1544 { "addQ", { Ev, sIb } },
1545 { "orQ", { Ev, sIb } },
1546 { "adcQ", { Ev, sIb } },
1547 { "sbbQ", { Ev, sIb } },
1548 { "andQ", { Ev, sIb } },
1549 { "subQ", { Ev, sIb } },
1550 { "xorQ", { Ev, sIb } },
1551 { "cmpQ", { Ev, sIb } },
1552 },
1553 /* GRP2b */
1554 {
1555 { "rolA", { Eb, Ib } },
1556 { "rorA", { Eb, Ib } },
1557 { "rclA", { Eb, Ib } },
1558 { "rcrA", { Eb, Ib } },
1559 { "shlA", { Eb, Ib } },
1560 { "shrA", { Eb, Ib } },
1561 { "(bad)", { XX } },
1562 { "sarA", { Eb, Ib } },
1563 },
1564 /* GRP2S */
1565 {
1566 { "rolQ", { Ev, Ib } },
1567 { "rorQ", { Ev, Ib } },
1568 { "rclQ", { Ev, Ib } },
1569 { "rcrQ", { Ev, Ib } },
1570 { "shlQ", { Ev, Ib } },
1571 { "shrQ", { Ev, Ib } },
1572 { "(bad)", { XX } },
1573 { "sarQ", { Ev, Ib } },
1574 },
1575 /* GRP2b_one */
1576 {
1577 { "rolA", { Eb, I1 } },
1578 { "rorA", { Eb, I1 } },
1579 { "rclA", { Eb, I1 } },
1580 { "rcrA", { Eb, I1 } },
1581 { "shlA", { Eb, I1 } },
1582 { "shrA", { Eb, I1 } },
1583 { "(bad)", { XX } },
1584 { "sarA", { Eb, I1 } },
1585 },
1586 /* GRP2S_one */
1587 {
1588 { "rolQ", { Ev, I1 } },
1589 { "rorQ", { Ev, I1 } },
1590 { "rclQ", { Ev, I1 } },
1591 { "rcrQ", { Ev, I1 } },
1592 { "shlQ", { Ev, I1 } },
1593 { "shrQ", { Ev, I1 } },
1594 { "(bad)", { XX } },
1595 { "sarQ", { Ev, I1 } },
1596 },
1597 /* GRP2b_cl */
1598 {
1599 { "rolA", { Eb, CL } },
1600 { "rorA", { Eb, CL } },
1601 { "rclA", { Eb, CL } },
1602 { "rcrA", { Eb, CL } },
1603 { "shlA", { Eb, CL } },
1604 { "shrA", { Eb, CL } },
1605 { "(bad)", { XX } },
1606 { "sarA", { Eb, CL } },
1607 },
1608 /* GRP2S_cl */
1609 {
1610 { "rolQ", { Ev, CL } },
1611 { "rorQ", { Ev, CL } },
1612 { "rclQ", { Ev, CL } },
1613 { "rcrQ", { Ev, CL } },
1614 { "shlQ", { Ev, CL } },
1615 { "shrQ", { Ev, CL } },
1616 { "(bad)", { XX } },
1617 { "sarQ", { Ev, CL } },
1618 },
1619 /* GRP3b */
1620 {
1621 { "testA", { Eb, Ib } },
1622 { "(bad)", { Eb } },
1623 { "notA", { Eb } },
1624 { "negA", { Eb } },
1625 { "mulA", { Eb } }, /* Don't print the implicit %al register, */
1626 { "imulA", { Eb } }, /* to distinguish these opcodes from other */
1627 { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */
1628 { "idivA", { Eb } }, /* and idiv for consistency. */
1629 },
1630 /* GRP3S */
1631 {
1632 { "testQ", { Ev, Iv } },
1633 { "(bad)", { XX } },
1634 { "notQ", { Ev } },
1635 { "negQ", { Ev } },
1636 { "mulQ", { Ev } }, /* Don't print the implicit register. */
1637 { "imulQ", { Ev } },
1638 { "divQ", { Ev } },
1639 { "idivQ", { Ev } },
1640 },
1641 /* GRP4 */
1642 {
1643 { "incA", { Eb } },
1644 { "decA", { Eb } },
1645 { "(bad)", { XX } },
1646 { "(bad)", { XX } },
1647 { "(bad)", { XX } },
1648 { "(bad)", { XX } },
1649 { "(bad)", { XX } },
1650 { "(bad)", { XX } },
1651 },
1652 /* GRP5 */
1653 {
1654 { "incQ", { Ev } },
1655 { "decQ", { Ev } },
1656 { "callT", { indirEv } },
1657 { "JcallT", { indirEp } },
1658 { "jmpT", { indirEv } },
1659 { "JjmpT", { indirEp } },
1660 { "pushU", { stackEv } },
1661 { "(bad)", { XX } },
1662 },
1663 /* GRP6 */
1664 {
1665 { "sldtD", { Sv } },
1666 { "strD", { Sv } },
1667 { "lldt", { Ew } },
1668 { "ltr", { Ew } },
1669 { "verr", { Ew } },
1670 { "verw", { Ew } },
1671 { "(bad)", { XX } },
1672 { "(bad)", { XX } },
1673 },
1674 /* GRP7 */
1675 {
1676 { "sgdt{Q|IQ||}", { { VMX_Fixup, 0 } } },
1677 { "sidt{Q|IQ||}", { { PNI_Fixup, 0 } } },
1678 { "lgdt{Q|Q||}", { M } },
1679 { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } },
1680 { "smswD", { Sv } },
1681 { "(bad)", { XX } },
1682 { "lmsw", { Ew } },
1683 { "invlpg", { { INVLPG_Fixup, w_mode } } },
1684 },
1685 /* GRP8 */
1686 {
1687 { "(bad)", { XX } },
1688 { "(bad)", { XX } },
1689 { "(bad)", { XX } },
1690 { "(bad)", { XX } },
1691 { "btQ", { Ev, Ib } },
1692 { "btsQ", { Ev, Ib } },
1693 { "btrQ", { Ev, Ib } },
1694 { "btcQ", { Ev, Ib } },
1695 },
1696 /* GRP9 */
1697 {
1698 { "(bad)", { XX } },
1699 { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1700 { "(bad)", { XX } },
1701 { "(bad)", { XX } },
1702 { "(bad)", { XX } },
1703 { "(bad)", { XX } },
1704 { "", { VM } }, /* See OP_VMX. */
1705 { "vmptrst", { Mq } },
1706 },
1707 /* GRP11_C6 */
1708 {
1709 { "movA", { Eb, Ib } },
1710 { "(bad)", { XX } },
1711 { "(bad)", { XX } },
1712 { "(bad)", { XX } },
1713 { "(bad)", { XX } },
1714 { "(bad)", { XX } },
1715 { "(bad)", { XX } },
1716 { "(bad)", { XX } },
1717 },
1718 /* GRP11_C7 */
1719 {
1720 { "movQ", { Ev, Iv } },
1721 { "(bad)", { XX } },
1722 { "(bad)", { XX } },
1723 { "(bad)", { XX } },
1724 { "(bad)", { XX } },
1725 { "(bad)", { XX } },
1726 { "(bad)", { XX } },
1727 { "(bad)", { XX } },
1728 },
1729 /* GRP12 */
1730 {
1731 { "(bad)", { XX } },
1732 { "(bad)", { XX } },
1733 { "psrlw", { MS, Ib } },
1734 { "(bad)", { XX } },
1735 { "psraw", { MS, Ib } },
1736 { "(bad)", { XX } },
1737 { "psllw", { MS, Ib } },
1738 { "(bad)", { XX } },
1739 },
1740 /* GRP13 */
1741 {
1742 { "(bad)", { XX } },
1743 { "(bad)", { XX } },
1744 { "psrld", { MS, Ib } },
1745 { "(bad)", { XX } },
1746 { "psrad", { MS, Ib } },
1747 { "(bad)", { XX } },
1748 { "pslld", { MS, Ib } },
1749 { "(bad)", { XX } },
1750 },
1751 /* GRP14 */
1752 {
1753 { "(bad)", { XX } },
1754 { "(bad)", { XX } },
1755 { "psrlq", { MS, Ib } },
1756 { "psrldq", { MS, Ib } },
1757 { "(bad)", { XX } },
1758 { "(bad)", { XX } },
1759 { "psllq", { MS, Ib } },
1760 { "pslldq", { MS, Ib } },
1761 },
1762 /* GRP15 */
1763 {
1764 { "fxsave", { Ev } },
1765 { "fxrstor", { Ev } },
1766 { "ldmxcsr", { Ev } },
1767 { "stmxcsr", { Ev } },
1768 { "(bad)", { XX } },
1769 { "lfence", { { OP_0fae, 0 } } },
1770 { "mfence", { { OP_0fae, 0 } } },
1771 { "clflush", { { OP_0fae, 0 } } },
1772 },
1773 /* GRP16 */
1774 {
1775 { "prefetchnta", { Ev } },
1776 { "prefetcht0", { Ev } },
1777 { "prefetcht1", { Ev } },
1778 { "prefetcht2", { Ev } },
1779 { "(bad)", { XX } },
1780 { "(bad)", { XX } },
1781 { "(bad)", { XX } },
1782 { "(bad)", { XX } },
1783 },
1784 /* GRPAMD */
1785 {
1786 { "prefetch", { Eb } },
1787 { "prefetchw", { Eb } },
1788 { "(bad)", { XX } },
1789 { "(bad)", { XX } },
1790 { "(bad)", { XX } },
1791 { "(bad)", { XX } },
1792 { "(bad)", { XX } },
1793 { "(bad)", { XX } },
1794 },
1795 /* GRPPADLCK1 */
1796 {
1797 { "xstore-rng", { { OP_0f07, 0 } } },
1798 { "xcrypt-ecb", { { OP_0f07, 0 } } },
1799 { "xcrypt-cbc", { { OP_0f07, 0 } } },
1800 { "xcrypt-ctr", { { OP_0f07, 0 } } },
1801 { "xcrypt-cfb", { { OP_0f07, 0 } } },
1802 { "xcrypt-ofb", { { OP_0f07, 0 } } },
1803 { "(bad)", { { OP_0f07, 0 } } },
1804 { "(bad)", { { OP_0f07, 0 } } },
1805 },
1806 /* GRPPADLCK2 */
1807 {
1808 { "montmul", { { OP_0f07, 0 } } },
1809 { "xsha1", { { OP_0f07, 0 } } },
1810 { "xsha256", { { OP_0f07, 0 } } },
1811 { "(bad)", { { OP_0f07, 0 } } },
1812 { "(bad)", { { OP_0f07, 0 } } },
1813 { "(bad)", { { OP_0f07, 0 } } },
1814 { "(bad)", { { OP_0f07, 0 } } },
1815 { "(bad)", { { OP_0f07, 0 } } },
1816 }
1817 };
1818
1819 static const struct dis386 prefix_user_table[][4] = {
1820 /* PREGRP0 */
1821 {
1822 { "addps", { XM, EX } },
1823 { "addss", { XM, EX } },
1824 { "addpd", { XM, EX } },
1825 { "addsd", { XM, EX } },
1826 },
1827 /* PREGRP1 */
1828 {
1829 { "", { XM, EX, OPSIMD } }, /* See OP_SIMD_SUFFIX. */
1830 { "", { XM, EX, OPSIMD } },
1831 { "", { XM, EX, OPSIMD } },
1832 { "", { XM, EX, OPSIMD } },
1833 },
1834 /* PREGRP2 */
1835 {
1836 { "cvtpi2ps", { XM, EMC } },
1837 { "cvtsi2ssY", { XM, Ev } },
1838 { "cvtpi2pd", { XM, EMC } },
1839 { "cvtsi2sdY", { XM, Ev } },
1840 },
1841 /* PREGRP3 */
1842 {
1843 { "cvtps2pi", { MXC, EX } },
1844 { "cvtss2siY", { Gv, EX } },
1845 { "cvtpd2pi", { MXC, EX } },
1846 { "cvtsd2siY", { Gv, EX } },
1847 },
1848 /* PREGRP4 */
1849 {
1850 { "cvttps2pi", { MXC, EX } },
1851 { "cvttss2siY", { Gv, EX } },
1852 { "cvttpd2pi", { MXC, EX } },
1853 { "cvttsd2siY", { Gv, EX } },
1854 },
1855 /* PREGRP5 */
1856 {
1857 { "divps", { XM, EX } },
1858 { "divss", { XM, EX } },
1859 { "divpd", { XM, EX } },
1860 { "divsd", { XM, EX } },
1861 },
1862 /* PREGRP6 */
1863 {
1864 { "maxps", { XM, EX } },
1865 { "maxss", { XM, EX } },
1866 { "maxpd", { XM, EX } },
1867 { "maxsd", { XM, EX } },
1868 },
1869 /* PREGRP7 */
1870 {
1871 { "minps", { XM, EX } },
1872 { "minss", { XM, EX } },
1873 { "minpd", { XM, EX } },
1874 { "minsd", { XM, EX } },
1875 },
1876 /* PREGRP8 */
1877 {
1878 { "movups", { XM, EX } },
1879 { "movss", { XM, EX } },
1880 { "movupd", { XM, EX } },
1881 { "movsd", { XM, EX } },
1882 },
1883 /* PREGRP9 */
1884 {
1885 { "movups", { EX, XM } },
1886 { "movss", { EX, XM } },
1887 { "movupd", { EX, XM } },
1888 { "movsd", { EX, XM } },
1889 },
1890 /* PREGRP10 */
1891 {
1892 { "mulps", { XM, EX } },
1893 { "mulss", { XM, EX } },
1894 { "mulpd", { XM, EX } },
1895 { "mulsd", { XM, EX } },
1896 },
1897 /* PREGRP11 */
1898 {
1899 { "rcpps", { XM, EX } },
1900 { "rcpss", { XM, EX } },
1901 { "(bad)", { XM, EX } },
1902 { "(bad)", { XM, EX } },
1903 },
1904 /* PREGRP12 */
1905 {
1906 { "rsqrtps",{ XM, EX } },
1907 { "rsqrtss",{ XM, EX } },
1908 { "(bad)", { XM, EX } },
1909 { "(bad)", { XM, EX } },
1910 },
1911 /* PREGRP13 */
1912 {
1913 { "sqrtps", { XM, EX } },
1914 { "sqrtss", { XM, EX } },
1915 { "sqrtpd", { XM, EX } },
1916 { "sqrtsd", { XM, EX } },
1917 },
1918 /* PREGRP14 */
1919 {
1920 { "subps", { XM, EX } },
1921 { "subss", { XM, EX } },
1922 { "subpd", { XM, EX } },
1923 { "subsd", { XM, EX } },
1924 },
1925 /* PREGRP15 */
1926 {
1927 { "(bad)", { XM, EX } },
1928 { "cvtdq2pd", { XM, EX } },
1929 { "cvttpd2dq", { XM, EX } },
1930 { "cvtpd2dq", { XM, EX } },
1931 },
1932 /* PREGRP16 */
1933 {
1934 { "cvtdq2ps", { XM, EX } },
1935 { "cvttps2dq", { XM, EX } },
1936 { "cvtps2dq", { XM, EX } },
1937 { "(bad)", { XM, EX } },
1938 },
1939 /* PREGRP17 */
1940 {
1941 { "cvtps2pd", { XM, EX } },
1942 { "cvtss2sd", { XM, EX } },
1943 { "cvtpd2ps", { XM, EX } },
1944 { "cvtsd2ss", { XM, EX } },
1945 },
1946 /* PREGRP18 */
1947 {
1948 { "maskmovq", { MX, MS } },
1949 { "(bad)", { XM, EX } },
1950 { "maskmovdqu", { XM, XS } },
1951 { "(bad)", { XM, EX } },
1952 },
1953 /* PREGRP19 */
1954 {
1955 { "movq", { MX, EM } },
1956 { "movdqu", { XM, EX } },
1957 { "movdqa", { XM, EX } },
1958 { "(bad)", { XM, EX } },
1959 },
1960 /* PREGRP20 */
1961 {
1962 { "movq", { EM, MX } },
1963 { "movdqu", { EX, XM } },
1964 { "movdqa", { EX, XM } },
1965 { "(bad)", { EX, XM } },
1966 },
1967 /* PREGRP21 */
1968 {
1969 { "(bad)", { EX, XM } },
1970 { "movq2dq",{ XM, MS } },
1971 { "movq", { EX, XM } },
1972 { "movdq2q",{ MX, XS } },
1973 },
1974 /* PREGRP22 */
1975 {
1976 { "pshufw", { MX, EM, Ib } },
1977 { "pshufhw",{ XM, EX, Ib } },
1978 { "pshufd", { XM, EX, Ib } },
1979 { "pshuflw",{ XM, EX, Ib } },
1980 },
1981 /* PREGRP23 */
1982 {
1983 { "movd", { Edq, MX } },
1984 { "movq", { XM, EX } },
1985 { "movd", { Edq, XM } },
1986 { "(bad)", { Ed, XM } },
1987 },
1988 /* PREGRP24 */
1989 {
1990 { "(bad)", { MX, EX } },
1991 { "(bad)", { XM, EX } },
1992 { "punpckhqdq", { XM, EX } },
1993 { "(bad)", { XM, EX } },
1994 },
1995 /* PREGRP25 */
1996 {
1997 { "movntq", { EM, MX } },
1998 { "(bad)", { EM, XM } },
1999 { "movntdq",{ EM, XM } },
2000 { "(bad)", { EM, XM } },
2001 },
2002 /* PREGRP26 */
2003 {
2004 { "(bad)", { MX, EX } },
2005 { "(bad)", { XM, EX } },
2006 { "punpcklqdq", { XM, EX } },
2007 { "(bad)", { XM, EX } },
2008 },
2009 /* PREGRP27 */
2010 {
2011 { "(bad)", { MX, EX } },
2012 { "(bad)", { XM, EX } },
2013 { "addsubpd", { XM, EX } },
2014 { "addsubps", { XM, EX } },
2015 },
2016 /* PREGRP28 */
2017 {
2018 { "(bad)", { MX, EX } },
2019 { "(bad)", { XM, EX } },
2020 { "haddpd", { XM, EX } },
2021 { "haddps", { XM, EX } },
2022 },
2023 /* PREGRP29 */
2024 {
2025 { "(bad)", { MX, EX } },
2026 { "(bad)", { XM, EX } },
2027 { "hsubpd", { XM, EX } },
2028 { "hsubps", { XM, EX } },
2029 },
2030 /* PREGRP30 */
2031 {
2032 { "movlpX", { XM, EX, { SIMD_Fixup, 'h' } } }, /* really only 2 operands */
2033 { "movsldup", { XM, EX } },
2034 { "movlpd", { XM, EX } },
2035 { "movddup", { XM, EX } },
2036 },
2037 /* PREGRP31 */
2038 {
2039 { "movhpX", { XM, EX, { SIMD_Fixup, 'l' } } },
2040 { "movshdup", { XM, EX } },
2041 { "movhpd", { XM, EX } },
2042 { "(bad)", { XM, EX } },
2043 },
2044 /* PREGRP32 */
2045 {
2046 { "(bad)", { XM, EX } },
2047 { "(bad)", { XM, EX } },
2048 { "(bad)", { XM, EX } },
2049 { "lddqu", { XM, M } },
2050 },
2051 /* PREGRP33 */
2052 {
2053 {"movntps", { Ev, XM } },
2054 {"movntss", { Ev, XM } },
2055 {"movntpd", { Ev, XM } },
2056 {"movntsd", { Ev, XM } },
2057 },
2058
2059 /* PREGRP34 */
2060 {
2061 {"vmread", { Em, Gm } },
2062 {"(bad)", { XX } },
2063 {"extrq", { XS, Ib, Ib } },
2064 {"insertq", { XM, XS, Ib, Ib } },
2065 },
2066
2067 /* PREGRP35 */
2068 {
2069 {"vmwrite", { Gm, Em } },
2070 {"(bad)", { XX } },
2071 {"extrq", { XM, XS } },
2072 {"insertq", { XM, XS } },
2073 },
2074
2075 /* PREGRP36 */
2076 {
2077 { "bsrS", { Gv, Ev } },
2078 { "lzcntS", { Gv, Ev } },
2079 { "bsrS", { Gv, Ev } },
2080 { "(bad)", { XX } },
2081 },
2082
2083 /* PREGRP37 */
2084 {
2085 { "(bad)", { XX } },
2086 { "popcntS", { Gv, Ev } },
2087 { "(bad)", { XX } },
2088 { "(bad)", { XX } },
2089 },
2090
2091 /* PREGRP38 */
2092 {
2093 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2094 { "pause", { XX } },
2095 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2096 { "(bad)", { XX } },
2097 },
2098
2099 /* PREGRP39 */
2100 {
2101 { "(bad)", { XX } },
2102 { "(bad)", { XX } },
2103 { "pblendvb", {XM, EX, XMM0 } },
2104 { "(bad)", { XX } },
2105 },
2106
2107 /* PREGRP40 */
2108 {
2109 { "(bad)", { XX } },
2110 { "(bad)", { XX } },
2111 { "blendvps", {XM, EX, XMM0 } },
2112 { "(bad)", { XX } },
2113 },
2114
2115 /* PREGRP41 */
2116 {
2117 { "(bad)", { XX } },
2118 { "(bad)", { XX } },
2119 { "blendvpd", { XM, EX, XMM0 } },
2120 { "(bad)", { XX } },
2121 },
2122
2123 /* PREGRP42 */
2124 {
2125 { "(bad)", { XX } },
2126 { "(bad)", { XX } },
2127 { "ptest", { XM, EX } },
2128 { "(bad)", { XX } },
2129 },
2130
2131 /* PREGRP43 */
2132 {
2133 { "(bad)", { XX } },
2134 { "(bad)", { XX } },
2135 { "pmovsxbw", { XM, EX } },
2136 { "(bad)", { XX } },
2137 },
2138
2139 /* PREGRP44 */
2140 {
2141 { "(bad)", { XX } },
2142 { "(bad)", { XX } },
2143 { "pmovsxbd", { XM, EX } },
2144 { "(bad)", { XX } },
2145 },
2146
2147 /* PREGRP45 */
2148 {
2149 { "(bad)", { XX } },
2150 { "(bad)", { XX } },
2151 { "pmovsxbq", { XM, EX } },
2152 { "(bad)", { XX } },
2153 },
2154
2155 /* PREGRP46 */
2156 {
2157 { "(bad)", { XX } },
2158 { "(bad)", { XX } },
2159 { "pmovsxwd", { XM, EX } },
2160 { "(bad)", { XX } },
2161 },
2162
2163 /* PREGRP47 */
2164 {
2165 { "(bad)", { XX } },
2166 { "(bad)", { XX } },
2167 { "pmovsxwq", { XM, EX } },
2168 { "(bad)", { XX } },
2169 },
2170
2171 /* PREGRP48 */
2172 {
2173 { "(bad)", { XX } },
2174 { "(bad)", { XX } },
2175 { "pmovsxdq", { XM, EX } },
2176 { "(bad)", { XX } },
2177 },
2178
2179 /* PREGRP49 */
2180 {
2181 { "(bad)", { XX } },
2182 { "(bad)", { XX } },
2183 { "pmuldq", { XM, EX } },
2184 { "(bad)", { XX } },
2185 },
2186
2187 /* PREGRP50 */
2188 {
2189 { "(bad)", { XX } },
2190 { "(bad)", { XX } },
2191 { "pcmpeqq", { XM, EX } },
2192 { "(bad)", { XX } },
2193 },
2194
2195 /* PREGRP51 */
2196 {
2197 { "(bad)", { XX } },
2198 { "(bad)", { XX } },
2199 { "movntdqa", { XM, EM } },
2200 { "(bad)", { XX } },
2201 },
2202
2203 /* PREGRP52 */
2204 {
2205 { "(bad)", { XX } },
2206 { "(bad)", { XX } },
2207 { "packusdw", { XM, EX } },
2208 { "(bad)", { XX } },
2209 },
2210
2211 /* PREGRP53 */
2212 {
2213 { "(bad)", { XX } },
2214 { "(bad)", { XX } },
2215 { "pmovzxbw", { XM, EX } },
2216 { "(bad)", { XX } },
2217 },
2218
2219 /* PREGRP54 */
2220 {
2221 { "(bad)", { XX } },
2222 { "(bad)", { XX } },
2223 { "pmovzxbd", { XM, EX } },
2224 { "(bad)", { XX } },
2225 },
2226
2227 /* PREGRP55 */
2228 {
2229 { "(bad)", { XX } },
2230 { "(bad)", { XX } },
2231 { "pmovzxbq", { XM, EX } },
2232 { "(bad)", { XX } },
2233 },
2234
2235 /* PREGRP56 */
2236 {
2237 { "(bad)", { XX } },
2238 { "(bad)", { XX } },
2239 { "pmovzxwd", { XM, EX } },
2240 { "(bad)", { XX } },
2241 },
2242
2243 /* PREGRP57 */
2244 {
2245 { "(bad)", { XX } },
2246 { "(bad)", { XX } },
2247 { "pmovzxwq", { XM, EX } },
2248 { "(bad)", { XX } },
2249 },
2250
2251 /* PREGRP58 */
2252 {
2253 { "(bad)", { XX } },
2254 { "(bad)", { XX } },
2255 { "pmovzxdq", { XM, EX } },
2256 { "(bad)", { XX } },
2257 },
2258
2259 /* PREGRP59 */
2260 {
2261 { "(bad)", { XX } },
2262 { "(bad)", { XX } },
2263 { "pminsb", { XM, EX } },
2264 { "(bad)", { XX } },
2265 },
2266
2267 /* PREGRP60 */
2268 {
2269 { "(bad)", { XX } },
2270 { "(bad)", { XX } },
2271 { "pminsd", { XM, EX } },
2272 { "(bad)", { XX } },
2273 },
2274
2275 /* PREGRP61 */
2276 {
2277 { "(bad)", { XX } },
2278 { "(bad)", { XX } },
2279 { "pminuw", { XM, EX } },
2280 { "(bad)", { XX } },
2281 },
2282
2283 /* PREGRP62 */
2284 {
2285 { "(bad)", { XX } },
2286 { "(bad)", { XX } },
2287 { "pminud", { XM, EX } },
2288 { "(bad)", { XX } },
2289 },
2290
2291 /* PREGRP63 */
2292 {
2293 { "(bad)", { XX } },
2294 { "(bad)", { XX } },
2295 { "pmaxsb", { XM, EX } },
2296 { "(bad)", { XX } },
2297 },
2298
2299 /* PREGRP64 */
2300 {
2301 { "(bad)", { XX } },
2302 { "(bad)", { XX } },
2303 { "pmaxsd", { XM, EX } },
2304 { "(bad)", { XX } },
2305 },
2306
2307 /* PREGRP65 */
2308 {
2309 { "(bad)", { XX } },
2310 { "(bad)", { XX } },
2311 { "pmaxuw", { XM, EX } },
2312 { "(bad)", { XX } },
2313 },
2314
2315 /* PREGRP66 */
2316 {
2317 { "(bad)", { XX } },
2318 { "(bad)", { XX } },
2319 { "pmaxud", { XM, EX } },
2320 { "(bad)", { XX } },
2321 },
2322
2323 /* PREGRP67 */
2324 {
2325 { "(bad)", { XX } },
2326 { "(bad)", { XX } },
2327 { "pmulld", { XM, EX } },
2328 { "(bad)", { XX } },
2329 },
2330
2331 /* PREGRP68 */
2332 {
2333 { "(bad)", { XX } },
2334 { "(bad)", { XX } },
2335 { "phminposuw", { XM, EX } },
2336 { "(bad)", { XX } },
2337 },
2338
2339 /* PREGRP69 */
2340 {
2341 { "(bad)", { XX } },
2342 { "(bad)", { XX } },
2343 { "roundps", { XM, EX, Ib } },
2344 { "(bad)", { XX } },
2345 },
2346
2347 /* PREGRP70 */
2348 {
2349 { "(bad)", { XX } },
2350 { "(bad)", { XX } },
2351 { "roundpd", { XM, EX, Ib } },
2352 { "(bad)", { XX } },
2353 },
2354
2355 /* PREGRP71 */
2356 {
2357 { "(bad)", { XX } },
2358 { "(bad)", { XX } },
2359 { "roundss", { XM, EX, Ib } },
2360 { "(bad)", { XX } },
2361 },
2362
2363 /* PREGRP72 */
2364 {
2365 { "(bad)", { XX } },
2366 { "(bad)", { XX } },
2367 { "roundsd", { XM, EX, Ib } },
2368 { "(bad)", { XX } },
2369 },
2370
2371 /* PREGRP73 */
2372 {
2373 { "(bad)", { XX } },
2374 { "(bad)", { XX } },
2375 { "blendps", { XM, EX, Ib } },
2376 { "(bad)", { XX } },
2377 },
2378
2379 /* PREGRP74 */
2380 {
2381 { "(bad)", { XX } },
2382 { "(bad)", { XX } },
2383 { "blendpd", { XM, EX, Ib } },
2384 { "(bad)", { XX } },
2385 },
2386
2387 /* PREGRP75 */
2388 {
2389 { "(bad)", { XX } },
2390 { "(bad)", { XX } },
2391 { "pblendw", { XM, EX, Ib } },
2392 { "(bad)", { XX } },
2393 },
2394
2395 /* PREGRP76 */
2396 {
2397 { "(bad)", { XX } },
2398 { "(bad)", { XX } },
2399 { "pextrb", { Edqb, XM, Ib } },
2400 { "(bad)", { XX } },
2401 },
2402
2403 /* PREGRP77 */
2404 {
2405 { "(bad)", { XX } },
2406 { "(bad)", { XX } },
2407 { "pextrw", { Edqw, XM, Ib } },
2408 { "(bad)", { XX } },
2409 },
2410
2411 /* PREGRP78 */
2412 {
2413 { "(bad)", { XX } },
2414 { "(bad)", { XX } },
2415 { "pextrK", { Edq, XM, Ib } },
2416 { "(bad)", { XX } },
2417 },
2418
2419 /* PREGRP79 */
2420 {
2421 { "(bad)", { XX } },
2422 { "(bad)", { XX } },
2423 { "extractps", { Edqd, XM, Ib } },
2424 { "(bad)", { XX } },
2425 },
2426
2427 /* PREGRP80 */
2428 {
2429 { "(bad)", { XX } },
2430 { "(bad)", { XX } },
2431 { "pinsrb", { XM, Edqb, Ib } },
2432 { "(bad)", { XX } },
2433 },
2434
2435 /* PREGRP81 */
2436 {
2437 { "(bad)", { XX } },
2438 { "(bad)", { XX } },
2439 { "insertps", { XM, EX, Ib } },
2440 { "(bad)", { XX } },
2441 },
2442
2443 /* PREGRP82 */
2444 {
2445 { "(bad)", { XX } },
2446 { "(bad)", { XX } },
2447 { "pinsrK", { XM, Edq, Ib } },
2448 { "(bad)", { XX } },
2449 },
2450
2451 /* PREGRP83 */
2452 {
2453 { "(bad)", { XX } },
2454 { "(bad)", { XX } },
2455 { "dpps", { XM, EX, Ib } },
2456 { "(bad)", { XX } },
2457 },
2458
2459 /* PREGRP84 */
2460 {
2461 { "(bad)", { XX } },
2462 { "(bad)", { XX } },
2463 { "dppd", { XM, EX, Ib } },
2464 { "(bad)", { XX } },
2465 },
2466
2467 /* PREGRP85 */
2468 {
2469 { "(bad)", { XX } },
2470 { "(bad)", { XX } },
2471 { "mpsadbw", { XM, EX, Ib } },
2472 { "(bad)", { XX } },
2473 },
2474 };
2475
2476 static const struct dis386 x86_64_table[][2] = {
2477 {
2478 { "pusha{P|}", { XX } },
2479 { "(bad)", { XX } },
2480 },
2481 {
2482 { "popa{P|}", { XX } },
2483 { "(bad)", { XX } },
2484 },
2485 {
2486 { "bound{S|}", { Gv, Ma } },
2487 { "(bad)", { XX } },
2488 },
2489 {
2490 { "arpl", { Ew, Gw } },
2491 { "movs{||lq|xd}", { Gv, Ed } },
2492 },
2493 };
2494
2495 static const struct dis386 three_byte_table[][256] = {
2496 /* THREE_BYTE_0 */
2497 {
2498 /* 00 */
2499 { "pshufb", { MX, EM } },
2500 { "phaddw", { MX, EM } },
2501 { "phaddd", { MX, EM } },
2502 { "phaddsw", { MX, EM } },
2503 { "pmaddubsw", { MX, EM } },
2504 { "phsubw", { MX, EM } },
2505 { "phsubd", { MX, EM } },
2506 { "phsubsw", { MX, EM } },
2507 /* 08 */
2508 { "psignb", { MX, EM } },
2509 { "psignw", { MX, EM } },
2510 { "psignd", { MX, EM } },
2511 { "pmulhrsw", { MX, EM } },
2512 { "(bad)", { XX } },
2513 { "(bad)", { XX } },
2514 { "(bad)", { XX } },
2515 { "(bad)", { XX } },
2516 /* 10 */
2517 { PREGRP39 },
2518 { "(bad)", { XX } },
2519 { "(bad)", { XX } },
2520 { "(bad)", { XX } },
2521 { PREGRP40 },
2522 { PREGRP41 },
2523 { "(bad)", { XX } },
2524 { PREGRP42 },
2525 /* 18 */
2526 { "(bad)", { XX } },
2527 { "(bad)", { XX } },
2528 { "(bad)", { XX } },
2529 { "(bad)", { XX } },
2530 { "pabsb", { MX, EM } },
2531 { "pabsw", { MX, EM } },
2532 { "pabsd", { MX, EM } },
2533 { "(bad)", { XX } },
2534 /* 20 */
2535 { PREGRP43 },
2536 { PREGRP44 },
2537 { PREGRP45 },
2538 { PREGRP46 },
2539 { PREGRP47 },
2540 { PREGRP48 },
2541 { "(bad)", { XX } },
2542 { "(bad)", { XX } },
2543 /* 28 */
2544 { PREGRP49 },
2545 { PREGRP50 },
2546 { PREGRP51 },
2547 { PREGRP52 },
2548 { "(bad)", { XX } },
2549 { "(bad)", { XX } },
2550 { "(bad)", { XX } },
2551 { "(bad)", { XX } },
2552 /* 30 */
2553 { PREGRP53 },
2554 { PREGRP54 },
2555 { PREGRP55 },
2556 { PREGRP56 },
2557 { PREGRP57 },
2558 { PREGRP58 },
2559 { "(bad)", { XX } },
2560 { "(bad)", { XX } },
2561 /* 38 */
2562 { PREGRP59 },
2563 { PREGRP60 },
2564 { PREGRP61 },
2565 { PREGRP62 },
2566 { PREGRP63 },
2567 { PREGRP64 },
2568 { PREGRP65 },
2569 { PREGRP66 },
2570 /* 40 */
2571 { PREGRP67 },
2572 { PREGRP68 },
2573 { "(bad)", { XX } },
2574 { "(bad)", { XX } },
2575 { "(bad)", { XX } },
2576 { "(bad)", { XX } },
2577 { "(bad)", { XX } },
2578 { "(bad)", { XX } },
2579 /* 48 */
2580 { "(bad)", { XX } },
2581 { "(bad)", { XX } },
2582 { "(bad)", { XX } },
2583 { "(bad)", { XX } },
2584 { "(bad)", { XX } },
2585 { "(bad)", { XX } },
2586 { "(bad)", { XX } },
2587 { "(bad)", { XX } },
2588 /* 50 */
2589 { "(bad)", { XX } },
2590 { "(bad)", { XX } },
2591 { "(bad)", { XX } },
2592 { "(bad)", { XX } },
2593 { "(bad)", { XX } },
2594 { "(bad)", { XX } },
2595 { "(bad)", { XX } },
2596 { "(bad)", { XX } },
2597 /* 58 */
2598 { "(bad)", { XX } },
2599 { "(bad)", { XX } },
2600 { "(bad)", { XX } },
2601 { "(bad)", { XX } },
2602 { "(bad)", { XX } },
2603 { "(bad)", { XX } },
2604 { "(bad)", { XX } },
2605 { "(bad)", { XX } },
2606 /* 60 */
2607 { "(bad)", { XX } },
2608 { "(bad)", { XX } },
2609 { "(bad)", { XX } },
2610 { "(bad)", { XX } },
2611 { "(bad)", { XX } },
2612 { "(bad)", { XX } },
2613 { "(bad)", { XX } },
2614 { "(bad)", { XX } },
2615 /* 68 */
2616 { "(bad)", { XX } },
2617 { "(bad)", { XX } },
2618 { "(bad)", { XX } },
2619 { "(bad)", { XX } },
2620 { "(bad)", { XX } },
2621 { "(bad)", { XX } },
2622 { "(bad)", { XX } },
2623 { "(bad)", { XX } },
2624 /* 70 */
2625 { "(bad)", { XX } },
2626 { "(bad)", { XX } },
2627 { "(bad)", { XX } },
2628 { "(bad)", { XX } },
2629 { "(bad)", { XX } },
2630 { "(bad)", { XX } },
2631 { "(bad)", { XX } },
2632 { "(bad)", { XX } },
2633 /* 78 */
2634 { "(bad)", { XX } },
2635 { "(bad)", { XX } },
2636 { "(bad)", { XX } },
2637 { "(bad)", { XX } },
2638 { "(bad)", { XX } },
2639 { "(bad)", { XX } },
2640 { "(bad)", { XX } },
2641 { "(bad)", { XX } },
2642 /* 80 */
2643 { "(bad)", { XX } },
2644 { "(bad)", { XX } },
2645 { "(bad)", { XX } },
2646 { "(bad)", { XX } },
2647 { "(bad)", { XX } },
2648 { "(bad)", { XX } },
2649 { "(bad)", { XX } },
2650 { "(bad)", { XX } },
2651 /* 88 */
2652 { "(bad)", { XX } },
2653 { "(bad)", { XX } },
2654 { "(bad)", { XX } },
2655 { "(bad)", { XX } },
2656 { "(bad)", { XX } },
2657 { "(bad)", { XX } },
2658 { "(bad)", { XX } },
2659 { "(bad)", { XX } },
2660 /* 90 */
2661 { "(bad)", { XX } },
2662 { "(bad)", { XX } },
2663 { "(bad)", { XX } },
2664 { "(bad)", { XX } },
2665 { "(bad)", { XX } },
2666 { "(bad)", { XX } },
2667 { "(bad)", { XX } },
2668 { "(bad)", { XX } },
2669 /* 98 */
2670 { "(bad)", { XX } },
2671 { "(bad)", { XX } },
2672 { "(bad)", { XX } },
2673 { "(bad)", { XX } },
2674 { "(bad)", { XX } },
2675 { "(bad)", { XX } },
2676 { "(bad)", { XX } },
2677 { "(bad)", { XX } },
2678 /* a0 */
2679 { "(bad)", { XX } },
2680 { "(bad)", { XX } },
2681 { "(bad)", { XX } },
2682 { "(bad)", { XX } },
2683 { "(bad)", { XX } },
2684 { "(bad)", { XX } },
2685 { "(bad)", { XX } },
2686 { "(bad)", { XX } },
2687 /* a8 */
2688 { "(bad)", { XX } },
2689 { "(bad)", { XX } },
2690 { "(bad)", { XX } },
2691 { "(bad)", { XX } },
2692 { "(bad)", { XX } },
2693 { "(bad)", { XX } },
2694 { "(bad)", { XX } },
2695 { "(bad)", { XX } },
2696 /* b0 */
2697 { "(bad)", { XX } },
2698 { "(bad)", { XX } },
2699 { "(bad)", { XX } },
2700 { "(bad)", { XX } },
2701 { "(bad)", { XX } },
2702 { "(bad)", { XX } },
2703 { "(bad)", { XX } },
2704 { "(bad)", { XX } },
2705 /* b8 */
2706 { "(bad)", { XX } },
2707 { "(bad)", { XX } },
2708 { "(bad)", { XX } },
2709 { "(bad)", { XX } },
2710 { "(bad)", { XX } },
2711 { "(bad)", { XX } },
2712 { "(bad)", { XX } },
2713 { "(bad)", { XX } },
2714 /* c0 */
2715 { "(bad)", { XX } },
2716 { "(bad)", { XX } },
2717 { "(bad)", { XX } },
2718 { "(bad)", { XX } },
2719 { "(bad)", { XX } },
2720 { "(bad)", { XX } },
2721 { "(bad)", { XX } },
2722 { "(bad)", { XX } },
2723 /* c8 */
2724 { "(bad)", { XX } },
2725 { "(bad)", { XX } },
2726 { "(bad)", { XX } },
2727 { "(bad)", { XX } },
2728 { "(bad)", { XX } },
2729 { "(bad)", { XX } },
2730 { "(bad)", { XX } },
2731 { "(bad)", { XX } },
2732 /* d0 */
2733 { "(bad)", { XX } },
2734 { "(bad)", { XX } },
2735 { "(bad)", { XX } },
2736 { "(bad)", { XX } },
2737 { "(bad)", { XX } },
2738 { "(bad)", { XX } },
2739 { "(bad)", { XX } },
2740 { "(bad)", { XX } },
2741 /* d8 */
2742 { "(bad)", { XX } },
2743 { "(bad)", { XX } },
2744 { "(bad)", { XX } },
2745 { "(bad)", { XX } },
2746 { "(bad)", { XX } },
2747 { "(bad)", { XX } },
2748 { "(bad)", { XX } },
2749 { "(bad)", { XX } },
2750 /* e0 */
2751 { "(bad)", { XX } },
2752 { "(bad)", { XX } },
2753 { "(bad)", { XX } },
2754 { "(bad)", { XX } },
2755 { "(bad)", { XX } },
2756 { "(bad)", { XX } },
2757 { "(bad)", { XX } },
2758 { "(bad)", { XX } },
2759 /* e8 */
2760 { "(bad)", { XX } },
2761 { "(bad)", { XX } },
2762 { "(bad)", { XX } },
2763 { "(bad)", { XX } },
2764 { "(bad)", { XX } },
2765 { "(bad)", { XX } },
2766 { "(bad)", { XX } },
2767 { "(bad)", { XX } },
2768 /* f0 */
2769 { "(bad)", { XX } },
2770 { "(bad)", { XX } },
2771 { "(bad)", { XX } },
2772 { "(bad)", { XX } },
2773 { "(bad)", { XX } },
2774 { "(bad)", { XX } },
2775 { "(bad)", { XX } },
2776 { "(bad)", { XX } },
2777 /* f8 */
2778 { "(bad)", { XX } },
2779 { "(bad)", { XX } },
2780 { "(bad)", { XX } },
2781 { "(bad)", { XX } },
2782 { "(bad)", { XX } },
2783 { "(bad)", { XX } },
2784 { "(bad)", { XX } },
2785 { "(bad)", { XX } },
2786 },
2787 /* THREE_BYTE_1 */
2788 {
2789 /* 00 */
2790 { "(bad)", { XX } },
2791 { "(bad)", { XX } },
2792 { "(bad)", { XX } },
2793 { "(bad)", { XX } },
2794 { "(bad)", { XX } },
2795 { "(bad)", { XX } },
2796 { "(bad)", { XX } },
2797 { "(bad)", { XX } },
2798 /* 08 */
2799 { PREGRP69 },
2800 { PREGRP70 },
2801 { PREGRP71 },
2802 { PREGRP72 },
2803 { PREGRP73 },
2804 { PREGRP74 },
2805 { PREGRP75 },
2806 { "palignr", { MX, EM, Ib } },
2807 /* 10 */
2808 { "(bad)", { XX } },
2809 { "(bad)", { XX } },
2810 { "(bad)", { XX } },
2811 { "(bad)", { XX } },
2812 { PREGRP76 },
2813 { PREGRP77 },
2814 { PREGRP78 },
2815 { PREGRP79 },
2816 /* 18 */
2817 { "(bad)", { XX } },
2818 { "(bad)", { XX } },
2819 { "(bad)", { XX } },
2820 { "(bad)", { XX } },
2821 { "(bad)", { XX } },
2822 { "(bad)", { XX } },
2823 { "(bad)", { XX } },
2824 { "(bad)", { XX } },
2825 /* 20 */
2826 { PREGRP80 },
2827 { PREGRP81 },
2828 { PREGRP82 },
2829 { "(bad)", { XX } },
2830 { "(bad)", { XX } },
2831 { "(bad)", { XX } },
2832 { "(bad)", { XX } },
2833 { "(bad)", { XX } },
2834 /* 28 */
2835 { "(bad)", { XX } },
2836 { "(bad)", { XX } },
2837 { "(bad)", { XX } },
2838 { "(bad)", { XX } },
2839 { "(bad)", { XX } },
2840 { "(bad)", { XX } },
2841 { "(bad)", { XX } },
2842 { "(bad)", { XX } },
2843 /* 30 */
2844 { "(bad)", { XX } },
2845 { "(bad)", { XX } },
2846 { "(bad)", { XX } },
2847 { "(bad)", { XX } },
2848 { "(bad)", { XX } },
2849 { "(bad)", { XX } },
2850 { "(bad)", { XX } },
2851 { "(bad)", { XX } },
2852 /* 38 */
2853 { "(bad)", { XX } },
2854 { "(bad)", { XX } },
2855 { "(bad)", { XX } },
2856 { "(bad)", { XX } },
2857 { "(bad)", { XX } },
2858 { "(bad)", { XX } },
2859 { "(bad)", { XX } },
2860 { "(bad)", { XX } },
2861 /* 40 */
2862 { PREGRP83 },
2863 { PREGRP84 },
2864 { PREGRP85 },
2865 { "(bad)", { XX } },
2866 { "(bad)", { XX } },
2867 { "(bad)", { XX } },
2868 { "(bad)", { XX } },
2869 { "(bad)", { XX } },
2870 /* 48 */
2871 { "(bad)", { XX } },
2872 { "(bad)", { XX } },
2873 { "(bad)", { XX } },
2874 { "(bad)", { XX } },
2875 { "(bad)", { XX } },
2876 { "(bad)", { XX } },
2877 { "(bad)", { XX } },
2878 { "(bad)", { XX } },
2879 /* 50 */
2880 { "(bad)", { XX } },
2881 { "(bad)", { XX } },
2882 { "(bad)", { XX } },
2883 { "(bad)", { XX } },
2884 { "(bad)", { XX } },
2885 { "(bad)", { XX } },
2886 { "(bad)", { XX } },
2887 { "(bad)", { XX } },
2888 /* 58 */
2889 { "(bad)", { XX } },
2890 { "(bad)", { XX } },
2891 { "(bad)", { XX } },
2892 { "(bad)", { XX } },
2893 { "(bad)", { XX } },
2894 { "(bad)", { XX } },
2895 { "(bad)", { XX } },
2896 { "(bad)", { XX } },
2897 /* 60 */
2898 { "(bad)", { XX } },
2899 { "(bad)", { XX } },
2900 { "(bad)", { XX } },
2901 { "(bad)", { XX } },
2902 { "(bad)", { XX } },
2903 { "(bad)", { XX } },
2904 { "(bad)", { XX } },
2905 { "(bad)", { XX } },
2906 /* 68 */
2907 { "(bad)", { XX } },
2908 { "(bad)", { XX } },
2909 { "(bad)", { XX } },
2910 { "(bad)", { XX } },
2911 { "(bad)", { XX } },
2912 { "(bad)", { XX } },
2913 { "(bad)", { XX } },
2914 { "(bad)", { XX } },
2915 /* 70 */
2916 { "(bad)", { XX } },
2917 { "(bad)", { XX } },
2918 { "(bad)", { XX } },
2919 { "(bad)", { XX } },
2920 { "(bad)", { XX } },
2921 { "(bad)", { XX } },
2922 { "(bad)", { XX } },
2923 { "(bad)", { XX } },
2924 /* 78 */
2925 { "(bad)", { XX } },
2926 { "(bad)", { XX } },
2927 { "(bad)", { XX } },
2928 { "(bad)", { XX } },
2929 { "(bad)", { XX } },
2930 { "(bad)", { XX } },
2931 { "(bad)", { XX } },
2932 { "(bad)", { XX } },
2933 /* 80 */
2934 { "(bad)", { XX } },
2935 { "(bad)", { XX } },
2936 { "(bad)", { XX } },
2937 { "(bad)", { XX } },
2938 { "(bad)", { XX } },
2939 { "(bad)", { XX } },
2940 { "(bad)", { XX } },
2941 { "(bad)", { XX } },
2942 /* 88 */
2943 { "(bad)", { XX } },
2944 { "(bad)", { XX } },
2945 { "(bad)", { XX } },
2946 { "(bad)", { XX } },
2947 { "(bad)", { XX } },
2948 { "(bad)", { XX } },
2949 { "(bad)", { XX } },
2950 { "(bad)", { XX } },
2951 /* 90 */
2952 { "(bad)", { XX } },
2953 { "(bad)", { XX } },
2954 { "(bad)", { XX } },
2955 { "(bad)", { XX } },
2956 { "(bad)", { XX } },
2957 { "(bad)", { XX } },
2958 { "(bad)", { XX } },
2959 { "(bad)", { XX } },
2960 /* 98 */
2961 { "(bad)", { XX } },
2962 { "(bad)", { XX } },
2963 { "(bad)", { XX } },
2964 { "(bad)", { XX } },
2965 { "(bad)", { XX } },
2966 { "(bad)", { XX } },
2967 { "(bad)", { XX } },
2968 { "(bad)", { XX } },
2969 /* a0 */
2970 { "(bad)", { XX } },
2971 { "(bad)", { XX } },
2972 { "(bad)", { XX } },
2973 { "(bad)", { XX } },
2974 { "(bad)", { XX } },
2975 { "(bad)", { XX } },
2976 { "(bad)", { XX } },
2977 { "(bad)", { XX } },
2978 /* a8 */
2979 { "(bad)", { XX } },
2980 { "(bad)", { XX } },
2981 { "(bad)", { XX } },
2982 { "(bad)", { XX } },
2983 { "(bad)", { XX } },
2984 { "(bad)", { XX } },
2985 { "(bad)", { XX } },
2986 { "(bad)", { XX } },
2987 /* b0 */
2988 { "(bad)", { XX } },
2989 { "(bad)", { XX } },
2990 { "(bad)", { XX } },
2991 { "(bad)", { XX } },
2992 { "(bad)", { XX } },
2993 { "(bad)", { XX } },
2994 { "(bad)", { XX } },
2995 { "(bad)", { XX } },
2996 /* b8 */
2997 { "(bad)", { XX } },
2998 { "(bad)", { XX } },
2999 { "(bad)", { XX } },
3000 { "(bad)", { XX } },
3001 { "(bad)", { XX } },
3002 { "(bad)", { XX } },
3003 { "(bad)", { XX } },
3004 { "(bad)", { XX } },
3005 /* c0 */
3006 { "(bad)", { XX } },
3007 { "(bad)", { XX } },
3008 { "(bad)", { XX } },
3009 { "(bad)", { XX } },
3010 { "(bad)", { XX } },
3011 { "(bad)", { XX } },
3012 { "(bad)", { XX } },
3013 { "(bad)", { XX } },
3014 /* c8 */
3015 { "(bad)", { XX } },
3016 { "(bad)", { XX } },
3017 { "(bad)", { XX } },
3018 { "(bad)", { XX } },
3019 { "(bad)", { XX } },
3020 { "(bad)", { XX } },
3021 { "(bad)", { XX } },
3022 { "(bad)", { XX } },
3023 /* d0 */
3024 { "(bad)", { XX } },
3025 { "(bad)", { XX } },
3026 { "(bad)", { XX } },
3027 { "(bad)", { XX } },
3028 { "(bad)", { XX } },
3029 { "(bad)", { XX } },
3030 { "(bad)", { XX } },
3031 { "(bad)", { XX } },
3032 /* d8 */
3033 { "(bad)", { XX } },
3034 { "(bad)", { XX } },
3035 { "(bad)", { XX } },
3036 { "(bad)", { XX } },
3037 { "(bad)", { XX } },
3038 { "(bad)", { XX } },
3039 { "(bad)", { XX } },
3040 { "(bad)", { XX } },
3041 /* e0 */
3042 { "(bad)", { XX } },
3043 { "(bad)", { XX } },
3044 { "(bad)", { XX } },
3045 { "(bad)", { XX } },
3046 { "(bad)", { XX } },
3047 { "(bad)", { XX } },
3048 { "(bad)", { XX } },
3049 { "(bad)", { XX } },
3050 /* e8 */
3051 { "(bad)", { XX } },
3052 { "(bad)", { XX } },
3053 { "(bad)", { XX } },
3054 { "(bad)", { XX } },
3055 { "(bad)", { XX } },
3056 { "(bad)", { XX } },
3057 { "(bad)", { XX } },
3058 { "(bad)", { XX } },
3059 /* f0 */
3060 { "(bad)", { XX } },
3061 { "(bad)", { XX } },
3062 { "(bad)", { XX } },
3063 { "(bad)", { XX } },
3064 { "(bad)", { XX } },
3065 { "(bad)", { XX } },
3066 { "(bad)", { XX } },
3067 { "(bad)", { XX } },
3068 /* f8 */
3069 { "(bad)", { XX } },
3070 { "(bad)", { XX } },
3071 { "(bad)", { XX } },
3072 { "(bad)", { XX } },
3073 { "(bad)", { XX } },
3074 { "(bad)", { XX } },
3075 { "(bad)", { XX } },
3076 { "(bad)", { XX } },
3077 }
3078 };
3079
3080 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3081
3082 static void
3083 ckprefix (void)
3084 {
3085 int newrex;
3086 rex = 0;
3087 prefixes = 0;
3088 used_prefixes = 0;
3089 rex_used = 0;
3090 while (1)
3091 {
3092 FETCH_DATA (the_info, codep + 1);
3093 newrex = 0;
3094 switch (*codep)
3095 {
3096 /* REX prefixes family. */
3097 case 0x40:
3098 case 0x41:
3099 case 0x42:
3100 case 0x43:
3101 case 0x44:
3102 case 0x45:
3103 case 0x46:
3104 case 0x47:
3105 case 0x48:
3106 case 0x49:
3107 case 0x4a:
3108 case 0x4b:
3109 case 0x4c:
3110 case 0x4d:
3111 case 0x4e:
3112 case 0x4f:
3113 if (address_mode == mode_64bit)
3114 newrex = *codep;
3115 else
3116 return;
3117 break;
3118 case 0xf3:
3119 prefixes |= PREFIX_REPZ;
3120 break;
3121 case 0xf2:
3122 prefixes |= PREFIX_REPNZ;
3123 break;
3124 case 0xf0:
3125 prefixes |= PREFIX_LOCK;
3126 break;
3127 case 0x2e:
3128 prefixes |= PREFIX_CS;
3129 break;
3130 case 0x36:
3131 prefixes |= PREFIX_SS;
3132 break;
3133 case 0x3e:
3134 prefixes |= PREFIX_DS;
3135 break;
3136 case 0x26:
3137 prefixes |= PREFIX_ES;
3138 break;
3139 case 0x64:
3140 prefixes |= PREFIX_FS;
3141 break;
3142 case 0x65:
3143 prefixes |= PREFIX_GS;
3144 break;
3145 case 0x66:
3146 prefixes |= PREFIX_DATA;
3147 break;
3148 case 0x67:
3149 prefixes |= PREFIX_ADDR;
3150 break;
3151 case FWAIT_OPCODE:
3152 /* fwait is really an instruction. If there are prefixes
3153 before the fwait, they belong to the fwait, *not* to the
3154 following instruction. */
3155 if (prefixes || rex)
3156 {
3157 prefixes |= PREFIX_FWAIT;
3158 codep++;
3159 return;
3160 }
3161 prefixes = PREFIX_FWAIT;
3162 break;
3163 default:
3164 return;
3165 }
3166 /* Rex is ignored when followed by another prefix. */
3167 if (rex)
3168 {
3169 rex_used = rex;
3170 return;
3171 }
3172 rex = newrex;
3173 codep++;
3174 }
3175 }
3176
3177 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
3178 prefix byte. */
3179
3180 static const char *
3181 prefix_name (int pref, int sizeflag)
3182 {
3183 static const char *rexes [16] =
3184 {
3185 "rex", /* 0x40 */
3186 "rex.B", /* 0x41 */
3187 "rex.X", /* 0x42 */
3188 "rex.XB", /* 0x43 */
3189 "rex.R", /* 0x44 */
3190 "rex.RB", /* 0x45 */
3191 "rex.RX", /* 0x46 */
3192 "rex.RXB", /* 0x47 */
3193 "rex.W", /* 0x48 */
3194 "rex.WB", /* 0x49 */
3195 "rex.WX", /* 0x4a */
3196 "rex.WXB", /* 0x4b */
3197 "rex.WR", /* 0x4c */
3198 "rex.WRB", /* 0x4d */
3199 "rex.WRX", /* 0x4e */
3200 "rex.WRXB", /* 0x4f */
3201 };
3202
3203 switch (pref)
3204 {
3205 /* REX prefixes family. */
3206 case 0x40:
3207 case 0x41:
3208 case 0x42:
3209 case 0x43:
3210 case 0x44:
3211 case 0x45:
3212 case 0x46:
3213 case 0x47:
3214 case 0x48:
3215 case 0x49:
3216 case 0x4a:
3217 case 0x4b:
3218 case 0x4c:
3219 case 0x4d:
3220 case 0x4e:
3221 case 0x4f:
3222 return rexes [pref - 0x40];
3223 case 0xf3:
3224 return "repz";
3225 case 0xf2:
3226 return "repnz";
3227 case 0xf0:
3228 return "lock";
3229 case 0x2e:
3230 return "cs";
3231 case 0x36:
3232 return "ss";
3233 case 0x3e:
3234 return "ds";
3235 case 0x26:
3236 return "es";
3237 case 0x64:
3238 return "fs";
3239 case 0x65:
3240 return "gs";
3241 case 0x66:
3242 return (sizeflag & DFLAG) ? "data16" : "data32";
3243 case 0x67:
3244 if (address_mode == mode_64bit)
3245 return (sizeflag & AFLAG) ? "addr32" : "addr64";
3246 else
3247 return (sizeflag & AFLAG) ? "addr16" : "addr32";
3248 case FWAIT_OPCODE:
3249 return "fwait";
3250 default:
3251 return NULL;
3252 }
3253 }
3254
3255 static char op_out[MAX_OPERANDS][100];
3256 static int op_ad, op_index[MAX_OPERANDS];
3257 static int two_source_ops;
3258 static bfd_vma op_address[MAX_OPERANDS];
3259 static bfd_vma op_riprel[MAX_OPERANDS];
3260 static bfd_vma start_pc;
3261
3262 /*
3263 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3264 * (see topic "Redundant prefixes" in the "Differences from 8086"
3265 * section of the "Virtual 8086 Mode" chapter.)
3266 * 'pc' should be the address of this instruction, it will
3267 * be used to print the target address if this is a relative jump or call
3268 * The function returns the length of this instruction in bytes.
3269 */
3270
3271 static char intel_syntax;
3272 static char open_char;
3273 static char close_char;
3274 static char separator_char;
3275 static char scale_char;
3276
3277 /* Here for backwards compatibility. When gdb stops using
3278 print_insn_i386_att and print_insn_i386_intel these functions can
3279 disappear, and print_insn_i386 be merged into print_insn. */
3280 int
3281 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
3282 {
3283 intel_syntax = 0;
3284
3285 return print_insn (pc, info);
3286 }
3287
3288 int
3289 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
3290 {
3291 intel_syntax = 1;
3292
3293 return print_insn (pc, info);
3294 }
3295
3296 int
3297 print_insn_i386 (bfd_vma pc, disassemble_info *info)
3298 {
3299 intel_syntax = -1;
3300
3301 return print_insn (pc, info);
3302 }
3303
3304 void
3305 print_i386_disassembler_options (FILE *stream)
3306 {
3307 fprintf (stream, _("\n\
3308 The following i386/x86-64 specific disassembler options are supported for use\n\
3309 with the -M switch (multiple options should be separated by commas):\n"));
3310
3311 fprintf (stream, _(" x86-64 Disassemble in 64bit mode\n"));
3312 fprintf (stream, _(" i386 Disassemble in 32bit mode\n"));
3313 fprintf (stream, _(" i8086 Disassemble in 16bit mode\n"));
3314 fprintf (stream, _(" att Display instruction in AT&T syntax\n"));
3315 fprintf (stream, _(" intel Display instruction in Intel syntax\n"));
3316 fprintf (stream, _(" addr64 Assume 64bit address size\n"));
3317 fprintf (stream, _(" addr32 Assume 32bit address size\n"));
3318 fprintf (stream, _(" addr16 Assume 16bit address size\n"));
3319 fprintf (stream, _(" data32 Assume 32bit data size\n"));
3320 fprintf (stream, _(" data16 Assume 16bit data size\n"));
3321 fprintf (stream, _(" suffix Always display instruction suffix in AT&T syntax\n"));
3322 }
3323
3324 static int
3325 print_insn (bfd_vma pc, disassemble_info *info)
3326 {
3327 const struct dis386 *dp;
3328 int i;
3329 char *op_txt[MAX_OPERANDS];
3330 int needcomma;
3331 unsigned char uses_DATA_prefix, uses_LOCK_prefix;
3332 unsigned char uses_REPNZ_prefix, uses_REPZ_prefix;
3333 int sizeflag;
3334 const char *p;
3335 struct dis_private priv;
3336 unsigned char op;
3337
3338 if (info->mach == bfd_mach_x86_64_intel_syntax
3339 || info->mach == bfd_mach_x86_64)
3340 address_mode = mode_64bit;
3341 else
3342 address_mode = mode_32bit;
3343
3344 if (intel_syntax == (char) -1)
3345 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
3346 || info->mach == bfd_mach_x86_64_intel_syntax);
3347
3348 if (info->mach == bfd_mach_i386_i386
3349 || info->mach == bfd_mach_x86_64
3350 || info->mach == bfd_mach_i386_i386_intel_syntax
3351 || info->mach == bfd_mach_x86_64_intel_syntax)
3352 priv.orig_sizeflag = AFLAG | DFLAG;
3353 else if (info->mach == bfd_mach_i386_i8086)
3354 priv.orig_sizeflag = 0;
3355 else
3356 abort ();
3357
3358 for (p = info->disassembler_options; p != NULL; )
3359 {
3360 if (CONST_STRNEQ (p, "x86-64"))
3361 {
3362 address_mode = mode_64bit;
3363 priv.orig_sizeflag = AFLAG | DFLAG;
3364 }
3365 else if (CONST_STRNEQ (p, "i386"))
3366 {
3367 address_mode = mode_32bit;
3368 priv.orig_sizeflag = AFLAG | DFLAG;
3369 }
3370 else if (CONST_STRNEQ (p, "i8086"))
3371 {
3372 address_mode = mode_16bit;
3373 priv.orig_sizeflag = 0;
3374 }
3375 else if (CONST_STRNEQ (p, "intel"))
3376 {
3377 intel_syntax = 1;
3378 }
3379 else if (CONST_STRNEQ (p, "att"))
3380 {
3381 intel_syntax = 0;
3382 }
3383 else if (CONST_STRNEQ (p, "addr"))
3384 {
3385 if (address_mode == mode_64bit)
3386 {
3387 if (p[4] == '3' && p[5] == '2')
3388 priv.orig_sizeflag &= ~AFLAG;
3389 else if (p[4] == '6' && p[5] == '4')
3390 priv.orig_sizeflag |= AFLAG;
3391 }
3392 else
3393 {
3394 if (p[4] == '1' && p[5] == '6')
3395 priv.orig_sizeflag &= ~AFLAG;
3396 else if (p[4] == '3' && p[5] == '2')
3397 priv.orig_sizeflag |= AFLAG;
3398 }
3399 }
3400 else if (CONST_STRNEQ (p, "data"))
3401 {
3402 if (p[4] == '1' && p[5] == '6')
3403 priv.orig_sizeflag &= ~DFLAG;
3404 else if (p[4] == '3' && p[5] == '2')
3405 priv.orig_sizeflag |= DFLAG;
3406 }
3407 else if (CONST_STRNEQ (p, "suffix"))
3408 priv.orig_sizeflag |= SUFFIX_ALWAYS;
3409
3410 p = strchr (p, ',');
3411 if (p != NULL)
3412 p++;
3413 }
3414
3415 if (intel_syntax)
3416 {
3417 names64 = intel_names64;
3418 names32 = intel_names32;
3419 names16 = intel_names16;
3420 names8 = intel_names8;
3421 names8rex = intel_names8rex;
3422 names_seg = intel_names_seg;
3423 index16 = intel_index16;
3424 open_char = '[';
3425 close_char = ']';
3426 separator_char = '+';
3427 scale_char = '*';
3428 }
3429 else
3430 {
3431 names64 = att_names64;
3432 names32 = att_names32;
3433 names16 = att_names16;
3434 names8 = att_names8;
3435 names8rex = att_names8rex;
3436 names_seg = att_names_seg;
3437 index16 = att_index16;
3438 open_char = '(';
3439 close_char = ')';
3440 separator_char = ',';
3441 scale_char = ',';
3442 }
3443
3444 /* The output looks better if we put 7 bytes on a line, since that
3445 puts most long word instructions on a single line. */
3446 info->bytes_per_line = 7;
3447
3448 info->private_data = &priv;
3449 priv.max_fetched = priv.the_buffer;
3450 priv.insn_start = pc;
3451
3452 obuf[0] = 0;
3453 for (i = 0; i < MAX_OPERANDS; ++i)
3454 {
3455 op_out[i][0] = 0;
3456 op_index[i] = -1;
3457 }
3458
3459 the_info = info;
3460 start_pc = pc;
3461 start_codep = priv.the_buffer;
3462 codep = priv.the_buffer;
3463
3464 if (setjmp (priv.bailout) != 0)
3465 {
3466 const char *name;
3467
3468 /* Getting here means we tried for data but didn't get it. That
3469 means we have an incomplete instruction of some sort. Just
3470 print the first byte as a prefix or a .byte pseudo-op. */
3471 if (codep > priv.the_buffer)
3472 {
3473 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3474 if (name != NULL)
3475 (*info->fprintf_func) (info->stream, "%s", name);
3476 else
3477 {
3478 /* Just print the first byte as a .byte instruction. */
3479 (*info->fprintf_func) (info->stream, ".byte 0x%x",
3480 (unsigned int) priv.the_buffer[0]);
3481 }
3482
3483 return 1;
3484 }
3485
3486 return -1;
3487 }
3488
3489 obufp = obuf;
3490 ckprefix ();
3491
3492 insn_codep = codep;
3493 sizeflag = priv.orig_sizeflag;
3494
3495 FETCH_DATA (info, codep + 1);
3496 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3497
3498 if (((prefixes & PREFIX_FWAIT)
3499 && ((*codep < 0xd8) || (*codep > 0xdf)))
3500 || (rex && rex_used))
3501 {
3502 const char *name;
3503
3504 /* fwait not followed by floating point instruction, or rex followed
3505 by other prefixes. Print the first prefix. */
3506 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3507 if (name == NULL)
3508 name = INTERNAL_DISASSEMBLER_ERROR;
3509 (*info->fprintf_func) (info->stream, "%s", name);
3510 return 1;
3511 }
3512
3513 op = 0;
3514 if (*codep == 0x0f)
3515 {
3516 unsigned char threebyte;
3517 FETCH_DATA (info, codep + 2);
3518 threebyte = *++codep;
3519 dp = &dis386_twobyte[threebyte];
3520 need_modrm = twobyte_has_modrm[*codep];
3521 uses_DATA_prefix = twobyte_uses_DATA_prefix[*codep];
3522 uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[*codep];
3523 uses_REPZ_prefix = twobyte_uses_REPZ_prefix[*codep];
3524 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
3525 codep++;
3526 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3527 {
3528 FETCH_DATA (info, codep + 2);
3529 op = *codep++;
3530 switch (threebyte)
3531 {
3532 case 0x38:
3533 uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op];
3534 uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op];
3535 uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op];
3536 break;
3537 case 0x3a:
3538 uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op];
3539 uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op];
3540 uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op];
3541 break;
3542 default:
3543 break;
3544 }
3545 }
3546 }
3547 else
3548 {
3549 dp = &dis386[*codep];
3550 need_modrm = onebyte_has_modrm[*codep];
3551 uses_DATA_prefix = 0;
3552 uses_REPNZ_prefix = 0;
3553 /* pause is 0xf3 0x90. */
3554 uses_REPZ_prefix = *codep == 0x90;
3555 uses_LOCK_prefix = 0;
3556 codep++;
3557 }
3558
3559 if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ))
3560 {
3561 oappend ("repz ");
3562 used_prefixes |= PREFIX_REPZ;
3563 }
3564 if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ))
3565 {
3566 oappend ("repnz ");
3567 used_prefixes |= PREFIX_REPNZ;
3568 }
3569
3570 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
3571 {
3572 oappend ("lock ");
3573 used_prefixes |= PREFIX_LOCK;
3574 }
3575
3576 if (prefixes & PREFIX_ADDR)
3577 {
3578 sizeflag ^= AFLAG;
3579 if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
3580 {
3581 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3582 oappend ("addr32 ");
3583 else
3584 oappend ("addr16 ");
3585 used_prefixes |= PREFIX_ADDR;
3586 }
3587 }
3588
3589 if (!uses_DATA_prefix && (prefixes & PREFIX_DATA))
3590 {
3591 sizeflag ^= DFLAG;
3592 if (dp->op[2].bytemode == cond_jump_mode
3593 && dp->op[0].bytemode == v_mode
3594 && !intel_syntax)
3595 {
3596 if (sizeflag & DFLAG)
3597 oappend ("data32 ");
3598 else
3599 oappend ("data16 ");
3600 used_prefixes |= PREFIX_DATA;
3601 }
3602 }
3603
3604 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3605 {
3606 dp = &three_byte_table[dp->op[1].bytemode][op];
3607 modrm.mod = (*codep >> 6) & 3;
3608 modrm.reg = (*codep >> 3) & 7;
3609 modrm.rm = *codep & 7;
3610 }
3611 else if (need_modrm)
3612 {
3613 FETCH_DATA (info, codep + 1);
3614 modrm.mod = (*codep >> 6) & 3;
3615 modrm.reg = (*codep >> 3) & 7;
3616 modrm.rm = *codep & 7;
3617 }
3618
3619 if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
3620 {
3621 dofloat (sizeflag);
3622 }
3623 else
3624 {
3625 int index;
3626 if (dp->name == NULL)
3627 {
3628 switch (dp->op[0].bytemode)
3629 {
3630 case USE_GROUPS:
3631 dp = &grps[dp->op[1].bytemode][modrm.reg];
3632 break;
3633
3634 case USE_PREFIX_USER_TABLE:
3635 index = 0;
3636 used_prefixes |= (prefixes & PREFIX_REPZ);
3637 if (prefixes & PREFIX_REPZ)
3638 index = 1;
3639 else
3640 {
3641 /* We should check PREFIX_REPNZ and PREFIX_REPZ
3642 before PREFIX_DATA. */
3643 used_prefixes |= (prefixes & PREFIX_REPNZ);
3644 if (prefixes & PREFIX_REPNZ)
3645 index = 3;
3646 else
3647 {
3648 used_prefixes |= (prefixes & PREFIX_DATA);
3649 if (prefixes & PREFIX_DATA)
3650 index = 2;
3651 }
3652 }
3653 dp = &prefix_user_table[dp->op[1].bytemode][index];
3654 break;
3655
3656 case X86_64_SPECIAL:
3657 index = address_mode == mode_64bit ? 1 : 0;
3658 dp = &x86_64_table[dp->op[1].bytemode][index];
3659 break;
3660
3661 default:
3662 oappend (INTERNAL_DISASSEMBLER_ERROR);
3663 break;
3664 }
3665 }
3666
3667 if (putop (dp->name, sizeflag) == 0)
3668 {
3669 for (i = 0; i < MAX_OPERANDS; ++i)
3670 {
3671 obufp = op_out[i];
3672 op_ad = MAX_OPERANDS - 1 - i;
3673 if (dp->op[i].rtn)
3674 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
3675 }
3676 }
3677 }
3678
3679 /* See if any prefixes were not used. If so, print the first one
3680 separately. If we don't do this, we'll wind up printing an
3681 instruction stream which does not precisely correspond to the
3682 bytes we are disassembling. */
3683 if ((prefixes & ~used_prefixes) != 0)
3684 {
3685 const char *name;
3686
3687 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3688 if (name == NULL)
3689 name = INTERNAL_DISASSEMBLER_ERROR;
3690 (*info->fprintf_func) (info->stream, "%s", name);
3691 return 1;
3692 }
3693 if (rex & ~rex_used)
3694 {
3695 const char *name;
3696 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
3697 if (name == NULL)
3698 name = INTERNAL_DISASSEMBLER_ERROR;
3699 (*info->fprintf_func) (info->stream, "%s ", name);
3700 }
3701
3702 obufp = obuf + strlen (obuf);
3703 for (i = strlen (obuf); i < 6; i++)
3704 oappend (" ");
3705 oappend (" ");
3706 (*info->fprintf_func) (info->stream, "%s", obuf);
3707
3708 /* The enter and bound instructions are printed with operands in the same
3709 order as the intel book; everything else is printed in reverse order. */
3710 if (intel_syntax || two_source_ops)
3711 {
3712 for (i = 0; i < MAX_OPERANDS; ++i)
3713 op_txt[i] = op_out[i];
3714
3715 for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
3716 {
3717 op_ad = op_index[i];
3718 op_index[i] = op_index[MAX_OPERANDS - 1 - i];
3719 op_index[MAX_OPERANDS - 1 - i] = op_ad;
3720 }
3721 }
3722 else
3723 {
3724 for (i = 0; i < MAX_OPERANDS; ++i)
3725 op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
3726 }
3727
3728 needcomma = 0;
3729 for (i = 0; i < MAX_OPERANDS; ++i)
3730 if (*op_txt[i])
3731 {
3732 if (needcomma)
3733 (*info->fprintf_func) (info->stream, ",");
3734 if (op_index[i] != -1 && !op_riprel[i])
3735 (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
3736 else
3737 (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
3738 needcomma = 1;
3739 }
3740
3741 for (i = 0; i < MAX_OPERANDS; i++)
3742 if (op_index[i] != -1 && op_riprel[i])
3743 {
3744 (*info->fprintf_func) (info->stream, " # ");
3745 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
3746 + op_address[op_index[i]]), info);
3747 }
3748 return codep - priv.the_buffer;
3749 }
3750
3751 static const char *float_mem[] = {
3752 /* d8 */
3753 "fadd{s||s|}",
3754 "fmul{s||s|}",
3755 "fcom{s||s|}",
3756 "fcomp{s||s|}",
3757 "fsub{s||s|}",
3758 "fsubr{s||s|}",
3759 "fdiv{s||s|}",
3760 "fdivr{s||s|}",
3761 /* d9 */
3762 "fld{s||s|}",
3763 "(bad)",
3764 "fst{s||s|}",
3765 "fstp{s||s|}",
3766 "fldenvIC",
3767 "fldcw",
3768 "fNstenvIC",
3769 "fNstcw",
3770 /* da */
3771 "fiadd{l||l|}",
3772 "fimul{l||l|}",
3773 "ficom{l||l|}",
3774 "ficomp{l||l|}",
3775 "fisub{l||l|}",
3776 "fisubr{l||l|}",
3777 "fidiv{l||l|}",
3778 "fidivr{l||l|}",
3779 /* db */
3780 "fild{l||l|}",
3781 "fisttp{l||l|}",
3782 "fist{l||l|}",
3783 "fistp{l||l|}",
3784 "(bad)",
3785 "fld{t||t|}",
3786 "(bad)",
3787 "fstp{t||t|}",
3788 /* dc */
3789 "fadd{l||l|}",
3790 "fmul{l||l|}",
3791 "fcom{l||l|}",
3792 "fcomp{l||l|}",
3793 "fsub{l||l|}",
3794 "fsubr{l||l|}",
3795 "fdiv{l||l|}",
3796 "fdivr{l||l|}",
3797 /* dd */
3798 "fld{l||l|}",
3799 "fisttp{ll||ll|}",
3800 "fst{l||l|}",
3801 "fstp{l||l|}",
3802 "frstorIC",
3803 "(bad)",
3804 "fNsaveIC",
3805 "fNstsw",
3806 /* de */
3807 "fiadd",
3808 "fimul",
3809 "ficom",
3810 "ficomp",
3811 "fisub",
3812 "fisubr",
3813 "fidiv",
3814 "fidivr",
3815 /* df */
3816 "fild",
3817 "fisttp",
3818 "fist",
3819 "fistp",
3820 "fbld",
3821 "fild{ll||ll|}",
3822 "fbstp",
3823 "fistp{ll||ll|}",
3824 };
3825
3826 static const unsigned char float_mem_mode[] = {
3827 /* d8 */
3828 d_mode,
3829 d_mode,
3830 d_mode,
3831 d_mode,
3832 d_mode,
3833 d_mode,
3834 d_mode,
3835 d_mode,
3836 /* d9 */
3837 d_mode,
3838 0,
3839 d_mode,
3840 d_mode,
3841 0,
3842 w_mode,
3843 0,
3844 w_mode,
3845 /* da */
3846 d_mode,
3847 d_mode,
3848 d_mode,
3849 d_mode,
3850 d_mode,
3851 d_mode,
3852 d_mode,
3853 d_mode,
3854 /* db */
3855 d_mode,
3856 d_mode,
3857 d_mode,
3858 d_mode,
3859 0,
3860 t_mode,
3861 0,
3862 t_mode,
3863 /* dc */
3864 q_mode,
3865 q_mode,
3866 q_mode,
3867 q_mode,
3868 q_mode,
3869 q_mode,
3870 q_mode,
3871 q_mode,
3872 /* dd */
3873 q_mode,
3874 q_mode,
3875 q_mode,
3876 q_mode,
3877 0,
3878 0,
3879 0,
3880 w_mode,
3881 /* de */
3882 w_mode,
3883 w_mode,
3884 w_mode,
3885 w_mode,
3886 w_mode,
3887 w_mode,
3888 w_mode,
3889 w_mode,
3890 /* df */
3891 w_mode,
3892 w_mode,
3893 w_mode,
3894 w_mode,
3895 t_mode,
3896 q_mode,
3897 t_mode,
3898 q_mode
3899 };
3900
3901 #define ST { OP_ST, 0 }
3902 #define STi { OP_STi, 0 }
3903
3904 #define FGRPd9_2 NULL, { { NULL, 0 } }
3905 #define FGRPd9_4 NULL, { { NULL, 1 } }
3906 #define FGRPd9_5 NULL, { { NULL, 2 } }
3907 #define FGRPd9_6 NULL, { { NULL, 3 } }
3908 #define FGRPd9_7 NULL, { { NULL, 4 } }
3909 #define FGRPda_5 NULL, { { NULL, 5 } }
3910 #define FGRPdb_4 NULL, { { NULL, 6 } }
3911 #define FGRPde_3 NULL, { { NULL, 7 } }
3912 #define FGRPdf_4 NULL, { { NULL, 8 } }
3913
3914 static const struct dis386 float_reg[][8] = {
3915 /* d8 */
3916 {
3917 { "fadd", { ST, STi } },
3918 { "fmul", { ST, STi } },
3919 { "fcom", { STi } },
3920 { "fcomp", { STi } },
3921 { "fsub", { ST, STi } },
3922 { "fsubr", { ST, STi } },
3923 { "fdiv", { ST, STi } },
3924 { "fdivr", { ST, STi } },
3925 },
3926 /* d9 */
3927 {
3928 { "fld", { STi } },
3929 { "fxch", { STi } },
3930 { FGRPd9_2 },
3931 { "(bad)", { XX } },
3932 { FGRPd9_4 },
3933 { FGRPd9_5 },
3934 { FGRPd9_6 },
3935 { FGRPd9_7 },
3936 },
3937 /* da */
3938 {
3939 { "fcmovb", { ST, STi } },
3940 { "fcmove", { ST, STi } },
3941 { "fcmovbe",{ ST, STi } },
3942 { "fcmovu", { ST, STi } },
3943 { "(bad)", { XX } },
3944 { FGRPda_5 },
3945 { "(bad)", { XX } },
3946 { "(bad)", { XX } },
3947 },
3948 /* db */
3949 {
3950 { "fcmovnb",{ ST, STi } },
3951 { "fcmovne",{ ST, STi } },
3952 { "fcmovnbe",{ ST, STi } },
3953 { "fcmovnu",{ ST, STi } },
3954 { FGRPdb_4 },
3955 { "fucomi", { ST, STi } },
3956 { "fcomi", { ST, STi } },
3957 { "(bad)", { XX } },
3958 },
3959 /* dc */
3960 {
3961 { "fadd", { STi, ST } },
3962 { "fmul", { STi, ST } },
3963 { "(bad)", { XX } },
3964 { "(bad)", { XX } },
3965 #if SYSV386_COMPAT
3966 { "fsub", { STi, ST } },
3967 { "fsubr", { STi, ST } },
3968 { "fdiv", { STi, ST } },
3969 { "fdivr", { STi, ST } },
3970 #else
3971 { "fsubr", { STi, ST } },
3972 { "fsub", { STi, ST } },
3973 { "fdivr", { STi, ST } },
3974 { "fdiv", { STi, ST } },
3975 #endif
3976 },
3977 /* dd */
3978 {
3979 { "ffree", { STi } },
3980 { "(bad)", { XX } },
3981 { "fst", { STi } },
3982 { "fstp", { STi } },
3983 { "fucom", { STi } },
3984 { "fucomp", { STi } },
3985 { "(bad)", { XX } },
3986 { "(bad)", { XX } },
3987 },
3988 /* de */
3989 {
3990 { "faddp", { STi, ST } },
3991 { "fmulp", { STi, ST } },
3992 { "(bad)", { XX } },
3993 { FGRPde_3 },
3994 #if SYSV386_COMPAT
3995 { "fsubp", { STi, ST } },
3996 { "fsubrp", { STi, ST } },
3997 { "fdivp", { STi, ST } },
3998 { "fdivrp", { STi, ST } },
3999 #else
4000 { "fsubrp", { STi, ST } },
4001 { "fsubp", { STi, ST } },
4002 { "fdivrp", { STi, ST } },
4003 { "fdivp", { STi, ST } },
4004 #endif
4005 },
4006 /* df */
4007 {
4008 { "ffreep", { STi } },
4009 { "(bad)", { XX } },
4010 { "(bad)", { XX } },
4011 { "(bad)", { XX } },
4012 { FGRPdf_4 },
4013 { "fucomip", { ST, STi } },
4014 { "fcomip", { ST, STi } },
4015 { "(bad)", { XX } },
4016 },
4017 };
4018
4019 static char *fgrps[][8] = {
4020 /* d9_2 0 */
4021 {
4022 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4023 },
4024
4025 /* d9_4 1 */
4026 {
4027 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4028 },
4029
4030 /* d9_5 2 */
4031 {
4032 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4033 },
4034
4035 /* d9_6 3 */
4036 {
4037 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4038 },
4039
4040 /* d9_7 4 */
4041 {
4042 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4043 },
4044
4045 /* da_5 5 */
4046 {
4047 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4048 },
4049
4050 /* db_4 6 */
4051 {
4052 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4053 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4054 },
4055
4056 /* de_3 7 */
4057 {
4058 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4059 },
4060
4061 /* df_4 8 */
4062 {
4063 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4064 },
4065 };
4066
4067 static void
4068 dofloat (int sizeflag)
4069 {
4070 const struct dis386 *dp;
4071 unsigned char floatop;
4072
4073 floatop = codep[-1];
4074
4075 if (modrm.mod != 3)
4076 {
4077 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
4078
4079 putop (float_mem[fp_indx], sizeflag);
4080 obufp = op_out[0];
4081 op_ad = 2;
4082 OP_E (float_mem_mode[fp_indx], sizeflag);
4083 return;
4084 }
4085 /* Skip mod/rm byte. */
4086 MODRM_CHECK;
4087 codep++;
4088
4089 dp = &float_reg[floatop - 0xd8][modrm.reg];
4090 if (dp->name == NULL)
4091 {
4092 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
4093
4094 /* Instruction fnstsw is only one with strange arg. */
4095 if (floatop == 0xdf && codep[-1] == 0xe0)
4096 strcpy (op_out[0], names16[0]);
4097 }
4098 else
4099 {
4100 putop (dp->name, sizeflag);
4101
4102 obufp = op_out[0];
4103 op_ad = 2;
4104 if (dp->op[0].rtn)
4105 (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
4106
4107 obufp = op_out[1];
4108 op_ad = 1;
4109 if (dp->op[1].rtn)
4110 (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
4111 }
4112 }
4113
4114 static void
4115 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4116 {
4117 oappend ("%st" + intel_syntax);
4118 }
4119
4120 static void
4121 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4122 {
4123 sprintf (scratchbuf, "%%st(%d)", modrm.rm);
4124 oappend (scratchbuf + intel_syntax);
4125 }
4126
4127 /* Capital letters in template are macros. */
4128 static int
4129 putop (const char *template, int sizeflag)
4130 {
4131 const char *p;
4132 int alt = 0;
4133
4134 for (p = template; *p; p++)
4135 {
4136 switch (*p)
4137 {
4138 default:
4139 *obufp++ = *p;
4140 break;
4141 case '{':
4142 alt = 0;
4143 if (intel_syntax)
4144 alt += 1;
4145 if (address_mode == mode_64bit)
4146 alt += 2;
4147 while (alt != 0)
4148 {
4149 while (*++p != '|')
4150 {
4151 if (*p == '}')
4152 {
4153 /* Alternative not valid. */
4154 strcpy (obuf, "(bad)");
4155 obufp = obuf + 5;
4156 return 1;
4157 }
4158 else if (*p == '\0')
4159 abort ();
4160 }
4161 alt--;
4162 }
4163 /* Fall through. */
4164 case 'I':
4165 alt = 1;
4166 continue;
4167 case '|':
4168 while (*++p != '}')
4169 {
4170 if (*p == '\0')
4171 abort ();
4172 }
4173 break;
4174 case '}':
4175 break;
4176 case 'A':
4177 if (intel_syntax)
4178 break;
4179 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4180 *obufp++ = 'b';
4181 break;
4182 case 'B':
4183 if (intel_syntax)
4184 break;
4185 if (sizeflag & SUFFIX_ALWAYS)
4186 *obufp++ = 'b';
4187 break;
4188 case 'C':
4189 if (intel_syntax && !alt)
4190 break;
4191 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
4192 {
4193 if (sizeflag & DFLAG)
4194 *obufp++ = intel_syntax ? 'd' : 'l';
4195 else
4196 *obufp++ = intel_syntax ? 'w' : 's';
4197 used_prefixes |= (prefixes & PREFIX_DATA);
4198 }
4199 break;
4200 case 'D':
4201 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
4202 break;
4203 USED_REX (REX_W);
4204 if (modrm.mod == 3)
4205 {
4206 if (rex & REX_W)
4207 *obufp++ = 'q';
4208 else if (sizeflag & DFLAG)
4209 *obufp++ = intel_syntax ? 'd' : 'l';
4210 else
4211 *obufp++ = 'w';
4212 used_prefixes |= (prefixes & PREFIX_DATA);
4213 }
4214 else
4215 *obufp++ = 'w';
4216 break;
4217 case 'E': /* For jcxz/jecxz */
4218 if (address_mode == mode_64bit)
4219 {
4220 if (sizeflag & AFLAG)
4221 *obufp++ = 'r';
4222 else
4223 *obufp++ = 'e';
4224 }
4225 else
4226 if (sizeflag & AFLAG)
4227 *obufp++ = 'e';
4228 used_prefixes |= (prefixes & PREFIX_ADDR);
4229 break;
4230 case 'F':
4231 if (intel_syntax)
4232 break;
4233 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
4234 {
4235 if (sizeflag & AFLAG)
4236 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
4237 else
4238 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
4239 used_prefixes |= (prefixes & PREFIX_ADDR);
4240 }
4241 break;
4242 case 'G':
4243 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
4244 break;
4245 if ((rex & REX_W) || (sizeflag & DFLAG))
4246 *obufp++ = 'l';
4247 else
4248 *obufp++ = 'w';
4249 if (!(rex & REX_W))
4250 used_prefixes |= (prefixes & PREFIX_DATA);
4251 break;
4252 case 'H':
4253 if (intel_syntax)
4254 break;
4255 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
4256 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
4257 {
4258 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
4259 *obufp++ = ',';
4260 *obufp++ = 'p';
4261 if (prefixes & PREFIX_DS)
4262 *obufp++ = 't';
4263 else
4264 *obufp++ = 'n';
4265 }
4266 break;
4267 case 'J':
4268 if (intel_syntax)
4269 break;
4270 *obufp++ = 'l';
4271 break;
4272 case 'K':
4273 USED_REX (REX_W);
4274 if (rex & REX_W)
4275 *obufp++ = 'q';
4276 else
4277 *obufp++ = 'd';
4278 break;
4279 case 'Z':
4280 if (intel_syntax)
4281 break;
4282 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
4283 {
4284 *obufp++ = 'q';
4285 break;
4286 }
4287 /* Fall through. */
4288 case 'L':
4289 if (intel_syntax)
4290 break;
4291 if (sizeflag & SUFFIX_ALWAYS)
4292 *obufp++ = 'l';
4293 break;
4294 case 'N':
4295 if ((prefixes & PREFIX_FWAIT) == 0)
4296 *obufp++ = 'n';
4297 else
4298 used_prefixes |= PREFIX_FWAIT;
4299 break;
4300 case 'O':
4301 USED_REX (REX_W);
4302 if (rex & REX_W)
4303 *obufp++ = 'o';
4304 else if (intel_syntax && (sizeflag & DFLAG))
4305 *obufp++ = 'q';
4306 else
4307 *obufp++ = 'd';
4308 if (!(rex & REX_W))
4309 used_prefixes |= (prefixes & PREFIX_DATA);
4310 break;
4311 case 'T':
4312 if (intel_syntax)
4313 break;
4314 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4315 {
4316 *obufp++ = 'q';
4317 break;
4318 }
4319 /* Fall through. */
4320 case 'P':
4321 if (intel_syntax)
4322 break;
4323 if ((prefixes & PREFIX_DATA)
4324 || (rex & REX_W)
4325 || (sizeflag & SUFFIX_ALWAYS))
4326 {
4327 USED_REX (REX_W);
4328 if (rex & REX_W)
4329 *obufp++ = 'q';
4330 else
4331 {
4332 if (sizeflag & DFLAG)
4333 *obufp++ = 'l';
4334 else
4335 *obufp++ = 'w';
4336 }
4337 used_prefixes |= (prefixes & PREFIX_DATA);
4338 }
4339 break;
4340 case 'U':
4341 if (intel_syntax)
4342 break;
4343 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4344 {
4345 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4346 *obufp++ = 'q';
4347 break;
4348 }
4349 /* Fall through. */
4350 case 'Q':
4351 if (intel_syntax && !alt)
4352 break;
4353 USED_REX (REX_W);
4354 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4355 {
4356 if (rex & REX_W)
4357 *obufp++ = 'q';
4358 else
4359 {
4360 if (sizeflag & DFLAG)
4361 *obufp++ = intel_syntax ? 'd' : 'l';
4362 else
4363 *obufp++ = 'w';
4364 }
4365 used_prefixes |= (prefixes & PREFIX_DATA);
4366 }
4367 break;
4368 case 'R':
4369 USED_REX (REX_W);
4370 if (rex & REX_W)
4371 *obufp++ = 'q';
4372 else if (sizeflag & DFLAG)
4373 {
4374 if (intel_syntax)
4375 *obufp++ = 'd';
4376 else
4377 *obufp++ = 'l';
4378 }
4379 else
4380 *obufp++ = 'w';
4381 if (intel_syntax && !p[1]
4382 && ((rex & REX_W) || (sizeflag & DFLAG)))
4383 *obufp++ = 'e';
4384 if (!(rex & REX_W))
4385 used_prefixes |= (prefixes & PREFIX_DATA);
4386 break;
4387 case 'V':
4388 if (intel_syntax)
4389 break;
4390 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4391 {
4392 if (sizeflag & SUFFIX_ALWAYS)
4393 *obufp++ = 'q';
4394 break;
4395 }
4396 /* Fall through. */
4397 case 'S':
4398 if (intel_syntax)
4399 break;
4400 if (sizeflag & SUFFIX_ALWAYS)
4401 {
4402 if (rex & REX_W)
4403 *obufp++ = 'q';
4404 else
4405 {
4406 if (sizeflag & DFLAG)
4407 *obufp++ = 'l';
4408 else
4409 *obufp++ = 'w';
4410 used_prefixes |= (prefixes & PREFIX_DATA);
4411 }
4412 }
4413 break;
4414 case 'X':
4415 if (prefixes & PREFIX_DATA)
4416 *obufp++ = 'd';
4417 else
4418 *obufp++ = 's';
4419 used_prefixes |= (prefixes & PREFIX_DATA);
4420 break;
4421 case 'Y':
4422 if (intel_syntax)
4423 break;
4424 if (rex & REX_W)
4425 {
4426 USED_REX (REX_W);
4427 *obufp++ = 'q';
4428 }
4429 break;
4430 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4431 case 'W':
4432 /* operand size flag for cwtl, cbtw */
4433 USED_REX (REX_W);
4434 if (rex & REX_W)
4435 {
4436 if (intel_syntax)
4437 *obufp++ = 'd';
4438 else
4439 *obufp++ = 'l';
4440 }
4441 else if (sizeflag & DFLAG)
4442 *obufp++ = 'w';
4443 else
4444 *obufp++ = 'b';
4445 if (!(rex & REX_W))
4446 used_prefixes |= (prefixes & PREFIX_DATA);
4447 break;
4448 }
4449 alt = 0;
4450 }
4451 *obufp = 0;
4452 return 0;
4453 }
4454
4455 static void
4456 oappend (const char *s)
4457 {
4458 strcpy (obufp, s);
4459 obufp += strlen (s);
4460 }
4461
4462 static void
4463 append_seg (void)
4464 {
4465 if (prefixes & PREFIX_CS)
4466 {
4467 used_prefixes |= PREFIX_CS;
4468 oappend ("%cs:" + intel_syntax);
4469 }
4470 if (prefixes & PREFIX_DS)
4471 {
4472 used_prefixes |= PREFIX_DS;
4473 oappend ("%ds:" + intel_syntax);
4474 }
4475 if (prefixes & PREFIX_SS)
4476 {
4477 used_prefixes |= PREFIX_SS;
4478 oappend ("%ss:" + intel_syntax);
4479 }
4480 if (prefixes & PREFIX_ES)
4481 {
4482 used_prefixes |= PREFIX_ES;
4483 oappend ("%es:" + intel_syntax);
4484 }
4485 if (prefixes & PREFIX_FS)
4486 {
4487 used_prefixes |= PREFIX_FS;
4488 oappend ("%fs:" + intel_syntax);
4489 }
4490 if (prefixes & PREFIX_GS)
4491 {
4492 used_prefixes |= PREFIX_GS;
4493 oappend ("%gs:" + intel_syntax);
4494 }
4495 }
4496
4497 static void
4498 OP_indirE (int bytemode, int sizeflag)
4499 {
4500 if (!intel_syntax)
4501 oappend ("*");
4502 OP_E (bytemode, sizeflag);
4503 }
4504
4505 static void
4506 print_operand_value (char *buf, int hex, bfd_vma disp)
4507 {
4508 if (address_mode == mode_64bit)
4509 {
4510 if (hex)
4511 {
4512 char tmp[30];
4513 int i;
4514 buf[0] = '0';
4515 buf[1] = 'x';
4516 sprintf_vma (tmp, disp);
4517 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
4518 strcpy (buf + 2, tmp + i);
4519 }
4520 else
4521 {
4522 bfd_signed_vma v = disp;
4523 char tmp[30];
4524 int i;
4525 if (v < 0)
4526 {
4527 *(buf++) = '-';
4528 v = -disp;
4529 /* Check for possible overflow on 0x8000000000000000. */
4530 if (v < 0)
4531 {
4532 strcpy (buf, "9223372036854775808");
4533 return;
4534 }
4535 }
4536 if (!v)
4537 {
4538 strcpy (buf, "0");
4539 return;
4540 }
4541
4542 i = 0;
4543 tmp[29] = 0;
4544 while (v)
4545 {
4546 tmp[28 - i] = (v % 10) + '0';
4547 v /= 10;
4548 i++;
4549 }
4550 strcpy (buf, tmp + 29 - i);
4551 }
4552 }
4553 else
4554 {
4555 if (hex)
4556 sprintf (buf, "0x%x", (unsigned int) disp);
4557 else
4558 sprintf (buf, "%d", (int) disp);
4559 }
4560 }
4561
4562 static void
4563 intel_operand_size (int bytemode, int sizeflag)
4564 {
4565 switch (bytemode)
4566 {
4567 case b_mode:
4568 case dqb_mode:
4569 oappend ("BYTE PTR ");
4570 break;
4571 case w_mode:
4572 case dqw_mode:
4573 oappend ("WORD PTR ");
4574 break;
4575 case stack_v_mode:
4576 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4577 {
4578 oappend ("QWORD PTR ");
4579 used_prefixes |= (prefixes & PREFIX_DATA);
4580 break;
4581 }
4582 /* FALLTHRU */
4583 case v_mode:
4584 case dq_mode:
4585 USED_REX (REX_W);
4586 if (rex & REX_W)
4587 oappend ("QWORD PTR ");
4588 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
4589 oappend ("DWORD PTR ");
4590 else
4591 oappend ("WORD PTR ");
4592 used_prefixes |= (prefixes & PREFIX_DATA);
4593 break;
4594 case z_mode:
4595 if ((rex & REX_W) || (sizeflag & DFLAG))
4596 *obufp++ = 'D';
4597 oappend ("WORD PTR ");
4598 if (!(rex & REX_W))
4599 used_prefixes |= (prefixes & PREFIX_DATA);
4600 break;
4601 case d_mode:
4602 case dqd_mode:
4603 oappend ("DWORD PTR ");
4604 break;
4605 case q_mode:
4606 oappend ("QWORD PTR ");
4607 break;
4608 case m_mode:
4609 if (address_mode == mode_64bit)
4610 oappend ("QWORD PTR ");
4611 else
4612 oappend ("DWORD PTR ");
4613 break;
4614 case f_mode:
4615 if (sizeflag & DFLAG)
4616 oappend ("FWORD PTR ");
4617 else
4618 oappend ("DWORD PTR ");
4619 used_prefixes |= (prefixes & PREFIX_DATA);
4620 break;
4621 case t_mode:
4622 oappend ("TBYTE PTR ");
4623 break;
4624 case x_mode:
4625 oappend ("XMMWORD PTR ");
4626 break;
4627 case o_mode:
4628 oappend ("OWORD PTR ");
4629 break;
4630 default:
4631 break;
4632 }
4633 }
4634
4635 static void
4636 OP_E (int bytemode, int sizeflag)
4637 {
4638 bfd_vma disp;
4639 int add = 0;
4640 int riprel = 0;
4641 USED_REX (REX_B);
4642 if (rex & REX_B)
4643 add += 8;
4644
4645 /* Skip mod/rm byte. */
4646 MODRM_CHECK;
4647 codep++;
4648
4649 if (modrm.mod == 3)
4650 {
4651 switch (bytemode)
4652 {
4653 case b_mode:
4654 USED_REX (0);
4655 if (rex)
4656 oappend (names8rex[modrm.rm + add]);
4657 else
4658 oappend (names8[modrm.rm + add]);
4659 break;
4660 case w_mode:
4661 oappend (names16[modrm.rm + add]);
4662 break;
4663 case d_mode:
4664 oappend (names32[modrm.rm + add]);
4665 break;
4666 case q_mode:
4667 oappend (names64[modrm.rm + add]);
4668 break;
4669 case m_mode:
4670 if (address_mode == mode_64bit)
4671 oappend (names64[modrm.rm + add]);
4672 else
4673 oappend (names32[modrm.rm + add]);
4674 break;
4675 case stack_v_mode:
4676 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4677 {
4678 oappend (names64[modrm.rm + add]);
4679 used_prefixes |= (prefixes & PREFIX_DATA);
4680 break;
4681 }
4682 bytemode = v_mode;
4683 /* FALLTHRU */
4684 case v_mode:
4685 case dq_mode:
4686 case dqb_mode:
4687 case dqd_mode:
4688 case dqw_mode:
4689 USED_REX (REX_W);
4690 if (rex & REX_W)
4691 oappend (names64[modrm.rm + add]);
4692 else if ((sizeflag & DFLAG) || bytemode != v_mode)
4693 oappend (names32[modrm.rm + add]);
4694 else
4695 oappend (names16[modrm.rm + add]);
4696 used_prefixes |= (prefixes & PREFIX_DATA);
4697 break;
4698 case 0:
4699 break;
4700 default:
4701 oappend (INTERNAL_DISASSEMBLER_ERROR);
4702 break;
4703 }
4704 return;
4705 }
4706
4707 disp = 0;
4708 if (intel_syntax)
4709 intel_operand_size (bytemode, sizeflag);
4710 append_seg ();
4711
4712 if ((sizeflag & AFLAG) || address_mode == mode_64bit) /* 32 bit address mode */
4713 {
4714 int havesib;
4715 int havebase;
4716 int base;
4717 int index = 0;
4718 int scale = 0;
4719
4720 havesib = 0;
4721 havebase = 1;
4722 base = modrm.rm;
4723
4724 if (base == 4)
4725 {
4726 havesib = 1;
4727 FETCH_DATA (the_info, codep + 1);
4728 index = (*codep >> 3) & 7;
4729 if (address_mode == mode_64bit || index != 0x4)
4730 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
4731 scale = (*codep >> 6) & 3;
4732 base = *codep & 7;
4733 USED_REX (REX_X);
4734 if (rex & REX_X)
4735 index += 8;
4736 codep++;
4737 }
4738 base += add;
4739
4740 switch (modrm.mod)
4741 {
4742 case 0:
4743 if ((base & 7) == 5)
4744 {
4745 havebase = 0;
4746 if (address_mode == mode_64bit && !havesib)
4747 riprel = 1;
4748 disp = get32s ();
4749 }
4750 break;
4751 case 1:
4752 FETCH_DATA (the_info, codep + 1);
4753 disp = *codep++;
4754 if ((disp & 0x80) != 0)
4755 disp -= 0x100;
4756 break;
4757 case 2:
4758 disp = get32s ();
4759 break;
4760 }
4761
4762 if (!intel_syntax)
4763 if (modrm.mod != 0 || (base & 7) == 5)
4764 {
4765 print_operand_value (scratchbuf, !riprel, disp);
4766 oappend (scratchbuf);
4767 if (riprel)
4768 {
4769 set_op (disp, 1);
4770 oappend ("(%rip)");
4771 }
4772 }
4773
4774 if (havebase || (havesib && (index != 4 || scale != 0)))
4775 {
4776 *obufp++ = open_char;
4777 if (intel_syntax && riprel)
4778 oappend ("rip + ");
4779 *obufp = '\0';
4780 if (havebase)
4781 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
4782 ? names64[base] : names32[base]);
4783 if (havesib)
4784 {
4785 if (index != 4)
4786 {
4787 if (!intel_syntax || havebase)
4788 {
4789 *obufp++ = separator_char;
4790 *obufp = '\0';
4791 }
4792 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
4793 ? names64[index] : names32[index]);
4794 }
4795 if (scale != 0 || (!intel_syntax && index != 4))
4796 {
4797 *obufp++ = scale_char;
4798 *obufp = '\0';
4799 sprintf (scratchbuf, "%d", 1 << scale);
4800 oappend (scratchbuf);
4801 }
4802 }
4803 if (intel_syntax && disp)
4804 {
4805 if ((bfd_signed_vma) disp > 0)
4806 {
4807 *obufp++ = '+';
4808 *obufp = '\0';
4809 }
4810 else if (modrm.mod != 1)
4811 {
4812 *obufp++ = '-';
4813 *obufp = '\0';
4814 disp = - (bfd_signed_vma) disp;
4815 }
4816
4817 print_operand_value (scratchbuf, modrm.mod != 1, disp);
4818 oappend (scratchbuf);
4819 }
4820
4821 *obufp++ = close_char;
4822 *obufp = '\0';
4823 }
4824 else if (intel_syntax)
4825 {
4826 if (modrm.mod != 0 || (base & 7) == 5)
4827 {
4828 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4829 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
4830 ;
4831 else
4832 {
4833 oappend (names_seg[ds_reg - es_reg]);
4834 oappend (":");
4835 }
4836 print_operand_value (scratchbuf, 1, disp);
4837 oappend (scratchbuf);
4838 }
4839 }
4840 }
4841 else
4842 { /* 16 bit address mode */
4843 switch (modrm.mod)
4844 {
4845 case 0:
4846 if (modrm.rm == 6)
4847 {
4848 disp = get16 ();
4849 if ((disp & 0x8000) != 0)
4850 disp -= 0x10000;
4851 }
4852 break;
4853 case 1:
4854 FETCH_DATA (the_info, codep + 1);
4855 disp = *codep++;
4856 if ((disp & 0x80) != 0)
4857 disp -= 0x100;
4858 break;
4859 case 2:
4860 disp = get16 ();
4861 if ((disp & 0x8000) != 0)
4862 disp -= 0x10000;
4863 break;
4864 }
4865
4866 if (!intel_syntax)
4867 if (modrm.mod != 0 || modrm.rm == 6)
4868 {
4869 print_operand_value (scratchbuf, 0, disp);
4870 oappend (scratchbuf);
4871 }
4872
4873 if (modrm.mod != 0 || modrm.rm != 6)
4874 {
4875 *obufp++ = open_char;
4876 *obufp = '\0';
4877 oappend (index16[modrm.rm]);
4878 if (intel_syntax && disp)
4879 {
4880 if ((bfd_signed_vma) disp > 0)
4881 {
4882 *obufp++ = '+';
4883 *obufp = '\0';
4884 }
4885 else if (modrm.mod != 1)
4886 {
4887 *obufp++ = '-';
4888 *obufp = '\0';
4889 disp = - (bfd_signed_vma) disp;
4890 }
4891
4892 print_operand_value (scratchbuf, modrm.mod != 1, disp);
4893 oappend (scratchbuf);
4894 }
4895
4896 *obufp++ = close_char;
4897 *obufp = '\0';
4898 }
4899 else if (intel_syntax)
4900 {
4901 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4902 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
4903 ;
4904 else
4905 {
4906 oappend (names_seg[ds_reg - es_reg]);
4907 oappend (":");
4908 }
4909 print_operand_value (scratchbuf, 1, disp & 0xffff);
4910 oappend (scratchbuf);
4911 }
4912 }
4913 }
4914
4915 static void
4916 OP_G (int bytemode, int sizeflag)
4917 {
4918 int add = 0;
4919 USED_REX (REX_R);
4920 if (rex & REX_R)
4921 add += 8;
4922 switch (bytemode)
4923 {
4924 case b_mode:
4925 USED_REX (0);
4926 if (rex)
4927 oappend (names8rex[modrm.reg + add]);
4928 else
4929 oappend (names8[modrm.reg + add]);
4930 break;
4931 case w_mode:
4932 oappend (names16[modrm.reg + add]);
4933 break;
4934 case d_mode:
4935 oappend (names32[modrm.reg + add]);
4936 break;
4937 case q_mode:
4938 oappend (names64[modrm.reg + add]);
4939 break;
4940 case v_mode:
4941 case dq_mode:
4942 case dqb_mode:
4943 case dqd_mode:
4944 case dqw_mode:
4945 USED_REX (REX_W);
4946 if (rex & REX_W)
4947 oappend (names64[modrm.reg + add]);
4948 else if ((sizeflag & DFLAG) || bytemode != v_mode)
4949 oappend (names32[modrm.reg + add]);
4950 else
4951 oappend (names16[modrm.reg + add]);
4952 used_prefixes |= (prefixes & PREFIX_DATA);
4953 break;
4954 case m_mode:
4955 if (address_mode == mode_64bit)
4956 oappend (names64[modrm.reg + add]);
4957 else
4958 oappend (names32[modrm.reg + add]);
4959 break;
4960 default:
4961 oappend (INTERNAL_DISASSEMBLER_ERROR);
4962 break;
4963 }
4964 }
4965
4966 static bfd_vma
4967 get64 (void)
4968 {
4969 bfd_vma x;
4970 #ifdef BFD64
4971 unsigned int a;
4972 unsigned int b;
4973
4974 FETCH_DATA (the_info, codep + 8);
4975 a = *codep++ & 0xff;
4976 a |= (*codep++ & 0xff) << 8;
4977 a |= (*codep++ & 0xff) << 16;
4978 a |= (*codep++ & 0xff) << 24;
4979 b = *codep++ & 0xff;
4980 b |= (*codep++ & 0xff) << 8;
4981 b |= (*codep++ & 0xff) << 16;
4982 b |= (*codep++ & 0xff) << 24;
4983 x = a + ((bfd_vma) b << 32);
4984 #else
4985 abort ();
4986 x = 0;
4987 #endif
4988 return x;
4989 }
4990
4991 static bfd_signed_vma
4992 get32 (void)
4993 {
4994 bfd_signed_vma x = 0;
4995
4996 FETCH_DATA (the_info, codep + 4);
4997 x = *codep++ & (bfd_signed_vma) 0xff;
4998 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4999 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5000 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5001 return x;
5002 }
5003
5004 static bfd_signed_vma
5005 get32s (void)
5006 {
5007 bfd_signed_vma x = 0;
5008
5009 FETCH_DATA (the_info, codep + 4);
5010 x = *codep++ & (bfd_signed_vma) 0xff;
5011 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5012 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5013 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5014
5015 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
5016
5017 return x;
5018 }
5019
5020 static int
5021 get16 (void)
5022 {
5023 int x = 0;
5024
5025 FETCH_DATA (the_info, codep + 2);
5026 x = *codep++ & 0xff;
5027 x |= (*codep++ & 0xff) << 8;
5028 return x;
5029 }
5030
5031 static void
5032 set_op (bfd_vma op, int riprel)
5033 {
5034 op_index[op_ad] = op_ad;
5035 if (address_mode == mode_64bit)
5036 {
5037 op_address[op_ad] = op;
5038 op_riprel[op_ad] = riprel;
5039 }
5040 else
5041 {
5042 /* Mask to get a 32-bit address. */
5043 op_address[op_ad] = op & 0xffffffff;
5044 op_riprel[op_ad] = riprel & 0xffffffff;
5045 }
5046 }
5047
5048 static void
5049 OP_REG (int code, int sizeflag)
5050 {
5051 const char *s;
5052 int add = 0;
5053 USED_REX (REX_B);
5054 if (rex & REX_B)
5055 add = 8;
5056
5057 switch (code)
5058 {
5059 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5060 case sp_reg: case bp_reg: case si_reg: case di_reg:
5061 s = names16[code - ax_reg + add];
5062 break;
5063 case es_reg: case ss_reg: case cs_reg:
5064 case ds_reg: case fs_reg: case gs_reg:
5065 s = names_seg[code - es_reg + add];
5066 break;
5067 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5068 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5069 USED_REX (0);
5070 if (rex)
5071 s = names8rex[code - al_reg + add];
5072 else
5073 s = names8[code - al_reg];
5074 break;
5075 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
5076 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
5077 if (address_mode == mode_64bit && (sizeflag & DFLAG))
5078 {
5079 s = names64[code - rAX_reg + add];
5080 break;
5081 }
5082 code += eAX_reg - rAX_reg;
5083 /* Fall through. */
5084 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5085 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5086 USED_REX (REX_W);
5087 if (rex & REX_W)
5088 s = names64[code - eAX_reg + add];
5089 else if (sizeflag & DFLAG)
5090 s = names32[code - eAX_reg + add];
5091 else
5092 s = names16[code - eAX_reg + add];
5093 used_prefixes |= (prefixes & PREFIX_DATA);
5094 break;
5095 default:
5096 s = INTERNAL_DISASSEMBLER_ERROR;
5097 break;
5098 }
5099 oappend (s);
5100 }
5101
5102 static void
5103 OP_IMREG (int code, int sizeflag)
5104 {
5105 const char *s;
5106
5107 switch (code)
5108 {
5109 case indir_dx_reg:
5110 if (intel_syntax)
5111 s = "dx";
5112 else
5113 s = "(%dx)";
5114 break;
5115 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5116 case sp_reg: case bp_reg: case si_reg: case di_reg:
5117 s = names16[code - ax_reg];
5118 break;
5119 case es_reg: case ss_reg: case cs_reg:
5120 case ds_reg: case fs_reg: case gs_reg:
5121 s = names_seg[code - es_reg];
5122 break;
5123 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5124 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5125 USED_REX (0);
5126 if (rex)
5127 s = names8rex[code - al_reg];
5128 else
5129 s = names8[code - al_reg];
5130 break;
5131 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5132 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5133 USED_REX (REX_W);
5134 if (rex & REX_W)
5135 s = names64[code - eAX_reg];
5136 else if (sizeflag & DFLAG)
5137 s = names32[code - eAX_reg];
5138 else
5139 s = names16[code - eAX_reg];
5140 used_prefixes |= (prefixes & PREFIX_DATA);
5141 break;
5142 case z_mode_ax_reg:
5143 if ((rex & REX_W) || (sizeflag & DFLAG))
5144 s = *names32;
5145 else
5146 s = *names16;
5147 if (!(rex & REX_W))
5148 used_prefixes |= (prefixes & PREFIX_DATA);
5149 break;
5150 default:
5151 s = INTERNAL_DISASSEMBLER_ERROR;
5152 break;
5153 }
5154 oappend (s);
5155 }
5156
5157 static void
5158 OP_I (int bytemode, int sizeflag)
5159 {
5160 bfd_signed_vma op;
5161 bfd_signed_vma mask = -1;
5162
5163 switch (bytemode)
5164 {
5165 case b_mode:
5166 FETCH_DATA (the_info, codep + 1);
5167 op = *codep++;
5168 mask = 0xff;
5169 break;
5170 case q_mode:
5171 if (address_mode == mode_64bit)
5172 {
5173 op = get32s ();
5174 break;
5175 }
5176 /* Fall through. */
5177 case v_mode:
5178 USED_REX (REX_W);
5179 if (rex & REX_W)
5180 op = get32s ();
5181 else if (sizeflag & DFLAG)
5182 {
5183 op = get32 ();
5184 mask = 0xffffffff;
5185 }
5186 else
5187 {
5188 op = get16 ();
5189 mask = 0xfffff;
5190 }
5191 used_prefixes |= (prefixes & PREFIX_DATA);
5192 break;
5193 case w_mode:
5194 mask = 0xfffff;
5195 op = get16 ();
5196 break;
5197 case const_1_mode:
5198 if (intel_syntax)
5199 oappend ("1");
5200 return;
5201 default:
5202 oappend (INTERNAL_DISASSEMBLER_ERROR);
5203 return;
5204 }
5205
5206 op &= mask;
5207 scratchbuf[0] = '$';
5208 print_operand_value (scratchbuf + 1, 1, op);
5209 oappend (scratchbuf + intel_syntax);
5210 scratchbuf[0] = '\0';
5211 }
5212
5213 static void
5214 OP_I64 (int bytemode, int sizeflag)
5215 {
5216 bfd_signed_vma op;
5217 bfd_signed_vma mask = -1;
5218
5219 if (address_mode != mode_64bit)
5220 {
5221 OP_I (bytemode, sizeflag);
5222 return;
5223 }
5224
5225 switch (bytemode)
5226 {
5227 case b_mode:
5228 FETCH_DATA (the_info, codep + 1);
5229 op = *codep++;
5230 mask = 0xff;
5231 break;
5232 case v_mode:
5233 USED_REX (REX_W);
5234 if (rex & REX_W)
5235 op = get64 ();
5236 else if (sizeflag & DFLAG)
5237 {
5238 op = get32 ();
5239 mask = 0xffffffff;
5240 }
5241 else
5242 {
5243 op = get16 ();
5244 mask = 0xfffff;
5245 }
5246 used_prefixes |= (prefixes & PREFIX_DATA);
5247 break;
5248 case w_mode:
5249 mask = 0xfffff;
5250 op = get16 ();
5251 break;
5252 default:
5253 oappend (INTERNAL_DISASSEMBLER_ERROR);
5254 return;
5255 }
5256
5257 op &= mask;
5258 scratchbuf[0] = '$';
5259 print_operand_value (scratchbuf + 1, 1, op);
5260 oappend (scratchbuf + intel_syntax);
5261 scratchbuf[0] = '\0';
5262 }
5263
5264 static void
5265 OP_sI (int bytemode, int sizeflag)
5266 {
5267 bfd_signed_vma op;
5268 bfd_signed_vma mask = -1;
5269
5270 switch (bytemode)
5271 {
5272 case b_mode:
5273 FETCH_DATA (the_info, codep + 1);
5274 op = *codep++;
5275 if ((op & 0x80) != 0)
5276 op -= 0x100;
5277 mask = 0xffffffff;
5278 break;
5279 case v_mode:
5280 USED_REX (REX_W);
5281 if (rex & REX_W)
5282 op = get32s ();
5283 else if (sizeflag & DFLAG)
5284 {
5285 op = get32s ();
5286 mask = 0xffffffff;
5287 }
5288 else
5289 {
5290 mask = 0xffffffff;
5291 op = get16 ();
5292 if ((op & 0x8000) != 0)
5293 op -= 0x10000;
5294 }
5295 used_prefixes |= (prefixes & PREFIX_DATA);
5296 break;
5297 case w_mode:
5298 op = get16 ();
5299 mask = 0xffffffff;
5300 if ((op & 0x8000) != 0)
5301 op -= 0x10000;
5302 break;
5303 default:
5304 oappend (INTERNAL_DISASSEMBLER_ERROR);
5305 return;
5306 }
5307
5308 scratchbuf[0] = '$';
5309 print_operand_value (scratchbuf + 1, 1, op);
5310 oappend (scratchbuf + intel_syntax);
5311 }
5312
5313 static void
5314 OP_J (int bytemode, int sizeflag)
5315 {
5316 bfd_vma disp;
5317 bfd_vma mask = -1;
5318 bfd_vma segment = 0;
5319
5320 switch (bytemode)
5321 {
5322 case b_mode:
5323 FETCH_DATA (the_info, codep + 1);
5324 disp = *codep++;
5325 if ((disp & 0x80) != 0)
5326 disp -= 0x100;
5327 break;
5328 case v_mode:
5329 if ((sizeflag & DFLAG) || (rex & REX_W))
5330 disp = get32s ();
5331 else
5332 {
5333 disp = get16 ();
5334 if ((disp & 0x8000) != 0)
5335 disp -= 0x10000;
5336 /* In 16bit mode, address is wrapped around at 64k within
5337 the same segment. Otherwise, a data16 prefix on a jump
5338 instruction means that the pc is masked to 16 bits after
5339 the displacement is added! */
5340 mask = 0xffff;
5341 if ((prefixes & PREFIX_DATA) == 0)
5342 segment = ((start_pc + codep - start_codep)
5343 & ~((bfd_vma) 0xffff));
5344 }
5345 used_prefixes |= (prefixes & PREFIX_DATA);
5346 break;
5347 default:
5348 oappend (INTERNAL_DISASSEMBLER_ERROR);
5349 return;
5350 }
5351 disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
5352 set_op (disp, 0);
5353 print_operand_value (scratchbuf, 1, disp);
5354 oappend (scratchbuf);
5355 }
5356
5357 static void
5358 OP_SEG (int bytemode, int sizeflag)
5359 {
5360 if (bytemode == w_mode)
5361 oappend (names_seg[modrm.reg]);
5362 else
5363 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
5364 }
5365
5366 static void
5367 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
5368 {
5369 int seg, offset;
5370
5371 if (sizeflag & DFLAG)
5372 {
5373 offset = get32 ();
5374 seg = get16 ();
5375 }
5376 else
5377 {
5378 offset = get16 ();
5379 seg = get16 ();
5380 }
5381 used_prefixes |= (prefixes & PREFIX_DATA);
5382 if (intel_syntax)
5383 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
5384 else
5385 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
5386 oappend (scratchbuf);
5387 }
5388
5389 static void
5390 OP_OFF (int bytemode, int sizeflag)
5391 {
5392 bfd_vma off;
5393
5394 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5395 intel_operand_size (bytemode, sizeflag);
5396 append_seg ();
5397
5398 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5399 off = get32 ();
5400 else
5401 off = get16 ();
5402
5403 if (intel_syntax)
5404 {
5405 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5406 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5407 {
5408 oappend (names_seg[ds_reg - es_reg]);
5409 oappend (":");
5410 }
5411 }
5412 print_operand_value (scratchbuf, 1, off);
5413 oappend (scratchbuf);
5414 }
5415
5416 static void
5417 OP_OFF64 (int bytemode, int sizeflag)
5418 {
5419 bfd_vma off;
5420
5421 if (address_mode != mode_64bit
5422 || (prefixes & PREFIX_ADDR))
5423 {
5424 OP_OFF (bytemode, sizeflag);
5425 return;
5426 }
5427
5428 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5429 intel_operand_size (bytemode, sizeflag);
5430 append_seg ();
5431
5432 off = get64 ();
5433
5434 if (intel_syntax)
5435 {
5436 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5437 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5438 {
5439 oappend (names_seg[ds_reg - es_reg]);
5440 oappend (":");
5441 }
5442 }
5443 print_operand_value (scratchbuf, 1, off);
5444 oappend (scratchbuf);
5445 }
5446
5447 static void
5448 ptr_reg (int code, int sizeflag)
5449 {
5450 const char *s;
5451
5452 *obufp++ = open_char;
5453 used_prefixes |= (prefixes & PREFIX_ADDR);
5454 if (address_mode == mode_64bit)
5455 {
5456 if (!(sizeflag & AFLAG))
5457 s = names32[code - eAX_reg];
5458 else
5459 s = names64[code - eAX_reg];
5460 }
5461 else if (sizeflag & AFLAG)
5462 s = names32[code - eAX_reg];
5463 else
5464 s = names16[code - eAX_reg];
5465 oappend (s);
5466 *obufp++ = close_char;
5467 *obufp = 0;
5468 }
5469
5470 static void
5471 OP_ESreg (int code, int sizeflag)
5472 {
5473 if (intel_syntax)
5474 {
5475 switch (codep[-1])
5476 {
5477 case 0x6d: /* insw/insl */
5478 intel_operand_size (z_mode, sizeflag);
5479 break;
5480 case 0xa5: /* movsw/movsl/movsq */
5481 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5482 case 0xab: /* stosw/stosl */
5483 case 0xaf: /* scasw/scasl */
5484 intel_operand_size (v_mode, sizeflag);
5485 break;
5486 default:
5487 intel_operand_size (b_mode, sizeflag);
5488 }
5489 }
5490 oappend ("%es:" + intel_syntax);
5491 ptr_reg (code, sizeflag);
5492 }
5493
5494 static void
5495 OP_DSreg (int code, int sizeflag)
5496 {
5497 if (intel_syntax)
5498 {
5499 switch (codep[-1])
5500 {
5501 case 0x6f: /* outsw/outsl */
5502 intel_operand_size (z_mode, sizeflag);
5503 break;
5504 case 0xa5: /* movsw/movsl/movsq */
5505 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5506 case 0xad: /* lodsw/lodsl/lodsq */
5507 intel_operand_size (v_mode, sizeflag);
5508 break;
5509 default:
5510 intel_operand_size (b_mode, sizeflag);
5511 }
5512 }
5513 if ((prefixes
5514 & (PREFIX_CS
5515 | PREFIX_DS
5516 | PREFIX_SS
5517 | PREFIX_ES
5518 | PREFIX_FS
5519 | PREFIX_GS)) == 0)
5520 prefixes |= PREFIX_DS;
5521 append_seg ();
5522 ptr_reg (code, sizeflag);
5523 }
5524
5525 static void
5526 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5527 {
5528 int add = 0;
5529 if (rex & REX_R)
5530 {
5531 USED_REX (REX_R);
5532 add = 8;
5533 }
5534 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
5535 {
5536 used_prefixes |= PREFIX_LOCK;
5537 add = 8;
5538 }
5539 sprintf (scratchbuf, "%%cr%d", modrm.reg + add);
5540 oappend (scratchbuf + intel_syntax);
5541 }
5542
5543 static void
5544 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5545 {
5546 int add = 0;
5547 USED_REX (REX_R);
5548 if (rex & REX_R)
5549 add = 8;
5550 if (intel_syntax)
5551 sprintf (scratchbuf, "db%d", modrm.reg + add);
5552 else
5553 sprintf (scratchbuf, "%%db%d", modrm.reg + add);
5554 oappend (scratchbuf);
5555 }
5556
5557 static void
5558 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5559 {
5560 sprintf (scratchbuf, "%%tr%d", modrm.reg);
5561 oappend (scratchbuf + intel_syntax);
5562 }
5563
5564 static void
5565 OP_R (int bytemode, int sizeflag)
5566 {
5567 if (modrm.mod == 3)
5568 OP_E (bytemode, sizeflag);
5569 else
5570 BadOp ();
5571 }
5572
5573 static void
5574 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5575 {
5576 used_prefixes |= (prefixes & PREFIX_DATA);
5577 if (prefixes & PREFIX_DATA)
5578 {
5579 int add = 0;
5580 USED_REX (REX_R);
5581 if (rex & REX_R)
5582 add = 8;
5583 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
5584 }
5585 else
5586 sprintf (scratchbuf, "%%mm%d", modrm.reg);
5587 oappend (scratchbuf + intel_syntax);
5588 }
5589
5590 static void
5591 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5592 {
5593 int add = 0;
5594 USED_REX (REX_R);
5595 if (rex & REX_R)
5596 add = 8;
5597 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
5598 oappend (scratchbuf + intel_syntax);
5599 }
5600
5601 static void
5602 OP_EM (int bytemode, int sizeflag)
5603 {
5604 if (modrm.mod != 3)
5605 {
5606 if (intel_syntax && bytemode == v_mode)
5607 {
5608 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5609 used_prefixes |= (prefixes & PREFIX_DATA);
5610 }
5611 OP_E (bytemode, sizeflag);
5612 return;
5613 }
5614
5615 /* Skip mod/rm byte. */
5616 MODRM_CHECK;
5617 codep++;
5618 used_prefixes |= (prefixes & PREFIX_DATA);
5619 if (prefixes & PREFIX_DATA)
5620 {
5621 int add = 0;
5622
5623 USED_REX (REX_B);
5624 if (rex & REX_B)
5625 add = 8;
5626 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
5627 }
5628 else
5629 sprintf (scratchbuf, "%%mm%d", modrm.rm);
5630 oappend (scratchbuf + intel_syntax);
5631 }
5632
5633 /* cvt* are the only instructions in sse2 which have
5634 both SSE and MMX operands and also have 0x66 prefix
5635 in their opcode. 0x66 was originally used to differentiate
5636 between SSE and MMX instruction(operands). So we have to handle the
5637 cvt* separately using OP_EMC and OP_MXC */
5638 static void
5639 OP_EMC (int bytemode, int sizeflag)
5640 {
5641 if (modrm.mod != 3)
5642 {
5643 if (intel_syntax && bytemode == v_mode)
5644 {
5645 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5646 used_prefixes |= (prefixes & PREFIX_DATA);
5647 }
5648 OP_E (bytemode, sizeflag);
5649 return;
5650 }
5651
5652 /* Skip mod/rm byte. */
5653 MODRM_CHECK;
5654 codep++;
5655 used_prefixes |= (prefixes & PREFIX_DATA);
5656 sprintf (scratchbuf, "%%mm%d", modrm.rm);
5657 oappend (scratchbuf + intel_syntax);
5658 }
5659
5660 static void
5661 OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5662 {
5663 used_prefixes |= (prefixes & PREFIX_DATA);
5664 sprintf (scratchbuf, "%%mm%d", modrm.reg);
5665 oappend (scratchbuf + intel_syntax);
5666 }
5667
5668 static void
5669 OP_EX (int bytemode, int sizeflag)
5670 {
5671 int add = 0;
5672 if (modrm.mod != 3)
5673 {
5674 if (intel_syntax && bytemode == v_mode)
5675 {
5676 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
5677 {
5678 case 0: bytemode = x_mode; break;
5679 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
5680 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
5681 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
5682 default: bytemode = 0; break;
5683 }
5684 }
5685 OP_E (bytemode, sizeflag);
5686 return;
5687 }
5688 USED_REX (REX_B);
5689 if (rex & REX_B)
5690 add = 8;
5691
5692 /* Skip mod/rm byte. */
5693 MODRM_CHECK;
5694 codep++;
5695 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
5696 oappend (scratchbuf + intel_syntax);
5697 }
5698
5699 static void
5700 OP_MS (int bytemode, int sizeflag)
5701 {
5702 if (modrm.mod == 3)
5703 OP_EM (bytemode, sizeflag);
5704 else
5705 BadOp ();
5706 }
5707
5708 static void
5709 OP_XS (int bytemode, int sizeflag)
5710 {
5711 if (modrm.mod == 3)
5712 OP_EX (bytemode, sizeflag);
5713 else
5714 BadOp ();
5715 }
5716
5717 static void
5718 OP_M (int bytemode, int sizeflag)
5719 {
5720 if (modrm.mod == 3)
5721 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
5722 BadOp ();
5723 else
5724 OP_E (bytemode, sizeflag);
5725 }
5726
5727 static void
5728 OP_0f07 (int bytemode, int sizeflag)
5729 {
5730 if (modrm.mod != 3 || modrm.rm != 0)
5731 BadOp ();
5732 else
5733 OP_E (bytemode, sizeflag);
5734 }
5735
5736 static void
5737 OP_0fae (int bytemode, int sizeflag)
5738 {
5739 if (modrm.mod == 3)
5740 {
5741 if (modrm.reg == 7)
5742 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
5743
5744 if (modrm.reg < 5 || modrm.rm != 0)
5745 {
5746 BadOp (); /* bad sfence, mfence, or lfence */
5747 return;
5748 }
5749 }
5750 else if (modrm.reg != 7)
5751 {
5752 BadOp (); /* bad clflush */
5753 return;
5754 }
5755
5756 OP_E (bytemode, sizeflag);
5757 }
5758
5759 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
5760 32bit mode and "xchg %rax,%rax" in 64bit mode. */
5761
5762 static void
5763 NOP_Fixup1 (int bytemode, int sizeflag)
5764 {
5765 if ((prefixes & PREFIX_DATA) != 0
5766 || (rex != 0
5767 && rex != 0x48
5768 && address_mode == mode_64bit))
5769 OP_REG (bytemode, sizeflag);
5770 else
5771 strcpy (obuf, "nop");
5772 }
5773
5774 static void
5775 NOP_Fixup2 (int bytemode, int sizeflag)
5776 {
5777 if ((prefixes & PREFIX_DATA) != 0
5778 || (rex != 0
5779 && rex != 0x48
5780 && address_mode == mode_64bit))
5781 OP_IMREG (bytemode, sizeflag);
5782 }
5783
5784 static const char *const Suffix3DNow[] = {
5785 /* 00 */ NULL, NULL, NULL, NULL,
5786 /* 04 */ NULL, NULL, NULL, NULL,
5787 /* 08 */ NULL, NULL, NULL, NULL,
5788 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
5789 /* 10 */ NULL, NULL, NULL, NULL,
5790 /* 14 */ NULL, NULL, NULL, NULL,
5791 /* 18 */ NULL, NULL, NULL, NULL,
5792 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
5793 /* 20 */ NULL, NULL, NULL, NULL,
5794 /* 24 */ NULL, NULL, NULL, NULL,
5795 /* 28 */ NULL, NULL, NULL, NULL,
5796 /* 2C */ NULL, NULL, NULL, NULL,
5797 /* 30 */ NULL, NULL, NULL, NULL,
5798 /* 34 */ NULL, NULL, NULL, NULL,
5799 /* 38 */ NULL, NULL, NULL, NULL,
5800 /* 3C */ NULL, NULL, NULL, NULL,
5801 /* 40 */ NULL, NULL, NULL, NULL,
5802 /* 44 */ NULL, NULL, NULL, NULL,
5803 /* 48 */ NULL, NULL, NULL, NULL,
5804 /* 4C */ NULL, NULL, NULL, NULL,
5805 /* 50 */ NULL, NULL, NULL, NULL,
5806 /* 54 */ NULL, NULL, NULL, NULL,
5807 /* 58 */ NULL, NULL, NULL, NULL,
5808 /* 5C */ NULL, NULL, NULL, NULL,
5809 /* 60 */ NULL, NULL, NULL, NULL,
5810 /* 64 */ NULL, NULL, NULL, NULL,
5811 /* 68 */ NULL, NULL, NULL, NULL,
5812 /* 6C */ NULL, NULL, NULL, NULL,
5813 /* 70 */ NULL, NULL, NULL, NULL,
5814 /* 74 */ NULL, NULL, NULL, NULL,
5815 /* 78 */ NULL, NULL, NULL, NULL,
5816 /* 7C */ NULL, NULL, NULL, NULL,
5817 /* 80 */ NULL, NULL, NULL, NULL,
5818 /* 84 */ NULL, NULL, NULL, NULL,
5819 /* 88 */ NULL, NULL, "pfnacc", NULL,
5820 /* 8C */ NULL, NULL, "pfpnacc", NULL,
5821 /* 90 */ "pfcmpge", NULL, NULL, NULL,
5822 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
5823 /* 98 */ NULL, NULL, "pfsub", NULL,
5824 /* 9C */ NULL, NULL, "pfadd", NULL,
5825 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
5826 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
5827 /* A8 */ NULL, NULL, "pfsubr", NULL,
5828 /* AC */ NULL, NULL, "pfacc", NULL,
5829 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
5830 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
5831 /* B8 */ NULL, NULL, NULL, "pswapd",
5832 /* BC */ NULL, NULL, NULL, "pavgusb",
5833 /* C0 */ NULL, NULL, NULL, NULL,
5834 /* C4 */ NULL, NULL, NULL, NULL,
5835 /* C8 */ NULL, NULL, NULL, NULL,
5836 /* CC */ NULL, NULL, NULL, NULL,
5837 /* D0 */ NULL, NULL, NULL, NULL,
5838 /* D4 */ NULL, NULL, NULL, NULL,
5839 /* D8 */ NULL, NULL, NULL, NULL,
5840 /* DC */ NULL, NULL, NULL, NULL,
5841 /* E0 */ NULL, NULL, NULL, NULL,
5842 /* E4 */ NULL, NULL, NULL, NULL,
5843 /* E8 */ NULL, NULL, NULL, NULL,
5844 /* EC */ NULL, NULL, NULL, NULL,
5845 /* F0 */ NULL, NULL, NULL, NULL,
5846 /* F4 */ NULL, NULL, NULL, NULL,
5847 /* F8 */ NULL, NULL, NULL, NULL,
5848 /* FC */ NULL, NULL, NULL, NULL,
5849 };
5850
5851 static void
5852 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5853 {
5854 const char *mnemonic;
5855
5856 FETCH_DATA (the_info, codep + 1);
5857 /* AMD 3DNow! instructions are specified by an opcode suffix in the
5858 place where an 8-bit immediate would normally go. ie. the last
5859 byte of the instruction. */
5860 obufp = obuf + strlen (obuf);
5861 mnemonic = Suffix3DNow[*codep++ & 0xff];
5862 if (mnemonic)
5863 oappend (mnemonic);
5864 else
5865 {
5866 /* Since a variable sized modrm/sib chunk is between the start
5867 of the opcode (0x0f0f) and the opcode suffix, we need to do
5868 all the modrm processing first, and don't know until now that
5869 we have a bad opcode. This necessitates some cleaning up. */
5870 op_out[0][0] = '\0';
5871 op_out[1][0] = '\0';
5872 BadOp ();
5873 }
5874 }
5875
5876 static const char *simd_cmp_op[] = {
5877 "eq",
5878 "lt",
5879 "le",
5880 "unord",
5881 "neq",
5882 "nlt",
5883 "nle",
5884 "ord"
5885 };
5886
5887 static void
5888 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5889 {
5890 unsigned int cmp_type;
5891
5892 FETCH_DATA (the_info, codep + 1);
5893 obufp = obuf + strlen (obuf);
5894 cmp_type = *codep++ & 0xff;
5895 if (cmp_type < 8)
5896 {
5897 char suffix1 = 'p', suffix2 = 's';
5898 used_prefixes |= (prefixes & PREFIX_REPZ);
5899 if (prefixes & PREFIX_REPZ)
5900 suffix1 = 's';
5901 else
5902 {
5903 used_prefixes |= (prefixes & PREFIX_DATA);
5904 if (prefixes & PREFIX_DATA)
5905 suffix2 = 'd';
5906 else
5907 {
5908 used_prefixes |= (prefixes & PREFIX_REPNZ);
5909 if (prefixes & PREFIX_REPNZ)
5910 suffix1 = 's', suffix2 = 'd';
5911 }
5912 }
5913 sprintf (scratchbuf, "cmp%s%c%c",
5914 simd_cmp_op[cmp_type], suffix1, suffix2);
5915 used_prefixes |= (prefixes & PREFIX_REPZ);
5916 oappend (scratchbuf);
5917 }
5918 else
5919 {
5920 /* We have a bad extension byte. Clean up. */
5921 op_out[0][0] = '\0';
5922 op_out[1][0] = '\0';
5923 BadOp ();
5924 }
5925 }
5926
5927 static void
5928 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
5929 {
5930 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
5931 forms of these instructions. */
5932 if (modrm.mod == 3)
5933 {
5934 char *p = obuf + strlen (obuf);
5935 *(p + 1) = '\0';
5936 *p = *(p - 1);
5937 *(p - 1) = *(p - 2);
5938 *(p - 2) = *(p - 3);
5939 *(p - 3) = extrachar;
5940 }
5941 }
5942
5943 static void
5944 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
5945 {
5946 if (modrm.mod == 3 && modrm.reg == 1 && modrm.rm <= 1)
5947 {
5948 /* Override "sidt". */
5949 size_t olen = strlen (obuf);
5950 char *p = obuf + olen - 4;
5951 const char **names = (address_mode == mode_64bit
5952 ? names64 : names32);
5953
5954 /* We might have a suffix when disassembling with -Msuffix. */
5955 if (*p == 'i')
5956 --p;
5957
5958 /* Remove "addr16/addr32" if we aren't in Intel mode. */
5959 if (!intel_syntax
5960 && (prefixes & PREFIX_ADDR)
5961 && olen >= (4 + 7)
5962 && *(p - 1) == ' '
5963 && CONST_STRNEQ (p - 7, "addr")
5964 && (CONST_STRNEQ (p - 3, "16")
5965 || CONST_STRNEQ (p - 3, "32")))
5966 p -= 7;
5967
5968 if (modrm.rm)
5969 {
5970 /* mwait %eax,%ecx */
5971 strcpy (p, "mwait");
5972 if (!intel_syntax)
5973 strcpy (op_out[0], names[0]);
5974 }
5975 else
5976 {
5977 /* monitor %eax,%ecx,%edx" */
5978 strcpy (p, "monitor");
5979 if (!intel_syntax)
5980 {
5981 const char **op1_names;
5982 if (!(prefixes & PREFIX_ADDR))
5983 op1_names = (address_mode == mode_16bit
5984 ? names16 : names);
5985 else
5986 {
5987 op1_names = (address_mode != mode_32bit
5988 ? names32 : names16);
5989 used_prefixes |= PREFIX_ADDR;
5990 }
5991 strcpy (op_out[0], op1_names[0]);
5992 strcpy (op_out[2], names[2]);
5993 }
5994 }
5995 if (!intel_syntax)
5996 {
5997 strcpy (op_out[1], names[1]);
5998 two_source_ops = 1;
5999 }
6000
6001 codep++;
6002 }
6003 else
6004 OP_M (0, sizeflag);
6005 }
6006
6007 static void
6008 SVME_Fixup (int bytemode, int sizeflag)
6009 {
6010 const char *alt;
6011 char *p;
6012
6013 switch (*codep)
6014 {
6015 case 0xd8:
6016 alt = "vmrun";
6017 break;
6018 case 0xd9:
6019 alt = "vmmcall";
6020 break;
6021 case 0xda:
6022 alt = "vmload";
6023 break;
6024 case 0xdb:
6025 alt = "vmsave";
6026 break;
6027 case 0xdc:
6028 alt = "stgi";
6029 break;
6030 case 0xdd:
6031 alt = "clgi";
6032 break;
6033 case 0xde:
6034 alt = "skinit";
6035 break;
6036 case 0xdf:
6037 alt = "invlpga";
6038 break;
6039 default:
6040 OP_M (bytemode, sizeflag);
6041 return;
6042 }
6043 /* Override "lidt". */
6044 p = obuf + strlen (obuf) - 4;
6045 /* We might have a suffix. */
6046 if (*p == 'i')
6047 --p;
6048 strcpy (p, alt);
6049 if (!(prefixes & PREFIX_ADDR))
6050 {
6051 ++codep;
6052 return;
6053 }
6054 used_prefixes |= PREFIX_ADDR;
6055 switch (*codep++)
6056 {
6057 case 0xdf:
6058 strcpy (op_out[1], names32[1]);
6059 two_source_ops = 1;
6060 /* Fall through. */
6061 case 0xd8:
6062 case 0xda:
6063 case 0xdb:
6064 *obufp++ = open_char;
6065 if (address_mode == mode_64bit || (sizeflag & AFLAG))
6066 alt = names32[0];
6067 else
6068 alt = names16[0];
6069 strcpy (obufp, alt);
6070 obufp += strlen (alt);
6071 *obufp++ = close_char;
6072 *obufp = '\0';
6073 break;
6074 }
6075 }
6076
6077 static void
6078 INVLPG_Fixup (int bytemode, int sizeflag)
6079 {
6080 const char *alt;
6081
6082 switch (*codep)
6083 {
6084 case 0xf8:
6085 alt = "swapgs";
6086 break;
6087 case 0xf9:
6088 alt = "rdtscp";
6089 break;
6090 default:
6091 OP_M (bytemode, sizeflag);
6092 return;
6093 }
6094 /* Override "invlpg". */
6095 strcpy (obuf + strlen (obuf) - 6, alt);
6096 codep++;
6097 }
6098
6099 static void
6100 BadOp (void)
6101 {
6102 /* Throw away prefixes and 1st. opcode byte. */
6103 codep = insn_codep + 1;
6104 oappend ("(bad)");
6105 }
6106
6107 static void
6108 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
6109 {
6110 if (modrm.mod == 3
6111 && modrm.reg == 0
6112 && modrm.rm >=1
6113 && modrm.rm <= 4)
6114 {
6115 /* Override "sgdt". */
6116 char *p = obuf + strlen (obuf) - 4;
6117
6118 /* We might have a suffix when disassembling with -Msuffix. */
6119 if (*p == 'g')
6120 --p;
6121
6122 switch (modrm.rm)
6123 {
6124 case 1:
6125 strcpy (p, "vmcall");
6126 break;
6127 case 2:
6128 strcpy (p, "vmlaunch");
6129 break;
6130 case 3:
6131 strcpy (p, "vmresume");
6132 break;
6133 case 4:
6134 strcpy (p, "vmxoff");
6135 break;
6136 }
6137
6138 codep++;
6139 }
6140 else
6141 OP_E (0, sizeflag);
6142 }
6143
6144 static void
6145 OP_VMX (int bytemode, int sizeflag)
6146 {
6147 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
6148 if (prefixes & PREFIX_DATA)
6149 strcpy (obuf, "vmclear");
6150 else if (prefixes & PREFIX_REPZ)
6151 strcpy (obuf, "vmxon");
6152 else
6153 strcpy (obuf, "vmptrld");
6154 OP_E (bytemode, sizeflag);
6155 }
6156
6157 static void
6158 REP_Fixup (int bytemode, int sizeflag)
6159 {
6160 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6161 lods and stos. */
6162 size_t ilen = 0;
6163
6164 if (prefixes & PREFIX_REPZ)
6165 switch (*insn_codep)
6166 {
6167 case 0x6e: /* outsb */
6168 case 0x6f: /* outsw/outsl */
6169 case 0xa4: /* movsb */
6170 case 0xa5: /* movsw/movsl/movsq */
6171 if (!intel_syntax)
6172 ilen = 5;
6173 else
6174 ilen = 4;
6175 break;
6176 case 0xaa: /* stosb */
6177 case 0xab: /* stosw/stosl/stosq */
6178 case 0xac: /* lodsb */
6179 case 0xad: /* lodsw/lodsl/lodsq */
6180 if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
6181 ilen = 5;
6182 else
6183 ilen = 4;
6184 break;
6185 case 0x6c: /* insb */
6186 case 0x6d: /* insl/insw */
6187 if (!intel_syntax)
6188 ilen = 4;
6189 else
6190 ilen = 3;
6191 break;
6192 default:
6193 abort ();
6194 break;
6195 }
6196
6197 if (ilen != 0)
6198 {
6199 size_t olen;
6200 char *p;
6201
6202 olen = strlen (obuf);
6203 p = obuf + olen - ilen - 1 - 4;
6204 /* Handle "repz [addr16|addr32]". */
6205 if ((prefixes & PREFIX_ADDR))
6206 p -= 1 + 6;
6207
6208 memmove (p + 3, p + 4, olen - (p + 3 - obuf));
6209 }
6210
6211 switch (bytemode)
6212 {
6213 case al_reg:
6214 case eAX_reg:
6215 case indir_dx_reg:
6216 OP_IMREG (bytemode, sizeflag);
6217 break;
6218 case eDI_reg:
6219 OP_ESreg (bytemode, sizeflag);
6220 break;
6221 case eSI_reg:
6222 OP_DSreg (bytemode, sizeflag);
6223 break;
6224 default:
6225 abort ();
6226 break;
6227 }
6228 }
6229
6230 static void
6231 CMPXCHG8B_Fixup (int bytemode, int sizeflag)
6232 {
6233 USED_REX (REX_W);
6234 if (rex & REX_W)
6235 {
6236 /* Change cmpxchg8b to cmpxchg16b. */
6237 char *p = obuf + strlen (obuf) - 2;
6238 strcpy (p, "16b");
6239 bytemode = o_mode;
6240 }
6241 OP_M (bytemode, sizeflag);
6242 }
6243
6244 static void
6245 XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
6246 {
6247 sprintf (scratchbuf, "%%xmm%d", reg);
6248 oappend (scratchbuf + intel_syntax);
6249 }
GDB Binutils - Deliverables
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