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gas/testsuite/
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
4
5 This file is part of the GNU opcodes library.
6
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
21
22
23 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
24 July 1988
25 modified by John Hassey (hassey@dg-rtp.dg.com)
26 x86-64 support added by Jan Hubicka (jh@suse.cz)
27 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
28
29 /* The main tables describing the instructions is essentially a copy
30 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
31 Programmers Manual. Usually, there is a capital letter, followed
32 by a small letter. The capital letter tell the addressing mode,
33 and the small letter tells about the operand size. Refer to
34 the Intel manual for details. */
35
36 #include "sysdep.h"
37 #include "dis-asm.h"
38 #include "opintl.h"
39 #include "opcode/i386.h"
40
41 #include <setjmp.h>
42
43 static int fetch_data (struct disassemble_info *, bfd_byte *);
44 static void ckprefix (void);
45 static const char *prefix_name (int, int);
46 static int print_insn (bfd_vma, disassemble_info *);
47 static void dofloat (int);
48 static void OP_ST (int, int);
49 static void OP_STi (int, int);
50 static int putop (const char *, int);
51 static void oappend (const char *);
52 static void append_seg (void);
53 static void OP_indirE (int, int);
54 static void print_operand_value (char *, int, bfd_vma);
55 static void print_displacement (char *, bfd_vma);
56 static void OP_E (int, int);
57 static void OP_G (int, int);
58 static bfd_vma get64 (void);
59 static bfd_signed_vma get32 (void);
60 static bfd_signed_vma get32s (void);
61 static int get16 (void);
62 static void set_op (bfd_vma, int);
63 static void OP_Skip_MODRM (int, int);
64 static void OP_REG (int, int);
65 static void OP_IMREG (int, int);
66 static void OP_I (int, int);
67 static void OP_I64 (int, int);
68 static void OP_sI (int, int);
69 static void OP_J (int, int);
70 static void OP_SEG (int, int);
71 static void OP_DIR (int, int);
72 static void OP_OFF (int, int);
73 static void OP_OFF64 (int, int);
74 static void ptr_reg (int, int);
75 static void OP_ESreg (int, int);
76 static void OP_DSreg (int, int);
77 static void OP_C (int, int);
78 static void OP_D (int, int);
79 static void OP_T (int, int);
80 static void OP_R (int, int);
81 static void OP_MMX (int, int);
82 static void OP_XMM (int, int);
83 static void OP_EM (int, int);
84 static void OP_EX (int, int);
85 static void OP_EMC (int,int);
86 static void OP_MXC (int,int);
87 static void OP_MS (int, int);
88 static void OP_XS (int, int);
89 static void OP_M (int, int);
90 static void OP_0f07 (int, int);
91 static void OP_Monitor (int, int);
92 static void OP_Mwait (int, int);
93 static void NOP_Fixup1 (int, int);
94 static void NOP_Fixup2 (int, int);
95 static void OP_3DNowSuffix (int, int);
96 static void OP_SIMD_Suffix (int, int);
97 static void BadOp (void);
98 static void REP_Fixup (int, int);
99 static void CMPXCHG8B_Fixup (int, int);
100 static void XMM_Fixup (int, int);
101 static void CRC32_Fixup (int, int);
102
103 struct dis_private {
104 /* Points to first byte not fetched. */
105 bfd_byte *max_fetched;
106 bfd_byte the_buffer[MAX_MNEM_SIZE];
107 bfd_vma insn_start;
108 int orig_sizeflag;
109 jmp_buf bailout;
110 };
111
112 enum address_mode
113 {
114 mode_16bit,
115 mode_32bit,
116 mode_64bit
117 };
118
119 enum address_mode address_mode;
120
121 /* Flags for the prefixes for the current instruction. See below. */
122 static int prefixes;
123
124 /* REX prefix the current instruction. See below. */
125 static int rex;
126 /* Bits of REX we've already used. */
127 static int rex_used;
128 /* Mark parts used in the REX prefix. When we are testing for
129 empty prefix (for 8bit register REX extension), just mask it
130 out. Otherwise test for REX bit is excuse for existence of REX
131 only in case value is nonzero. */
132 #define USED_REX(value) \
133 { \
134 if (value) \
135 { \
136 if ((rex & value)) \
137 rex_used |= (value) | REX_OPCODE; \
138 } \
139 else \
140 rex_used |= REX_OPCODE; \
141 }
142
143 /* Flags for prefixes which we somehow handled when printing the
144 current instruction. */
145 static int used_prefixes;
146
147 /* Flags stored in PREFIXES. */
148 #define PREFIX_REPZ 1
149 #define PREFIX_REPNZ 2
150 #define PREFIX_LOCK 4
151 #define PREFIX_CS 8
152 #define PREFIX_SS 0x10
153 #define PREFIX_DS 0x20
154 #define PREFIX_ES 0x40
155 #define PREFIX_FS 0x80
156 #define PREFIX_GS 0x100
157 #define PREFIX_DATA 0x200
158 #define PREFIX_ADDR 0x400
159 #define PREFIX_FWAIT 0x800
160
161 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
162 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
163 on error. */
164 #define FETCH_DATA(info, addr) \
165 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
166 ? 1 : fetch_data ((info), (addr)))
167
168 static int
169 fetch_data (struct disassemble_info *info, bfd_byte *addr)
170 {
171 int status;
172 struct dis_private *priv = (struct dis_private *) info->private_data;
173 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
174
175 if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
176 status = (*info->read_memory_func) (start,
177 priv->max_fetched,
178 addr - priv->max_fetched,
179 info);
180 else
181 status = -1;
182 if (status != 0)
183 {
184 /* If we did manage to read at least one byte, then
185 print_insn_i386 will do something sensible. Otherwise, print
186 an error. We do that here because this is where we know
187 STATUS. */
188 if (priv->max_fetched == priv->the_buffer)
189 (*info->memory_error_func) (status, start, info);
190 longjmp (priv->bailout, 1);
191 }
192 else
193 priv->max_fetched = addr;
194 return 1;
195 }
196
197 #define XX { NULL, 0 }
198
199 #define Eb { OP_E, b_mode }
200 #define Ev { OP_E, v_mode }
201 #define Ed { OP_E, d_mode }
202 #define Edq { OP_E, dq_mode }
203 #define Edqw { OP_E, dqw_mode }
204 #define Edqb { OP_E, dqb_mode }
205 #define Edqd { OP_E, dqd_mode }
206 #define Eq { OP_E, q_mode }
207 #define indirEv { OP_indirE, stack_v_mode }
208 #define indirEp { OP_indirE, f_mode }
209 #define stackEv { OP_E, stack_v_mode }
210 #define Em { OP_E, m_mode }
211 #define Ew { OP_E, w_mode }
212 #define M { OP_M, 0 } /* lea, lgdt, etc. */
213 #define Ma { OP_M, v_mode }
214 #define Mb { OP_M, b_mode }
215 #define Md { OP_M, d_mode }
216 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
217 #define Mq { OP_M, q_mode }
218 #define Gb { OP_G, b_mode }
219 #define Gv { OP_G, v_mode }
220 #define Gd { OP_G, d_mode }
221 #define Gdq { OP_G, dq_mode }
222 #define Gm { OP_G, m_mode }
223 #define Gw { OP_G, w_mode }
224 #define Rd { OP_R, d_mode }
225 #define Rm { OP_R, m_mode }
226 #define Ib { OP_I, b_mode }
227 #define sIb { OP_sI, b_mode } /* sign extened byte */
228 #define Iv { OP_I, v_mode }
229 #define Iq { OP_I, q_mode }
230 #define Iv64 { OP_I64, v_mode }
231 #define Iw { OP_I, w_mode }
232 #define I1 { OP_I, const_1_mode }
233 #define Jb { OP_J, b_mode }
234 #define Jv { OP_J, v_mode }
235 #define Cm { OP_C, m_mode }
236 #define Dm { OP_D, m_mode }
237 #define Td { OP_T, d_mode }
238 #define Skip_MODRM { OP_Skip_MODRM, 0 }
239
240 #define RMeAX { OP_REG, eAX_reg }
241 #define RMeBX { OP_REG, eBX_reg }
242 #define RMeCX { OP_REG, eCX_reg }
243 #define RMeDX { OP_REG, eDX_reg }
244 #define RMeSP { OP_REG, eSP_reg }
245 #define RMeBP { OP_REG, eBP_reg }
246 #define RMeSI { OP_REG, eSI_reg }
247 #define RMeDI { OP_REG, eDI_reg }
248 #define RMrAX { OP_REG, rAX_reg }
249 #define RMrBX { OP_REG, rBX_reg }
250 #define RMrCX { OP_REG, rCX_reg }
251 #define RMrDX { OP_REG, rDX_reg }
252 #define RMrSP { OP_REG, rSP_reg }
253 #define RMrBP { OP_REG, rBP_reg }
254 #define RMrSI { OP_REG, rSI_reg }
255 #define RMrDI { OP_REG, rDI_reg }
256 #define RMAL { OP_REG, al_reg }
257 #define RMAL { OP_REG, al_reg }
258 #define RMCL { OP_REG, cl_reg }
259 #define RMDL { OP_REG, dl_reg }
260 #define RMBL { OP_REG, bl_reg }
261 #define RMAH { OP_REG, ah_reg }
262 #define RMCH { OP_REG, ch_reg }
263 #define RMDH { OP_REG, dh_reg }
264 #define RMBH { OP_REG, bh_reg }
265 #define RMAX { OP_REG, ax_reg }
266 #define RMDX { OP_REG, dx_reg }
267
268 #define eAX { OP_IMREG, eAX_reg }
269 #define eBX { OP_IMREG, eBX_reg }
270 #define eCX { OP_IMREG, eCX_reg }
271 #define eDX { OP_IMREG, eDX_reg }
272 #define eSP { OP_IMREG, eSP_reg }
273 #define eBP { OP_IMREG, eBP_reg }
274 #define eSI { OP_IMREG, eSI_reg }
275 #define eDI { OP_IMREG, eDI_reg }
276 #define AL { OP_IMREG, al_reg }
277 #define CL { OP_IMREG, cl_reg }
278 #define DL { OP_IMREG, dl_reg }
279 #define BL { OP_IMREG, bl_reg }
280 #define AH { OP_IMREG, ah_reg }
281 #define CH { OP_IMREG, ch_reg }
282 #define DH { OP_IMREG, dh_reg }
283 #define BH { OP_IMREG, bh_reg }
284 #define AX { OP_IMREG, ax_reg }
285 #define DX { OP_IMREG, dx_reg }
286 #define zAX { OP_IMREG, z_mode_ax_reg }
287 #define indirDX { OP_IMREG, indir_dx_reg }
288
289 #define Sw { OP_SEG, w_mode }
290 #define Sv { OP_SEG, v_mode }
291 #define Ap { OP_DIR, 0 }
292 #define Ob { OP_OFF64, b_mode }
293 #define Ov { OP_OFF64, v_mode }
294 #define Xb { OP_DSreg, eSI_reg }
295 #define Xv { OP_DSreg, eSI_reg }
296 #define Xz { OP_DSreg, eSI_reg }
297 #define Yb { OP_ESreg, eDI_reg }
298 #define Yv { OP_ESreg, eDI_reg }
299 #define DSBX { OP_DSreg, eBX_reg }
300
301 #define es { OP_REG, es_reg }
302 #define ss { OP_REG, ss_reg }
303 #define cs { OP_REG, cs_reg }
304 #define ds { OP_REG, ds_reg }
305 #define fs { OP_REG, fs_reg }
306 #define gs { OP_REG, gs_reg }
307
308 #define MX { OP_MMX, 0 }
309 #define XM { OP_XMM, 0 }
310 #define EM { OP_EM, v_mode }
311 #define EMd { OP_EM, d_mode }
312 #define EMx { OP_EM, x_mode }
313 #define EXw { OP_EX, w_mode }
314 #define EXd { OP_EX, d_mode }
315 #define EXq { OP_EX, q_mode }
316 #define EXx { OP_EX, x_mode }
317 #define MS { OP_MS, v_mode }
318 #define XS { OP_XS, v_mode }
319 #define EMCq { OP_EMC, q_mode }
320 #define MXC { OP_MXC, 0 }
321 #define OPSUF { OP_3DNowSuffix, 0 }
322 #define OPSIMD { OP_SIMD_Suffix, 0 }
323 #define XMM0 { XMM_Fixup, 0 }
324
325 /* Used handle "rep" prefix for string instructions. */
326 #define Xbr { REP_Fixup, eSI_reg }
327 #define Xvr { REP_Fixup, eSI_reg }
328 #define Ybr { REP_Fixup, eDI_reg }
329 #define Yvr { REP_Fixup, eDI_reg }
330 #define Yzr { REP_Fixup, eDI_reg }
331 #define indirDXr { REP_Fixup, indir_dx_reg }
332 #define ALr { REP_Fixup, al_reg }
333 #define eAXr { REP_Fixup, eAX_reg }
334
335 #define cond_jump_flag { NULL, cond_jump_mode }
336 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
337
338 /* bits in sizeflag */
339 #define SUFFIX_ALWAYS 4
340 #define AFLAG 2
341 #define DFLAG 1
342
343 #define b_mode 1 /* byte operand */
344 #define v_mode 2 /* operand size depends on prefixes */
345 #define w_mode 3 /* word operand */
346 #define d_mode 4 /* double word operand */
347 #define q_mode 5 /* quad word operand */
348 #define t_mode 6 /* ten-byte operand */
349 #define x_mode 7 /* 16-byte XMM operand */
350 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
351 #define cond_jump_mode 9
352 #define loop_jcxz_mode 10
353 #define dq_mode 11 /* operand size depends on REX prefixes. */
354 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
355 #define f_mode 13 /* 4- or 6-byte pointer operand */
356 #define const_1_mode 14
357 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
358 #define z_mode 16 /* non-quad operand size depends on prefixes */
359 #define o_mode 17 /* 16-byte operand */
360 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
361 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
362
363 #define es_reg 100
364 #define cs_reg 101
365 #define ss_reg 102
366 #define ds_reg 103
367 #define fs_reg 104
368 #define gs_reg 105
369
370 #define eAX_reg 108
371 #define eCX_reg 109
372 #define eDX_reg 110
373 #define eBX_reg 111
374 #define eSP_reg 112
375 #define eBP_reg 113
376 #define eSI_reg 114
377 #define eDI_reg 115
378
379 #define al_reg 116
380 #define cl_reg 117
381 #define dl_reg 118
382 #define bl_reg 119
383 #define ah_reg 120
384 #define ch_reg 121
385 #define dh_reg 122
386 #define bh_reg 123
387
388 #define ax_reg 124
389 #define cx_reg 125
390 #define dx_reg 126
391 #define bx_reg 127
392 #define sp_reg 128
393 #define bp_reg 129
394 #define si_reg 130
395 #define di_reg 131
396
397 #define rAX_reg 132
398 #define rCX_reg 133
399 #define rDX_reg 134
400 #define rBX_reg 135
401 #define rSP_reg 136
402 #define rBP_reg 137
403 #define rSI_reg 138
404 #define rDI_reg 139
405
406 #define z_mode_ax_reg 149
407 #define indir_dx_reg 150
408
409 #define FLOATCODE 1
410 #define USE_GROUPS 2
411 #define USE_PREFIX_USER_TABLE 3
412 #define X86_64_SPECIAL 4
413 #define IS_3BYTE_OPCODE 5
414 #define USE_OPC_EXT_TABLE 6
415 #define USE_OPC_EXT_RM_TABLE 7
416
417 #define FLOAT NULL, { { NULL, FLOATCODE } }
418
419 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
420 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
421 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
422 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
423 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
424 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
425 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
426 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
427 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
428 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
429 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
430 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
431 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
432 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
433 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
434 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
435 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
436 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
437 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
438 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
439 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
440 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
441 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
442 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
443 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
444 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
445 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
446 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
447
448 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
449 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
450 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
451 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
452 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
453 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
454 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
455 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
456 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
457 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
458 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
459 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
460 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
461 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
462 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
463 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
464 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
465 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
466 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
467 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
468 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
469 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
470 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
471 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
472 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
473 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
474 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
475 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
476 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
477 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
478 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
479 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
480 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
481 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
482 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
483 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
484 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
485 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
486 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
487 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
488 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
489 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
490 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
491 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
492 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
493 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
494 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
495 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
496 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
497 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
498 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
499 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
500 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
501 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
502 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
503 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
504 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
505 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
506 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
507 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
508 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
509 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
510 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
511 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
512 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
513 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
514 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
515 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
516 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
517 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
518 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
519 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
520 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
521 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
522 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
523 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
524 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
525 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
526 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
527 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
528 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
529 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
530 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
531 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
532 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
533 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
534 #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
535 #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
536 #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
537 #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
538 #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
539 #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
540 #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
541 #define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
542 #define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
543 #define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
544 #define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
545 #define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
546 #define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
547 #define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
548 #define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } }
549
550
551 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
552 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
553 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
554 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
555
556 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
557 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
558
559 #define OPC_EXT_0 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 0 } }
560 #define OPC_EXT_1 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 1 } }
561 #define OPC_EXT_2 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 2 } }
562 #define OPC_EXT_3 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 3 } }
563 #define OPC_EXT_4 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 4 } }
564 #define OPC_EXT_5 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 5 } }
565 #define OPC_EXT_6 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 6 } }
566 #define OPC_EXT_7 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 7 } }
567 #define OPC_EXT_8 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 8 } }
568 #define OPC_EXT_9 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 9 } }
569 #define OPC_EXT_10 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 10 } }
570 #define OPC_EXT_11 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 11 } }
571 #define OPC_EXT_12 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 12 } }
572 #define OPC_EXT_13 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 13 } }
573 #define OPC_EXT_14 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 14 } }
574 #define OPC_EXT_15 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 15 } }
575 #define OPC_EXT_16 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 16 } }
576 #define OPC_EXT_17 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 17 } }
577 #define OPC_EXT_18 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 18 } }
578 #define OPC_EXT_19 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 19 } }
579 #define OPC_EXT_20 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 20 } }
580 #define OPC_EXT_21 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 21 } }
581 #define OPC_EXT_22 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 22 } }
582 #define OPC_EXT_23 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 23 } }
583 #define OPC_EXT_24 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 24 } }
584 #define OPC_EXT_25 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 25 } }
585 #define OPC_EXT_26 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 26 } }
586 #define OPC_EXT_27 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 27 } }
587 #define OPC_EXT_28 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 28 } }
588 #define OPC_EXT_29 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 29 } }
589 #define OPC_EXT_30 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 30 } }
590 #define OPC_EXT_31 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 31 } }
591 #define OPC_EXT_32 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 32 } }
592 #define OPC_EXT_33 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 33 } }
593 #define OPC_EXT_34 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 34 } }
594 #define OPC_EXT_35 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 35 } }
595 #define OPC_EXT_36 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 36 } }
596 #define OPC_EXT_37 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 37 } }
597 #define OPC_EXT_38 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 38 } }
598 #define OPC_EXT_39 NULL, { { NULL, USE_OPC_EXT_TABLE }, { NULL, 39 } }
599
600 #define OPC_EXT_RM_0 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 0 } }
601 #define OPC_EXT_RM_1 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 1 } }
602 #define OPC_EXT_RM_2 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 2 } }
603 #define OPC_EXT_RM_3 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 3 } }
604 #define OPC_EXT_RM_4 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 4 } }
605 #define OPC_EXT_RM_5 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 5 } }
606 #define OPC_EXT_RM_6 NULL, { { NULL, USE_OPC_EXT_RM_TABLE }, { NULL, 6 } }
607
608 typedef void (*op_rtn) (int bytemode, int sizeflag);
609
610 struct dis386 {
611 const char *name;
612 struct
613 {
614 op_rtn rtn;
615 int bytemode;
616 } op[MAX_OPERANDS];
617 };
618
619 /* Upper case letters in the instruction names here are macros.
620 'A' => print 'b' if no register operands or suffix_always is true
621 'B' => print 'b' if suffix_always is true
622 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
623 . size prefix
624 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
625 . suffix_always is true
626 'E' => print 'e' if 32-bit form of jcxz
627 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
628 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
629 'H' => print ",pt" or ",pn" branch hint
630 'I' => honor following macro letter even in Intel mode (implemented only
631 . for some of the macro letters)
632 'J' => print 'l'
633 'K' => print 'd' or 'q' if rex prefix is present.
634 'L' => print 'l' if suffix_always is true
635 'N' => print 'n' if instruction has no wait "prefix"
636 'O' => print 'd' or 'o' (or 'q' in Intel mode)
637 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
638 . or suffix_always is true. print 'q' if rex prefix is present.
639 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
640 . is true
641 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
642 'S' => print 'w', 'l' or 'q' if suffix_always is true
643 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
644 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
645 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
646 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
647 'X' => print 's', 'd' depending on data16 prefix (for XMM)
648 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
649 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
650
651 Many of the above letters print nothing in Intel mode. See "putop"
652 for the details.
653
654 Braces '{' and '}', and vertical bars '|', indicate alternative
655 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
656 modes. In cases where there are only two alternatives, the X86_64
657 instruction is reserved, and "(bad)" is printed.
658 */
659
660 static const struct dis386 dis386[] = {
661 /* 00 */
662 { "addB", { Eb, Gb } },
663 { "addS", { Ev, Gv } },
664 { "addB", { Gb, Eb } },
665 { "addS", { Gv, Ev } },
666 { "addB", { AL, Ib } },
667 { "addS", { eAX, Iv } },
668 { "push{T|}", { es } },
669 { "pop{T|}", { es } },
670 /* 08 */
671 { "orB", { Eb, Gb } },
672 { "orS", { Ev, Gv } },
673 { "orB", { Gb, Eb } },
674 { "orS", { Gv, Ev } },
675 { "orB", { AL, Ib } },
676 { "orS", { eAX, Iv } },
677 { "push{T|}", { cs } },
678 { "(bad)", { XX } }, /* 0x0f extended opcode escape */
679 /* 10 */
680 { "adcB", { Eb, Gb } },
681 { "adcS", { Ev, Gv } },
682 { "adcB", { Gb, Eb } },
683 { "adcS", { Gv, Ev } },
684 { "adcB", { AL, Ib } },
685 { "adcS", { eAX, Iv } },
686 { "push{T|}", { ss } },
687 { "pop{T|}", { ss } },
688 /* 18 */
689 { "sbbB", { Eb, Gb } },
690 { "sbbS", { Ev, Gv } },
691 { "sbbB", { Gb, Eb } },
692 { "sbbS", { Gv, Ev } },
693 { "sbbB", { AL, Ib } },
694 { "sbbS", { eAX, Iv } },
695 { "push{T|}", { ds } },
696 { "pop{T|}", { ds } },
697 /* 20 */
698 { "andB", { Eb, Gb } },
699 { "andS", { Ev, Gv } },
700 { "andB", { Gb, Eb } },
701 { "andS", { Gv, Ev } },
702 { "andB", { AL, Ib } },
703 { "andS", { eAX, Iv } },
704 { "(bad)", { XX } }, /* SEG ES prefix */
705 { "daa{|}", { XX } },
706 /* 28 */
707 { "subB", { Eb, Gb } },
708 { "subS", { Ev, Gv } },
709 { "subB", { Gb, Eb } },
710 { "subS", { Gv, Ev } },
711 { "subB", { AL, Ib } },
712 { "subS", { eAX, Iv } },
713 { "(bad)", { XX } }, /* SEG CS prefix */
714 { "das{|}", { XX } },
715 /* 30 */
716 { "xorB", { Eb, Gb } },
717 { "xorS", { Ev, Gv } },
718 { "xorB", { Gb, Eb } },
719 { "xorS", { Gv, Ev } },
720 { "xorB", { AL, Ib } },
721 { "xorS", { eAX, Iv } },
722 { "(bad)", { XX } }, /* SEG SS prefix */
723 { "aaa{|}", { XX } },
724 /* 38 */
725 { "cmpB", { Eb, Gb } },
726 { "cmpS", { Ev, Gv } },
727 { "cmpB", { Gb, Eb } },
728 { "cmpS", { Gv, Ev } },
729 { "cmpB", { AL, Ib } },
730 { "cmpS", { eAX, Iv } },
731 { "(bad)", { XX } }, /* SEG DS prefix */
732 { "aas{|}", { XX } },
733 /* 40 */
734 { "inc{S|}", { RMeAX } },
735 { "inc{S|}", { RMeCX } },
736 { "inc{S|}", { RMeDX } },
737 { "inc{S|}", { RMeBX } },
738 { "inc{S|}", { RMeSP } },
739 { "inc{S|}", { RMeBP } },
740 { "inc{S|}", { RMeSI } },
741 { "inc{S|}", { RMeDI } },
742 /* 48 */
743 { "dec{S|}", { RMeAX } },
744 { "dec{S|}", { RMeCX } },
745 { "dec{S|}", { RMeDX } },
746 { "dec{S|}", { RMeBX } },
747 { "dec{S|}", { RMeSP } },
748 { "dec{S|}", { RMeBP } },
749 { "dec{S|}", { RMeSI } },
750 { "dec{S|}", { RMeDI } },
751 /* 50 */
752 { "pushV", { RMrAX } },
753 { "pushV", { RMrCX } },
754 { "pushV", { RMrDX } },
755 { "pushV", { RMrBX } },
756 { "pushV", { RMrSP } },
757 { "pushV", { RMrBP } },
758 { "pushV", { RMrSI } },
759 { "pushV", { RMrDI } },
760 /* 58 */
761 { "popV", { RMrAX } },
762 { "popV", { RMrCX } },
763 { "popV", { RMrDX } },
764 { "popV", { RMrBX } },
765 { "popV", { RMrSP } },
766 { "popV", { RMrBP } },
767 { "popV", { RMrSI } },
768 { "popV", { RMrDI } },
769 /* 60 */
770 { X86_64_0 },
771 { X86_64_1 },
772 { X86_64_2 },
773 { X86_64_3 },
774 { "(bad)", { XX } }, /* seg fs */
775 { "(bad)", { XX } }, /* seg gs */
776 { "(bad)", { XX } }, /* op size prefix */
777 { "(bad)", { XX } }, /* adr size prefix */
778 /* 68 */
779 { "pushT", { Iq } },
780 { "imulS", { Gv, Ev, Iv } },
781 { "pushT", { sIb } },
782 { "imulS", { Gv, Ev, sIb } },
783 { "ins{b||b|}", { Ybr, indirDX } },
784 { "ins{R||G|}", { Yzr, indirDX } },
785 { "outs{b||b|}", { indirDXr, Xb } },
786 { "outs{R||G|}", { indirDXr, Xz } },
787 /* 70 */
788 { "joH", { Jb, XX, cond_jump_flag } },
789 { "jnoH", { Jb, XX, cond_jump_flag } },
790 { "jbH", { Jb, XX, cond_jump_flag } },
791 { "jaeH", { Jb, XX, cond_jump_flag } },
792 { "jeH", { Jb, XX, cond_jump_flag } },
793 { "jneH", { Jb, XX, cond_jump_flag } },
794 { "jbeH", { Jb, XX, cond_jump_flag } },
795 { "jaH", { Jb, XX, cond_jump_flag } },
796 /* 78 */
797 { "jsH", { Jb, XX, cond_jump_flag } },
798 { "jnsH", { Jb, XX, cond_jump_flag } },
799 { "jpH", { Jb, XX, cond_jump_flag } },
800 { "jnpH", { Jb, XX, cond_jump_flag } },
801 { "jlH", { Jb, XX, cond_jump_flag } },
802 { "jgeH", { Jb, XX, cond_jump_flag } },
803 { "jleH", { Jb, XX, cond_jump_flag } },
804 { "jgH", { Jb, XX, cond_jump_flag } },
805 /* 80 */
806 { GRP1b },
807 { GRP1S },
808 { "(bad)", { XX } },
809 { GRP1Ss },
810 { "testB", { Eb, Gb } },
811 { "testS", { Ev, Gv } },
812 { "xchgB", { Eb, Gb } },
813 { "xchgS", { Ev, Gv } },
814 /* 88 */
815 { "movB", { Eb, Gb } },
816 { "movS", { Ev, Gv } },
817 { "movB", { Gb, Eb } },
818 { "movS", { Gv, Ev } },
819 { "movD", { Sv, Sw } },
820 { OPC_EXT_0 },
821 { "movD", { Sw, Sv } },
822 { GRP1a },
823 /* 90 */
824 { PREGRP38 },
825 { "xchgS", { RMeCX, eAX } },
826 { "xchgS", { RMeDX, eAX } },
827 { "xchgS", { RMeBX, eAX } },
828 { "xchgS", { RMeSP, eAX } },
829 { "xchgS", { RMeBP, eAX } },
830 { "xchgS", { RMeSI, eAX } },
831 { "xchgS", { RMeDI, eAX } },
832 /* 98 */
833 { "cW{t||t|}R", { XX } },
834 { "cR{t||t|}O", { XX } },
835 { "Jcall{T|}", { Ap } },
836 { "(bad)", { XX } }, /* fwait */
837 { "pushfT", { XX } },
838 { "popfT", { XX } },
839 { "sahf{|}", { XX } },
840 { "lahf{|}", { XX } },
841 /* a0 */
842 { "movB", { AL, Ob } },
843 { "movS", { eAX, Ov } },
844 { "movB", { Ob, AL } },
845 { "movS", { Ov, eAX } },
846 { "movs{b||b|}", { Ybr, Xb } },
847 { "movs{R||R|}", { Yvr, Xv } },
848 { "cmps{b||b|}", { Xb, Yb } },
849 { "cmps{R||R|}", { Xv, Yv } },
850 /* a8 */
851 { "testB", { AL, Ib } },
852 { "testS", { eAX, Iv } },
853 { "stosB", { Ybr, AL } },
854 { "stosS", { Yvr, eAX } },
855 { "lodsB", { ALr, Xb } },
856 { "lodsS", { eAXr, Xv } },
857 { "scasB", { AL, Yb } },
858 { "scasS", { eAX, Yv } },
859 /* b0 */
860 { "movB", { RMAL, Ib } },
861 { "movB", { RMCL, Ib } },
862 { "movB", { RMDL, Ib } },
863 { "movB", { RMBL, Ib } },
864 { "movB", { RMAH, Ib } },
865 { "movB", { RMCH, Ib } },
866 { "movB", { RMDH, Ib } },
867 { "movB", { RMBH, Ib } },
868 /* b8 */
869 { "movS", { RMeAX, Iv64 } },
870 { "movS", { RMeCX, Iv64 } },
871 { "movS", { RMeDX, Iv64 } },
872 { "movS", { RMeBX, Iv64 } },
873 { "movS", { RMeSP, Iv64 } },
874 { "movS", { RMeBP, Iv64 } },
875 { "movS", { RMeSI, Iv64 } },
876 { "movS", { RMeDI, Iv64 } },
877 /* c0 */
878 { GRP2b },
879 { GRP2S },
880 { "retT", { Iw } },
881 { "retT", { XX } },
882 { OPC_EXT_1 },
883 { OPC_EXT_2 },
884 { GRP11_C6 },
885 { GRP11_C7 },
886 /* c8 */
887 { "enterT", { Iw, Ib } },
888 { "leaveT", { XX } },
889 { "lretP", { Iw } },
890 { "lretP", { XX } },
891 { "int3", { XX } },
892 { "int", { Ib } },
893 { "into{|}", { XX } },
894 { "iretP", { XX } },
895 /* d0 */
896 { GRP2b_one },
897 { GRP2S_one },
898 { GRP2b_cl },
899 { GRP2S_cl },
900 { "aam{|}", { sIb } },
901 { "aad{|}", { sIb } },
902 { "(bad)", { XX } },
903 { "xlat", { DSBX } },
904 /* d8 */
905 { FLOAT },
906 { FLOAT },
907 { FLOAT },
908 { FLOAT },
909 { FLOAT },
910 { FLOAT },
911 { FLOAT },
912 { FLOAT },
913 /* e0 */
914 { "loopneFH", { Jb, XX, loop_jcxz_flag } },
915 { "loopeFH", { Jb, XX, loop_jcxz_flag } },
916 { "loopFH", { Jb, XX, loop_jcxz_flag } },
917 { "jEcxzH", { Jb, XX, loop_jcxz_flag } },
918 { "inB", { AL, Ib } },
919 { "inG", { zAX, Ib } },
920 { "outB", { Ib, AL } },
921 { "outG", { Ib, zAX } },
922 /* e8 */
923 { "callT", { Jv } },
924 { "jmpT", { Jv } },
925 { "Jjmp{T|}", { Ap } },
926 { "jmp", { Jb } },
927 { "inB", { AL, indirDX } },
928 { "inG", { zAX, indirDX } },
929 { "outB", { indirDX, AL } },
930 { "outG", { indirDX, zAX } },
931 /* f0 */
932 { "(bad)", { XX } }, /* lock prefix */
933 { "icebp", { XX } },
934 { "(bad)", { XX } }, /* repne */
935 { "(bad)", { XX } }, /* repz */
936 { "hlt", { XX } },
937 { "cmc", { XX } },
938 { GRP3b },
939 { GRP3S },
940 /* f8 */
941 { "clc", { XX } },
942 { "stc", { XX } },
943 { "cli", { XX } },
944 { "sti", { XX } },
945 { "cld", { XX } },
946 { "std", { XX } },
947 { GRP4 },
948 { GRP5 },
949 };
950
951 static const struct dis386 dis386_twobyte[] = {
952 /* 00 */
953 { GRP6 },
954 { GRP7 },
955 { "larS", { Gv, Ew } },
956 { "lslS", { Gv, Ew } },
957 { "(bad)", { XX } },
958 { "syscall", { XX } },
959 { "clts", { XX } },
960 { "sysretP", { XX } },
961 /* 08 */
962 { "invd", { XX } },
963 { "wbinvd", { XX } },
964 { "(bad)", { XX } },
965 { "ud2a", { XX } },
966 { "(bad)", { XX } },
967 { GRPAMD },
968 { "femms", { XX } },
969 { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */
970 /* 10 */
971 { PREGRP8 },
972 { PREGRP9 },
973 { PREGRP30 },
974 { OPC_EXT_34 },
975 { "unpcklpX", { XM, EXq } },
976 { "unpckhpX", { XM, EXq } },
977 { PREGRP31 },
978 { OPC_EXT_35 },
979 /* 18 */
980 { GRP16 },
981 { "(bad)", { XX } },
982 { "(bad)", { XX } },
983 { "(bad)", { XX } },
984 { "(bad)", { XX } },
985 { "(bad)", { XX } },
986 { "(bad)", { XX } },
987 { "nopQ", { Ev } },
988 /* 20 */
989 { "movZ", { Rm, Cm } },
990 { "movZ", { Rm, Dm } },
991 { "movZ", { Cm, Rm } },
992 { "movZ", { Dm, Rm } },
993 { "movL", { Rd, Td } },
994 { "(bad)", { XX } },
995 { "movL", { Td, Rd } },
996 { "(bad)", { XX } },
997 /* 28 */
998 { "movapX", { XM, EXx } },
999 { "movapX", { EXx, XM } },
1000 { PREGRP2 },
1001 { PREGRP33 },
1002 { PREGRP4 },
1003 { PREGRP3 },
1004 { PREGRP93 },
1005 { PREGRP94 },
1006 /* 30 */
1007 { "wrmsr", { XX } },
1008 { "rdtsc", { XX } },
1009 { "rdmsr", { XX } },
1010 { "rdpmc", { XX } },
1011 { "sysenter", { XX } },
1012 { "sysexit", { XX } },
1013 { "(bad)", { XX } },
1014 { "(bad)", { XX } },
1015 /* 38 */
1016 { THREE_BYTE_0 },
1017 { "(bad)", { XX } },
1018 { THREE_BYTE_1 },
1019 { "(bad)", { XX } },
1020 { "(bad)", { XX } },
1021 { "(bad)", { XX } },
1022 { "(bad)", { XX } },
1023 { "(bad)", { XX } },
1024 /* 40 */
1025 { "cmovo", { Gv, Ev } },
1026 { "cmovno", { Gv, Ev } },
1027 { "cmovb", { Gv, Ev } },
1028 { "cmovae", { Gv, Ev } },
1029 { "cmove", { Gv, Ev } },
1030 { "cmovne", { Gv, Ev } },
1031 { "cmovbe", { Gv, Ev } },
1032 { "cmova", { Gv, Ev } },
1033 /* 48 */
1034 { "cmovs", { Gv, Ev } },
1035 { "cmovns", { Gv, Ev } },
1036 { "cmovp", { Gv, Ev } },
1037 { "cmovnp", { Gv, Ev } },
1038 { "cmovl", { Gv, Ev } },
1039 { "cmovge", { Gv, Ev } },
1040 { "cmovle", { Gv, Ev } },
1041 { "cmovg", { Gv, Ev } },
1042 /* 50 */
1043 { "movmskpX", { Gdq, XS } },
1044 { PREGRP13 },
1045 { PREGRP12 },
1046 { PREGRP11 },
1047 { "andpX", { XM, EXx } },
1048 { "andnpX", { XM, EXx } },
1049 { "orpX", { XM, EXx } },
1050 { "xorpX", { XM, EXx } },
1051 /* 58 */
1052 { PREGRP0 },
1053 { PREGRP10 },
1054 { PREGRP17 },
1055 { PREGRP16 },
1056 { PREGRP14 },
1057 { PREGRP7 },
1058 { PREGRP5 },
1059 { PREGRP6 },
1060 /* 60 */
1061 { PREGRP95 },
1062 { PREGRP96 },
1063 { PREGRP97 },
1064 { "packsswb", { MX, EM } },
1065 { "pcmpgtb", { MX, EM } },
1066 { "pcmpgtw", { MX, EM } },
1067 { "pcmpgtd", { MX, EM } },
1068 { "packuswb", { MX, EM } },
1069 /* 68 */
1070 { "punpckhbw", { MX, EM } },
1071 { "punpckhwd", { MX, EM } },
1072 { "punpckhdq", { MX, EM } },
1073 { "packssdw", { MX, EM } },
1074 { PREGRP26 },
1075 { PREGRP24 },
1076 { "movK", { MX, Edq } },
1077 { PREGRP19 },
1078 /* 70 */
1079 { PREGRP22 },
1080 { GRP12 },
1081 { GRP13 },
1082 { GRP14 },
1083 { "pcmpeqb", { MX, EM } },
1084 { "pcmpeqw", { MX, EM } },
1085 { "pcmpeqd", { MX, EM } },
1086 { "emms", { XX } },
1087 /* 78 */
1088 { PREGRP34 },
1089 { PREGRP35 },
1090 { "(bad)", { XX } },
1091 { "(bad)", { XX } },
1092 { PREGRP28 },
1093 { PREGRP29 },
1094 { PREGRP23 },
1095 { PREGRP20 },
1096 /* 80 */
1097 { "joH", { Jv, XX, cond_jump_flag } },
1098 { "jnoH", { Jv, XX, cond_jump_flag } },
1099 { "jbH", { Jv, XX, cond_jump_flag } },
1100 { "jaeH", { Jv, XX, cond_jump_flag } },
1101 { "jeH", { Jv, XX, cond_jump_flag } },
1102 { "jneH", { Jv, XX, cond_jump_flag } },
1103 { "jbeH", { Jv, XX, cond_jump_flag } },
1104 { "jaH", { Jv, XX, cond_jump_flag } },
1105 /* 88 */
1106 { "jsH", { Jv, XX, cond_jump_flag } },
1107 { "jnsH", { Jv, XX, cond_jump_flag } },
1108 { "jpH", { Jv, XX, cond_jump_flag } },
1109 { "jnpH", { Jv, XX, cond_jump_flag } },
1110 { "jlH", { Jv, XX, cond_jump_flag } },
1111 { "jgeH", { Jv, XX, cond_jump_flag } },
1112 { "jleH", { Jv, XX, cond_jump_flag } },
1113 { "jgH", { Jv, XX, cond_jump_flag } },
1114 /* 90 */
1115 { "seto", { Eb } },
1116 { "setno", { Eb } },
1117 { "setb", { Eb } },
1118 { "setae", { Eb } },
1119 { "sete", { Eb } },
1120 { "setne", { Eb } },
1121 { "setbe", { Eb } },
1122 { "seta", { Eb } },
1123 /* 98 */
1124 { "sets", { Eb } },
1125 { "setns", { Eb } },
1126 { "setp", { Eb } },
1127 { "setnp", { Eb } },
1128 { "setl", { Eb } },
1129 { "setge", { Eb } },
1130 { "setle", { Eb } },
1131 { "setg", { Eb } },
1132 /* a0 */
1133 { "pushT", { fs } },
1134 { "popT", { fs } },
1135 { "cpuid", { XX } },
1136 { "btS", { Ev, Gv } },
1137 { "shldS", { Ev, Gv, Ib } },
1138 { "shldS", { Ev, Gv, CL } },
1139 { GRPPADLCK2 },
1140 { GRPPADLCK1 },
1141 /* a8 */
1142 { "pushT", { gs } },
1143 { "popT", { gs } },
1144 { "rsm", { XX } },
1145 { "btsS", { Ev, Gv } },
1146 { "shrdS", { Ev, Gv, Ib } },
1147 { "shrdS", { Ev, Gv, CL } },
1148 { GRP15 },
1149 { "imulS", { Gv, Ev } },
1150 /* b0 */
1151 { "cmpxchgB", { Eb, Gb } },
1152 { "cmpxchgS", { Ev, Gv } },
1153 { OPC_EXT_3 },
1154 { "btrS", { Ev, Gv } },
1155 { OPC_EXT_4 },
1156 { OPC_EXT_5 },
1157 { "movz{bR|x|bR|x}", { Gv, Eb } },
1158 { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
1159 /* b8 */
1160 { PREGRP37 },
1161 { "ud2b", { XX } },
1162 { GRP8 },
1163 { "btcS", { Ev, Gv } },
1164 { "bsfS", { Gv, Ev } },
1165 { PREGRP36 },
1166 { "movs{bR|x|bR|x}", { Gv, Eb } },
1167 { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */
1168 /* c0 */
1169 { "xaddB", { Eb, Gb } },
1170 { "xaddS", { Ev, Gv } },
1171 { PREGRP1 },
1172 { "movntiS", { Ev, Gv } },
1173 { "pinsrw", { MX, Edqw, Ib } },
1174 { "pextrw", { Gdq, MS, Ib } },
1175 { "shufpX", { XM, EXx, Ib } },
1176 { GRP9 },
1177 /* c8 */
1178 { "bswap", { RMeAX } },
1179 { "bswap", { RMeCX } },
1180 { "bswap", { RMeDX } },
1181 { "bswap", { RMeBX } },
1182 { "bswap", { RMeSP } },
1183 { "bswap", { RMeBP } },
1184 { "bswap", { RMeSI } },
1185 { "bswap", { RMeDI } },
1186 /* d0 */
1187 { PREGRP27 },
1188 { "psrlw", { MX, EM } },
1189 { "psrld", { MX, EM } },
1190 { "psrlq", { MX, EM } },
1191 { "paddq", { MX, EM } },
1192 { "pmullw", { MX, EM } },
1193 { PREGRP21 },
1194 { "pmovmskb", { Gdq, MS } },
1195 /* d8 */
1196 { "psubusb", { MX, EM } },
1197 { "psubusw", { MX, EM } },
1198 { "pminub", { MX, EM } },
1199 { "pand", { MX, EM } },
1200 { "paddusb", { MX, EM } },
1201 { "paddusw", { MX, EM } },
1202 { "pmaxub", { MX, EM } },
1203 { "pandn", { MX, EM } },
1204 /* e0 */
1205 { "pavgb", { MX, EM } },
1206 { "psraw", { MX, EM } },
1207 { "psrad", { MX, EM } },
1208 { "pavgw", { MX, EM } },
1209 { "pmulhuw", { MX, EM } },
1210 { "pmulhw", { MX, EM } },
1211 { PREGRP15 },
1212 { PREGRP25 },
1213 /* e8 */
1214 { "psubsb", { MX, EM } },
1215 { "psubsw", { MX, EM } },
1216 { "pminsw", { MX, EM } },
1217 { "por", { MX, EM } },
1218 { "paddsb", { MX, EM } },
1219 { "paddsw", { MX, EM } },
1220 { "pmaxsw", { MX, EM } },
1221 { "pxor", { MX, EM } },
1222 /* f0 */
1223 { PREGRP32 },
1224 { "psllw", { MX, EM } },
1225 { "pslld", { MX, EM } },
1226 { "psllq", { MX, EM } },
1227 { "pmuludq", { MX, EM } },
1228 { "pmaddwd", { MX, EM } },
1229 { "psadbw", { MX, EM } },
1230 { PREGRP18 },
1231 /* f8 */
1232 { "psubb", { MX, EM } },
1233 { "psubw", { MX, EM } },
1234 { "psubd", { MX, EM } },
1235 { "psubq", { MX, EM } },
1236 { "paddb", { MX, EM } },
1237 { "paddw", { MX, EM } },
1238 { "paddd", { MX, EM } },
1239 { "(bad)", { XX } },
1240 };
1241
1242 static const unsigned char onebyte_has_modrm[256] = {
1243 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1244 /* ------------------------------- */
1245 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1246 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1247 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1248 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1249 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1250 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1251 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1252 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1253 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1254 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1255 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1256 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1257 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1258 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1259 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1260 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1261 /* ------------------------------- */
1262 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1263 };
1264
1265 static const unsigned char twobyte_has_modrm[256] = {
1266 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1267 /* ------------------------------- */
1268 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1269 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1270 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1271 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1272 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1273 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1274 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1275 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1276 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1277 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1278 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1279 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1280 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1281 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1282 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1283 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1284 /* ------------------------------- */
1285 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1286 };
1287
1288 static char obuf[100];
1289 static char *obufp;
1290 static char scratchbuf[100];
1291 static unsigned char *start_codep;
1292 static unsigned char *insn_codep;
1293 static unsigned char *codep;
1294 static const char *lock_prefix;
1295 static const char *data_prefix;
1296 static const char *addr_prefix;
1297 static const char *repz_prefix;
1298 static const char *repnz_prefix;
1299 static disassemble_info *the_info;
1300 static struct
1301 {
1302 int mod;
1303 int reg;
1304 int rm;
1305 }
1306 modrm;
1307 static unsigned char need_modrm;
1308
1309 /* If we are accessing mod/rm/reg without need_modrm set, then the
1310 values are stale. Hitting this abort likely indicates that you
1311 need to update onebyte_has_modrm or twobyte_has_modrm. */
1312 #define MODRM_CHECK if (!need_modrm) abort ()
1313
1314 static const char **names64;
1315 static const char **names32;
1316 static const char **names16;
1317 static const char **names8;
1318 static const char **names8rex;
1319 static const char **names_seg;
1320 static const char **index16;
1321
1322 static const char *intel_names64[] = {
1323 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1324 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1325 };
1326 static const char *intel_names32[] = {
1327 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1328 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1329 };
1330 static const char *intel_names16[] = {
1331 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1332 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1333 };
1334 static const char *intel_names8[] = {
1335 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1336 };
1337 static const char *intel_names8rex[] = {
1338 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1339 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1340 };
1341 static const char *intel_names_seg[] = {
1342 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1343 };
1344 static const char *intel_index16[] = {
1345 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1346 };
1347
1348 static const char *att_names64[] = {
1349 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1350 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1351 };
1352 static const char *att_names32[] = {
1353 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1354 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1355 };
1356 static const char *att_names16[] = {
1357 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1358 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1359 };
1360 static const char *att_names8[] = {
1361 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1362 };
1363 static const char *att_names8rex[] = {
1364 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1365 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1366 };
1367 static const char *att_names_seg[] = {
1368 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1369 };
1370 static const char *att_index16[] = {
1371 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1372 };
1373
1374 static const struct dis386 grps[][8] = {
1375 /* GRP1a */
1376 {
1377 { "popU", { stackEv } },
1378 { "(bad)", { XX } },
1379 { "(bad)", { XX } },
1380 { "(bad)", { XX } },
1381 { "(bad)", { XX } },
1382 { "(bad)", { XX } },
1383 { "(bad)", { XX } },
1384 { "(bad)", { XX } },
1385 },
1386 /* GRP1b */
1387 {
1388 { "addA", { Eb, Ib } },
1389 { "orA", { Eb, Ib } },
1390 { "adcA", { Eb, Ib } },
1391 { "sbbA", { Eb, Ib } },
1392 { "andA", { Eb, Ib } },
1393 { "subA", { Eb, Ib } },
1394 { "xorA", { Eb, Ib } },
1395 { "cmpA", { Eb, Ib } },
1396 },
1397 /* GRP1S */
1398 {
1399 { "addQ", { Ev, Iv } },
1400 { "orQ", { Ev, Iv } },
1401 { "adcQ", { Ev, Iv } },
1402 { "sbbQ", { Ev, Iv } },
1403 { "andQ", { Ev, Iv } },
1404 { "subQ", { Ev, Iv } },
1405 { "xorQ", { Ev, Iv } },
1406 { "cmpQ", { Ev, Iv } },
1407 },
1408 /* GRP1Ss */
1409 {
1410 { "addQ", { Ev, sIb } },
1411 { "orQ", { Ev, sIb } },
1412 { "adcQ", { Ev, sIb } },
1413 { "sbbQ", { Ev, sIb } },
1414 { "andQ", { Ev, sIb } },
1415 { "subQ", { Ev, sIb } },
1416 { "xorQ", { Ev, sIb } },
1417 { "cmpQ", { Ev, sIb } },
1418 },
1419 /* GRP2b */
1420 {
1421 { "rolA", { Eb, Ib } },
1422 { "rorA", { Eb, Ib } },
1423 { "rclA", { Eb, Ib } },
1424 { "rcrA", { Eb, Ib } },
1425 { "shlA", { Eb, Ib } },
1426 { "shrA", { Eb, Ib } },
1427 { "(bad)", { XX } },
1428 { "sarA", { Eb, Ib } },
1429 },
1430 /* GRP2S */
1431 {
1432 { "rolQ", { Ev, Ib } },
1433 { "rorQ", { Ev, Ib } },
1434 { "rclQ", { Ev, Ib } },
1435 { "rcrQ", { Ev, Ib } },
1436 { "shlQ", { Ev, Ib } },
1437 { "shrQ", { Ev, Ib } },
1438 { "(bad)", { XX } },
1439 { "sarQ", { Ev, Ib } },
1440 },
1441 /* GRP2b_one */
1442 {
1443 { "rolA", { Eb, I1 } },
1444 { "rorA", { Eb, I1 } },
1445 { "rclA", { Eb, I1 } },
1446 { "rcrA", { Eb, I1 } },
1447 { "shlA", { Eb, I1 } },
1448 { "shrA", { Eb, I1 } },
1449 { "(bad)", { XX } },
1450 { "sarA", { Eb, I1 } },
1451 },
1452 /* GRP2S_one */
1453 {
1454 { "rolQ", { Ev, I1 } },
1455 { "rorQ", { Ev, I1 } },
1456 { "rclQ", { Ev, I1 } },
1457 { "rcrQ", { Ev, I1 } },
1458 { "shlQ", { Ev, I1 } },
1459 { "shrQ", { Ev, I1 } },
1460 { "(bad)", { XX } },
1461 { "sarQ", { Ev, I1 } },
1462 },
1463 /* GRP2b_cl */
1464 {
1465 { "rolA", { Eb, CL } },
1466 { "rorA", { Eb, CL } },
1467 { "rclA", { Eb, CL } },
1468 { "rcrA", { Eb, CL } },
1469 { "shlA", { Eb, CL } },
1470 { "shrA", { Eb, CL } },
1471 { "(bad)", { XX } },
1472 { "sarA", { Eb, CL } },
1473 },
1474 /* GRP2S_cl */
1475 {
1476 { "rolQ", { Ev, CL } },
1477 { "rorQ", { Ev, CL } },
1478 { "rclQ", { Ev, CL } },
1479 { "rcrQ", { Ev, CL } },
1480 { "shlQ", { Ev, CL } },
1481 { "shrQ", { Ev, CL } },
1482 { "(bad)", { XX } },
1483 { "sarQ", { Ev, CL } },
1484 },
1485 /* GRP3b */
1486 {
1487 { "testA", { Eb, Ib } },
1488 { "(bad)", { Eb } },
1489 { "notA", { Eb } },
1490 { "negA", { Eb } },
1491 { "mulA", { Eb } }, /* Don't print the implicit %al register, */
1492 { "imulA", { Eb } }, /* to distinguish these opcodes from other */
1493 { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */
1494 { "idivA", { Eb } }, /* and idiv for consistency. */
1495 },
1496 /* GRP3S */
1497 {
1498 { "testQ", { Ev, Iv } },
1499 { "(bad)", { XX } },
1500 { "notQ", { Ev } },
1501 { "negQ", { Ev } },
1502 { "mulQ", { Ev } }, /* Don't print the implicit register. */
1503 { "imulQ", { Ev } },
1504 { "divQ", { Ev } },
1505 { "idivQ", { Ev } },
1506 },
1507 /* GRP4 */
1508 {
1509 { "incA", { Eb } },
1510 { "decA", { Eb } },
1511 { "(bad)", { XX } },
1512 { "(bad)", { XX } },
1513 { "(bad)", { XX } },
1514 { "(bad)", { XX } },
1515 { "(bad)", { XX } },
1516 { "(bad)", { XX } },
1517 },
1518 /* GRP5 */
1519 {
1520 { "incQ", { Ev } },
1521 { "decQ", { Ev } },
1522 { "callT", { indirEv } },
1523 { "JcallT", { indirEp } },
1524 { "jmpT", { indirEv } },
1525 { "JjmpT", { indirEp } },
1526 { "pushU", { stackEv } },
1527 { "(bad)", { XX } },
1528 },
1529 /* GRP6 */
1530 {
1531 { "sldtD", { Sv } },
1532 { "strD", { Sv } },
1533 { "lldt", { Ew } },
1534 { "ltr", { Ew } },
1535 { "verr", { Ew } },
1536 { "verw", { Ew } },
1537 { "(bad)", { XX } },
1538 { "(bad)", { XX } },
1539 },
1540 /* GRP7 */
1541 {
1542 { OPC_EXT_6 },
1543 { OPC_EXT_7 },
1544 { OPC_EXT_8 },
1545 { OPC_EXT_39 },
1546 { "smswD", { Sv } },
1547 { "(bad)", { XX } },
1548 { "lmsw", { Ew } },
1549 { OPC_EXT_38 },
1550 },
1551 /* GRP8 */
1552 {
1553 { "(bad)", { XX } },
1554 { "(bad)", { XX } },
1555 { "(bad)", { XX } },
1556 { "(bad)", { XX } },
1557 { "btQ", { Ev, Ib } },
1558 { "btsQ", { Ev, Ib } },
1559 { "btrQ", { Ev, Ib } },
1560 { "btcQ", { Ev, Ib } },
1561 },
1562 /* GRP9 */
1563 {
1564 { "(bad)", { XX } },
1565 { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1566 { "(bad)", { XX } },
1567 { "(bad)", { XX } },
1568 { "(bad)", { XX } },
1569 { "(bad)", { XX } },
1570 { OPC_EXT_9 },
1571 { OPC_EXT_10 },
1572 },
1573 /* GRP11_C6 */
1574 {
1575 { "movA", { Eb, Ib } },
1576 { "(bad)", { XX } },
1577 { "(bad)", { XX } },
1578 { "(bad)", { XX } },
1579 { "(bad)", { XX } },
1580 { "(bad)", { XX } },
1581 { "(bad)", { XX } },
1582 { "(bad)", { XX } },
1583 },
1584 /* GRP11_C7 */
1585 {
1586 { "movQ", { Ev, Iv } },
1587 { "(bad)", { XX } },
1588 { "(bad)", { XX } },
1589 { "(bad)", { XX } },
1590 { "(bad)", { XX } },
1591 { "(bad)", { XX } },
1592 { "(bad)", { XX } },
1593 { "(bad)", { XX } },
1594 },
1595 /* GRP12 */
1596 {
1597 { "(bad)", { XX } },
1598 { "(bad)", { XX } },
1599 { OPC_EXT_11 },
1600 { "(bad)", { XX } },
1601 { OPC_EXT_12 },
1602 { "(bad)", { XX } },
1603 { OPC_EXT_13 },
1604 { "(bad)", { XX } },
1605 },
1606 /* GRP13 */
1607 {
1608 { "(bad)", { XX } },
1609 { "(bad)", { XX } },
1610 { OPC_EXT_14 },
1611 { "(bad)", { XX } },
1612 { OPC_EXT_15 },
1613 { "(bad)", { XX } },
1614 { OPC_EXT_16 },
1615 { "(bad)", { XX } },
1616 },
1617 /* GRP14 */
1618 {
1619 { "(bad)", { XX } },
1620 { "(bad)", { XX } },
1621 { OPC_EXT_17 },
1622 { OPC_EXT_18 },
1623 { "(bad)", { XX } },
1624 { "(bad)", { XX } },
1625 { OPC_EXT_19 },
1626 { OPC_EXT_20 },
1627 },
1628 /* GRP15 */
1629 {
1630 { OPC_EXT_21 },
1631 { OPC_EXT_22 },
1632 { OPC_EXT_23 },
1633 { OPC_EXT_24 },
1634 { "(bad)", { XX } },
1635 { OPC_EXT_25 },
1636 { OPC_EXT_26 },
1637 { OPC_EXT_27 },
1638 },
1639 /* GRP16 */
1640 {
1641 { OPC_EXT_28 },
1642 { OPC_EXT_29 },
1643 { OPC_EXT_30 },
1644 { OPC_EXT_31 },
1645 { "(bad)", { XX } },
1646 { "(bad)", { XX } },
1647 { "(bad)", { XX } },
1648 { "(bad)", { XX } },
1649 },
1650 /* GRPAMD */
1651 {
1652 { "prefetch", { Eb } },
1653 { "prefetchw", { Eb } },
1654 { "(bad)", { XX } },
1655 { "(bad)", { XX } },
1656 { "(bad)", { XX } },
1657 { "(bad)", { XX } },
1658 { "(bad)", { XX } },
1659 { "(bad)", { XX } },
1660 },
1661 /* GRPPADLCK1 */
1662 {
1663 { "xstore-rng", { { OP_0f07, 0 } } },
1664 { "xcrypt-ecb", { { OP_0f07, 0 } } },
1665 { "xcrypt-cbc", { { OP_0f07, 0 } } },
1666 { "xcrypt-ctr", { { OP_0f07, 0 } } },
1667 { "xcrypt-cfb", { { OP_0f07, 0 } } },
1668 { "xcrypt-ofb", { { OP_0f07, 0 } } },
1669 { "(bad)", { { OP_0f07, 0 } } },
1670 { "(bad)", { { OP_0f07, 0 } } },
1671 },
1672 /* GRPPADLCK2 */
1673 {
1674 { "montmul", { { OP_0f07, 0 } } },
1675 { "xsha1", { { OP_0f07, 0 } } },
1676 { "xsha256", { { OP_0f07, 0 } } },
1677 { "(bad)", { { OP_0f07, 0 } } },
1678 { "(bad)", { { OP_0f07, 0 } } },
1679 { "(bad)", { { OP_0f07, 0 } } },
1680 { "(bad)", { { OP_0f07, 0 } } },
1681 { "(bad)", { { OP_0f07, 0 } } },
1682 }
1683 };
1684
1685 static const struct dis386 prefix_user_table[][4] = {
1686 /* PREGRP0 */
1687 {
1688 { "addps", { XM, EXx } },
1689 { "addss", { XM, EXd } },
1690 { "addpd", { XM, EXx } },
1691 { "addsd", { XM, EXq } },
1692 },
1693 /* PREGRP1 */
1694 {
1695 { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */
1696 { "", { XM, EXd, OPSIMD } },
1697 { "", { XM, EXx, OPSIMD } },
1698 { "", { XM, EXq, OPSIMD } },
1699 },
1700 /* PREGRP2 */
1701 {
1702 { "cvtpi2ps", { XM, EMCq } },
1703 { "cvtsi2ssY", { XM, Ev } },
1704 { "cvtpi2pd", { XM, EMCq } },
1705 { "cvtsi2sdY", { XM, Ev } },
1706 },
1707 /* PREGRP3 */
1708 {
1709 { "cvtps2pi", { MXC, EXq } },
1710 { "cvtss2siY", { Gv, EXd } },
1711 { "cvtpd2pi", { MXC, EXx } },
1712 { "cvtsd2siY", { Gv, EXq } },
1713 },
1714 /* PREGRP4 */
1715 {
1716 { "cvttps2pi", { MXC, EXq } },
1717 { "cvttss2siY", { Gv, EXd } },
1718 { "cvttpd2pi", { MXC, EXx } },
1719 { "cvttsd2siY", { Gv, EXq } },
1720 },
1721 /* PREGRP5 */
1722 {
1723 { "divps", { XM, EXx } },
1724 { "divss", { XM, EXd } },
1725 { "divpd", { XM, EXx } },
1726 { "divsd", { XM, EXq } },
1727 },
1728 /* PREGRP6 */
1729 {
1730 { "maxps", { XM, EXx } },
1731 { "maxss", { XM, EXd } },
1732 { "maxpd", { XM, EXx } },
1733 { "maxsd", { XM, EXq } },
1734 },
1735 /* PREGRP7 */
1736 {
1737 { "minps", { XM, EXx } },
1738 { "minss", { XM, EXd } },
1739 { "minpd", { XM, EXx } },
1740 { "minsd", { XM, EXq } },
1741 },
1742 /* PREGRP8 */
1743 {
1744 { "movups", { XM, EXx } },
1745 { "movss", { XM, EXd } },
1746 { "movupd", { XM, EXx } },
1747 { "movsd", { XM, EXq } },
1748 },
1749 /* PREGRP9 */
1750 {
1751 { "movups", { EXx, XM } },
1752 { "movss", { EXd, XM } },
1753 { "movupd", { EXx, XM } },
1754 { "movsd", { EXq, XM } },
1755 },
1756 /* PREGRP10 */
1757 {
1758 { "mulps", { XM, EXx } },
1759 { "mulss", { XM, EXd } },
1760 { "mulpd", { XM, EXx } },
1761 { "mulsd", { XM, EXq } },
1762 },
1763 /* PREGRP11 */
1764 {
1765 { "rcpps", { XM, EXx } },
1766 { "rcpss", { XM, EXd } },
1767 { "(bad)", { XM, EXx } },
1768 { "(bad)", { XM, EXx } },
1769 },
1770 /* PREGRP12 */
1771 {
1772 { "rsqrtps",{ XM, EXx } },
1773 { "rsqrtss",{ XM, EXd } },
1774 { "(bad)", { XM, EXx } },
1775 { "(bad)", { XM, EXx } },
1776 },
1777 /* PREGRP13 */
1778 {
1779 { "sqrtps", { XM, EXx } },
1780 { "sqrtss", { XM, EXd } },
1781 { "sqrtpd", { XM, EXx } },
1782 { "sqrtsd", { XM, EXq } },
1783 },
1784 /* PREGRP14 */
1785 {
1786 { "subps", { XM, EXx } },
1787 { "subss", { XM, EXd } },
1788 { "subpd", { XM, EXx } },
1789 { "subsd", { XM, EXq } },
1790 },
1791 /* PREGRP15 */
1792 {
1793 { "(bad)", { XM, EXx } },
1794 { "cvtdq2pd", { XM, EXq } },
1795 { "cvttpd2dq", { XM, EXx } },
1796 { "cvtpd2dq", { XM, EXx } },
1797 },
1798 /* PREGRP16 */
1799 {
1800 { "cvtdq2ps", { XM, EXx } },
1801 { "cvttps2dq", { XM, EXx } },
1802 { "cvtps2dq", { XM, EXx } },
1803 { "(bad)", { XM, EXx } },
1804 },
1805 /* PREGRP17 */
1806 {
1807 { "cvtps2pd", { XM, EXq } },
1808 { "cvtss2sd", { XM, EXd } },
1809 { "cvtpd2ps", { XM, EXx } },
1810 { "cvtsd2ss", { XM, EXq } },
1811 },
1812 /* PREGRP18 */
1813 {
1814 { "maskmovq", { MX, MS } },
1815 { "(bad)", { XM, EXx } },
1816 { "maskmovdqu", { XM, XS } },
1817 { "(bad)", { XM, EXx } },
1818 },
1819 /* PREGRP19 */
1820 {
1821 { "movq", { MX, EM } },
1822 { "movdqu", { XM, EXx } },
1823 { "movdqa", { XM, EXx } },
1824 { "(bad)", { XM, EXx } },
1825 },
1826 /* PREGRP20 */
1827 {
1828 { "movq", { EM, MX } },
1829 { "movdqu", { EXx, XM } },
1830 { "movdqa", { EXx, XM } },
1831 { "(bad)", { EXx, XM } },
1832 },
1833 /* PREGRP21 */
1834 {
1835 { "(bad)", { EXx, XM } },
1836 { "movq2dq",{ XM, MS } },
1837 { "movq", { EXq, XM } },
1838 { "movdq2q",{ MX, XS } },
1839 },
1840 /* PREGRP22 */
1841 {
1842 { "pshufw", { MX, EM, Ib } },
1843 { "pshufhw",{ XM, EXx, Ib } },
1844 { "pshufd", { XM, EXx, Ib } },
1845 { "pshuflw",{ XM, EXx, Ib } },
1846 },
1847 /* PREGRP23 */
1848 {
1849 { "movK", { Edq, MX } },
1850 { "movq", { XM, EXq } },
1851 { "movK", { Edq, XM } },
1852 { "(bad)", { Ed, XM } },
1853 },
1854 /* PREGRP24 */
1855 {
1856 { "(bad)", { MX, EXx } },
1857 { "(bad)", { XM, EXx } },
1858 { "punpckhqdq", { XM, EXx } },
1859 { "(bad)", { XM, EXx } },
1860 },
1861 /* PREGRP25 */
1862 {
1863 { "movntq", { EM, MX } },
1864 { "(bad)", { EM, XM } },
1865 { "movntdq",{ EM, XM } },
1866 { "(bad)", { EM, XM } },
1867 },
1868 /* PREGRP26 */
1869 {
1870 { "(bad)", { MX, EXx } },
1871 { "(bad)", { XM, EXx } },
1872 { "punpcklqdq", { XM, EXx } },
1873 { "(bad)", { XM, EXx } },
1874 },
1875 /* PREGRP27 */
1876 {
1877 { "(bad)", { MX, EXx } },
1878 { "(bad)", { XM, EXx } },
1879 { "addsubpd", { XM, EXx } },
1880 { "addsubps", { XM, EXx } },
1881 },
1882 /* PREGRP28 */
1883 {
1884 { "(bad)", { MX, EXx } },
1885 { "(bad)", { XM, EXx } },
1886 { "haddpd", { XM, EXx } },
1887 { "haddps", { XM, EXx } },
1888 },
1889 /* PREGRP29 */
1890 {
1891 { "(bad)", { MX, EXx } },
1892 { "(bad)", { XM, EXx } },
1893 { "hsubpd", { XM, EXx } },
1894 { "hsubps", { XM, EXx } },
1895 },
1896 /* PREGRP30 */
1897 {
1898 { OPC_EXT_36 },
1899 { "movsldup", { XM, EXx } },
1900 { "movlpd", { XM, EXq } },
1901 { "movddup", { XM, EXq } },
1902 },
1903 /* PREGRP31 */
1904 {
1905 { OPC_EXT_37 },
1906 { "movshdup", { XM, EXx } },
1907 { "movhpd", { XM, EXq } },
1908 { "(bad)", { XM, EXq } },
1909 },
1910 /* PREGRP32 */
1911 {
1912 { "(bad)", { XM, EXx } },
1913 { "(bad)", { XM, EXx } },
1914 { "(bad)", { XM, EXx } },
1915 { OPC_EXT_32 },
1916 },
1917 /* PREGRP33 */
1918 {
1919 {"movntps", { Ev, XM } },
1920 {"movntss", { Ed, XM } },
1921 {"movntpd", { Ev, XM } },
1922 {"movntsd", { Eq, XM } },
1923 },
1924
1925 /* PREGRP34 */
1926 {
1927 {"vmread", { Em, Gm } },
1928 {"(bad)", { XX } },
1929 {"extrq", { XS, Ib, Ib } },
1930 {"insertq", { XM, XS, Ib, Ib } },
1931 },
1932
1933 /* PREGRP35 */
1934 {
1935 {"vmwrite", { Gm, Em } },
1936 {"(bad)", { XX } },
1937 {"extrq", { XM, XS } },
1938 {"insertq", { XM, XS } },
1939 },
1940
1941 /* PREGRP36 */
1942 {
1943 { "bsrS", { Gv, Ev } },
1944 { "lzcntS", { Gv, Ev } },
1945 { "bsrS", { Gv, Ev } },
1946 { "(bad)", { XX } },
1947 },
1948
1949 /* PREGRP37 */
1950 {
1951 { "(bad)", { XX } },
1952 { "popcntS", { Gv, Ev } },
1953 { "(bad)", { XX } },
1954 { "(bad)", { XX } },
1955 },
1956
1957 /* PREGRP38 */
1958 {
1959 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
1960 { "pause", { XX } },
1961 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
1962 { "(bad)", { XX } },
1963 },
1964
1965 /* PREGRP39 */
1966 {
1967 { "(bad)", { XX } },
1968 { "(bad)", { XX } },
1969 { "pblendvb", {XM, EXx, XMM0 } },
1970 { "(bad)", { XX } },
1971 },
1972
1973 /* PREGRP40 */
1974 {
1975 { "(bad)", { XX } },
1976 { "(bad)", { XX } },
1977 { "blendvps", {XM, EXx, XMM0 } },
1978 { "(bad)", { XX } },
1979 },
1980
1981 /* PREGRP41 */
1982 {
1983 { "(bad)", { XX } },
1984 { "(bad)", { XX } },
1985 { "blendvpd", { XM, EXx, XMM0 } },
1986 { "(bad)", { XX } },
1987 },
1988
1989 /* PREGRP42 */
1990 {
1991 { "(bad)", { XX } },
1992 { "(bad)", { XX } },
1993 { "ptest", { XM, EXx } },
1994 { "(bad)", { XX } },
1995 },
1996
1997 /* PREGRP43 */
1998 {
1999 { "(bad)", { XX } },
2000 { "(bad)", { XX } },
2001 { "pmovsxbw", { XM, EXq } },
2002 { "(bad)", { XX } },
2003 },
2004
2005 /* PREGRP44 */
2006 {
2007 { "(bad)", { XX } },
2008 { "(bad)", { XX } },
2009 { "pmovsxbd", { XM, EXd } },
2010 { "(bad)", { XX } },
2011 },
2012
2013 /* PREGRP45 */
2014 {
2015 { "(bad)", { XX } },
2016 { "(bad)", { XX } },
2017 { "pmovsxbq", { XM, EXw } },
2018 { "(bad)", { XX } },
2019 },
2020
2021 /* PREGRP46 */
2022 {
2023 { "(bad)", { XX } },
2024 { "(bad)", { XX } },
2025 { "pmovsxwd", { XM, EXq } },
2026 { "(bad)", { XX } },
2027 },
2028
2029 /* PREGRP47 */
2030 {
2031 { "(bad)", { XX } },
2032 { "(bad)", { XX } },
2033 { "pmovsxwq", { XM, EXd } },
2034 { "(bad)", { XX } },
2035 },
2036
2037 /* PREGRP48 */
2038 {
2039 { "(bad)", { XX } },
2040 { "(bad)", { XX } },
2041 { "pmovsxdq", { XM, EXq } },
2042 { "(bad)", { XX } },
2043 },
2044
2045 /* PREGRP49 */
2046 {
2047 { "(bad)", { XX } },
2048 { "(bad)", { XX } },
2049 { "pmuldq", { XM, EXx } },
2050 { "(bad)", { XX } },
2051 },
2052
2053 /* PREGRP50 */
2054 {
2055 { "(bad)", { XX } },
2056 { "(bad)", { XX } },
2057 { "pcmpeqq", { XM, EXx } },
2058 { "(bad)", { XX } },
2059 },
2060
2061 /* PREGRP51 */
2062 {
2063 { "(bad)", { XX } },
2064 { "(bad)", { XX } },
2065 { "movntdqa", { XM, EM } },
2066 { "(bad)", { XX } },
2067 },
2068
2069 /* PREGRP52 */
2070 {
2071 { "(bad)", { XX } },
2072 { "(bad)", { XX } },
2073 { "packusdw", { XM, EXx } },
2074 { "(bad)", { XX } },
2075 },
2076
2077 /* PREGRP53 */
2078 {
2079 { "(bad)", { XX } },
2080 { "(bad)", { XX } },
2081 { "pmovzxbw", { XM, EXq } },
2082 { "(bad)", { XX } },
2083 },
2084
2085 /* PREGRP54 */
2086 {
2087 { "(bad)", { XX } },
2088 { "(bad)", { XX } },
2089 { "pmovzxbd", { XM, EXd } },
2090 { "(bad)", { XX } },
2091 },
2092
2093 /* PREGRP55 */
2094 {
2095 { "(bad)", { XX } },
2096 { "(bad)", { XX } },
2097 { "pmovzxbq", { XM, EXw } },
2098 { "(bad)", { XX } },
2099 },
2100
2101 /* PREGRP56 */
2102 {
2103 { "(bad)", { XX } },
2104 { "(bad)", { XX } },
2105 { "pmovzxwd", { XM, EXq } },
2106 { "(bad)", { XX } },
2107 },
2108
2109 /* PREGRP57 */
2110 {
2111 { "(bad)", { XX } },
2112 { "(bad)", { XX } },
2113 { "pmovzxwq", { XM, EXd } },
2114 { "(bad)", { XX } },
2115 },
2116
2117 /* PREGRP58 */
2118 {
2119 { "(bad)", { XX } },
2120 { "(bad)", { XX } },
2121 { "pmovzxdq", { XM, EXq } },
2122 { "(bad)", { XX } },
2123 },
2124
2125 /* PREGRP59 */
2126 {
2127 { "(bad)", { XX } },
2128 { "(bad)", { XX } },
2129 { "pminsb", { XM, EXx } },
2130 { "(bad)", { XX } },
2131 },
2132
2133 /* PREGRP60 */
2134 {
2135 { "(bad)", { XX } },
2136 { "(bad)", { XX } },
2137 { "pminsd", { XM, EXx } },
2138 { "(bad)", { XX } },
2139 },
2140
2141 /* PREGRP61 */
2142 {
2143 { "(bad)", { XX } },
2144 { "(bad)", { XX } },
2145 { "pminuw", { XM, EXx } },
2146 { "(bad)", { XX } },
2147 },
2148
2149 /* PREGRP62 */
2150 {
2151 { "(bad)", { XX } },
2152 { "(bad)", { XX } },
2153 { "pminud", { XM, EXx } },
2154 { "(bad)", { XX } },
2155 },
2156
2157 /* PREGRP63 */
2158 {
2159 { "(bad)", { XX } },
2160 { "(bad)", { XX } },
2161 { "pmaxsb", { XM, EXx } },
2162 { "(bad)", { XX } },
2163 },
2164
2165 /* PREGRP64 */
2166 {
2167 { "(bad)", { XX } },
2168 { "(bad)", { XX } },
2169 { "pmaxsd", { XM, EXx } },
2170 { "(bad)", { XX } },
2171 },
2172
2173 /* PREGRP65 */
2174 {
2175 { "(bad)", { XX } },
2176 { "(bad)", { XX } },
2177 { "pmaxuw", { XM, EXx } },
2178 { "(bad)", { XX } },
2179 },
2180
2181 /* PREGRP66 */
2182 {
2183 { "(bad)", { XX } },
2184 { "(bad)", { XX } },
2185 { "pmaxud", { XM, EXx } },
2186 { "(bad)", { XX } },
2187 },
2188
2189 /* PREGRP67 */
2190 {
2191 { "(bad)", { XX } },
2192 { "(bad)", { XX } },
2193 { "pmulld", { XM, EXx } },
2194 { "(bad)", { XX } },
2195 },
2196
2197 /* PREGRP68 */
2198 {
2199 { "(bad)", { XX } },
2200 { "(bad)", { XX } },
2201 { "phminposuw", { XM, EXx } },
2202 { "(bad)", { XX } },
2203 },
2204
2205 /* PREGRP69 */
2206 {
2207 { "(bad)", { XX } },
2208 { "(bad)", { XX } },
2209 { "roundps", { XM, EXx, Ib } },
2210 { "(bad)", { XX } },
2211 },
2212
2213 /* PREGRP70 */
2214 {
2215 { "(bad)", { XX } },
2216 { "(bad)", { XX } },
2217 { "roundpd", { XM, EXx, Ib } },
2218 { "(bad)", { XX } },
2219 },
2220
2221 /* PREGRP71 */
2222 {
2223 { "(bad)", { XX } },
2224 { "(bad)", { XX } },
2225 { "roundss", { XM, EXd, Ib } },
2226 { "(bad)", { XX } },
2227 },
2228
2229 /* PREGRP72 */
2230 {
2231 { "(bad)", { XX } },
2232 { "(bad)", { XX } },
2233 { "roundsd", { XM, EXq, Ib } },
2234 { "(bad)", { XX } },
2235 },
2236
2237 /* PREGRP73 */
2238 {
2239 { "(bad)", { XX } },
2240 { "(bad)", { XX } },
2241 { "blendps", { XM, EXx, Ib } },
2242 { "(bad)", { XX } },
2243 },
2244
2245 /* PREGRP74 */
2246 {
2247 { "(bad)", { XX } },
2248 { "(bad)", { XX } },
2249 { "blendpd", { XM, EXx, Ib } },
2250 { "(bad)", { XX } },
2251 },
2252
2253 /* PREGRP75 */
2254 {
2255 { "(bad)", { XX } },
2256 { "(bad)", { XX } },
2257 { "pblendw", { XM, EXx, Ib } },
2258 { "(bad)", { XX } },
2259 },
2260
2261 /* PREGRP76 */
2262 {
2263 { "(bad)", { XX } },
2264 { "(bad)", { XX } },
2265 { "pextrb", { Edqb, XM, Ib } },
2266 { "(bad)", { XX } },
2267 },
2268
2269 /* PREGRP77 */
2270 {
2271 { "(bad)", { XX } },
2272 { "(bad)", { XX } },
2273 { "pextrw", { Edqw, XM, Ib } },
2274 { "(bad)", { XX } },
2275 },
2276
2277 /* PREGRP78 */
2278 {
2279 { "(bad)", { XX } },
2280 { "(bad)", { XX } },
2281 { "pextrK", { Edq, XM, Ib } },
2282 { "(bad)", { XX } },
2283 },
2284
2285 /* PREGRP79 */
2286 {
2287 { "(bad)", { XX } },
2288 { "(bad)", { XX } },
2289 { "extractps", { Edqd, XM, Ib } },
2290 { "(bad)", { XX } },
2291 },
2292
2293 /* PREGRP80 */
2294 {
2295 { "(bad)", { XX } },
2296 { "(bad)", { XX } },
2297 { "pinsrb", { XM, Edqb, Ib } },
2298 { "(bad)", { XX } },
2299 },
2300
2301 /* PREGRP81 */
2302 {
2303 { "(bad)", { XX } },
2304 { "(bad)", { XX } },
2305 { "insertps", { XM, EXd, Ib } },
2306 { "(bad)", { XX } },
2307 },
2308
2309 /* PREGRP82 */
2310 {
2311 { "(bad)", { XX } },
2312 { "(bad)", { XX } },
2313 { "pinsrK", { XM, Edq, Ib } },
2314 { "(bad)", { XX } },
2315 },
2316
2317 /* PREGRP83 */
2318 {
2319 { "(bad)", { XX } },
2320 { "(bad)", { XX } },
2321 { "dpps", { XM, EXx, Ib } },
2322 { "(bad)", { XX } },
2323 },
2324
2325 /* PREGRP84 */
2326 {
2327 { "(bad)", { XX } },
2328 { "(bad)", { XX } },
2329 { "dppd", { XM, EXx, Ib } },
2330 { "(bad)", { XX } },
2331 },
2332
2333 /* PREGRP85 */
2334 {
2335 { "(bad)", { XX } },
2336 { "(bad)", { XX } },
2337 { "mpsadbw", { XM, EXx, Ib } },
2338 { "(bad)", { XX } },
2339 },
2340
2341 /* PREGRP86 */
2342 {
2343 { "(bad)", { XX } },
2344 { "(bad)", { XX } },
2345 { "pcmpgtq", { XM, EXx } },
2346 { "(bad)", { XX } },
2347 },
2348
2349 /* PREGRP87 */
2350 {
2351 { "(bad)", { XX } },
2352 { "(bad)", { XX } },
2353 { "(bad)", { XX } },
2354 { "crc32", { Gdq, { CRC32_Fixup, b_mode } } },
2355 },
2356
2357 /* PREGRP88 */
2358 {
2359 { "(bad)", { XX } },
2360 { "(bad)", { XX } },
2361 { "(bad)", { XX } },
2362 { "crc32", { Gdq, { CRC32_Fixup, v_mode } } },
2363 },
2364
2365 /* PREGRP89 */
2366 {
2367 { "(bad)", { XX } },
2368 { "(bad)", { XX } },
2369 { "pcmpestrm", { XM, EXx, Ib } },
2370 { "(bad)", { XX } },
2371 },
2372
2373 /* PREGRP90 */
2374 {
2375 { "(bad)", { XX } },
2376 { "(bad)", { XX } },
2377 { "pcmpestri", { XM, EXx, Ib } },
2378 { "(bad)", { XX } },
2379 },
2380
2381 /* PREGRP91 */
2382 {
2383 { "(bad)", { XX } },
2384 { "(bad)", { XX } },
2385 { "pcmpistrm", { XM, EXx, Ib } },
2386 { "(bad)", { XX } },
2387 },
2388
2389 /* PREGRP92 */
2390 {
2391 { "(bad)", { XX } },
2392 { "(bad)", { XX } },
2393 { "pcmpistri", { XM, EXx, Ib } },
2394 { "(bad)", { XX } },
2395 },
2396
2397 /* PREGRP93 */
2398 {
2399 { "ucomiss",{ XM, EXd } },
2400 { "(bad)", { XX } },
2401 { "ucomisd",{ XM, EXq } },
2402 { "(bad)", { XX } },
2403 },
2404
2405 /* PREGRP94 */
2406 {
2407 { "comiss", { XM, EXd } },
2408 { "(bad)", { XX } },
2409 { "comisd", { XM, EXq } },
2410 { "(bad)", { XX } },
2411 },
2412
2413 /* PREGRP95 */
2414 {
2415 { "punpcklbw",{ MX, EMd } },
2416 { "(bad)", { XX } },
2417 { "punpcklbw",{ MX, EMx } },
2418 { "(bad)", { XX } },
2419 },
2420
2421 /* PREGRP96 */
2422 {
2423 { "punpcklwd",{ MX, EMd } },
2424 { "(bad)", { XX } },
2425 { "punpcklwd",{ MX, EMx } },
2426 { "(bad)", { XX } },
2427 },
2428
2429 /* PREGRP97 */
2430 {
2431 { "punpckldq",{ MX, EMd } },
2432 { "(bad)", { XX } },
2433 { "punpckldq",{ MX, EMx } },
2434 { "(bad)", { XX } },
2435 },
2436
2437 /* PREGRP98 */
2438 {
2439 { "vmptrld",{ Mq } },
2440 { "vmxon", { Mq } },
2441 { "vmclear",{ Mq } },
2442 { "(bad)", { XX } },
2443 },
2444
2445 /* PREGRP99 */
2446 {
2447 { "(bad)", { XX } },
2448 { "(bad)", { XX } },
2449 { "psrldq", { MS, Ib } },
2450 { "(bad)", { XX } },
2451 },
2452
2453 /* PREGRP100 */
2454 {
2455 { "(bad)", { XX } },
2456 { "(bad)", { XX } },
2457 { "pslldq", { MS, Ib } },
2458 { "(bad)", { XX } },
2459 },
2460 };
2461
2462 static const struct dis386 x86_64_table[][2] = {
2463 {
2464 { "pusha{P|}", { XX } },
2465 { "(bad)", { XX } },
2466 },
2467 {
2468 { "popa{P|}", { XX } },
2469 { "(bad)", { XX } },
2470 },
2471 {
2472 { OPC_EXT_33 },
2473 { "(bad)", { XX } },
2474 },
2475 {
2476 { "arpl", { Ew, Gw } },
2477 { "movs{||lq|xd}", { Gv, Ed } },
2478 },
2479 };
2480
2481 static const struct dis386 three_byte_table[][256] = {
2482 /* THREE_BYTE_0 */
2483 {
2484 /* 00 */
2485 { "pshufb", { MX, EM } },
2486 { "phaddw", { MX, EM } },
2487 { "phaddd", { MX, EM } },
2488 { "phaddsw", { MX, EM } },
2489 { "pmaddubsw", { MX, EM } },
2490 { "phsubw", { MX, EM } },
2491 { "phsubd", { MX, EM } },
2492 { "phsubsw", { MX, EM } },
2493 /* 08 */
2494 { "psignb", { MX, EM } },
2495 { "psignw", { MX, EM } },
2496 { "psignd", { MX, EM } },
2497 { "pmulhrsw", { MX, EM } },
2498 { "(bad)", { XX } },
2499 { "(bad)", { XX } },
2500 { "(bad)", { XX } },
2501 { "(bad)", { XX } },
2502 /* 10 */
2503 { PREGRP39 },
2504 { "(bad)", { XX } },
2505 { "(bad)", { XX } },
2506 { "(bad)", { XX } },
2507 { PREGRP40 },
2508 { PREGRP41 },
2509 { "(bad)", { XX } },
2510 { PREGRP42 },
2511 /* 18 */
2512 { "(bad)", { XX } },
2513 { "(bad)", { XX } },
2514 { "(bad)", { XX } },
2515 { "(bad)", { XX } },
2516 { "pabsb", { MX, EM } },
2517 { "pabsw", { MX, EM } },
2518 { "pabsd", { MX, EM } },
2519 { "(bad)", { XX } },
2520 /* 20 */
2521 { PREGRP43 },
2522 { PREGRP44 },
2523 { PREGRP45 },
2524 { PREGRP46 },
2525 { PREGRP47 },
2526 { PREGRP48 },
2527 { "(bad)", { XX } },
2528 { "(bad)", { XX } },
2529 /* 28 */
2530 { PREGRP49 },
2531 { PREGRP50 },
2532 { PREGRP51 },
2533 { PREGRP52 },
2534 { "(bad)", { XX } },
2535 { "(bad)", { XX } },
2536 { "(bad)", { XX } },
2537 { "(bad)", { XX } },
2538 /* 30 */
2539 { PREGRP53 },
2540 { PREGRP54 },
2541 { PREGRP55 },
2542 { PREGRP56 },
2543 { PREGRP57 },
2544 { PREGRP58 },
2545 { "(bad)", { XX } },
2546 { PREGRP86 },
2547 /* 38 */
2548 { PREGRP59 },
2549 { PREGRP60 },
2550 { PREGRP61 },
2551 { PREGRP62 },
2552 { PREGRP63 },
2553 { PREGRP64 },
2554 { PREGRP65 },
2555 { PREGRP66 },
2556 /* 40 */
2557 { PREGRP67 },
2558 { PREGRP68 },
2559 { "(bad)", { XX } },
2560 { "(bad)", { XX } },
2561 { "(bad)", { XX } },
2562 { "(bad)", { XX } },
2563 { "(bad)", { XX } },
2564 { "(bad)", { XX } },
2565 /* 48 */
2566 { "(bad)", { XX } },
2567 { "(bad)", { XX } },
2568 { "(bad)", { XX } },
2569 { "(bad)", { XX } },
2570 { "(bad)", { XX } },
2571 { "(bad)", { XX } },
2572 { "(bad)", { XX } },
2573 { "(bad)", { XX } },
2574 /* 50 */
2575 { "(bad)", { XX } },
2576 { "(bad)", { XX } },
2577 { "(bad)", { XX } },
2578 { "(bad)", { XX } },
2579 { "(bad)", { XX } },
2580 { "(bad)", { XX } },
2581 { "(bad)", { XX } },
2582 { "(bad)", { XX } },
2583 /* 58 */
2584 { "(bad)", { XX } },
2585 { "(bad)", { XX } },
2586 { "(bad)", { XX } },
2587 { "(bad)", { XX } },
2588 { "(bad)", { XX } },
2589 { "(bad)", { XX } },
2590 { "(bad)", { XX } },
2591 { "(bad)", { XX } },
2592 /* 60 */
2593 { "(bad)", { XX } },
2594 { "(bad)", { XX } },
2595 { "(bad)", { XX } },
2596 { "(bad)", { XX } },
2597 { "(bad)", { XX } },
2598 { "(bad)", { XX } },
2599 { "(bad)", { XX } },
2600 { "(bad)", { XX } },
2601 /* 68 */
2602 { "(bad)", { XX } },
2603 { "(bad)", { XX } },
2604 { "(bad)", { XX } },
2605 { "(bad)", { XX } },
2606 { "(bad)", { XX } },
2607 { "(bad)", { XX } },
2608 { "(bad)", { XX } },
2609 { "(bad)", { XX } },
2610 /* 70 */
2611 { "(bad)", { XX } },
2612 { "(bad)", { XX } },
2613 { "(bad)", { XX } },
2614 { "(bad)", { XX } },
2615 { "(bad)", { XX } },
2616 { "(bad)", { XX } },
2617 { "(bad)", { XX } },
2618 { "(bad)", { XX } },
2619 /* 78 */
2620 { "(bad)", { XX } },
2621 { "(bad)", { XX } },
2622 { "(bad)", { XX } },
2623 { "(bad)", { XX } },
2624 { "(bad)", { XX } },
2625 { "(bad)", { XX } },
2626 { "(bad)", { XX } },
2627 { "(bad)", { XX } },
2628 /* 80 */
2629 { "(bad)", { XX } },
2630 { "(bad)", { XX } },
2631 { "(bad)", { XX } },
2632 { "(bad)", { XX } },
2633 { "(bad)", { XX } },
2634 { "(bad)", { XX } },
2635 { "(bad)", { XX } },
2636 { "(bad)", { XX } },
2637 /* 88 */
2638 { "(bad)", { XX } },
2639 { "(bad)", { XX } },
2640 { "(bad)", { XX } },
2641 { "(bad)", { XX } },
2642 { "(bad)", { XX } },
2643 { "(bad)", { XX } },
2644 { "(bad)", { XX } },
2645 { "(bad)", { XX } },
2646 /* 90 */
2647 { "(bad)", { XX } },
2648 { "(bad)", { XX } },
2649 { "(bad)", { XX } },
2650 { "(bad)", { XX } },
2651 { "(bad)", { XX } },
2652 { "(bad)", { XX } },
2653 { "(bad)", { XX } },
2654 { "(bad)", { XX } },
2655 /* 98 */
2656 { "(bad)", { XX } },
2657 { "(bad)", { XX } },
2658 { "(bad)", { XX } },
2659 { "(bad)", { XX } },
2660 { "(bad)", { XX } },
2661 { "(bad)", { XX } },
2662 { "(bad)", { XX } },
2663 { "(bad)", { XX } },
2664 /* a0 */
2665 { "(bad)", { XX } },
2666 { "(bad)", { XX } },
2667 { "(bad)", { XX } },
2668 { "(bad)", { XX } },
2669 { "(bad)", { XX } },
2670 { "(bad)", { XX } },
2671 { "(bad)", { XX } },
2672 { "(bad)", { XX } },
2673 /* a8 */
2674 { "(bad)", { XX } },
2675 { "(bad)", { XX } },
2676 { "(bad)", { XX } },
2677 { "(bad)", { XX } },
2678 { "(bad)", { XX } },
2679 { "(bad)", { XX } },
2680 { "(bad)", { XX } },
2681 { "(bad)", { XX } },
2682 /* b0 */
2683 { "(bad)", { XX } },
2684 { "(bad)", { XX } },
2685 { "(bad)", { XX } },
2686 { "(bad)", { XX } },
2687 { "(bad)", { XX } },
2688 { "(bad)", { XX } },
2689 { "(bad)", { XX } },
2690 { "(bad)", { XX } },
2691 /* b8 */
2692 { "(bad)", { XX } },
2693 { "(bad)", { XX } },
2694 { "(bad)", { XX } },
2695 { "(bad)", { XX } },
2696 { "(bad)", { XX } },
2697 { "(bad)", { XX } },
2698 { "(bad)", { XX } },
2699 { "(bad)", { XX } },
2700 /* c0 */
2701 { "(bad)", { XX } },
2702 { "(bad)", { XX } },
2703 { "(bad)", { XX } },
2704 { "(bad)", { XX } },
2705 { "(bad)", { XX } },
2706 { "(bad)", { XX } },
2707 { "(bad)", { XX } },
2708 { "(bad)", { XX } },
2709 /* c8 */
2710 { "(bad)", { XX } },
2711 { "(bad)", { XX } },
2712 { "(bad)", { XX } },
2713 { "(bad)", { XX } },
2714 { "(bad)", { XX } },
2715 { "(bad)", { XX } },
2716 { "(bad)", { XX } },
2717 { "(bad)", { XX } },
2718 /* d0 */
2719 { "(bad)", { XX } },
2720 { "(bad)", { XX } },
2721 { "(bad)", { XX } },
2722 { "(bad)", { XX } },
2723 { "(bad)", { XX } },
2724 { "(bad)", { XX } },
2725 { "(bad)", { XX } },
2726 { "(bad)", { XX } },
2727 /* d8 */
2728 { "(bad)", { XX } },
2729 { "(bad)", { XX } },
2730 { "(bad)", { XX } },
2731 { "(bad)", { XX } },
2732 { "(bad)", { XX } },
2733 { "(bad)", { XX } },
2734 { "(bad)", { XX } },
2735 { "(bad)", { XX } },
2736 /* e0 */
2737 { "(bad)", { XX } },
2738 { "(bad)", { XX } },
2739 { "(bad)", { XX } },
2740 { "(bad)", { XX } },
2741 { "(bad)", { XX } },
2742 { "(bad)", { XX } },
2743 { "(bad)", { XX } },
2744 { "(bad)", { XX } },
2745 /* e8 */
2746 { "(bad)", { XX } },
2747 { "(bad)", { XX } },
2748 { "(bad)", { XX } },
2749 { "(bad)", { XX } },
2750 { "(bad)", { XX } },
2751 { "(bad)", { XX } },
2752 { "(bad)", { XX } },
2753 { "(bad)", { XX } },
2754 /* f0 */
2755 { PREGRP87 },
2756 { PREGRP88 },
2757 { "(bad)", { XX } },
2758 { "(bad)", { XX } },
2759 { "(bad)", { XX } },
2760 { "(bad)", { XX } },
2761 { "(bad)", { XX } },
2762 { "(bad)", { XX } },
2763 /* f8 */
2764 { "(bad)", { XX } },
2765 { "(bad)", { XX } },
2766 { "(bad)", { XX } },
2767 { "(bad)", { XX } },
2768 { "(bad)", { XX } },
2769 { "(bad)", { XX } },
2770 { "(bad)", { XX } },
2771 { "(bad)", { XX } },
2772 },
2773 /* THREE_BYTE_1 */
2774 {
2775 /* 00 */
2776 { "(bad)", { XX } },
2777 { "(bad)", { XX } },
2778 { "(bad)", { XX } },
2779 { "(bad)", { XX } },
2780 { "(bad)", { XX } },
2781 { "(bad)", { XX } },
2782 { "(bad)", { XX } },
2783 { "(bad)", { XX } },
2784 /* 08 */
2785 { PREGRP69 },
2786 { PREGRP70 },
2787 { PREGRP71 },
2788 { PREGRP72 },
2789 { PREGRP73 },
2790 { PREGRP74 },
2791 { PREGRP75 },
2792 { "palignr", { MX, EM, Ib } },
2793 /* 10 */
2794 { "(bad)", { XX } },
2795 { "(bad)", { XX } },
2796 { "(bad)", { XX } },
2797 { "(bad)", { XX } },
2798 { PREGRP76 },
2799 { PREGRP77 },
2800 { PREGRP78 },
2801 { PREGRP79 },
2802 /* 18 */
2803 { "(bad)", { XX } },
2804 { "(bad)", { XX } },
2805 { "(bad)", { XX } },
2806 { "(bad)", { XX } },
2807 { "(bad)", { XX } },
2808 { "(bad)", { XX } },
2809 { "(bad)", { XX } },
2810 { "(bad)", { XX } },
2811 /* 20 */
2812 { PREGRP80 },
2813 { PREGRP81 },
2814 { PREGRP82 },
2815 { "(bad)", { XX } },
2816 { "(bad)", { XX } },
2817 { "(bad)", { XX } },
2818 { "(bad)", { XX } },
2819 { "(bad)", { XX } },
2820 /* 28 */
2821 { "(bad)", { XX } },
2822 { "(bad)", { XX } },
2823 { "(bad)", { XX } },
2824 { "(bad)", { XX } },
2825 { "(bad)", { XX } },
2826 { "(bad)", { XX } },
2827 { "(bad)", { XX } },
2828 { "(bad)", { XX } },
2829 /* 30 */
2830 { "(bad)", { XX } },
2831 { "(bad)", { XX } },
2832 { "(bad)", { XX } },
2833 { "(bad)", { XX } },
2834 { "(bad)", { XX } },
2835 { "(bad)", { XX } },
2836 { "(bad)", { XX } },
2837 { "(bad)", { XX } },
2838 /* 38 */
2839 { "(bad)", { XX } },
2840 { "(bad)", { XX } },
2841 { "(bad)", { XX } },
2842 { "(bad)", { XX } },
2843 { "(bad)", { XX } },
2844 { "(bad)", { XX } },
2845 { "(bad)", { XX } },
2846 { "(bad)", { XX } },
2847 /* 40 */
2848 { PREGRP83 },
2849 { PREGRP84 },
2850 { PREGRP85 },
2851 { "(bad)", { XX } },
2852 { "(bad)", { XX } },
2853 { "(bad)", { XX } },
2854 { "(bad)", { XX } },
2855 { "(bad)", { XX } },
2856 /* 48 */
2857 { "(bad)", { XX } },
2858 { "(bad)", { XX } },
2859 { "(bad)", { XX } },
2860 { "(bad)", { XX } },
2861 { "(bad)", { XX } },
2862 { "(bad)", { XX } },
2863 { "(bad)", { XX } },
2864 { "(bad)", { XX } },
2865 /* 50 */
2866 { "(bad)", { XX } },
2867 { "(bad)", { XX } },
2868 { "(bad)", { XX } },
2869 { "(bad)", { XX } },
2870 { "(bad)", { XX } },
2871 { "(bad)", { XX } },
2872 { "(bad)", { XX } },
2873 { "(bad)", { XX } },
2874 /* 58 */
2875 { "(bad)", { XX } },
2876 { "(bad)", { XX } },
2877 { "(bad)", { XX } },
2878 { "(bad)", { XX } },
2879 { "(bad)", { XX } },
2880 { "(bad)", { XX } },
2881 { "(bad)", { XX } },
2882 { "(bad)", { XX } },
2883 /* 60 */
2884 { PREGRP89 },
2885 { PREGRP90 },
2886 { PREGRP91 },
2887 { PREGRP92 },
2888 { "(bad)", { XX } },
2889 { "(bad)", { XX } },
2890 { "(bad)", { XX } },
2891 { "(bad)", { XX } },
2892 /* 68 */
2893 { "(bad)", { XX } },
2894 { "(bad)", { XX } },
2895 { "(bad)", { XX } },
2896 { "(bad)", { XX } },
2897 { "(bad)", { XX } },
2898 { "(bad)", { XX } },
2899 { "(bad)", { XX } },
2900 { "(bad)", { XX } },
2901 /* 70 */
2902 { "(bad)", { XX } },
2903 { "(bad)", { XX } },
2904 { "(bad)", { XX } },
2905 { "(bad)", { XX } },
2906 { "(bad)", { XX } },
2907 { "(bad)", { XX } },
2908 { "(bad)", { XX } },
2909 { "(bad)", { XX } },
2910 /* 78 */
2911 { "(bad)", { XX } },
2912 { "(bad)", { XX } },
2913 { "(bad)", { XX } },
2914 { "(bad)", { XX } },
2915 { "(bad)", { XX } },
2916 { "(bad)", { XX } },
2917 { "(bad)", { XX } },
2918 { "(bad)", { XX } },
2919 /* 80 */
2920 { "(bad)", { XX } },
2921 { "(bad)", { XX } },
2922 { "(bad)", { XX } },
2923 { "(bad)", { XX } },
2924 { "(bad)", { XX } },
2925 { "(bad)", { XX } },
2926 { "(bad)", { XX } },
2927 { "(bad)", { XX } },
2928 /* 88 */
2929 { "(bad)", { XX } },
2930 { "(bad)", { XX } },
2931 { "(bad)", { XX } },
2932 { "(bad)", { XX } },
2933 { "(bad)", { XX } },
2934 { "(bad)", { XX } },
2935 { "(bad)", { XX } },
2936 { "(bad)", { XX } },
2937 /* 90 */
2938 { "(bad)", { XX } },
2939 { "(bad)", { XX } },
2940 { "(bad)", { XX } },
2941 { "(bad)", { XX } },
2942 { "(bad)", { XX } },
2943 { "(bad)", { XX } },
2944 { "(bad)", { XX } },
2945 { "(bad)", { XX } },
2946 /* 98 */
2947 { "(bad)", { XX } },
2948 { "(bad)", { XX } },
2949 { "(bad)", { XX } },
2950 { "(bad)", { XX } },
2951 { "(bad)", { XX } },
2952 { "(bad)", { XX } },
2953 { "(bad)", { XX } },
2954 { "(bad)", { XX } },
2955 /* a0 */
2956 { "(bad)", { XX } },
2957 { "(bad)", { XX } },
2958 { "(bad)", { XX } },
2959 { "(bad)", { XX } },
2960 { "(bad)", { XX } },
2961 { "(bad)", { XX } },
2962 { "(bad)", { XX } },
2963 { "(bad)", { XX } },
2964 /* a8 */
2965 { "(bad)", { XX } },
2966 { "(bad)", { XX } },
2967 { "(bad)", { XX } },
2968 { "(bad)", { XX } },
2969 { "(bad)", { XX } },
2970 { "(bad)", { XX } },
2971 { "(bad)", { XX } },
2972 { "(bad)", { XX } },
2973 /* b0 */
2974 { "(bad)", { XX } },
2975 { "(bad)", { XX } },
2976 { "(bad)", { XX } },
2977 { "(bad)", { XX } },
2978 { "(bad)", { XX } },
2979 { "(bad)", { XX } },
2980 { "(bad)", { XX } },
2981 { "(bad)", { XX } },
2982 /* b8 */
2983 { "(bad)", { XX } },
2984 { "(bad)", { XX } },
2985 { "(bad)", { XX } },
2986 { "(bad)", { XX } },
2987 { "(bad)", { XX } },
2988 { "(bad)", { XX } },
2989 { "(bad)", { XX } },
2990 { "(bad)", { XX } },
2991 /* c0 */
2992 { "(bad)", { XX } },
2993 { "(bad)", { XX } },
2994 { "(bad)", { XX } },
2995 { "(bad)", { XX } },
2996 { "(bad)", { XX } },
2997 { "(bad)", { XX } },
2998 { "(bad)", { XX } },
2999 { "(bad)", { XX } },
3000 /* c8 */
3001 { "(bad)", { XX } },
3002 { "(bad)", { XX } },
3003 { "(bad)", { XX } },
3004 { "(bad)", { XX } },
3005 { "(bad)", { XX } },
3006 { "(bad)", { XX } },
3007 { "(bad)", { XX } },
3008 { "(bad)", { XX } },
3009 /* d0 */
3010 { "(bad)", { XX } },
3011 { "(bad)", { XX } },
3012 { "(bad)", { XX } },
3013 { "(bad)", { XX } },
3014 { "(bad)", { XX } },
3015 { "(bad)", { XX } },
3016 { "(bad)", { XX } },
3017 { "(bad)", { XX } },
3018 /* d8 */
3019 { "(bad)", { XX } },
3020 { "(bad)", { XX } },
3021 { "(bad)", { XX } },
3022 { "(bad)", { XX } },
3023 { "(bad)", { XX } },
3024 { "(bad)", { XX } },
3025 { "(bad)", { XX } },
3026 { "(bad)", { XX } },
3027 /* e0 */
3028 { "(bad)", { XX } },
3029 { "(bad)", { XX } },
3030 { "(bad)", { XX } },
3031 { "(bad)", { XX } },
3032 { "(bad)", { XX } },
3033 { "(bad)", { XX } },
3034 { "(bad)", { XX } },
3035 { "(bad)", { XX } },
3036 /* e8 */
3037 { "(bad)", { XX } },
3038 { "(bad)", { XX } },
3039 { "(bad)", { XX } },
3040 { "(bad)", { XX } },
3041 { "(bad)", { XX } },
3042 { "(bad)", { XX } },
3043 { "(bad)", { XX } },
3044 { "(bad)", { XX } },
3045 /* f0 */
3046 { "(bad)", { XX } },
3047 { "(bad)", { XX } },
3048 { "(bad)", { XX } },
3049 { "(bad)", { XX } },
3050 { "(bad)", { XX } },
3051 { "(bad)", { XX } },
3052 { "(bad)", { XX } },
3053 { "(bad)", { XX } },
3054 /* f8 */
3055 { "(bad)", { XX } },
3056 { "(bad)", { XX } },
3057 { "(bad)", { XX } },
3058 { "(bad)", { XX } },
3059 { "(bad)", { XX } },
3060 { "(bad)", { XX } },
3061 { "(bad)", { XX } },
3062 { "(bad)", { XX } },
3063 }
3064 };
3065
3066 static const struct dis386 opc_ext_table[][2] = {
3067 {
3068 /* OPC_EXT_0 */
3069 { "leaS", { Gv, M } },
3070 { "(bad)", { XX } },
3071 },
3072 {
3073 /* OPC_EXT_1 */
3074 { "les{S|}", { Gv, Mp } },
3075 { "(bad)", { XX } },
3076 },
3077 {
3078 /* OPC_EXT_2 */
3079 { "ldsS", { Gv, Mp } },
3080 { "(bad)", { XX } },
3081 },
3082 {
3083 /* OPC_EXT_3 */
3084 { "lssS", { Gv, Mp } },
3085 { "(bad)", { XX } },
3086 },
3087 {
3088 /* OPC_EXT_4 */
3089 { "lfsS", { Gv, Mp } },
3090 { "(bad)", { XX } },
3091 },
3092 {
3093 /* OPC_EXT_5 */
3094 { "lgsS", { Gv, Mp } },
3095 { "(bad)", { XX } },
3096 },
3097 {
3098 /* OPC_EXT_6 */
3099 { "sgdt{Q|IQ||}", { M } },
3100 { OPC_EXT_RM_0 },
3101 },
3102 {
3103 /* OPC_EXT_7 */
3104 { "sidt{Q|IQ||}", { M } },
3105 { OPC_EXT_RM_1 },
3106 },
3107 {
3108 /* OPC_EXT_8 */
3109 { "lgdt{Q|Q||}", { M } },
3110 { "(bad)", { XX } },
3111 },
3112 {
3113 /* OPC_EXT_9 */
3114 { PREGRP98 },
3115 { "(bad)", { XX } },
3116 },
3117 {
3118 /* OPC_EXT_10 */
3119 { "vmptrst", { Mq } },
3120 { "(bad)", { XX } },
3121 },
3122 {
3123 /* OPC_EXT_11 */
3124 { "(bad)", { XX } },
3125 { "psrlw", { MS, Ib } },
3126 },
3127 {
3128 /* OPC_EXT_12 */
3129 { "(bad)", { XX } },
3130 { "psraw", { MS, Ib } },
3131 },
3132 {
3133 /* OPC_EXT_13 */
3134 { "(bad)", { XX } },
3135 { "psllw", { MS, Ib } },
3136 },
3137 {
3138 /* OPC_EXT_14 */
3139 { "(bad)", { XX } },
3140 { "psrld", { MS, Ib } },
3141 },
3142 {
3143 /* OPC_EXT_15 */
3144 { "(bad)", { XX } },
3145 { "psrad", { MS, Ib } },
3146 },
3147 {
3148 /* OPC_EXT_16 */
3149 { "(bad)", { XX } },
3150 { "pslld", { MS, Ib } },
3151 },
3152 {
3153 /* OPC_EXT_17 */
3154 { "(bad)", { XX } },
3155 { "psrlq", { MS, Ib } },
3156 },
3157 {
3158 /* OPC_EXT_18 */
3159 { "(bad)", { XX } },
3160 { PREGRP99 },
3161 },
3162 {
3163 /* OPC_EXT_19 */
3164 { "(bad)", { XX } },
3165 { "psllq", { MS, Ib } },
3166 },
3167 {
3168 /* OPC_EXT_20 */
3169 { "(bad)", { XX } },
3170 { PREGRP100 },
3171 },
3172 {
3173 /* OPC_EXT_21 */
3174 { "fxsave", { M } },
3175 { "(bad)", { XX } },
3176 },
3177 {
3178 /* OPC_EXT_22 */
3179 { "fxrstor", { M } },
3180 { "(bad)", { XX } },
3181 },
3182 {
3183 /* OPC_EXT_23 */
3184 { "ldmxcsr", { Md } },
3185 { "(bad)", { XX } },
3186 },
3187 {
3188 /* OPC_EXT_24 */
3189 { "stmxcsr", { Md } },
3190 { "(bad)", { XX } },
3191 },
3192 {
3193 /* OPC_EXT_25 */
3194 { "(bad)", { XX } },
3195 { OPC_EXT_RM_2 },
3196 },
3197 {
3198 /* OPC_EXT_26 */
3199 { "(bad)", { XX } },
3200 { OPC_EXT_RM_3 },
3201 },
3202 {
3203 /* OPC_EXT_27 */
3204 { "clflush", { Mb } },
3205 { OPC_EXT_RM_4 },
3206 },
3207 {
3208 /* OPC_EXT_28 */
3209 { "prefetchnta", { Mb } },
3210 { "(bad)", { XX } },
3211 },
3212 {
3213 /* OPC_EXT_29 */
3214 { "prefetcht0", { Mb } },
3215 { "(bad)", { XX } },
3216 },
3217 {
3218 /* OPC_EXT_30 */
3219 { "prefetcht1", { Mb } },
3220 { "(bad)", { XX } },
3221 },
3222 {
3223 /* OPC_EXT_31 */
3224 { "prefetcht2", { Mb } },
3225 { "(bad)", { XX } },
3226 },
3227 {
3228 /* OPC_EXT_32 */
3229 { "lddqu", { XM, M } },
3230 { "(bad)", { XX } },
3231 },
3232 {
3233 /* OPC_EXT_33 */
3234 { "bound{S|}", { Gv, Ma } },
3235 { "(bad)", { XX } },
3236 },
3237 {
3238 /* OPC_EXT_34 */
3239 { "movlpX", { EXq, XM } },
3240 { "(bad)", { XX } },
3241 },
3242 {
3243 /* OPC_EXT_35 */
3244 { "movhpX", { EXq, XM } },
3245 { "(bad)", { XX } },
3246 },
3247 {
3248 /* OPC_EXT_36 */
3249 { "movlpX", { XM, EXq } },
3250 { "movhlpX", { XM, EXq } },
3251 },
3252 {
3253 /* OPC_EXT_37 */
3254 { "movhpX", { XM, EXq } },
3255 { "movlhpX", { XM, EXq } },
3256 },
3257 {
3258 /* OPC_EXT_38 */
3259 { "invlpg", { Mb } },
3260 { OPC_EXT_RM_5 },
3261 },
3262 {
3263 /* OPC_EXT_39 */
3264 { "lidt{Q|Q||}", { M } },
3265 { OPC_EXT_RM_6 },
3266 },
3267 };
3268
3269 static const struct dis386 opc_ext_rm_table[][8] = {
3270 {
3271 /* OPC_EXT_RM_0 */
3272 { "(bad)", { XX } },
3273 { "vmcall", { Skip_MODRM } },
3274 { "vmlaunch", { Skip_MODRM } },
3275 { "vmresume", { Skip_MODRM } },
3276 { "vmxoff", { Skip_MODRM } },
3277 { "(bad)", { XX } },
3278 { "(bad)", { XX } },
3279 { "(bad)", { XX } },
3280 },
3281 {
3282 /* OPC_EXT_RM_1 */
3283 { "monitor", { { OP_Monitor, 0 } } },
3284 { "mwait", { { OP_Mwait, 0 } } },
3285 { "(bad)", { XX } },
3286 { "(bad)", { XX } },
3287 { "(bad)", { XX } },
3288 { "(bad)", { XX } },
3289 { "(bad)", { XX } },
3290 { "(bad)", { XX } },
3291 },
3292 {
3293 /* OPC_EXT_RM_2 */
3294 { "lfence", { Skip_MODRM } },
3295 { "(bad)", { XX } },
3296 { "(bad)", { XX } },
3297 { "(bad)", { XX } },
3298 { "(bad)", { XX } },
3299 { "(bad)", { XX } },
3300 { "(bad)", { XX } },
3301 { "(bad)", { XX } },
3302 },
3303 {
3304 /* OPC_EXT_RM_3 */
3305 { "mfence", { Skip_MODRM } },
3306 { "(bad)", { XX } },
3307 { "(bad)", { XX } },
3308 { "(bad)", { XX } },
3309 { "(bad)", { XX } },
3310 { "(bad)", { XX } },
3311 { "(bad)", { XX } },
3312 { "(bad)", { XX } },
3313 },
3314 {
3315 /* OPC_EXT_RM_4 */
3316 { "sfence", { Skip_MODRM } },
3317 { "(bad)", { XX } },
3318 { "(bad)", { XX } },
3319 { "(bad)", { XX } },
3320 { "(bad)", { XX } },
3321 { "(bad)", { XX } },
3322 { "(bad)", { XX } },
3323 { "(bad)", { XX } },
3324 },
3325 {
3326 /* OPC_EXT_RM_5 */
3327 { "swapgs", { Skip_MODRM } },
3328 { "rdtscp", { Skip_MODRM } },
3329 { "(bad)", { XX } },
3330 { "(bad)", { XX } },
3331 { "(bad)", { XX } },
3332 { "(bad)", { XX } },
3333 { "(bad)", { XX } },
3334 { "(bad)", { XX } },
3335 },
3336 {
3337 /* OPC_EXT_RM_6 */
3338 { "vmrun", { Skip_MODRM } },
3339 { "vmmcall", { Skip_MODRM } },
3340 { "vmload", { Skip_MODRM } },
3341 { "vmsave", { Skip_MODRM } },
3342 { "stgi", { Skip_MODRM } },
3343 { "clgi", { Skip_MODRM } },
3344 { "skinit", { Skip_MODRM } },
3345 { "invlpga", { Skip_MODRM } },
3346 },
3347 };
3348
3349 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3350
3351 static void
3352 ckprefix (void)
3353 {
3354 int newrex;
3355 rex = 0;
3356 prefixes = 0;
3357 used_prefixes = 0;
3358 rex_used = 0;
3359 while (1)
3360 {
3361 FETCH_DATA (the_info, codep + 1);
3362 newrex = 0;
3363 switch (*codep)
3364 {
3365 /* REX prefixes family. */
3366 case 0x40:
3367 case 0x41:
3368 case 0x42:
3369 case 0x43:
3370 case 0x44:
3371 case 0x45:
3372 case 0x46:
3373 case 0x47:
3374 case 0x48:
3375 case 0x49:
3376 case 0x4a:
3377 case 0x4b:
3378 case 0x4c:
3379 case 0x4d:
3380 case 0x4e:
3381 case 0x4f:
3382 if (address_mode == mode_64bit)
3383 newrex = *codep;
3384 else
3385 return;
3386 break;
3387 case 0xf3:
3388 prefixes |= PREFIX_REPZ;
3389 break;
3390 case 0xf2:
3391 prefixes |= PREFIX_REPNZ;
3392 break;
3393 case 0xf0:
3394 prefixes |= PREFIX_LOCK;
3395 break;
3396 case 0x2e:
3397 prefixes |= PREFIX_CS;
3398 break;
3399 case 0x36:
3400 prefixes |= PREFIX_SS;
3401 break;
3402 case 0x3e:
3403 prefixes |= PREFIX_DS;
3404 break;
3405 case 0x26:
3406 prefixes |= PREFIX_ES;
3407 break;
3408 case 0x64:
3409 prefixes |= PREFIX_FS;
3410 break;
3411 case 0x65:
3412 prefixes |= PREFIX_GS;
3413 break;
3414 case 0x66:
3415 prefixes |= PREFIX_DATA;
3416 break;
3417 case 0x67:
3418 prefixes |= PREFIX_ADDR;
3419 break;
3420 case FWAIT_OPCODE:
3421 /* fwait is really an instruction. If there are prefixes
3422 before the fwait, they belong to the fwait, *not* to the
3423 following instruction. */
3424 if (prefixes || rex)
3425 {
3426 prefixes |= PREFIX_FWAIT;
3427 codep++;
3428 return;
3429 }
3430 prefixes = PREFIX_FWAIT;
3431 break;
3432 default:
3433 return;
3434 }
3435 /* Rex is ignored when followed by another prefix. */
3436 if (rex)
3437 {
3438 rex_used = rex;
3439 return;
3440 }
3441 rex = newrex;
3442 codep++;
3443 }
3444 }
3445
3446 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
3447 prefix byte. */
3448
3449 static const char *
3450 prefix_name (int pref, int sizeflag)
3451 {
3452 static const char *rexes [16] =
3453 {
3454 "rex", /* 0x40 */
3455 "rex.B", /* 0x41 */
3456 "rex.X", /* 0x42 */
3457 "rex.XB", /* 0x43 */
3458 "rex.R", /* 0x44 */
3459 "rex.RB", /* 0x45 */
3460 "rex.RX", /* 0x46 */
3461 "rex.RXB", /* 0x47 */
3462 "rex.W", /* 0x48 */
3463 "rex.WB", /* 0x49 */
3464 "rex.WX", /* 0x4a */
3465 "rex.WXB", /* 0x4b */
3466 "rex.WR", /* 0x4c */
3467 "rex.WRB", /* 0x4d */
3468 "rex.WRX", /* 0x4e */
3469 "rex.WRXB", /* 0x4f */
3470 };
3471
3472 switch (pref)
3473 {
3474 /* REX prefixes family. */
3475 case 0x40:
3476 case 0x41:
3477 case 0x42:
3478 case 0x43:
3479 case 0x44:
3480 case 0x45:
3481 case 0x46:
3482 case 0x47:
3483 case 0x48:
3484 case 0x49:
3485 case 0x4a:
3486 case 0x4b:
3487 case 0x4c:
3488 case 0x4d:
3489 case 0x4e:
3490 case 0x4f:
3491 return rexes [pref - 0x40];
3492 case 0xf3:
3493 return "repz";
3494 case 0xf2:
3495 return "repnz";
3496 case 0xf0:
3497 return "lock";
3498 case 0x2e:
3499 return "cs";
3500 case 0x36:
3501 return "ss";
3502 case 0x3e:
3503 return "ds";
3504 case 0x26:
3505 return "es";
3506 case 0x64:
3507 return "fs";
3508 case 0x65:
3509 return "gs";
3510 case 0x66:
3511 return (sizeflag & DFLAG) ? "data16" : "data32";
3512 case 0x67:
3513 if (address_mode == mode_64bit)
3514 return (sizeflag & AFLAG) ? "addr32" : "addr64";
3515 else
3516 return (sizeflag & AFLAG) ? "addr16" : "addr32";
3517 case FWAIT_OPCODE:
3518 return "fwait";
3519 default:
3520 return NULL;
3521 }
3522 }
3523
3524 static char op_out[MAX_OPERANDS][100];
3525 static int op_ad, op_index[MAX_OPERANDS];
3526 static int two_source_ops;
3527 static bfd_vma op_address[MAX_OPERANDS];
3528 static bfd_vma op_riprel[MAX_OPERANDS];
3529 static bfd_vma start_pc;
3530
3531 /*
3532 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3533 * (see topic "Redundant prefixes" in the "Differences from 8086"
3534 * section of the "Virtual 8086 Mode" chapter.)
3535 * 'pc' should be the address of this instruction, it will
3536 * be used to print the target address if this is a relative jump or call
3537 * The function returns the length of this instruction in bytes.
3538 */
3539
3540 static char intel_syntax;
3541 static char open_char;
3542 static char close_char;
3543 static char separator_char;
3544 static char scale_char;
3545
3546 /* Here for backwards compatibility. When gdb stops using
3547 print_insn_i386_att and print_insn_i386_intel these functions can
3548 disappear, and print_insn_i386 be merged into print_insn. */
3549 int
3550 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
3551 {
3552 intel_syntax = 0;
3553
3554 return print_insn (pc, info);
3555 }
3556
3557 int
3558 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
3559 {
3560 intel_syntax = 1;
3561
3562 return print_insn (pc, info);
3563 }
3564
3565 int
3566 print_insn_i386 (bfd_vma pc, disassemble_info *info)
3567 {
3568 intel_syntax = -1;
3569
3570 return print_insn (pc, info);
3571 }
3572
3573 void
3574 print_i386_disassembler_options (FILE *stream)
3575 {
3576 fprintf (stream, _("\n\
3577 The following i386/x86-64 specific disassembler options are supported for use\n\
3578 with the -M switch (multiple options should be separated by commas):\n"));
3579
3580 fprintf (stream, _(" x86-64 Disassemble in 64bit mode\n"));
3581 fprintf (stream, _(" i386 Disassemble in 32bit mode\n"));
3582 fprintf (stream, _(" i8086 Disassemble in 16bit mode\n"));
3583 fprintf (stream, _(" att Display instruction in AT&T syntax\n"));
3584 fprintf (stream, _(" intel Display instruction in Intel syntax\n"));
3585 fprintf (stream, _(" addr64 Assume 64bit address size\n"));
3586 fprintf (stream, _(" addr32 Assume 32bit address size\n"));
3587 fprintf (stream, _(" addr16 Assume 16bit address size\n"));
3588 fprintf (stream, _(" data32 Assume 32bit data size\n"));
3589 fprintf (stream, _(" data16 Assume 16bit data size\n"));
3590 fprintf (stream, _(" suffix Always display instruction suffix in AT&T syntax\n"));
3591 }
3592
3593 /* Get a pointer to struct dis386 with a valid name. */
3594
3595 static const struct dis386 *
3596 get_valid_dis386 (const struct dis386 *dp)
3597 {
3598 int index;
3599
3600 if (dp->name != NULL)
3601 return dp;
3602
3603 switch (dp->op[0].bytemode)
3604 {
3605 case USE_GROUPS:
3606 dp = &grps[dp->op[1].bytemode][modrm.reg];
3607 break;
3608
3609 case USE_PREFIX_USER_TABLE:
3610 index = 0;
3611 used_prefixes |= (prefixes & PREFIX_REPZ);
3612 if (prefixes & PREFIX_REPZ)
3613 {
3614 index = 1;
3615 repz_prefix = NULL;
3616 }
3617 else
3618 {
3619 /* We should check PREFIX_REPNZ and PREFIX_REPZ before
3620 PREFIX_DATA. */
3621 used_prefixes |= (prefixes & PREFIX_REPNZ);
3622 if (prefixes & PREFIX_REPNZ)
3623 {
3624 index = 3;
3625 repnz_prefix = NULL;
3626 }
3627 else
3628 {
3629 used_prefixes |= (prefixes & PREFIX_DATA);
3630 if (prefixes & PREFIX_DATA)
3631 {
3632 index = 2;
3633 data_prefix = NULL;
3634 }
3635 }
3636 }
3637 dp = &prefix_user_table[dp->op[1].bytemode][index];
3638 break;
3639
3640 case X86_64_SPECIAL:
3641 index = address_mode == mode_64bit ? 1 : 0;
3642 dp = &x86_64_table[dp->op[1].bytemode][index];
3643 break;
3644
3645 case USE_OPC_EXT_TABLE:
3646 index = modrm.mod == 0x3 ? 1 : 0;
3647 dp = &opc_ext_table[dp->op[1].bytemode][index];
3648 break;
3649
3650 case USE_OPC_EXT_RM_TABLE:
3651 index = modrm.rm;
3652 dp = &opc_ext_rm_table[dp->op[1].bytemode][index];
3653 break;
3654
3655 default:
3656 oappend (INTERNAL_DISASSEMBLER_ERROR);
3657 return NULL;
3658 }
3659
3660 if (dp->name != NULL)
3661 return dp;
3662 else
3663 return get_valid_dis386 (dp);
3664 }
3665
3666 static int
3667 print_insn (bfd_vma pc, disassemble_info *info)
3668 {
3669 const struct dis386 *dp;
3670 int i;
3671 char *op_txt[MAX_OPERANDS];
3672 int needcomma;
3673 int sizeflag;
3674 const char *p;
3675 struct dis_private priv;
3676 unsigned char op;
3677 char prefix_obuf[32];
3678 char *prefix_obufp;
3679
3680 if (info->mach == bfd_mach_x86_64_intel_syntax
3681 || info->mach == bfd_mach_x86_64)
3682 address_mode = mode_64bit;
3683 else
3684 address_mode = mode_32bit;
3685
3686 if (intel_syntax == (char) -1)
3687 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
3688 || info->mach == bfd_mach_x86_64_intel_syntax);
3689
3690 if (info->mach == bfd_mach_i386_i386
3691 || info->mach == bfd_mach_x86_64
3692 || info->mach == bfd_mach_i386_i386_intel_syntax
3693 || info->mach == bfd_mach_x86_64_intel_syntax)
3694 priv.orig_sizeflag = AFLAG | DFLAG;
3695 else if (info->mach == bfd_mach_i386_i8086)
3696 priv.orig_sizeflag = 0;
3697 else
3698 abort ();
3699
3700 for (p = info->disassembler_options; p != NULL; )
3701 {
3702 if (CONST_STRNEQ (p, "x86-64"))
3703 {
3704 address_mode = mode_64bit;
3705 priv.orig_sizeflag = AFLAG | DFLAG;
3706 }
3707 else if (CONST_STRNEQ (p, "i386"))
3708 {
3709 address_mode = mode_32bit;
3710 priv.orig_sizeflag = AFLAG | DFLAG;
3711 }
3712 else if (CONST_STRNEQ (p, "i8086"))
3713 {
3714 address_mode = mode_16bit;
3715 priv.orig_sizeflag = 0;
3716 }
3717 else if (CONST_STRNEQ (p, "intel"))
3718 {
3719 intel_syntax = 1;
3720 }
3721 else if (CONST_STRNEQ (p, "att"))
3722 {
3723 intel_syntax = 0;
3724 }
3725 else if (CONST_STRNEQ (p, "addr"))
3726 {
3727 if (address_mode == mode_64bit)
3728 {
3729 if (p[4] == '3' && p[5] == '2')
3730 priv.orig_sizeflag &= ~AFLAG;
3731 else if (p[4] == '6' && p[5] == '4')
3732 priv.orig_sizeflag |= AFLAG;
3733 }
3734 else
3735 {
3736 if (p[4] == '1' && p[5] == '6')
3737 priv.orig_sizeflag &= ~AFLAG;
3738 else if (p[4] == '3' && p[5] == '2')
3739 priv.orig_sizeflag |= AFLAG;
3740 }
3741 }
3742 else if (CONST_STRNEQ (p, "data"))
3743 {
3744 if (p[4] == '1' && p[5] == '6')
3745 priv.orig_sizeflag &= ~DFLAG;
3746 else if (p[4] == '3' && p[5] == '2')
3747 priv.orig_sizeflag |= DFLAG;
3748 }
3749 else if (CONST_STRNEQ (p, "suffix"))
3750 priv.orig_sizeflag |= SUFFIX_ALWAYS;
3751
3752 p = strchr (p, ',');
3753 if (p != NULL)
3754 p++;
3755 }
3756
3757 if (intel_syntax)
3758 {
3759 names64 = intel_names64;
3760 names32 = intel_names32;
3761 names16 = intel_names16;
3762 names8 = intel_names8;
3763 names8rex = intel_names8rex;
3764 names_seg = intel_names_seg;
3765 index16 = intel_index16;
3766 open_char = '[';
3767 close_char = ']';
3768 separator_char = '+';
3769 scale_char = '*';
3770 }
3771 else
3772 {
3773 names64 = att_names64;
3774 names32 = att_names32;
3775 names16 = att_names16;
3776 names8 = att_names8;
3777 names8rex = att_names8rex;
3778 names_seg = att_names_seg;
3779 index16 = att_index16;
3780 open_char = '(';
3781 close_char = ')';
3782 separator_char = ',';
3783 scale_char = ',';
3784 }
3785
3786 /* The output looks better if we put 7 bytes on a line, since that
3787 puts most long word instructions on a single line. */
3788 info->bytes_per_line = 7;
3789
3790 info->private_data = &priv;
3791 priv.max_fetched = priv.the_buffer;
3792 priv.insn_start = pc;
3793
3794 obuf[0] = 0;
3795 for (i = 0; i < MAX_OPERANDS; ++i)
3796 {
3797 op_out[i][0] = 0;
3798 op_index[i] = -1;
3799 }
3800
3801 the_info = info;
3802 start_pc = pc;
3803 start_codep = priv.the_buffer;
3804 codep = priv.the_buffer;
3805
3806 if (setjmp (priv.bailout) != 0)
3807 {
3808 const char *name;
3809
3810 /* Getting here means we tried for data but didn't get it. That
3811 means we have an incomplete instruction of some sort. Just
3812 print the first byte as a prefix or a .byte pseudo-op. */
3813 if (codep > priv.the_buffer)
3814 {
3815 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3816 if (name != NULL)
3817 (*info->fprintf_func) (info->stream, "%s", name);
3818 else
3819 {
3820 /* Just print the first byte as a .byte instruction. */
3821 (*info->fprintf_func) (info->stream, ".byte 0x%x",
3822 (unsigned int) priv.the_buffer[0]);
3823 }
3824
3825 return 1;
3826 }
3827
3828 return -1;
3829 }
3830
3831 obufp = obuf;
3832 ckprefix ();
3833
3834 insn_codep = codep;
3835 sizeflag = priv.orig_sizeflag;
3836
3837 FETCH_DATA (info, codep + 1);
3838 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3839
3840 if (((prefixes & PREFIX_FWAIT)
3841 && ((*codep < 0xd8) || (*codep > 0xdf)))
3842 || (rex && rex_used))
3843 {
3844 const char *name;
3845
3846 /* fwait not followed by floating point instruction, or rex followed
3847 by other prefixes. Print the first prefix. */
3848 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3849 if (name == NULL)
3850 name = INTERNAL_DISASSEMBLER_ERROR;
3851 (*info->fprintf_func) (info->stream, "%s", name);
3852 return 1;
3853 }
3854
3855 op = 0;
3856 if (*codep == 0x0f)
3857 {
3858 unsigned char threebyte;
3859 FETCH_DATA (info, codep + 2);
3860 threebyte = *++codep;
3861 dp = &dis386_twobyte[threebyte];
3862 need_modrm = twobyte_has_modrm[*codep];
3863 codep++;
3864 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3865 {
3866 FETCH_DATA (info, codep + 2);
3867 op = *codep++;
3868 }
3869 }
3870 else
3871 {
3872 dp = &dis386[*codep];
3873 need_modrm = onebyte_has_modrm[*codep];
3874 codep++;
3875 }
3876
3877 if ((prefixes & PREFIX_REPZ))
3878 {
3879 repz_prefix = "repz ";
3880 used_prefixes |= PREFIX_REPZ;
3881 }
3882 else
3883 repz_prefix = NULL;
3884
3885 if ((prefixes & PREFIX_REPNZ))
3886 {
3887 repnz_prefix = "repnz ";
3888 used_prefixes |= PREFIX_REPNZ;
3889 }
3890 else
3891 repnz_prefix = NULL;
3892
3893 if ((prefixes & PREFIX_LOCK))
3894 {
3895 lock_prefix = "lock ";
3896 used_prefixes |= PREFIX_LOCK;
3897 }
3898 else
3899 lock_prefix = NULL;
3900
3901 addr_prefix = NULL;
3902 if (prefixes & PREFIX_ADDR)
3903 {
3904 sizeflag ^= AFLAG;
3905 if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
3906 {
3907 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
3908 addr_prefix = "addr32 ";
3909 else
3910 addr_prefix = "addr16 ";
3911 used_prefixes |= PREFIX_ADDR;
3912 }
3913 }
3914
3915 data_prefix = NULL;
3916 if ((prefixes & PREFIX_DATA))
3917 {
3918 sizeflag ^= DFLAG;
3919 if (dp->op[2].bytemode == cond_jump_mode
3920 && dp->op[0].bytemode == v_mode
3921 && !intel_syntax)
3922 {
3923 if (sizeflag & DFLAG)
3924 data_prefix = "data32 ";
3925 else
3926 data_prefix = "data16 ";
3927 used_prefixes |= PREFIX_DATA;
3928 }
3929 }
3930
3931 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3932 {
3933 dp = &three_byte_table[dp->op[1].bytemode][op];
3934 modrm.mod = (*codep >> 6) & 3;
3935 modrm.reg = (*codep >> 3) & 7;
3936 modrm.rm = *codep & 7;
3937 }
3938 else if (need_modrm)
3939 {
3940 FETCH_DATA (info, codep + 1);
3941 modrm.mod = (*codep >> 6) & 3;
3942 modrm.reg = (*codep >> 3) & 7;
3943 modrm.rm = *codep & 7;
3944 }
3945
3946 if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
3947 {
3948 dofloat (sizeflag);
3949 }
3950 else
3951 {
3952 dp = get_valid_dis386 (dp);
3953 if (dp != NULL && putop (dp->name, sizeflag) == 0)
3954 {
3955 for (i = 0; i < MAX_OPERANDS; ++i)
3956 {
3957 obufp = op_out[i];
3958 op_ad = MAX_OPERANDS - 1 - i;
3959 if (dp->op[i].rtn)
3960 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
3961 }
3962 }
3963 }
3964
3965 /* See if any prefixes were not used. If so, print the first one
3966 separately. If we don't do this, we'll wind up printing an
3967 instruction stream which does not precisely correspond to the
3968 bytes we are disassembling. */
3969 if ((prefixes & ~used_prefixes) != 0)
3970 {
3971 const char *name;
3972
3973 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3974 if (name == NULL)
3975 name = INTERNAL_DISASSEMBLER_ERROR;
3976 (*info->fprintf_func) (info->stream, "%s", name);
3977 return 1;
3978 }
3979 if (rex & ~rex_used)
3980 {
3981 const char *name;
3982 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
3983 if (name == NULL)
3984 name = INTERNAL_DISASSEMBLER_ERROR;
3985 (*info->fprintf_func) (info->stream, "%s ", name);
3986 }
3987
3988 prefix_obuf[0] = 0;
3989 prefix_obufp = prefix_obuf;
3990 if (lock_prefix)
3991 prefix_obufp = stpcpy (prefix_obufp, lock_prefix);
3992 if (repz_prefix)
3993 prefix_obufp = stpcpy (prefix_obufp, repz_prefix);
3994 if (repnz_prefix)
3995 prefix_obufp = stpcpy (prefix_obufp, repnz_prefix);
3996 if (addr_prefix)
3997 prefix_obufp = stpcpy (prefix_obufp, addr_prefix);
3998 if (data_prefix)
3999 prefix_obufp = stpcpy (prefix_obufp, data_prefix);
4000
4001 if (prefix_obuf[0] != 0)
4002 (*info->fprintf_func) (info->stream, "%s", prefix_obuf);
4003
4004 obufp = obuf + strlen (obuf);
4005 for (i = strlen (obuf) + strlen (prefix_obuf); i < 6; i++)
4006 oappend (" ");
4007 oappend (" ");
4008 (*info->fprintf_func) (info->stream, "%s", obuf);
4009
4010 /* The enter and bound instructions are printed with operands in the same
4011 order as the intel book; everything else is printed in reverse order. */
4012 if (intel_syntax || two_source_ops)
4013 {
4014 bfd_vma riprel;
4015
4016 for (i = 0; i < MAX_OPERANDS; ++i)
4017 op_txt[i] = op_out[i];
4018
4019 for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
4020 {
4021 op_ad = op_index[i];
4022 op_index[i] = op_index[MAX_OPERANDS - 1 - i];
4023 op_index[MAX_OPERANDS - 1 - i] = op_ad;
4024 riprel = op_riprel[i];
4025 op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
4026 op_riprel[MAX_OPERANDS - 1 - i] = riprel;
4027 }
4028 }
4029 else
4030 {
4031 for (i = 0; i < MAX_OPERANDS; ++i)
4032 op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
4033 }
4034
4035 needcomma = 0;
4036 for (i = 0; i < MAX_OPERANDS; ++i)
4037 if (*op_txt[i])
4038 {
4039 if (needcomma)
4040 (*info->fprintf_func) (info->stream, ",");
4041 if (op_index[i] != -1 && !op_riprel[i])
4042 (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
4043 else
4044 (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
4045 needcomma = 1;
4046 }
4047
4048 for (i = 0; i < MAX_OPERANDS; i++)
4049 if (op_index[i] != -1 && op_riprel[i])
4050 {
4051 (*info->fprintf_func) (info->stream, " # ");
4052 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
4053 + op_address[op_index[i]]), info);
4054 break;
4055 }
4056 return codep - priv.the_buffer;
4057 }
4058
4059 static const char *float_mem[] = {
4060 /* d8 */
4061 "fadd{s||s|}",
4062 "fmul{s||s|}",
4063 "fcom{s||s|}",
4064 "fcomp{s||s|}",
4065 "fsub{s||s|}",
4066 "fsubr{s||s|}",
4067 "fdiv{s||s|}",
4068 "fdivr{s||s|}",
4069 /* d9 */
4070 "fld{s||s|}",
4071 "(bad)",
4072 "fst{s||s|}",
4073 "fstp{s||s|}",
4074 "fldenvIC",
4075 "fldcw",
4076 "fNstenvIC",
4077 "fNstcw",
4078 /* da */
4079 "fiadd{l||l|}",
4080 "fimul{l||l|}",
4081 "ficom{l||l|}",
4082 "ficomp{l||l|}",
4083 "fisub{l||l|}",
4084 "fisubr{l||l|}",
4085 "fidiv{l||l|}",
4086 "fidivr{l||l|}",
4087 /* db */
4088 "fild{l||l|}",
4089 "fisttp{l||l|}",
4090 "fist{l||l|}",
4091 "fistp{l||l|}",
4092 "(bad)",
4093 "fld{t||t|}",
4094 "(bad)",
4095 "fstp{t||t|}",
4096 /* dc */
4097 "fadd{l||l|}",
4098 "fmul{l||l|}",
4099 "fcom{l||l|}",
4100 "fcomp{l||l|}",
4101 "fsub{l||l|}",
4102 "fsubr{l||l|}",
4103 "fdiv{l||l|}",
4104 "fdivr{l||l|}",
4105 /* dd */
4106 "fld{l||l|}",
4107 "fisttp{ll||ll|}",
4108 "fst{l||l|}",
4109 "fstp{l||l|}",
4110 "frstorIC",
4111 "(bad)",
4112 "fNsaveIC",
4113 "fNstsw",
4114 /* de */
4115 "fiadd",
4116 "fimul",
4117 "ficom",
4118 "ficomp",
4119 "fisub",
4120 "fisubr",
4121 "fidiv",
4122 "fidivr",
4123 /* df */
4124 "fild",
4125 "fisttp",
4126 "fist",
4127 "fistp",
4128 "fbld",
4129 "fild{ll||ll|}",
4130 "fbstp",
4131 "fistp{ll||ll|}",
4132 };
4133
4134 static const unsigned char float_mem_mode[] = {
4135 /* d8 */
4136 d_mode,
4137 d_mode,
4138 d_mode,
4139 d_mode,
4140 d_mode,
4141 d_mode,
4142 d_mode,
4143 d_mode,
4144 /* d9 */
4145 d_mode,
4146 0,
4147 d_mode,
4148 d_mode,
4149 0,
4150 w_mode,
4151 0,
4152 w_mode,
4153 /* da */
4154 d_mode,
4155 d_mode,
4156 d_mode,
4157 d_mode,
4158 d_mode,
4159 d_mode,
4160 d_mode,
4161 d_mode,
4162 /* db */
4163 d_mode,
4164 d_mode,
4165 d_mode,
4166 d_mode,
4167 0,
4168 t_mode,
4169 0,
4170 t_mode,
4171 /* dc */
4172 q_mode,
4173 q_mode,
4174 q_mode,
4175 q_mode,
4176 q_mode,
4177 q_mode,
4178 q_mode,
4179 q_mode,
4180 /* dd */
4181 q_mode,
4182 q_mode,
4183 q_mode,
4184 q_mode,
4185 0,
4186 0,
4187 0,
4188 w_mode,
4189 /* de */
4190 w_mode,
4191 w_mode,
4192 w_mode,
4193 w_mode,
4194 w_mode,
4195 w_mode,
4196 w_mode,
4197 w_mode,
4198 /* df */
4199 w_mode,
4200 w_mode,
4201 w_mode,
4202 w_mode,
4203 t_mode,
4204 q_mode,
4205 t_mode,
4206 q_mode
4207 };
4208
4209 #define ST { OP_ST, 0 }
4210 #define STi { OP_STi, 0 }
4211
4212 #define FGRPd9_2 NULL, { { NULL, 0 } }
4213 #define FGRPd9_4 NULL, { { NULL, 1 } }
4214 #define FGRPd9_5 NULL, { { NULL, 2 } }
4215 #define FGRPd9_6 NULL, { { NULL, 3 } }
4216 #define FGRPd9_7 NULL, { { NULL, 4 } }
4217 #define FGRPda_5 NULL, { { NULL, 5 } }
4218 #define FGRPdb_4 NULL, { { NULL, 6 } }
4219 #define FGRPde_3 NULL, { { NULL, 7 } }
4220 #define FGRPdf_4 NULL, { { NULL, 8 } }
4221
4222 static const struct dis386 float_reg[][8] = {
4223 /* d8 */
4224 {
4225 { "fadd", { ST, STi } },
4226 { "fmul", { ST, STi } },
4227 { "fcom", { STi } },
4228 { "fcomp", { STi } },
4229 { "fsub", { ST, STi } },
4230 { "fsubr", { ST, STi } },
4231 { "fdiv", { ST, STi } },
4232 { "fdivr", { ST, STi } },
4233 },
4234 /* d9 */
4235 {
4236 { "fld", { STi } },
4237 { "fxch", { STi } },
4238 { FGRPd9_2 },
4239 { "(bad)", { XX } },
4240 { FGRPd9_4 },
4241 { FGRPd9_5 },
4242 { FGRPd9_6 },
4243 { FGRPd9_7 },
4244 },
4245 /* da */
4246 {
4247 { "fcmovb", { ST, STi } },
4248 { "fcmove", { ST, STi } },
4249 { "fcmovbe",{ ST, STi } },
4250 { "fcmovu", { ST, STi } },
4251 { "(bad)", { XX } },
4252 { FGRPda_5 },
4253 { "(bad)", { XX } },
4254 { "(bad)", { XX } },
4255 },
4256 /* db */
4257 {
4258 { "fcmovnb",{ ST, STi } },
4259 { "fcmovne",{ ST, STi } },
4260 { "fcmovnbe",{ ST, STi } },
4261 { "fcmovnu",{ ST, STi } },
4262 { FGRPdb_4 },
4263 { "fucomi", { ST, STi } },
4264 { "fcomi", { ST, STi } },
4265 { "(bad)", { XX } },
4266 },
4267 /* dc */
4268 {
4269 { "fadd", { STi, ST } },
4270 { "fmul", { STi, ST } },
4271 { "(bad)", { XX } },
4272 { "(bad)", { XX } },
4273 #if SYSV386_COMPAT
4274 { "fsub", { STi, ST } },
4275 { "fsubr", { STi, ST } },
4276 { "fdiv", { STi, ST } },
4277 { "fdivr", { STi, ST } },
4278 #else
4279 { "fsubr", { STi, ST } },
4280 { "fsub", { STi, ST } },
4281 { "fdivr", { STi, ST } },
4282 { "fdiv", { STi, ST } },
4283 #endif
4284 },
4285 /* dd */
4286 {
4287 { "ffree", { STi } },
4288 { "(bad)", { XX } },
4289 { "fst", { STi } },
4290 { "fstp", { STi } },
4291 { "fucom", { STi } },
4292 { "fucomp", { STi } },
4293 { "(bad)", { XX } },
4294 { "(bad)", { XX } },
4295 },
4296 /* de */
4297 {
4298 { "faddp", { STi, ST } },
4299 { "fmulp", { STi, ST } },
4300 { "(bad)", { XX } },
4301 { FGRPde_3 },
4302 #if SYSV386_COMPAT
4303 { "fsubp", { STi, ST } },
4304 { "fsubrp", { STi, ST } },
4305 { "fdivp", { STi, ST } },
4306 { "fdivrp", { STi, ST } },
4307 #else
4308 { "fsubrp", { STi, ST } },
4309 { "fsubp", { STi, ST } },
4310 { "fdivrp", { STi, ST } },
4311 { "fdivp", { STi, ST } },
4312 #endif
4313 },
4314 /* df */
4315 {
4316 { "ffreep", { STi } },
4317 { "(bad)", { XX } },
4318 { "(bad)", { XX } },
4319 { "(bad)", { XX } },
4320 { FGRPdf_4 },
4321 { "fucomip", { ST, STi } },
4322 { "fcomip", { ST, STi } },
4323 { "(bad)", { XX } },
4324 },
4325 };
4326
4327 static char *fgrps[][8] = {
4328 /* d9_2 0 */
4329 {
4330 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4331 },
4332
4333 /* d9_4 1 */
4334 {
4335 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4336 },
4337
4338 /* d9_5 2 */
4339 {
4340 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4341 },
4342
4343 /* d9_6 3 */
4344 {
4345 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4346 },
4347
4348 /* d9_7 4 */
4349 {
4350 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4351 },
4352
4353 /* da_5 5 */
4354 {
4355 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4356 },
4357
4358 /* db_4 6 */
4359 {
4360 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4361 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4362 },
4363
4364 /* de_3 7 */
4365 {
4366 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4367 },
4368
4369 /* df_4 8 */
4370 {
4371 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4372 },
4373 };
4374
4375 static void
4376 OP_Skip_MODRM (int bytemode ATTRIBUTE_UNUSED,
4377 int sizeflag ATTRIBUTE_UNUSED)
4378 {
4379 /* Skip mod/rm byte. */
4380 MODRM_CHECK;
4381 codep++;
4382 }
4383
4384 static void
4385 dofloat (int sizeflag)
4386 {
4387 const struct dis386 *dp;
4388 unsigned char floatop;
4389
4390 floatop = codep[-1];
4391
4392 if (modrm.mod != 3)
4393 {
4394 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
4395
4396 putop (float_mem[fp_indx], sizeflag);
4397 obufp = op_out[0];
4398 op_ad = 2;
4399 OP_E (float_mem_mode[fp_indx], sizeflag);
4400 return;
4401 }
4402 /* Skip mod/rm byte. */
4403 MODRM_CHECK;
4404 codep++;
4405
4406 dp = &float_reg[floatop - 0xd8][modrm.reg];
4407 if (dp->name == NULL)
4408 {
4409 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
4410
4411 /* Instruction fnstsw is only one with strange arg. */
4412 if (floatop == 0xdf && codep[-1] == 0xe0)
4413 strcpy (op_out[0], names16[0]);
4414 }
4415 else
4416 {
4417 putop (dp->name, sizeflag);
4418
4419 obufp = op_out[0];
4420 op_ad = 2;
4421 if (dp->op[0].rtn)
4422 (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
4423
4424 obufp = op_out[1];
4425 op_ad = 1;
4426 if (dp->op[1].rtn)
4427 (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
4428 }
4429 }
4430
4431 static void
4432 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4433 {
4434 oappend ("%st" + intel_syntax);
4435 }
4436
4437 static void
4438 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4439 {
4440 sprintf (scratchbuf, "%%st(%d)", modrm.rm);
4441 oappend (scratchbuf + intel_syntax);
4442 }
4443
4444 /* Capital letters in template are macros. */
4445 static int
4446 putop (const char *template, int sizeflag)
4447 {
4448 const char *p;
4449 int alt = 0;
4450
4451 for (p = template; *p; p++)
4452 {
4453 switch (*p)
4454 {
4455 default:
4456 *obufp++ = *p;
4457 break;
4458 case '{':
4459 alt = 0;
4460 if (intel_syntax)
4461 alt += 1;
4462 if (address_mode == mode_64bit)
4463 alt += 2;
4464 while (alt != 0)
4465 {
4466 while (*++p != '|')
4467 {
4468 if (*p == '}')
4469 {
4470 /* Alternative not valid. */
4471 strcpy (obuf, "(bad)");
4472 obufp = obuf + 5;
4473 return 1;
4474 }
4475 else if (*p == '\0')
4476 abort ();
4477 }
4478 alt--;
4479 }
4480 /* Fall through. */
4481 case 'I':
4482 alt = 1;
4483 continue;
4484 case '|':
4485 while (*++p != '}')
4486 {
4487 if (*p == '\0')
4488 abort ();
4489 }
4490 break;
4491 case '}':
4492 break;
4493 case 'A':
4494 if (intel_syntax)
4495 break;
4496 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4497 *obufp++ = 'b';
4498 break;
4499 case 'B':
4500 if (intel_syntax)
4501 break;
4502 if (sizeflag & SUFFIX_ALWAYS)
4503 *obufp++ = 'b';
4504 break;
4505 case 'C':
4506 if (intel_syntax && !alt)
4507 break;
4508 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
4509 {
4510 if (sizeflag & DFLAG)
4511 *obufp++ = intel_syntax ? 'd' : 'l';
4512 else
4513 *obufp++ = intel_syntax ? 'w' : 's';
4514 used_prefixes |= (prefixes & PREFIX_DATA);
4515 }
4516 break;
4517 case 'D':
4518 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
4519 break;
4520 USED_REX (REX_W);
4521 if (modrm.mod == 3)
4522 {
4523 if (rex & REX_W)
4524 *obufp++ = 'q';
4525 else if (sizeflag & DFLAG)
4526 *obufp++ = intel_syntax ? 'd' : 'l';
4527 else
4528 *obufp++ = 'w';
4529 used_prefixes |= (prefixes & PREFIX_DATA);
4530 }
4531 else
4532 *obufp++ = 'w';
4533 break;
4534 case 'E': /* For jcxz/jecxz */
4535 if (address_mode == mode_64bit)
4536 {
4537 if (sizeflag & AFLAG)
4538 *obufp++ = 'r';
4539 else
4540 *obufp++ = 'e';
4541 }
4542 else
4543 if (sizeflag & AFLAG)
4544 *obufp++ = 'e';
4545 used_prefixes |= (prefixes & PREFIX_ADDR);
4546 break;
4547 case 'F':
4548 if (intel_syntax)
4549 break;
4550 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
4551 {
4552 if (sizeflag & AFLAG)
4553 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
4554 else
4555 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
4556 used_prefixes |= (prefixes & PREFIX_ADDR);
4557 }
4558 break;
4559 case 'G':
4560 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
4561 break;
4562 if ((rex & REX_W) || (sizeflag & DFLAG))
4563 *obufp++ = 'l';
4564 else
4565 *obufp++ = 'w';
4566 if (!(rex & REX_W))
4567 used_prefixes |= (prefixes & PREFIX_DATA);
4568 break;
4569 case 'H':
4570 if (intel_syntax)
4571 break;
4572 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
4573 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
4574 {
4575 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
4576 *obufp++ = ',';
4577 *obufp++ = 'p';
4578 if (prefixes & PREFIX_DS)
4579 *obufp++ = 't';
4580 else
4581 *obufp++ = 'n';
4582 }
4583 break;
4584 case 'J':
4585 if (intel_syntax)
4586 break;
4587 *obufp++ = 'l';
4588 break;
4589 case 'K':
4590 USED_REX (REX_W);
4591 if (rex & REX_W)
4592 *obufp++ = 'q';
4593 else
4594 *obufp++ = 'd';
4595 break;
4596 case 'Z':
4597 if (intel_syntax)
4598 break;
4599 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
4600 {
4601 *obufp++ = 'q';
4602 break;
4603 }
4604 /* Fall through. */
4605 case 'L':
4606 if (intel_syntax)
4607 break;
4608 if (sizeflag & SUFFIX_ALWAYS)
4609 *obufp++ = 'l';
4610 break;
4611 case 'N':
4612 if ((prefixes & PREFIX_FWAIT) == 0)
4613 *obufp++ = 'n';
4614 else
4615 used_prefixes |= PREFIX_FWAIT;
4616 break;
4617 case 'O':
4618 USED_REX (REX_W);
4619 if (rex & REX_W)
4620 *obufp++ = 'o';
4621 else if (intel_syntax && (sizeflag & DFLAG))
4622 *obufp++ = 'q';
4623 else
4624 *obufp++ = 'd';
4625 if (!(rex & REX_W))
4626 used_prefixes |= (prefixes & PREFIX_DATA);
4627 break;
4628 case 'T':
4629 if (intel_syntax)
4630 break;
4631 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4632 {
4633 *obufp++ = 'q';
4634 break;
4635 }
4636 /* Fall through. */
4637 case 'P':
4638 if (intel_syntax)
4639 break;
4640 if ((prefixes & PREFIX_DATA)
4641 || (rex & REX_W)
4642 || (sizeflag & SUFFIX_ALWAYS))
4643 {
4644 USED_REX (REX_W);
4645 if (rex & REX_W)
4646 *obufp++ = 'q';
4647 else
4648 {
4649 if (sizeflag & DFLAG)
4650 *obufp++ = 'l';
4651 else
4652 *obufp++ = 'w';
4653 }
4654 used_prefixes |= (prefixes & PREFIX_DATA);
4655 }
4656 break;
4657 case 'U':
4658 if (intel_syntax)
4659 break;
4660 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4661 {
4662 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4663 *obufp++ = 'q';
4664 break;
4665 }
4666 /* Fall through. */
4667 case 'Q':
4668 if (intel_syntax && !alt)
4669 break;
4670 USED_REX (REX_W);
4671 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
4672 {
4673 if (rex & REX_W)
4674 *obufp++ = 'q';
4675 else
4676 {
4677 if (sizeflag & DFLAG)
4678 *obufp++ = intel_syntax ? 'd' : 'l';
4679 else
4680 *obufp++ = 'w';
4681 }
4682 used_prefixes |= (prefixes & PREFIX_DATA);
4683 }
4684 break;
4685 case 'R':
4686 USED_REX (REX_W);
4687 if (rex & REX_W)
4688 *obufp++ = 'q';
4689 else if (sizeflag & DFLAG)
4690 {
4691 if (intel_syntax)
4692 *obufp++ = 'd';
4693 else
4694 *obufp++ = 'l';
4695 }
4696 else
4697 *obufp++ = 'w';
4698 if (intel_syntax && !p[1]
4699 && ((rex & REX_W) || (sizeflag & DFLAG)))
4700 *obufp++ = 'e';
4701 if (!(rex & REX_W))
4702 used_prefixes |= (prefixes & PREFIX_DATA);
4703 break;
4704 case 'V':
4705 if (intel_syntax)
4706 break;
4707 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4708 {
4709 if (sizeflag & SUFFIX_ALWAYS)
4710 *obufp++ = 'q';
4711 break;
4712 }
4713 /* Fall through. */
4714 case 'S':
4715 if (intel_syntax)
4716 break;
4717 if (sizeflag & SUFFIX_ALWAYS)
4718 {
4719 if (rex & REX_W)
4720 *obufp++ = 'q';
4721 else
4722 {
4723 if (sizeflag & DFLAG)
4724 *obufp++ = 'l';
4725 else
4726 *obufp++ = 'w';
4727 used_prefixes |= (prefixes & PREFIX_DATA);
4728 }
4729 }
4730 break;
4731 case 'X':
4732 if (prefixes & PREFIX_DATA)
4733 *obufp++ = 'd';
4734 else
4735 *obufp++ = 's';
4736 used_prefixes |= (prefixes & PREFIX_DATA);
4737 break;
4738 case 'Y':
4739 if (intel_syntax)
4740 break;
4741 if (rex & REX_W)
4742 {
4743 USED_REX (REX_W);
4744 *obufp++ = 'q';
4745 }
4746 break;
4747 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4748 case 'W':
4749 /* operand size flag for cwtl, cbtw */
4750 USED_REX (REX_W);
4751 if (rex & REX_W)
4752 {
4753 if (intel_syntax)
4754 *obufp++ = 'd';
4755 else
4756 *obufp++ = 'l';
4757 }
4758 else if (sizeflag & DFLAG)
4759 *obufp++ = 'w';
4760 else
4761 *obufp++ = 'b';
4762 if (!(rex & REX_W))
4763 used_prefixes |= (prefixes & PREFIX_DATA);
4764 break;
4765 }
4766 alt = 0;
4767 }
4768 *obufp = 0;
4769 return 0;
4770 }
4771
4772 static void
4773 oappend (const char *s)
4774 {
4775 strcpy (obufp, s);
4776 obufp += strlen (s);
4777 }
4778
4779 static void
4780 append_seg (void)
4781 {
4782 if (prefixes & PREFIX_CS)
4783 {
4784 used_prefixes |= PREFIX_CS;
4785 oappend ("%cs:" + intel_syntax);
4786 }
4787 if (prefixes & PREFIX_DS)
4788 {
4789 used_prefixes |= PREFIX_DS;
4790 oappend ("%ds:" + intel_syntax);
4791 }
4792 if (prefixes & PREFIX_SS)
4793 {
4794 used_prefixes |= PREFIX_SS;
4795 oappend ("%ss:" + intel_syntax);
4796 }
4797 if (prefixes & PREFIX_ES)
4798 {
4799 used_prefixes |= PREFIX_ES;
4800 oappend ("%es:" + intel_syntax);
4801 }
4802 if (prefixes & PREFIX_FS)
4803 {
4804 used_prefixes |= PREFIX_FS;
4805 oappend ("%fs:" + intel_syntax);
4806 }
4807 if (prefixes & PREFIX_GS)
4808 {
4809 used_prefixes |= PREFIX_GS;
4810 oappend ("%gs:" + intel_syntax);
4811 }
4812 }
4813
4814 static void
4815 OP_indirE (int bytemode, int sizeflag)
4816 {
4817 if (!intel_syntax)
4818 oappend ("*");
4819 OP_E (bytemode, sizeflag);
4820 }
4821
4822 static void
4823 print_operand_value (char *buf, int hex, bfd_vma disp)
4824 {
4825 if (address_mode == mode_64bit)
4826 {
4827 if (hex)
4828 {
4829 char tmp[30];
4830 int i;
4831 buf[0] = '0';
4832 buf[1] = 'x';
4833 sprintf_vma (tmp, disp);
4834 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
4835 strcpy (buf + 2, tmp + i);
4836 }
4837 else
4838 {
4839 bfd_signed_vma v = disp;
4840 char tmp[30];
4841 int i;
4842 if (v < 0)
4843 {
4844 *(buf++) = '-';
4845 v = -disp;
4846 /* Check for possible overflow on 0x8000000000000000. */
4847 if (v < 0)
4848 {
4849 strcpy (buf, "9223372036854775808");
4850 return;
4851 }
4852 }
4853 if (!v)
4854 {
4855 strcpy (buf, "0");
4856 return;
4857 }
4858
4859 i = 0;
4860 tmp[29] = 0;
4861 while (v)
4862 {
4863 tmp[28 - i] = (v % 10) + '0';
4864 v /= 10;
4865 i++;
4866 }
4867 strcpy (buf, tmp + 29 - i);
4868 }
4869 }
4870 else
4871 {
4872 if (hex)
4873 sprintf (buf, "0x%x", (unsigned int) disp);
4874 else
4875 sprintf (buf, "%d", (int) disp);
4876 }
4877 }
4878
4879 /* Put DISP in BUF as signed hex number. */
4880
4881 static void
4882 print_displacement (char *buf, bfd_vma disp)
4883 {
4884 bfd_signed_vma val = disp;
4885 char tmp[30];
4886 int i, j = 0;
4887
4888 if (val < 0)
4889 {
4890 buf[j++] = '-';
4891 val = -disp;
4892
4893 /* Check for possible overflow. */
4894 if (val < 0)
4895 {
4896 switch (address_mode)
4897 {
4898 case mode_64bit:
4899 strcpy (buf + j, "0x8000000000000000");
4900 break;
4901 case mode_32bit:
4902 strcpy (buf + j, "0x80000000");
4903 break;
4904 case mode_16bit:
4905 strcpy (buf + j, "0x8000");
4906 break;
4907 }
4908 return;
4909 }
4910 }
4911
4912 buf[j++] = '0';
4913 buf[j++] = 'x';
4914
4915 sprintf_vma (tmp, val);
4916 for (i = 0; tmp[i] == '0'; i++)
4917 continue;
4918 if (tmp[i] == '\0')
4919 i--;
4920 strcpy (buf + j, tmp + i);
4921 }
4922
4923 static void
4924 intel_operand_size (int bytemode, int sizeflag)
4925 {
4926 switch (bytemode)
4927 {
4928 case b_mode:
4929 case dqb_mode:
4930 oappend ("BYTE PTR ");
4931 break;
4932 case w_mode:
4933 case dqw_mode:
4934 oappend ("WORD PTR ");
4935 break;
4936 case stack_v_mode:
4937 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4938 {
4939 oappend ("QWORD PTR ");
4940 used_prefixes |= (prefixes & PREFIX_DATA);
4941 break;
4942 }
4943 /* FALLTHRU */
4944 case v_mode:
4945 case dq_mode:
4946 USED_REX (REX_W);
4947 if (rex & REX_W)
4948 oappend ("QWORD PTR ");
4949 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
4950 oappend ("DWORD PTR ");
4951 else
4952 oappend ("WORD PTR ");
4953 used_prefixes |= (prefixes & PREFIX_DATA);
4954 break;
4955 case z_mode:
4956 if ((rex & REX_W) || (sizeflag & DFLAG))
4957 *obufp++ = 'D';
4958 oappend ("WORD PTR ");
4959 if (!(rex & REX_W))
4960 used_prefixes |= (prefixes & PREFIX_DATA);
4961 break;
4962 case d_mode:
4963 case dqd_mode:
4964 oappend ("DWORD PTR ");
4965 break;
4966 case q_mode:
4967 oappend ("QWORD PTR ");
4968 break;
4969 case m_mode:
4970 if (address_mode == mode_64bit)
4971 oappend ("QWORD PTR ");
4972 else
4973 oappend ("DWORD PTR ");
4974 break;
4975 case f_mode:
4976 if (sizeflag & DFLAG)
4977 oappend ("FWORD PTR ");
4978 else
4979 oappend ("DWORD PTR ");
4980 used_prefixes |= (prefixes & PREFIX_DATA);
4981 break;
4982 case t_mode:
4983 oappend ("TBYTE PTR ");
4984 break;
4985 case x_mode:
4986 oappend ("XMMWORD PTR ");
4987 break;
4988 case o_mode:
4989 oappend ("OWORD PTR ");
4990 break;
4991 default:
4992 break;
4993 }
4994 }
4995
4996 static void
4997 OP_E (int bytemode, int sizeflag)
4998 {
4999 bfd_vma disp;
5000 int add = 0;
5001 int riprel = 0;
5002 USED_REX (REX_B);
5003 if (rex & REX_B)
5004 add += 8;
5005
5006 /* Skip mod/rm byte. */
5007 MODRM_CHECK;
5008 codep++;
5009
5010 if (modrm.mod == 3)
5011 {
5012 switch (bytemode)
5013 {
5014 case b_mode:
5015 USED_REX (0);
5016 if (rex)
5017 oappend (names8rex[modrm.rm + add]);
5018 else
5019 oappend (names8[modrm.rm + add]);
5020 break;
5021 case w_mode:
5022 oappend (names16[modrm.rm + add]);
5023 break;
5024 case d_mode:
5025 oappend (names32[modrm.rm + add]);
5026 break;
5027 case q_mode:
5028 oappend (names64[modrm.rm + add]);
5029 break;
5030 case m_mode:
5031 if (address_mode == mode_64bit)
5032 oappend (names64[modrm.rm + add]);
5033 else
5034 oappend (names32[modrm.rm + add]);
5035 break;
5036 case stack_v_mode:
5037 if (address_mode == mode_64bit && (sizeflag & DFLAG))
5038 {
5039 oappend (names64[modrm.rm + add]);
5040 used_prefixes |= (prefixes & PREFIX_DATA);
5041 break;
5042 }
5043 bytemode = v_mode;
5044 /* FALLTHRU */
5045 case v_mode:
5046 case dq_mode:
5047 case dqb_mode:
5048 case dqd_mode:
5049 case dqw_mode:
5050 USED_REX (REX_W);
5051 if (rex & REX_W)
5052 oappend (names64[modrm.rm + add]);
5053 else if ((sizeflag & DFLAG) || bytemode != v_mode)
5054 oappend (names32[modrm.rm + add]);
5055 else
5056 oappend (names16[modrm.rm + add]);
5057 used_prefixes |= (prefixes & PREFIX_DATA);
5058 break;
5059 case 0:
5060 break;
5061 default:
5062 oappend (INTERNAL_DISASSEMBLER_ERROR);
5063 break;
5064 }
5065 return;
5066 }
5067
5068 disp = 0;
5069 if (intel_syntax)
5070 intel_operand_size (bytemode, sizeflag);
5071 append_seg ();
5072
5073 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5074 {
5075 /* 32/64 bit address mode */
5076 int havedisp;
5077 int havesib;
5078 int havebase;
5079 int base;
5080 int index = 0;
5081 int scale = 0;
5082
5083 havesib = 0;
5084 havebase = 1;
5085 base = modrm.rm;
5086
5087 if (base == 4)
5088 {
5089 havesib = 1;
5090 FETCH_DATA (the_info, codep + 1);
5091 index = (*codep >> 3) & 7;
5092 if (address_mode == mode_64bit || index != 0x4)
5093 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
5094 scale = (*codep >> 6) & 3;
5095 base = *codep & 7;
5096 USED_REX (REX_X);
5097 if (rex & REX_X)
5098 index += 8;
5099 codep++;
5100 }
5101 base += add;
5102
5103 switch (modrm.mod)
5104 {
5105 case 0:
5106 if ((base & 7) == 5)
5107 {
5108 havebase = 0;
5109 if (address_mode == mode_64bit && !havesib)
5110 riprel = 1;
5111 disp = get32s ();
5112 }
5113 break;
5114 case 1:
5115 FETCH_DATA (the_info, codep + 1);
5116 disp = *codep++;
5117 if ((disp & 0x80) != 0)
5118 disp -= 0x100;
5119 break;
5120 case 2:
5121 disp = get32s ();
5122 break;
5123 }
5124
5125 havedisp = havebase || (havesib && (index != 4 || scale != 0));
5126
5127 if (!intel_syntax)
5128 if (modrm.mod != 0 || (base & 7) == 5)
5129 {
5130 if (havedisp || riprel)
5131 print_displacement (scratchbuf, disp);
5132 else
5133 print_operand_value (scratchbuf, 1, disp);
5134 oappend (scratchbuf);
5135 if (riprel)
5136 {
5137 set_op (disp, 1);
5138 oappend ("(%rip)");
5139 }
5140 }
5141
5142 if (havedisp || (intel_syntax && riprel))
5143 {
5144 *obufp++ = open_char;
5145 if (intel_syntax && riprel)
5146 {
5147 set_op (disp, 1);
5148 oappend ("rip");
5149 }
5150 *obufp = '\0';
5151 if (havebase)
5152 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5153 ? names64[base] : names32[base]);
5154 if (havesib)
5155 {
5156 if (index != 4)
5157 {
5158 if (!intel_syntax || havebase)
5159 {
5160 *obufp++ = separator_char;
5161 *obufp = '\0';
5162 }
5163 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5164 ? names64[index] : names32[index]);
5165 }
5166 if (scale != 0 || (!intel_syntax && index != 4))
5167 {
5168 *obufp++ = scale_char;
5169 *obufp = '\0';
5170 sprintf (scratchbuf, "%d", 1 << scale);
5171 oappend (scratchbuf);
5172 }
5173 }
5174 if (intel_syntax
5175 && (disp || modrm.mod != 0 || (base & 7) == 5))
5176 {
5177 if ((bfd_signed_vma) disp >= 0)
5178 {
5179 *obufp++ = '+';
5180 *obufp = '\0';
5181 }
5182 else if (modrm.mod != 1)
5183 {
5184 *obufp++ = '-';
5185 *obufp = '\0';
5186 disp = - (bfd_signed_vma) disp;
5187 }
5188
5189 print_displacement (scratchbuf, disp);
5190 oappend (scratchbuf);
5191 }
5192
5193 *obufp++ = close_char;
5194 *obufp = '\0';
5195 }
5196 else if (intel_syntax)
5197 {
5198 if (modrm.mod != 0 || (base & 7) == 5)
5199 {
5200 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5201 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5202 ;
5203 else
5204 {
5205 oappend (names_seg[ds_reg - es_reg]);
5206 oappend (":");
5207 }
5208 print_operand_value (scratchbuf, 1, disp);
5209 oappend (scratchbuf);
5210 }
5211 }
5212 }
5213 else
5214 { /* 16 bit address mode */
5215 switch (modrm.mod)
5216 {
5217 case 0:
5218 if (modrm.rm == 6)
5219 {
5220 disp = get16 ();
5221 if ((disp & 0x8000) != 0)
5222 disp -= 0x10000;
5223 }
5224 break;
5225 case 1:
5226 FETCH_DATA (the_info, codep + 1);
5227 disp = *codep++;
5228 if ((disp & 0x80) != 0)
5229 disp -= 0x100;
5230 break;
5231 case 2:
5232 disp = get16 ();
5233 if ((disp & 0x8000) != 0)
5234 disp -= 0x10000;
5235 break;
5236 }
5237
5238 if (!intel_syntax)
5239 if (modrm.mod != 0 || modrm.rm == 6)
5240 {
5241 print_displacement (scratchbuf, disp);
5242 oappend (scratchbuf);
5243 }
5244
5245 if (modrm.mod != 0 || modrm.rm != 6)
5246 {
5247 *obufp++ = open_char;
5248 *obufp = '\0';
5249 oappend (index16[modrm.rm]);
5250 if (intel_syntax
5251 && (disp || modrm.mod != 0 || modrm.rm == 6))
5252 {
5253 if ((bfd_signed_vma) disp >= 0)
5254 {
5255 *obufp++ = '+';
5256 *obufp = '\0';
5257 }
5258 else if (modrm.mod != 1)
5259 {
5260 *obufp++ = '-';
5261 *obufp = '\0';
5262 disp = - (bfd_signed_vma) disp;
5263 }
5264
5265 print_displacement (scratchbuf, disp);
5266 oappend (scratchbuf);
5267 }
5268
5269 *obufp++ = close_char;
5270 *obufp = '\0';
5271 }
5272 else if (intel_syntax)
5273 {
5274 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5275 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5276 ;
5277 else
5278 {
5279 oappend (names_seg[ds_reg - es_reg]);
5280 oappend (":");
5281 }
5282 print_operand_value (scratchbuf, 1, disp & 0xffff);
5283 oappend (scratchbuf);
5284 }
5285 }
5286 }
5287
5288 static void
5289 OP_G (int bytemode, int sizeflag)
5290 {
5291 int add = 0;
5292 USED_REX (REX_R);
5293 if (rex & REX_R)
5294 add += 8;
5295 switch (bytemode)
5296 {
5297 case b_mode:
5298 USED_REX (0);
5299 if (rex)
5300 oappend (names8rex[modrm.reg + add]);
5301 else
5302 oappend (names8[modrm.reg + add]);
5303 break;
5304 case w_mode:
5305 oappend (names16[modrm.reg + add]);
5306 break;
5307 case d_mode:
5308 oappend (names32[modrm.reg + add]);
5309 break;
5310 case q_mode:
5311 oappend (names64[modrm.reg + add]);
5312 break;
5313 case v_mode:
5314 case dq_mode:
5315 case dqb_mode:
5316 case dqd_mode:
5317 case dqw_mode:
5318 USED_REX (REX_W);
5319 if (rex & REX_W)
5320 oappend (names64[modrm.reg + add]);
5321 else if ((sizeflag & DFLAG) || bytemode != v_mode)
5322 oappend (names32[modrm.reg + add]);
5323 else
5324 oappend (names16[modrm.reg + add]);
5325 used_prefixes |= (prefixes & PREFIX_DATA);
5326 break;
5327 case m_mode:
5328 if (address_mode == mode_64bit)
5329 oappend (names64[modrm.reg + add]);
5330 else
5331 oappend (names32[modrm.reg + add]);
5332 break;
5333 default:
5334 oappend (INTERNAL_DISASSEMBLER_ERROR);
5335 break;
5336 }
5337 }
5338
5339 static bfd_vma
5340 get64 (void)
5341 {
5342 bfd_vma x;
5343 #ifdef BFD64
5344 unsigned int a;
5345 unsigned int b;
5346
5347 FETCH_DATA (the_info, codep + 8);
5348 a = *codep++ & 0xff;
5349 a |= (*codep++ & 0xff) << 8;
5350 a |= (*codep++ & 0xff) << 16;
5351 a |= (*codep++ & 0xff) << 24;
5352 b = *codep++ & 0xff;
5353 b |= (*codep++ & 0xff) << 8;
5354 b |= (*codep++ & 0xff) << 16;
5355 b |= (*codep++ & 0xff) << 24;
5356 x = a + ((bfd_vma) b << 32);
5357 #else
5358 abort ();
5359 x = 0;
5360 #endif
5361 return x;
5362 }
5363
5364 static bfd_signed_vma
5365 get32 (void)
5366 {
5367 bfd_signed_vma x = 0;
5368
5369 FETCH_DATA (the_info, codep + 4);
5370 x = *codep++ & (bfd_signed_vma) 0xff;
5371 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5372 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5373 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5374 return x;
5375 }
5376
5377 static bfd_signed_vma
5378 get32s (void)
5379 {
5380 bfd_signed_vma x = 0;
5381
5382 FETCH_DATA (the_info, codep + 4);
5383 x = *codep++ & (bfd_signed_vma) 0xff;
5384 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5385 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5386 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5387
5388 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
5389
5390 return x;
5391 }
5392
5393 static int
5394 get16 (void)
5395 {
5396 int x = 0;
5397
5398 FETCH_DATA (the_info, codep + 2);
5399 x = *codep++ & 0xff;
5400 x |= (*codep++ & 0xff) << 8;
5401 return x;
5402 }
5403
5404 static void
5405 set_op (bfd_vma op, int riprel)
5406 {
5407 op_index[op_ad] = op_ad;
5408 if (address_mode == mode_64bit)
5409 {
5410 op_address[op_ad] = op;
5411 op_riprel[op_ad] = riprel;
5412 }
5413 else
5414 {
5415 /* Mask to get a 32-bit address. */
5416 op_address[op_ad] = op & 0xffffffff;
5417 op_riprel[op_ad] = riprel & 0xffffffff;
5418 }
5419 }
5420
5421 static void
5422 OP_REG (int code, int sizeflag)
5423 {
5424 const char *s;
5425 int add = 0;
5426 USED_REX (REX_B);
5427 if (rex & REX_B)
5428 add = 8;
5429
5430 switch (code)
5431 {
5432 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5433 case sp_reg: case bp_reg: case si_reg: case di_reg:
5434 s = names16[code - ax_reg + add];
5435 break;
5436 case es_reg: case ss_reg: case cs_reg:
5437 case ds_reg: case fs_reg: case gs_reg:
5438 s = names_seg[code - es_reg + add];
5439 break;
5440 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5441 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5442 USED_REX (0);
5443 if (rex)
5444 s = names8rex[code - al_reg + add];
5445 else
5446 s = names8[code - al_reg];
5447 break;
5448 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
5449 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
5450 if (address_mode == mode_64bit && (sizeflag & DFLAG))
5451 {
5452 s = names64[code - rAX_reg + add];
5453 break;
5454 }
5455 code += eAX_reg - rAX_reg;
5456 /* Fall through. */
5457 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5458 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5459 USED_REX (REX_W);
5460 if (rex & REX_W)
5461 s = names64[code - eAX_reg + add];
5462 else if (sizeflag & DFLAG)
5463 s = names32[code - eAX_reg + add];
5464 else
5465 s = names16[code - eAX_reg + add];
5466 used_prefixes |= (prefixes & PREFIX_DATA);
5467 break;
5468 default:
5469 s = INTERNAL_DISASSEMBLER_ERROR;
5470 break;
5471 }
5472 oappend (s);
5473 }
5474
5475 static void
5476 OP_IMREG (int code, int sizeflag)
5477 {
5478 const char *s;
5479
5480 switch (code)
5481 {
5482 case indir_dx_reg:
5483 if (intel_syntax)
5484 s = "dx";
5485 else
5486 s = "(%dx)";
5487 break;
5488 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5489 case sp_reg: case bp_reg: case si_reg: case di_reg:
5490 s = names16[code - ax_reg];
5491 break;
5492 case es_reg: case ss_reg: case cs_reg:
5493 case ds_reg: case fs_reg: case gs_reg:
5494 s = names_seg[code - es_reg];
5495 break;
5496 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5497 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5498 USED_REX (0);
5499 if (rex)
5500 s = names8rex[code - al_reg];
5501 else
5502 s = names8[code - al_reg];
5503 break;
5504 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5505 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
5506 USED_REX (REX_W);
5507 if (rex & REX_W)
5508 s = names64[code - eAX_reg];
5509 else if (sizeflag & DFLAG)
5510 s = names32[code - eAX_reg];
5511 else
5512 s = names16[code - eAX_reg];
5513 used_prefixes |= (prefixes & PREFIX_DATA);
5514 break;
5515 case z_mode_ax_reg:
5516 if ((rex & REX_W) || (sizeflag & DFLAG))
5517 s = *names32;
5518 else
5519 s = *names16;
5520 if (!(rex & REX_W))
5521 used_prefixes |= (prefixes & PREFIX_DATA);
5522 break;
5523 default:
5524 s = INTERNAL_DISASSEMBLER_ERROR;
5525 break;
5526 }
5527 oappend (s);
5528 }
5529
5530 static void
5531 OP_I (int bytemode, int sizeflag)
5532 {
5533 bfd_signed_vma op;
5534 bfd_signed_vma mask = -1;
5535
5536 switch (bytemode)
5537 {
5538 case b_mode:
5539 FETCH_DATA (the_info, codep + 1);
5540 op = *codep++;
5541 mask = 0xff;
5542 break;
5543 case q_mode:
5544 if (address_mode == mode_64bit)
5545 {
5546 op = get32s ();
5547 break;
5548 }
5549 /* Fall through. */
5550 case v_mode:
5551 USED_REX (REX_W);
5552 if (rex & REX_W)
5553 op = get32s ();
5554 else if (sizeflag & DFLAG)
5555 {
5556 op = get32 ();
5557 mask = 0xffffffff;
5558 }
5559 else
5560 {
5561 op = get16 ();
5562 mask = 0xfffff;
5563 }
5564 used_prefixes |= (prefixes & PREFIX_DATA);
5565 break;
5566 case w_mode:
5567 mask = 0xfffff;
5568 op = get16 ();
5569 break;
5570 case const_1_mode:
5571 if (intel_syntax)
5572 oappend ("1");
5573 return;
5574 default:
5575 oappend (INTERNAL_DISASSEMBLER_ERROR);
5576 return;
5577 }
5578
5579 op &= mask;
5580 scratchbuf[0] = '$';
5581 print_operand_value (scratchbuf + 1, 1, op);
5582 oappend (scratchbuf + intel_syntax);
5583 scratchbuf[0] = '\0';
5584 }
5585
5586 static void
5587 OP_I64 (int bytemode, int sizeflag)
5588 {
5589 bfd_signed_vma op;
5590 bfd_signed_vma mask = -1;
5591
5592 if (address_mode != mode_64bit)
5593 {
5594 OP_I (bytemode, sizeflag);
5595 return;
5596 }
5597
5598 switch (bytemode)
5599 {
5600 case b_mode:
5601 FETCH_DATA (the_info, codep + 1);
5602 op = *codep++;
5603 mask = 0xff;
5604 break;
5605 case v_mode:
5606 USED_REX (REX_W);
5607 if (rex & REX_W)
5608 op = get64 ();
5609 else if (sizeflag & DFLAG)
5610 {
5611 op = get32 ();
5612 mask = 0xffffffff;
5613 }
5614 else
5615 {
5616 op = get16 ();
5617 mask = 0xfffff;
5618 }
5619 used_prefixes |= (prefixes & PREFIX_DATA);
5620 break;
5621 case w_mode:
5622 mask = 0xfffff;
5623 op = get16 ();
5624 break;
5625 default:
5626 oappend (INTERNAL_DISASSEMBLER_ERROR);
5627 return;
5628 }
5629
5630 op &= mask;
5631 scratchbuf[0] = '$';
5632 print_operand_value (scratchbuf + 1, 1, op);
5633 oappend (scratchbuf + intel_syntax);
5634 scratchbuf[0] = '\0';
5635 }
5636
5637 static void
5638 OP_sI (int bytemode, int sizeflag)
5639 {
5640 bfd_signed_vma op;
5641 bfd_signed_vma mask = -1;
5642
5643 switch (bytemode)
5644 {
5645 case b_mode:
5646 FETCH_DATA (the_info, codep + 1);
5647 op = *codep++;
5648 if ((op & 0x80) != 0)
5649 op -= 0x100;
5650 mask = 0xffffffff;
5651 break;
5652 case v_mode:
5653 USED_REX (REX_W);
5654 if (rex & REX_W)
5655 op = get32s ();
5656 else if (sizeflag & DFLAG)
5657 {
5658 op = get32s ();
5659 mask = 0xffffffff;
5660 }
5661 else
5662 {
5663 mask = 0xffffffff;
5664 op = get16 ();
5665 if ((op & 0x8000) != 0)
5666 op -= 0x10000;
5667 }
5668 used_prefixes |= (prefixes & PREFIX_DATA);
5669 break;
5670 case w_mode:
5671 op = get16 ();
5672 mask = 0xffffffff;
5673 if ((op & 0x8000) != 0)
5674 op -= 0x10000;
5675 break;
5676 default:
5677 oappend (INTERNAL_DISASSEMBLER_ERROR);
5678 return;
5679 }
5680
5681 scratchbuf[0] = '$';
5682 print_operand_value (scratchbuf + 1, 1, op);
5683 oappend (scratchbuf + intel_syntax);
5684 }
5685
5686 static void
5687 OP_J (int bytemode, int sizeflag)
5688 {
5689 bfd_vma disp;
5690 bfd_vma mask = -1;
5691 bfd_vma segment = 0;
5692
5693 switch (bytemode)
5694 {
5695 case b_mode:
5696 FETCH_DATA (the_info, codep + 1);
5697 disp = *codep++;
5698 if ((disp & 0x80) != 0)
5699 disp -= 0x100;
5700 break;
5701 case v_mode:
5702 if ((sizeflag & DFLAG) || (rex & REX_W))
5703 disp = get32s ();
5704 else
5705 {
5706 disp = get16 ();
5707 if ((disp & 0x8000) != 0)
5708 disp -= 0x10000;
5709 /* In 16bit mode, address is wrapped around at 64k within
5710 the same segment. Otherwise, a data16 prefix on a jump
5711 instruction means that the pc is masked to 16 bits after
5712 the displacement is added! */
5713 mask = 0xffff;
5714 if ((prefixes & PREFIX_DATA) == 0)
5715 segment = ((start_pc + codep - start_codep)
5716 & ~((bfd_vma) 0xffff));
5717 }
5718 used_prefixes |= (prefixes & PREFIX_DATA);
5719 break;
5720 default:
5721 oappend (INTERNAL_DISASSEMBLER_ERROR);
5722 return;
5723 }
5724 disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
5725 set_op (disp, 0);
5726 print_operand_value (scratchbuf, 1, disp);
5727 oappend (scratchbuf);
5728 }
5729
5730 static void
5731 OP_SEG (int bytemode, int sizeflag)
5732 {
5733 if (bytemode == w_mode)
5734 oappend (names_seg[modrm.reg]);
5735 else
5736 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
5737 }
5738
5739 static void
5740 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
5741 {
5742 int seg, offset;
5743
5744 if (sizeflag & DFLAG)
5745 {
5746 offset = get32 ();
5747 seg = get16 ();
5748 }
5749 else
5750 {
5751 offset = get16 ();
5752 seg = get16 ();
5753 }
5754 used_prefixes |= (prefixes & PREFIX_DATA);
5755 if (intel_syntax)
5756 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
5757 else
5758 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
5759 oappend (scratchbuf);
5760 }
5761
5762 static void
5763 OP_OFF (int bytemode, int sizeflag)
5764 {
5765 bfd_vma off;
5766
5767 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5768 intel_operand_size (bytemode, sizeflag);
5769 append_seg ();
5770
5771 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
5772 off = get32 ();
5773 else
5774 off = get16 ();
5775
5776 if (intel_syntax)
5777 {
5778 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5779 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5780 {
5781 oappend (names_seg[ds_reg - es_reg]);
5782 oappend (":");
5783 }
5784 }
5785 print_operand_value (scratchbuf, 1, off);
5786 oappend (scratchbuf);
5787 }
5788
5789 static void
5790 OP_OFF64 (int bytemode, int sizeflag)
5791 {
5792 bfd_vma off;
5793
5794 if (address_mode != mode_64bit
5795 || (prefixes & PREFIX_ADDR))
5796 {
5797 OP_OFF (bytemode, sizeflag);
5798 return;
5799 }
5800
5801 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5802 intel_operand_size (bytemode, sizeflag);
5803 append_seg ();
5804
5805 off = get64 ();
5806
5807 if (intel_syntax)
5808 {
5809 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5810 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
5811 {
5812 oappend (names_seg[ds_reg - es_reg]);
5813 oappend (":");
5814 }
5815 }
5816 print_operand_value (scratchbuf, 1, off);
5817 oappend (scratchbuf);
5818 }
5819
5820 static void
5821 ptr_reg (int code, int sizeflag)
5822 {
5823 const char *s;
5824
5825 *obufp++ = open_char;
5826 used_prefixes |= (prefixes & PREFIX_ADDR);
5827 if (address_mode == mode_64bit)
5828 {
5829 if (!(sizeflag & AFLAG))
5830 s = names32[code - eAX_reg];
5831 else
5832 s = names64[code - eAX_reg];
5833 }
5834 else if (sizeflag & AFLAG)
5835 s = names32[code - eAX_reg];
5836 else
5837 s = names16[code - eAX_reg];
5838 oappend (s);
5839 *obufp++ = close_char;
5840 *obufp = 0;
5841 }
5842
5843 static void
5844 OP_ESreg (int code, int sizeflag)
5845 {
5846 if (intel_syntax)
5847 {
5848 switch (codep[-1])
5849 {
5850 case 0x6d: /* insw/insl */
5851 intel_operand_size (z_mode, sizeflag);
5852 break;
5853 case 0xa5: /* movsw/movsl/movsq */
5854 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5855 case 0xab: /* stosw/stosl */
5856 case 0xaf: /* scasw/scasl */
5857 intel_operand_size (v_mode, sizeflag);
5858 break;
5859 default:
5860 intel_operand_size (b_mode, sizeflag);
5861 }
5862 }
5863 oappend ("%es:" + intel_syntax);
5864 ptr_reg (code, sizeflag);
5865 }
5866
5867 static void
5868 OP_DSreg (int code, int sizeflag)
5869 {
5870 if (intel_syntax)
5871 {
5872 switch (codep[-1])
5873 {
5874 case 0x6f: /* outsw/outsl */
5875 intel_operand_size (z_mode, sizeflag);
5876 break;
5877 case 0xa5: /* movsw/movsl/movsq */
5878 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5879 case 0xad: /* lodsw/lodsl/lodsq */
5880 intel_operand_size (v_mode, sizeflag);
5881 break;
5882 default:
5883 intel_operand_size (b_mode, sizeflag);
5884 }
5885 }
5886 if ((prefixes
5887 & (PREFIX_CS
5888 | PREFIX_DS
5889 | PREFIX_SS
5890 | PREFIX_ES
5891 | PREFIX_FS
5892 | PREFIX_GS)) == 0)
5893 prefixes |= PREFIX_DS;
5894 append_seg ();
5895 ptr_reg (code, sizeflag);
5896 }
5897
5898 static void
5899 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5900 {
5901 int add = 0;
5902 if (rex & REX_R)
5903 {
5904 USED_REX (REX_R);
5905 add = 8;
5906 }
5907 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
5908 {
5909 lock_prefix = NULL;
5910 used_prefixes |= PREFIX_LOCK;
5911 add = 8;
5912 }
5913 sprintf (scratchbuf, "%%cr%d", modrm.reg + add);
5914 oappend (scratchbuf + intel_syntax);
5915 }
5916
5917 static void
5918 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5919 {
5920 int add = 0;
5921 USED_REX (REX_R);
5922 if (rex & REX_R)
5923 add = 8;
5924 if (intel_syntax)
5925 sprintf (scratchbuf, "db%d", modrm.reg + add);
5926 else
5927 sprintf (scratchbuf, "%%db%d", modrm.reg + add);
5928 oappend (scratchbuf);
5929 }
5930
5931 static void
5932 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5933 {
5934 sprintf (scratchbuf, "%%tr%d", modrm.reg);
5935 oappend (scratchbuf + intel_syntax);
5936 }
5937
5938 static void
5939 OP_R (int bytemode, int sizeflag)
5940 {
5941 if (modrm.mod == 3)
5942 OP_E (bytemode, sizeflag);
5943 else
5944 BadOp ();
5945 }
5946
5947 static void
5948 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5949 {
5950 used_prefixes |= (prefixes & PREFIX_DATA);
5951 if (prefixes & PREFIX_DATA)
5952 {
5953 int add = 0;
5954 USED_REX (REX_R);
5955 if (rex & REX_R)
5956 add = 8;
5957 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
5958 }
5959 else
5960 sprintf (scratchbuf, "%%mm%d", modrm.reg);
5961 oappend (scratchbuf + intel_syntax);
5962 }
5963
5964 static void
5965 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5966 {
5967 int add = 0;
5968 USED_REX (REX_R);
5969 if (rex & REX_R)
5970 add = 8;
5971 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add);
5972 oappend (scratchbuf + intel_syntax);
5973 }
5974
5975 static void
5976 OP_EM (int bytemode, int sizeflag)
5977 {
5978 if (modrm.mod != 3)
5979 {
5980 if (intel_syntax && bytemode == v_mode)
5981 {
5982 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5983 used_prefixes |= (prefixes & PREFIX_DATA);
5984 }
5985 OP_E (bytemode, sizeflag);
5986 return;
5987 }
5988
5989 /* Skip mod/rm byte. */
5990 MODRM_CHECK;
5991 codep++;
5992 used_prefixes |= (prefixes & PREFIX_DATA);
5993 if (prefixes & PREFIX_DATA)
5994 {
5995 int add = 0;
5996
5997 USED_REX (REX_B);
5998 if (rex & REX_B)
5999 add = 8;
6000 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
6001 }
6002 else
6003 sprintf (scratchbuf, "%%mm%d", modrm.rm);
6004 oappend (scratchbuf + intel_syntax);
6005 }
6006
6007 /* cvt* are the only instructions in sse2 which have
6008 both SSE and MMX operands and also have 0x66 prefix
6009 in their opcode. 0x66 was originally used to differentiate
6010 between SSE and MMX instruction(operands). So we have to handle the
6011 cvt* separately using OP_EMC and OP_MXC */
6012 static void
6013 OP_EMC (int bytemode, int sizeflag)
6014 {
6015 if (modrm.mod != 3)
6016 {
6017 if (intel_syntax && bytemode == v_mode)
6018 {
6019 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
6020 used_prefixes |= (prefixes & PREFIX_DATA);
6021 }
6022 OP_E (bytemode, sizeflag);
6023 return;
6024 }
6025
6026 /* Skip mod/rm byte. */
6027 MODRM_CHECK;
6028 codep++;
6029 used_prefixes |= (prefixes & PREFIX_DATA);
6030 sprintf (scratchbuf, "%%mm%d", modrm.rm);
6031 oappend (scratchbuf + intel_syntax);
6032 }
6033
6034 static void
6035 OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6036 {
6037 used_prefixes |= (prefixes & PREFIX_DATA);
6038 sprintf (scratchbuf, "%%mm%d", modrm.reg);
6039 oappend (scratchbuf + intel_syntax);
6040 }
6041
6042 static void
6043 OP_EX (int bytemode, int sizeflag)
6044 {
6045 int add = 0;
6046 if (modrm.mod != 3)
6047 {
6048 OP_E (bytemode, sizeflag);
6049 return;
6050 }
6051 USED_REX (REX_B);
6052 if (rex & REX_B)
6053 add = 8;
6054
6055 /* Skip mod/rm byte. */
6056 MODRM_CHECK;
6057 codep++;
6058 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add);
6059 oappend (scratchbuf + intel_syntax);
6060 }
6061
6062 static void
6063 OP_MS (int bytemode, int sizeflag)
6064 {
6065 if (modrm.mod == 3)
6066 OP_EM (bytemode, sizeflag);
6067 else
6068 BadOp ();
6069 }
6070
6071 static void
6072 OP_XS (int bytemode, int sizeflag)
6073 {
6074 if (modrm.mod == 3)
6075 OP_EX (bytemode, sizeflag);
6076 else
6077 BadOp ();
6078 }
6079
6080 static void
6081 OP_M (int bytemode, int sizeflag)
6082 {
6083 if (modrm.mod == 3)
6084 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
6085 BadOp ();
6086 else
6087 OP_E (bytemode, sizeflag);
6088 }
6089
6090 static void
6091 OP_0f07 (int bytemode, int sizeflag)
6092 {
6093 if (modrm.mod != 3 || modrm.rm != 0)
6094 BadOp ();
6095 else
6096 OP_E (bytemode, sizeflag);
6097 }
6098
6099 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
6100 32bit mode and "xchg %rax,%rax" in 64bit mode. */
6101
6102 static void
6103 NOP_Fixup1 (int bytemode, int sizeflag)
6104 {
6105 if ((prefixes & PREFIX_DATA) != 0
6106 || (rex != 0
6107 && rex != 0x48
6108 && address_mode == mode_64bit))
6109 OP_REG (bytemode, sizeflag);
6110 else
6111 strcpy (obuf, "nop");
6112 }
6113
6114 static void
6115 NOP_Fixup2 (int bytemode, int sizeflag)
6116 {
6117 if ((prefixes & PREFIX_DATA) != 0
6118 || (rex != 0
6119 && rex != 0x48
6120 && address_mode == mode_64bit))
6121 OP_IMREG (bytemode, sizeflag);
6122 }
6123
6124 static const char *const Suffix3DNow[] = {
6125 /* 00 */ NULL, NULL, NULL, NULL,
6126 /* 04 */ NULL, NULL, NULL, NULL,
6127 /* 08 */ NULL, NULL, NULL, NULL,
6128 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
6129 /* 10 */ NULL, NULL, NULL, NULL,
6130 /* 14 */ NULL, NULL, NULL, NULL,
6131 /* 18 */ NULL, NULL, NULL, NULL,
6132 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
6133 /* 20 */ NULL, NULL, NULL, NULL,
6134 /* 24 */ NULL, NULL, NULL, NULL,
6135 /* 28 */ NULL, NULL, NULL, NULL,
6136 /* 2C */ NULL, NULL, NULL, NULL,
6137 /* 30 */ NULL, NULL, NULL, NULL,
6138 /* 34 */ NULL, NULL, NULL, NULL,
6139 /* 38 */ NULL, NULL, NULL, NULL,
6140 /* 3C */ NULL, NULL, NULL, NULL,
6141 /* 40 */ NULL, NULL, NULL, NULL,
6142 /* 44 */ NULL, NULL, NULL, NULL,
6143 /* 48 */ NULL, NULL, NULL, NULL,
6144 /* 4C */ NULL, NULL, NULL, NULL,
6145 /* 50 */ NULL, NULL, NULL, NULL,
6146 /* 54 */ NULL, NULL, NULL, NULL,
6147 /* 58 */ NULL, NULL, NULL, NULL,
6148 /* 5C */ NULL, NULL, NULL, NULL,
6149 /* 60 */ NULL, NULL, NULL, NULL,
6150 /* 64 */ NULL, NULL, NULL, NULL,
6151 /* 68 */ NULL, NULL, NULL, NULL,
6152 /* 6C */ NULL, NULL, NULL, NULL,
6153 /* 70 */ NULL, NULL, NULL, NULL,
6154 /* 74 */ NULL, NULL, NULL, NULL,
6155 /* 78 */ NULL, NULL, NULL, NULL,
6156 /* 7C */ NULL, NULL, NULL, NULL,
6157 /* 80 */ NULL, NULL, NULL, NULL,
6158 /* 84 */ NULL, NULL, NULL, NULL,
6159 /* 88 */ NULL, NULL, "pfnacc", NULL,
6160 /* 8C */ NULL, NULL, "pfpnacc", NULL,
6161 /* 90 */ "pfcmpge", NULL, NULL, NULL,
6162 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
6163 /* 98 */ NULL, NULL, "pfsub", NULL,
6164 /* 9C */ NULL, NULL, "pfadd", NULL,
6165 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
6166 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
6167 /* A8 */ NULL, NULL, "pfsubr", NULL,
6168 /* AC */ NULL, NULL, "pfacc", NULL,
6169 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
6170 /* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw",
6171 /* B8 */ NULL, NULL, NULL, "pswapd",
6172 /* BC */ NULL, NULL, NULL, "pavgusb",
6173 /* C0 */ NULL, NULL, NULL, NULL,
6174 /* C4 */ NULL, NULL, NULL, NULL,
6175 /* C8 */ NULL, NULL, NULL, NULL,
6176 /* CC */ NULL, NULL, NULL, NULL,
6177 /* D0 */ NULL, NULL, NULL, NULL,
6178 /* D4 */ NULL, NULL, NULL, NULL,
6179 /* D8 */ NULL, NULL, NULL, NULL,
6180 /* DC */ NULL, NULL, NULL, NULL,
6181 /* E0 */ NULL, NULL, NULL, NULL,
6182 /* E4 */ NULL, NULL, NULL, NULL,
6183 /* E8 */ NULL, NULL, NULL, NULL,
6184 /* EC */ NULL, NULL, NULL, NULL,
6185 /* F0 */ NULL, NULL, NULL, NULL,
6186 /* F4 */ NULL, NULL, NULL, NULL,
6187 /* F8 */ NULL, NULL, NULL, NULL,
6188 /* FC */ NULL, NULL, NULL, NULL,
6189 };
6190
6191 static void
6192 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6193 {
6194 const char *mnemonic;
6195
6196 FETCH_DATA (the_info, codep + 1);
6197 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6198 place where an 8-bit immediate would normally go. ie. the last
6199 byte of the instruction. */
6200 obufp = obuf + strlen (obuf);
6201 mnemonic = Suffix3DNow[*codep++ & 0xff];
6202 if (mnemonic)
6203 oappend (mnemonic);
6204 else
6205 {
6206 /* Since a variable sized modrm/sib chunk is between the start
6207 of the opcode (0x0f0f) and the opcode suffix, we need to do
6208 all the modrm processing first, and don't know until now that
6209 we have a bad opcode. This necessitates some cleaning up. */
6210 op_out[0][0] = '\0';
6211 op_out[1][0] = '\0';
6212 BadOp ();
6213 }
6214 }
6215
6216 static const char *simd_cmp_op[] = {
6217 "eq",
6218 "lt",
6219 "le",
6220 "unord",
6221 "neq",
6222 "nlt",
6223 "nle",
6224 "ord"
6225 };
6226
6227 static void
6228 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
6229 {
6230 unsigned int cmp_type;
6231
6232 FETCH_DATA (the_info, codep + 1);
6233 obufp = obuf + strlen (obuf);
6234 cmp_type = *codep++ & 0xff;
6235 if (cmp_type < 8)
6236 {
6237 char suffix1 = 'p', suffix2 = 's';
6238 used_prefixes |= (prefixes & PREFIX_REPZ);
6239 if (prefixes & PREFIX_REPZ)
6240 suffix1 = 's';
6241 else
6242 {
6243 used_prefixes |= (prefixes & PREFIX_DATA);
6244 if (prefixes & PREFIX_DATA)
6245 suffix2 = 'd';
6246 else
6247 {
6248 used_prefixes |= (prefixes & PREFIX_REPNZ);
6249 if (prefixes & PREFIX_REPNZ)
6250 suffix1 = 's', suffix2 = 'd';
6251 }
6252 }
6253 sprintf (scratchbuf, "cmp%s%c%c",
6254 simd_cmp_op[cmp_type], suffix1, suffix2);
6255 used_prefixes |= (prefixes & PREFIX_REPZ);
6256 oappend (scratchbuf);
6257 }
6258 else
6259 {
6260 /* We have a bad extension byte. Clean up. */
6261 op_out[0][0] = '\0';
6262 op_out[1][0] = '\0';
6263 BadOp ();
6264 }
6265 }
6266
6267 static void
6268 OP_Mwait (int bytemode ATTRIBUTE_UNUSED,
6269 int sizeflag ATTRIBUTE_UNUSED)
6270 {
6271 /* mwait %eax,%ecx */
6272 if (!intel_syntax)
6273 {
6274 const char **names = (address_mode == mode_64bit
6275 ? names64 : names32);
6276 strcpy (op_out[0], names[0]);
6277 strcpy (op_out[1], names[1]);
6278 two_source_ops = 1;
6279 }
6280 /* Skip mod/rm byte. */
6281 MODRM_CHECK;
6282 codep++;
6283 }
6284
6285 static void
6286 OP_Monitor (int bytemode ATTRIBUTE_UNUSED,
6287 int sizeflag ATTRIBUTE_UNUSED)
6288 {
6289 /* monitor %eax,%ecx,%edx" */
6290 if (!intel_syntax)
6291 {
6292 const char **op1_names;
6293 const char **names = (address_mode == mode_64bit
6294 ? names64 : names32);
6295
6296 if (!(prefixes & PREFIX_ADDR))
6297 op1_names = (address_mode == mode_16bit
6298 ? names16 : names);
6299 else
6300 {
6301 /* Remove "addr16/addr32". */
6302 addr_prefix = NULL;
6303 op1_names = (address_mode != mode_32bit
6304 ? names32 : names16);
6305 used_prefixes |= PREFIX_ADDR;
6306 }
6307 strcpy (op_out[0], op1_names[0]);
6308 strcpy (op_out[1], names[1]);
6309 strcpy (op_out[2], names[2]);
6310 two_source_ops = 1;
6311 }
6312 /* Skip mod/rm byte. */
6313 MODRM_CHECK;
6314 codep++;
6315 }
6316
6317 static void
6318 BadOp (void)
6319 {
6320 /* Throw away prefixes and 1st. opcode byte. */
6321 codep = insn_codep + 1;
6322 oappend ("(bad)");
6323 }
6324
6325 static void
6326 REP_Fixup (int bytemode, int sizeflag)
6327 {
6328 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6329 lods and stos. */
6330 if (prefixes & PREFIX_REPZ)
6331 repz_prefix = "rep ";
6332
6333 switch (bytemode)
6334 {
6335 case al_reg:
6336 case eAX_reg:
6337 case indir_dx_reg:
6338 OP_IMREG (bytemode, sizeflag);
6339 break;
6340 case eDI_reg:
6341 OP_ESreg (bytemode, sizeflag);
6342 break;
6343 case eSI_reg:
6344 OP_DSreg (bytemode, sizeflag);
6345 break;
6346 default:
6347 abort ();
6348 break;
6349 }
6350 }
6351
6352 static void
6353 CMPXCHG8B_Fixup (int bytemode, int sizeflag)
6354 {
6355 USED_REX (REX_W);
6356 if (rex & REX_W)
6357 {
6358 /* Change cmpxchg8b to cmpxchg16b. */
6359 char *p = obuf + strlen (obuf) - 2;
6360 strcpy (p, "16b");
6361 bytemode = o_mode;
6362 }
6363 OP_M (bytemode, sizeflag);
6364 }
6365
6366 static void
6367 XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
6368 {
6369 sprintf (scratchbuf, "%%xmm%d", reg);
6370 oappend (scratchbuf + intel_syntax);
6371 }
6372
6373 static void
6374 CRC32_Fixup (int bytemode, int sizeflag)
6375 {
6376 /* Add proper suffix to "crc32". */
6377 char *p = obuf + strlen (obuf);
6378
6379 switch (bytemode)
6380 {
6381 case b_mode:
6382 if (intel_syntax)
6383 break;
6384
6385 *p++ = 'b';
6386 break;
6387 case v_mode:
6388 if (intel_syntax)
6389 break;
6390
6391 USED_REX (REX_W);
6392 if (rex & REX_W)
6393 *p++ = 'q';
6394 else if (sizeflag & DFLAG)
6395 *p++ = 'l';
6396 else
6397 *p++ = 'w';
6398 used_prefixes |= (prefixes & PREFIX_DATA);
6399 break;
6400 default:
6401 oappend (INTERNAL_DISASSEMBLER_ERROR);
6402 break;
6403 }
6404 *p = '\0';
6405
6406 if (modrm.mod == 3)
6407 {
6408 int add;
6409
6410 /* Skip mod/rm byte. */
6411 MODRM_CHECK;
6412 codep++;
6413
6414 USED_REX (REX_B);
6415 add = (rex & REX_B) ? 8 : 0;
6416 if (bytemode == b_mode)
6417 {
6418 USED_REX (0);
6419 if (rex)
6420 oappend (names8rex[modrm.rm + add]);
6421 else
6422 oappend (names8[modrm.rm + add]);
6423 }
6424 else
6425 {
6426 USED_REX (REX_W);
6427 if (rex & REX_W)
6428 oappend (names64[modrm.rm + add]);
6429 else if ((prefixes & PREFIX_DATA))
6430 oappend (names16[modrm.rm + add]);
6431 else
6432 oappend (names32[modrm.rm + add]);
6433 }
6434 }
6435 else
6436 OP_E (bytemode, sizeflag);
6437 }
GDB Binutils - Deliverables
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