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[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright (C) 1988, 89, 91, 93, 94, 95, 96, 97, 98, 1999
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21 /*
22 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 * July 1988
24 * modified by John Hassey (hassey@dg-rtp.dg.com)
25 */
26
27 /*
28 * The main tables describing the instructions is essentially a copy
29 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
30 * Programmers Manual. Usually, there is a capital letter, followed
31 * by a small letter. The capital letter tell the addressing mode,
32 * and the small letter tells about the operand size. Refer to
33 * the Intel manual for details.
34 */
35
36 #include "dis-asm.h"
37 #include "sysdep.h"
38 #include "opintl.h"
39
40 #define MAXLEN 20
41
42 #include <setjmp.h>
43
44 #ifndef UNIXWARE_COMPAT
45 /* Set non-zero for broken, compatible instructions. Set to zero for
46 non-broken opcodes. */
47 #define UNIXWARE_COMPAT 1
48 #endif
49
50 static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *));
51
52 struct dis_private
53 {
54 /* Points to first byte not fetched. */
55 bfd_byte *max_fetched;
56 bfd_byte the_buffer[MAXLEN];
57 bfd_vma insn_start;
58 jmp_buf bailout;
59 };
60
61 /* The opcode for the fwait instruction, which we treat as a prefix
62 when we can. */
63 #define FWAIT_OPCODE (0x9b)
64
65 /* Flags for the prefixes for the current instruction. See below. */
66 static int prefixes;
67
68 /* Flags stored in PREFIXES. */
69 #define PREFIX_REPZ 1
70 #define PREFIX_REPNZ 2
71 #define PREFIX_LOCK 4
72 #define PREFIX_CS 8
73 #define PREFIX_SS 0x10
74 #define PREFIX_DS 0x20
75 #define PREFIX_ES 0x40
76 #define PREFIX_FS 0x80
77 #define PREFIX_GS 0x100
78 #define PREFIX_DATA 0x200
79 #define PREFIX_ADDR 0x400
80 #define PREFIX_FWAIT 0x800
81
82 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
83 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
84 on error. */
85 #define FETCH_DATA(info, addr) \
86 ((addr) <= ((struct dis_private *)(info->private_data))->max_fetched \
87 ? 1 : fetch_data ((info), (addr)))
88
89 static int
90 fetch_data (info, addr)
91 struct disassemble_info *info;
92 bfd_byte *addr;
93 {
94 int status;
95 struct dis_private *priv = (struct dis_private *)info->private_data;
96 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
97
98 status = (*info->read_memory_func) (start,
99 priv->max_fetched,
100 addr - priv->max_fetched,
101 info);
102 if (status != 0)
103 {
104 /* If we have found an fwait prefix and an fwait opcode, then
105 print_insn_i386 will arrange to print an instruction after we
106 longjmp, and we don't want to print an error message here.
107 This hack is required because we treat fwait as a prefix, but
108 since fwait is really an instruction we want to print a
109 standalone fwait correctly. */
110 if ((prefixes & PREFIX_FWAIT) == 0
111 || memchr (priv->the_buffer, FWAIT_OPCODE,
112 priv->max_fetched - priv->the_buffer) == NULL)
113 (*info->memory_error_func) (status, start, info);
114 longjmp (priv->bailout, 1);
115 }
116 else
117 priv->max_fetched = addr;
118 return 1;
119 }
120
121 #define Eb OP_E, b_mode
122 #define indirEb OP_indirE, b_mode
123 #define Gb OP_G, b_mode
124 #define Ev OP_E, v_mode
125 #define Ed OP_E, d_mode
126 #define indirEv OP_indirE, v_mode
127 #define Ew OP_E, w_mode
128 #define Ma OP_E, v_mode
129 #define M OP_E, 0 /* lea */
130 #define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
131 #define Gv OP_G, v_mode
132 #define Gw OP_G, w_mode
133 #define Rd OP_Rd, d_mode
134 #define Ib OP_I, b_mode
135 #define sIb OP_sI, b_mode /* sign extened byte */
136 #define Iv OP_I, v_mode
137 #define Iw OP_I, w_mode
138 #define Jb OP_J, b_mode
139 #define Jv OP_J, v_mode
140 #define Cd OP_C, d_mode
141 #define Dd OP_D, d_mode
142 #define Td OP_T, d_mode
143
144 #define eAX OP_REG, eAX_reg
145 #define eBX OP_REG, eBX_reg
146 #define eCX OP_REG, eCX_reg
147 #define eDX OP_REG, eDX_reg
148 #define eSP OP_REG, eSP_reg
149 #define eBP OP_REG, eBP_reg
150 #define eSI OP_REG, eSI_reg
151 #define eDI OP_REG, eDI_reg
152 #define AL OP_REG, al_reg
153 #define CL OP_REG, cl_reg
154 #define DL OP_REG, dl_reg
155 #define BL OP_REG, bl_reg
156 #define AH OP_REG, ah_reg
157 #define CH OP_REG, ch_reg
158 #define DH OP_REG, dh_reg
159 #define BH OP_REG, bh_reg
160 #define AX OP_REG, ax_reg
161 #define DX OP_REG, dx_reg
162 #define indirDX OP_REG, indir_dx_reg
163
164 #define Sw OP_SEG, w_mode
165 #define Ap OP_DIR, 0
166 #define Ob OP_OFF, b_mode
167 #define Ov OP_OFF, v_mode
168 #define Xb OP_DSreg, eSI_reg
169 #define Xv OP_DSreg, eSI_reg
170 #define Yb OP_ESreg, eDI_reg
171 #define Yv OP_ESreg, eDI_reg
172 #define DSBX OP_DSreg, eBX_reg
173
174 #define es OP_REG, es_reg
175 #define ss OP_REG, ss_reg
176 #define cs OP_REG, cs_reg
177 #define ds OP_REG, ds_reg
178 #define fs OP_REG, fs_reg
179 #define gs OP_REG, gs_reg
180
181 #define MX OP_MMX, 0
182 #define XM OP_XMM, 0
183 #define EM OP_EM, v_mode
184 #define EX OP_EX, v_mode
185 #define MS OP_MS, v_mode
186 #define None OP_E, 0
187 #define OPSUF OP_3DNowSuffix, 0
188 #define OPSIMD OP_SIMD_Suffix, 0
189
190 /* bits in sizeflag */
191 #if 0 /* leave undefined until someone adds the extra flag to objdump */
192 #define SUFFIX_ALWAYS 4
193 #endif
194 #define AFLAG 2
195 #define DFLAG 1
196
197 typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag));
198
199 static void OP_E PARAMS ((int, int));
200 static void OP_G PARAMS ((int, int));
201 static void OP_I PARAMS ((int, int));
202 static void OP_indirE PARAMS ((int, int));
203 static void OP_sI PARAMS ((int, int));
204 static void OP_REG PARAMS ((int, int));
205 static void OP_J PARAMS ((int, int));
206 static void OP_DIR PARAMS ((int, int));
207 static void OP_OFF PARAMS ((int, int));
208 static void OP_ESreg PARAMS ((int, int));
209 static void OP_DSreg PARAMS ((int, int));
210 static void OP_SEG PARAMS ((int, int));
211 static void OP_C PARAMS ((int, int));
212 static void OP_D PARAMS ((int, int));
213 static void OP_T PARAMS ((int, int));
214 static void OP_Rd PARAMS ((int, int));
215 static void OP_ST PARAMS ((int, int));
216 static void OP_STi PARAMS ((int, int));
217 static void OP_MMX PARAMS ((int, int));
218 static void OP_XMM PARAMS ((int, int));
219 static void OP_EM PARAMS ((int, int));
220 static void OP_EX PARAMS ((int, int));
221 static void OP_MS PARAMS ((int, int));
222 static void OP_3DNowSuffix PARAMS ((int, int));
223 static void OP_SIMD_Suffix PARAMS ((int, int));
224 static void SIMD_Fixup PARAMS ((int, int));
225
226 static void append_seg PARAMS ((void));
227 static void set_op PARAMS ((unsigned int op));
228 static void putop PARAMS ((const char *template, int sizeflag));
229 static void dofloat PARAMS ((int sizeflag));
230 static int get16 PARAMS ((void));
231 static int get32 PARAMS ((void));
232 static void ckprefix PARAMS ((void));
233 static void ptr_reg PARAMS ((int, int));
234 static void BadOp PARAMS ((void));
235
236 #define b_mode 1
237 #define v_mode 2
238 #define w_mode 3
239 #define d_mode 4
240 #define x_mode 5
241
242 #define es_reg 100
243 #define cs_reg 101
244 #define ss_reg 102
245 #define ds_reg 103
246 #define fs_reg 104
247 #define gs_reg 105
248
249 #define eAX_reg 108
250 #define eCX_reg 109
251 #define eDX_reg 110
252 #define eBX_reg 111
253 #define eSP_reg 112
254 #define eBP_reg 113
255 #define eSI_reg 114
256 #define eDI_reg 115
257
258 #define al_reg 116
259 #define cl_reg 117
260 #define dl_reg 118
261 #define bl_reg 119
262 #define ah_reg 120
263 #define ch_reg 121
264 #define dh_reg 122
265 #define bh_reg 123
266
267 #define ax_reg 124
268 #define cx_reg 125
269 #define dx_reg 126
270 #define bx_reg 127
271 #define sp_reg 128
272 #define bp_reg 129
273 #define si_reg 130
274 #define di_reg 131
275
276 #define indir_dx_reg 150
277
278 #define USE_GROUPS 1
279 #define USE_PREFIX_USER_TABLE 2
280
281 #define GRP1b NULL, NULL, 0, NULL, USE_GROUPS
282 #define GRP1S NULL, NULL, 1, NULL, USE_GROUPS
283 #define GRP1Ss NULL, NULL, 2, NULL, USE_GROUPS
284 #define GRP2b NULL, NULL, 3, NULL, USE_GROUPS
285 #define GRP2S NULL, NULL, 4, NULL, USE_GROUPS
286 #define GRP2b_one NULL, NULL, 5, NULL, USE_GROUPS
287 #define GRP2S_one NULL, NULL, 6, NULL, USE_GROUPS
288 #define GRP2b_cl NULL, NULL, 7, NULL, USE_GROUPS
289 #define GRP2S_cl NULL, NULL, 8, NULL, USE_GROUPS
290 #define GRP3b NULL, NULL, 9, NULL, USE_GROUPS
291 #define GRP3S NULL, NULL, 10, NULL, USE_GROUPS
292 #define GRP4 NULL, NULL, 11, NULL, USE_GROUPS
293 #define GRP5 NULL, NULL, 12, NULL, USE_GROUPS
294 #define GRP6 NULL, NULL, 13, NULL, USE_GROUPS
295 #define GRP7 NULL, NULL, 14, NULL, USE_GROUPS
296 #define GRP8 NULL, NULL, 15, NULL, USE_GROUPS
297 #define GRP9 NULL, NULL, 16, NULL, USE_GROUPS
298 #define GRP10 NULL, NULL, 17, NULL, USE_GROUPS
299 #define GRP11 NULL, NULL, 18, NULL, USE_GROUPS
300 #define GRP12 NULL, NULL, 19, NULL, USE_GROUPS
301 #define GRP13 NULL, NULL, 20, NULL, USE_GROUPS
302 #define GRP14 NULL, NULL, 21, NULL, USE_GROUPS
303 #define GRPAMD NULL, NULL, 22, NULL, USE_GROUPS
304
305 #define PREGRP0 NULL, NULL, 0, NULL, USE_PREFIX_USER_TABLE
306 #define PREGRP1 NULL, NULL, 1, NULL, USE_PREFIX_USER_TABLE
307 #define PREGRP2 NULL, NULL, 2, NULL, USE_PREFIX_USER_TABLE
308 #define PREGRP3 NULL, NULL, 3, NULL, USE_PREFIX_USER_TABLE
309 #define PREGRP4 NULL, NULL, 4, NULL, USE_PREFIX_USER_TABLE
310 #define PREGRP5 NULL, NULL, 5, NULL, USE_PREFIX_USER_TABLE
311 #define PREGRP6 NULL, NULL, 6, NULL, USE_PREFIX_USER_TABLE
312 #define PREGRP7 NULL, NULL, 7, NULL, USE_PREFIX_USER_TABLE
313 #define PREGRP8 NULL, NULL, 8, NULL, USE_PREFIX_USER_TABLE
314 #define PREGRP9 NULL, NULL, 9, NULL, USE_PREFIX_USER_TABLE
315 #define PREGRP10 NULL, NULL, 10, NULL, USE_PREFIX_USER_TABLE
316 #define PREGRP11 NULL, NULL, 11, NULL, USE_PREFIX_USER_TABLE
317 #define PREGRP12 NULL, NULL, 12, NULL, USE_PREFIX_USER_TABLE
318 #define PREGRP13 NULL, NULL, 13, NULL, USE_PREFIX_USER_TABLE
319 #define PREGRP14 NULL, NULL, 14, NULL, USE_PREFIX_USER_TABLE
320
321 #define FLOATCODE 50
322 #define FLOAT NULL, NULL, FLOATCODE
323
324 struct dis386 {
325 const char *name;
326 op_rtn op1;
327 int bytemode1;
328 op_rtn op2;
329 int bytemode2;
330 op_rtn op3;
331 int bytemode3;
332 };
333
334 /* Upper case letters in the instruction names here are macros.
335 'A' => print 'b' if no register operands or suffix_always is true
336 'B' => print 'b' if suffix_always is true
337 'E' => print 'e' if 32-bit form of jcxz
338 'L' => print 'l' if suffix_always is true
339 'N' => print 'n' if instruction has no wait "prefix"
340 'P' => print 'w' or 'l' if instruction has an operand size prefix,
341 or suffix_always is true
342 'Q' => print 'w' or 'l' if no register operands or suffix_always is true
343 'R' => print 'w' or 'l'
344 'S' => print 'w' or 'l' if suffix_always is true
345 'W' => print 'b' or 'w'
346 */
347
348 static const struct dis386 dis386_att[] = {
349 /* 00 */
350 { "addB", Eb, Gb },
351 { "addS", Ev, Gv },
352 { "addB", Gb, Eb },
353 { "addS", Gv, Ev },
354 { "addB", AL, Ib },
355 { "addS", eAX, Iv },
356 { "pushP", es },
357 { "popP", es },
358 /* 08 */
359 { "orB", Eb, Gb },
360 { "orS", Ev, Gv },
361 { "orB", Gb, Eb },
362 { "orS", Gv, Ev },
363 { "orB", AL, Ib },
364 { "orS", eAX, Iv },
365 { "pushP", cs },
366 { "(bad)" }, /* 0x0f extended opcode escape */
367 /* 10 */
368 { "adcB", Eb, Gb },
369 { "adcS", Ev, Gv },
370 { "adcB", Gb, Eb },
371 { "adcS", Gv, Ev },
372 { "adcB", AL, Ib },
373 { "adcS", eAX, Iv },
374 { "pushP", ss },
375 { "popP", ss },
376 /* 18 */
377 { "sbbB", Eb, Gb },
378 { "sbbS", Ev, Gv },
379 { "sbbB", Gb, Eb },
380 { "sbbS", Gv, Ev },
381 { "sbbB", AL, Ib },
382 { "sbbS", eAX, Iv },
383 { "pushP", ds },
384 { "popP", ds },
385 /* 20 */
386 { "andB", Eb, Gb },
387 { "andS", Ev, Gv },
388 { "andB", Gb, Eb },
389 { "andS", Gv, Ev },
390 { "andB", AL, Ib },
391 { "andS", eAX, Iv },
392 { "(bad)" }, /* SEG ES prefix */
393 { "daa" },
394 /* 28 */
395 { "subB", Eb, Gb },
396 { "subS", Ev, Gv },
397 { "subB", Gb, Eb },
398 { "subS", Gv, Ev },
399 { "subB", AL, Ib },
400 { "subS", eAX, Iv },
401 { "(bad)" }, /* SEG CS prefix */
402 { "das" },
403 /* 30 */
404 { "xorB", Eb, Gb },
405 { "xorS", Ev, Gv },
406 { "xorB", Gb, Eb },
407 { "xorS", Gv, Ev },
408 { "xorB", AL, Ib },
409 { "xorS", eAX, Iv },
410 { "(bad)" }, /* SEG SS prefix */
411 { "aaa" },
412 /* 38 */
413 { "cmpB", Eb, Gb },
414 { "cmpS", Ev, Gv },
415 { "cmpB", Gb, Eb },
416 { "cmpS", Gv, Ev },
417 { "cmpB", AL, Ib },
418 { "cmpS", eAX, Iv },
419 { "(bad)" }, /* SEG DS prefix */
420 { "aas" },
421 /* 40 */
422 { "incS", eAX },
423 { "incS", eCX },
424 { "incS", eDX },
425 { "incS", eBX },
426 { "incS", eSP },
427 { "incS", eBP },
428 { "incS", eSI },
429 { "incS", eDI },
430 /* 48 */
431 { "decS", eAX },
432 { "decS", eCX },
433 { "decS", eDX },
434 { "decS", eBX },
435 { "decS", eSP },
436 { "decS", eBP },
437 { "decS", eSI },
438 { "decS", eDI },
439 /* 50 */
440 { "pushS", eAX },
441 { "pushS", eCX },
442 { "pushS", eDX },
443 { "pushS", eBX },
444 { "pushS", eSP },
445 { "pushS", eBP },
446 { "pushS", eSI },
447 { "pushS", eDI },
448 /* 58 */
449 { "popS", eAX },
450 { "popS", eCX },
451 { "popS", eDX },
452 { "popS", eBX },
453 { "popS", eSP },
454 { "popS", eBP },
455 { "popS", eSI },
456 { "popS", eDI },
457 /* 60 */
458 { "pushaP" },
459 { "popaP" },
460 { "boundS", Gv, Ma },
461 { "arpl", Ew, Gw },
462 { "(bad)" }, /* seg fs */
463 { "(bad)" }, /* seg gs */
464 { "(bad)" }, /* op size prefix */
465 { "(bad)" }, /* adr size prefix */
466 /* 68 */
467 { "pushP", Iv }, /* 386 book wrong */
468 { "imulS", Gv, Ev, Iv },
469 { "pushP", sIb }, /* push of byte really pushes 2 or 4 bytes */
470 { "imulS", Gv, Ev, sIb },
471 { "insb", Yb, indirDX },
472 { "insR", Yv, indirDX },
473 { "outsb", indirDX, Xb },
474 { "outsR", indirDX, Xv },
475 /* 70 */
476 { "jo", Jb },
477 { "jno", Jb },
478 { "jb", Jb },
479 { "jae", Jb },
480 { "je", Jb },
481 { "jne", Jb },
482 { "jbe", Jb },
483 { "ja", Jb },
484 /* 78 */
485 { "js", Jb },
486 { "jns", Jb },
487 { "jp", Jb },
488 { "jnp", Jb },
489 { "jl", Jb },
490 { "jge", Jb },
491 { "jle", Jb },
492 { "jg", Jb },
493 /* 80 */
494 { GRP1b },
495 { GRP1S },
496 { "(bad)" },
497 { GRP1Ss },
498 { "testB", Eb, Gb },
499 { "testS", Ev, Gv },
500 { "xchgB", Eb, Gb },
501 { "xchgS", Ev, Gv },
502 /* 88 */
503 { "movB", Eb, Gb },
504 { "movS", Ev, Gv },
505 { "movB", Gb, Eb },
506 { "movS", Gv, Ev },
507 { "movQ", Ev, Sw },
508 { "leaS", Gv, M },
509 { "movQ", Sw, Ev },
510 { "popQ", Ev },
511 /* 90 */
512 { "nop" },
513 { "xchgS", eCX, eAX },
514 { "xchgS", eDX, eAX },
515 { "xchgS", eBX, eAX },
516 { "xchgS", eSP, eAX },
517 { "xchgS", eBP, eAX },
518 { "xchgS", eSI, eAX },
519 { "xchgS", eDI, eAX },
520 /* 98 */
521 { "cWtR" },
522 { "cRtd" },
523 { "lcallP", Ap },
524 { "(bad)" }, /* fwait */
525 { "pushfP" },
526 { "popfP" },
527 { "sahf" },
528 { "lahf" },
529 /* a0 */
530 { "movB", AL, Ob },
531 { "movS", eAX, Ov },
532 { "movB", Ob, AL },
533 { "movS", Ov, eAX },
534 { "movsb", Yb, Xb },
535 { "movsR", Yv, Xv },
536 { "cmpsb", Xb, Yb },
537 { "cmpsR", Xv, Yv },
538 /* a8 */
539 { "testB", AL, Ib },
540 { "testS", eAX, Iv },
541 { "stosB", Yb, AL },
542 { "stosS", Yv, eAX },
543 { "lodsB", AL, Xb },
544 { "lodsS", eAX, Xv },
545 { "scasB", AL, Yb },
546 { "scasS", eAX, Yv },
547 /* b0 */
548 { "movB", AL, Ib },
549 { "movB", CL, Ib },
550 { "movB", DL, Ib },
551 { "movB", BL, Ib },
552 { "movB", AH, Ib },
553 { "movB", CH, Ib },
554 { "movB", DH, Ib },
555 { "movB", BH, Ib },
556 /* b8 */
557 { "movS", eAX, Iv },
558 { "movS", eCX, Iv },
559 { "movS", eDX, Iv },
560 { "movS", eBX, Iv },
561 { "movS", eSP, Iv },
562 { "movS", eBP, Iv },
563 { "movS", eSI, Iv },
564 { "movS", eDI, Iv },
565 /* c0 */
566 { GRP2b },
567 { GRP2S },
568 { "retP", Iw },
569 { "retP" },
570 { "lesS", Gv, Mp },
571 { "ldsS", Gv, Mp },
572 { "movA", Eb, Ib },
573 { "movQ", Ev, Iv },
574 /* c8 */
575 { "enterP", Iw, Ib },
576 { "leaveP" },
577 { "lretP", Iw },
578 { "lretP" },
579 { "int3" },
580 { "int", Ib },
581 { "into" },
582 { "iretP" },
583 /* d0 */
584 { GRP2b_one },
585 { GRP2S_one },
586 { GRP2b_cl },
587 { GRP2S_cl },
588 { "aam", sIb },
589 { "aad", sIb },
590 { "(bad)" },
591 { "xlat", DSBX },
592 /* d8 */
593 { FLOAT },
594 { FLOAT },
595 { FLOAT },
596 { FLOAT },
597 { FLOAT },
598 { FLOAT },
599 { FLOAT },
600 { FLOAT },
601 /* e0 */
602 { "loopne", Jb },
603 { "loope", Jb },
604 { "loop", Jb },
605 { "jEcxz", Jb },
606 { "inB", AL, Ib },
607 { "inS", eAX, Ib },
608 { "outB", Ib, AL },
609 { "outS", Ib, eAX },
610 /* e8 */
611 { "callP", Jv },
612 { "jmpP", Jv },
613 { "ljmpP", Ap },
614 { "jmp", Jb },
615 { "inB", AL, indirDX },
616 { "inS", eAX, indirDX },
617 { "outB", indirDX, AL },
618 { "outS", indirDX, eAX },
619 /* f0 */
620 { "(bad)" }, /* lock prefix */
621 { "(bad)" },
622 { "(bad)" }, /* repne */
623 { "(bad)" }, /* repz */
624 { "hlt" },
625 { "cmc" },
626 { GRP3b },
627 { GRP3S },
628 /* f8 */
629 { "clc" },
630 { "stc" },
631 { "cli" },
632 { "sti" },
633 { "cld" },
634 { "std" },
635 { GRP4 },
636 { GRP5 },
637 };
638
639 static const struct dis386 dis386_intel[] = {
640 /* 00 */
641 { "add", Eb, Gb },
642 { "add", Ev, Gv },
643 { "add", Gb, Eb },
644 { "add", Gv, Ev },
645 { "add", AL, Ib },
646 { "add", eAX, Iv },
647 { "push", es },
648 { "pop", es },
649 /* 08 */
650 { "or", Eb, Gb },
651 { "or", Ev, Gv },
652 { "or", Gb, Eb },
653 { "or", Gv, Ev },
654 { "or", AL, Ib },
655 { "or", eAX, Iv },
656 { "push", cs },
657 { "(bad)" }, /* 0x0f extended opcode escape */
658 /* 10 */
659 { "adc", Eb, Gb },
660 { "adc", Ev, Gv },
661 { "adc", Gb, Eb },
662 { "adc", Gv, Ev },
663 { "adc", AL, Ib },
664 { "adc", eAX, Iv },
665 { "push", ss },
666 { "pop", ss },
667 /* 18 */
668 { "sbb", Eb, Gb },
669 { "sbb", Ev, Gv },
670 { "sbb", Gb, Eb },
671 { "sbb", Gv, Ev },
672 { "sbb", AL, Ib },
673 { "sbb", eAX, Iv },
674 { "push", ds },
675 { "pop", ds },
676 /* 20 */
677 { "and", Eb, Gb },
678 { "and", Ev, Gv },
679 { "and", Gb, Eb },
680 { "and", Gv, Ev },
681 { "and", AL, Ib },
682 { "and", eAX, Iv },
683 { "(bad)" }, /* SEG ES prefix */
684 { "daa" },
685 /* 28 */
686 { "sub", Eb, Gb },
687 { "sub", Ev, Gv },
688 { "sub", Gb, Eb },
689 { "sub", Gv, Ev },
690 { "sub", AL, Ib },
691 { "sub", eAX, Iv },
692 { "(bad)" }, /* SEG CS prefix */
693 { "das" },
694 /* 30 */
695 { "xor", Eb, Gb },
696 { "xor", Ev, Gv },
697 { "xor", Gb, Eb },
698 { "xor", Gv, Ev },
699 { "xor", AL, Ib },
700 { "xor", eAX, Iv },
701 { "(bad)" }, /* SEG SS prefix */
702 { "aaa" },
703 /* 38 */
704 { "cmp", Eb, Gb },
705 { "cmp", Ev, Gv },
706 { "cmp", Gb, Eb },
707 { "cmp", Gv, Ev },
708 { "cmp", AL, Ib },
709 { "cmp", eAX, Iv },
710 { "(bad)" }, /* SEG DS prefix */
711 { "aas" },
712 /* 40 */
713 { "inc", eAX },
714 { "inc", eCX },
715 { "inc", eDX },
716 { "inc", eBX },
717 { "inc", eSP },
718 { "inc", eBP },
719 { "inc", eSI },
720 { "inc", eDI },
721 /* 48 */
722 { "dec", eAX },
723 { "dec", eCX },
724 { "dec", eDX },
725 { "dec", eBX },
726 { "dec", eSP },
727 { "dec", eBP },
728 { "dec", eSI },
729 { "dec", eDI },
730 /* 50 */
731 { "push", eAX },
732 { "push", eCX },
733 { "push", eDX },
734 { "push", eBX },
735 { "push", eSP },
736 { "push", eBP },
737 { "push", eSI },
738 { "push", eDI },
739 /* 58 */
740 { "pop", eAX },
741 { "pop", eCX },
742 { "pop", eDX },
743 { "pop", eBX },
744 { "pop", eSP },
745 { "pop", eBP },
746 { "pop", eSI },
747 { "pop", eDI },
748 /* 60 */
749 { "pusha" },
750 { "popa" },
751 { "bound", Gv, Ma },
752 { "arpl", Ew, Gw },
753 { "(bad)" }, /* seg fs */
754 { "(bad)" }, /* seg gs */
755 { "(bad)" }, /* op size prefix */
756 { "(bad)" }, /* adr size prefix */
757 /* 68 */
758 { "push", Iv }, /* 386 book wrong */
759 { "imul", Gv, Ev, Iv },
760 { "push", sIb }, /* push of byte really pushes 2 or 4 bytes */
761 { "imul", Gv, Ev, sIb },
762 { "ins", Yb, indirDX },
763 { "ins", Yv, indirDX },
764 { "outs", indirDX, Xb },
765 { "outs", indirDX, Xv },
766 /* 70 */
767 { "jo", Jb },
768 { "jno", Jb },
769 { "jb", Jb },
770 { "jae", Jb },
771 { "je", Jb },
772 { "jne", Jb },
773 { "jbe", Jb },
774 { "ja", Jb },
775 /* 78 */
776 { "js", Jb },
777 { "jns", Jb },
778 { "jp", Jb },
779 { "jnp", Jb },
780 { "jl", Jb },
781 { "jge", Jb },
782 { "jle", Jb },
783 { "jg", Jb },
784 /* 80 */
785 { GRP1b },
786 { GRP1S },
787 { "(bad)" },
788 { GRP1Ss },
789 { "test", Eb, Gb },
790 { "test", Ev, Gv },
791 { "xchg", Eb, Gb },
792 { "xchg", Ev, Gv },
793 /* 88 */
794 { "mov", Eb, Gb },
795 { "mov", Ev, Gv },
796 { "mov", Gb, Eb },
797 { "mov", Gv, Ev },
798 { "mov", Ev, Sw },
799 { "lea", Gv, M },
800 { "mov", Sw, Ev },
801 { "pop", Ev },
802 /* 90 */
803 { "nop" },
804 { "xchg", eCX, eAX },
805 { "xchg", eDX, eAX },
806 { "xchg", eBX, eAX },
807 { "xchg", eSP, eAX },
808 { "xchg", eBP, eAX },
809 { "xchg", eSI, eAX },
810 { "xchg", eDI, eAX },
811 /* 98 */
812 { "cW" }, /* cwde and cbw */
813 { "cR" }, /* cdq and cwd */
814 { "lcall", Ap },
815 { "(bad)" }, /* fwait */
816 { "pushf" },
817 { "popf" },
818 { "sahf" },
819 { "lahf" },
820 /* a0 */
821 { "mov", AL, Ob },
822 { "mov", eAX, Ov },
823 { "mov", Ob, AL },
824 { "mov", Ov, eAX },
825 { "movs", Yb, Xb },
826 { "movs", Yv, Xv },
827 { "cmps", Xb, Yb },
828 { "cmps", Xv, Yv },
829 /* a8 */
830 { "test", AL, Ib },
831 { "test", eAX, Iv },
832 { "stos", Yb, AL },
833 { "stos", Yv, eAX },
834 { "lods", AL, Xb },
835 { "lods", eAX, Xv },
836 { "scas", AL, Yb },
837 { "scas", eAX, Yv },
838 /* b0 */
839 { "mov", AL, Ib },
840 { "mov", CL, Ib },
841 { "mov", DL, Ib },
842 { "mov", BL, Ib },
843 { "mov", AH, Ib },
844 { "mov", CH, Ib },
845 { "mov", DH, Ib },
846 { "mov", BH, Ib },
847 /* b8 */
848 { "mov", eAX, Iv },
849 { "mov", eCX, Iv },
850 { "mov", eDX, Iv },
851 { "mov", eBX, Iv },
852 { "mov", eSP, Iv },
853 { "mov", eBP, Iv },
854 { "mov", eSI, Iv },
855 { "mov", eDI, Iv },
856 /* c0 */
857 { GRP2b },
858 { GRP2S },
859 { "ret", Iw },
860 { "ret" },
861 { "les", Gv, Mp },
862 { "lds", Gv, Mp },
863 { "mov", Eb, Ib },
864 { "mov", Ev, Iv },
865 /* c8 */
866 { "enter", Iw, Ib },
867 { "leave" },
868 { "lret", Iw },
869 { "lret" },
870 { "int3" },
871 { "int", Ib },
872 { "into" },
873 { "iret" },
874 /* d0 */
875 { GRP2b_one },
876 { GRP2S_one },
877 { GRP2b_cl },
878 { GRP2S_cl },
879 { "aam", sIb },
880 { "aad", sIb },
881 { "(bad)" },
882 { "xlat", DSBX },
883 /* d8 */
884 { FLOAT },
885 { FLOAT },
886 { FLOAT },
887 { FLOAT },
888 { FLOAT },
889 { FLOAT },
890 { FLOAT },
891 { FLOAT },
892 /* e0 */
893 { "loopne", Jb },
894 { "loope", Jb },
895 { "loop", Jb },
896 { "jEcxz", Jb },
897 { "in", AL, Ib },
898 { "in", eAX, Ib },
899 { "out", Ib, AL },
900 { "out", Ib, eAX },
901 /* e8 */
902 { "call", Jv },
903 { "jmp", Jv },
904 { "ljmp", Ap },
905 { "jmp", Jb },
906 { "in", AL, indirDX },
907 { "in", eAX, indirDX },
908 { "out", indirDX, AL },
909 { "out", indirDX, eAX },
910 /* f0 */
911 { "(bad)" }, /* lock prefix */
912 { "(bad)" },
913 { "(bad)" }, /* repne */
914 { "(bad)" }, /* repz */
915 { "hlt" },
916 { "cmc" },
917 { GRP3b },
918 { GRP3S },
919 /* f8 */
920 { "clc" },
921 { "stc" },
922 { "cli" },
923 { "sti" },
924 { "cld" },
925 { "std" },
926 { GRP4 },
927 { GRP5 },
928 };
929
930 static const struct dis386 dis386_twobyte_att[] = {
931 /* 00 */
932 { GRP6 },
933 { GRP7 },
934 { "larS", Gv, Ew },
935 { "lslS", Gv, Ew },
936 { "(bad)" },
937 { "(bad)" },
938 { "clts" },
939 { "(bad)" },
940 /* 08 */
941 { "invd" },
942 { "wbinvd" },
943 { "(bad)" },
944 { "ud2a" },
945 { "(bad)" },
946 { GRPAMD },
947 { "femms" },
948 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */
949 /* 10 */
950 { PREGRP8 },
951 { PREGRP9 },
952 { "movlps", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
953 { "movlps", EX, XM, SIMD_Fixup, 'h' },
954 { "unpcklps", XM, EX },
955 { "unpckhps", XM, EX },
956 { "movhps", XM, EX, SIMD_Fixup, 'l' },
957 { "movhps", EX, XM, SIMD_Fixup, 'l' },
958 /* 18 */
959 { GRP14 },
960 { "(bad)" }, { "(bad)" }, { "(bad)" },
961 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
962 /* 20 */
963 /* these are all backward in appendix A of the intel book */
964 { "movL", Rd, Cd },
965 { "movL", Rd, Dd },
966 { "movL", Cd, Rd },
967 { "movL", Dd, Rd },
968 { "movL", Rd, Td },
969 { "(bad)" },
970 { "movL", Td, Rd },
971 { "(bad)" },
972 /* 28 */
973 { "movaps", XM, EX },
974 { "movaps", EX, XM },
975 { PREGRP2 },
976 { "movntps", Ev, XM },
977 { PREGRP4 },
978 { PREGRP3 },
979 { "ucomiss", XM, EX },
980 { "comiss", XM, EX },
981 /* 30 */
982 { "wrmsr" }, { "rdtsc" }, { "rdmsr" }, { "rdpmc" },
983 { "sysenter" }, { "sysexit" }, { "(bad)" }, { "(bad)" },
984 /* 38 */
985 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
986 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
987 /* 40 */
988 { "cmovo", Gv,Ev }, { "cmovno", Gv,Ev }, { "cmovb", Gv,Ev }, { "cmovae", Gv,Ev },
989 { "cmove", Gv,Ev }, { "cmovne", Gv,Ev }, { "cmovbe", Gv,Ev }, { "cmova", Gv,Ev },
990 /* 48 */
991 { "cmovs", Gv,Ev }, { "cmovns", Gv,Ev }, { "cmovp", Gv,Ev }, { "cmovnp", Gv,Ev },
992 { "cmovl", Gv,Ev }, { "cmovge", Gv,Ev }, { "cmovle", Gv,Ev }, { "cmovg", Gv,Ev },
993 /* 50 */
994 { "movmskps", Gv, EX },
995 { PREGRP13 },
996 { PREGRP12 },
997 { PREGRP11 },
998 { "andps", XM, EX },
999 { "andnps", XM, EX },
1000 { "orps", XM, EX },
1001 { "xorps", XM, EX },
1002 /* 58 */
1003 { PREGRP0 },
1004 { PREGRP10 },
1005 { "(bad)" },
1006 { "(bad)" },
1007 { PREGRP14 },
1008 { PREGRP7 },
1009 { PREGRP5 },
1010 { PREGRP6 },
1011 /* 60 */
1012 { "punpcklbw", MX, EM },
1013 { "punpcklwd", MX, EM },
1014 { "punpckldq", MX, EM },
1015 { "packsswb", MX, EM },
1016 { "pcmpgtb", MX, EM },
1017 { "pcmpgtw", MX, EM },
1018 { "pcmpgtd", MX, EM },
1019 { "packuswb", MX, EM },
1020 /* 68 */
1021 { "punpckhbw", MX, EM },
1022 { "punpckhwd", MX, EM },
1023 { "punpckhdq", MX, EM },
1024 { "packssdw", MX, EM },
1025 { "(bad)" }, { "(bad)" },
1026 { "movd", MX, Ed },
1027 { "movq", MX, EM },
1028 /* 70 */
1029 { "pshufw", MX, EM, Ib },
1030 { GRP10 },
1031 { GRP11 },
1032 { GRP12 },
1033 { "pcmpeqb", MX, EM },
1034 { "pcmpeqw", MX, EM },
1035 { "pcmpeqd", MX, EM },
1036 { "emms" },
1037 /* 78 */
1038 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
1039 { "(bad)" }, { "(bad)" },
1040 { "movd", Ed, MX },
1041 { "movq", EM, MX },
1042 /* 80 */
1043 { "jo", Jv },
1044 { "jno", Jv },
1045 { "jb", Jv },
1046 { "jae", Jv },
1047 { "je", Jv },
1048 { "jne", Jv },
1049 { "jbe", Jv },
1050 { "ja", Jv },
1051 /* 88 */
1052 { "js", Jv },
1053 { "jns", Jv },
1054 { "jp", Jv },
1055 { "jnp", Jv },
1056 { "jl", Jv },
1057 { "jge", Jv },
1058 { "jle", Jv },
1059 { "jg", Jv },
1060 /* 90 */
1061 { "seto", Eb },
1062 { "setno", Eb },
1063 { "setb", Eb },
1064 { "setae", Eb },
1065 { "sete", Eb },
1066 { "setne", Eb },
1067 { "setbe", Eb },
1068 { "seta", Eb },
1069 /* 98 */
1070 { "sets", Eb },
1071 { "setns", Eb },
1072 { "setp", Eb },
1073 { "setnp", Eb },
1074 { "setl", Eb },
1075 { "setge", Eb },
1076 { "setle", Eb },
1077 { "setg", Eb },
1078 /* a0 */
1079 { "pushP", fs },
1080 { "popP", fs },
1081 { "cpuid" },
1082 { "btS", Ev, Gv },
1083 { "shldS", Ev, Gv, Ib },
1084 { "shldS", Ev, Gv, CL },
1085 { "(bad)" },
1086 { "(bad)" },
1087 /* a8 */
1088 { "pushP", gs },
1089 { "popP", gs },
1090 { "rsm" },
1091 { "btsS", Ev, Gv },
1092 { "shrdS", Ev, Gv, Ib },
1093 { "shrdS", Ev, Gv, CL },
1094 { GRP13 },
1095 { "imulS", Gv, Ev },
1096 /* b0 */
1097 { "cmpxchgB", Eb, Gb },
1098 { "cmpxchgS", Ev, Gv },
1099 { "lssS", Gv, Mp },
1100 { "btrS", Ev, Gv },
1101 { "lfsS", Gv, Mp },
1102 { "lgsS", Gv, Mp },
1103 { "movzbR", Gv, Eb },
1104 { "movzwR", Gv, Ew }, /* yes, there really is movzww ! */
1105 /* b8 */
1106 { "(bad)" },
1107 { "ud2b" },
1108 { GRP8 },
1109 { "btcS", Ev, Gv },
1110 { "bsfS", Gv, Ev },
1111 { "bsrS", Gv, Ev },
1112 { "movsbR", Gv, Eb },
1113 { "movswR", Gv, Ew }, /* yes, there really is movsww ! */
1114 /* c0 */
1115 { "xaddB", Eb, Gb },
1116 { "xaddS", Ev, Gv },
1117 { PREGRP1 },
1118 { "(bad)" },
1119 { "pinsrw", MX, Ev, Ib },
1120 { "pextrw", Ev, MX, Ib },
1121 { "shufps", XM, EX, Ib },
1122 { GRP9 },
1123 /* c8 */
1124 { "bswap", eAX }, /* bswap doesn't support 16 bit regs */
1125 { "bswap", eCX },
1126 { "bswap", eDX },
1127 { "bswap", eBX },
1128 { "bswap", eSP },
1129 { "bswap", eBP },
1130 { "bswap", eSI },
1131 { "bswap", eDI },
1132 /* d0 */
1133 { "(bad)" },
1134 { "psrlw", MX, EM },
1135 { "psrld", MX, EM },
1136 { "psrlq", MX, EM },
1137 { "(bad)" },
1138 { "pmullw", MX, EM },
1139 { "(bad)" },
1140 { "pmovmskb", Ev, MX },
1141 /* d8 */
1142 { "psubusb", MX, EM },
1143 { "psubusw", MX, EM },
1144 { "pminub", MX, EM },
1145 { "pand", MX, EM },
1146 { "paddusb", MX, EM },
1147 { "paddusw", MX, EM },
1148 { "pmaxub", MX, EM },
1149 { "pandn", MX, EM },
1150 /* e0 */
1151 { "pavgb", MX, EM },
1152 { "psraw", MX, EM },
1153 { "psrad", MX, EM },
1154 { "pavgw", MX, EM },
1155 { "pmulhuw", MX, EM },
1156 { "pmulhw", MX, EM },
1157 { "(bad)" },
1158 { "movntq", Ev, MX },
1159 /* e8 */
1160 { "psubsb", MX, EM },
1161 { "psubsw", MX, EM },
1162 { "pminsw", MX, EM },
1163 { "por", MX, EM },
1164 { "paddsb", MX, EM },
1165 { "paddsw", MX, EM },
1166 { "pmaxsw", MX, EM },
1167 { "pxor", MX, EM },
1168 /* f0 */
1169 { "(bad)" },
1170 { "psllw", MX, EM },
1171 { "pslld", MX, EM },
1172 { "psllq", MX, EM },
1173 { "(bad)" },
1174 { "pmaddwd", MX, EM },
1175 { "psadbw", MX, EM },
1176 { "maskmovq", MX, EM },
1177 /* f8 */
1178 { "psubb", MX, EM },
1179 { "psubw", MX, EM },
1180 { "psubd", MX, EM },
1181 { "(bad)" },
1182 { "paddb", MX, EM },
1183 { "paddw", MX, EM },
1184 { "paddd", MX, EM },
1185 { "(bad)" }
1186 };
1187
1188 static const struct dis386 dis386_twobyte_intel[] = {
1189 /* 00 */
1190 { GRP6 },
1191 { GRP7 },
1192 { "lar", Gv, Ew },
1193 { "lsl", Gv, Ew },
1194 { "(bad)" },
1195 { "(bad)" },
1196 { "clts" },
1197 { "(bad)" },
1198 /* 08 */
1199 { "invd" },
1200 { "wbinvd" },
1201 { "(bad)" },
1202 { "ud2a" },
1203 { "(bad)" },
1204 { GRPAMD },
1205 { "femms" },
1206 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */
1207 /* 10 */
1208 { PREGRP8 },
1209 { PREGRP9 },
1210 { "movlps", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1211 { "movlps", EX, XM, SIMD_Fixup, 'h' },
1212 { "unpcklps", XM, EX },
1213 { "unpckhps", XM, EX },
1214 { "movhps", XM, EX, SIMD_Fixup, 'l' },
1215 { "movhps", EX, XM, SIMD_Fixup, 'l' },
1216 /* 18 */
1217 { GRP14 },
1218 { "(bad)" }, { "(bad)" }, { "(bad)" },
1219 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
1220 /* 20 */
1221 /* these are all backward in appendix A of the intel book */
1222 { "mov", Rd, Cd },
1223 { "mov", Rd, Dd },
1224 { "mov", Cd, Rd },
1225 { "mov", Dd, Rd },
1226 { "mov", Rd, Td },
1227 { "(bad)" },
1228 { "mov", Td, Rd },
1229 { "(bad)" },
1230 /* 28 */
1231 { "movaps", XM, EX },
1232 { "movaps", EX, XM },
1233 { PREGRP2 },
1234 { "movntps", Ev, XM },
1235 { PREGRP4 },
1236 { PREGRP3 },
1237 { "ucomiss", XM, EX },
1238 { "comiss", XM, EX },
1239 /* 30 */
1240 { "wrmsr" }, { "rdtsc" }, { "rdmsr" }, { "rdpmc" },
1241 { "sysenter" }, { "sysexit" }, { "(bad)" }, { "(bad)" },
1242 /* 38 */
1243 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
1244 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
1245 /* 40 */
1246 { "cmovo", Gv,Ev }, { "cmovno", Gv,Ev }, { "cmovb", Gv,Ev }, { "cmovae", Gv,Ev },
1247 { "cmove", Gv,Ev }, { "cmovne", Gv,Ev }, { "cmovbe", Gv,Ev }, { "cmova", Gv,Ev },
1248 /* 48 */
1249 { "cmovs", Gv,Ev }, { "cmovns", Gv,Ev }, { "cmovp", Gv,Ev }, { "cmovnp", Gv,Ev },
1250 { "cmovl", Gv,Ev }, { "cmovge", Gv,Ev }, { "cmovle", Gv,Ev }, { "cmovg", Gv,Ev },
1251 /* 50 */
1252 { "movmskps", Gv, EX },
1253 { PREGRP13 },
1254 { PREGRP12 },
1255 { PREGRP11 },
1256 { "andps", XM, EX },
1257 { "andnps", XM, EX },
1258 { "orps", XM, EX },
1259 { "xorps", XM, EX },
1260 /* 58 */
1261 { PREGRP0 },
1262 { PREGRP10 },
1263 { "(bad)" },
1264 { "(bad)" },
1265 { PREGRP14 },
1266 { PREGRP7 },
1267 { PREGRP5 },
1268 { PREGRP6 },
1269 /* 60 */
1270 { "punpcklbw", MX, EM },
1271 { "punpcklwd", MX, EM },
1272 { "punpckldq", MX, EM },
1273 { "packsswb", MX, EM },
1274 { "pcmpgtb", MX, EM },
1275 { "pcmpgtw", MX, EM },
1276 { "pcmpgtd", MX, EM },
1277 { "packuswb", MX, EM },
1278 /* 68 */
1279 { "punpckhbw", MX, EM },
1280 { "punpckhwd", MX, EM },
1281 { "punpckhdq", MX, EM },
1282 { "packssdw", MX, EM },
1283 { "(bad)" }, { "(bad)" },
1284 { "movd", MX, Ed },
1285 { "movq", MX, EM },
1286 /* 70 */
1287 { "pshufw", MX, EM, Ib },
1288 { GRP10 },
1289 { GRP11 },
1290 { GRP12 },
1291 { "pcmpeqb", MX, EM },
1292 { "pcmpeqw", MX, EM },
1293 { "pcmpeqd", MX, EM },
1294 { "emms" },
1295 /* 78 */
1296 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
1297 { "(bad)" }, { "(bad)" },
1298 { "movd", Ed, MX },
1299 { "movq", EM, MX },
1300 /* 80 */
1301 { "jo", Jv },
1302 { "jno", Jv },
1303 { "jb", Jv },
1304 { "jae", Jv },
1305 { "je", Jv },
1306 { "jne", Jv },
1307 { "jbe", Jv },
1308 { "ja", Jv },
1309 /* 88 */
1310 { "js", Jv },
1311 { "jns", Jv },
1312 { "jp", Jv },
1313 { "jnp", Jv },
1314 { "jl", Jv },
1315 { "jge", Jv },
1316 { "jle", Jv },
1317 { "jg", Jv },
1318 /* 90 */
1319 { "seto", Eb },
1320 { "setno", Eb },
1321 { "setb", Eb },
1322 { "setae", Eb },
1323 { "sete", Eb },
1324 { "setne", Eb },
1325 { "setbe", Eb },
1326 { "seta", Eb },
1327 /* 98 */
1328 { "sets", Eb },
1329 { "setns", Eb },
1330 { "setp", Eb },
1331 { "setnp", Eb },
1332 { "setl", Eb },
1333 { "setge", Eb },
1334 { "setle", Eb },
1335 { "setg", Eb },
1336 /* a0 */
1337 { "push", fs },
1338 { "pop", fs },
1339 { "cpuid" },
1340 { "bt", Ev, Gv },
1341 { "shld", Ev, Gv, Ib },
1342 { "shld", Ev, Gv, CL },
1343 { "(bad)" },
1344 { "(bad)" },
1345 /* a8 */
1346 { "push", gs },
1347 { "pop", gs },
1348 { "rsm" },
1349 { "bts", Ev, Gv },
1350 { "shrd", Ev, Gv, Ib },
1351 { "shrd", Ev, Gv, CL },
1352 { GRP13 },
1353 { "imul", Gv, Ev },
1354 /* b0 */
1355 { "cmpxchg", Eb, Gb },
1356 { "cmpxchg", Ev, Gv },
1357 { "lss", Gv, Mp },
1358 { "btr", Ev, Gv },
1359 { "lfs", Gv, Mp },
1360 { "lgs", Gv, Mp },
1361 { "movzx", Gv, Eb },
1362 { "movzx", Gv, Ew },
1363 /* b8 */
1364 { "(bad)" },
1365 { "ud2b" },
1366 { GRP8 },
1367 { "btc", Ev, Gv },
1368 { "bsf", Gv, Ev },
1369 { "bsr", Gv, Ev },
1370 { "movsx", Gv, Eb },
1371 { "movsx", Gv, Ew },
1372 /* c0 */
1373 { "xadd", Eb, Gb },
1374 { "xadd", Ev, Gv },
1375 { PREGRP1 },
1376 { "(bad)" },
1377 { "pinsrw", MX, Ev, Ib },
1378 { "pextrw", Ev, MX, Ib },
1379 { "shufps", XM, EX, Ib },
1380 { GRP9 },
1381 /* c8 */
1382 { "bswap", eAX }, /* bswap doesn't support 16 bit regs */
1383 { "bswap", eCX },
1384 { "bswap", eDX },
1385 { "bswap", eBX },
1386 { "bswap", eSP },
1387 { "bswap", eBP },
1388 { "bswap", eSI },
1389 { "bswap", eDI },
1390 /* d0 */
1391 { "(bad)" },
1392 { "psrlw", MX, EM },
1393 { "psrld", MX, EM },
1394 { "psrlq", MX, EM },
1395 { "(bad)" },
1396 { "pmullw", MX, EM },
1397 { "(bad)" },
1398 { "pmovmskb", Ev, MX },
1399 /* d8 */
1400 { "psubusb", MX, EM },
1401 { "psubusw", MX, EM },
1402 { "pminub", MX, EM },
1403 { "pand", MX, EM },
1404 { "paddusb", MX, EM },
1405 { "paddusw", MX, EM },
1406 { "pmaxub", MX, EM },
1407 { "pandn", MX, EM },
1408 /* e0 */
1409 { "pavgb", MX, EM },
1410 { "psraw", MX, EM },
1411 { "psrad", MX, EM },
1412 { "pavgw", MX, EM },
1413 { "pmulhuw", MX, EM },
1414 { "pmulhw", MX, EM },
1415 { "(bad)" },
1416 { "movntq", Ev, MX },
1417 /* e8 */
1418 { "psubsb", MX, EM },
1419 { "psubsw", MX, EM },
1420 { "pminsw", MX, EM },
1421 { "por", MX, EM },
1422 { "paddsb", MX, EM },
1423 { "paddsw", MX, EM },
1424 { "pmaxsw", MX, EM },
1425 { "pxor", MX, EM },
1426 /* f0 */
1427 { "(bad)" },
1428 { "psllw", MX, EM },
1429 { "pslld", MX, EM },
1430 { "psllq", MX, EM },
1431 { "(bad)" },
1432 { "pmaddwd", MX, EM },
1433 { "psadbw", MX, EM },
1434 { "maskmovq", MX, EM },
1435 /* f8 */
1436 { "psubb", MX, EM },
1437 { "psubw", MX, EM },
1438 { "psubd", MX, EM },
1439 { "(bad)" },
1440 { "paddb", MX, EM },
1441 { "paddw", MX, EM },
1442 { "paddd", MX, EM },
1443 { "(bad)" }
1444 };
1445
1446 static const unsigned char onebyte_has_modrm[256] = {
1447 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1448 /* ------------------------------- */
1449 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1450 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1451 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1452 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1453 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1454 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1455 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1456 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1457 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1458 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1459 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1460 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1461 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1462 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1463 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1464 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1465 /* ------------------------------- */
1466 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1467 };
1468
1469 static const unsigned char twobyte_has_modrm[256] = {
1470 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1471 /* ------------------------------- */
1472 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1473 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1474 /* 20 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 2f */
1475 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1476 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1477 /* 50 */ 1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1, /* 5f */
1478 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1, /* 6f */
1479 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
1480 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1481 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1482 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1483 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1484 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1485 /* d0 */ 0,1,1,1,0,1,0,1,1,1,1,1,1,1,1,1, /* df */
1486 /* e0 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* ef */
1487 /* f0 */ 0,1,1,1,0,1,1,1,1,1,1,0,1,1,1,0 /* ff */
1488 /* ------------------------------- */
1489 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1490 };
1491
1492 static const unsigned char twobyte_uses_f3_prefix[256] = {
1493 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1494 /* ------------------------------- */
1495 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1496 /* 10 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1497 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1498 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1499 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1500 /* 50 */ 0,1,1,1,0,0,0,0,1,1,0,0,1,1,1,1, /* 5f */
1501 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1502 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1503 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1504 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1505 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1506 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1507 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1508 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1509 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1510 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 /* ff */
1511 /* ------------------------------- */
1512 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1513 };
1514
1515 static char obuf[100];
1516 static char *obufp;
1517 static char scratchbuf[100];
1518 static unsigned char *start_codep;
1519 static unsigned char *insn_codep;
1520 static unsigned char *codep;
1521 static disassemble_info *the_info;
1522 static int mod;
1523 static int rm;
1524 static int reg;
1525 static void oappend PARAMS ((const char *s));
1526
1527 static const char *names32[]={
1528 "%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi",
1529 };
1530 static const char *names16[] = {
1531 "%ax","%cx","%dx","%bx","%sp","%bp","%si","%di",
1532 };
1533 static const char *names8[] = {
1534 "%al","%cl","%dl","%bl","%ah","%ch","%dh","%bh",
1535 };
1536 static const char *names_seg[] = {
1537 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
1538 };
1539 static const char *index16[] = {
1540 "%bx,%si","%bx,%di","%bp,%si","%bp,%di","%si","%di","%bp","%bx"
1541 };
1542
1543 static const struct dis386 grps[][8] = {
1544 /* GRP1b */
1545 {
1546 { "addA", Eb, Ib },
1547 { "orA", Eb, Ib },
1548 { "adcA", Eb, Ib },
1549 { "sbbA", Eb, Ib },
1550 { "andA", Eb, Ib },
1551 { "subA", Eb, Ib },
1552 { "xorA", Eb, Ib },
1553 { "cmpA", Eb, Ib }
1554 },
1555 /* GRP1S */
1556 {
1557 { "addQ", Ev, Iv },
1558 { "orQ", Ev, Iv },
1559 { "adcQ", Ev, Iv },
1560 { "sbbQ", Ev, Iv },
1561 { "andQ", Ev, Iv },
1562 { "subQ", Ev, Iv },
1563 { "xorQ", Ev, Iv },
1564 { "cmpQ", Ev, Iv }
1565 },
1566 /* GRP1Ss */
1567 {
1568 { "addQ", Ev, sIb },
1569 { "orQ", Ev, sIb },
1570 { "adcQ", Ev, sIb },
1571 { "sbbQ", Ev, sIb },
1572 { "andQ", Ev, sIb },
1573 { "subQ", Ev, sIb },
1574 { "xorQ", Ev, sIb },
1575 { "cmpQ", Ev, sIb }
1576 },
1577 /* GRP2b */
1578 {
1579 { "rolA", Eb, Ib },
1580 { "rorA", Eb, Ib },
1581 { "rclA", Eb, Ib },
1582 { "rcrA", Eb, Ib },
1583 { "shlA", Eb, Ib },
1584 { "shrA", Eb, Ib },
1585 { "(bad)" },
1586 { "sarA", Eb, Ib },
1587 },
1588 /* GRP2S */
1589 {
1590 { "rolQ", Ev, Ib },
1591 { "rorQ", Ev, Ib },
1592 { "rclQ", Ev, Ib },
1593 { "rcrQ", Ev, Ib },
1594 { "shlQ", Ev, Ib },
1595 { "shrQ", Ev, Ib },
1596 { "(bad)" },
1597 { "sarQ", Ev, Ib },
1598 },
1599 /* GRP2b_one */
1600 {
1601 { "rolA", Eb },
1602 { "rorA", Eb },
1603 { "rclA", Eb },
1604 { "rcrA", Eb },
1605 { "shlA", Eb },
1606 { "shrA", Eb },
1607 { "(bad)" },
1608 { "sarA", Eb },
1609 },
1610 /* GRP2S_one */
1611 {
1612 { "rolQ", Ev },
1613 { "rorQ", Ev },
1614 { "rclQ", Ev },
1615 { "rcrQ", Ev },
1616 { "shlQ", Ev },
1617 { "shrQ", Ev },
1618 { "(bad)" },
1619 { "sarQ", Ev },
1620 },
1621 /* GRP2b_cl */
1622 {
1623 { "rolA", Eb, CL },
1624 { "rorA", Eb, CL },
1625 { "rclA", Eb, CL },
1626 { "rcrA", Eb, CL },
1627 { "shlA", Eb, CL },
1628 { "shrA", Eb, CL },
1629 { "(bad)" },
1630 { "sarA", Eb, CL },
1631 },
1632 /* GRP2S_cl */
1633 {
1634 { "rolQ", Ev, CL },
1635 { "rorQ", Ev, CL },
1636 { "rclQ", Ev, CL },
1637 { "rcrQ", Ev, CL },
1638 { "shlQ", Ev, CL },
1639 { "shrQ", Ev, CL },
1640 { "(bad)" },
1641 { "sarQ", Ev, CL }
1642 },
1643 /* GRP3b */
1644 {
1645 { "testA", Eb, Ib },
1646 { "(bad)", Eb },
1647 { "notA", Eb },
1648 { "negA", Eb },
1649 { "mulB", AL, Eb },
1650 { "imulB", AL, Eb },
1651 { "divB", AL, Eb },
1652 { "idivB", AL, Eb }
1653 },
1654 /* GRP3S */
1655 {
1656 { "testQ", Ev, Iv },
1657 { "(bad)" },
1658 { "notQ", Ev },
1659 { "negQ", Ev },
1660 { "mulS", eAX, Ev },
1661 { "imulS", eAX, Ev },
1662 { "divS", eAX, Ev },
1663 { "idivS", eAX, Ev },
1664 },
1665 /* GRP4 */
1666 {
1667 { "incA", Eb },
1668 { "decA", Eb },
1669 { "(bad)" },
1670 { "(bad)" },
1671 { "(bad)" },
1672 { "(bad)" },
1673 { "(bad)" },
1674 { "(bad)" },
1675 },
1676 /* GRP5 */
1677 {
1678 { "incQ", Ev },
1679 { "decQ", Ev },
1680 { "callP", indirEv },
1681 { "callP", indirEv },
1682 { "jmpP", indirEv },
1683 { "ljmpP", indirEv },
1684 { "pushQ", Ev },
1685 { "(bad)" },
1686 },
1687 /* GRP6 */
1688 {
1689 { "sldt", Ew },
1690 { "str", Ew },
1691 { "lldt", Ew },
1692 { "ltr", Ew },
1693 { "verr", Ew },
1694 { "verw", Ew },
1695 { "(bad)" },
1696 { "(bad)" }
1697 },
1698 /* GRP7 */
1699 {
1700 { "sgdt", Ew },
1701 { "sidt", Ew },
1702 { "lgdt", Ew },
1703 { "lidt", Ew },
1704 { "smsw", Ew },
1705 { "(bad)" },
1706 { "lmsw", Ew },
1707 { "invlpg", Ew },
1708 },
1709 /* GRP8 */
1710 {
1711 { "(bad)" },
1712 { "(bad)" },
1713 { "(bad)" },
1714 { "(bad)" },
1715 { "btQ", Ev, Ib },
1716 { "btsQ", Ev, Ib },
1717 { "btrQ", Ev, Ib },
1718 { "btcQ", Ev, Ib },
1719 },
1720 /* GRP9 */
1721 {
1722 { "(bad)" },
1723 { "cmpxchg8b", Ev },
1724 { "(bad)" },
1725 { "(bad)" },
1726 { "(bad)" },
1727 { "(bad)" },
1728 { "(bad)" },
1729 { "(bad)" },
1730 },
1731 /* GRP10 */
1732 {
1733 { "(bad)" },
1734 { "(bad)" },
1735 { "psrlw", MS, Ib },
1736 { "(bad)" },
1737 { "psraw", MS, Ib },
1738 { "(bad)" },
1739 { "psllw", MS, Ib },
1740 { "(bad)" },
1741 },
1742 /* GRP11 */
1743 {
1744 { "(bad)" },
1745 { "(bad)" },
1746 { "psrld", MS, Ib },
1747 { "(bad)" },
1748 { "psrad", MS, Ib },
1749 { "(bad)" },
1750 { "pslld", MS, Ib },
1751 { "(bad)" },
1752 },
1753 /* GRP12 */
1754 {
1755 { "(bad)" },
1756 { "(bad)" },
1757 { "psrlq", MS, Ib },
1758 { "(bad)" },
1759 { "(bad)" },
1760 { "(bad)" },
1761 { "psllq", MS, Ib },
1762 { "(bad)" },
1763 },
1764 /* GRP13 */
1765 {
1766 { "fxsave", Ev },
1767 { "fxrstor", Ev },
1768 { "ldmxcsr", Ev },
1769 { "stmxcsr", Ev },
1770 { "(bad)" },
1771 { "(bad)" },
1772 { "(bad)" },
1773 { "sfence", None },
1774 },
1775 /* GRP14 */
1776 {
1777 { "prefetchnta", Ev },
1778 { "prefetcht0", Ev },
1779 { "prefetcht1", Ev },
1780 { "prefetcht2", Ev },
1781 { "(bad)" },
1782 { "(bad)" },
1783 { "(bad)" },
1784 { "(bad)" },
1785 },
1786 /* GRPAMD */
1787 {
1788 { "prefetch", Eb },
1789 { "prefetchw", Eb },
1790 { "(bad)" },
1791 { "(bad)" },
1792 { "(bad)" },
1793 { "(bad)" },
1794 { "(bad)" },
1795 { "(bad)" },
1796 }
1797
1798 };
1799
1800 static const struct dis386 prefix_user_table[][2] = {
1801 /* PREGRP0 */
1802 {
1803 { "addps", XM, EX },
1804 { "addss", XM, EX },
1805 },
1806 /* PREGRP1 */
1807 {
1808 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX */
1809 { "", XM, EX, OPSIMD },
1810 },
1811 /* PREGRP2 */
1812 {
1813 { "cvtpi2ps", XM, EM },
1814 { "cvtsi2ss", XM, Ev },
1815 },
1816 /* PREGRP3 */
1817 {
1818 { "cvtps2pi", MX, EX },
1819 { "cvtss2si", Gv, EX },
1820 },
1821 /* PREGRP4 */
1822 {
1823 { "cvttps2pi", MX, EX },
1824 { "cvttss2si", Gv, EX },
1825 },
1826 /* PREGRP5 */
1827 {
1828 { "divps", XM, EX },
1829 { "divss", XM, EX },
1830 },
1831 /* PREGRP6 */
1832 {
1833 { "maxps", XM, EX },
1834 { "maxss", XM, EX },
1835 },
1836 /* PREGRP7 */
1837 {
1838 { "minps", XM, EX },
1839 { "minss", XM, EX },
1840 },
1841 /* PREGRP8 */
1842 {
1843 { "movups", XM, EX },
1844 { "movss", XM, EX },
1845 },
1846 /* PREGRP9 */
1847 {
1848 { "movups", EX, XM },
1849 { "movss", EX, XM },
1850 },
1851 /* PREGRP10 */
1852 {
1853 { "mulps", XM, EX },
1854 { "mulss", XM, EX },
1855 },
1856 /* PREGRP11 */
1857 {
1858 { "rcpps", XM, EX },
1859 { "rcpss", XM, EX },
1860 },
1861 /* PREGRP12 */
1862 {
1863 { "rsqrtps", XM, EX },
1864 { "rsqrtss", XM, EX },
1865 },
1866 /* PREGRP13 */
1867 {
1868 { "sqrtps", XM, EX },
1869 { "sqrtss", XM, EX },
1870 },
1871 /* PREGRP14 */
1872 {
1873 { "subps", XM, EX },
1874 { "subss", XM, EX },
1875 }
1876 };
1877
1878 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1879
1880 static void
1881 ckprefix ()
1882 {
1883 prefixes = 0;
1884 while (1)
1885 {
1886 FETCH_DATA (the_info, codep + 1);
1887 switch (*codep)
1888 {
1889 case 0xf3:
1890 prefixes |= PREFIX_REPZ;
1891 break;
1892 case 0xf2:
1893 prefixes |= PREFIX_REPNZ;
1894 break;
1895 case 0xf0:
1896 prefixes |= PREFIX_LOCK;
1897 break;
1898 case 0x2e:
1899 prefixes |= PREFIX_CS;
1900 break;
1901 case 0x36:
1902 prefixes |= PREFIX_SS;
1903 break;
1904 case 0x3e:
1905 prefixes |= PREFIX_DS;
1906 break;
1907 case 0x26:
1908 prefixes |= PREFIX_ES;
1909 break;
1910 case 0x64:
1911 prefixes |= PREFIX_FS;
1912 break;
1913 case 0x65:
1914 prefixes |= PREFIX_GS;
1915 break;
1916 case 0x66:
1917 prefixes |= PREFIX_DATA;
1918 break;
1919 case 0x67:
1920 prefixes |= PREFIX_ADDR;
1921 break;
1922 case FWAIT_OPCODE:
1923 /* fwait is really an instruction. If there are prefixes
1924 before the fwait, they belong to the fwait, *not* to the
1925 following instruction. */
1926 if (prefixes)
1927 {
1928 prefixes |= PREFIX_FWAIT;
1929 codep++;
1930 return;
1931 }
1932 prefixes = PREFIX_FWAIT;
1933 break;
1934 default:
1935 return;
1936 }
1937 codep++;
1938 }
1939 }
1940
1941 static char op1out[100], op2out[100], op3out[100];
1942 static int op_ad, op_index[3];
1943 static unsigned int op_address[3];
1944 static unsigned int start_pc;
1945
1946 \f
1947 /*
1948 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1949 * (see topic "Redundant prefixes" in the "Differences from 8086"
1950 * section of the "Virtual 8086 Mode" chapter.)
1951 * 'pc' should be the address of this instruction, it will
1952 * be used to print the target address if this is a relative jump or call
1953 * The function returns the length of this instruction in bytes.
1954 */
1955
1956 static int print_insn_i386
1957 PARAMS ((bfd_vma pc, disassemble_info *info));
1958
1959 static char intel_syntax;
1960 static char open_char;
1961 static char close_char;
1962 static char separator_char;
1963 static char scale_char;
1964
1965 int
1966 print_insn_i386_att (pc, info)
1967 bfd_vma pc;
1968 disassemble_info *info;
1969 {
1970 intel_syntax = 0;
1971 open_char = '(';
1972 close_char = ')';
1973 separator_char = ',';
1974 scale_char = ',';
1975
1976 return print_insn_i386 (pc, info);
1977 }
1978
1979 int
1980 print_insn_i386_intel (pc, info)
1981 bfd_vma pc;
1982 disassemble_info *info;
1983 {
1984 intel_syntax = 1;
1985 open_char = '[';
1986 close_char = ']';
1987 separator_char = '+';
1988 scale_char = '*';
1989
1990 return print_insn_i386 (pc, info);
1991 }
1992
1993 static int
1994 print_insn_i386 (pc, info)
1995 bfd_vma pc;
1996 disassemble_info *info;
1997 {
1998 const struct dis386 *dp;
1999 int i;
2000 int two_source_ops;
2001 char *first, *second, *third;
2002 int needcomma;
2003 unsigned char need_modrm;
2004 unsigned char uses_f3_prefix;
2005 int sizeflag;
2006
2007 struct dis_private priv;
2008 bfd_byte *inbuf = priv.the_buffer;
2009
2010 if (info->mach == bfd_mach_i386_i386
2011 || info->mach == bfd_mach_i386_i386_intel_syntax)
2012 sizeflag = AFLAG|DFLAG;
2013 else if (info->mach == bfd_mach_i386_i8086)
2014 sizeflag = 0;
2015 else
2016 abort ();
2017
2018 /* The output looks better if we put 6 bytes on a line, since that
2019 puts most long word instructions on a single line. */
2020 info->bytes_per_line = 6;
2021
2022 info->private_data = (PTR) &priv;
2023 priv.max_fetched = priv.the_buffer;
2024 priv.insn_start = pc;
2025
2026 obuf[0] = 0;
2027 op1out[0] = 0;
2028 op2out[0] = 0;
2029 op3out[0] = 0;
2030
2031 op_index[0] = op_index[1] = op_index[2] = -1;
2032
2033 the_info = info;
2034 start_pc = pc;
2035 start_codep = inbuf;
2036 codep = inbuf;
2037
2038 if (setjmp (priv.bailout) != 0)
2039 {
2040 /* Getting here means we tried for data but didn't get it. That
2041 means we have an incomplete instruction of some sort.
2042 However, we need to check at least one case here: fwait is a
2043 complete instruction, although we treat it as a prefix. */
2044 if (prefixes & PREFIX_FWAIT)
2045 {
2046 unsigned char *p;
2047
2048 p = memchr (inbuf, FWAIT_OPCODE, codep - inbuf);
2049 if (p != NULL)
2050 {
2051 (*info->fprintf_func) (info->stream, "fwait");
2052 return (p + 1) - inbuf;
2053 }
2054 }
2055
2056 if (codep > inbuf)
2057 {
2058 /* This will at least let objdump print the bytes followed
2059 by the error message generated by fetch_data. */
2060 return codep - inbuf;
2061 }
2062
2063 return -1;
2064 }
2065
2066 ckprefix ();
2067
2068 insn_codep = codep;
2069
2070 FETCH_DATA (info, codep + 1);
2071 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2072
2073 obufp = obuf;
2074
2075 if ((prefixes & PREFIX_FWAIT)
2076 && ((*codep < 0xd8) || (*codep > 0xdf)))
2077 {
2078 /* fwait not followed by floating point instruction. */
2079 (*info->fprintf_func) (info->stream, "fwait");
2080 /* There may be other prefixes. Skip any before the fwait. */
2081 return codep - inbuf;
2082 }
2083
2084 if (*codep == 0x0f)
2085 {
2086 FETCH_DATA (info, codep + 2);
2087 if (intel_syntax)
2088 dp = &dis386_twobyte_intel[*++codep];
2089 else
2090 dp = &dis386_twobyte_att[*++codep];
2091 need_modrm = twobyte_has_modrm[*codep];
2092 uses_f3_prefix = twobyte_uses_f3_prefix[*codep];
2093 }
2094 else
2095 {
2096 if (intel_syntax)
2097 dp = &dis386_intel[*codep];
2098 else
2099 dp = &dis386_att[*codep];
2100 need_modrm = onebyte_has_modrm[*codep];
2101 uses_f3_prefix = 0;
2102 }
2103 codep++;
2104
2105 if (!uses_f3_prefix && (prefixes & PREFIX_REPZ))
2106 oappend ("repz ");
2107 if (prefixes & PREFIX_REPNZ)
2108 oappend ("repnz ");
2109 if (prefixes & PREFIX_LOCK)
2110 oappend ("lock ");
2111
2112 if (prefixes & PREFIX_DATA)
2113 sizeflag ^= DFLAG;
2114
2115 if (prefixes & PREFIX_ADDR)
2116 {
2117 sizeflag ^= AFLAG;
2118 if (sizeflag & AFLAG)
2119 oappend ("addr32 ");
2120 else
2121 oappend ("addr16 ");
2122 }
2123
2124 if (need_modrm)
2125 {
2126 FETCH_DATA (info, codep + 1);
2127 mod = (*codep >> 6) & 3;
2128 reg = (*codep >> 3) & 7;
2129 rm = *codep & 7;
2130 }
2131
2132 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2133 {
2134 dofloat (sizeflag);
2135 }
2136 else
2137 {
2138 if (dp->name == NULL)
2139 {
2140 switch(dp->bytemode2)
2141 {
2142 case USE_GROUPS:
2143 dp = &grps[dp->bytemode1][reg];
2144 break;
2145 case USE_PREFIX_USER_TABLE:
2146 dp = &prefix_user_table[dp->bytemode1][prefixes & PREFIX_REPZ ? 1 : 0];
2147 break;
2148 default:
2149 oappend (INTERNAL_DISASSEMBLER_ERROR);
2150 break;
2151 }
2152 }
2153
2154 putop (dp->name, sizeflag);
2155
2156 obufp = op1out;
2157 op_ad = 2;
2158 if (dp->op1)
2159 (*dp->op1)(dp->bytemode1, sizeflag);
2160
2161 obufp = op2out;
2162 op_ad = 1;
2163 if (dp->op2)
2164 (*dp->op2)(dp->bytemode2, sizeflag);
2165
2166 obufp = op3out;
2167 op_ad = 0;
2168 if (dp->op3)
2169 (*dp->op3)(dp->bytemode3, sizeflag);
2170 }
2171
2172 obufp = obuf + strlen (obuf);
2173 for (i = strlen (obuf); i < 6; i++)
2174 oappend (" ");
2175 oappend (" ");
2176 (*info->fprintf_func) (info->stream, "%s", obuf);
2177
2178 /* The enter and bound instructions are printed with operands in the same
2179 order as the intel book; everything else is printed in reverse order. */
2180 if (intel_syntax || two_source_ops)
2181 {
2182 first = op1out;
2183 second = op2out;
2184 third = op3out;
2185 op_ad = op_index[0];
2186 op_index[0] = op_index[2];
2187 op_index[2] = op_ad;
2188 }
2189 else
2190 {
2191 first = op3out;
2192 second = op2out;
2193 third = op1out;
2194 }
2195 needcomma = 0;
2196 if (*first)
2197 {
2198 if (op_index[0] != -1)
2199 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2200 else
2201 (*info->fprintf_func) (info->stream, "%s", first);
2202 needcomma = 1;
2203 }
2204 if (*second)
2205 {
2206 if (needcomma)
2207 (*info->fprintf_func) (info->stream, ",");
2208 if (op_index[1] != -1)
2209 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2210 else
2211 (*info->fprintf_func) (info->stream, "%s", second);
2212 needcomma = 1;
2213 }
2214 if (*third)
2215 {
2216 if (needcomma)
2217 (*info->fprintf_func) (info->stream, ",");
2218 if (op_index[2] != -1)
2219 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2220 else
2221 (*info->fprintf_func) (info->stream, "%s", third);
2222 }
2223 return codep - inbuf;
2224 }
2225
2226 static const char *float_mem_att[] = {
2227 /* d8 */
2228 "fadds",
2229 "fmuls",
2230 "fcoms",
2231 "fcomps",
2232 "fsubs",
2233 "fsubrs",
2234 "fdivs",
2235 "fdivrs",
2236 /* d9 */
2237 "flds",
2238 "(bad)",
2239 "fsts",
2240 "fstps",
2241 "fldenv",
2242 "fldcw",
2243 "fNstenv",
2244 "fNstcw",
2245 /* da */
2246 "fiaddl",
2247 "fimull",
2248 "ficoml",
2249 "ficompl",
2250 "fisubl",
2251 "fisubrl",
2252 "fidivl",
2253 "fidivrl",
2254 /* db */
2255 "fildl",
2256 "(bad)",
2257 "fistl",
2258 "fistpl",
2259 "(bad)",
2260 "fldt",
2261 "(bad)",
2262 "fstpt",
2263 /* dc */
2264 "faddl",
2265 "fmull",
2266 "fcoml",
2267 "fcompl",
2268 "fsubl",
2269 "fsubrl",
2270 "fdivl",
2271 "fdivrl",
2272 /* dd */
2273 "fldl",
2274 "(bad)",
2275 "fstl",
2276 "fstpl",
2277 "frstor",
2278 "(bad)",
2279 "fNsave",
2280 "fNstsw",
2281 /* de */
2282 "fiadd",
2283 "fimul",
2284 "ficom",
2285 "ficomp",
2286 "fisub",
2287 "fisubr",
2288 "fidiv",
2289 "fidivr",
2290 /* df */
2291 "fild",
2292 "(bad)",
2293 "fist",
2294 "fistp",
2295 "fbld",
2296 "fildll",
2297 "fbstp",
2298 "fistpll",
2299 };
2300
2301 static const char *float_mem_intel[] = {
2302 /* d8 */
2303 "fadd",
2304 "fmul",
2305 "fcom",
2306 "fcomp",
2307 "fsub",
2308 "fsubr",
2309 "fdiv",
2310 "fdivr",
2311 /* d9 */
2312 "fld",
2313 "(bad)",
2314 "fst",
2315 "fstp",
2316 "fldenv",
2317 "fldcw",
2318 "fNstenv",
2319 "fNstcw",
2320 /* da */
2321 "fiadd",
2322 "fimul",
2323 "ficom",
2324 "ficomp",
2325 "fisub",
2326 "fisubr",
2327 "fidiv",
2328 "fidivr",
2329 /* db */
2330 "fild",
2331 "(bad)",
2332 "fist",
2333 "fistp",
2334 "(bad)",
2335 "fld",
2336 "(bad)",
2337 "fstp",
2338 /* dc */
2339 "fadd",
2340 "fmul",
2341 "fcom",
2342 "fcomp",
2343 "fsub",
2344 "fsubr",
2345 "fdiv",
2346 "fdivr",
2347 /* dd */
2348 "fld",
2349 "(bad)",
2350 "fst",
2351 "fstp",
2352 "frstor",
2353 "(bad)",
2354 "fNsave",
2355 "fNstsw",
2356 /* de */
2357 "fiadd",
2358 "fimul",
2359 "ficom",
2360 "ficomp",
2361 "fisub",
2362 "fisubr",
2363 "fidiv",
2364 "fidivr",
2365 /* df */
2366 "fild",
2367 "(bad)",
2368 "fist",
2369 "fistp",
2370 "fbld",
2371 "fild",
2372 "fbstp",
2373 "fistpll",
2374 };
2375
2376 #define ST OP_ST, 0
2377 #define STi OP_STi, 0
2378
2379 #define FGRPd9_2 NULL, NULL, 0
2380 #define FGRPd9_4 NULL, NULL, 1
2381 #define FGRPd9_5 NULL, NULL, 2
2382 #define FGRPd9_6 NULL, NULL, 3
2383 #define FGRPd9_7 NULL, NULL, 4
2384 #define FGRPda_5 NULL, NULL, 5
2385 #define FGRPdb_4 NULL, NULL, 6
2386 #define FGRPde_3 NULL, NULL, 7
2387 #define FGRPdf_4 NULL, NULL, 8
2388
2389 static const struct dis386 float_reg[][8] = {
2390 /* d8 */
2391 {
2392 { "fadd", ST, STi },
2393 { "fmul", ST, STi },
2394 { "fcom", STi },
2395 { "fcomp", STi },
2396 { "fsub", ST, STi },
2397 { "fsubr", ST, STi },
2398 { "fdiv", ST, STi },
2399 { "fdivr", ST, STi },
2400 },
2401 /* d9 */
2402 {
2403 { "fld", STi },
2404 { "fxch", STi },
2405 { FGRPd9_2 },
2406 { "(bad)" },
2407 { FGRPd9_4 },
2408 { FGRPd9_5 },
2409 { FGRPd9_6 },
2410 { FGRPd9_7 },
2411 },
2412 /* da */
2413 {
2414 { "fcmovb", ST, STi },
2415 { "fcmove", ST, STi },
2416 { "fcmovbe",ST, STi },
2417 { "fcmovu", ST, STi },
2418 { "(bad)" },
2419 { FGRPda_5 },
2420 { "(bad)" },
2421 { "(bad)" },
2422 },
2423 /* db */
2424 {
2425 { "fcmovnb",ST, STi },
2426 { "fcmovne",ST, STi },
2427 { "fcmovnbe",ST, STi },
2428 { "fcmovnu",ST, STi },
2429 { FGRPdb_4 },
2430 { "fucomi", ST, STi },
2431 { "fcomi", ST, STi },
2432 { "(bad)" },
2433 },
2434 /* dc */
2435 {
2436 { "fadd", STi, ST },
2437 { "fmul", STi, ST },
2438 { "(bad)" },
2439 { "(bad)" },
2440 #if UNIXWARE_COMPAT
2441 { "fsub", STi, ST },
2442 { "fsubr", STi, ST },
2443 { "fdiv", STi, ST },
2444 { "fdivr", STi, ST },
2445 #else
2446 { "fsubr", STi, ST },
2447 { "fsub", STi, ST },
2448 { "fdivr", STi, ST },
2449 { "fdiv", STi, ST },
2450 #endif
2451 },
2452 /* dd */
2453 {
2454 { "ffree", STi },
2455 { "(bad)" },
2456 { "fst", STi },
2457 { "fstp", STi },
2458 { "fucom", STi },
2459 { "fucomp", STi },
2460 { "(bad)" },
2461 { "(bad)" },
2462 },
2463 /* de */
2464 {
2465 { "faddp", STi, ST },
2466 { "fmulp", STi, ST },
2467 { "(bad)" },
2468 { FGRPde_3 },
2469 #if UNIXWARE_COMPAT
2470 { "fsubp", STi, ST },
2471 { "fsubrp", STi, ST },
2472 { "fdivp", STi, ST },
2473 { "fdivrp", STi, ST },
2474 #else
2475 { "fsubrp", STi, ST },
2476 { "fsubp", STi, ST },
2477 { "fdivrp", STi, ST },
2478 { "fdivp", STi, ST },
2479 #endif
2480 },
2481 /* df */
2482 {
2483 { "(bad)" },
2484 { "(bad)" },
2485 { "(bad)" },
2486 { "(bad)" },
2487 { FGRPdf_4 },
2488 { "fucomip",ST, STi },
2489 { "fcomip", ST, STi },
2490 { "(bad)" },
2491 },
2492 };
2493
2494
2495 static char *fgrps[][8] = {
2496 /* d9_2 0 */
2497 {
2498 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2499 },
2500
2501 /* d9_4 1 */
2502 {
2503 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2504 },
2505
2506 /* d9_5 2 */
2507 {
2508 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2509 },
2510
2511 /* d9_6 3 */
2512 {
2513 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2514 },
2515
2516 /* d9_7 4 */
2517 {
2518 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2519 },
2520
2521 /* da_5 5 */
2522 {
2523 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2524 },
2525
2526 /* db_4 6 */
2527 {
2528 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2529 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2530 },
2531
2532 /* de_3 7 */
2533 {
2534 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2535 },
2536
2537 /* df_4 8 */
2538 {
2539 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2540 },
2541 };
2542
2543 static void
2544 dofloat (sizeflag)
2545 int sizeflag;
2546 {
2547 const struct dis386 *dp;
2548 unsigned char floatop;
2549
2550 floatop = codep[-1];
2551
2552 if (mod != 3)
2553 {
2554 if (intel_syntax)
2555 putop (float_mem_intel[(floatop - 0xd8 ) * 8 + reg], sizeflag);
2556 else
2557 putop (float_mem_att[(floatop - 0xd8 ) * 8 + reg], sizeflag);
2558 obufp = op1out;
2559 if (floatop == 0xdb)
2560 OP_E (x_mode, sizeflag);
2561 else if (floatop == 0xdd)
2562 OP_E (d_mode, sizeflag);
2563 else
2564 OP_E (v_mode, sizeflag);
2565 return;
2566 }
2567 codep++;
2568
2569 dp = &float_reg[floatop - 0xd8][reg];
2570 if (dp->name == NULL)
2571 {
2572 putop (fgrps[dp->bytemode1][rm], sizeflag);
2573
2574 /* instruction fnstsw is only one with strange arg */
2575 if (floatop == 0xdf && codep[-1] == 0xe0)
2576 strcpy (op1out, names16[0]);
2577 }
2578 else
2579 {
2580 putop (dp->name, sizeflag);
2581
2582 obufp = op1out;
2583 if (dp->op1)
2584 (*dp->op1)(dp->bytemode1, sizeflag);
2585 obufp = op2out;
2586 if (dp->op2)
2587 (*dp->op2)(dp->bytemode2, sizeflag);
2588 }
2589 }
2590
2591 /* ARGSUSED */
2592 static void
2593 OP_ST (ignore, sizeflag)
2594 int ignore;
2595 int sizeflag;
2596 {
2597 oappend ("%st");
2598 }
2599
2600 /* ARGSUSED */
2601 static void
2602 OP_STi (ignore, sizeflag)
2603 int ignore;
2604 int sizeflag;
2605 {
2606 sprintf (scratchbuf, "%%st(%d)", rm);
2607 oappend (scratchbuf);
2608 }
2609
2610
2611 /* capital letters in template are macros */
2612 static void
2613 putop (template, sizeflag)
2614 const char *template;
2615 int sizeflag;
2616 {
2617 const char *p;
2618
2619 for (p = template; *p; p++)
2620 {
2621 switch (*p)
2622 {
2623 default:
2624 *obufp++ = *p;
2625 break;
2626 case 'A':
2627 if (intel_syntax)
2628 break;
2629 if (mod != 3
2630 #ifdef SUFFIX_ALWAYS
2631 || (sizeflag & SUFFIX_ALWAYS)
2632 #endif
2633 )
2634 *obufp++ = 'b';
2635 break;
2636 case 'B':
2637 if (intel_syntax)
2638 break;
2639 #ifdef SUFFIX_ALWAYS
2640 if (sizeflag & SUFFIX_ALWAYS)
2641 *obufp++ = 'b';
2642 #endif
2643 break;
2644 case 'E': /* For jcxz/jecxz */
2645 if (sizeflag & AFLAG)
2646 *obufp++ = 'e';
2647 break;
2648 case 'L':
2649 if (intel_syntax)
2650 break;
2651 #ifdef SUFFIX_ALWAYS
2652 if (sizeflag & SUFFIX_ALWAYS)
2653 *obufp++ = 'l';
2654 #endif
2655 break;
2656 case 'N':
2657 if ((prefixes & PREFIX_FWAIT) == 0)
2658 *obufp++ = 'n';
2659 break;
2660 case 'P':
2661 if (intel_syntax)
2662 break;
2663 if ((prefixes & PREFIX_DATA)
2664 #ifdef SUFFIX_ALWAYS
2665 || (sizeflag & SUFFIX_ALWAYS)
2666 #endif
2667 )
2668 {
2669 if (sizeflag & DFLAG)
2670 *obufp++ = 'l';
2671 else
2672 *obufp++ = 'w';
2673 }
2674 break;
2675 case 'Q':
2676 if (intel_syntax)
2677 break;
2678 if (mod != 3
2679 #ifdef SUFFIX_ALWAYS
2680 || (sizeflag & SUFFIX_ALWAYS)
2681 #endif
2682 )
2683 {
2684 if (sizeflag & DFLAG)
2685 *obufp++ = 'l';
2686 else
2687 *obufp++ = 'w';
2688 }
2689 break;
2690 case 'R':
2691 if (intel_syntax)
2692 {
2693 if (sizeflag & DFLAG)
2694 {
2695 *obufp++ = 'd';
2696 *obufp++ = 'q';
2697 }
2698 else
2699 {
2700 *obufp++ = 'w';
2701 *obufp++ = 'd';
2702 }
2703 }
2704 else
2705 {
2706 if (sizeflag & DFLAG)
2707 *obufp++ = 'l';
2708 else
2709 *obufp++ = 'w';
2710 }
2711 break;
2712 case 'S':
2713 if (intel_syntax)
2714 break;
2715 #ifdef SUFFIX_ALWAYS
2716 if (sizeflag & SUFFIX_ALWAYS)
2717 {
2718 if (sizeflag & DFLAG)
2719 *obufp++ = 'l';
2720 else
2721 *obufp++ = 'w';
2722 }
2723 #endif
2724 break;
2725 case 'W':
2726 /* operand size flag for cwtl, cbtw */
2727 if (sizeflag & DFLAG)
2728 *obufp++ = 'w';
2729 else
2730 *obufp++ = 'b';
2731 if (intel_syntax)
2732 {
2733 if (sizeflag & DFLAG)
2734 {
2735 *obufp++ = 'd';
2736 *obufp++ = 'e';
2737 }
2738 else
2739 {
2740 *obufp++ = 'w';
2741 }
2742 }
2743 break;
2744 }
2745 }
2746 *obufp = 0;
2747 }
2748
2749 static void
2750 oappend (s)
2751 const char *s;
2752 {
2753 strcpy (obufp, s);
2754 obufp += strlen (s);
2755 }
2756
2757 static void
2758 append_seg ()
2759 {
2760 if (prefixes & PREFIX_CS)
2761 oappend ("%cs:");
2762 if (prefixes & PREFIX_DS)
2763 oappend ("%ds:");
2764 if (prefixes & PREFIX_SS)
2765 oappend ("%ss:");
2766 if (prefixes & PREFIX_ES)
2767 oappend ("%es:");
2768 if (prefixes & PREFIX_FS)
2769 oappend ("%fs:");
2770 if (prefixes & PREFIX_GS)
2771 oappend ("%gs:");
2772 }
2773
2774 static void
2775 OP_indirE (bytemode, sizeflag)
2776 int bytemode;
2777 int sizeflag;
2778 {
2779 if (!intel_syntax)
2780 oappend ("*");
2781 OP_E (bytemode, sizeflag);
2782 }
2783
2784 static void
2785 OP_E (bytemode, sizeflag)
2786 int bytemode;
2787 int sizeflag;
2788 {
2789 int disp;
2790
2791 /* skip mod/rm byte */
2792 codep++;
2793
2794 if (mod == 3)
2795 {
2796 switch (bytemode)
2797 {
2798 case b_mode:
2799 oappend (names8[rm]);
2800 break;
2801 case w_mode:
2802 oappend (names16[rm]);
2803 break;
2804 case d_mode:
2805 oappend (names32[rm]);
2806 break;
2807 case v_mode:
2808 if (sizeflag & DFLAG)
2809 oappend (names32[rm]);
2810 else
2811 oappend (names16[rm]);
2812 break;
2813 case 0:
2814 if ( !(codep[-2] == 0xAE && codep[-1] == 0xF8 /* sfence */))
2815 BadOp(); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */
2816 break;
2817 default:
2818 oappend (INTERNAL_DISASSEMBLER_ERROR);
2819 break;
2820 }
2821 return;
2822 }
2823
2824 disp = 0;
2825 append_seg ();
2826
2827 if (sizeflag & AFLAG) /* 32 bit address mode */
2828 {
2829 int havesib;
2830 int havebase;
2831 int base;
2832 int index = 0;
2833 int scale = 0;
2834
2835 havesib = 0;
2836 havebase = 1;
2837 base = rm;
2838
2839 if (base == 4)
2840 {
2841 havesib = 1;
2842 FETCH_DATA (the_info, codep + 1);
2843 scale = (*codep >> 6) & 3;
2844 index = (*codep >> 3) & 7;
2845 base = *codep & 7;
2846 codep++;
2847 }
2848
2849 switch (mod)
2850 {
2851 case 0:
2852 if (base == 5)
2853 {
2854 havebase = 0;
2855 disp = get32 ();
2856 }
2857 break;
2858 case 1:
2859 FETCH_DATA (the_info, codep + 1);
2860 disp = *codep++;
2861 if ((disp & 0x80) != 0)
2862 disp -= 0x100;
2863 break;
2864 case 2:
2865 disp = get32 ();
2866 break;
2867 }
2868
2869 if (!intel_syntax)
2870 if (mod != 0 || base == 5)
2871 {
2872 sprintf (scratchbuf, "0x%x", disp);
2873 oappend (scratchbuf);
2874 }
2875
2876 if (havebase || (havesib && (index != 4 || scale != 0)))
2877 {
2878 if (intel_syntax)
2879 {
2880 switch (bytemode)
2881 {
2882 case b_mode:
2883 oappend("BYTE PTR ");
2884 break;
2885 case w_mode:
2886 oappend("WORD PTR ");
2887 break;
2888 case v_mode:
2889 oappend("DWORD PTR ");
2890 break;
2891 case d_mode:
2892 oappend("QWORD PTR ");
2893 break;
2894 case x_mode:
2895 oappend("XWORD PTR ");
2896 break;
2897 default:
2898 break;
2899 }
2900 }
2901 *obufp++ = open_char;
2902 *obufp = '\0';
2903 if (havebase)
2904 oappend (names32[base]);
2905 if (havesib)
2906 {
2907 if (index != 4)
2908 {
2909 if (intel_syntax)
2910 {
2911 if (havebase)
2912 {
2913 *obufp++ = separator_char;
2914 *obufp = '\0';
2915 }
2916 sprintf (scratchbuf, "%s", names32[index]);
2917 }
2918 else
2919 sprintf (scratchbuf, ",%s", names32[index]);
2920 oappend (scratchbuf);
2921 }
2922 if (!intel_syntax
2923 || (intel_syntax
2924 && bytemode != b_mode
2925 && bytemode != w_mode
2926 && bytemode != v_mode))
2927 {
2928 *obufp++ = scale_char;
2929 *obufp = '\0';
2930 sprintf (scratchbuf, "%d", 1 << scale);
2931 oappend (scratchbuf);
2932 }
2933 }
2934 if (intel_syntax)
2935 if (mod != 0 || base == 5)
2936 {
2937 /* Don't print zero displacements */
2938 if (disp > 0)
2939 {
2940 sprintf (scratchbuf, "+%d", disp);
2941 oappend (scratchbuf);
2942 }
2943 else if (disp < 0)
2944 {
2945 sprintf (scratchbuf, "%d", disp);
2946 oappend (scratchbuf);
2947 }
2948 }
2949
2950 *obufp++ = close_char;
2951 *obufp = '\0';
2952 }
2953 else if (intel_syntax)
2954 {
2955 if (mod != 0 || base == 5)
2956 {
2957 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
2958 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
2959 ;
2960 else
2961 {
2962 oappend (names_seg[3]);
2963 oappend (":");
2964 }
2965 sprintf (scratchbuf, "0x%x", disp);
2966 oappend (scratchbuf);
2967 }
2968 }
2969 }
2970 else
2971 { /* 16 bit address mode */
2972 switch (mod)
2973 {
2974 case 0:
2975 if (rm == 6)
2976 {
2977 disp = get16 ();
2978 if ((disp & 0x8000) != 0)
2979 disp -= 0x10000;
2980 }
2981 break;
2982 case 1:
2983 FETCH_DATA (the_info, codep + 1);
2984 disp = *codep++;
2985 if ((disp & 0x80) != 0)
2986 disp -= 0x100;
2987 break;
2988 case 2:
2989 disp = get16 ();
2990 if ((disp & 0x8000) != 0)
2991 disp -= 0x10000;
2992 break;
2993 }
2994
2995 if (!intel_syntax)
2996 if (mod != 0 || rm == 6)
2997 {
2998 sprintf (scratchbuf, "%d", disp);
2999 oappend (scratchbuf);
3000 }
3001
3002 if (mod != 0 || rm != 6)
3003 {
3004 *obufp++ = open_char;
3005 *obufp = '\0';
3006 oappend (index16[rm]);
3007 *obufp++ = close_char;
3008 *obufp = '\0';
3009 }
3010 }
3011 }
3012
3013 static void
3014 OP_G (bytemode, sizeflag)
3015 int bytemode;
3016 int sizeflag;
3017 {
3018 switch (bytemode)
3019 {
3020 case b_mode:
3021 oappend (names8[reg]);
3022 break;
3023 case w_mode:
3024 oappend (names16[reg]);
3025 break;
3026 case d_mode:
3027 oappend (names32[reg]);
3028 break;
3029 case v_mode:
3030 if (sizeflag & DFLAG)
3031 oappend (names32[reg]);
3032 else
3033 oappend (names16[reg]);
3034 break;
3035 default:
3036 oappend (INTERNAL_DISASSEMBLER_ERROR);
3037 break;
3038 }
3039 }
3040
3041 static int
3042 get32 ()
3043 {
3044 int x = 0;
3045
3046 FETCH_DATA (the_info, codep + 4);
3047 x = *codep++ & 0xff;
3048 x |= (*codep++ & 0xff) << 8;
3049 x |= (*codep++ & 0xff) << 16;
3050 x |= (*codep++ & 0xff) << 24;
3051 return x;
3052 }
3053
3054 static int
3055 get16 ()
3056 {
3057 int x = 0;
3058
3059 FETCH_DATA (the_info, codep + 2);
3060 x = *codep++ & 0xff;
3061 x |= (*codep++ & 0xff) << 8;
3062 return x;
3063 }
3064
3065 static void
3066 set_op (op)
3067 unsigned int op;
3068 {
3069 op_index[op_ad] = op_ad;
3070 op_address[op_ad] = op;
3071 }
3072
3073 static void
3074 OP_REG (code, sizeflag)
3075 int code;
3076 int sizeflag;
3077 {
3078 const char *s;
3079
3080 switch (code)
3081 {
3082 case indir_dx_reg:
3083 s = "(%dx)";
3084 break;
3085 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3086 case sp_reg: case bp_reg: case si_reg: case di_reg:
3087 s = names16[code - ax_reg];
3088 break;
3089 case es_reg: case ss_reg: case cs_reg:
3090 case ds_reg: case fs_reg: case gs_reg:
3091 s = names_seg[code - es_reg];
3092 break;
3093 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3094 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3095 s = names8[code - al_reg];
3096 break;
3097 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3098 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3099 if (sizeflag & DFLAG)
3100 s = names32[code - eAX_reg];
3101 else
3102 s = names16[code - eAX_reg];
3103 break;
3104 default:
3105 s = INTERNAL_DISASSEMBLER_ERROR;
3106 break;
3107 }
3108 oappend (s);
3109 }
3110
3111 static void
3112 OP_I (bytemode, sizeflag)
3113 int bytemode;
3114 int sizeflag;
3115 {
3116 int op;
3117
3118 switch (bytemode)
3119 {
3120 case b_mode:
3121 FETCH_DATA (the_info, codep + 1);
3122 op = *codep++ & 0xff;
3123 break;
3124 case v_mode:
3125 if (sizeflag & DFLAG)
3126 op = get32 ();
3127 else
3128 op = get16 ();
3129 break;
3130 case w_mode:
3131 op = get16 ();
3132 break;
3133 default:
3134 oappend (INTERNAL_DISASSEMBLER_ERROR);
3135 return;
3136 }
3137
3138 if (intel_syntax)
3139 sprintf (scratchbuf, "0x%x", op);
3140 else
3141 sprintf (scratchbuf, "$0x%x", op);
3142 oappend (scratchbuf);
3143 scratchbuf[0] = '\0';
3144 }
3145
3146 static void
3147 OP_sI (bytemode, sizeflag)
3148 int bytemode;
3149 int sizeflag;
3150 {
3151 int op;
3152
3153 switch (bytemode)
3154 {
3155 case b_mode:
3156 FETCH_DATA (the_info, codep + 1);
3157 op = *codep++;
3158 if ((op & 0x80) != 0)
3159 op -= 0x100;
3160 break;
3161 case v_mode:
3162 if (sizeflag & DFLAG)
3163 op = get32 ();
3164 else
3165 {
3166 op = get16();
3167 if ((op & 0x8000) != 0)
3168 op -= 0x10000;
3169 }
3170 break;
3171 case w_mode:
3172 op = get16 ();
3173 if ((op & 0x8000) != 0)
3174 op -= 0x10000;
3175 break;
3176 default:
3177 oappend (INTERNAL_DISASSEMBLER_ERROR);
3178 return;
3179 }
3180 if (intel_syntax)
3181 sprintf (scratchbuf, "%d", op);
3182 else
3183 sprintf (scratchbuf, "$0x%x", op);
3184 oappend (scratchbuf);
3185 }
3186
3187 static void
3188 OP_J (bytemode, sizeflag)
3189 int bytemode;
3190 int sizeflag;
3191 {
3192 int disp;
3193 int mask = -1;
3194
3195 switch (bytemode)
3196 {
3197 case b_mode:
3198 FETCH_DATA (the_info, codep + 1);
3199 disp = *codep++;
3200 if ((disp & 0x80) != 0)
3201 disp -= 0x100;
3202 break;
3203 case v_mode:
3204 if (sizeflag & DFLAG)
3205 disp = get32 ();
3206 else
3207 {
3208 disp = get16 ();
3209 /* for some reason, a data16 prefix on a jump instruction
3210 means that the pc is masked to 16 bits after the
3211 displacement is added! */
3212 mask = 0xffff;
3213 }
3214 break;
3215 default:
3216 oappend (INTERNAL_DISASSEMBLER_ERROR);
3217 return;
3218 }
3219 disp = (start_pc + codep - start_codep + disp) & mask;
3220 set_op (disp);
3221 sprintf (scratchbuf, "0x%x", disp);
3222 oappend (scratchbuf);
3223 }
3224
3225 /* ARGSUSED */
3226 static void
3227 OP_SEG (dummy, sizeflag)
3228 int dummy;
3229 int sizeflag;
3230 {
3231 static char *sreg[] = {
3232 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
3233 };
3234
3235 oappend (sreg[reg]);
3236 }
3237
3238 /* ARGSUSED */
3239 static void
3240 OP_DIR (dummy, sizeflag)
3241 int dummy;
3242 int sizeflag;
3243 {
3244 int seg, offset;
3245
3246 if (sizeflag & DFLAG)
3247 {
3248 offset = get32 ();
3249 seg = get16 ();
3250 }
3251 else
3252 {
3253 offset = get16 ();
3254 seg = get16 ();
3255 }
3256 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
3257 oappend (scratchbuf);
3258 }
3259
3260 /* ARGSUSED */
3261 static void
3262 OP_OFF (ignore, sizeflag)
3263 int ignore;
3264 int sizeflag;
3265 {
3266 int off;
3267
3268 append_seg ();
3269
3270 if (sizeflag & AFLAG)
3271 off = get32 ();
3272 else
3273 off = get16 ();
3274
3275 if (intel_syntax)
3276 {
3277 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3278 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3279 {
3280 oappend (names_seg[3]);
3281 oappend (":");
3282 }
3283 }
3284 sprintf (scratchbuf, "0x%x", off);
3285 oappend (scratchbuf);
3286 }
3287
3288 static void
3289 ptr_reg (code, sizeflag)
3290 int code;
3291 int sizeflag;
3292 {
3293 const char *s;
3294 oappend ("(");
3295 if (sizeflag & AFLAG)
3296 s = names32[code - eAX_reg];
3297 else
3298 s = names16[code - eAX_reg];
3299 oappend (s);
3300 oappend (")");
3301 }
3302
3303 static void
3304 OP_ESreg (code, sizeflag)
3305 int code;
3306 int sizeflag;
3307 {
3308 oappend ("%es:");
3309 ptr_reg (code, sizeflag);
3310 }
3311
3312 static void
3313 OP_DSreg (code, sizeflag)
3314 int code;
3315 int sizeflag;
3316 {
3317 if ((prefixes
3318 & (PREFIX_CS
3319 | PREFIX_DS
3320 | PREFIX_SS
3321 | PREFIX_ES
3322 | PREFIX_FS
3323 | PREFIX_GS)) == 0)
3324 prefixes |= PREFIX_DS;
3325 append_seg();
3326 ptr_reg (code, sizeflag);
3327 }
3328
3329 /* ARGSUSED */
3330 static void
3331 OP_C (dummy, sizeflag)
3332 int dummy;
3333 int sizeflag;
3334 {
3335 sprintf (scratchbuf, "%%cr%d", reg);
3336 oappend (scratchbuf);
3337 }
3338
3339 /* ARGSUSED */
3340 static void
3341 OP_D (dummy, sizeflag)
3342 int dummy;
3343 int sizeflag;
3344 {
3345 sprintf (scratchbuf, "%%db%d", reg);
3346 oappend (scratchbuf);
3347 }
3348
3349 /* ARGSUSED */
3350 static void
3351 OP_T (dummy, sizeflag)
3352 int dummy;
3353 int sizeflag;
3354 {
3355 sprintf (scratchbuf, "%%tr%d", reg);
3356 oappend (scratchbuf);
3357 }
3358
3359 static void
3360 OP_Rd (bytemode, sizeflag)
3361 int bytemode;
3362 int sizeflag;
3363 {
3364 if (mod == 3)
3365 OP_E (bytemode, sizeflag);
3366 else
3367 BadOp();
3368 }
3369
3370 static void
3371 OP_MMX (ignore, sizeflag)
3372 int ignore;
3373 int sizeflag;
3374 {
3375 sprintf (scratchbuf, "%%mm%d", reg);
3376 oappend (scratchbuf);
3377 }
3378
3379 static void
3380 OP_XMM (bytemode, sizeflag)
3381 int bytemode;
3382 int sizeflag;
3383 {
3384 sprintf (scratchbuf, "%%xmm%d", reg);
3385 oappend (scratchbuf);
3386 }
3387
3388 static void
3389 OP_EM (bytemode, sizeflag)
3390 int bytemode;
3391 int sizeflag;
3392 {
3393 if (mod != 3)
3394 {
3395 OP_E (bytemode, sizeflag);
3396 return;
3397 }
3398
3399 codep++;
3400 sprintf (scratchbuf, "%%mm%d", rm);
3401 oappend (scratchbuf);
3402 }
3403
3404 static void
3405 OP_EX (bytemode, sizeflag)
3406 int bytemode;
3407 int sizeflag;
3408 {
3409 if (mod != 3)
3410 {
3411 OP_E (bytemode, sizeflag);
3412 return;
3413 }
3414
3415 codep++;
3416 sprintf (scratchbuf, "%%xmm%d", rm);
3417 oappend (scratchbuf);
3418 }
3419
3420 static void
3421 OP_MS (bytemode, sizeflag)
3422 int bytemode;
3423 int sizeflag;
3424 {
3425 if (mod == 3)
3426 OP_EM (bytemode, sizeflag);
3427 else
3428 BadOp();
3429 }
3430
3431 static const char *Suffix3DNow[] = {
3432 /* 00 */ NULL, NULL, NULL, NULL,
3433 /* 04 */ NULL, NULL, NULL, NULL,
3434 /* 08 */ NULL, NULL, NULL, NULL,
3435 /* 0C */ NULL, "pi2fd", NULL, NULL,
3436 /* 10 */ NULL, NULL, NULL, NULL,
3437 /* 14 */ NULL, NULL, NULL, NULL,
3438 /* 18 */ NULL, NULL, NULL, NULL,
3439 /* 1C */ NULL, "pf2id", NULL, NULL,
3440 /* 20 */ NULL, NULL, NULL, NULL,
3441 /* 24 */ NULL, NULL, NULL, NULL,
3442 /* 28 */ NULL, NULL, NULL, NULL,
3443 /* 2C */ NULL, NULL, NULL, NULL,
3444 /* 30 */ NULL, NULL, NULL, NULL,
3445 /* 34 */ NULL, NULL, NULL, NULL,
3446 /* 38 */ NULL, NULL, NULL, NULL,
3447 /* 3C */ NULL, NULL, NULL, NULL,
3448 /* 40 */ NULL, NULL, NULL, NULL,
3449 /* 44 */ NULL, NULL, NULL, NULL,
3450 /* 48 */ NULL, NULL, NULL, NULL,
3451 /* 4C */ NULL, NULL, NULL, NULL,
3452 /* 50 */ NULL, NULL, NULL, NULL,
3453 /* 54 */ NULL, NULL, NULL, NULL,
3454 /* 58 */ NULL, NULL, NULL, NULL,
3455 /* 5C */ NULL, NULL, NULL, NULL,
3456 /* 60 */ NULL, NULL, NULL, NULL,
3457 /* 64 */ NULL, NULL, NULL, NULL,
3458 /* 68 */ NULL, NULL, NULL, NULL,
3459 /* 6C */ NULL, NULL, NULL, NULL,
3460 /* 70 */ NULL, NULL, NULL, NULL,
3461 /* 74 */ NULL, NULL, NULL, NULL,
3462 /* 78 */ NULL, NULL, NULL, NULL,
3463 /* 7C */ NULL, NULL, NULL, NULL,
3464 /* 80 */ NULL, NULL, NULL, NULL,
3465 /* 84 */ NULL, NULL, NULL, NULL,
3466 /* 88 */ NULL, NULL, NULL, NULL,
3467 /* 8C */ NULL, NULL, NULL, NULL,
3468 /* 90 */ "pfcmpge", NULL, NULL, NULL,
3469 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
3470 /* 98 */ NULL, NULL, "pfsub", NULL,
3471 /* 9C */ NULL, NULL, "pfadd", NULL,
3472 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
3473 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
3474 /* A8 */ NULL, NULL, "pfsubr", NULL,
3475 /* AC */ NULL, NULL, "pfacc", NULL,
3476 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
3477 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
3478 /* B8 */ NULL, NULL, NULL, NULL,
3479 /* BC */ NULL, NULL, NULL, "pavgusb",
3480 /* C0 */ NULL, NULL, NULL, NULL,
3481 /* C4 */ NULL, NULL, NULL, NULL,
3482 /* C8 */ NULL, NULL, NULL, NULL,
3483 /* CC */ NULL, NULL, NULL, NULL,
3484 /* D0 */ NULL, NULL, NULL, NULL,
3485 /* D4 */ NULL, NULL, NULL, NULL,
3486 /* D8 */ NULL, NULL, NULL, NULL,
3487 /* DC */ NULL, NULL, NULL, NULL,
3488 /* E0 */ NULL, NULL, NULL, NULL,
3489 /* E4 */ NULL, NULL, NULL, NULL,
3490 /* E8 */ NULL, NULL, NULL, NULL,
3491 /* EC */ NULL, NULL, NULL, NULL,
3492 /* F0 */ NULL, NULL, NULL, NULL,
3493 /* F4 */ NULL, NULL, NULL, NULL,
3494 /* F8 */ NULL, NULL, NULL, NULL,
3495 /* FC */ NULL, NULL, NULL, NULL,
3496 };
3497
3498 static void
3499 OP_3DNowSuffix (bytemode, sizeflag)
3500 int bytemode;
3501 int sizeflag;
3502 {
3503 const char *mnemonic;
3504
3505 FETCH_DATA (the_info, codep + 1);
3506 /* AMD 3DNow! instructions are specified by an opcode suffix in the
3507 place where an 8-bit immediate would normally go. ie. the last
3508 byte of the instruction. */
3509 obufp = obuf + strlen(obuf);
3510 mnemonic = Suffix3DNow[*codep++ & 0xff];
3511 if (mnemonic)
3512 oappend (mnemonic);
3513 else
3514 {
3515 /* Since a variable sized modrm/sib chunk is between the start
3516 of the opcode (0x0f0f) and the opcode suffix, we need to do
3517 all the modrm processing first, and don't know until now that
3518 we have a bad opcode. This necessitates some cleaning up. */
3519 op1out[0] = '\0';
3520 op2out[0] = '\0';
3521 BadOp();
3522 }
3523 }
3524
3525
3526 static const char *simd_cmp_op [] = {
3527 "eq",
3528 "lt",
3529 "le",
3530 "unord",
3531 "neq",
3532 "nlt",
3533 "nle",
3534 "ord"
3535 };
3536
3537 static void
3538 OP_SIMD_Suffix (bytemode, sizeflag)
3539 int bytemode;
3540 int sizeflag;
3541 {
3542 unsigned int cmp_type;
3543
3544 FETCH_DATA (the_info, codep + 1);
3545 obufp = obuf + strlen(obuf);
3546 cmp_type = *codep++ & 0xff;
3547 if (cmp_type < 8)
3548 {
3549 sprintf (scratchbuf, "cmp%s%cs",
3550 simd_cmp_op[cmp_type],
3551 prefixes & PREFIX_REPZ ? 's' : 'p');
3552 oappend (scratchbuf);
3553 }
3554 else
3555 {
3556 /* We have a bad extension byte. Clean up. */
3557 op1out[0] = '\0';
3558 op2out[0] = '\0';
3559 BadOp();
3560 }
3561 }
3562
3563 static void
3564 SIMD_Fixup (extrachar, sizeflag)
3565 int extrachar;
3566 int sizeflag;
3567 {
3568 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
3569 forms of these instructions. */
3570 if (mod == 3)
3571 {
3572 char *p = obuf + strlen(obuf);
3573 *(p+1) = '\0';
3574 *p = *(p-1);
3575 *(p-1) = *(p-2);
3576 *(p-2) = *(p-3);
3577 *(p-3) = extrachar;
3578 }
3579 }
3580
3581 static void BadOp (void)
3582 {
3583 codep = insn_codep + 1; /* throw away prefixes and 1st. opcode byte */
3584 oappend ("(bad)");
3585 }
GDB Binutils - Deliverables
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