1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright (C) 1988, 1989, 1991 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
21 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 * modified by John Hassey (hassey@dg-rtp.dg.com)
27 * The main tables describing the instructions is essentially a copy
28 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 * Programmers Manual. Usually, there is a capital letter, followed
30 * by a small letter. The capital letter tell the addressing mode,
31 * and the small letter tells about the operand size. Refer to
32 * the Intel manual for details.
43 /* Points to first byte not fetched. */
44 bfd_byte
*max_fetched
;
45 bfd_byte the_buffer
[MAXLEN
];
50 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
51 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
53 #define FETCH_DATA(info, addr) \
54 ((addr) <= ((struct private *)(info->private_data))->max_fetched \
55 ? 1 : fetch_data ((info), (addr)))
58 fetch_data (info
, addr
)
59 struct disassemble_info
*info
;
63 struct private *priv
= (struct private *)info
->private_data
;
64 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
66 status
= (*info
->read_memory_func
) (start
,
68 addr
- priv
->max_fetched
,
72 (*info
->memory_error_func
) (status
, start
, info
);
73 longjmp (priv
->bailout
, 1);
76 priv
->max_fetched
= addr
;
80 #define Eb OP_E, b_mode
81 #define indirEb OP_indirE, b_mode
82 #define Gb OP_G, b_mode
83 #define Ev OP_E, v_mode
84 #define indirEv OP_indirE, v_mode
85 #define Ew OP_E, w_mode
86 #define Ma OP_E, v_mode
88 #define Mp OP_E, 0 /* ? */
89 #define Gv OP_G, v_mode
90 #define Gw OP_G, w_mode
91 #define Rw OP_rm, w_mode
92 #define Rd OP_rm, d_mode
93 #define Ib OP_I, b_mode
94 #define sIb OP_sI, b_mode /* sign extened byte */
95 #define Iv OP_I, v_mode
96 #define Iw OP_I, w_mode
97 #define Jb OP_J, b_mode
98 #define Jv OP_J, v_mode
100 #define Cd OP_C, d_mode
101 #define Dd OP_D, d_mode
102 #define Td OP_T, d_mode
104 #define eAX OP_REG, eAX_reg
105 #define eBX OP_REG, eBX_reg
106 #define eCX OP_REG, eCX_reg
107 #define eDX OP_REG, eDX_reg
108 #define eSP OP_REG, eSP_reg
109 #define eBP OP_REG, eBP_reg
110 #define eSI OP_REG, eSI_reg
111 #define eDI OP_REG, eDI_reg
112 #define AL OP_REG, al_reg
113 #define CL OP_REG, cl_reg
114 #define DL OP_REG, dl_reg
115 #define BL OP_REG, bl_reg
116 #define AH OP_REG, ah_reg
117 #define CH OP_REG, ch_reg
118 #define DH OP_REG, dh_reg
119 #define BH OP_REG, bh_reg
120 #define AX OP_REG, ax_reg
121 #define DX OP_REG, dx_reg
122 #define indirDX OP_REG, indir_dx_reg
124 #define Sw OP_SEG, w_mode
125 #define Ap OP_DIR, lptr
126 #define Av OP_DIR, v_mode
127 #define Ob OP_OFF, b_mode
128 #define Ov OP_OFF, v_mode
129 #define Xb OP_DSSI, b_mode
130 #define Xv OP_DSSI, v_mode
131 #define Yb OP_ESDI, b_mode
132 #define Yv OP_ESDI, v_mode
134 #define es OP_REG, es_reg
135 #define ss OP_REG, ss_reg
136 #define cs OP_REG, cs_reg
137 #define ds OP_REG, ds_reg
138 #define fs OP_REG, fs_reg
139 #define gs OP_REG, gs_reg
141 int OP_E(), OP_indirE(), OP_G(), OP_I(), OP_sI(), OP_REG();
142 int OP_J(), OP_SEG();
143 int OP_DIR(), OP_OFF(), OP_DSSI(), OP_ESDI(), OP_ONE(), OP_C();
144 int OP_D(), OP_T(), OP_rm();
146 static void dofloat (), putop (), append_prefix (), set_op ();
147 static int get16 (), get32 ();
189 #define indir_dx_reg 150
191 #define GRP1b NULL, NULL, 0
192 #define GRP1S NULL, NULL, 1
193 #define GRP1Ss NULL, NULL, 2
194 #define GRP2b NULL, NULL, 3
195 #define GRP2S NULL, NULL, 4
196 #define GRP2b_one NULL, NULL, 5
197 #define GRP2S_one NULL, NULL, 6
198 #define GRP2b_cl NULL, NULL, 7
199 #define GRP2S_cl NULL, NULL, 8
200 #define GRP3b NULL, NULL, 9
201 #define GRP3S NULL, NULL, 10
202 #define GRP4 NULL, NULL, 11
203 #define GRP5 NULL, NULL, 12
204 #define GRP6 NULL, NULL, 13
205 #define GRP7 NULL, NULL, 14
206 #define GRP8 NULL, NULL, 15
209 #define FLOAT NULL, NULL, FLOATCODE
221 struct dis386 dis386
[] = {
239 { "(bad)" }, /* 0x0f extended opcode escape */
265 { "(bad)" }, /* SEG ES prefix */
274 { "(bad)" }, /* SEG CS prefix */
283 { "(bad)" }, /* SEG SS prefix */
292 { "(bad)" }, /* SEG DS prefix */
333 { "boundS", Gv
, Ma
},
335 { "(bad)" }, /* seg fs */
336 { "(bad)" }, /* seg gs */
337 { "(bad)" }, /* op size prefix */
338 { "(bad)" }, /* adr size prefix */
340 { "pushS", Iv
}, /* 386 book wrong */
341 { "imulS", Gv
, Ev
, Iv
},
342 { "pushl", sIb
}, /* push of byte really pushes 4 bytes */
343 { "imulS", Gv
, Ev
, Ib
},
344 { "insb", Yb
, indirDX
},
345 { "insS", Yv
, indirDX
},
346 { "outsb", indirDX
, Xb
},
347 { "outsS", indirDX
, Xv
},
386 { "xchgS", eCX
, eAX
},
387 { "xchgS", eDX
, eAX
},
388 { "xchgS", eBX
, eAX
},
389 { "xchgS", eSP
, eAX
},
390 { "xchgS", eBP
, eAX
},
391 { "xchgS", eSI
, eAX
},
392 { "xchgS", eDI
, eAX
},
397 { "(bad)" }, /* fwait */
413 { "testS", eAX
, Iv
},
415 { "stosS", Yv
, eAX
},
417 { "lodsS", eAX
, Xv
},
419 { "scasS", eAX
, Xv
},
488 { "inb", AL
, indirDX
},
489 { "inS", eAX
, indirDX
},
490 { "outb", indirDX
, AL
},
491 { "outS", indirDX
, eAX
},
493 { "(bad)" }, /* lock prefix */
495 { "(bad)" }, /* repne */
496 { "(bad)" }, /* repz */
512 struct dis386 dis386_twobyte
[] = {
525 { "(bad)" }, { "(bad)" },
526 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
528 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
529 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
531 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
532 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
534 /* these are all backward in appendix A of the intel book */
544 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
545 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
547 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
548 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
550 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
551 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
553 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
554 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
556 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
557 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
559 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
560 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
562 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
563 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
565 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
566 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
568 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
569 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
571 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
572 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
574 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
575 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
617 { "shldS", Ev
, Gv
, Ib
},
618 { "shldS", Ev
, Gv
, CL
},
626 { "shrdS", Ev
, Gv
, Ib
},
627 { "shrdS", Ev
, Gv
, CL
},
631 { "cmpxchgb", Eb
, Gb
},
632 { "cmpxchgS", Ev
, Gv
},
633 { "lssS", Gv
, Mp
}, /* 386 lists only Mp */
635 { "lfsS", Gv
, Mp
}, /* 386 lists only Mp */
636 { "lgsS", Gv
, Mp
}, /* 386 lists only Mp */
637 { "movzbS", Gv
, Eb
},
638 { "movzwS", Gv
, Ew
},
646 { "movsbS", Gv
, Eb
},
647 { "movswS", Gv
, Ew
},
651 { "(bad)" }, { "(bad)" },
652 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
663 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
664 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
666 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
667 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
669 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
670 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
672 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
673 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
675 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
676 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
678 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
679 { "(bad)" }, { "(bad)" }, { "(bad)" }, { "(bad)" },
682 static char obuf
[100];
684 static char scratchbuf
[100];
685 static unsigned char *start_codep
;
686 static unsigned char *codep
;
687 static disassemble_info
*the_info
;
691 static void oappend ();
693 static char *names32
[]={
694 "%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi",
696 static char *names16
[] = {
697 "%ax","%cx","%dx","%bx","%sp","%bp","%si","%di",
699 static char *names8
[] = {
700 "%al","%cl","%dl","%bl","%ah","%ch","%dh","%bh",
702 static char *names_seg
[] = {
703 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
706 struct dis386 grps
[][8] = {
824 { "imulS", eAX
, Ev
},
826 { "idivS", eAX
, Ev
},
844 { "lcall", indirEv
},
885 #define PREFIX_REPZ 1
886 #define PREFIX_REPNZ 2
887 #define PREFIX_LOCK 4
889 #define PREFIX_SS 0x10
890 #define PREFIX_DS 0x20
891 #define PREFIX_ES 0x40
892 #define PREFIX_FS 0x80
893 #define PREFIX_GS 0x100
894 #define PREFIX_DATA 0x200
895 #define PREFIX_ADR 0x400
896 #define PREFIX_FWAIT 0x800
906 FETCH_DATA (the_info
, codep
+ 1);
910 prefixes
|= PREFIX_REPZ
;
913 prefixes
|= PREFIX_REPNZ
;
916 prefixes
|= PREFIX_LOCK
;
919 prefixes
|= PREFIX_CS
;
922 prefixes
|= PREFIX_SS
;
925 prefixes
|= PREFIX_DS
;
928 prefixes
|= PREFIX_ES
;
931 prefixes
|= PREFIX_FS
;
934 prefixes
|= PREFIX_GS
;
937 prefixes
|= PREFIX_DATA
;
940 prefixes
|= PREFIX_ADR
;
943 prefixes
|= PREFIX_FWAIT
;
955 static char op1out
[100], op2out
[100], op3out
[100];
956 static int op_address
[3], op_ad
, op_index
[3];
961 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
962 * (see topic "Redundant prefixes" in the "Differences from 8086"
963 * section of the "Virtual 8086 Mode" chapter.)
964 * 'pc' should be the address of this instruction, it will
965 * be used to print the target address if this is a relative jump or call
966 * The function returns the length of this instruction in bytes.
970 print_insn_i386 (pc
, info
)
972 disassemble_info
*info
;
976 int enter_instruction
;
977 char *first
, *second
, *third
;
981 bfd_byte
*inbuf
= priv
.the_buffer
;
983 info
->private_data
= (PTR
) &priv
;
984 priv
.max_fetched
= priv
.the_buffer
;
985 priv
.insn_start
= pc
;
986 if (setjmp (priv
.bailout
) != 0)
995 op_index
[0] = op_index
[1] = op_index
[2] = -1;
1004 FETCH_DATA (info
, codep
+ 1);
1006 enter_instruction
= 1;
1008 enter_instruction
= 0;
1012 if (prefixes
& PREFIX_REPZ
)
1014 if (prefixes
& PREFIX_REPNZ
)
1016 if (prefixes
& PREFIX_LOCK
)
1019 if ((prefixes
& PREFIX_FWAIT
)
1020 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
1022 /* fwait not followed by floating point instruction */
1023 (*info
->fprintf_func
) (info
->stream
, "fwait");
1027 /* these would be initialized to 0 if disassembling for 8086 or 286 */
1031 if (prefixes
& PREFIX_DATA
)
1034 if (prefixes
& PREFIX_ADR
)
1037 oappend ("addr16 ");
1042 FETCH_DATA (info
, codep
+ 2);
1043 dp
= &dis386_twobyte
[*++codep
];
1046 dp
= &dis386
[*codep
];
1048 FETCH_DATA (info
, codep
+ 1);
1049 mod
= (*codep
>> 6) & 3;
1050 reg
= (*codep
>> 3) & 7;
1053 if (dp
->name
== NULL
&& dp
->bytemode1
== FLOATCODE
)
1059 if (dp
->name
== NULL
)
1060 dp
= &grps
[dp
->bytemode1
][reg
];
1067 (*dp
->op1
)(dp
->bytemode1
);
1072 (*dp
->op2
)(dp
->bytemode2
);
1077 (*dp
->op3
)(dp
->bytemode3
);
1080 obufp
= obuf
+ strlen (obuf
);
1081 for (i
= strlen (obuf
); i
< 6; i
++)
1084 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
1086 /* enter instruction is printed with operands in the
1087 * same order as the intel book; everything else
1088 * is printed in reverse order
1090 if (enter_instruction
)
1095 op_ad
= op_index
[0];
1096 op_index
[0] = op_index
[2];
1097 op_index
[2] = op_ad
;
1108 if (op_index
[0] != -1)
1109 print_address (op_address
[op_index
[0]], info
->stream
);
1111 (*info
->fprintf_func
) (info
->stream
, "%s", first
);
1117 (*info
->fprintf_func
) (info
->stream
, ",");
1118 if (op_index
[1] != -1)
1119 print_address (op_address
[op_index
[1]], info
->stream
);
1121 (*info
->fprintf_func
) (info
->stream
, "%s", second
);
1127 (*info
->fprintf_func
) (info
->stream
, ",");
1128 if (op_index
[2] != -1)
1129 print_address (op_address
[op_index
[2]], info
->stream
);
1131 (*info
->fprintf_func
) (info
->stream
, "%s", third
);
1133 return (codep
- inbuf
);
1136 char *float_mem
[] = {
1212 #define STi OP_STi, 0
1213 int OP_ST(), OP_STi();
1215 #define FGRPd9_2 NULL, NULL, 0
1216 #define FGRPd9_4 NULL, NULL, 1
1217 #define FGRPd9_5 NULL, NULL, 2
1218 #define FGRPd9_6 NULL, NULL, 3
1219 #define FGRPd9_7 NULL, NULL, 4
1220 #define FGRPda_5 NULL, NULL, 5
1221 #define FGRPdb_4 NULL, NULL, 6
1222 #define FGRPde_3 NULL, NULL, 7
1223 #define FGRPdf_4 NULL, NULL, 8
1225 struct dis386 float_reg
[][8] = {
1228 { "fadd", ST
, STi
},
1229 { "fmul", ST
, STi
},
1232 { "fsub", ST
, STi
},
1233 { "fsubr", ST
, STi
},
1234 { "fdiv", ST
, STi
},
1235 { "fdivr", ST
, STi
},
1272 { "fadd", STi
, ST
},
1273 { "fmul", STi
, ST
},
1276 { "fsub", STi
, ST
},
1277 { "fsubr", STi
, ST
},
1278 { "fdiv", STi
, ST
},
1279 { "fdivr", STi
, ST
},
1294 { "faddp", STi
, ST
},
1295 { "fmulp", STi
, ST
},
1298 { "fsubp", STi
, ST
},
1299 { "fsubrp", STi
, ST
},
1300 { "fdivp", STi
, ST
},
1301 { "fdivrp", STi
, ST
},
1317 char *fgrps
[][8] = {
1320 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1325 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
1330 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
1335 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
1340 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
1345 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1350 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
1351 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
1356 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1361 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1369 unsigned char floatop
;
1371 floatop
= codep
[-1];
1375 putop (float_mem
[(floatop
- 0xd8) * 8 + reg
]);
1382 dp
= &float_reg
[floatop
- 0xd8][reg
];
1383 if (dp
->name
== NULL
)
1385 putop (fgrps
[dp
->bytemode1
][rm
]);
1386 /* instruction fnstsw is only one with strange arg */
1388 && FETCH_DATA (the_info
, codep
+ 1)
1390 strcpy (op1out
, "%eax");
1397 (*dp
->op1
)(dp
->bytemode1
);
1400 (*dp
->op2
)(dp
->bytemode2
);
1418 sprintf (scratchbuf
, "%%st(%d)", rm
);
1419 oappend (scratchbuf
);
1424 /* capital letters in template are macros */
1431 for (p
= template; *p
; p
++)
1438 case 'C': /* For jcxz/jecxz */
1443 if ((prefixes
& PREFIX_FWAIT
) == 0)
1447 /* operand size flag */
1463 obufp
+= strlen (s
);
1470 if (prefixes
& PREFIX_CS
)
1472 if (prefixes
& PREFIX_DS
)
1474 if (prefixes
& PREFIX_SS
)
1476 if (prefixes
& PREFIX_ES
)
1478 if (prefixes
& PREFIX_FS
)
1480 if (prefixes
& PREFIX_GS
)
1485 OP_indirE (bytemode
)
1504 /* skip mod/rm byte */
1516 oappend (names8
[rm
]);
1519 oappend (names16
[rm
]);
1523 oappend (names32
[rm
]);
1525 oappend (names16
[rm
]);
1528 oappend ("<bad dis table>");
1539 FETCH_DATA (the_info
, codep
+ 1);
1540 scale
= (*codep
>> 6) & 3;
1541 index
= (*codep
>> 3) & 7;
1552 /* implies havesib and havebase */
1568 FETCH_DATA (the_info
, codep
+ 1);
1569 disp
= *(char *)codep
++;
1586 if (mod
!= 0 || rm
== 5 || (havesib
&& base
== 5))
1588 sprintf (scratchbuf
, "0x%x", disp
);
1589 oappend (scratchbuf
);
1592 if (havebase
|| havesib
)
1596 oappend (names32
[base
]);
1601 sprintf (scratchbuf
, ",%s", names32
[index
]);
1602 oappend (scratchbuf
);
1604 sprintf (scratchbuf
, ",%d", 1 << scale
);
1605 oappend (scratchbuf
);
1619 oappend (names8
[reg
]);
1622 oappend (names16
[reg
]);
1625 oappend (names32
[reg
]);
1629 oappend (names32
[reg
]);
1631 oappend (names16
[reg
]);
1634 oappend ("<internal disassembler error>");
1645 FETCH_DATA (the_info
, codep
+ 4);
1646 x
= *codep
++ & 0xff;
1647 x
|= (*codep
++ & 0xff) << 8;
1648 x
|= (*codep
++ & 0xff) << 16;
1649 x
|= (*codep
++ & 0xff) << 24;
1658 FETCH_DATA (the_info
, codep
+ 2);
1659 x
= *codep
++ & 0xff;
1660 x
|= (*codep
++ & 0xff) << 8;
1668 op_index
[op_ad
] = op_ad
;
1669 op_address
[op_ad
] = op
;
1680 case indir_dx_reg
: s
= "(%dx)"; break;
1681 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
1682 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
1683 s
= names16
[code
- ax_reg
];
1685 case es_reg
: case ss_reg
: case cs_reg
:
1686 case ds_reg
: case fs_reg
: case gs_reg
:
1687 s
= names_seg
[code
- es_reg
];
1689 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
1690 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
1691 s
= names8
[code
- al_reg
];
1693 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
1694 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
1696 s
= names32
[code
- eAX_reg
];
1698 s
= names16
[code
- eAX_reg
];
1701 s
= "<internal disassembler error>";
1717 FETCH_DATA (the_info
, codep
+ 1);
1718 op
= *codep
++ & 0xff;
1730 oappend ("<internal disassembler error>");
1733 sprintf (scratchbuf
, "$0x%x", op
);
1734 oappend (scratchbuf
);
1747 FETCH_DATA (the_info
, codep
+ 1);
1748 op
= *(char *)codep
++;
1754 op
= (short)get16();
1757 op
= (short)get16 ();
1760 oappend ("<internal disassembler error>");
1763 sprintf (scratchbuf
, "$0x%x", op
);
1764 oappend (scratchbuf
);
1778 FETCH_DATA (the_info
, codep
+ 1);
1779 disp
= *(char *)codep
++;
1786 disp
= (short)get16 ();
1787 /* for some reason, a data16 prefix on a jump instruction
1788 means that the pc is masked to 16 bits after the
1789 displacement is added! */
1794 oappend ("<internal disassembler error>");
1797 disp
= (start_pc
+ codep
- start_codep
+ disp
) & mask
;
1799 sprintf (scratchbuf
, "0x%x", disp
);
1800 oappend (scratchbuf
);
1809 static char *sreg
[] = {
1810 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
1813 oappend (sreg
[reg
]);
1836 sprintf (scratchbuf
, "0x%x,0x%x", seg
, offset
);
1837 oappend (scratchbuf
);
1843 offset
= (short)get16 ();
1845 offset
= start_pc
+ codep
- start_codep
+ offset
;
1847 sprintf (scratchbuf
, "0x%x", offset
);
1848 oappend (scratchbuf
);
1851 oappend ("<internal disassembler error>");
1869 sprintf (scratchbuf
, "0x%x", off
);
1870 oappend (scratchbuf
);
1880 oappend (aflag
? "%edi" : "%di");
1891 oappend (aflag
? "%esi" : "%si");
1910 codep
++; /* skip mod/rm */
1911 sprintf (scratchbuf
, "%%cr%d", reg
);
1912 oappend (scratchbuf
);
1921 codep
++; /* skip mod/rm */
1922 sprintf (scratchbuf
, "%%db%d", reg
);
1923 oappend (scratchbuf
);
1932 codep
++; /* skip mod/rm */
1933 sprintf (scratchbuf
, "%%tr%d", reg
);
1934 oappend (scratchbuf
);
1945 oappend (names32
[rm
]);
1948 oappend (names16
[rm
]);
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